wcd9xxx-utils.c 30 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/module.h>
  6. #include <linux/of_gpio.h>
  7. #include <linux/of_irq.h>
  8. #include <linux/of_device.h>
  9. #include <linux/slab.h>
  10. #include <linux/regmap.h>
  11. #include <linux/delay.h>
  12. #include <linux/sched.h>
  13. #include <linux/mfd/core.h>
  14. #include <asoc/core.h>
  15. #include <asoc/msm-cdc-supply.h>
  16. #include <asoc/msm-cdc-pinctrl.h>
  17. #include <asoc/pdata.h>
  18. #include <asoc/wcd9xxx-irq.h>
  19. #include "wcd9xxx-utils.h"
  20. #define REG_BYTES 2
  21. #define VAL_BYTES 1
  22. /*
  23. * Page Register Address that APP Proc uses to
  24. * access WCD9335 Codec registers is identified
  25. * as 0x00
  26. */
  27. #define PAGE_REG_ADDR 0x00
  28. static enum wcd9xxx_intf_status wcd9xxx_intf = -1;
  29. static struct mfd_cell tavil_devs[] = {
  30. {
  31. .name = "qcom-wcd-pinctrl",
  32. .of_compatible = "qcom,wcd-pinctrl",
  33. },
  34. {
  35. .name = "tavil_codec",
  36. },
  37. };
  38. static struct mfd_cell tasha_devs[] = {
  39. {
  40. .name = "tasha_codec",
  41. },
  42. };
  43. static struct mfd_cell tomtom_devs[] = {
  44. {
  45. .name = "tomtom_codec",
  46. },
  47. };
  48. static int wcd9xxx_read_of_property_u32(struct device *dev, const char *name,
  49. u32 *val)
  50. {
  51. int rc = 0;
  52. rc = of_property_read_u32(dev->of_node, name, val);
  53. if (rc)
  54. dev_err(dev, "%s: Looking up %s property in node %s failed",
  55. __func__, name, dev->of_node->full_name);
  56. return rc;
  57. }
  58. static void wcd9xxx_dt_parse_micbias_info(struct device *dev,
  59. struct wcd9xxx_micbias_setting *mb)
  60. {
  61. u32 prop_val;
  62. int rc;
  63. if (of_find_property(dev->of_node, "qcom,cdc-micbias-ldoh-v", NULL)) {
  64. rc = wcd9xxx_read_of_property_u32(dev,
  65. "qcom,cdc-micbias-ldoh-v",
  66. &prop_val);
  67. if (!rc)
  68. mb->ldoh_v = (u8)prop_val;
  69. }
  70. /* MB1 */
  71. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt1-mv",
  72. NULL)) {
  73. rc = wcd9xxx_read_of_property_u32(dev,
  74. "qcom,cdc-micbias-cfilt1-mv",
  75. &prop_val);
  76. if (!rc)
  77. mb->cfilt1_mv = prop_val;
  78. rc = wcd9xxx_read_of_property_u32(dev,
  79. "qcom,cdc-micbias1-cfilt-sel",
  80. &prop_val);
  81. if (!rc)
  82. mb->bias1_cfilt_sel = (u8)prop_val;
  83. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  84. NULL)) {
  85. rc = wcd9xxx_read_of_property_u32(dev,
  86. "qcom,cdc-micbias1-mv",
  87. &prop_val);
  88. if (!rc)
  89. mb->micb1_mv = prop_val;
  90. } else {
  91. dev_info(dev, "%s: Micbias1 DT property not found\n",
  92. __func__);
  93. }
  94. /* MB2 */
  95. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt2-mv",
  96. NULL)) {
  97. rc = wcd9xxx_read_of_property_u32(dev,
  98. "qcom,cdc-micbias-cfilt2-mv",
  99. &prop_val);
  100. if (!rc)
  101. mb->cfilt2_mv = prop_val;
  102. rc = wcd9xxx_read_of_property_u32(dev,
  103. "qcom,cdc-micbias2-cfilt-sel",
  104. &prop_val);
  105. if (!rc)
  106. mb->bias2_cfilt_sel = (u8)prop_val;
  107. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  108. NULL)) {
  109. rc = wcd9xxx_read_of_property_u32(dev,
  110. "qcom,cdc-micbias2-mv",
  111. &prop_val);
  112. if (!rc)
  113. mb->micb2_mv = prop_val;
  114. } else {
  115. dev_info(dev, "%s: Micbias2 DT property not found\n",
  116. __func__);
  117. }
  118. /* MB3 */
  119. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt3-mv",
  120. NULL)) {
  121. rc = wcd9xxx_read_of_property_u32(dev,
  122. "qcom,cdc-micbias-cfilt3-mv",
  123. &prop_val);
  124. if (!rc)
  125. mb->cfilt3_mv = prop_val;
  126. rc = wcd9xxx_read_of_property_u32(dev,
  127. "qcom,cdc-micbias3-cfilt-sel",
  128. &prop_val);
  129. if (!rc)
  130. mb->bias3_cfilt_sel = (u8)prop_val;
  131. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  132. NULL)) {
  133. rc = wcd9xxx_read_of_property_u32(dev,
  134. "qcom,cdc-micbias3-mv",
  135. &prop_val);
  136. if (!rc)
  137. mb->micb3_mv = prop_val;
  138. } else {
  139. dev_info(dev, "%s: Micbias3 DT property not found\n",
  140. __func__);
  141. }
  142. /* MB4 */
  143. if (of_find_property(dev->of_node, "qcom,cdc-micbias4-cfilt-sel",
  144. NULL)) {
  145. rc = wcd9xxx_read_of_property_u32(dev,
  146. "qcom,cdc-micbias4-cfilt-sel",
  147. &prop_val);
  148. if (!rc)
  149. mb->bias4_cfilt_sel = (u8)prop_val;
  150. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias4-mv",
  151. NULL)) {
  152. rc = wcd9xxx_read_of_property_u32(dev,
  153. "qcom,cdc-micbias4-mv",
  154. &prop_val);
  155. if (!rc)
  156. mb->micb4_mv = prop_val;
  157. } else {
  158. dev_info(dev, "%s: Micbias4 DT property not found\n",
  159. __func__);
  160. }
  161. mb->bias1_cap_mode =
  162. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias1-ext-cap") ?
  163. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  164. mb->bias2_cap_mode =
  165. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias2-ext-cap") ?
  166. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  167. mb->bias3_cap_mode =
  168. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias3-ext-cap") ?
  169. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  170. mb->bias4_cap_mode =
  171. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias4-ext-cap") ?
  172. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  173. mb->bias2_is_headset_only =
  174. of_property_read_bool(dev->of_node,
  175. "qcom,cdc-micbias2-headset-only");
  176. /* Print micbias info */
  177. dev_dbg(dev, "%s: ldoh_v %u cfilt1_mv %u cfilt2_mv %u cfilt3_mv %u",
  178. __func__, (u32)mb->ldoh_v, (u32)mb->cfilt1_mv,
  179. (u32)mb->cfilt2_mv, (u32)mb->cfilt3_mv);
  180. dev_dbg(dev, "%s: micb1_mv %u micb2_mv %u micb3_mv %u micb4_mv %u",
  181. __func__, mb->micb1_mv, mb->micb2_mv,
  182. mb->micb3_mv, mb->micb4_mv);
  183. dev_dbg(dev, "%s: bias1_cfilt_sel %u bias2_cfilt_sel %u\n",
  184. __func__, (u32)mb->bias1_cfilt_sel, (u32)mb->bias2_cfilt_sel);
  185. dev_dbg(dev, "%s: bias3_cfilt_sel %u bias4_cfilt_sel %u\n",
  186. __func__, (u32)mb->bias3_cfilt_sel, (u32)mb->bias4_cfilt_sel);
  187. dev_dbg(dev, "%s: bias1_ext_cap %d bias2_ext_cap %d\n",
  188. __func__, mb->bias1_cap_mode, mb->bias2_cap_mode);
  189. dev_dbg(dev, "%s: bias3_ext_cap %d bias4_ext_cap %d\n",
  190. __func__, mb->bias3_cap_mode, mb->bias4_cap_mode);
  191. dev_dbg(dev, "%s: bias2_is_headset_only %d\n",
  192. __func__, mb->bias2_is_headset_only);
  193. }
  194. /*
  195. * wcd9xxx_validate_dmic_sample_rate:
  196. * Given the dmic_sample_rate and mclk rate, validate the
  197. * dmic_sample_rate. If dmic rate is found to be invalid,
  198. * assign the dmic rate as undefined, so individual codec
  199. * drivers can use their own defaults
  200. * @dev: the device for which the dmic is to be configured
  201. * @dmic_sample_rate: The input dmic_sample_rate
  202. * @mclk_rate: The input codec mclk rate
  203. * @dmic_rate_type: String to indicate the type of dmic sample
  204. * rate, used for debug/error logging.
  205. */
  206. static u32 wcd9xxx_validate_dmic_sample_rate(struct device *dev,
  207. u32 dmic_sample_rate, u32 mclk_rate,
  208. const char *dmic_rate_type)
  209. {
  210. u32 div_factor;
  211. if (dmic_sample_rate == WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED ||
  212. mclk_rate % dmic_sample_rate != 0)
  213. goto undefined_rate;
  214. div_factor = mclk_rate / dmic_sample_rate;
  215. switch (div_factor) {
  216. case 2:
  217. case 3:
  218. case 4:
  219. case 8:
  220. case 16:
  221. /* Valid dmic DIV factors */
  222. dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
  223. __func__, div_factor, mclk_rate);
  224. break;
  225. case 6:
  226. /*
  227. * DIV 6 is valid for both 9.6MHz and 12.288MHz
  228. * MCLK on Tavil. Older codecs support DIV6 only
  229. * for 12.288MHz MCLK.
  230. */
  231. if ((mclk_rate == WCD9XXX_MCLK_CLK_9P6HZ) &&
  232. (of_device_is_compatible(dev->of_node,
  233. "qcom,tavil-slim-pgd")))
  234. dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
  235. __func__, div_factor, mclk_rate);
  236. else if (mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ)
  237. goto undefined_rate;
  238. break;
  239. default:
  240. /* Any other DIV factor is invalid */
  241. goto undefined_rate;
  242. }
  243. return dmic_sample_rate;
  244. undefined_rate:
  245. dev_dbg(dev, "%s: Invalid %s = %d, for mclk %d\n",
  246. __func__, dmic_rate_type, dmic_sample_rate, mclk_rate);
  247. dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  248. return dmic_sample_rate;
  249. }
  250. /*
  251. * wcd9xxx_populate_dt_data:
  252. * Parse device tree properties for the given codec device
  253. *
  254. * @dev: pointer to codec device
  255. *
  256. * Returns pointer to the platform data resulting from parsing
  257. * device tree.
  258. */
  259. struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
  260. {
  261. struct wcd9xxx_pdata *pdata;
  262. u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  263. u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  264. u32 ecpp_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  265. u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED;
  266. u32 prop_val;
  267. int rc = 0;
  268. if (!dev || !dev->of_node)
  269. return NULL;
  270. pdata = devm_kzalloc(dev, sizeof(struct wcd9xxx_pdata),
  271. GFP_KERNEL);
  272. if (!pdata)
  273. return NULL;
  274. /* Parse power supplies */
  275. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  276. &pdata->num_supplies);
  277. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  278. dev_err(dev, "%s: no power supplies defined for codec\n",
  279. __func__);
  280. goto err_power_sup;
  281. }
  282. /* Parse micbias info */
  283. wcd9xxx_dt_parse_micbias_info(dev, &pdata->micbias);
  284. pdata->wcd_rst_np = of_parse_phandle(dev->of_node,
  285. "qcom,wcd-rst-gpio-node", 0);
  286. if (!pdata->wcd_rst_np) {
  287. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  288. __func__, "qcom,wcd-rst-gpio-node",
  289. dev->of_node->full_name);
  290. goto err_parse_dt_prop;
  291. }
  292. pdata->has_buck_vsel_gpio = of_property_read_bool(dev->of_node,
  293. "qcom,has-buck-vsel-gpio");
  294. if (pdata->has_buck_vsel_gpio) {
  295. pdata->buck_vsel_ctl_np = of_parse_phandle(dev->of_node,
  296. "qcom,buck-vsel-gpio-node", 0);
  297. if (!pdata->buck_vsel_ctl_np) {
  298. dev_err(dev, "%s No entry for %s property in node %s\n",
  299. __func__, "qcom,buck-vsel-gpio-node",
  300. dev->of_node->full_name);
  301. goto err_parse_dt_prop;
  302. }
  303. }
  304. pdata->has_micb_supply_en_gpio = of_property_read_bool(dev->of_node,
  305. "qcom,has-micbias-supply-en-gpio");
  306. if (pdata->has_micb_supply_en_gpio) {
  307. pdata->micb_en_ctl = of_parse_phandle(dev->of_node,
  308. "qcom,micbias-supply-en-gpio-node", 0);
  309. if (!pdata->micb_en_ctl) {
  310. dev_err(dev, "%s No entry for %s property in node %s\n",
  311. __func__, "qcom,micbias-supply-en-gpio-node",
  312. dev->of_node->full_name);
  313. goto err_parse_dt_prop;
  314. }
  315. }
  316. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mclk-clk-rate",
  317. &prop_val)))
  318. pdata->mclk_rate = prop_val;
  319. if (pdata->mclk_rate != WCD9XXX_MCLK_CLK_9P6HZ &&
  320. pdata->mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ) {
  321. dev_err(dev, "%s: Invalid mclk_rate = %u\n", __func__,
  322. pdata->mclk_rate);
  323. goto err_parse_dt_prop;
  324. }
  325. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-dmic-sample-rate",
  326. &prop_val)))
  327. dmic_sample_rate = prop_val;
  328. pdata->dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  329. dmic_sample_rate,
  330. pdata->mclk_rate,
  331. "audio_dmic_rate");
  332. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mad-dmic-rate",
  333. &prop_val)))
  334. mad_dmic_sample_rate = prop_val;
  335. pdata->mad_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  336. mad_dmic_sample_rate,
  337. pdata->mclk_rate,
  338. "mad_dmic_rate");
  339. if (of_find_property(dev->of_node, "qcom,cdc-ecpp-dmic-rate", NULL)) {
  340. rc = wcd9xxx_read_of_property_u32(dev,
  341. "qcom,cdc-ecpp-dmic-rate",
  342. &prop_val);
  343. if (!rc)
  344. ecpp_dmic_sample_rate = prop_val;
  345. }
  346. pdata->ecpp_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  347. ecpp_dmic_sample_rate,
  348. pdata->mclk_rate,
  349. "ecpp_dmic_rate");
  350. if (!(of_property_read_u32(dev->of_node,
  351. "qcom,cdc-dmic-clk-drv-strength",
  352. &prop_val))) {
  353. dmic_clk_drive = prop_val;
  354. if (dmic_clk_drive != 2 && dmic_clk_drive != 4 &&
  355. dmic_clk_drive != 8 && dmic_clk_drive != 16)
  356. dev_err(dev, "Invalid cdc-dmic-clk-drv-strength %d\n",
  357. dmic_clk_drive);
  358. }
  359. pdata->dmic_clk_drv = dmic_clk_drive;
  360. return pdata;
  361. err_parse_dt_prop:
  362. devm_kfree(dev, pdata->regulator);
  363. pdata->regulator = NULL;
  364. pdata->num_supplies = 0;
  365. err_power_sup:
  366. devm_kfree(dev, pdata);
  367. return NULL;
  368. }
  369. EXPORT_SYMBOL(wcd9xxx_populate_dt_data);
  370. static bool is_wcd9xxx_reg_power_down(struct wcd9xxx *wcd9xxx, u16 rreg)
  371. {
  372. bool ret = false;
  373. int i;
  374. struct wcd9xxx_power_region *wcd9xxx_pwr;
  375. if (!wcd9xxx)
  376. return ret;
  377. for (i = 0; i < WCD9XXX_MAX_PWR_REGIONS; i++) {
  378. wcd9xxx_pwr = wcd9xxx->wcd9xxx_pwr[i];
  379. if (!wcd9xxx_pwr)
  380. continue;
  381. if (((wcd9xxx_pwr->pwr_collapse_reg_min == 0) &&
  382. (wcd9xxx_pwr->pwr_collapse_reg_max == 0)) ||
  383. (wcd9xxx_pwr->power_state ==
  384. WCD_REGION_POWER_COLLAPSE_REMOVE))
  385. ret = false;
  386. else if (((wcd9xxx_pwr->power_state ==
  387. WCD_REGION_POWER_DOWN) ||
  388. (wcd9xxx_pwr->power_state ==
  389. WCD_REGION_POWER_COLLAPSE_BEGIN)) &&
  390. (rreg >= wcd9xxx_pwr->pwr_collapse_reg_min) &&
  391. (rreg <= wcd9xxx_pwr->pwr_collapse_reg_max))
  392. ret = true;
  393. }
  394. return ret;
  395. }
  396. /*
  397. * wcd9xxx_page_write:
  398. * Retrieve page number from register and
  399. * write that page number to the page address.
  400. * Called under io_lock acquisition.
  401. *
  402. * @wcd9xxx: pointer to wcd9xxx
  403. * @reg: Register address from which page number is retrieved
  404. *
  405. * Returns 0 for success and negative error code for failure.
  406. */
  407. int wcd9xxx_page_write(struct wcd9xxx *wcd9xxx, unsigned short *reg)
  408. {
  409. int ret = 0;
  410. unsigned short c_reg, reg_addr;
  411. u8 pg_num, prev_pg_num;
  412. if (wcd9xxx->type != WCD9335 && wcd9xxx->type != WCD934X)
  413. return ret;
  414. c_reg = *reg;
  415. pg_num = c_reg >> 8;
  416. reg_addr = c_reg & 0xff;
  417. if (wcd9xxx->prev_pg_valid) {
  418. prev_pg_num = wcd9xxx->prev_pg;
  419. if (prev_pg_num != pg_num) {
  420. ret = wcd9xxx->write_dev(
  421. wcd9xxx, PAGE_REG_ADDR, 1,
  422. (void *) &pg_num, false);
  423. if (ret < 0)
  424. pr_err("page write error, pg_num: 0x%x\n",
  425. pg_num);
  426. else {
  427. wcd9xxx->prev_pg = pg_num;
  428. dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
  429. __func__, pg_num);
  430. }
  431. }
  432. } else {
  433. ret = wcd9xxx->write_dev(
  434. wcd9xxx, PAGE_REG_ADDR, 1, (void *) &pg_num,
  435. false);
  436. if (ret < 0)
  437. pr_err("page write error, pg_num: 0x%x\n", pg_num);
  438. else {
  439. wcd9xxx->prev_pg = pg_num;
  440. wcd9xxx->prev_pg_valid = true;
  441. dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
  442. __func__, pg_num);
  443. }
  444. }
  445. *reg = reg_addr;
  446. return ret;
  447. }
  448. EXPORT_SYMBOL(wcd9xxx_page_write);
  449. static int regmap_bus_read(void *context, const void *reg, size_t reg_size,
  450. void *val, size_t val_size)
  451. {
  452. struct device *dev = context;
  453. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  454. unsigned short c_reg, rreg;
  455. int ret, i;
  456. if (!wcd9xxx) {
  457. dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
  458. return -EINVAL;
  459. }
  460. if (!reg || !val) {
  461. dev_err(dev, "%s: reg or val is NULL\n", __func__);
  462. return -EINVAL;
  463. }
  464. if (reg_size != REG_BYTES) {
  465. dev_err(dev, "%s: register size %zd bytes, not supported\n",
  466. __func__, reg_size);
  467. return -EINVAL;
  468. }
  469. mutex_lock(&wcd9xxx->io_lock);
  470. c_reg = *(u16 *)reg;
  471. rreg = c_reg;
  472. if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
  473. ret = 0;
  474. for (i = 0; i < val_size; i++)
  475. ((u8 *)val)[i] = 0;
  476. goto err;
  477. }
  478. ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
  479. if (ret)
  480. goto err;
  481. ret = wcd9xxx->read_dev(wcd9xxx, c_reg, val_size, val, false);
  482. if (ret < 0)
  483. dev_err(dev, "%s: Codec read failed (%d), reg: 0x%x, size:%zd\n",
  484. __func__, ret, rreg, val_size);
  485. else {
  486. for (i = 0; i < val_size; i++)
  487. dev_dbg(dev, "%s: Read 0x%02x from 0x%x\n",
  488. __func__, ((u8 *)val)[i], rreg + i);
  489. }
  490. err:
  491. mutex_unlock(&wcd9xxx->io_lock);
  492. return ret;
  493. }
  494. static int regmap_bus_gather_write(void *context,
  495. const void *reg, size_t reg_size,
  496. const void *val, size_t val_size)
  497. {
  498. struct device *dev = context;
  499. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  500. unsigned short c_reg, rreg;
  501. int ret, i;
  502. if (!wcd9xxx) {
  503. dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
  504. return -EINVAL;
  505. }
  506. if (!reg || !val) {
  507. dev_err(dev, "%s: reg or val is NULL\n", __func__);
  508. return -EINVAL;
  509. }
  510. if (reg_size != REG_BYTES) {
  511. dev_err(dev, "%s: register size %zd bytes, not supported\n",
  512. __func__, reg_size);
  513. return -EINVAL;
  514. }
  515. mutex_lock(&wcd9xxx->io_lock);
  516. c_reg = *(u16 *)reg;
  517. rreg = c_reg;
  518. if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
  519. ret = 0;
  520. goto err;
  521. }
  522. ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
  523. if (ret)
  524. goto err;
  525. for (i = 0; i < val_size; i++)
  526. dev_dbg(dev, "Write %02x to 0x%x\n", ((u8 *)val)[i],
  527. rreg + i);
  528. ret = wcd9xxx->write_dev(wcd9xxx, c_reg, val_size, (void *) val,
  529. false);
  530. if (ret < 0)
  531. dev_err(dev, "%s: Codec write failed (%d), reg:0x%x, size:%zd\n",
  532. __func__, ret, rreg, val_size);
  533. err:
  534. mutex_unlock(&wcd9xxx->io_lock);
  535. return ret;
  536. }
  537. static int regmap_bus_write(void *context, const void *data, size_t count)
  538. {
  539. struct device *dev = context;
  540. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  541. if (!wcd9xxx)
  542. return -EINVAL;
  543. WARN_ON(count < REG_BYTES);
  544. if (count > (REG_BYTES + VAL_BYTES)) {
  545. if (wcd9xxx->multi_reg_write)
  546. return wcd9xxx->multi_reg_write(wcd9xxx,
  547. data, count);
  548. } else
  549. return regmap_bus_gather_write(context, data, REG_BYTES,
  550. data + REG_BYTES,
  551. count - REG_BYTES);
  552. dev_err(dev, "%s: bus multi reg write failure\n", __func__);
  553. return -EINVAL;
  554. }
  555. static struct regmap_bus regmap_bus_config = {
  556. .write = regmap_bus_write,
  557. .gather_write = regmap_bus_gather_write,
  558. .read = regmap_bus_read,
  559. .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
  560. .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
  561. };
  562. /*
  563. * wcd9xxx_regmap_init:
  564. * Initialize wcd9xxx register map
  565. *
  566. * @dev: pointer to wcd device
  567. * @config: pointer to register map config
  568. *
  569. * Returns pointer to regmap structure for success
  570. * or NULL in case of failure.
  571. */
  572. struct regmap *wcd9xxx_regmap_init(struct device *dev,
  573. const struct regmap_config *config)
  574. {
  575. return devm_regmap_init(dev, &regmap_bus_config, dev, config);
  576. }
  577. EXPORT_SYMBOL(wcd9xxx_regmap_init);
  578. /*
  579. * wcd9xxx_reset:
  580. * Reset wcd9xxx codec
  581. *
  582. * @dev: pointer to wcd device
  583. *
  584. * Returns 0 for success or negative error code in case of failure
  585. */
  586. int wcd9xxx_reset(struct device *dev)
  587. {
  588. struct wcd9xxx *wcd9xxx;
  589. int rc;
  590. int value;
  591. if (!dev)
  592. return -ENODEV;
  593. wcd9xxx = dev_get_drvdata(dev);
  594. if (!wcd9xxx)
  595. return -EINVAL;
  596. if (!wcd9xxx->wcd_rst_np) {
  597. dev_err(dev, "%s: reset gpio device node not specified\n",
  598. __func__);
  599. return -EINVAL;
  600. }
  601. value = msm_cdc_pinctrl_get_state(wcd9xxx->wcd_rst_np);
  602. if (value > 0) {
  603. wcd9xxx->avoid_cdc_rstlow = 1;
  604. return 0;
  605. }
  606. rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
  607. if (rc) {
  608. dev_err(dev, "%s: wcd sleep state request fail!\n",
  609. __func__);
  610. return rc;
  611. }
  612. /* 20ms sleep required after pulling the reset gpio to LOW */
  613. msleep(20);
  614. rc = msm_cdc_pinctrl_select_active_state(wcd9xxx->wcd_rst_np);
  615. if (rc) {
  616. dev_err(dev, "%s: wcd active state request fail!\n",
  617. __func__);
  618. return rc;
  619. }
  620. msleep(20);
  621. return rc;
  622. }
  623. EXPORT_SYMBOL(wcd9xxx_reset);
  624. /*
  625. * wcd9xxx_reset_low:
  626. * Pull the wcd9xxx codec reset_n to low
  627. *
  628. * @dev: pointer to wcd device
  629. *
  630. * Returns 0 for success or negative error code in case of failure
  631. */
  632. int wcd9xxx_reset_low(struct device *dev)
  633. {
  634. struct wcd9xxx *wcd9xxx;
  635. int rc;
  636. if (!dev)
  637. return -ENODEV;
  638. wcd9xxx = dev_get_drvdata(dev);
  639. if (!wcd9xxx)
  640. return -EINVAL;
  641. if (!wcd9xxx->wcd_rst_np) {
  642. dev_err(dev, "%s: reset gpio device node not specified\n",
  643. __func__);
  644. return -EINVAL;
  645. }
  646. if (wcd9xxx->avoid_cdc_rstlow) {
  647. wcd9xxx->avoid_cdc_rstlow = 0;
  648. dev_dbg(dev, "%s: avoid pull down of reset GPIO\n", __func__);
  649. return 0;
  650. }
  651. rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
  652. if (rc)
  653. dev_err(dev, "%s: wcd sleep state request fail!\n",
  654. __func__);
  655. return rc;
  656. }
  657. EXPORT_SYMBOL(wcd9xxx_reset_low);
  658. /*
  659. * wcd9xxx_bringup:
  660. * Toggle reset analog and digital cores of wcd9xxx codec
  661. *
  662. * @dev: pointer to wcd device
  663. *
  664. * Returns 0 for success or negative error code in case of failure
  665. */
  666. int wcd9xxx_bringup(struct device *dev)
  667. {
  668. struct wcd9xxx *wcd9xxx;
  669. int rc;
  670. codec_bringup_fn cdc_bup_fn;
  671. if (!dev)
  672. return -ENODEV;
  673. wcd9xxx = dev_get_drvdata(dev);
  674. if (!wcd9xxx)
  675. return -EINVAL;
  676. cdc_bup_fn = wcd9xxx_bringup_fn(wcd9xxx->type);
  677. if (!cdc_bup_fn) {
  678. dev_err(dev, "%s: Codec bringup fn NULL!\n",
  679. __func__);
  680. return -EINVAL;
  681. }
  682. rc = cdc_bup_fn(wcd9xxx);
  683. if (rc)
  684. dev_err(dev, "%s: Codec bringup error, rc: %d\n",
  685. __func__, rc);
  686. return rc;
  687. }
  688. EXPORT_SYMBOL(wcd9xxx_bringup);
  689. /*
  690. * wcd9xxx_bringup:
  691. * Set analog and digital cores of wcd9xxx codec in reset state
  692. *
  693. * @dev: pointer to wcd device
  694. *
  695. * Returns 0 for success or negative error code in case of failure
  696. */
  697. int wcd9xxx_bringdown(struct device *dev)
  698. {
  699. struct wcd9xxx *wcd9xxx;
  700. int rc;
  701. codec_bringdown_fn cdc_bdown_fn;
  702. if (!dev)
  703. return -ENODEV;
  704. wcd9xxx = dev_get_drvdata(dev);
  705. if (!wcd9xxx)
  706. return -EINVAL;
  707. cdc_bdown_fn = wcd9xxx_bringdown_fn(wcd9xxx->type);
  708. if (!cdc_bdown_fn) {
  709. dev_err(dev, "%s: Codec bring down fn NULL!\n",
  710. __func__);
  711. return -EINVAL;
  712. }
  713. rc = cdc_bdown_fn(wcd9xxx);
  714. if (rc)
  715. dev_err(dev, "%s: Codec bring down error, rc: %d\n",
  716. __func__, rc);
  717. return rc;
  718. }
  719. EXPORT_SYMBOL(wcd9xxx_bringdown);
  720. /*
  721. * wcd9xxx_get_codec_info:
  722. * Fill codec specific information like interrupts, version
  723. *
  724. * @dev: pointer to wcd device
  725. *
  726. * Returns 0 for success or negative error code in case of failure
  727. */
  728. int wcd9xxx_get_codec_info(struct device *dev)
  729. {
  730. struct wcd9xxx *wcd9xxx;
  731. int rc;
  732. codec_type_fn cdc_type_fn;
  733. struct wcd9xxx_codec_type *cinfo;
  734. if (!dev)
  735. return -ENODEV;
  736. wcd9xxx = dev_get_drvdata(dev);
  737. if (!wcd9xxx)
  738. return -EINVAL;
  739. cdc_type_fn = wcd9xxx_get_codec_info_fn(wcd9xxx->type);
  740. if (!cdc_type_fn) {
  741. dev_err(dev, "%s: Codec fill type fn NULL!\n",
  742. __func__);
  743. return -EINVAL;
  744. }
  745. cinfo = wcd9xxx->codec_type;
  746. if (!cinfo)
  747. return -EINVAL;
  748. rc = cdc_type_fn(wcd9xxx, cinfo);
  749. if (rc) {
  750. dev_err(dev, "%s: Codec type fill failed, rc:%d\n",
  751. __func__, rc);
  752. return rc;
  753. }
  754. switch (wcd9xxx->type) {
  755. case WCD934X:
  756. cinfo->dev = tavil_devs;
  757. cinfo->size = ARRAY_SIZE(tavil_devs);
  758. break;
  759. case WCD9335:
  760. cinfo->dev = tasha_devs;
  761. cinfo->size = ARRAY_SIZE(tasha_devs);
  762. break;
  763. case WCD9330:
  764. cinfo->dev = tomtom_devs;
  765. cinfo->size = ARRAY_SIZE(tomtom_devs);
  766. break;
  767. default:
  768. cinfo->dev = NULL;
  769. cinfo->size = 0;
  770. break;
  771. }
  772. return rc;
  773. }
  774. EXPORT_SYMBOL(wcd9xxx_get_codec_info);
  775. /*
  776. * wcd9xxx_core_irq_init:
  777. * Initialize wcd9xxx codec irq instance
  778. *
  779. * @wcd9xxx_core_res: pointer to wcd core resource
  780. *
  781. * Returns 0 for success or negative error code in case of failure
  782. */
  783. int wcd9xxx_core_irq_init(
  784. struct wcd9xxx_core_resource *wcd9xxx_core_res)
  785. {
  786. int ret = 0;
  787. if (!wcd9xxx_core_res)
  788. return -EINVAL;
  789. if (wcd9xxx_core_res->irq != 1) {
  790. ret = wcd9xxx_irq_init(wcd9xxx_core_res);
  791. if (ret)
  792. pr_err("IRQ initialization failed\n");
  793. }
  794. return ret;
  795. }
  796. EXPORT_SYMBOL(wcd9xxx_core_irq_init);
  797. /*
  798. * wcd9xxx_assign_irq:
  799. * Assign irq and irq_base to wcd9xxx core resource
  800. *
  801. * @wcd9xxx_core_res: pointer to wcd core resource
  802. * @irq: irq number
  803. * @irq_base: base irq number
  804. *
  805. * Returns 0 for success or negative error code in case of failure
  806. */
  807. int wcd9xxx_assign_irq(
  808. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  809. unsigned int irq,
  810. unsigned int irq_base)
  811. {
  812. if (!wcd9xxx_core_res)
  813. return -EINVAL;
  814. wcd9xxx_core_res->irq = irq;
  815. wcd9xxx_core_res->irq_base = irq_base;
  816. return 0;
  817. }
  818. EXPORT_SYMBOL(wcd9xxx_assign_irq);
  819. /*
  820. * wcd9xxx_core_res_init:
  821. * Initialize wcd core resource instance
  822. *
  823. * @wcd9xxx_core_res: pointer to wcd core resource
  824. * @num_irqs: number of irqs for wcd9xxx core
  825. * @num_irq_regs: number of irq registers
  826. * @wcd_regmap: pointer to the wcd register map
  827. *
  828. * Returns 0 for success or negative error code in case of failure
  829. */
  830. int wcd9xxx_core_res_init(
  831. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  832. int num_irqs, int num_irq_regs, struct regmap *wcd_regmap)
  833. {
  834. if (!wcd9xxx_core_res || !wcd_regmap)
  835. return -EINVAL;
  836. mutex_init(&wcd9xxx_core_res->pm_lock);
  837. wcd9xxx_core_res->wlock_holders = 0;
  838. wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
  839. init_waitqueue_head(&wcd9xxx_core_res->pm_wq);
  840. pm_qos_add_request(&wcd9xxx_core_res->pm_qos_req,
  841. PM_QOS_CPU_DMA_LATENCY,
  842. PM_QOS_DEFAULT_VALUE);
  843. wcd9xxx_core_res->num_irqs = num_irqs;
  844. wcd9xxx_core_res->num_irq_regs = num_irq_regs;
  845. wcd9xxx_core_res->wcd_core_regmap = wcd_regmap;
  846. pr_debug("%s: num_irqs = %d, num_irq_regs = %d\n",
  847. __func__, wcd9xxx_core_res->num_irqs,
  848. wcd9xxx_core_res->num_irq_regs);
  849. return 0;
  850. }
  851. EXPORT_SYMBOL(wcd9xxx_core_res_init);
  852. /*
  853. * wcd9xxx_core_res_deinit:
  854. * Deinit wcd core resource instance
  855. *
  856. * @wcd9xxx_core_res: pointer to wcd core resource
  857. */
  858. void wcd9xxx_core_res_deinit(struct wcd9xxx_core_resource *wcd9xxx_core_res)
  859. {
  860. if (!wcd9xxx_core_res)
  861. return;
  862. pm_qos_remove_request(&wcd9xxx_core_res->pm_qos_req);
  863. mutex_destroy(&wcd9xxx_core_res->pm_lock);
  864. }
  865. EXPORT_SYMBOL(wcd9xxx_core_res_deinit);
  866. /*
  867. * wcd9xxx_pm_cmpxchg:
  868. * Check old state and exchange with pm new state
  869. * if old state matches with current state
  870. *
  871. * @wcd9xxx_core_res: pointer to wcd core resource
  872. * @o: pm old state
  873. * @n: pm new state
  874. *
  875. * Returns old state
  876. */
  877. enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(
  878. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  879. enum wcd9xxx_pm_state o,
  880. enum wcd9xxx_pm_state n)
  881. {
  882. enum wcd9xxx_pm_state old;
  883. if (!wcd9xxx_core_res)
  884. return o;
  885. mutex_lock(&wcd9xxx_core_res->pm_lock);
  886. old = wcd9xxx_core_res->pm_state;
  887. if (old == o)
  888. wcd9xxx_core_res->pm_state = n;
  889. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  890. return old;
  891. }
  892. EXPORT_SYMBOL(wcd9xxx_pm_cmpxchg);
  893. /*
  894. * wcd9xxx_core_res_suspend:
  895. * Suspend callback function for wcd9xxx core
  896. *
  897. * @wcd9xxx_core_res: pointer to wcd core resource
  898. * @pm_message_t: pm message
  899. *
  900. * Returns 0 for success or negative error code for failure/busy
  901. */
  902. int wcd9xxx_core_res_suspend(
  903. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  904. pm_message_t pmesg)
  905. {
  906. int ret = 0;
  907. pr_debug("%s: enter\n", __func__);
  908. /*
  909. * pm_qos_update_request() can be called after this suspend chain call
  910. * started. thus suspend can be called while lock is being held
  911. */
  912. mutex_lock(&wcd9xxx_core_res->pm_lock);
  913. if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_SLEEPABLE) {
  914. pr_debug("%s: suspending system, state %d, wlock %d\n",
  915. __func__, wcd9xxx_core_res->pm_state,
  916. wcd9xxx_core_res->wlock_holders);
  917. wcd9xxx_core_res->pm_state = WCD9XXX_PM_ASLEEP;
  918. } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_AWAKE) {
  919. /*
  920. * unlock to wait for pm_state == WCD9XXX_PM_SLEEPABLE
  921. * then set to WCD9XXX_PM_ASLEEP
  922. */
  923. pr_debug("%s: waiting to suspend system, state %d, wlock %d\n",
  924. __func__, wcd9xxx_core_res->pm_state,
  925. wcd9xxx_core_res->wlock_holders);
  926. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  927. if (!(wait_event_timeout(wcd9xxx_core_res->pm_wq,
  928. wcd9xxx_pm_cmpxchg(wcd9xxx_core_res,
  929. WCD9XXX_PM_SLEEPABLE,
  930. WCD9XXX_PM_ASLEEP) ==
  931. WCD9XXX_PM_SLEEPABLE,
  932. HZ))) {
  933. pr_debug("%s: suspend failed state %d, wlock %d\n",
  934. __func__, wcd9xxx_core_res->pm_state,
  935. wcd9xxx_core_res->wlock_holders);
  936. ret = -EBUSY;
  937. } else {
  938. pr_debug("%s: done, state %d, wlock %d\n", __func__,
  939. wcd9xxx_core_res->pm_state,
  940. wcd9xxx_core_res->wlock_holders);
  941. }
  942. mutex_lock(&wcd9xxx_core_res->pm_lock);
  943. } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
  944. pr_warn("%s: system is already suspended, state %d, wlock %dn",
  945. __func__, wcd9xxx_core_res->pm_state,
  946. wcd9xxx_core_res->wlock_holders);
  947. }
  948. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  949. return ret;
  950. }
  951. EXPORT_SYMBOL(wcd9xxx_core_res_suspend);
  952. /*
  953. * wcd9xxx_core_res_resume:
  954. * Resume callback function for wcd9xxx core
  955. *
  956. * @wcd9xxx_core_res: pointer to wcd core resource
  957. *
  958. * Returns 0 for success or negative error code for failure/busy
  959. */
  960. int wcd9xxx_core_res_resume(
  961. struct wcd9xxx_core_resource *wcd9xxx_core_res)
  962. {
  963. int ret = 0;
  964. pr_debug("%s: enter\n", __func__);
  965. mutex_lock(&wcd9xxx_core_res->pm_lock);
  966. if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
  967. pr_debug("%s: resuming system, state %d, wlock %d\n", __func__,
  968. wcd9xxx_core_res->pm_state,
  969. wcd9xxx_core_res->wlock_holders);
  970. wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
  971. } else {
  972. pr_warn("%s: system is already awake, state %d wlock %d\n",
  973. __func__, wcd9xxx_core_res->pm_state,
  974. wcd9xxx_core_res->wlock_holders);
  975. }
  976. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  977. wake_up_all(&wcd9xxx_core_res->pm_wq);
  978. return ret;
  979. }
  980. EXPORT_SYMBOL(wcd9xxx_core_res_resume);
  981. /*
  982. * wcd9xxx_get_intf_type:
  983. * Get interface type of wcd9xxx core
  984. *
  985. * Returns interface type
  986. */
  987. enum wcd9xxx_intf_status wcd9xxx_get_intf_type(void)
  988. {
  989. return wcd9xxx_intf;
  990. }
  991. EXPORT_SYMBOL(wcd9xxx_get_intf_type);
  992. /*
  993. * wcd9xxx_set_intf_type:
  994. * Set interface type of wcd9xxx core
  995. *
  996. */
  997. void wcd9xxx_set_intf_type(enum wcd9xxx_intf_status intf_status)
  998. {
  999. wcd9xxx_intf = intf_status;
  1000. }
  1001. EXPORT_SYMBOL(wcd9xxx_set_intf_type);
  1002. /*
  1003. * wcd9xxx_set_power_state: set power state for the region
  1004. * @wcd9xxx: handle to wcd core
  1005. * @state: power state to be set
  1006. * @region: region index
  1007. *
  1008. * Returns error code in case of failure or 0 for success
  1009. */
  1010. int wcd9xxx_set_power_state(struct wcd9xxx *wcd9xxx,
  1011. enum codec_power_states state,
  1012. enum wcd_power_regions region)
  1013. {
  1014. if (!wcd9xxx) {
  1015. pr_err("%s: wcd9xxx is NULL\n", __func__);
  1016. return -EINVAL;
  1017. }
  1018. if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
  1019. dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
  1020. __func__, region);
  1021. return -EINVAL;
  1022. }
  1023. if (!wcd9xxx->wcd9xxx_pwr[region]) {
  1024. dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
  1025. __func__, region);
  1026. return -EINVAL;
  1027. }
  1028. mutex_lock(&wcd9xxx->io_lock);
  1029. wcd9xxx->wcd9xxx_pwr[region]->power_state = state;
  1030. mutex_unlock(&wcd9xxx->io_lock);
  1031. return 0;
  1032. }
  1033. EXPORT_SYMBOL(wcd9xxx_set_power_state);
  1034. /*
  1035. * wcd9xxx_get_current_power_state: Get power state of the region
  1036. * @wcd9xxx: handle to wcd core
  1037. * @region: region index
  1038. *
  1039. * Returns current power state of the region or error code for failure
  1040. */
  1041. int wcd9xxx_get_current_power_state(struct wcd9xxx *wcd9xxx,
  1042. enum wcd_power_regions region)
  1043. {
  1044. int state;
  1045. if (!wcd9xxx) {
  1046. pr_err("%s: wcd9xxx is NULL\n", __func__);
  1047. return -EINVAL;
  1048. }
  1049. if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
  1050. dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
  1051. __func__, region);
  1052. return -EINVAL;
  1053. }
  1054. if (!wcd9xxx->wcd9xxx_pwr[region]) {
  1055. dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
  1056. __func__, region);
  1057. return -EINVAL;
  1058. }
  1059. mutex_lock(&wcd9xxx->io_lock);
  1060. state = wcd9xxx->wcd9xxx_pwr[region]->power_state;
  1061. mutex_unlock(&wcd9xxx->io_lock);
  1062. return state;
  1063. }
  1064. EXPORT_SYMBOL(wcd9xxx_get_current_power_state);