dp_main.c 266 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include <cdp_txrx_handle.h>
  36. #include <wlan_cfg.h>
  37. #include "cdp_txrx_cmn_struct.h"
  38. #include "cdp_txrx_stats_struct.h"
  39. #include "cdp_txrx_cmn_reg.h"
  40. #include <qdf_util.h>
  41. #include "dp_peer.h"
  42. #include "dp_rx_mon.h"
  43. #include "htt_stats.h"
  44. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  45. #include "cfg_ucfg_api.h"
  46. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  47. #include "cdp_txrx_flow_ctrl_v2.h"
  48. #else
  49. static inline void
  50. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  51. {
  52. return;
  53. }
  54. #endif
  55. #include "dp_ipa.h"
  56. #include "dp_cal_client_api.h"
  57. #ifdef CONFIG_MCL
  58. extern int con_mode_monitor;
  59. #ifndef REMOVE_PKT_LOG
  60. #include <pktlog_ac_api.h>
  61. #include <pktlog_ac.h>
  62. #endif
  63. #endif
  64. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle);
  65. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force);
  66. static struct dp_soc *
  67. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  68. struct ol_if_ops *ol_ops, uint16_t device_id);
  69. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  70. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  71. uint8_t *peer_mac_addr,
  72. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  73. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  74. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  75. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  76. #define DP_INTR_POLL_TIMER_MS 10
  77. /* Generic AST entry aging timer value */
  78. #define DP_AST_AGING_TIMER_DEFAULT_MS 1000
  79. /* WDS AST entry aging timer value */
  80. #define DP_WDS_AST_AGING_TIMER_DEFAULT_MS 120000
  81. #define DP_WDS_AST_AGING_TIMER_CNT \
  82. ((DP_WDS_AST_AGING_TIMER_DEFAULT_MS / DP_AST_AGING_TIMER_DEFAULT_MS) - 1)
  83. #define DP_MCS_LENGTH (6*MAX_MCS)
  84. #define DP_NSS_LENGTH (6*SS_COUNT)
  85. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  86. #define DP_MAX_INT_CONTEXTS_STRING_LENGTH (6 * WLAN_CFG_INT_NUM_CONTEXTS)
  87. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  88. #define DP_MAX_MCS_STRING_LEN 30
  89. #define DP_CURR_FW_STATS_AVAIL 19
  90. #define DP_HTT_DBG_EXT_STATS_MAX 256
  91. #define DP_MAX_SLEEP_TIME 100
  92. #ifdef IPA_OFFLOAD
  93. /* Exclude IPA rings from the interrupt context */
  94. #define TX_RING_MASK_VAL 0xb
  95. #define RX_RING_MASK_VAL 0x7
  96. #else
  97. #define TX_RING_MASK_VAL 0xF
  98. #define RX_RING_MASK_VAL 0xF
  99. #endif
  100. #define STR_MAXLEN 64
  101. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  102. /* PPDU stats mask sent to FW to enable enhanced stats */
  103. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  104. /* PPDU stats mask sent to FW to support debug sniffer feature */
  105. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  106. /* PPDU stats mask sent to FW to support BPR feature*/
  107. #define DP_PPDU_STATS_CFG_BPR 0x2000
  108. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  109. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  110. DP_PPDU_STATS_CFG_ENH_STATS)
  111. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  112. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  113. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  114. #define RNG_ERR "SRNG setup failed for"
  115. /**
  116. * default_dscp_tid_map - Default DSCP-TID mapping
  117. *
  118. * DSCP TID
  119. * 000000 0
  120. * 001000 1
  121. * 010000 2
  122. * 011000 3
  123. * 100000 4
  124. * 101000 5
  125. * 110000 6
  126. * 111000 7
  127. */
  128. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  129. 0, 0, 0, 0, 0, 0, 0, 0,
  130. 1, 1, 1, 1, 1, 1, 1, 1,
  131. 2, 2, 2, 2, 2, 2, 2, 2,
  132. 3, 3, 3, 3, 3, 3, 3, 3,
  133. 4, 4, 4, 4, 4, 4, 4, 4,
  134. 5, 5, 5, 5, 5, 5, 5, 5,
  135. 6, 6, 6, 6, 6, 6, 6, 6,
  136. 7, 7, 7, 7, 7, 7, 7, 7,
  137. };
  138. /*
  139. * struct dp_rate_debug
  140. *
  141. * @mcs_type: print string for a given mcs
  142. * @valid: valid mcs rate?
  143. */
  144. struct dp_rate_debug {
  145. char mcs_type[DP_MAX_MCS_STRING_LEN];
  146. uint8_t valid;
  147. };
  148. #define MCS_VALID 1
  149. #define MCS_INVALID 0
  150. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  151. {
  152. {"OFDM 48 Mbps", MCS_VALID},
  153. {"OFDM 24 Mbps", MCS_VALID},
  154. {"OFDM 12 Mbps", MCS_VALID},
  155. {"OFDM 6 Mbps ", MCS_VALID},
  156. {"OFDM 54 Mbps", MCS_VALID},
  157. {"OFDM 36 Mbps", MCS_VALID},
  158. {"OFDM 18 Mbps", MCS_VALID},
  159. {"OFDM 9 Mbps ", MCS_VALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_INVALID},
  164. {"INVALID ", MCS_VALID},
  165. },
  166. {
  167. {"CCK 11 Mbps Long ", MCS_VALID},
  168. {"CCK 5.5 Mbps Long ", MCS_VALID},
  169. {"CCK 2 Mbps Long ", MCS_VALID},
  170. {"CCK 1 Mbps Long ", MCS_VALID},
  171. {"CCK 11 Mbps Short ", MCS_VALID},
  172. {"CCK 5.5 Mbps Short", MCS_VALID},
  173. {"CCK 2 Mbps Short ", MCS_VALID},
  174. {"INVALID ", MCS_INVALID},
  175. {"INVALID ", MCS_INVALID},
  176. {"INVALID ", MCS_INVALID},
  177. {"INVALID ", MCS_INVALID},
  178. {"INVALID ", MCS_INVALID},
  179. {"INVALID ", MCS_VALID},
  180. },
  181. {
  182. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  183. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  184. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  185. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  186. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  187. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  188. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  189. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  190. {"INVALID ", MCS_INVALID},
  191. {"INVALID ", MCS_INVALID},
  192. {"INVALID ", MCS_INVALID},
  193. {"INVALID ", MCS_INVALID},
  194. {"INVALID ", MCS_VALID},
  195. },
  196. {
  197. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  198. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  199. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  200. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  201. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  202. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  203. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  204. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  205. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  206. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  207. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  208. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  209. {"INVALID ", MCS_VALID},
  210. },
  211. {
  212. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  213. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  214. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  215. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  216. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  217. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  218. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  219. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  220. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  221. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  222. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  223. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  224. {"INVALID ", MCS_VALID},
  225. }
  226. };
  227. /**
  228. * dp_cpu_ring_map_type - dp tx cpu ring map
  229. * @DP_NSS_DEFAULT_MAP: Default mode with no NSS offloaded
  230. * @DP_NSS_FIRST_RADIO_OFFLOADED_MAP: Only First Radio is offloaded
  231. * @DP_NSS_SECOND_RADIO_OFFLOADED_MAP: Only second radio is offloaded
  232. * @DP_NSS_DBDC_OFFLOADED_MAP: Both radios are offloaded
  233. * @DP_NSS_DBTC_OFFLOADED_MAP: All three radios are offloaded
  234. * @DP_NSS_CPU_RING_MAP_MAX: Max cpu ring map val
  235. */
  236. enum dp_cpu_ring_map_types {
  237. DP_NSS_DEFAULT_MAP,
  238. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  239. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  240. DP_NSS_DBDC_OFFLOADED_MAP,
  241. DP_NSS_DBTC_OFFLOADED_MAP,
  242. DP_NSS_CPU_RING_MAP_MAX
  243. };
  244. /**
  245. * @brief Cpu to tx ring map
  246. */
  247. #ifdef CONFIG_WIN
  248. static uint8_t
  249. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  250. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  251. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  252. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  253. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  254. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  255. };
  256. #else
  257. static uint8_t
  258. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  259. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  260. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  261. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  262. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  263. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  264. };
  265. #endif
  266. /**
  267. * @brief Select the type of statistics
  268. */
  269. enum dp_stats_type {
  270. STATS_FW = 0,
  271. STATS_HOST = 1,
  272. STATS_TYPE_MAX = 2,
  273. };
  274. /**
  275. * @brief General Firmware statistics options
  276. *
  277. */
  278. enum dp_fw_stats {
  279. TXRX_FW_STATS_INVALID = -1,
  280. };
  281. /**
  282. * dp_stats_mapping_table - Firmware and Host statistics
  283. * currently supported
  284. */
  285. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  286. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  287. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  288. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  289. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  290. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  291. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  292. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  293. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  294. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  295. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  296. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  297. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  298. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  299. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  300. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  301. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  302. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  303. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  304. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  305. /* Last ENUM for HTT FW STATS */
  306. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  307. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  308. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  309. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  310. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  311. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  312. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  313. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  314. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  315. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  316. {TXRX_FW_STATS_INVALID, TXRX_SOC_CFG_PARAMS},
  317. {TXRX_FW_STATS_INVALID, TXRX_PDEV_CFG_PARAMS},
  318. };
  319. /* MCL specific functions */
  320. #ifdef CONFIG_MCL
  321. /**
  322. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  323. * @soc: pointer to dp_soc handle
  324. * @intr_ctx_num: interrupt context number for which mon mask is needed
  325. *
  326. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  327. * This function is returning 0, since in interrupt mode(softirq based RX),
  328. * we donot want to process monitor mode rings in a softirq.
  329. *
  330. * So, in case packet log is enabled for SAP/STA/P2P modes,
  331. * regular interrupt processing will not process monitor mode rings. It would be
  332. * done in a separate timer context.
  333. *
  334. * Return: 0
  335. */
  336. static inline
  337. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  338. {
  339. return 0;
  340. }
  341. /*
  342. * dp_service_mon_rings()- timer to reap monitor rings
  343. * reqd as we are not getting ppdu end interrupts
  344. * @arg: SoC Handle
  345. *
  346. * Return:
  347. *
  348. */
  349. static void dp_service_mon_rings(void *arg)
  350. {
  351. struct dp_soc *soc = (struct dp_soc *)arg;
  352. int ring = 0, work_done, mac_id;
  353. struct dp_pdev *pdev = NULL;
  354. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  355. pdev = soc->pdev_list[ring];
  356. if (!pdev)
  357. continue;
  358. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  359. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  360. pdev->pdev_id);
  361. work_done = dp_mon_process(soc, mac_for_pdev,
  362. QCA_NAPI_BUDGET);
  363. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  364. FL("Reaped %d descs from Monitor rings"),
  365. work_done);
  366. }
  367. }
  368. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  369. }
  370. #ifndef REMOVE_PKT_LOG
  371. /**
  372. * dp_pkt_log_init() - API to initialize packet log
  373. * @ppdev: physical device handle
  374. * @scn: HIF context
  375. *
  376. * Return: none
  377. */
  378. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  379. {
  380. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  381. if (handle->pkt_log_init) {
  382. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  383. "%s: Packet log not initialized", __func__);
  384. return;
  385. }
  386. pktlog_sethandle(&handle->pl_dev, scn);
  387. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  388. if (pktlogmod_init(scn)) {
  389. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  390. "%s: pktlogmod_init failed", __func__);
  391. handle->pkt_log_init = false;
  392. } else {
  393. handle->pkt_log_init = true;
  394. }
  395. }
  396. /**
  397. * dp_pkt_log_con_service() - connect packet log service
  398. * @ppdev: physical device handle
  399. * @scn: device context
  400. *
  401. * Return: none
  402. */
  403. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  404. {
  405. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  406. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  407. pktlog_htc_attach();
  408. }
  409. /**
  410. * dp_pktlogmod_exit() - API to cleanup pktlog info
  411. * @handle: Pdev handle
  412. *
  413. * Return: none
  414. */
  415. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  416. {
  417. void *scn = (void *)handle->soc->hif_handle;
  418. if (!scn) {
  419. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  420. "%s: Invalid hif(scn) handle", __func__);
  421. return;
  422. }
  423. pktlogmod_exit(scn);
  424. handle->pkt_log_init = false;
  425. }
  426. #endif
  427. #else
  428. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  429. /**
  430. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  431. * @soc: pointer to dp_soc handle
  432. * @intr_ctx_num: interrupt context number for which mon mask is needed
  433. *
  434. * Return: mon mask value
  435. */
  436. static inline
  437. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  438. {
  439. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  440. }
  441. #endif
  442. /**
  443. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  444. * @cdp_opaque_vdev: pointer to cdp_vdev
  445. *
  446. * Return: pointer to dp_vdev
  447. */
  448. static
  449. struct dp_vdev *dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  450. {
  451. return (struct dp_vdev *)cdp_opaque_vdev;
  452. }
  453. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  454. struct cdp_peer *peer_hdl,
  455. uint8_t *mac_addr,
  456. enum cdp_txrx_ast_entry_type type,
  457. uint32_t flags)
  458. {
  459. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  460. (struct dp_peer *)peer_hdl,
  461. mac_addr,
  462. type,
  463. flags);
  464. }
  465. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  466. void *ast_entry_hdl)
  467. {
  468. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  469. qdf_spin_lock_bh(&soc->ast_lock);
  470. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  471. (struct dp_ast_entry *)ast_entry_hdl);
  472. qdf_spin_unlock_bh(&soc->ast_lock);
  473. }
  474. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  475. struct cdp_peer *peer_hdl,
  476. uint8_t *wds_macaddr,
  477. uint32_t flags)
  478. {
  479. int status = -1;
  480. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  481. struct dp_ast_entry *ast_entry = NULL;
  482. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  483. qdf_spin_lock_bh(&soc->ast_lock);
  484. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  485. peer->vdev->pdev->pdev_id);
  486. if (ast_entry) {
  487. status = dp_peer_update_ast(soc,
  488. peer,
  489. ast_entry, flags);
  490. }
  491. qdf_spin_unlock_bh(&soc->ast_lock);
  492. return status;
  493. }
  494. /*
  495. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  496. * @soc_handle: Datapath SOC handle
  497. * @wds_macaddr: WDS entry MAC Address
  498. * Return: None
  499. */
  500. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  501. uint8_t *wds_macaddr, void *vdev_handle)
  502. {
  503. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  504. struct dp_ast_entry *ast_entry = NULL;
  505. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  506. qdf_spin_lock_bh(&soc->ast_lock);
  507. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  508. vdev->pdev->pdev_id);
  509. if (ast_entry) {
  510. if ((ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) &&
  511. (ast_entry->type != CDP_TXRX_AST_TYPE_SELF) &&
  512. (ast_entry->type != CDP_TXRX_AST_TYPE_STA_BSS)) {
  513. ast_entry->is_active = TRUE;
  514. }
  515. }
  516. qdf_spin_unlock_bh(&soc->ast_lock);
  517. }
  518. /*
  519. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  520. * @soc: Datapath SOC handle
  521. *
  522. * Return: None
  523. */
  524. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  525. void *vdev_hdl)
  526. {
  527. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  528. struct dp_pdev *pdev;
  529. struct dp_vdev *vdev;
  530. struct dp_peer *peer;
  531. struct dp_ast_entry *ase, *temp_ase;
  532. int i;
  533. qdf_spin_lock_bh(&soc->ast_lock);
  534. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  535. pdev = soc->pdev_list[i];
  536. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  537. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  538. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  539. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  540. if ((ase->type ==
  541. CDP_TXRX_AST_TYPE_STATIC) ||
  542. (ase->type ==
  543. CDP_TXRX_AST_TYPE_SELF) ||
  544. (ase->type ==
  545. CDP_TXRX_AST_TYPE_STA_BSS))
  546. continue;
  547. ase->is_active = TRUE;
  548. }
  549. }
  550. }
  551. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  552. }
  553. qdf_spin_unlock_bh(&soc->ast_lock);
  554. }
  555. /*
  556. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  557. * @soc: Datapath SOC handle
  558. *
  559. * Return: None
  560. */
  561. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  562. {
  563. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  564. struct dp_pdev *pdev;
  565. struct dp_vdev *vdev;
  566. struct dp_peer *peer;
  567. struct dp_ast_entry *ase, *temp_ase;
  568. int i;
  569. qdf_spin_lock_bh(&soc->ast_lock);
  570. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  571. pdev = soc->pdev_list[i];
  572. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  573. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  574. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  575. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  576. if ((ase->type ==
  577. CDP_TXRX_AST_TYPE_STATIC) ||
  578. (ase->type ==
  579. CDP_TXRX_AST_TYPE_SELF) ||
  580. (ase->type ==
  581. CDP_TXRX_AST_TYPE_STA_BSS))
  582. continue;
  583. dp_peer_del_ast(soc, ase);
  584. }
  585. }
  586. }
  587. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  588. }
  589. qdf_spin_unlock_bh(&soc->ast_lock);
  590. }
  591. static void *dp_peer_ast_hash_find_soc_wifi3(struct cdp_soc_t *soc_hdl,
  592. uint8_t *ast_mac_addr)
  593. {
  594. struct dp_ast_entry *ast_entry;
  595. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  596. qdf_spin_lock_bh(&soc->ast_lock);
  597. ast_entry = dp_peer_ast_hash_find_soc(soc, ast_mac_addr);
  598. qdf_spin_unlock_bh(&soc->ast_lock);
  599. return (void *)ast_entry;
  600. }
  601. static void *dp_peer_ast_hash_find_by_pdevid_wifi3(struct cdp_soc_t *soc_hdl,
  602. uint8_t *ast_mac_addr,
  603. uint8_t pdev_id)
  604. {
  605. struct dp_ast_entry *ast_entry;
  606. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  607. qdf_spin_lock_bh(&soc->ast_lock);
  608. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, ast_mac_addr, pdev_id);
  609. qdf_spin_unlock_bh(&soc->ast_lock);
  610. return (void *)ast_entry;
  611. }
  612. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  613. void *ast_entry_hdl)
  614. {
  615. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  616. (struct dp_ast_entry *)ast_entry_hdl);
  617. }
  618. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  619. void *ast_entry_hdl)
  620. {
  621. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  622. (struct dp_ast_entry *)ast_entry_hdl);
  623. }
  624. static void dp_peer_ast_set_type_wifi3(
  625. struct cdp_soc_t *soc_hdl,
  626. void *ast_entry_hdl,
  627. enum cdp_txrx_ast_entry_type type)
  628. {
  629. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  630. (struct dp_ast_entry *)ast_entry_hdl,
  631. type);
  632. }
  633. static enum cdp_txrx_ast_entry_type dp_peer_ast_get_type_wifi3(
  634. struct cdp_soc_t *soc_hdl,
  635. void *ast_entry_hdl)
  636. {
  637. return ((struct dp_ast_entry *)ast_entry_hdl)->type;
  638. }
  639. #if defined(FEATURE_AST) && defined(AST_HKV1_WORKAROUND)
  640. void dp_peer_ast_set_cp_ctx_wifi3(struct cdp_soc_t *soc_handle,
  641. void *ast_entry,
  642. void *cp_ctx)
  643. {
  644. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  645. qdf_spin_lock_bh(&soc->ast_lock);
  646. dp_peer_ast_set_cp_ctx(soc,
  647. (struct dp_ast_entry *)ast_entry, cp_ctx);
  648. qdf_spin_unlock_bh(&soc->ast_lock);
  649. }
  650. void *dp_peer_ast_get_cp_ctx_wifi3(struct cdp_soc_t *soc_handle,
  651. void *ast_entry)
  652. {
  653. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  654. void *cp_ctx = NULL;
  655. qdf_spin_lock_bh(&soc->ast_lock);
  656. cp_ctx = dp_peer_ast_get_cp_ctx(soc,
  657. (struct dp_ast_entry *)ast_entry);
  658. qdf_spin_unlock_bh(&soc->ast_lock);
  659. return cp_ctx;
  660. }
  661. bool dp_peer_ast_get_wmi_sent_wifi3(struct cdp_soc_t *soc_handle,
  662. void *ast_entry)
  663. {
  664. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  665. bool wmi_sent = false;
  666. qdf_spin_lock_bh(&soc->ast_lock);
  667. wmi_sent = dp_peer_ast_get_del_cmd_sent(soc,
  668. (struct dp_ast_entry *)
  669. ast_entry);
  670. qdf_spin_unlock_bh(&soc->ast_lock);
  671. return wmi_sent;
  672. }
  673. void dp_peer_ast_free_entry_wifi3(struct cdp_soc_t *soc_handle,
  674. void *ast_entry)
  675. {
  676. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  677. qdf_spin_lock_bh(&soc->ast_lock);
  678. dp_peer_ast_free_entry(soc, (struct dp_ast_entry *)ast_entry);
  679. qdf_spin_unlock_bh(&soc->ast_lock);
  680. }
  681. #endif
  682. static struct cdp_peer *dp_peer_ast_get_peer_wifi3(
  683. struct cdp_soc_t *soc_hdl,
  684. void *ast_entry_hdl)
  685. {
  686. return (struct cdp_peer *)((struct dp_ast_entry *)ast_entry_hdl)->peer;
  687. }
  688. static uint32_t dp_peer_ast_get_nexhop_peer_id_wifi3(
  689. struct cdp_soc_t *soc_hdl,
  690. void *ast_entry_hdl)
  691. {
  692. return ((struct dp_ast_entry *)ast_entry_hdl)->peer->peer_ids[0];
  693. }
  694. /**
  695. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  696. * @ring_num: ring num of the ring being queried
  697. * @grp_mask: the grp_mask array for the ring type in question.
  698. *
  699. * The grp_mask array is indexed by group number and the bit fields correspond
  700. * to ring numbers. We are finding which interrupt group a ring belongs to.
  701. *
  702. * Return: the index in the grp_mask array with the ring number.
  703. * -QDF_STATUS_E_NOENT if no entry is found
  704. */
  705. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  706. {
  707. int ext_group_num;
  708. int mask = 1 << ring_num;
  709. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  710. ext_group_num++) {
  711. if (mask & grp_mask[ext_group_num])
  712. return ext_group_num;
  713. }
  714. return -QDF_STATUS_E_NOENT;
  715. }
  716. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  717. enum hal_ring_type ring_type,
  718. int ring_num)
  719. {
  720. int *grp_mask;
  721. switch (ring_type) {
  722. case WBM2SW_RELEASE:
  723. /* dp_tx_comp_handler - soc->tx_comp_ring */
  724. if (ring_num < 3)
  725. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  726. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  727. else if (ring_num == 3) {
  728. /* sw treats this as a separate ring type */
  729. grp_mask = &soc->wlan_cfg_ctx->
  730. int_rx_wbm_rel_ring_mask[0];
  731. ring_num = 0;
  732. } else {
  733. qdf_assert(0);
  734. return -QDF_STATUS_E_NOENT;
  735. }
  736. break;
  737. case REO_EXCEPTION:
  738. /* dp_rx_err_process - &soc->reo_exception_ring */
  739. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  740. break;
  741. case REO_DST:
  742. /* dp_rx_process - soc->reo_dest_ring */
  743. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  744. break;
  745. case REO_STATUS:
  746. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  747. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  748. break;
  749. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  750. case RXDMA_MONITOR_STATUS:
  751. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  752. case RXDMA_MONITOR_DST:
  753. /* dp_mon_process */
  754. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  755. break;
  756. case RXDMA_DST:
  757. /* dp_rxdma_err_process */
  758. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  759. break;
  760. case RXDMA_BUF:
  761. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  762. break;
  763. case RXDMA_MONITOR_BUF:
  764. /* TODO: support low_thresh interrupt */
  765. return -QDF_STATUS_E_NOENT;
  766. break;
  767. case TCL_DATA:
  768. case TCL_CMD:
  769. case REO_CMD:
  770. case SW2WBM_RELEASE:
  771. case WBM_IDLE_LINK:
  772. /* normally empty SW_TO_HW rings */
  773. return -QDF_STATUS_E_NOENT;
  774. break;
  775. case TCL_STATUS:
  776. case REO_REINJECT:
  777. /* misc unused rings */
  778. return -QDF_STATUS_E_NOENT;
  779. break;
  780. case CE_SRC:
  781. case CE_DST:
  782. case CE_DST_STATUS:
  783. /* CE_rings - currently handled by hif */
  784. default:
  785. return -QDF_STATUS_E_NOENT;
  786. break;
  787. }
  788. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  789. }
  790. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  791. *ring_params, int ring_type, int ring_num)
  792. {
  793. int msi_group_number;
  794. int msi_data_count;
  795. int ret;
  796. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  797. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  798. &msi_data_count, &msi_data_start,
  799. &msi_irq_start);
  800. if (ret)
  801. return;
  802. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  803. ring_num);
  804. if (msi_group_number < 0) {
  805. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  806. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  807. ring_type, ring_num);
  808. ring_params->msi_addr = 0;
  809. ring_params->msi_data = 0;
  810. return;
  811. }
  812. if (msi_group_number > msi_data_count) {
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  814. FL("2 msi_groups will share an msi; msi_group_num %d"),
  815. msi_group_number);
  816. QDF_ASSERT(0);
  817. }
  818. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  819. ring_params->msi_addr = addr_low;
  820. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  821. ring_params->msi_data = (msi_group_number % msi_data_count)
  822. + msi_data_start;
  823. ring_params->flags |= HAL_SRNG_MSI_INTR;
  824. }
  825. /**
  826. * dp_print_ast_stats() - Dump AST table contents
  827. * @soc: Datapath soc handle
  828. *
  829. * return void
  830. */
  831. #ifdef FEATURE_AST
  832. static void dp_print_ast_stats(struct dp_soc *soc)
  833. {
  834. uint8_t i;
  835. uint8_t num_entries = 0;
  836. struct dp_vdev *vdev;
  837. struct dp_pdev *pdev;
  838. struct dp_peer *peer;
  839. struct dp_ast_entry *ase, *tmp_ase;
  840. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  841. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS", "BSS",
  842. "DA", "HMWDS_SEC"};
  843. DP_PRINT_STATS("AST Stats:");
  844. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  845. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  846. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  847. DP_PRINT_STATS("AST Table:");
  848. qdf_spin_lock_bh(&soc->ast_lock);
  849. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  850. pdev = soc->pdev_list[i];
  851. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  852. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  853. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  854. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  855. DP_PRINT_STATS("%6d mac_addr = %pM"
  856. " peer_mac_addr = %pM"
  857. " type = %s"
  858. " next_hop = %d"
  859. " is_active = %d"
  860. " is_bss = %d"
  861. " ast_idx = %d"
  862. " ast_hash = %d"
  863. " pdev_id = %d"
  864. " vdev_id = %d"
  865. " del_cmd_sent = %d",
  866. ++num_entries,
  867. ase->mac_addr.raw,
  868. ase->peer->mac_addr.raw,
  869. type[ase->type],
  870. ase->next_hop,
  871. ase->is_active,
  872. ase->is_bss,
  873. ase->ast_idx,
  874. ase->ast_hash_value,
  875. ase->pdev_id,
  876. ase->vdev_id,
  877. ase->del_cmd_sent);
  878. }
  879. }
  880. }
  881. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  882. }
  883. qdf_spin_unlock_bh(&soc->ast_lock);
  884. }
  885. #else
  886. static void dp_print_ast_stats(struct dp_soc *soc)
  887. {
  888. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  889. return;
  890. }
  891. #endif
  892. /**
  893. * dp_print_peer_table() - Dump all Peer stats
  894. * @vdev: Datapath Vdev handle
  895. *
  896. * return void
  897. */
  898. static void dp_print_peer_table(struct dp_vdev *vdev)
  899. {
  900. struct dp_peer *peer = NULL;
  901. DP_PRINT_STATS("Dumping Peer Table Stats:");
  902. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  903. if (!peer) {
  904. DP_PRINT_STATS("Invalid Peer");
  905. return;
  906. }
  907. DP_PRINT_STATS(" peer_mac_addr = %pM nawds_enabled = %d",
  908. peer->mac_addr.raw,
  909. peer->nawds_enabled);
  910. DP_PRINT_STATS(" bss_peer = %d wapi = %d wds_enabled = %d",
  911. peer->bss_peer,
  912. peer->wapi,
  913. peer->wds_enabled);
  914. DP_PRINT_STATS(" delete in progress = %d peer id = %d",
  915. peer->delete_in_progress,
  916. peer->peer_ids[0]);
  917. }
  918. }
  919. /*
  920. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  921. */
  922. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  923. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  924. {
  925. void *hal_soc = soc->hal_soc;
  926. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  927. /* TODO: See if we should get align size from hal */
  928. uint32_t ring_base_align = 8;
  929. struct hal_srng_params ring_params;
  930. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  931. /* TODO: Currently hal layer takes care of endianness related settings.
  932. * See if these settings need to passed from DP layer
  933. */
  934. ring_params.flags = 0;
  935. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  936. srng->hal_srng = NULL;
  937. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  938. srng->num_entries = num_entries;
  939. if (!soc->dp_soc_reinit) {
  940. srng->base_vaddr_unaligned =
  941. qdf_mem_alloc_consistent(soc->osdev,
  942. soc->osdev->dev,
  943. srng->alloc_size,
  944. &srng->base_paddr_unaligned);
  945. }
  946. if (!srng->base_vaddr_unaligned) {
  947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  948. FL("alloc failed - ring_type: %d, ring_num %d"),
  949. ring_type, ring_num);
  950. return QDF_STATUS_E_NOMEM;
  951. }
  952. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  953. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  954. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  955. ((unsigned long)(ring_params.ring_base_vaddr) -
  956. (unsigned long)srng->base_vaddr_unaligned);
  957. ring_params.num_entries = num_entries;
  958. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  959. FL("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u"),
  960. ring_type, ring_num, (void *)ring_params.ring_base_vaddr,
  961. (void *)ring_params.ring_base_paddr, ring_params.num_entries);
  962. if (soc->intr_mode == DP_INTR_MSI) {
  963. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  964. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  965. FL("Using MSI for ring_type: %d, ring_num %d"),
  966. ring_type, ring_num);
  967. } else {
  968. ring_params.msi_data = 0;
  969. ring_params.msi_addr = 0;
  970. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  971. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  972. ring_type, ring_num);
  973. }
  974. /*
  975. * Setup interrupt timer and batch counter thresholds for
  976. * interrupt mitigation based on ring type
  977. */
  978. if (ring_type == REO_DST) {
  979. ring_params.intr_timer_thres_us =
  980. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  981. ring_params.intr_batch_cntr_thres_entries =
  982. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  983. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  984. ring_params.intr_timer_thres_us =
  985. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  986. ring_params.intr_batch_cntr_thres_entries =
  987. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  988. } else {
  989. ring_params.intr_timer_thres_us =
  990. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  991. ring_params.intr_batch_cntr_thres_entries =
  992. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  993. }
  994. /* Enable low threshold interrupts for rx buffer rings (regular and
  995. * monitor buffer rings.
  996. * TODO: See if this is required for any other ring
  997. */
  998. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  999. (ring_type == RXDMA_MONITOR_STATUS)) {
  1000. /* TODO: Setting low threshold to 1/8th of ring size
  1001. * see if this needs to be configurable
  1002. */
  1003. ring_params.low_threshold = num_entries >> 3;
  1004. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  1005. ring_params.intr_timer_thres_us =
  1006. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1007. ring_params.intr_batch_cntr_thres_entries = 0;
  1008. }
  1009. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  1010. mac_id, &ring_params);
  1011. if (!srng->hal_srng) {
  1012. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1013. srng->alloc_size,
  1014. srng->base_vaddr_unaligned,
  1015. srng->base_paddr_unaligned, 0);
  1016. }
  1017. return 0;
  1018. }
  1019. /*
  1020. * dp_srng_deinit() - Internal function to deinit SRNG rings used by data path
  1021. * @soc: DP SOC handle
  1022. * @srng: source ring structure
  1023. * @ring_type: type of ring
  1024. * @ring_num: ring number
  1025. *
  1026. * Return: None
  1027. */
  1028. static void dp_srng_deinit(struct dp_soc *soc, struct dp_srng *srng,
  1029. int ring_type, int ring_num)
  1030. {
  1031. }
  1032. /**
  1033. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  1034. * Any buffers allocated and attached to ring entries are expected to be freed
  1035. * before calling this function.
  1036. */
  1037. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  1038. int ring_type, int ring_num)
  1039. {
  1040. if (!srng->hal_srng) {
  1041. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1042. FL("Ring type: %d, num:%d not setup"),
  1043. ring_type, ring_num);
  1044. return;
  1045. }
  1046. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1047. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1048. srng->alloc_size,
  1049. srng->base_vaddr_unaligned,
  1050. srng->base_paddr_unaligned, 0);
  1051. srng->hal_srng = NULL;
  1052. }
  1053. /* TODO: Need this interface from HIF */
  1054. void *hif_get_hal_handle(void *hif_handle);
  1055. /*
  1056. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  1057. * @dp_ctx: DP SOC handle
  1058. * @budget: Number of frames/descriptors that can be processed in one shot
  1059. *
  1060. * Return: remaining budget/quota for the soc device
  1061. */
  1062. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  1063. {
  1064. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1065. struct dp_soc *soc = int_ctx->soc;
  1066. int ring = 0;
  1067. uint32_t work_done = 0;
  1068. int budget = dp_budget;
  1069. uint8_t tx_mask = int_ctx->tx_ring_mask;
  1070. uint8_t rx_mask = int_ctx->rx_ring_mask;
  1071. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  1072. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  1073. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  1074. uint32_t remaining_quota = dp_budget;
  1075. struct dp_pdev *pdev = NULL;
  1076. int mac_id;
  1077. /* Process Tx completion interrupts first to return back buffers */
  1078. while (tx_mask) {
  1079. if (tx_mask & 0x1) {
  1080. work_done = dp_tx_comp_handler(soc,
  1081. soc->tx_comp_ring[ring].hal_srng,
  1082. remaining_quota);
  1083. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1084. "tx mask 0x%x ring %d, budget %d, work_done %d",
  1085. tx_mask, ring, budget, work_done);
  1086. budget -= work_done;
  1087. if (budget <= 0)
  1088. goto budget_done;
  1089. remaining_quota = budget;
  1090. }
  1091. tx_mask = tx_mask >> 1;
  1092. ring++;
  1093. }
  1094. /* Process REO Exception ring interrupt */
  1095. if (rx_err_mask) {
  1096. work_done = dp_rx_err_process(soc,
  1097. soc->reo_exception_ring.hal_srng,
  1098. remaining_quota);
  1099. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1100. "REO Exception Ring: work_done %d budget %d",
  1101. work_done, budget);
  1102. budget -= work_done;
  1103. if (budget <= 0) {
  1104. goto budget_done;
  1105. }
  1106. remaining_quota = budget;
  1107. }
  1108. /* Process Rx WBM release ring interrupt */
  1109. if (rx_wbm_rel_mask) {
  1110. work_done = dp_rx_wbm_err_process(soc,
  1111. soc->rx_rel_ring.hal_srng, remaining_quota);
  1112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1113. "WBM Release Ring: work_done %d budget %d",
  1114. work_done, budget);
  1115. budget -= work_done;
  1116. if (budget <= 0) {
  1117. goto budget_done;
  1118. }
  1119. remaining_quota = budget;
  1120. }
  1121. /* Process Rx interrupts */
  1122. if (rx_mask) {
  1123. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1124. if (rx_mask & (1 << ring)) {
  1125. work_done = dp_rx_process(int_ctx,
  1126. soc->reo_dest_ring[ring].hal_srng,
  1127. ring,
  1128. remaining_quota);
  1129. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1130. "rx mask 0x%x ring %d, work_done %d budget %d",
  1131. rx_mask, ring, work_done, budget);
  1132. budget -= work_done;
  1133. if (budget <= 0)
  1134. goto budget_done;
  1135. remaining_quota = budget;
  1136. }
  1137. }
  1138. }
  1139. if (reo_status_mask)
  1140. dp_reo_status_ring_handler(soc);
  1141. /* Process LMAC interrupts */
  1142. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1143. pdev = soc->pdev_list[ring];
  1144. if (pdev == NULL)
  1145. continue;
  1146. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1147. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1148. pdev->pdev_id);
  1149. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1150. work_done = dp_mon_process(soc, mac_for_pdev,
  1151. remaining_quota);
  1152. budget -= work_done;
  1153. if (budget <= 0)
  1154. goto budget_done;
  1155. remaining_quota = budget;
  1156. }
  1157. if (int_ctx->rxdma2host_ring_mask &
  1158. (1 << mac_for_pdev)) {
  1159. work_done = dp_rxdma_err_process(soc,
  1160. mac_for_pdev,
  1161. remaining_quota);
  1162. budget -= work_done;
  1163. if (budget <= 0)
  1164. goto budget_done;
  1165. remaining_quota = budget;
  1166. }
  1167. if (int_ctx->host2rxdma_ring_mask &
  1168. (1 << mac_for_pdev)) {
  1169. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1170. union dp_rx_desc_list_elem_t *tail = NULL;
  1171. struct dp_srng *rx_refill_buf_ring =
  1172. &pdev->rx_refill_buf_ring;
  1173. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1174. 1);
  1175. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1176. rx_refill_buf_ring,
  1177. &soc->rx_desc_buf[mac_for_pdev], 0,
  1178. &desc_list, &tail);
  1179. }
  1180. }
  1181. }
  1182. qdf_lro_flush(int_ctx->lro_ctx);
  1183. budget_done:
  1184. return dp_budget - budget;
  1185. }
  1186. /* dp_interrupt_timer()- timer poll for interrupts
  1187. *
  1188. * @arg: SoC Handle
  1189. *
  1190. * Return:
  1191. *
  1192. */
  1193. static void dp_interrupt_timer(void *arg)
  1194. {
  1195. struct dp_soc *soc = (struct dp_soc *) arg;
  1196. int i;
  1197. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1198. for (i = 0;
  1199. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1200. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1201. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1202. }
  1203. }
  1204. /*
  1205. * dp_soc_attach_poll() - Register handlers for DP interrupts
  1206. * @txrx_soc: DP SOC handle
  1207. *
  1208. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1209. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1210. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1211. *
  1212. * Return: 0 for success, nonzero for failure.
  1213. */
  1214. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1215. {
  1216. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1217. int i;
  1218. soc->intr_mode = DP_INTR_POLL;
  1219. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1220. soc->intr_ctx[i].dp_intr_id = i;
  1221. soc->intr_ctx[i].tx_ring_mask =
  1222. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1223. soc->intr_ctx[i].rx_ring_mask =
  1224. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1225. soc->intr_ctx[i].rx_mon_ring_mask =
  1226. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1227. soc->intr_ctx[i].rx_err_ring_mask =
  1228. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1229. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1230. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1231. soc->intr_ctx[i].reo_status_ring_mask =
  1232. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1233. soc->intr_ctx[i].rxdma2host_ring_mask =
  1234. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1235. soc->intr_ctx[i].soc = soc;
  1236. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1237. }
  1238. qdf_timer_init(soc->osdev, &soc->int_timer,
  1239. dp_interrupt_timer, (void *)soc,
  1240. QDF_TIMER_TYPE_WAKE_APPS);
  1241. return QDF_STATUS_SUCCESS;
  1242. }
  1243. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1244. #if defined(CONFIG_MCL)
  1245. /*
  1246. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1247. * @txrx_soc: DP SOC handle
  1248. *
  1249. * Call the appropriate attach function based on the mode of operation.
  1250. * This is a WAR for enabling monitor mode.
  1251. *
  1252. * Return: 0 for success. nonzero for failure.
  1253. */
  1254. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1255. {
  1256. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1257. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1258. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1259. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1260. "%s: Poll mode", __func__);
  1261. return dp_soc_attach_poll(txrx_soc);
  1262. } else {
  1263. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1264. "%s: Interrupt mode", __func__);
  1265. return dp_soc_interrupt_attach(txrx_soc);
  1266. }
  1267. }
  1268. #else
  1269. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1270. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1271. {
  1272. return dp_soc_attach_poll(txrx_soc);
  1273. }
  1274. #else
  1275. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1276. {
  1277. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1278. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1279. return dp_soc_attach_poll(txrx_soc);
  1280. else
  1281. return dp_soc_interrupt_attach(txrx_soc);
  1282. }
  1283. #endif
  1284. #endif
  1285. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1286. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1287. {
  1288. int j;
  1289. int num_irq = 0;
  1290. int tx_mask =
  1291. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1292. int rx_mask =
  1293. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1294. int rx_mon_mask =
  1295. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1296. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1297. soc->wlan_cfg_ctx, intr_ctx_num);
  1298. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1299. soc->wlan_cfg_ctx, intr_ctx_num);
  1300. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1301. soc->wlan_cfg_ctx, intr_ctx_num);
  1302. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1303. soc->wlan_cfg_ctx, intr_ctx_num);
  1304. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1305. soc->wlan_cfg_ctx, intr_ctx_num);
  1306. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1307. soc->wlan_cfg_ctx, intr_ctx_num);
  1308. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1309. if (tx_mask & (1 << j)) {
  1310. irq_id_map[num_irq++] =
  1311. (wbm2host_tx_completions_ring1 - j);
  1312. }
  1313. if (rx_mask & (1 << j)) {
  1314. irq_id_map[num_irq++] =
  1315. (reo2host_destination_ring1 - j);
  1316. }
  1317. if (rxdma2host_ring_mask & (1 << j)) {
  1318. irq_id_map[num_irq++] =
  1319. rxdma2host_destination_ring_mac1 -
  1320. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1321. }
  1322. if (host2rxdma_ring_mask & (1 << j)) {
  1323. irq_id_map[num_irq++] =
  1324. host2rxdma_host_buf_ring_mac1 -
  1325. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1326. }
  1327. if (host2rxdma_mon_ring_mask & (1 << j)) {
  1328. irq_id_map[num_irq++] =
  1329. host2rxdma_monitor_ring1 -
  1330. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1331. }
  1332. if (rx_mon_mask & (1 << j)) {
  1333. irq_id_map[num_irq++] =
  1334. ppdu_end_interrupts_mac1 -
  1335. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1336. irq_id_map[num_irq++] =
  1337. rxdma2host_monitor_status_ring_mac1 -
  1338. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1339. }
  1340. if (rx_wbm_rel_ring_mask & (1 << j))
  1341. irq_id_map[num_irq++] = wbm2host_rx_release;
  1342. if (rx_err_ring_mask & (1 << j))
  1343. irq_id_map[num_irq++] = reo2host_exception;
  1344. if (reo_status_ring_mask & (1 << j))
  1345. irq_id_map[num_irq++] = reo2host_status;
  1346. }
  1347. *num_irq_r = num_irq;
  1348. }
  1349. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1350. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1351. int msi_vector_count, int msi_vector_start)
  1352. {
  1353. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1354. soc->wlan_cfg_ctx, intr_ctx_num);
  1355. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1356. soc->wlan_cfg_ctx, intr_ctx_num);
  1357. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1358. soc->wlan_cfg_ctx, intr_ctx_num);
  1359. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1360. soc->wlan_cfg_ctx, intr_ctx_num);
  1361. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1362. soc->wlan_cfg_ctx, intr_ctx_num);
  1363. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1364. soc->wlan_cfg_ctx, intr_ctx_num);
  1365. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1366. soc->wlan_cfg_ctx, intr_ctx_num);
  1367. unsigned int vector =
  1368. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1369. int num_irq = 0;
  1370. soc->intr_mode = DP_INTR_MSI;
  1371. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1372. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1373. irq_id_map[num_irq++] =
  1374. pld_get_msi_irq(soc->osdev->dev, vector);
  1375. *num_irq_r = num_irq;
  1376. }
  1377. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1378. int *irq_id_map, int *num_irq)
  1379. {
  1380. int msi_vector_count, ret;
  1381. uint32_t msi_base_data, msi_vector_start;
  1382. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1383. &msi_vector_count,
  1384. &msi_base_data,
  1385. &msi_vector_start);
  1386. if (ret)
  1387. return dp_soc_interrupt_map_calculate_integrated(soc,
  1388. intr_ctx_num, irq_id_map, num_irq);
  1389. else
  1390. dp_soc_interrupt_map_calculate_msi(soc,
  1391. intr_ctx_num, irq_id_map, num_irq,
  1392. msi_vector_count, msi_vector_start);
  1393. }
  1394. /*
  1395. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1396. * @txrx_soc: DP SOC handle
  1397. *
  1398. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1399. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1400. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1401. *
  1402. * Return: 0 for success. nonzero for failure.
  1403. */
  1404. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1405. {
  1406. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1407. int i = 0;
  1408. int num_irq = 0;
  1409. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1410. int ret = 0;
  1411. /* Map of IRQ ids registered with one interrupt context */
  1412. int irq_id_map[HIF_MAX_GRP_IRQ];
  1413. int tx_mask =
  1414. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1415. int rx_mask =
  1416. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1417. int rx_mon_mask =
  1418. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1419. int rx_err_ring_mask =
  1420. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1421. int rx_wbm_rel_ring_mask =
  1422. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1423. int reo_status_ring_mask =
  1424. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1425. int rxdma2host_ring_mask =
  1426. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1427. int host2rxdma_ring_mask =
  1428. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1429. int host2rxdma_mon_ring_mask =
  1430. wlan_cfg_get_host2rxdma_mon_ring_mask(
  1431. soc->wlan_cfg_ctx, i);
  1432. soc->intr_ctx[i].dp_intr_id = i;
  1433. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1434. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1435. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1436. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1437. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1438. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1439. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1440. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1441. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  1442. host2rxdma_mon_ring_mask;
  1443. soc->intr_ctx[i].soc = soc;
  1444. num_irq = 0;
  1445. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1446. &num_irq);
  1447. ret = hif_register_ext_group(soc->hif_handle,
  1448. num_irq, irq_id_map, dp_service_srngs,
  1449. &soc->intr_ctx[i], "dp_intr",
  1450. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1451. if (ret) {
  1452. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1453. FL("failed, ret = %d"), ret);
  1454. return QDF_STATUS_E_FAILURE;
  1455. }
  1456. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1457. }
  1458. hif_configure_ext_group_interrupts(soc->hif_handle);
  1459. return QDF_STATUS_SUCCESS;
  1460. }
  1461. /*
  1462. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1463. * @txrx_soc: DP SOC handle
  1464. *
  1465. * Return: void
  1466. */
  1467. static void dp_soc_interrupt_detach(void *txrx_soc)
  1468. {
  1469. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1470. int i;
  1471. if (soc->intr_mode == DP_INTR_POLL) {
  1472. qdf_timer_stop(&soc->int_timer);
  1473. qdf_timer_free(&soc->int_timer);
  1474. } else {
  1475. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1476. }
  1477. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1478. soc->intr_ctx[i].tx_ring_mask = 0;
  1479. soc->intr_ctx[i].rx_ring_mask = 0;
  1480. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1481. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1482. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1483. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1484. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1485. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1486. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  1487. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1488. }
  1489. }
  1490. #define AVG_MAX_MPDUS_PER_TID 128
  1491. #define AVG_TIDS_PER_CLIENT 2
  1492. #define AVG_FLOWS_PER_TID 2
  1493. #define AVG_MSDUS_PER_FLOW 128
  1494. #define AVG_MSDUS_PER_MPDU 4
  1495. /*
  1496. * Allocate and setup link descriptor pool that will be used by HW for
  1497. * various link and queue descriptors and managed by WBM
  1498. */
  1499. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1500. {
  1501. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1502. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1503. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1504. uint32_t num_mpdus_per_link_desc =
  1505. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1506. uint32_t num_msdus_per_link_desc =
  1507. hal_num_msdus_per_link_desc(soc->hal_soc);
  1508. uint32_t num_mpdu_links_per_queue_desc =
  1509. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1510. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1511. uint32_t total_link_descs, total_mem_size;
  1512. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1513. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1514. uint32_t num_link_desc_banks;
  1515. uint32_t last_bank_size = 0;
  1516. uint32_t entry_size, num_entries;
  1517. int i;
  1518. uint32_t desc_id = 0;
  1519. qdf_dma_addr_t *baseaddr = NULL;
  1520. /* Only Tx queue descriptors are allocated from common link descriptor
  1521. * pool Rx queue descriptors are not included in this because (REO queue
  1522. * extension descriptors) they are expected to be allocated contiguously
  1523. * with REO queue descriptors
  1524. */
  1525. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1526. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1527. num_mpdu_queue_descs = num_mpdu_link_descs /
  1528. num_mpdu_links_per_queue_desc;
  1529. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1530. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1531. num_msdus_per_link_desc;
  1532. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1533. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1534. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1535. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1536. /* Round up to power of 2 */
  1537. total_link_descs = 1;
  1538. while (total_link_descs < num_entries)
  1539. total_link_descs <<= 1;
  1540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1541. FL("total_link_descs: %u, link_desc_size: %d"),
  1542. total_link_descs, link_desc_size);
  1543. total_mem_size = total_link_descs * link_desc_size;
  1544. total_mem_size += link_desc_align;
  1545. if (total_mem_size <= max_alloc_size) {
  1546. num_link_desc_banks = 0;
  1547. last_bank_size = total_mem_size;
  1548. } else {
  1549. num_link_desc_banks = (total_mem_size) /
  1550. (max_alloc_size - link_desc_align);
  1551. last_bank_size = total_mem_size %
  1552. (max_alloc_size - link_desc_align);
  1553. }
  1554. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1555. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1556. total_mem_size, num_link_desc_banks);
  1557. for (i = 0; i < num_link_desc_banks; i++) {
  1558. if (!soc->dp_soc_reinit) {
  1559. baseaddr = &soc->link_desc_banks[i].
  1560. base_paddr_unaligned;
  1561. soc->link_desc_banks[i].base_vaddr_unaligned =
  1562. qdf_mem_alloc_consistent(soc->osdev,
  1563. soc->osdev->dev,
  1564. max_alloc_size,
  1565. baseaddr);
  1566. }
  1567. soc->link_desc_banks[i].size = max_alloc_size;
  1568. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1569. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1570. ((unsigned long)(
  1571. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1572. link_desc_align));
  1573. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1574. soc->link_desc_banks[i].base_paddr_unaligned) +
  1575. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1576. (unsigned long)(
  1577. soc->link_desc_banks[i].base_vaddr_unaligned));
  1578. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1579. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1580. FL("Link descriptor memory alloc failed"));
  1581. goto fail;
  1582. }
  1583. }
  1584. if (last_bank_size) {
  1585. /* Allocate last bank in case total memory required is not exact
  1586. * multiple of max_alloc_size
  1587. */
  1588. if (!soc->dp_soc_reinit) {
  1589. baseaddr = &soc->link_desc_banks[i].
  1590. base_paddr_unaligned;
  1591. soc->link_desc_banks[i].base_vaddr_unaligned =
  1592. qdf_mem_alloc_consistent(soc->osdev,
  1593. soc->osdev->dev,
  1594. last_bank_size,
  1595. baseaddr);
  1596. }
  1597. soc->link_desc_banks[i].size = last_bank_size;
  1598. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1599. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1600. ((unsigned long)(
  1601. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1602. link_desc_align));
  1603. soc->link_desc_banks[i].base_paddr =
  1604. (unsigned long)(
  1605. soc->link_desc_banks[i].base_paddr_unaligned) +
  1606. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1607. (unsigned long)(
  1608. soc->link_desc_banks[i].base_vaddr_unaligned));
  1609. }
  1610. /* Allocate and setup link descriptor idle list for HW internal use */
  1611. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1612. total_mem_size = entry_size * total_link_descs;
  1613. if (total_mem_size <= max_alloc_size) {
  1614. void *desc;
  1615. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1616. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1617. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1618. FL("Link desc idle ring setup failed"));
  1619. goto fail;
  1620. }
  1621. hal_srng_access_start_unlocked(soc->hal_soc,
  1622. soc->wbm_idle_link_ring.hal_srng);
  1623. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1624. soc->link_desc_banks[i].base_paddr; i++) {
  1625. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1626. ((unsigned long)(
  1627. soc->link_desc_banks[i].base_vaddr) -
  1628. (unsigned long)(
  1629. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1630. / link_desc_size;
  1631. unsigned long paddr = (unsigned long)(
  1632. soc->link_desc_banks[i].base_paddr);
  1633. while (num_entries && (desc = hal_srng_src_get_next(
  1634. soc->hal_soc,
  1635. soc->wbm_idle_link_ring.hal_srng))) {
  1636. hal_set_link_desc_addr(desc,
  1637. LINK_DESC_COOKIE(desc_id, i), paddr);
  1638. num_entries--;
  1639. desc_id++;
  1640. paddr += link_desc_size;
  1641. }
  1642. }
  1643. hal_srng_access_end_unlocked(soc->hal_soc,
  1644. soc->wbm_idle_link_ring.hal_srng);
  1645. } else {
  1646. uint32_t num_scatter_bufs;
  1647. uint32_t num_entries_per_buf;
  1648. uint32_t rem_entries;
  1649. uint8_t *scatter_buf_ptr;
  1650. uint16_t scatter_buf_num;
  1651. uint32_t buf_size = 0;
  1652. soc->wbm_idle_scatter_buf_size =
  1653. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1654. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1655. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1656. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1657. soc->hal_soc, total_mem_size,
  1658. soc->wbm_idle_scatter_buf_size);
  1659. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1660. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1661. FL("scatter bufs size out of bounds"));
  1662. goto fail;
  1663. }
  1664. for (i = 0; i < num_scatter_bufs; i++) {
  1665. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1666. if (!soc->dp_soc_reinit) {
  1667. buf_size = soc->wbm_idle_scatter_buf_size;
  1668. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1669. qdf_mem_alloc_consistent(soc->osdev,
  1670. soc->osdev->
  1671. dev,
  1672. buf_size,
  1673. baseaddr);
  1674. }
  1675. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1676. QDF_TRACE(QDF_MODULE_ID_DP,
  1677. QDF_TRACE_LEVEL_ERROR,
  1678. FL("Scatter lst memory alloc fail"));
  1679. goto fail;
  1680. }
  1681. }
  1682. /* Populate idle list scatter buffers with link descriptor
  1683. * pointers
  1684. */
  1685. scatter_buf_num = 0;
  1686. scatter_buf_ptr = (uint8_t *)(
  1687. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1688. rem_entries = num_entries_per_buf;
  1689. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1690. soc->link_desc_banks[i].base_paddr; i++) {
  1691. uint32_t num_link_descs =
  1692. (soc->link_desc_banks[i].size -
  1693. ((unsigned long)(
  1694. soc->link_desc_banks[i].base_vaddr) -
  1695. (unsigned long)(
  1696. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1697. / link_desc_size;
  1698. unsigned long paddr = (unsigned long)(
  1699. soc->link_desc_banks[i].base_paddr);
  1700. while (num_link_descs) {
  1701. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1702. LINK_DESC_COOKIE(desc_id, i), paddr);
  1703. num_link_descs--;
  1704. desc_id++;
  1705. paddr += link_desc_size;
  1706. rem_entries--;
  1707. if (rem_entries) {
  1708. scatter_buf_ptr += entry_size;
  1709. } else {
  1710. rem_entries = num_entries_per_buf;
  1711. scatter_buf_num++;
  1712. if (scatter_buf_num >= num_scatter_bufs)
  1713. break;
  1714. scatter_buf_ptr = (uint8_t *)(
  1715. soc->wbm_idle_scatter_buf_base_vaddr[
  1716. scatter_buf_num]);
  1717. }
  1718. }
  1719. }
  1720. /* Setup link descriptor idle list in HW */
  1721. hal_setup_link_idle_list(soc->hal_soc,
  1722. soc->wbm_idle_scatter_buf_base_paddr,
  1723. soc->wbm_idle_scatter_buf_base_vaddr,
  1724. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1725. (uint32_t)(scatter_buf_ptr -
  1726. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1727. scatter_buf_num-1])), total_link_descs);
  1728. }
  1729. return 0;
  1730. fail:
  1731. if (soc->wbm_idle_link_ring.hal_srng) {
  1732. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1733. WBM_IDLE_LINK, 0);
  1734. }
  1735. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1736. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1737. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1738. soc->wbm_idle_scatter_buf_size,
  1739. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1740. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1741. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1742. }
  1743. }
  1744. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1745. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1746. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1747. soc->link_desc_banks[i].size,
  1748. soc->link_desc_banks[i].base_vaddr_unaligned,
  1749. soc->link_desc_banks[i].base_paddr_unaligned,
  1750. 0);
  1751. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1752. }
  1753. }
  1754. return QDF_STATUS_E_FAILURE;
  1755. }
  1756. /*
  1757. * Free link descriptor pool that was setup HW
  1758. */
  1759. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1760. {
  1761. int i;
  1762. if (soc->wbm_idle_link_ring.hal_srng) {
  1763. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1764. WBM_IDLE_LINK, 0);
  1765. }
  1766. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1767. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1768. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1769. soc->wbm_idle_scatter_buf_size,
  1770. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1771. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1772. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1773. }
  1774. }
  1775. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1776. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1777. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1778. soc->link_desc_banks[i].size,
  1779. soc->link_desc_banks[i].base_vaddr_unaligned,
  1780. soc->link_desc_banks[i].base_paddr_unaligned,
  1781. 0);
  1782. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1783. }
  1784. }
  1785. }
  1786. #ifdef IPA_OFFLOAD
  1787. #define REO_DST_RING_SIZE_QCA6290 1023
  1788. #ifndef QCA_WIFI_QCA8074_VP
  1789. #define REO_DST_RING_SIZE_QCA8074 1023
  1790. #else
  1791. #define REO_DST_RING_SIZE_QCA8074 8
  1792. #endif /* QCA_WIFI_QCA8074_VP */
  1793. #else
  1794. #define REO_DST_RING_SIZE_QCA6290 1024
  1795. #ifndef QCA_WIFI_QCA8074_VP
  1796. #define REO_DST_RING_SIZE_QCA8074 2048
  1797. #else
  1798. #define REO_DST_RING_SIZE_QCA8074 8
  1799. #endif /* QCA_WIFI_QCA8074_VP */
  1800. #endif /* IPA_OFFLOAD */
  1801. /*
  1802. * dp_ast_aging_timer_fn() - Timer callback function for WDS aging
  1803. * @soc: Datapath SOC handle
  1804. *
  1805. * This is a timer function used to age out stale AST nodes from
  1806. * AST table
  1807. */
  1808. #ifdef FEATURE_WDS
  1809. static void dp_ast_aging_timer_fn(void *soc_hdl)
  1810. {
  1811. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1812. struct dp_pdev *pdev;
  1813. struct dp_vdev *vdev;
  1814. struct dp_peer *peer;
  1815. struct dp_ast_entry *ase, *temp_ase;
  1816. int i;
  1817. bool check_wds_ase = false;
  1818. if (soc->wds_ast_aging_timer_cnt++ >= DP_WDS_AST_AGING_TIMER_CNT) {
  1819. soc->wds_ast_aging_timer_cnt = 0;
  1820. check_wds_ase = true;
  1821. }
  1822. qdf_spin_lock_bh(&soc->ast_lock);
  1823. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1824. pdev = soc->pdev_list[i];
  1825. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1826. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1827. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1828. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1829. /*
  1830. * Do not expire static ast entries
  1831. * and HM WDS entries
  1832. */
  1833. if (ase->type !=
  1834. CDP_TXRX_AST_TYPE_WDS &&
  1835. ase->type !=
  1836. CDP_TXRX_AST_TYPE_MEC &&
  1837. ase->type !=
  1838. CDP_TXRX_AST_TYPE_DA)
  1839. continue;
  1840. /* Expire MEC entry every n sec.
  1841. * This needs to be expired in
  1842. * case if STA backbone is made as
  1843. * AP backbone, In this case it needs
  1844. * to be re-added as a WDS entry.
  1845. */
  1846. if (ase->is_active && ase->type ==
  1847. CDP_TXRX_AST_TYPE_MEC) {
  1848. ase->is_active = FALSE;
  1849. continue;
  1850. } else if (ase->is_active &&
  1851. check_wds_ase) {
  1852. ase->is_active = FALSE;
  1853. continue;
  1854. }
  1855. if (ase->type ==
  1856. CDP_TXRX_AST_TYPE_MEC) {
  1857. DP_STATS_INC(soc,
  1858. ast.aged_out, 1);
  1859. dp_peer_del_ast(soc, ase);
  1860. } else if (check_wds_ase) {
  1861. DP_STATS_INC(soc,
  1862. ast.aged_out, 1);
  1863. dp_peer_del_ast(soc, ase);
  1864. }
  1865. }
  1866. }
  1867. }
  1868. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1869. }
  1870. qdf_spin_unlock_bh(&soc->ast_lock);
  1871. if (qdf_atomic_read(&soc->cmn_init_done))
  1872. qdf_timer_mod(&soc->ast_aging_timer,
  1873. DP_AST_AGING_TIMER_DEFAULT_MS);
  1874. }
  1875. /*
  1876. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1877. * @soc: Datapath SOC handle
  1878. *
  1879. * Return: None
  1880. */
  1881. static void dp_soc_wds_attach(struct dp_soc *soc)
  1882. {
  1883. soc->wds_ast_aging_timer_cnt = 0;
  1884. qdf_timer_init(soc->osdev, &soc->ast_aging_timer,
  1885. dp_ast_aging_timer_fn, (void *)soc,
  1886. QDF_TIMER_TYPE_WAKE_APPS);
  1887. qdf_timer_mod(&soc->ast_aging_timer, DP_AST_AGING_TIMER_DEFAULT_MS);
  1888. }
  1889. /*
  1890. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1891. * @txrx_soc: DP SOC handle
  1892. *
  1893. * Return: None
  1894. */
  1895. static void dp_soc_wds_detach(struct dp_soc *soc)
  1896. {
  1897. qdf_timer_stop(&soc->ast_aging_timer);
  1898. qdf_timer_free(&soc->ast_aging_timer);
  1899. }
  1900. #else
  1901. static void dp_soc_wds_attach(struct dp_soc *soc)
  1902. {
  1903. }
  1904. static void dp_soc_wds_detach(struct dp_soc *soc)
  1905. {
  1906. }
  1907. #endif
  1908. /*
  1909. * dp_soc_reset_ring_map() - Reset cpu ring map
  1910. * @soc: Datapath soc handler
  1911. *
  1912. * This api resets the default cpu ring map
  1913. */
  1914. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1915. {
  1916. uint8_t i;
  1917. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1918. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1919. switch (nss_config) {
  1920. case dp_nss_cfg_first_radio:
  1921. /*
  1922. * Setting Tx ring map for one nss offloaded radio
  1923. */
  1924. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1925. break;
  1926. case dp_nss_cfg_second_radio:
  1927. /*
  1928. * Setting Tx ring for two nss offloaded radios
  1929. */
  1930. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1931. break;
  1932. case dp_nss_cfg_dbdc:
  1933. /*
  1934. * Setting Tx ring map for 2 nss offloaded radios
  1935. */
  1936. soc->tx_ring_map[i] =
  1937. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  1938. break;
  1939. case dp_nss_cfg_dbtc:
  1940. /*
  1941. * Setting Tx ring map for 3 nss offloaded radios
  1942. */
  1943. soc->tx_ring_map[i] =
  1944. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  1945. break;
  1946. default:
  1947. dp_err("tx_ring_map failed due to invalid nss cfg");
  1948. break;
  1949. }
  1950. }
  1951. }
  1952. /*
  1953. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1954. * @dp_soc - DP soc handle
  1955. * @ring_type - ring type
  1956. * @ring_num - ring_num
  1957. *
  1958. * return 0 or 1
  1959. */
  1960. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1961. {
  1962. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1963. uint8_t status = 0;
  1964. switch (ring_type) {
  1965. case WBM2SW_RELEASE:
  1966. case REO_DST:
  1967. case RXDMA_BUF:
  1968. status = ((nss_config) & (1 << ring_num));
  1969. break;
  1970. default:
  1971. break;
  1972. }
  1973. return status;
  1974. }
  1975. /*
  1976. * dp_soc_reset_intr_mask() - reset interrupt mask
  1977. * @dp_soc - DP Soc handle
  1978. *
  1979. * Return: Return void
  1980. */
  1981. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1982. {
  1983. uint8_t j;
  1984. int *grp_mask = NULL;
  1985. int group_number, mask, num_ring;
  1986. /* number of tx ring */
  1987. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1988. /*
  1989. * group mask for tx completion ring.
  1990. */
  1991. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1992. /* loop and reset the mask for only offloaded ring */
  1993. for (j = 0; j < num_ring; j++) {
  1994. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1995. continue;
  1996. }
  1997. /*
  1998. * Group number corresponding to tx offloaded ring.
  1999. */
  2000. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2001. if (group_number < 0) {
  2002. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2003. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2004. WBM2SW_RELEASE, j);
  2005. return;
  2006. }
  2007. /* reset the tx mask for offloaded ring */
  2008. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2009. mask &= (~(1 << j));
  2010. /*
  2011. * reset the interrupt mask for offloaded ring.
  2012. */
  2013. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2014. }
  2015. /* number of rx rings */
  2016. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2017. /*
  2018. * group mask for reo destination ring.
  2019. */
  2020. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2021. /* loop and reset the mask for only offloaded ring */
  2022. for (j = 0; j < num_ring; j++) {
  2023. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  2024. continue;
  2025. }
  2026. /*
  2027. * Group number corresponding to rx offloaded ring.
  2028. */
  2029. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2030. if (group_number < 0) {
  2031. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2032. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2033. REO_DST, j);
  2034. return;
  2035. }
  2036. /* set the interrupt mask for offloaded ring */
  2037. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2038. mask &= (~(1 << j));
  2039. /*
  2040. * set the interrupt mask to zero for rx offloaded radio.
  2041. */
  2042. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2043. }
  2044. /*
  2045. * group mask for Rx buffer refill ring
  2046. */
  2047. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2048. /* loop and reset the mask for only offloaded ring */
  2049. for (j = 0; j < MAX_PDEV_CNT; j++) {
  2050. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  2051. continue;
  2052. }
  2053. /*
  2054. * Group number corresponding to rx offloaded ring.
  2055. */
  2056. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2057. if (group_number < 0) {
  2058. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2059. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2060. REO_DST, j);
  2061. return;
  2062. }
  2063. /* set the interrupt mask for offloaded ring */
  2064. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2065. group_number);
  2066. mask &= (~(1 << j));
  2067. /*
  2068. * set the interrupt mask to zero for rx offloaded radio.
  2069. */
  2070. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2071. group_number, mask);
  2072. }
  2073. }
  2074. #ifdef IPA_OFFLOAD
  2075. /**
  2076. * dp_reo_remap_config() - configure reo remap register value based
  2077. * nss configuration.
  2078. * based on offload_radio value below remap configuration
  2079. * get applied.
  2080. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  2081. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  2082. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  2083. * 3 - both Radios handled by NSS (remap not required)
  2084. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  2085. *
  2086. * @remap1: output parameter indicates reo remap 1 register value
  2087. * @remap2: output parameter indicates reo remap 2 register value
  2088. * Return: bool type, true if remap is configured else false.
  2089. */
  2090. static bool dp_reo_remap_config(struct dp_soc *soc,
  2091. uint32_t *remap1,
  2092. uint32_t *remap2)
  2093. {
  2094. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  2095. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  2096. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  2097. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  2098. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  2099. return true;
  2100. }
  2101. #else
  2102. static bool dp_reo_remap_config(struct dp_soc *soc,
  2103. uint32_t *remap1,
  2104. uint32_t *remap2)
  2105. {
  2106. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2107. switch (offload_radio) {
  2108. case dp_nss_cfg_default:
  2109. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2110. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2111. (0x3 << 18) | (0x4 << 21)) << 8;
  2112. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2113. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2114. (0x3 << 18) | (0x4 << 21)) << 8;
  2115. break;
  2116. case dp_nss_cfg_first_radio:
  2117. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  2118. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  2119. (0x2 << 18) | (0x3 << 21)) << 8;
  2120. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  2121. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  2122. (0x4 << 18) | (0x2 << 21)) << 8;
  2123. break;
  2124. case dp_nss_cfg_second_radio:
  2125. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  2126. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  2127. (0x1 << 18) | (0x3 << 21)) << 8;
  2128. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  2129. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  2130. (0x4 << 18) | (0x1 << 21)) << 8;
  2131. break;
  2132. case dp_nss_cfg_dbdc:
  2133. case dp_nss_cfg_dbtc:
  2134. /* return false if both or all are offloaded to NSS */
  2135. return false;
  2136. }
  2137. dp_debug("remap1 %x remap2 %x offload_radio %u",
  2138. *remap1, *remap2, offload_radio);
  2139. return true;
  2140. }
  2141. #endif
  2142. /*
  2143. * dp_reo_frag_dst_set() - configure reo register to set the
  2144. * fragment destination ring
  2145. * @soc : Datapath soc
  2146. * @frag_dst_ring : output parameter to set fragment destination ring
  2147. *
  2148. * Based on offload_radio below fragment destination rings is selected
  2149. * 0 - TCL
  2150. * 1 - SW1
  2151. * 2 - SW2
  2152. * 3 - SW3
  2153. * 4 - SW4
  2154. * 5 - Release
  2155. * 6 - FW
  2156. * 7 - alternate select
  2157. *
  2158. * return: void
  2159. */
  2160. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  2161. {
  2162. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2163. switch (offload_radio) {
  2164. case dp_nss_cfg_default:
  2165. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  2166. break;
  2167. case dp_nss_cfg_dbdc:
  2168. case dp_nss_cfg_dbtc:
  2169. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  2170. break;
  2171. default:
  2172. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2173. FL("dp_reo_frag_dst_set invalid offload radio config"));
  2174. break;
  2175. }
  2176. }
  2177. /*
  2178. * dp_soc_cmn_setup() - Common SoC level initializion
  2179. * @soc: Datapath SOC handle
  2180. *
  2181. * This is an internal function used to setup common SOC data structures,
  2182. * to be called from PDEV attach after receiving HW mode capabilities from FW
  2183. */
  2184. static int dp_soc_cmn_setup(struct dp_soc *soc)
  2185. {
  2186. int i;
  2187. struct hal_reo_params reo_params;
  2188. int tx_ring_size;
  2189. int tx_comp_ring_size;
  2190. int reo_dst_ring_size;
  2191. uint32_t entries;
  2192. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2193. if (qdf_atomic_read(&soc->cmn_init_done))
  2194. return 0;
  2195. if (dp_hw_link_desc_pool_setup(soc))
  2196. goto fail1;
  2197. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2198. /* Setup SRNG rings */
  2199. /* Common rings */
  2200. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  2201. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  2202. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2203. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  2204. goto fail1;
  2205. }
  2206. soc->num_tcl_data_rings = 0;
  2207. /* Tx data rings */
  2208. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  2209. soc->num_tcl_data_rings =
  2210. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  2211. tx_comp_ring_size =
  2212. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2213. tx_ring_size =
  2214. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2215. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2216. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  2217. TCL_DATA, i, 0, tx_ring_size)) {
  2218. QDF_TRACE(QDF_MODULE_ID_DP,
  2219. QDF_TRACE_LEVEL_ERROR,
  2220. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2221. goto fail1;
  2222. }
  2223. /*
  2224. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2225. * count
  2226. */
  2227. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2228. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2229. QDF_TRACE(QDF_MODULE_ID_DP,
  2230. QDF_TRACE_LEVEL_ERROR,
  2231. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2232. goto fail1;
  2233. }
  2234. }
  2235. } else {
  2236. /* This will be incremented during per pdev ring setup */
  2237. soc->num_tcl_data_rings = 0;
  2238. }
  2239. if (dp_tx_soc_attach(soc)) {
  2240. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2241. FL("dp_tx_soc_attach failed"));
  2242. goto fail1;
  2243. }
  2244. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2245. /* TCL command and status rings */
  2246. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2247. entries)) {
  2248. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2249. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2250. goto fail1;
  2251. }
  2252. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2253. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2254. entries)) {
  2255. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2256. FL("dp_srng_setup failed for tcl_status_ring"));
  2257. goto fail1;
  2258. }
  2259. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2260. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2261. * descriptors
  2262. */
  2263. /* Rx data rings */
  2264. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2265. soc->num_reo_dest_rings =
  2266. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2267. QDF_TRACE(QDF_MODULE_ID_DP,
  2268. QDF_TRACE_LEVEL_INFO,
  2269. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2270. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2271. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2272. i, 0, reo_dst_ring_size)) {
  2273. QDF_TRACE(QDF_MODULE_ID_DP,
  2274. QDF_TRACE_LEVEL_ERROR,
  2275. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2276. goto fail1;
  2277. }
  2278. }
  2279. } else {
  2280. /* This will be incremented during per pdev ring setup */
  2281. soc->num_reo_dest_rings = 0;
  2282. }
  2283. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2284. /* LMAC RxDMA to SW Rings configuration */
  2285. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2286. /* Only valid for MCL */
  2287. struct dp_pdev *pdev = soc->pdev_list[0];
  2288. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2289. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2290. RXDMA_DST, 0, i,
  2291. entries)) {
  2292. QDF_TRACE(QDF_MODULE_ID_DP,
  2293. QDF_TRACE_LEVEL_ERROR,
  2294. FL(RNG_ERR "rxdma_err_dst_ring"));
  2295. goto fail1;
  2296. }
  2297. }
  2298. }
  2299. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2300. /* REO reinjection ring */
  2301. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2302. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2303. entries)) {
  2304. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2305. FL("dp_srng_setup failed for reo_reinject_ring"));
  2306. goto fail1;
  2307. }
  2308. /* Rx release ring */
  2309. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2310. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2311. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2312. FL("dp_srng_setup failed for rx_rel_ring"));
  2313. goto fail1;
  2314. }
  2315. /* Rx exception ring */
  2316. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2317. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2318. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2319. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2320. FL("dp_srng_setup failed for reo_exception_ring"));
  2321. goto fail1;
  2322. }
  2323. /* REO command and status rings */
  2324. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2325. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2326. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2327. FL("dp_srng_setup failed for reo_cmd_ring"));
  2328. goto fail1;
  2329. }
  2330. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2331. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2332. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2333. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2334. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2335. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2336. FL("dp_srng_setup failed for reo_status_ring"));
  2337. goto fail1;
  2338. }
  2339. qdf_spinlock_create(&soc->ast_lock);
  2340. dp_soc_wds_attach(soc);
  2341. /* Reset the cpu ring map if radio is NSS offloaded */
  2342. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2343. dp_soc_reset_cpu_ring_map(soc);
  2344. dp_soc_reset_intr_mask(soc);
  2345. }
  2346. /* Setup HW REO */
  2347. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2348. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2349. /*
  2350. * Reo ring remap is not required if both radios
  2351. * are offloaded to NSS
  2352. */
  2353. if (!dp_reo_remap_config(soc,
  2354. &reo_params.remap1,
  2355. &reo_params.remap2))
  2356. goto out;
  2357. reo_params.rx_hash_enabled = true;
  2358. }
  2359. /* setup the global rx defrag waitlist */
  2360. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2361. soc->rx.defrag.timeout_ms =
  2362. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2363. soc->rx.flags.defrag_timeout_check =
  2364. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2365. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2366. out:
  2367. /*
  2368. * set the fragment destination ring
  2369. */
  2370. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2371. hal_reo_setup(soc->hal_soc, &reo_params);
  2372. qdf_atomic_set(&soc->cmn_init_done, 1);
  2373. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2374. return 0;
  2375. fail1:
  2376. /*
  2377. * Cleanup will be done as part of soc_detach, which will
  2378. * be called on pdev attach failure
  2379. */
  2380. return QDF_STATUS_E_FAILURE;
  2381. }
  2382. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2383. static void dp_lro_hash_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2384. {
  2385. struct cdp_lro_hash_config lro_hash;
  2386. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2387. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2388. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2389. FL("LRO disabled RX hash disabled"));
  2390. return;
  2391. }
  2392. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2393. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2394. lro_hash.lro_enable = 1;
  2395. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2396. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2397. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2398. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2399. }
  2400. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2401. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2402. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2403. LRO_IPV4_SEED_ARR_SZ));
  2404. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2405. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2406. LRO_IPV6_SEED_ARR_SZ));
  2407. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2408. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2409. lro_hash.lro_enable, lro_hash.tcp_flag,
  2410. lro_hash.tcp_flag_mask);
  2411. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2412. QDF_TRACE_LEVEL_ERROR,
  2413. (void *)lro_hash.toeplitz_hash_ipv4,
  2414. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2415. LRO_IPV4_SEED_ARR_SZ));
  2416. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2417. QDF_TRACE_LEVEL_ERROR,
  2418. (void *)lro_hash.toeplitz_hash_ipv6,
  2419. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2420. LRO_IPV6_SEED_ARR_SZ));
  2421. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2422. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2423. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2424. (pdev->ctrl_pdev, &lro_hash);
  2425. }
  2426. /*
  2427. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2428. * @soc: data path SoC handle
  2429. * @pdev: Physical device handle
  2430. *
  2431. * Return: 0 - success, > 0 - failure
  2432. */
  2433. #ifdef QCA_HOST2FW_RXBUF_RING
  2434. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2435. struct dp_pdev *pdev)
  2436. {
  2437. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2438. int max_mac_rings;
  2439. int i;
  2440. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2441. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2442. for (i = 0; i < max_mac_rings; i++) {
  2443. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2444. "%s: pdev_id %d mac_id %d",
  2445. __func__, pdev->pdev_id, i);
  2446. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2447. RXDMA_BUF, 1, i,
  2448. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2449. QDF_TRACE(QDF_MODULE_ID_DP,
  2450. QDF_TRACE_LEVEL_ERROR,
  2451. FL("failed rx mac ring setup"));
  2452. return QDF_STATUS_E_FAILURE;
  2453. }
  2454. }
  2455. return QDF_STATUS_SUCCESS;
  2456. }
  2457. #else
  2458. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2459. struct dp_pdev *pdev)
  2460. {
  2461. return QDF_STATUS_SUCCESS;
  2462. }
  2463. #endif
  2464. /**
  2465. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2466. * @pdev - DP_PDEV handle
  2467. *
  2468. * Return: void
  2469. */
  2470. static inline void
  2471. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2472. {
  2473. uint8_t map_id;
  2474. struct dp_soc *soc = pdev->soc;
  2475. if (!soc)
  2476. return;
  2477. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2478. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2479. default_dscp_tid_map,
  2480. sizeof(default_dscp_tid_map));
  2481. }
  2482. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2483. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2484. default_dscp_tid_map,
  2485. map_id);
  2486. }
  2487. }
  2488. #ifdef IPA_OFFLOAD
  2489. /**
  2490. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2491. * @soc: data path instance
  2492. * @pdev: core txrx pdev context
  2493. *
  2494. * Return: QDF_STATUS_SUCCESS: success
  2495. * QDF_STATUS_E_RESOURCES: Error return
  2496. */
  2497. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2498. struct dp_pdev *pdev)
  2499. {
  2500. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2501. int entries;
  2502. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2503. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2504. /* Setup second Rx refill buffer ring */
  2505. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2506. IPA_RX_REFILL_BUF_RING_IDX,
  2507. pdev->pdev_id,
  2508. entries)) {
  2509. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2510. FL("dp_srng_setup failed second rx refill ring"));
  2511. return QDF_STATUS_E_FAILURE;
  2512. }
  2513. return QDF_STATUS_SUCCESS;
  2514. }
  2515. /**
  2516. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2517. * @soc: data path instance
  2518. * @pdev: core txrx pdev context
  2519. *
  2520. * Return: void
  2521. */
  2522. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2523. struct dp_pdev *pdev)
  2524. {
  2525. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2526. IPA_RX_REFILL_BUF_RING_IDX);
  2527. }
  2528. #else
  2529. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2530. struct dp_pdev *pdev)
  2531. {
  2532. return QDF_STATUS_SUCCESS;
  2533. }
  2534. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2535. struct dp_pdev *pdev)
  2536. {
  2537. }
  2538. #endif
  2539. #if !defined(DISABLE_MON_CONFIG)
  2540. /**
  2541. * dp_mon_rings_setup() - Initialize Monitor rings based on target
  2542. * @soc: soc handle
  2543. * @pdev: physical device handle
  2544. *
  2545. * Return: nonzero on failure and zero on success
  2546. */
  2547. static
  2548. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2549. {
  2550. int mac_id = 0;
  2551. int pdev_id = pdev->pdev_id;
  2552. int entries;
  2553. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2554. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2555. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2556. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2557. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  2558. entries =
  2559. wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2560. if (dp_srng_setup(soc,
  2561. &pdev->rxdma_mon_buf_ring[mac_id],
  2562. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2563. entries)) {
  2564. QDF_TRACE(QDF_MODULE_ID_DP,
  2565. QDF_TRACE_LEVEL_ERROR,
  2566. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2567. return QDF_STATUS_E_NOMEM;
  2568. }
  2569. entries =
  2570. wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2571. if (dp_srng_setup(soc,
  2572. &pdev->rxdma_mon_dst_ring[mac_id],
  2573. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2574. entries)) {
  2575. QDF_TRACE(QDF_MODULE_ID_DP,
  2576. QDF_TRACE_LEVEL_ERROR,
  2577. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2578. return QDF_STATUS_E_NOMEM;
  2579. }
  2580. entries =
  2581. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2582. if (dp_srng_setup(soc,
  2583. &pdev->rxdma_mon_status_ring[mac_id],
  2584. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2585. entries)) {
  2586. QDF_TRACE(QDF_MODULE_ID_DP,
  2587. QDF_TRACE_LEVEL_ERROR,
  2588. FL(RNG_ERR "rxdma_mon_status_ring"));
  2589. return QDF_STATUS_E_NOMEM;
  2590. }
  2591. entries =
  2592. wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2593. if (dp_srng_setup(soc,
  2594. &pdev->rxdma_mon_desc_ring[mac_id],
  2595. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2596. entries)) {
  2597. QDF_TRACE(QDF_MODULE_ID_DP,
  2598. QDF_TRACE_LEVEL_ERROR,
  2599. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2600. return QDF_STATUS_E_NOMEM;
  2601. }
  2602. } else {
  2603. entries =
  2604. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2605. if (dp_srng_setup(soc,
  2606. &pdev->rxdma_mon_status_ring[mac_id],
  2607. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2608. entries)) {
  2609. QDF_TRACE(QDF_MODULE_ID_DP,
  2610. QDF_TRACE_LEVEL_ERROR,
  2611. FL(RNG_ERR "rxdma_mon_status_ring"));
  2612. return QDF_STATUS_E_NOMEM;
  2613. }
  2614. }
  2615. }
  2616. return QDF_STATUS_SUCCESS;
  2617. }
  2618. #else
  2619. static
  2620. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2621. {
  2622. return QDF_STATUS_SUCCESS;
  2623. }
  2624. #endif
  2625. /*dp_iterate_update_peer_list - update peer stats on cal client timer
  2626. * @pdev_hdl: pdev handle
  2627. */
  2628. #ifdef ATH_SUPPORT_EXT_STAT
  2629. void dp_iterate_update_peer_list(void *pdev_hdl)
  2630. {
  2631. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  2632. struct dp_vdev *vdev = NULL;
  2633. struct dp_peer *peer = NULL;
  2634. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  2635. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  2636. dp_cal_client_update_peer_stats(&peer->stats);
  2637. }
  2638. }
  2639. }
  2640. #else
  2641. void dp_iterate_update_peer_list(void *pdev_hdl)
  2642. {
  2643. }
  2644. #endif
  2645. /*
  2646. * dp_pdev_attach_wifi3() - attach txrx pdev
  2647. * @ctrl_pdev: Opaque PDEV object
  2648. * @txrx_soc: Datapath SOC handle
  2649. * @htc_handle: HTC handle for host-target interface
  2650. * @qdf_osdev: QDF OS device
  2651. * @pdev_id: PDEV ID
  2652. *
  2653. * Return: DP PDEV handle on success, NULL on failure
  2654. */
  2655. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2656. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2657. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2658. {
  2659. int tx_ring_size;
  2660. int tx_comp_ring_size;
  2661. int reo_dst_ring_size;
  2662. int entries;
  2663. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2664. int nss_cfg;
  2665. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2666. struct dp_pdev *pdev = NULL;
  2667. if (soc->dp_soc_reinit)
  2668. pdev = soc->pdev_list[pdev_id];
  2669. else
  2670. pdev = qdf_mem_malloc(sizeof(*pdev));
  2671. if (!pdev) {
  2672. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2673. FL("DP PDEV memory allocation failed"));
  2674. goto fail0;
  2675. }
  2676. /*
  2677. * Variable to prevent double pdev deinitialization during
  2678. * radio detach execution .i.e. in the absence of any vdev.
  2679. */
  2680. pdev->pdev_deinit = 0;
  2681. pdev->invalid_peer = qdf_mem_malloc(sizeof(struct dp_peer));
  2682. if (!pdev->invalid_peer) {
  2683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2684. FL("Invalid peer memory allocation failed"));
  2685. qdf_mem_free(pdev);
  2686. goto fail0;
  2687. }
  2688. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2689. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2690. if (!pdev->wlan_cfg_ctx) {
  2691. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2692. FL("pdev cfg_attach failed"));
  2693. qdf_mem_free(pdev->invalid_peer);
  2694. qdf_mem_free(pdev);
  2695. goto fail0;
  2696. }
  2697. /*
  2698. * set nss pdev config based on soc config
  2699. */
  2700. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2701. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2702. (nss_cfg & (1 << pdev_id)));
  2703. pdev->soc = soc;
  2704. pdev->ctrl_pdev = ctrl_pdev;
  2705. pdev->pdev_id = pdev_id;
  2706. soc->pdev_list[pdev_id] = pdev;
  2707. pdev->lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, pdev_id);
  2708. soc->pdev_count++;
  2709. TAILQ_INIT(&pdev->vdev_list);
  2710. qdf_spinlock_create(&pdev->vdev_list_lock);
  2711. pdev->vdev_count = 0;
  2712. qdf_spinlock_create(&pdev->tx_mutex);
  2713. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2714. TAILQ_INIT(&pdev->neighbour_peers_list);
  2715. pdev->neighbour_peers_added = false;
  2716. if (dp_soc_cmn_setup(soc)) {
  2717. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2718. FL("dp_soc_cmn_setup failed"));
  2719. goto fail1;
  2720. }
  2721. /* Setup per PDEV TCL rings if configured */
  2722. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2723. tx_ring_size =
  2724. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2725. tx_comp_ring_size =
  2726. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2727. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2728. pdev_id, pdev_id, tx_ring_size)) {
  2729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2730. FL("dp_srng_setup failed for tcl_data_ring"));
  2731. goto fail1;
  2732. }
  2733. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2734. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2735. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2736. FL("dp_srng_setup failed for tx_comp_ring"));
  2737. goto fail1;
  2738. }
  2739. soc->num_tcl_data_rings++;
  2740. }
  2741. /* Tx specific init */
  2742. if (dp_tx_pdev_attach(pdev)) {
  2743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2744. FL("dp_tx_pdev_attach failed"));
  2745. goto fail1;
  2746. }
  2747. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2748. /* Setup per PDEV REO rings if configured */
  2749. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2750. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2751. pdev_id, pdev_id, reo_dst_ring_size)) {
  2752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2753. FL("dp_srng_setup failed for reo_dest_ringn"));
  2754. goto fail1;
  2755. }
  2756. soc->num_reo_dest_rings++;
  2757. }
  2758. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2759. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2760. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2761. FL("dp_srng_setup failed rx refill ring"));
  2762. goto fail1;
  2763. }
  2764. if (dp_rxdma_ring_setup(soc, pdev)) {
  2765. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2766. FL("RXDMA ring config failed"));
  2767. goto fail1;
  2768. }
  2769. if (dp_mon_rings_setup(soc, pdev)) {
  2770. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2771. FL("MONITOR rings setup failed"));
  2772. goto fail1;
  2773. }
  2774. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2775. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2776. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2777. 0, pdev_id,
  2778. entries)) {
  2779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2780. FL(RNG_ERR "rxdma_err_dst_ring"));
  2781. goto fail1;
  2782. }
  2783. }
  2784. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2785. goto fail1;
  2786. if (dp_ipa_ring_resource_setup(soc, pdev))
  2787. goto fail1;
  2788. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2789. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2790. FL("dp_ipa_uc_attach failed"));
  2791. goto fail1;
  2792. }
  2793. /* Rx specific init */
  2794. if (dp_rx_pdev_attach(pdev)) {
  2795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2796. FL("dp_rx_pdev_attach failed"));
  2797. goto fail1;
  2798. }
  2799. DP_STATS_INIT(pdev);
  2800. /* Monitor filter init */
  2801. pdev->mon_filter_mode = MON_FILTER_ALL;
  2802. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2803. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2804. pdev->fp_data_filter = FILTER_DATA_ALL;
  2805. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2806. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2807. pdev->mo_data_filter = FILTER_DATA_ALL;
  2808. dp_local_peer_id_pool_init(pdev);
  2809. dp_dscp_tid_map_setup(pdev);
  2810. /* Rx monitor mode specific init */
  2811. if (dp_rx_pdev_mon_attach(pdev)) {
  2812. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2813. "dp_rx_pdev_mon_attach failed");
  2814. goto fail1;
  2815. }
  2816. if (dp_wdi_event_attach(pdev)) {
  2817. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2818. "dp_wdi_evet_attach failed");
  2819. goto fail1;
  2820. }
  2821. /* set the reo destination during initialization */
  2822. pdev->reo_dest = pdev->pdev_id + 1;
  2823. /*
  2824. * initialize ppdu tlv list
  2825. */
  2826. TAILQ_INIT(&pdev->ppdu_info_list);
  2827. pdev->tlv_count = 0;
  2828. pdev->list_depth = 0;
  2829. qdf_mem_zero(&pdev->sojourn_stats, sizeof(struct cdp_tx_sojourn_stats));
  2830. pdev->sojourn_buf = qdf_nbuf_alloc(pdev->soc->osdev,
  2831. sizeof(struct cdp_tx_sojourn_stats), 0, 4,
  2832. TRUE);
  2833. /* initlialize cal client timer */
  2834. dp_cal_client_attach(&pdev->cal_client_ctx, pdev, pdev->soc->osdev,
  2835. &dp_iterate_update_peer_list);
  2836. return (struct cdp_pdev *)pdev;
  2837. fail1:
  2838. dp_pdev_detach((struct cdp_pdev *)pdev, 0);
  2839. fail0:
  2840. return NULL;
  2841. }
  2842. /*
  2843. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2844. * @soc: data path SoC handle
  2845. * @pdev: Physical device handle
  2846. *
  2847. * Return: void
  2848. */
  2849. #ifdef QCA_HOST2FW_RXBUF_RING
  2850. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2851. struct dp_pdev *pdev)
  2852. {
  2853. int max_mac_rings =
  2854. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2855. int i;
  2856. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2857. max_mac_rings : MAX_RX_MAC_RINGS;
  2858. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2859. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2860. RXDMA_BUF, 1);
  2861. qdf_timer_free(&soc->mon_reap_timer);
  2862. }
  2863. #else
  2864. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2865. struct dp_pdev *pdev)
  2866. {
  2867. }
  2868. #endif
  2869. /*
  2870. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2871. * @pdev: device object
  2872. *
  2873. * Return: void
  2874. */
  2875. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2876. {
  2877. struct dp_neighbour_peer *peer = NULL;
  2878. struct dp_neighbour_peer *temp_peer = NULL;
  2879. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2880. neighbour_peer_list_elem, temp_peer) {
  2881. /* delete this peer from the list */
  2882. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2883. peer, neighbour_peer_list_elem);
  2884. qdf_mem_free(peer);
  2885. }
  2886. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2887. }
  2888. /**
  2889. * dp_htt_ppdu_stats_detach() - detach stats resources
  2890. * @pdev: Datapath PDEV handle
  2891. *
  2892. * Return: void
  2893. */
  2894. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2895. {
  2896. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2897. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2898. ppdu_info_list_elem, ppdu_info_next) {
  2899. if (!ppdu_info)
  2900. break;
  2901. qdf_assert_always(ppdu_info->nbuf);
  2902. qdf_nbuf_free(ppdu_info->nbuf);
  2903. qdf_mem_free(ppdu_info);
  2904. }
  2905. }
  2906. #if !defined(DISABLE_MON_CONFIG)
  2907. static
  2908. void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  2909. int mac_id)
  2910. {
  2911. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  2912. dp_srng_cleanup(soc,
  2913. &pdev->rxdma_mon_buf_ring[mac_id],
  2914. RXDMA_MONITOR_BUF, 0);
  2915. dp_srng_cleanup(soc,
  2916. &pdev->rxdma_mon_dst_ring[mac_id],
  2917. RXDMA_MONITOR_DST, 0);
  2918. dp_srng_cleanup(soc,
  2919. &pdev->rxdma_mon_status_ring[mac_id],
  2920. RXDMA_MONITOR_STATUS, 0);
  2921. dp_srng_cleanup(soc,
  2922. &pdev->rxdma_mon_desc_ring[mac_id],
  2923. RXDMA_MONITOR_DESC, 0);
  2924. dp_srng_cleanup(soc,
  2925. &pdev->rxdma_err_dst_ring[mac_id],
  2926. RXDMA_DST, 0);
  2927. } else {
  2928. dp_srng_cleanup(soc,
  2929. &pdev->rxdma_mon_status_ring[mac_id],
  2930. RXDMA_MONITOR_STATUS, 0);
  2931. dp_srng_cleanup(soc,
  2932. &pdev->rxdma_err_dst_ring[mac_id],
  2933. RXDMA_DST, 0);
  2934. }
  2935. }
  2936. #else
  2937. static void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  2938. int mac_id)
  2939. {
  2940. }
  2941. #endif
  2942. /**
  2943. * dp_mon_ring_deinit() - Placeholder to deinitialize Monitor rings
  2944. *
  2945. * @soc: soc handle
  2946. * @pdev: datapath physical dev handle
  2947. * @mac_id: mac number
  2948. *
  2949. * Return: None
  2950. */
  2951. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2952. int mac_id)
  2953. {
  2954. }
  2955. /**
  2956. * dp_pdev_mem_reset() - Reset txrx pdev memory
  2957. * @pdev: dp pdev handle
  2958. *
  2959. * Return: None
  2960. */
  2961. static void dp_pdev_mem_reset(struct dp_pdev *pdev)
  2962. {
  2963. uint16_t len = 0;
  2964. uint8_t *dp_pdev_offset = (uint8_t *)pdev;
  2965. len = sizeof(struct dp_pdev) -
  2966. offsetof(struct dp_pdev, pdev_deinit) -
  2967. sizeof(pdev->pdev_deinit);
  2968. dp_pdev_offset = dp_pdev_offset +
  2969. offsetof(struct dp_pdev, pdev_deinit) +
  2970. sizeof(pdev->pdev_deinit);
  2971. qdf_mem_zero(dp_pdev_offset, len);
  2972. }
  2973. /**
  2974. * dp_pdev_deinit() - Deinit txrx pdev
  2975. * @txrx_pdev: Datapath PDEV handle
  2976. * @force: Force deinit
  2977. *
  2978. * Return: None
  2979. */
  2980. static void dp_pdev_deinit(struct cdp_pdev *txrx_pdev, int force)
  2981. {
  2982. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2983. struct dp_soc *soc = pdev->soc;
  2984. qdf_nbuf_t curr_nbuf, next_nbuf;
  2985. int mac_id;
  2986. /*
  2987. * Prevent double pdev deinitialization during radio detach
  2988. * execution .i.e. in the absence of any vdev
  2989. */
  2990. if (pdev->pdev_deinit)
  2991. return;
  2992. pdev->pdev_deinit = 1;
  2993. dp_wdi_event_detach(pdev);
  2994. dp_tx_pdev_detach(pdev);
  2995. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2996. dp_srng_deinit(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2997. TCL_DATA, pdev->pdev_id);
  2998. dp_srng_deinit(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2999. WBM2SW_RELEASE, pdev->pdev_id);
  3000. }
  3001. dp_pktlogmod_exit(pdev);
  3002. dp_rx_pdev_detach(pdev);
  3003. dp_rx_pdev_mon_detach(pdev);
  3004. dp_neighbour_peers_detach(pdev);
  3005. qdf_spinlock_destroy(&pdev->tx_mutex);
  3006. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  3007. dp_ipa_uc_detach(soc, pdev);
  3008. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  3009. /* Cleanup per PDEV REO rings if configured */
  3010. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3011. dp_srng_deinit(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3012. REO_DST, pdev->pdev_id);
  3013. }
  3014. dp_srng_deinit(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3015. dp_rxdma_ring_cleanup(soc, pdev);
  3016. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3017. dp_mon_ring_deinit(soc, pdev, mac_id);
  3018. dp_srng_deinit(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3019. RXDMA_DST, 0);
  3020. }
  3021. curr_nbuf = pdev->invalid_peer_head_msdu;
  3022. while (curr_nbuf) {
  3023. next_nbuf = qdf_nbuf_next(curr_nbuf);
  3024. qdf_nbuf_free(curr_nbuf);
  3025. curr_nbuf = next_nbuf;
  3026. }
  3027. pdev->invalid_peer_head_msdu = NULL;
  3028. pdev->invalid_peer_tail_msdu = NULL;
  3029. dp_htt_ppdu_stats_detach(pdev);
  3030. qdf_nbuf_free(pdev->sojourn_buf);
  3031. dp_cal_client_detach(&pdev->cal_client_ctx);
  3032. soc->pdev_count--;
  3033. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  3034. qdf_mem_free(pdev->invalid_peer);
  3035. qdf_mem_free(pdev->dp_txrx_handle);
  3036. dp_pdev_mem_reset(pdev);
  3037. }
  3038. /**
  3039. * dp_pdev_deinit_wifi3() - Deinit txrx pdev
  3040. * @txrx_pdev: Datapath PDEV handle
  3041. * @force: Force deinit
  3042. *
  3043. * Return: None
  3044. */
  3045. static void dp_pdev_deinit_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3046. {
  3047. dp_pdev_deinit(txrx_pdev, force);
  3048. }
  3049. /*
  3050. * dp_pdev_detach() - Complete rest of pdev detach
  3051. * @txrx_pdev: Datapath PDEV handle
  3052. * @force: Force deinit
  3053. *
  3054. * Return: None
  3055. */
  3056. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force)
  3057. {
  3058. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3059. struct dp_soc *soc = pdev->soc;
  3060. int mac_id;
  3061. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3062. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3063. TCL_DATA, pdev->pdev_id);
  3064. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3065. WBM2SW_RELEASE, pdev->pdev_id);
  3066. }
  3067. dp_mon_link_free(pdev);
  3068. /* Cleanup per PDEV REO rings if configured */
  3069. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3070. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3071. REO_DST, pdev->pdev_id);
  3072. }
  3073. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3074. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3075. dp_mon_ring_cleanup(soc, pdev, mac_id);
  3076. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3077. RXDMA_DST, 0);
  3078. }
  3079. soc->pdev_list[pdev->pdev_id] = NULL;
  3080. qdf_mem_free(pdev);
  3081. }
  3082. /*
  3083. * dp_pdev_detach_wifi3() - detach txrx pdev
  3084. * @txrx_pdev: Datapath PDEV handle
  3085. * @force: Force detach
  3086. *
  3087. * Return: None
  3088. */
  3089. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3090. {
  3091. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3092. struct dp_soc *soc = pdev->soc;
  3093. if (soc->dp_soc_reinit) {
  3094. dp_pdev_detach(txrx_pdev, force);
  3095. } else {
  3096. dp_pdev_deinit(txrx_pdev, force);
  3097. dp_pdev_detach(txrx_pdev, force);
  3098. }
  3099. }
  3100. /*
  3101. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  3102. * @soc: DP SOC handle
  3103. */
  3104. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  3105. {
  3106. struct reo_desc_list_node *desc;
  3107. struct dp_rx_tid *rx_tid;
  3108. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  3109. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  3110. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  3111. rx_tid = &desc->rx_tid;
  3112. qdf_mem_unmap_nbytes_single(soc->osdev,
  3113. rx_tid->hw_qdesc_paddr,
  3114. QDF_DMA_BIDIRECTIONAL,
  3115. rx_tid->hw_qdesc_alloc_size);
  3116. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  3117. qdf_mem_free(desc);
  3118. }
  3119. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  3120. qdf_list_destroy(&soc->reo_desc_freelist);
  3121. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  3122. }
  3123. /**
  3124. * dp_soc_mem_reset() - Reset Dp Soc memory
  3125. * @soc: DP handle
  3126. *
  3127. * Return: None
  3128. */
  3129. static void dp_soc_mem_reset(struct dp_soc *soc)
  3130. {
  3131. uint16_t len = 0;
  3132. uint8_t *dp_soc_offset = (uint8_t *)soc;
  3133. len = sizeof(struct dp_soc) -
  3134. offsetof(struct dp_soc, dp_soc_reinit) -
  3135. sizeof(soc->dp_soc_reinit);
  3136. dp_soc_offset = dp_soc_offset +
  3137. offsetof(struct dp_soc, dp_soc_reinit) +
  3138. sizeof(soc->dp_soc_reinit);
  3139. qdf_mem_zero(dp_soc_offset, len);
  3140. }
  3141. /**
  3142. * dp_soc_deinit() - Deinitialize txrx SOC
  3143. * @txrx_soc: Opaque DP SOC handle
  3144. *
  3145. * Return: None
  3146. */
  3147. static void dp_soc_deinit(void *txrx_soc)
  3148. {
  3149. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3150. int i;
  3151. qdf_atomic_set(&soc->cmn_init_done, 0);
  3152. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3153. if (soc->pdev_list[i])
  3154. dp_pdev_deinit((struct cdp_pdev *)
  3155. soc->pdev_list[i], 1);
  3156. }
  3157. qdf_flush_work(&soc->htt_stats.work);
  3158. qdf_disable_work(&soc->htt_stats.work);
  3159. /* Free pending htt stats messages */
  3160. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  3161. dp_reo_cmdlist_destroy(soc);
  3162. dp_peer_find_detach(soc);
  3163. /* Free the ring memories */
  3164. /* Common rings */
  3165. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3166. /* Tx data rings */
  3167. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3168. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3169. dp_srng_deinit(soc, &soc->tcl_data_ring[i],
  3170. TCL_DATA, i);
  3171. dp_srng_deinit(soc, &soc->tx_comp_ring[i],
  3172. WBM2SW_RELEASE, i);
  3173. }
  3174. }
  3175. /* TCL command and status rings */
  3176. dp_srng_deinit(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3177. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3178. /* Rx data rings */
  3179. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3180. soc->num_reo_dest_rings =
  3181. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3182. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3183. /* TODO: Get number of rings and ring sizes
  3184. * from wlan_cfg
  3185. */
  3186. dp_srng_deinit(soc, &soc->reo_dest_ring[i],
  3187. REO_DST, i);
  3188. }
  3189. }
  3190. /* REO reinjection ring */
  3191. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3192. /* Rx release ring */
  3193. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3194. /* Rx exception ring */
  3195. /* TODO: Better to store ring_type and ring_num in
  3196. * dp_srng during setup
  3197. */
  3198. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3199. /* REO command and status rings */
  3200. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3201. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3202. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  3203. qdf_spinlock_destroy(&soc->htt_stats.lock);
  3204. htt_soc_htc_dealloc(soc->htt_handle);
  3205. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  3206. dp_reo_cmdlist_destroy(soc);
  3207. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  3208. dp_reo_desc_freelist_destroy(soc);
  3209. dp_soc_wds_detach(soc);
  3210. qdf_spinlock_destroy(&soc->ast_lock);
  3211. dp_soc_mem_reset(soc);
  3212. }
  3213. /**
  3214. * dp_soc_deinit_wifi3() - Deinitialize txrx SOC
  3215. * @txrx_soc: Opaque DP SOC handle
  3216. *
  3217. * Return: None
  3218. */
  3219. static void dp_soc_deinit_wifi3(void *txrx_soc)
  3220. {
  3221. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3222. soc->dp_soc_reinit = 1;
  3223. dp_soc_deinit(txrx_soc);
  3224. }
  3225. /*
  3226. * dp_soc_detach() - Detach rest of txrx SOC
  3227. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3228. *
  3229. * Return: None
  3230. */
  3231. static void dp_soc_detach(void *txrx_soc)
  3232. {
  3233. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3234. int i;
  3235. qdf_atomic_set(&soc->cmn_init_done, 0);
  3236. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  3237. * SW descriptors
  3238. */
  3239. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3240. if (soc->pdev_list[i])
  3241. dp_pdev_detach((struct cdp_pdev *)
  3242. soc->pdev_list[i], 1);
  3243. }
  3244. /* Free the ring memories */
  3245. /* Common rings */
  3246. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3247. dp_tx_soc_detach(soc);
  3248. /* Tx data rings */
  3249. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3250. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3251. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  3252. TCL_DATA, i);
  3253. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  3254. WBM2SW_RELEASE, i);
  3255. }
  3256. }
  3257. /* TCL command and status rings */
  3258. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3259. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3260. /* Rx data rings */
  3261. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3262. soc->num_reo_dest_rings =
  3263. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3264. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3265. /* TODO: Get number of rings and ring sizes
  3266. * from wlan_cfg
  3267. */
  3268. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  3269. REO_DST, i);
  3270. }
  3271. }
  3272. /* REO reinjection ring */
  3273. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3274. /* Rx release ring */
  3275. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3276. /* Rx exception ring */
  3277. /* TODO: Better to store ring_type and ring_num in
  3278. * dp_srng during setup
  3279. */
  3280. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3281. /* REO command and status rings */
  3282. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3283. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3284. dp_hw_link_desc_pool_cleanup(soc);
  3285. htt_soc_detach(soc->htt_handle);
  3286. soc->dp_soc_reinit = 0;
  3287. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  3288. qdf_mem_free(soc);
  3289. }
  3290. /*
  3291. * dp_soc_detach_wifi3() - Detach txrx SOC
  3292. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3293. *
  3294. * Return: None
  3295. */
  3296. static void dp_soc_detach_wifi3(void *txrx_soc)
  3297. {
  3298. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3299. if (soc->dp_soc_reinit) {
  3300. dp_soc_detach(txrx_soc);
  3301. } else {
  3302. dp_soc_deinit(txrx_soc);
  3303. dp_soc_detach(txrx_soc);
  3304. }
  3305. }
  3306. #if !defined(DISABLE_MON_CONFIG)
  3307. /**
  3308. * dp_mon_htt_srng_setup() - Prepare HTT messages for Monitor rings
  3309. * @soc: soc handle
  3310. * @pdev: physical device handle
  3311. * @mac_id: ring number
  3312. * @mac_for_pdev: mac_id
  3313. *
  3314. * Return: non-zero for failure, zero for success
  3315. */
  3316. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3317. struct dp_pdev *pdev,
  3318. int mac_id,
  3319. int mac_for_pdev)
  3320. {
  3321. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3322. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3323. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3324. pdev->rxdma_mon_buf_ring[mac_id]
  3325. .hal_srng,
  3326. RXDMA_MONITOR_BUF);
  3327. if (status != QDF_STATUS_SUCCESS) {
  3328. dp_err("Failed to send htt srng setup message for Rxdma mon buf ring");
  3329. return status;
  3330. }
  3331. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3332. pdev->rxdma_mon_dst_ring[mac_id]
  3333. .hal_srng,
  3334. RXDMA_MONITOR_DST);
  3335. if (status != QDF_STATUS_SUCCESS) {
  3336. dp_err("Failed to send htt srng setup message for Rxdma mon dst ring");
  3337. return status;
  3338. }
  3339. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3340. pdev->rxdma_mon_status_ring[mac_id]
  3341. .hal_srng,
  3342. RXDMA_MONITOR_STATUS);
  3343. if (status != QDF_STATUS_SUCCESS) {
  3344. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3345. return status;
  3346. }
  3347. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3348. pdev->rxdma_mon_desc_ring[mac_id]
  3349. .hal_srng,
  3350. RXDMA_MONITOR_DESC);
  3351. if (status != QDF_STATUS_SUCCESS) {
  3352. dp_err("Failed to send htt srng message for Rxdma mon desc ring");
  3353. return status;
  3354. }
  3355. } else {
  3356. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3357. pdev->rxdma_mon_status_ring[mac_id]
  3358. .hal_srng,
  3359. RXDMA_MONITOR_STATUS);
  3360. if (status != QDF_STATUS_SUCCESS) {
  3361. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3362. return status;
  3363. }
  3364. }
  3365. return status;
  3366. }
  3367. #else
  3368. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3369. struct dp_pdev *pdev,
  3370. int mac_id,
  3371. int mac_for_pdev)
  3372. {
  3373. return QDF_STATUS_SUCCESS;
  3374. }
  3375. #endif
  3376. /*
  3377. * dp_rxdma_ring_config() - configure the RX DMA rings
  3378. *
  3379. * This function is used to configure the MAC rings.
  3380. * On MCL host provides buffers in Host2FW ring
  3381. * FW refills (copies) buffers to the ring and updates
  3382. * ring_idx in register
  3383. *
  3384. * @soc: data path SoC handle
  3385. *
  3386. * Return: zero on success, non-zero on failure
  3387. */
  3388. #ifdef QCA_HOST2FW_RXBUF_RING
  3389. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3390. {
  3391. int i;
  3392. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3393. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3394. struct dp_pdev *pdev = soc->pdev_list[i];
  3395. if (pdev) {
  3396. int mac_id;
  3397. bool dbs_enable = 0;
  3398. int max_mac_rings =
  3399. wlan_cfg_get_num_mac_rings
  3400. (pdev->wlan_cfg_ctx);
  3401. htt_srng_setup(soc->htt_handle, 0,
  3402. pdev->rx_refill_buf_ring.hal_srng,
  3403. RXDMA_BUF);
  3404. if (pdev->rx_refill_buf_ring2.hal_srng)
  3405. htt_srng_setup(soc->htt_handle, 0,
  3406. pdev->rx_refill_buf_ring2.hal_srng,
  3407. RXDMA_BUF);
  3408. if (soc->cdp_soc.ol_ops->
  3409. is_hw_dbs_2x2_capable) {
  3410. dbs_enable = soc->cdp_soc.ol_ops->
  3411. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  3412. }
  3413. if (dbs_enable) {
  3414. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3415. QDF_TRACE_LEVEL_ERROR,
  3416. FL("DBS enabled max_mac_rings %d"),
  3417. max_mac_rings);
  3418. } else {
  3419. max_mac_rings = 1;
  3420. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3421. QDF_TRACE_LEVEL_ERROR,
  3422. FL("DBS disabled, max_mac_rings %d"),
  3423. max_mac_rings);
  3424. }
  3425. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3426. FL("pdev_id %d max_mac_rings %d"),
  3427. pdev->pdev_id, max_mac_rings);
  3428. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  3429. int mac_for_pdev = dp_get_mac_id_for_pdev(
  3430. mac_id, pdev->pdev_id);
  3431. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3432. QDF_TRACE_LEVEL_ERROR,
  3433. FL("mac_id %d"), mac_for_pdev);
  3434. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3435. pdev->rx_mac_buf_ring[mac_id]
  3436. .hal_srng,
  3437. RXDMA_BUF);
  3438. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3439. pdev->rxdma_err_dst_ring[mac_id]
  3440. .hal_srng,
  3441. RXDMA_DST);
  3442. /* Configure monitor mode rings */
  3443. status = dp_mon_htt_srng_setup(soc, pdev,
  3444. mac_id,
  3445. mac_for_pdev);
  3446. if (status != QDF_STATUS_SUCCESS) {
  3447. dp_err("Failed to send htt monitor messages to target");
  3448. return status;
  3449. }
  3450. }
  3451. }
  3452. }
  3453. /*
  3454. * Timer to reap rxdma status rings.
  3455. * Needed until we enable ppdu end interrupts
  3456. */
  3457. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  3458. dp_service_mon_rings, (void *)soc,
  3459. QDF_TIMER_TYPE_WAKE_APPS);
  3460. soc->reap_timer_init = 1;
  3461. return status;
  3462. }
  3463. #else
  3464. /* This is only for WIN */
  3465. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3466. {
  3467. int i;
  3468. int mac_id;
  3469. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3470. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3471. struct dp_pdev *pdev = soc->pdev_list[i];
  3472. if (pdev == NULL)
  3473. continue;
  3474. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3475. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  3476. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3477. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3478. #ifndef DISABLE_MON_CONFIG
  3479. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3480. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3481. RXDMA_MONITOR_BUF);
  3482. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3483. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3484. RXDMA_MONITOR_DST);
  3485. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3486. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3487. RXDMA_MONITOR_STATUS);
  3488. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3489. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3490. RXDMA_MONITOR_DESC);
  3491. #endif
  3492. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3493. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3494. RXDMA_DST);
  3495. }
  3496. }
  3497. return status;
  3498. }
  3499. #endif
  3500. /*
  3501. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3502. * @cdp_soc: Opaque Datapath SOC handle
  3503. *
  3504. * Return: zero on success, non-zero on failure
  3505. */
  3506. static QDF_STATUS
  3507. dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3508. {
  3509. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3510. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3511. htt_soc_attach_target(soc->htt_handle);
  3512. status = dp_rxdma_ring_config(soc);
  3513. if (status != QDF_STATUS_SUCCESS) {
  3514. dp_err("Failed to send htt srng setup messages to target");
  3515. return status;
  3516. }
  3517. DP_STATS_INIT(soc);
  3518. /* initialize work queue for stats processing */
  3519. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3520. return QDF_STATUS_SUCCESS;
  3521. }
  3522. /*
  3523. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3524. * @txrx_soc: Datapath SOC handle
  3525. */
  3526. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3527. {
  3528. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3529. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3530. }
  3531. /*
  3532. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3533. * @txrx_soc: Datapath SOC handle
  3534. * @nss_cfg: nss config
  3535. */
  3536. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3537. {
  3538. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3539. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3540. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3541. /*
  3542. * TODO: masked out based on the per offloaded radio
  3543. */
  3544. switch (config) {
  3545. case dp_nss_cfg_default:
  3546. break;
  3547. case dp_nss_cfg_dbdc:
  3548. case dp_nss_cfg_dbtc:
  3549. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3550. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3551. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3552. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3553. break;
  3554. default:
  3555. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3556. "Invalid offload config %d", config);
  3557. }
  3558. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3559. FL("nss-wifi<0> nss config is enabled"));
  3560. }
  3561. /*
  3562. * dp_vdev_attach_wifi3() - attach txrx vdev
  3563. * @txrx_pdev: Datapath PDEV handle
  3564. * @vdev_mac_addr: MAC address of the virtual interface
  3565. * @vdev_id: VDEV Id
  3566. * @wlan_op_mode: VDEV operating mode
  3567. *
  3568. * Return: DP VDEV handle on success, NULL on failure
  3569. */
  3570. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3571. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3572. {
  3573. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3574. struct dp_soc *soc = pdev->soc;
  3575. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3576. if (!vdev) {
  3577. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3578. FL("DP VDEV memory allocation failed"));
  3579. goto fail0;
  3580. }
  3581. vdev->pdev = pdev;
  3582. vdev->vdev_id = vdev_id;
  3583. vdev->opmode = op_mode;
  3584. vdev->osdev = soc->osdev;
  3585. vdev->osif_rx = NULL;
  3586. vdev->osif_rsim_rx_decap = NULL;
  3587. vdev->osif_get_key = NULL;
  3588. vdev->osif_rx_mon = NULL;
  3589. vdev->osif_tx_free_ext = NULL;
  3590. vdev->osif_vdev = NULL;
  3591. vdev->delete.pending = 0;
  3592. vdev->safemode = 0;
  3593. vdev->drop_unenc = 1;
  3594. vdev->sec_type = cdp_sec_type_none;
  3595. #ifdef notyet
  3596. vdev->filters_num = 0;
  3597. #endif
  3598. qdf_mem_copy(
  3599. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3600. /* TODO: Initialize default HTT meta data that will be used in
  3601. * TCL descriptors for packets transmitted from this VDEV
  3602. */
  3603. TAILQ_INIT(&vdev->peer_list);
  3604. if (wlan_op_mode_monitor == vdev->opmode) {
  3605. pdev->monitor_vdev = vdev;
  3606. return (struct cdp_vdev *)vdev;
  3607. }
  3608. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3609. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3610. vdev->dscp_tid_map_id = 0;
  3611. vdev->mcast_enhancement_en = 0;
  3612. vdev->raw_mode_war = wlan_cfg_get_raw_mode_war(soc->wlan_cfg_ctx);
  3613. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3614. /* add this vdev into the pdev's list */
  3615. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3616. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3617. pdev->vdev_count++;
  3618. dp_tx_vdev_attach(vdev);
  3619. if ((soc->intr_mode == DP_INTR_POLL) &&
  3620. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3621. if (pdev->vdev_count == 1)
  3622. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3623. }
  3624. if (pdev->vdev_count == 1)
  3625. dp_lro_hash_setup(soc, pdev);
  3626. /* LRO */
  3627. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  3628. wlan_op_mode_sta == vdev->opmode)
  3629. vdev->lro_enable = true;
  3630. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3631. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  3632. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3633. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3634. DP_STATS_INIT(vdev);
  3635. if (wlan_op_mode_sta == vdev->opmode)
  3636. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3637. vdev->mac_addr.raw,
  3638. NULL);
  3639. return (struct cdp_vdev *)vdev;
  3640. fail0:
  3641. return NULL;
  3642. }
  3643. /**
  3644. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3645. * @vdev: Datapath VDEV handle
  3646. * @osif_vdev: OSIF vdev handle
  3647. * @ctrl_vdev: UMAC vdev handle
  3648. * @txrx_ops: Tx and Rx operations
  3649. *
  3650. * Return: DP VDEV handle on success, NULL on failure
  3651. */
  3652. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3653. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3654. struct ol_txrx_ops *txrx_ops)
  3655. {
  3656. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3657. vdev->osif_vdev = osif_vdev;
  3658. vdev->ctrl_vdev = ctrl_vdev;
  3659. vdev->osif_rx = txrx_ops->rx.rx;
  3660. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3661. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3662. vdev->osif_get_key = txrx_ops->get_key;
  3663. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3664. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3665. #ifdef notyet
  3666. #if ATH_SUPPORT_WAPI
  3667. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3668. #endif
  3669. #endif
  3670. #ifdef UMAC_SUPPORT_PROXY_ARP
  3671. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3672. #endif
  3673. vdev->me_convert = txrx_ops->me_convert;
  3674. /* TODO: Enable the following once Tx code is integrated */
  3675. if (vdev->mesh_vdev)
  3676. txrx_ops->tx.tx = dp_tx_send_mesh;
  3677. else
  3678. txrx_ops->tx.tx = dp_tx_send;
  3679. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3680. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3681. "DP Vdev Register success");
  3682. }
  3683. /**
  3684. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3685. * @vdev: Datapath VDEV handle
  3686. *
  3687. * Return: void
  3688. */
  3689. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  3690. {
  3691. struct dp_pdev *pdev = vdev->pdev;
  3692. struct dp_soc *soc = pdev->soc;
  3693. struct dp_peer *peer;
  3694. uint16_t *peer_ids;
  3695. uint8_t i = 0, j = 0;
  3696. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3697. if (!peer_ids) {
  3698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3699. "DP alloc failure - unable to flush peers");
  3700. return;
  3701. }
  3702. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3703. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3704. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3705. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3706. if (j < soc->max_peers)
  3707. peer_ids[j++] = peer->peer_ids[i];
  3708. }
  3709. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3710. for (i = 0; i < j ; i++)
  3711. dp_rx_peer_unmap_handler(soc, peer_ids[i], vdev->vdev_id,
  3712. NULL, 0);
  3713. qdf_mem_free(peer_ids);
  3714. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3715. FL("Flushed peers for vdev object %pK "), vdev);
  3716. }
  3717. /*
  3718. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3719. * @txrx_vdev: Datapath VDEV handle
  3720. * @callback: Callback OL_IF on completion of detach
  3721. * @cb_context: Callback context
  3722. *
  3723. */
  3724. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  3725. ol_txrx_vdev_delete_cb callback, void *cb_context)
  3726. {
  3727. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3728. struct dp_pdev *pdev = vdev->pdev;
  3729. struct dp_soc *soc = pdev->soc;
  3730. struct dp_neighbour_peer *peer = NULL;
  3731. /* preconditions */
  3732. qdf_assert(vdev);
  3733. if (wlan_op_mode_monitor == vdev->opmode)
  3734. goto free_vdev;
  3735. if (wlan_op_mode_sta == vdev->opmode)
  3736. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  3737. /*
  3738. * If Target is hung, flush all peers before detaching vdev
  3739. * this will free all references held due to missing
  3740. * unmap commands from Target
  3741. */
  3742. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3743. dp_vdev_flush_peers(vdev);
  3744. /*
  3745. * Use peer_ref_mutex while accessing peer_list, in case
  3746. * a peer is in the process of being removed from the list.
  3747. */
  3748. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3749. /* check that the vdev has no peers allocated */
  3750. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3751. /* debug print - will be removed later */
  3752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3753. FL("not deleting vdev object %pK (%pM)"
  3754. "until deletion finishes for all its peers"),
  3755. vdev, vdev->mac_addr.raw);
  3756. /* indicate that the vdev needs to be deleted */
  3757. vdev->delete.pending = 1;
  3758. vdev->delete.callback = callback;
  3759. vdev->delete.context = cb_context;
  3760. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3761. return;
  3762. }
  3763. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3764. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3765. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3766. neighbour_peer_list_elem) {
  3767. QDF_ASSERT(peer->vdev != vdev);
  3768. }
  3769. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3770. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3771. dp_tx_vdev_detach(vdev);
  3772. /* remove the vdev from its parent pdev's list */
  3773. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  3774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3775. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3776. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3777. free_vdev:
  3778. qdf_mem_free(vdev);
  3779. if (callback)
  3780. callback(cb_context);
  3781. }
  3782. /*
  3783. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3784. * @soc - datapath soc handle
  3785. * @peer - datapath peer handle
  3786. *
  3787. * Delete the AST entries belonging to a peer
  3788. */
  3789. #ifdef FEATURE_AST
  3790. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3791. struct dp_peer *peer)
  3792. {
  3793. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3794. qdf_spin_lock_bh(&soc->ast_lock);
  3795. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3796. dp_peer_del_ast(soc, ast_entry);
  3797. peer->self_ast_entry = NULL;
  3798. TAILQ_INIT(&peer->ast_entry_list);
  3799. qdf_spin_unlock_bh(&soc->ast_lock);
  3800. }
  3801. #else
  3802. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3803. struct dp_peer *peer)
  3804. {
  3805. }
  3806. #endif
  3807. #if ATH_SUPPORT_WRAP
  3808. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3809. uint8_t *peer_mac_addr)
  3810. {
  3811. struct dp_peer *peer;
  3812. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3813. 0, vdev->vdev_id);
  3814. if (!peer)
  3815. return NULL;
  3816. if (peer->bss_peer)
  3817. return peer;
  3818. dp_peer_unref_delete(peer);
  3819. return NULL;
  3820. }
  3821. #else
  3822. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3823. uint8_t *peer_mac_addr)
  3824. {
  3825. struct dp_peer *peer;
  3826. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3827. 0, vdev->vdev_id);
  3828. if (!peer)
  3829. return NULL;
  3830. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  3831. return peer;
  3832. dp_peer_unref_delete(peer);
  3833. return NULL;
  3834. }
  3835. #endif
  3836. #if defined(FEATURE_AST)
  3837. #if !defined(AST_HKV1_WORKAROUND)
  3838. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  3839. uint8_t *peer_mac_addr)
  3840. {
  3841. struct dp_ast_entry *ast_entry;
  3842. qdf_spin_lock_bh(&soc->ast_lock);
  3843. ast_entry = dp_peer_ast_hash_find_soc(soc, peer_mac_addr);
  3844. if (ast_entry && ast_entry->next_hop)
  3845. dp_peer_del_ast(soc, ast_entry);
  3846. qdf_spin_unlock_bh(&soc->ast_lock);
  3847. }
  3848. #else
  3849. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  3850. uint8_t *peer_mac_addr)
  3851. {
  3852. struct dp_ast_entry *ast_entry;
  3853. if (soc->ast_override_support) {
  3854. qdf_spin_lock_bh(&soc->ast_lock);
  3855. ast_entry = dp_peer_ast_hash_find_soc(soc, peer_mac_addr);
  3856. if (ast_entry && ast_entry->next_hop)
  3857. dp_peer_del_ast(soc, ast_entry);
  3858. qdf_spin_unlock_bh(&soc->ast_lock);
  3859. }
  3860. }
  3861. #endif
  3862. #else
  3863. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  3864. uint8_t *peer_mac_addr)
  3865. {
  3866. }
  3867. #endif
  3868. /*
  3869. * dp_peer_create_wifi3() - attach txrx peer
  3870. * @txrx_vdev: Datapath VDEV handle
  3871. * @peer_mac_addr: Peer MAC address
  3872. *
  3873. * Return: DP peeer handle on success, NULL on failure
  3874. */
  3875. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3876. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  3877. {
  3878. struct dp_peer *peer;
  3879. int i;
  3880. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3881. struct dp_pdev *pdev;
  3882. struct dp_soc *soc;
  3883. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  3884. /* preconditions */
  3885. qdf_assert(vdev);
  3886. qdf_assert(peer_mac_addr);
  3887. pdev = vdev->pdev;
  3888. soc = pdev->soc;
  3889. /*
  3890. * If a peer entry with given MAC address already exists,
  3891. * reuse the peer and reset the state of peer.
  3892. */
  3893. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  3894. if (peer) {
  3895. qdf_atomic_init(&peer->is_default_route_set);
  3896. dp_peer_cleanup(vdev, peer);
  3897. peer->delete_in_progress = false;
  3898. dp_peer_delete_ast_entries(soc, peer);
  3899. if ((vdev->opmode == wlan_op_mode_sta) &&
  3900. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  3901. DP_MAC_ADDR_LEN)) {
  3902. ast_type = CDP_TXRX_AST_TYPE_SELF;
  3903. }
  3904. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  3905. /*
  3906. * Control path maintains a node count which is incremented
  3907. * for every new peer create command. Since new peer is not being
  3908. * created and earlier reference is reused here,
  3909. * peer_unref_delete event is sent to control path to
  3910. * increment the count back.
  3911. */
  3912. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3913. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3914. vdev->vdev_id, peer->mac_addr.raw);
  3915. }
  3916. peer->ctrl_peer = ctrl_peer;
  3917. dp_local_peer_id_alloc(pdev, peer);
  3918. DP_STATS_INIT(peer);
  3919. return (void *)peer;
  3920. } else {
  3921. /*
  3922. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  3923. * need to remove the AST entry which was earlier added as a WDS
  3924. * entry.
  3925. * If an AST entry exists, but no peer entry exists with a given
  3926. * MAC addresses, we could deduce it as a WDS entry
  3927. */
  3928. dp_peer_ast_handle_roam_del(soc, peer_mac_addr);
  3929. }
  3930. #ifdef notyet
  3931. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3932. soc->mempool_ol_ath_peer);
  3933. #else
  3934. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3935. #endif
  3936. if (!peer)
  3937. return NULL; /* failure */
  3938. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3939. TAILQ_INIT(&peer->ast_entry_list);
  3940. /* store provided params */
  3941. peer->vdev = vdev;
  3942. peer->ctrl_peer = ctrl_peer;
  3943. if ((vdev->opmode == wlan_op_mode_sta) &&
  3944. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  3945. DP_MAC_ADDR_LEN)) {
  3946. ast_type = CDP_TXRX_AST_TYPE_SELF;
  3947. }
  3948. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  3949. qdf_spinlock_create(&peer->peer_info_lock);
  3950. qdf_mem_copy(
  3951. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3952. /* TODO: See of rx_opt_proc is really required */
  3953. peer->rx_opt_proc = soc->rx_opt_proc;
  3954. /* initialize the peer_id */
  3955. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3956. peer->peer_ids[i] = HTT_INVALID_PEER;
  3957. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3958. qdf_atomic_init(&peer->ref_cnt);
  3959. /* keep one reference for attach */
  3960. qdf_atomic_inc(&peer->ref_cnt);
  3961. /* add this peer into the vdev's list */
  3962. if (wlan_op_mode_sta == vdev->opmode)
  3963. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3964. else
  3965. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3966. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3967. /* TODO: See if hash based search is required */
  3968. dp_peer_find_hash_add(soc, peer);
  3969. /* Initialize the peer state */
  3970. peer->state = OL_TXRX_PEER_STATE_DISC;
  3971. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3972. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3973. vdev, peer, peer->mac_addr.raw,
  3974. qdf_atomic_read(&peer->ref_cnt));
  3975. /*
  3976. * For every peer MAp message search and set if bss_peer
  3977. */
  3978. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3980. "vdev bss_peer!!!!");
  3981. peer->bss_peer = 1;
  3982. vdev->vap_bss_peer = peer;
  3983. }
  3984. for (i = 0; i < DP_MAX_TIDS; i++)
  3985. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  3986. dp_local_peer_id_alloc(pdev, peer);
  3987. DP_STATS_INIT(peer);
  3988. return (void *)peer;
  3989. }
  3990. /*
  3991. * dp_vdev_get_default_reo_hash() - get reo dest ring and hash values for a vdev
  3992. * @vdev: Datapath VDEV handle
  3993. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  3994. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  3995. *
  3996. * Return: None
  3997. */
  3998. static
  3999. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  4000. enum cdp_host_reo_dest_ring *reo_dest,
  4001. bool *hash_based)
  4002. {
  4003. struct dp_soc *soc;
  4004. struct dp_pdev *pdev;
  4005. pdev = vdev->pdev;
  4006. soc = pdev->soc;
  4007. /*
  4008. * hash based steering is disabled for Radios which are offloaded
  4009. * to NSS
  4010. */
  4011. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  4012. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  4013. /*
  4014. * Below line of code will ensure the proper reo_dest ring is chosen
  4015. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  4016. */
  4017. *reo_dest = pdev->reo_dest;
  4018. }
  4019. #ifdef IPA_OFFLOAD
  4020. /*
  4021. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4022. * @vdev: Datapath VDEV handle
  4023. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4024. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4025. *
  4026. * If IPA is enabled in ini, for SAP mode, disable hash based
  4027. * steering, use default reo_dst ring for RX. Use config values for other modes.
  4028. * Return: None
  4029. */
  4030. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4031. enum cdp_host_reo_dest_ring *reo_dest,
  4032. bool *hash_based)
  4033. {
  4034. struct dp_soc *soc;
  4035. struct dp_pdev *pdev;
  4036. pdev = vdev->pdev;
  4037. soc = pdev->soc;
  4038. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4039. /*
  4040. * If IPA is enabled, disable hash-based flow steering and set
  4041. * reo_dest_ring_4 as the REO ring to receive packets on.
  4042. * IPA is configured to reap reo_dest_ring_4.
  4043. *
  4044. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  4045. * value enum value is from 1 - 4.
  4046. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  4047. */
  4048. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4049. if (vdev->opmode == wlan_op_mode_ap) {
  4050. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  4051. *hash_based = 0;
  4052. }
  4053. }
  4054. }
  4055. #else
  4056. /*
  4057. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4058. * @vdev: Datapath VDEV handle
  4059. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4060. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4061. *
  4062. * Use system config values for hash based steering.
  4063. * Return: None
  4064. */
  4065. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4066. enum cdp_host_reo_dest_ring *reo_dest,
  4067. bool *hash_based)
  4068. {
  4069. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4070. }
  4071. #endif /* IPA_OFFLOAD */
  4072. /*
  4073. * dp_peer_setup_wifi3() - initialize the peer
  4074. * @vdev_hdl: virtual device object
  4075. * @peer: Peer object
  4076. *
  4077. * Return: void
  4078. */
  4079. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  4080. {
  4081. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  4082. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4083. struct dp_pdev *pdev;
  4084. struct dp_soc *soc;
  4085. bool hash_based = 0;
  4086. enum cdp_host_reo_dest_ring reo_dest;
  4087. /* preconditions */
  4088. qdf_assert(vdev);
  4089. qdf_assert(peer);
  4090. pdev = vdev->pdev;
  4091. soc = pdev->soc;
  4092. peer->last_assoc_rcvd = 0;
  4093. peer->last_disassoc_rcvd = 0;
  4094. peer->last_deauth_rcvd = 0;
  4095. dp_peer_setup_get_reo_hash(vdev, &reo_dest, &hash_based);
  4096. dp_info("pdev: %d vdev :%d opmode:%u hash-based-steering:%d default-reo_dest:%u",
  4097. pdev->pdev_id, vdev->vdev_id,
  4098. vdev->opmode, hash_based, reo_dest);
  4099. /*
  4100. * There are corner cases where the AD1 = AD2 = "VAPs address"
  4101. * i.e both the devices have same MAC address. In these
  4102. * cases we want such pkts to be processed in NULL Q handler
  4103. * which is REO2TCL ring. for this reason we should
  4104. * not setup reo_queues and default route for bss_peer.
  4105. */
  4106. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap)
  4107. return;
  4108. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  4109. /* TODO: Check the destination ring number to be passed to FW */
  4110. soc->cdp_soc.ol_ops->peer_set_default_routing(
  4111. pdev->ctrl_pdev, peer->mac_addr.raw,
  4112. peer->vdev->vdev_id, hash_based, reo_dest);
  4113. }
  4114. qdf_atomic_set(&peer->is_default_route_set, 1);
  4115. dp_peer_rx_init(pdev, peer);
  4116. return;
  4117. }
  4118. /*
  4119. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  4120. * @vdev_handle: virtual device object
  4121. * @htt_pkt_type: type of pkt
  4122. *
  4123. * Return: void
  4124. */
  4125. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  4126. enum htt_cmn_pkt_type val)
  4127. {
  4128. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4129. vdev->tx_encap_type = val;
  4130. }
  4131. /*
  4132. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  4133. * @vdev_handle: virtual device object
  4134. * @htt_pkt_type: type of pkt
  4135. *
  4136. * Return: void
  4137. */
  4138. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  4139. enum htt_cmn_pkt_type val)
  4140. {
  4141. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4142. vdev->rx_decap_type = val;
  4143. }
  4144. /*
  4145. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  4146. * @txrx_soc: cdp soc handle
  4147. * @ac: Access category
  4148. * @value: timeout value in millisec
  4149. *
  4150. * Return: void
  4151. */
  4152. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4153. uint8_t ac, uint32_t value)
  4154. {
  4155. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4156. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  4157. }
  4158. /*
  4159. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  4160. * @txrx_soc: cdp soc handle
  4161. * @ac: access category
  4162. * @value: timeout value in millisec
  4163. *
  4164. * Return: void
  4165. */
  4166. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4167. uint8_t ac, uint32_t *value)
  4168. {
  4169. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4170. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  4171. }
  4172. /*
  4173. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  4174. * @pdev_handle: physical device object
  4175. * @val: reo destination ring index (1 - 4)
  4176. *
  4177. * Return: void
  4178. */
  4179. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  4180. enum cdp_host_reo_dest_ring val)
  4181. {
  4182. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4183. if (pdev)
  4184. pdev->reo_dest = val;
  4185. }
  4186. /*
  4187. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  4188. * @pdev_handle: physical device object
  4189. *
  4190. * Return: reo destination ring index
  4191. */
  4192. static enum cdp_host_reo_dest_ring
  4193. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  4194. {
  4195. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4196. if (pdev)
  4197. return pdev->reo_dest;
  4198. else
  4199. return cdp_host_reo_dest_ring_unknown;
  4200. }
  4201. /*
  4202. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  4203. * @pdev_handle: device object
  4204. * @val: value to be set
  4205. *
  4206. * Return: void
  4207. */
  4208. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  4209. uint32_t val)
  4210. {
  4211. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4212. /* Enable/Disable smart mesh filtering. This flag will be checked
  4213. * during rx processing to check if packets are from NAC clients.
  4214. */
  4215. pdev->filter_neighbour_peers = val;
  4216. return 0;
  4217. }
  4218. /*
  4219. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  4220. * address for smart mesh filtering
  4221. * @vdev_handle: virtual device object
  4222. * @cmd: Add/Del command
  4223. * @macaddr: nac client mac address
  4224. *
  4225. * Return: void
  4226. */
  4227. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  4228. uint32_t cmd, uint8_t *macaddr)
  4229. {
  4230. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4231. struct dp_pdev *pdev = vdev->pdev;
  4232. struct dp_neighbour_peer *peer = NULL;
  4233. if (!macaddr)
  4234. goto fail0;
  4235. /* Store address of NAC (neighbour peer) which will be checked
  4236. * against TA of received packets.
  4237. */
  4238. if (cmd == DP_NAC_PARAM_ADD) {
  4239. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  4240. sizeof(*peer));
  4241. if (!peer) {
  4242. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4243. FL("DP neighbour peer node memory allocation failed"));
  4244. goto fail0;
  4245. }
  4246. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  4247. macaddr, DP_MAC_ADDR_LEN);
  4248. peer->vdev = vdev;
  4249. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4250. /* add this neighbour peer into the list */
  4251. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  4252. neighbour_peer_list_elem);
  4253. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4254. /* first neighbour */
  4255. if (!pdev->neighbour_peers_added) {
  4256. pdev->neighbour_peers_added = true;
  4257. dp_ppdu_ring_cfg(pdev);
  4258. }
  4259. return 1;
  4260. } else if (cmd == DP_NAC_PARAM_DEL) {
  4261. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4262. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4263. neighbour_peer_list_elem) {
  4264. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  4265. macaddr, DP_MAC_ADDR_LEN)) {
  4266. /* delete this peer from the list */
  4267. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  4268. peer, neighbour_peer_list_elem);
  4269. qdf_mem_free(peer);
  4270. break;
  4271. }
  4272. }
  4273. /* last neighbour deleted */
  4274. if (TAILQ_EMPTY(&pdev->neighbour_peers_list))
  4275. pdev->neighbour_peers_added = false;
  4276. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4277. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  4278. !pdev->enhanced_stats_en)
  4279. dp_ppdu_ring_reset(pdev);
  4280. return 1;
  4281. }
  4282. fail0:
  4283. return 0;
  4284. }
  4285. /*
  4286. * dp_get_sec_type() - Get the security type
  4287. * @peer: Datapath peer handle
  4288. * @sec_idx: Security id (mcast, ucast)
  4289. *
  4290. * return sec_type: Security type
  4291. */
  4292. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  4293. {
  4294. struct dp_peer *dpeer = (struct dp_peer *)peer;
  4295. return dpeer->security[sec_idx].sec_type;
  4296. }
  4297. /*
  4298. * dp_peer_authorize() - authorize txrx peer
  4299. * @peer_handle: Datapath peer handle
  4300. * @authorize
  4301. *
  4302. */
  4303. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  4304. {
  4305. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4306. struct dp_soc *soc;
  4307. if (peer != NULL) {
  4308. soc = peer->vdev->pdev->soc;
  4309. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4310. peer->authorize = authorize ? 1 : 0;
  4311. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4312. }
  4313. }
  4314. static void dp_reset_and_release_peer_mem(struct dp_soc *soc,
  4315. struct dp_pdev *pdev,
  4316. struct dp_peer *peer,
  4317. uint32_t vdev_id)
  4318. {
  4319. struct dp_vdev *vdev = NULL;
  4320. struct dp_peer *bss_peer = NULL;
  4321. uint8_t *m_addr = NULL;
  4322. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4323. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4324. if (vdev->vdev_id == vdev_id)
  4325. break;
  4326. }
  4327. if (!vdev) {
  4328. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4329. "vdev is NULL");
  4330. } else {
  4331. if (vdev->vap_bss_peer == peer)
  4332. vdev->vap_bss_peer = NULL;
  4333. m_addr = peer->mac_addr.raw;
  4334. if (soc->cdp_soc.ol_ops->peer_unref_delete)
  4335. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4336. vdev_id, m_addr);
  4337. if (vdev && vdev->vap_bss_peer) {
  4338. bss_peer = vdev->vap_bss_peer;
  4339. DP_UPDATE_STATS(vdev, peer);
  4340. }
  4341. }
  4342. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4343. qdf_mem_free(peer);
  4344. }
  4345. /**
  4346. * dp_delete_pending_vdev() - check and process vdev delete
  4347. * @pdev: DP specific pdev pointer
  4348. * @vdev: DP specific vdev pointer
  4349. * @vdev_id: vdev id corresponding to vdev
  4350. *
  4351. * This API does following:
  4352. * 1) It releases tx flow pools buffers as vdev is
  4353. * going down and no peers are associated.
  4354. * 2) It also detaches vdev before cleaning vdev (struct dp_vdev) memory
  4355. */
  4356. static void dp_delete_pending_vdev(struct dp_pdev *pdev, struct dp_vdev *vdev,
  4357. uint8_t vdev_id)
  4358. {
  4359. ol_txrx_vdev_delete_cb vdev_delete_cb = NULL;
  4360. void *vdev_delete_context = NULL;
  4361. vdev_delete_cb = vdev->delete.callback;
  4362. vdev_delete_context = vdev->delete.context;
  4363. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4364. FL("deleting vdev object %pK (%pM)- its last peer is done"),
  4365. vdev, vdev->mac_addr.raw);
  4366. /* all peers are gone, go ahead and delete it */
  4367. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  4368. FLOW_TYPE_VDEV, vdev_id);
  4369. dp_tx_vdev_detach(vdev);
  4370. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4371. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4372. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4374. FL("deleting vdev object %pK (%pM)"),
  4375. vdev, vdev->mac_addr.raw);
  4376. qdf_mem_free(vdev);
  4377. vdev = NULL;
  4378. if (vdev_delete_cb)
  4379. vdev_delete_cb(vdev_delete_context);
  4380. }
  4381. /*
  4382. * dp_peer_unref_delete() - unref and delete peer
  4383. * @peer_handle: Datapath peer handle
  4384. *
  4385. */
  4386. void dp_peer_unref_delete(void *peer_handle)
  4387. {
  4388. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4389. struct dp_vdev *vdev = peer->vdev;
  4390. struct dp_pdev *pdev = vdev->pdev;
  4391. struct dp_soc *soc = pdev->soc;
  4392. struct dp_peer *tmppeer;
  4393. int found = 0;
  4394. uint16_t peer_id;
  4395. uint16_t vdev_id;
  4396. bool delete_vdev;
  4397. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4398. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  4399. peer, qdf_atomic_read(&peer->ref_cnt));
  4400. /*
  4401. * Hold the lock all the way from checking if the peer ref count
  4402. * is zero until the peer references are removed from the hash
  4403. * table and vdev list (if the peer ref count is zero).
  4404. * This protects against a new HL tx operation starting to use the
  4405. * peer object just after this function concludes it's done being used.
  4406. * Furthermore, the lock needs to be held while checking whether the
  4407. * vdev's list of peers is empty, to make sure that list is not modified
  4408. * concurrently with the empty check.
  4409. */
  4410. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4411. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  4412. peer_id = peer->peer_ids[0];
  4413. vdev_id = vdev->vdev_id;
  4414. /*
  4415. * Make sure that the reference to the peer in
  4416. * peer object map is removed
  4417. */
  4418. if (peer_id != HTT_INVALID_PEER)
  4419. soc->peer_id_to_obj_map[peer_id] = NULL;
  4420. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4421. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  4422. /* remove the reference to the peer from the hash table */
  4423. dp_peer_find_hash_remove(soc, peer);
  4424. qdf_spin_lock_bh(&soc->ast_lock);
  4425. if (peer->self_ast_entry) {
  4426. dp_peer_del_ast(soc, peer->self_ast_entry);
  4427. peer->self_ast_entry = NULL;
  4428. }
  4429. qdf_spin_unlock_bh(&soc->ast_lock);
  4430. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  4431. if (tmppeer == peer) {
  4432. found = 1;
  4433. break;
  4434. }
  4435. }
  4436. if (found) {
  4437. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  4438. peer_list_elem);
  4439. } else {
  4440. /*Ignoring the remove operation as peer not found*/
  4441. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4442. "peer:%pK not found in vdev:%pK peerlist:%pK",
  4443. peer, vdev, &peer->vdev->peer_list);
  4444. }
  4445. /* cleanup the peer data */
  4446. dp_peer_cleanup(vdev, peer);
  4447. /* check whether the parent vdev has no peers left */
  4448. if (TAILQ_EMPTY(&vdev->peer_list)) {
  4449. /*
  4450. * capture vdev delete pending flag's status
  4451. * while holding peer_ref_mutex lock
  4452. */
  4453. delete_vdev = vdev->delete.pending;
  4454. /*
  4455. * Now that there are no references to the peer, we can
  4456. * release the peer reference lock.
  4457. */
  4458. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4459. /*
  4460. * Check if the parent vdev was waiting for its peers
  4461. * to be deleted, in order for it to be deleted too.
  4462. */
  4463. if (delete_vdev)
  4464. dp_delete_pending_vdev(pdev, vdev, vdev_id);
  4465. } else {
  4466. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4467. }
  4468. dp_reset_and_release_peer_mem(soc, pdev, peer, vdev_id);
  4469. } else {
  4470. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4471. }
  4472. }
  4473. /*
  4474. * dp_peer_detach_wifi3() – Detach txrx peer
  4475. * @peer_handle: Datapath peer handle
  4476. * @bitmap: bitmap indicating special handling of request.
  4477. *
  4478. */
  4479. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4480. {
  4481. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4482. /* redirect the peer's rx delivery function to point to a
  4483. * discard func
  4484. */
  4485. peer->rx_opt_proc = dp_rx_discard;
  4486. peer->ctrl_peer = NULL;
  4487. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4488. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4489. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4490. qdf_spinlock_destroy(&peer->peer_info_lock);
  4491. /*
  4492. * Remove the reference added during peer_attach.
  4493. * The peer will still be left allocated until the
  4494. * PEER_UNMAP message arrives to remove the other
  4495. * reference, added by the PEER_MAP message.
  4496. */
  4497. dp_peer_unref_delete(peer_handle);
  4498. }
  4499. /*
  4500. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4501. * @peer_handle: Datapath peer handle
  4502. *
  4503. */
  4504. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4505. {
  4506. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4507. return vdev->mac_addr.raw;
  4508. }
  4509. /*
  4510. * dp_vdev_set_wds() - Enable per packet stats
  4511. * @vdev_handle: DP VDEV handle
  4512. * @val: value
  4513. *
  4514. * Return: none
  4515. */
  4516. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  4517. {
  4518. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4519. vdev->wds_enabled = val;
  4520. return 0;
  4521. }
  4522. /*
  4523. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  4524. * @peer_handle: Datapath peer handle
  4525. *
  4526. */
  4527. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  4528. uint8_t vdev_id)
  4529. {
  4530. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4531. struct dp_vdev *vdev = NULL;
  4532. if (qdf_unlikely(!pdev))
  4533. return NULL;
  4534. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4535. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4536. if (vdev->vdev_id == vdev_id)
  4537. break;
  4538. }
  4539. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4540. return (struct cdp_vdev *)vdev;
  4541. }
  4542. /*
  4543. * dp_get_mon_vdev_from_pdev_wifi3() - Get vdev handle of monitor mode
  4544. * @dev: PDEV handle
  4545. *
  4546. * Return: VDEV handle of monitor mode
  4547. */
  4548. static struct cdp_vdev *dp_get_mon_vdev_from_pdev_wifi3(struct cdp_pdev *dev)
  4549. {
  4550. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4551. if (qdf_unlikely(!pdev))
  4552. return NULL;
  4553. return (struct cdp_vdev *)pdev->monitor_vdev;
  4554. }
  4555. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  4556. {
  4557. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4558. return vdev->opmode;
  4559. }
  4560. static
  4561. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  4562. ol_txrx_rx_fp *stack_fn_p,
  4563. ol_osif_vdev_handle *osif_vdev_p)
  4564. {
  4565. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  4566. qdf_assert(vdev);
  4567. *stack_fn_p = vdev->osif_rx_stack;
  4568. *osif_vdev_p = vdev->osif_vdev;
  4569. }
  4570. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  4571. {
  4572. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4573. struct dp_pdev *pdev = vdev->pdev;
  4574. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  4575. }
  4576. /**
  4577. * dp_monitor_mode_ring_config() - Send the tlv config to fw for monitor buffer
  4578. * ring based on target
  4579. * @soc: soc handle
  4580. * @mac_for_pdev: pdev_id
  4581. * @pdev: physical device handle
  4582. * @ring_num: mac id
  4583. * @htt_tlv_filter: tlv filter
  4584. *
  4585. * Return: zero on success, non-zero on failure
  4586. */
  4587. static inline
  4588. QDF_STATUS dp_monitor_mode_ring_config(struct dp_soc *soc, uint8_t mac_for_pdev,
  4589. struct dp_pdev *pdev, uint8_t ring_num,
  4590. struct htt_rx_ring_tlv_filter htt_tlv_filter)
  4591. {
  4592. QDF_STATUS status;
  4593. if (soc->wlan_cfg_ctx->rxdma1_enable)
  4594. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4595. pdev->rxdma_mon_buf_ring[ring_num]
  4596. .hal_srng,
  4597. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE,
  4598. &htt_tlv_filter);
  4599. else
  4600. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4601. pdev->rx_mac_buf_ring[ring_num]
  4602. .hal_srng,
  4603. RXDMA_BUF, RX_BUFFER_SIZE,
  4604. &htt_tlv_filter);
  4605. return status;
  4606. }
  4607. /**
  4608. * dp_reset_monitor_mode() - Disable monitor mode
  4609. * @pdev_handle: Datapath PDEV handle
  4610. *
  4611. * Return: 0 on success, not 0 on failure
  4612. */
  4613. static QDF_STATUS dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  4614. {
  4615. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4616. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4617. struct dp_soc *soc = pdev->soc;
  4618. uint8_t pdev_id;
  4619. int mac_id;
  4620. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4621. pdev_id = pdev->pdev_id;
  4622. soc = pdev->soc;
  4623. qdf_spin_lock_bh(&pdev->mon_lock);
  4624. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4625. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4626. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4627. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4628. pdev, mac_id,
  4629. htt_tlv_filter);
  4630. if (status != QDF_STATUS_SUCCESS) {
  4631. dp_err("Failed to send tlv filter for monitor mode rings");
  4632. return status;
  4633. }
  4634. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4635. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4636. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  4637. &htt_tlv_filter);
  4638. }
  4639. pdev->monitor_vdev = NULL;
  4640. qdf_spin_unlock_bh(&pdev->mon_lock);
  4641. return QDF_STATUS_SUCCESS;
  4642. }
  4643. /**
  4644. * dp_set_nac() - set peer_nac
  4645. * @peer_handle: Datapath PEER handle
  4646. *
  4647. * Return: void
  4648. */
  4649. static void dp_set_nac(struct cdp_peer *peer_handle)
  4650. {
  4651. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4652. peer->nac = 1;
  4653. }
  4654. /**
  4655. * dp_get_tx_pending() - read pending tx
  4656. * @pdev_handle: Datapath PDEV handle
  4657. *
  4658. * Return: outstanding tx
  4659. */
  4660. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  4661. {
  4662. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4663. return qdf_atomic_read(&pdev->num_tx_outstanding);
  4664. }
  4665. /**
  4666. * dp_get_peer_mac_from_peer_id() - get peer mac
  4667. * @pdev_handle: Datapath PDEV handle
  4668. * @peer_id: Peer ID
  4669. * @peer_mac: MAC addr of PEER
  4670. *
  4671. * Return: void
  4672. */
  4673. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  4674. uint32_t peer_id, uint8_t *peer_mac)
  4675. {
  4676. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4677. struct dp_peer *peer;
  4678. if (pdev && peer_mac) {
  4679. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  4680. if (peer) {
  4681. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  4682. DP_MAC_ADDR_LEN);
  4683. dp_peer_unref_del_find_by_id(peer);
  4684. }
  4685. }
  4686. }
  4687. /**
  4688. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  4689. * @vdev_handle: Datapath VDEV handle
  4690. * @smart_monitor: Flag to denote if its smart monitor mode
  4691. *
  4692. * Return: 0 on success, not 0 on failure
  4693. */
  4694. static QDF_STATUS dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  4695. uint8_t smart_monitor)
  4696. {
  4697. /* Many monitor VAPs can exists in a system but only one can be up at
  4698. * anytime
  4699. */
  4700. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4701. struct dp_pdev *pdev;
  4702. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4703. struct dp_soc *soc;
  4704. uint8_t pdev_id;
  4705. int mac_id;
  4706. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4707. qdf_assert(vdev);
  4708. pdev = vdev->pdev;
  4709. pdev_id = pdev->pdev_id;
  4710. soc = pdev->soc;
  4711. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4712. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4713. pdev, pdev_id, soc, vdev);
  4714. /*Check if current pdev's monitor_vdev exists */
  4715. if (pdev->monitor_vdev) {
  4716. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4717. "vdev=%pK", vdev);
  4718. qdf_assert(vdev);
  4719. }
  4720. pdev->monitor_vdev = vdev;
  4721. /* If smart monitor mode, do not configure monitor ring */
  4722. if (smart_monitor)
  4723. return QDF_STATUS_SUCCESS;
  4724. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4725. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4726. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4727. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4728. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4729. pdev->mo_data_filter);
  4730. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4731. htt_tlv_filter.mpdu_start = 1;
  4732. htt_tlv_filter.msdu_start = 1;
  4733. htt_tlv_filter.packet = 1;
  4734. htt_tlv_filter.msdu_end = 1;
  4735. htt_tlv_filter.mpdu_end = 1;
  4736. htt_tlv_filter.packet_header = 1;
  4737. htt_tlv_filter.attention = 1;
  4738. htt_tlv_filter.ppdu_start = 0;
  4739. htt_tlv_filter.ppdu_end = 0;
  4740. htt_tlv_filter.ppdu_end_user_stats = 0;
  4741. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4742. htt_tlv_filter.ppdu_end_status_done = 0;
  4743. htt_tlv_filter.header_per_msdu = 1;
  4744. htt_tlv_filter.enable_fp =
  4745. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4746. htt_tlv_filter.enable_md = 0;
  4747. htt_tlv_filter.enable_mo =
  4748. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4749. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4750. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4751. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4752. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4753. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4754. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4755. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4756. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4757. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4758. pdev, mac_id,
  4759. htt_tlv_filter);
  4760. if (status != QDF_STATUS_SUCCESS) {
  4761. dp_err("Failed to send tlv filter for monitor mode rings");
  4762. return status;
  4763. }
  4764. }
  4765. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4766. htt_tlv_filter.mpdu_start = 1;
  4767. htt_tlv_filter.msdu_start = 0;
  4768. htt_tlv_filter.packet = 0;
  4769. htt_tlv_filter.msdu_end = 0;
  4770. htt_tlv_filter.mpdu_end = 0;
  4771. htt_tlv_filter.attention = 0;
  4772. htt_tlv_filter.ppdu_start = 1;
  4773. htt_tlv_filter.ppdu_end = 1;
  4774. htt_tlv_filter.ppdu_end_user_stats = 1;
  4775. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4776. htt_tlv_filter.ppdu_end_status_done = 1;
  4777. htt_tlv_filter.enable_fp = 1;
  4778. htt_tlv_filter.enable_md = 0;
  4779. htt_tlv_filter.enable_mo = 1;
  4780. if (pdev->mcopy_mode) {
  4781. htt_tlv_filter.packet_header = 1;
  4782. }
  4783. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4784. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4785. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4786. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4787. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4788. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4789. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4790. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4791. pdev->pdev_id);
  4792. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4793. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4794. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4795. }
  4796. return QDF_STATUS_SUCCESS;
  4797. }
  4798. /**
  4799. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  4800. * @pdev_handle: Datapath PDEV handle
  4801. * @filter_val: Flag to select Filter for monitor mode
  4802. * Return: 0 on success, not 0 on failure
  4803. */
  4804. static QDF_STATUS
  4805. dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  4806. struct cdp_monitor_filter *filter_val)
  4807. {
  4808. /* Many monitor VAPs can exists in a system but only one can be up at
  4809. * anytime
  4810. */
  4811. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4812. struct dp_vdev *vdev = pdev->monitor_vdev;
  4813. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4814. struct dp_soc *soc;
  4815. uint8_t pdev_id;
  4816. int mac_id;
  4817. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4818. pdev_id = pdev->pdev_id;
  4819. soc = pdev->soc;
  4820. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4821. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4822. pdev, pdev_id, soc, vdev);
  4823. /*Check if current pdev's monitor_vdev exists */
  4824. if (!pdev->monitor_vdev) {
  4825. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4826. "vdev=%pK", vdev);
  4827. qdf_assert(vdev);
  4828. }
  4829. /* update filter mode, type in pdev structure */
  4830. pdev->mon_filter_mode = filter_val->mode;
  4831. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  4832. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  4833. pdev->fp_data_filter = filter_val->fp_data;
  4834. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  4835. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  4836. pdev->mo_data_filter = filter_val->mo_data;
  4837. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4838. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4839. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4840. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4841. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4842. pdev->mo_data_filter);
  4843. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4844. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4845. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4846. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4847. pdev, mac_id,
  4848. htt_tlv_filter);
  4849. if (status != QDF_STATUS_SUCCESS) {
  4850. dp_err("Failed to send tlv filter for monitor mode rings");
  4851. return status;
  4852. }
  4853. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4854. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4855. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4856. }
  4857. htt_tlv_filter.mpdu_start = 1;
  4858. htt_tlv_filter.msdu_start = 1;
  4859. htt_tlv_filter.packet = 1;
  4860. htt_tlv_filter.msdu_end = 1;
  4861. htt_tlv_filter.mpdu_end = 1;
  4862. htt_tlv_filter.packet_header = 1;
  4863. htt_tlv_filter.attention = 1;
  4864. htt_tlv_filter.ppdu_start = 0;
  4865. htt_tlv_filter.ppdu_end = 0;
  4866. htt_tlv_filter.ppdu_end_user_stats = 0;
  4867. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4868. htt_tlv_filter.ppdu_end_status_done = 0;
  4869. htt_tlv_filter.header_per_msdu = 1;
  4870. htt_tlv_filter.enable_fp =
  4871. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4872. htt_tlv_filter.enable_md = 0;
  4873. htt_tlv_filter.enable_mo =
  4874. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4875. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4876. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4877. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4878. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4879. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4880. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4881. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4882. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4883. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4884. pdev, mac_id,
  4885. htt_tlv_filter);
  4886. if (status != QDF_STATUS_SUCCESS) {
  4887. dp_err("Failed to send tlv filter for monitor mode rings");
  4888. return status;
  4889. }
  4890. }
  4891. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4892. htt_tlv_filter.mpdu_start = 1;
  4893. htt_tlv_filter.msdu_start = 0;
  4894. htt_tlv_filter.packet = 0;
  4895. htt_tlv_filter.msdu_end = 0;
  4896. htt_tlv_filter.mpdu_end = 0;
  4897. htt_tlv_filter.attention = 0;
  4898. htt_tlv_filter.ppdu_start = 1;
  4899. htt_tlv_filter.ppdu_end = 1;
  4900. htt_tlv_filter.ppdu_end_user_stats = 1;
  4901. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4902. htt_tlv_filter.ppdu_end_status_done = 1;
  4903. htt_tlv_filter.enable_fp = 1;
  4904. htt_tlv_filter.enable_md = 0;
  4905. htt_tlv_filter.enable_mo = 1;
  4906. if (pdev->mcopy_mode) {
  4907. htt_tlv_filter.packet_header = 1;
  4908. }
  4909. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4910. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4911. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4912. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4913. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4914. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4915. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4916. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4917. pdev->pdev_id);
  4918. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4919. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4920. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4921. }
  4922. return QDF_STATUS_SUCCESS;
  4923. }
  4924. /**
  4925. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4926. * @pdev_handle: Datapath PDEV handle
  4927. *
  4928. * Return: pdev_id
  4929. */
  4930. static
  4931. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4932. {
  4933. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4934. return pdev->pdev_id;
  4935. }
  4936. /**
  4937. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  4938. * @pdev_handle: Datapath PDEV handle
  4939. * @chan_noise_floor: Channel Noise Floor
  4940. *
  4941. * Return: void
  4942. */
  4943. static
  4944. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  4945. int16_t chan_noise_floor)
  4946. {
  4947. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4948. pdev->chan_noise_floor = chan_noise_floor;
  4949. }
  4950. /**
  4951. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4952. * @vdev_handle: Datapath VDEV handle
  4953. * Return: true on ucast filter flag set
  4954. */
  4955. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4956. {
  4957. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4958. struct dp_pdev *pdev;
  4959. pdev = vdev->pdev;
  4960. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4961. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4962. return true;
  4963. return false;
  4964. }
  4965. /**
  4966. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4967. * @vdev_handle: Datapath VDEV handle
  4968. * Return: true on mcast filter flag set
  4969. */
  4970. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4971. {
  4972. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4973. struct dp_pdev *pdev;
  4974. pdev = vdev->pdev;
  4975. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4976. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4977. return true;
  4978. return false;
  4979. }
  4980. /**
  4981. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4982. * @vdev_handle: Datapath VDEV handle
  4983. * Return: true on non data filter flag set
  4984. */
  4985. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4986. {
  4987. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4988. struct dp_pdev *pdev;
  4989. pdev = vdev->pdev;
  4990. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4991. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4992. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4993. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4994. return true;
  4995. }
  4996. }
  4997. return false;
  4998. }
  4999. #ifdef MESH_MODE_SUPPORT
  5000. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  5001. {
  5002. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5003. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5004. FL("val %d"), val);
  5005. vdev->mesh_vdev = val;
  5006. }
  5007. /*
  5008. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  5009. * @vdev_hdl: virtual device object
  5010. * @val: value to be set
  5011. *
  5012. * Return: void
  5013. */
  5014. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  5015. {
  5016. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5018. FL("val %d"), val);
  5019. vdev->mesh_rx_filter = val;
  5020. }
  5021. #endif
  5022. /*
  5023. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  5024. * Current scope is bar received count
  5025. *
  5026. * @pdev_handle: DP_PDEV handle
  5027. *
  5028. * Return: void
  5029. */
  5030. #define STATS_PROC_TIMEOUT (HZ/1000)
  5031. static void
  5032. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  5033. {
  5034. struct dp_vdev *vdev;
  5035. struct dp_peer *peer;
  5036. uint32_t waitcnt;
  5037. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5038. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5039. if (!peer) {
  5040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5041. FL("DP Invalid Peer refernce"));
  5042. return;
  5043. }
  5044. if (peer->delete_in_progress) {
  5045. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5046. FL("DP Peer deletion in progress"));
  5047. continue;
  5048. }
  5049. qdf_atomic_inc(&peer->ref_cnt);
  5050. waitcnt = 0;
  5051. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  5052. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  5053. && waitcnt < 10) {
  5054. schedule_timeout_interruptible(
  5055. STATS_PROC_TIMEOUT);
  5056. waitcnt++;
  5057. }
  5058. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  5059. dp_peer_unref_delete(peer);
  5060. }
  5061. }
  5062. }
  5063. /**
  5064. * dp_rx_bar_stats_cb(): BAR received stats callback
  5065. * @soc: SOC handle
  5066. * @cb_ctxt: Call back context
  5067. * @reo_status: Reo status
  5068. *
  5069. * return: void
  5070. */
  5071. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  5072. union hal_reo_status *reo_status)
  5073. {
  5074. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  5075. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  5076. if (!qdf_atomic_read(&soc->cmn_init_done))
  5077. return;
  5078. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  5079. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  5080. queue_status->header.status);
  5081. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5082. return;
  5083. }
  5084. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  5085. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5086. }
  5087. /**
  5088. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  5089. * @vdev: DP VDEV handle
  5090. *
  5091. * return: void
  5092. */
  5093. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  5094. struct cdp_vdev_stats *vdev_stats)
  5095. {
  5096. struct dp_peer *peer = NULL;
  5097. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  5098. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  5099. dp_update_vdev_stats(vdev_stats, peer);
  5100. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5101. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5102. vdev_stats, vdev->vdev_id,
  5103. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5104. #endif
  5105. }
  5106. /**
  5107. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  5108. * @pdev: DP PDEV handle
  5109. *
  5110. * return: void
  5111. */
  5112. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  5113. {
  5114. struct dp_vdev *vdev = NULL;
  5115. struct cdp_vdev_stats *vdev_stats =
  5116. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5117. if (!vdev_stats) {
  5118. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5119. "DP alloc failure - unable to get alloc vdev stats");
  5120. return;
  5121. }
  5122. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  5123. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  5124. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  5125. if (pdev->mcopy_mode)
  5126. DP_UPDATE_STATS(pdev, pdev->invalid_peer);
  5127. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  5128. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5129. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5130. dp_update_pdev_stats(pdev, vdev_stats);
  5131. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  5132. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  5133. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  5134. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  5135. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  5136. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  5137. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  5138. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  5139. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host.num);
  5140. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  5141. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host.num);
  5142. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  5143. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  5144. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  5145. DP_STATS_AGGR(pdev, vdev,
  5146. tx_i.mcast_en.dropped_map_error);
  5147. DP_STATS_AGGR(pdev, vdev,
  5148. tx_i.mcast_en.dropped_self_mac);
  5149. DP_STATS_AGGR(pdev, vdev,
  5150. tx_i.mcast_en.dropped_send_fail);
  5151. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  5152. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  5153. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  5154. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  5155. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na.num);
  5156. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  5157. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.headroom_insufficient);
  5158. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  5159. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  5160. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  5161. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  5162. pdev->stats.tx_i.dropped.dropped_pkt.num =
  5163. pdev->stats.tx_i.dropped.dma_error +
  5164. pdev->stats.tx_i.dropped.ring_full +
  5165. pdev->stats.tx_i.dropped.enqueue_fail +
  5166. pdev->stats.tx_i.dropped.desc_na.num +
  5167. pdev->stats.tx_i.dropped.res_full;
  5168. pdev->stats.tx.last_ack_rssi =
  5169. vdev->stats.tx.last_ack_rssi;
  5170. pdev->stats.tx_i.tso.num_seg =
  5171. vdev->stats.tx_i.tso.num_seg;
  5172. }
  5173. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5174. qdf_mem_free(vdev_stats);
  5175. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5176. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc, &pdev->stats,
  5177. pdev->pdev_id, UPDATE_PDEV_STATS, pdev->pdev_id);
  5178. #endif
  5179. }
  5180. /**
  5181. * dp_vdev_getstats() - get vdev packet level stats
  5182. * @vdev_handle: Datapath VDEV handle
  5183. * @stats: cdp network device stats structure
  5184. *
  5185. * Return: void
  5186. */
  5187. static void dp_vdev_getstats(void *vdev_handle,
  5188. struct cdp_dev_stats *stats)
  5189. {
  5190. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5191. struct cdp_vdev_stats *vdev_stats =
  5192. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5193. if (!vdev_stats) {
  5194. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5195. "DP alloc failure - unable to get alloc vdev stats");
  5196. return;
  5197. }
  5198. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5199. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  5200. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  5201. stats->tx_errors = vdev_stats->tx.tx_failed +
  5202. vdev_stats->tx_i.dropped.dropped_pkt.num;
  5203. stats->tx_dropped = stats->tx_errors;
  5204. stats->rx_packets = vdev_stats->rx.unicast.num +
  5205. vdev_stats->rx.multicast.num +
  5206. vdev_stats->rx.bcast.num;
  5207. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  5208. vdev_stats->rx.multicast.bytes +
  5209. vdev_stats->rx.bcast.bytes;
  5210. }
  5211. /**
  5212. * dp_pdev_getstats() - get pdev packet level stats
  5213. * @pdev_handle: Datapath PDEV handle
  5214. * @stats: cdp network device stats structure
  5215. *
  5216. * Return: void
  5217. */
  5218. static void dp_pdev_getstats(void *pdev_handle,
  5219. struct cdp_dev_stats *stats)
  5220. {
  5221. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5222. dp_aggregate_pdev_stats(pdev);
  5223. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  5224. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  5225. stats->tx_errors = pdev->stats.tx.tx_failed +
  5226. pdev->stats.tx_i.dropped.dropped_pkt.num;
  5227. stats->tx_dropped = stats->tx_errors;
  5228. stats->rx_packets = pdev->stats.rx.unicast.num +
  5229. pdev->stats.rx.multicast.num +
  5230. pdev->stats.rx.bcast.num;
  5231. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  5232. pdev->stats.rx.multicast.bytes +
  5233. pdev->stats.rx.bcast.bytes;
  5234. }
  5235. /**
  5236. * dp_get_device_stats() - get interface level packet stats
  5237. * @handle: device handle
  5238. * @stats: cdp network device stats structure
  5239. * @type: device type pdev/vdev
  5240. *
  5241. * Return: void
  5242. */
  5243. static void dp_get_device_stats(void *handle,
  5244. struct cdp_dev_stats *stats, uint8_t type)
  5245. {
  5246. switch (type) {
  5247. case UPDATE_VDEV_STATS:
  5248. dp_vdev_getstats(handle, stats);
  5249. break;
  5250. case UPDATE_PDEV_STATS:
  5251. dp_pdev_getstats(handle, stats);
  5252. break;
  5253. default:
  5254. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5255. "apstats cannot be updated for this input "
  5256. "type %d", type);
  5257. break;
  5258. }
  5259. }
  5260. /**
  5261. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  5262. * @pdev: DP_PDEV Handle
  5263. *
  5264. * Return:void
  5265. */
  5266. static inline void
  5267. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  5268. {
  5269. uint8_t index = 0;
  5270. DP_PRINT_STATS("PDEV Tx Stats:\n");
  5271. DP_PRINT_STATS("Received From Stack:");
  5272. DP_PRINT_STATS(" Packets = %d",
  5273. pdev->stats.tx_i.rcvd.num);
  5274. DP_PRINT_STATS(" Bytes = %llu",
  5275. pdev->stats.tx_i.rcvd.bytes);
  5276. DP_PRINT_STATS("Processed:");
  5277. DP_PRINT_STATS(" Packets = %d",
  5278. pdev->stats.tx_i.processed.num);
  5279. DP_PRINT_STATS(" Bytes = %llu",
  5280. pdev->stats.tx_i.processed.bytes);
  5281. DP_PRINT_STATS("Total Completions:");
  5282. DP_PRINT_STATS(" Packets = %u",
  5283. pdev->stats.tx.comp_pkt.num);
  5284. DP_PRINT_STATS(" Bytes = %llu",
  5285. pdev->stats.tx.comp_pkt.bytes);
  5286. DP_PRINT_STATS("Successful Completions:");
  5287. DP_PRINT_STATS(" Packets = %u",
  5288. pdev->stats.tx.tx_success.num);
  5289. DP_PRINT_STATS(" Bytes = %llu",
  5290. pdev->stats.tx.tx_success.bytes);
  5291. DP_PRINT_STATS("Dropped:");
  5292. DP_PRINT_STATS(" Total = %d",
  5293. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5294. DP_PRINT_STATS(" Dma_map_error = %d",
  5295. pdev->stats.tx_i.dropped.dma_error);
  5296. DP_PRINT_STATS(" Ring Full = %d",
  5297. pdev->stats.tx_i.dropped.ring_full);
  5298. DP_PRINT_STATS(" Descriptor Not available = %d",
  5299. pdev->stats.tx_i.dropped.desc_na.num);
  5300. DP_PRINT_STATS(" HW enqueue failed= %d",
  5301. pdev->stats.tx_i.dropped.enqueue_fail);
  5302. DP_PRINT_STATS(" Resources Full = %d",
  5303. pdev->stats.tx_i.dropped.res_full);
  5304. DP_PRINT_STATS(" FW removed Pkts = %u",
  5305. pdev->stats.tx.dropped.fw_rem.num);
  5306. DP_PRINT_STATS(" FW removed bytes= %llu",
  5307. pdev->stats.tx.dropped.fw_rem.bytes);
  5308. DP_PRINT_STATS(" FW removed transmitted = %d",
  5309. pdev->stats.tx.dropped.fw_rem_tx);
  5310. DP_PRINT_STATS(" FW removed untransmitted = %d",
  5311. pdev->stats.tx.dropped.fw_rem_notx);
  5312. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  5313. pdev->stats.tx.dropped.fw_reason1);
  5314. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  5315. pdev->stats.tx.dropped.fw_reason2);
  5316. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  5317. pdev->stats.tx.dropped.fw_reason3);
  5318. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  5319. pdev->stats.tx.dropped.age_out);
  5320. DP_PRINT_STATS(" headroom insufficient = %d",
  5321. pdev->stats.tx_i.dropped.headroom_insufficient);
  5322. DP_PRINT_STATS(" Multicast:");
  5323. DP_PRINT_STATS(" Packets: %u",
  5324. pdev->stats.tx.mcast.num);
  5325. DP_PRINT_STATS(" Bytes: %llu",
  5326. pdev->stats.tx.mcast.bytes);
  5327. DP_PRINT_STATS("Scatter Gather:");
  5328. DP_PRINT_STATS(" Packets = %d",
  5329. pdev->stats.tx_i.sg.sg_pkt.num);
  5330. DP_PRINT_STATS(" Bytes = %llu",
  5331. pdev->stats.tx_i.sg.sg_pkt.bytes);
  5332. DP_PRINT_STATS(" Dropped By Host = %d",
  5333. pdev->stats.tx_i.sg.dropped_host.num);
  5334. DP_PRINT_STATS(" Dropped By Target = %d",
  5335. pdev->stats.tx_i.sg.dropped_target);
  5336. DP_PRINT_STATS("TSO:");
  5337. DP_PRINT_STATS(" Number of Segments = %d",
  5338. pdev->stats.tx_i.tso.num_seg);
  5339. DP_PRINT_STATS(" Packets = %d",
  5340. pdev->stats.tx_i.tso.tso_pkt.num);
  5341. DP_PRINT_STATS(" Bytes = %llu",
  5342. pdev->stats.tx_i.tso.tso_pkt.bytes);
  5343. DP_PRINT_STATS(" Dropped By Host = %d",
  5344. pdev->stats.tx_i.tso.dropped_host.num);
  5345. DP_PRINT_STATS("Mcast Enhancement:");
  5346. DP_PRINT_STATS(" Packets = %d",
  5347. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  5348. DP_PRINT_STATS(" Bytes = %llu",
  5349. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  5350. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  5351. pdev->stats.tx_i.mcast_en.dropped_map_error);
  5352. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  5353. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  5354. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  5355. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  5356. DP_PRINT_STATS(" Unicast sent = %d",
  5357. pdev->stats.tx_i.mcast_en.ucast);
  5358. DP_PRINT_STATS("Raw:");
  5359. DP_PRINT_STATS(" Packets = %d",
  5360. pdev->stats.tx_i.raw.raw_pkt.num);
  5361. DP_PRINT_STATS(" Bytes = %llu",
  5362. pdev->stats.tx_i.raw.raw_pkt.bytes);
  5363. DP_PRINT_STATS(" DMA map error = %d",
  5364. pdev->stats.tx_i.raw.dma_map_error);
  5365. DP_PRINT_STATS("Reinjected:");
  5366. DP_PRINT_STATS(" Packets = %d",
  5367. pdev->stats.tx_i.reinject_pkts.num);
  5368. DP_PRINT_STATS(" Bytes = %llu\n",
  5369. pdev->stats.tx_i.reinject_pkts.bytes);
  5370. DP_PRINT_STATS("Inspected:");
  5371. DP_PRINT_STATS(" Packets = %d",
  5372. pdev->stats.tx_i.inspect_pkts.num);
  5373. DP_PRINT_STATS(" Bytes = %llu",
  5374. pdev->stats.tx_i.inspect_pkts.bytes);
  5375. DP_PRINT_STATS("Nawds Multicast:");
  5376. DP_PRINT_STATS(" Packets = %d",
  5377. pdev->stats.tx_i.nawds_mcast.num);
  5378. DP_PRINT_STATS(" Bytes = %llu",
  5379. pdev->stats.tx_i.nawds_mcast.bytes);
  5380. DP_PRINT_STATS("CCE Classified:");
  5381. DP_PRINT_STATS(" CCE Classified Packets: %u",
  5382. pdev->stats.tx_i.cce_classified);
  5383. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  5384. pdev->stats.tx_i.cce_classified_raw);
  5385. DP_PRINT_STATS("Mesh stats:");
  5386. DP_PRINT_STATS(" frames to firmware: %u",
  5387. pdev->stats.tx_i.mesh.exception_fw);
  5388. DP_PRINT_STATS(" completions from fw: %u",
  5389. pdev->stats.tx_i.mesh.completion_fw);
  5390. DP_PRINT_STATS("PPDU stats counter");
  5391. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  5392. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  5393. pdev->stats.ppdu_stats_counter[index]);
  5394. }
  5395. }
  5396. /**
  5397. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  5398. * @pdev: DP_PDEV Handle
  5399. *
  5400. * Return: void
  5401. */
  5402. static inline void
  5403. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  5404. {
  5405. DP_PRINT_STATS("PDEV Rx Stats:\n");
  5406. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  5407. DP_PRINT_STATS(" Packets = %d %d %d %d",
  5408. pdev->stats.rx.rcvd_reo[0].num,
  5409. pdev->stats.rx.rcvd_reo[1].num,
  5410. pdev->stats.rx.rcvd_reo[2].num,
  5411. pdev->stats.rx.rcvd_reo[3].num);
  5412. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  5413. pdev->stats.rx.rcvd_reo[0].bytes,
  5414. pdev->stats.rx.rcvd_reo[1].bytes,
  5415. pdev->stats.rx.rcvd_reo[2].bytes,
  5416. pdev->stats.rx.rcvd_reo[3].bytes);
  5417. DP_PRINT_STATS("Replenished:");
  5418. DP_PRINT_STATS(" Packets = %d",
  5419. pdev->stats.replenish.pkts.num);
  5420. DP_PRINT_STATS(" Bytes = %llu",
  5421. pdev->stats.replenish.pkts.bytes);
  5422. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  5423. pdev->stats.buf_freelist);
  5424. DP_PRINT_STATS(" Low threshold intr = %d",
  5425. pdev->stats.replenish.low_thresh_intrs);
  5426. DP_PRINT_STATS("Dropped:");
  5427. DP_PRINT_STATS(" msdu_not_done = %d",
  5428. pdev->stats.dropped.msdu_not_done);
  5429. DP_PRINT_STATS(" mon_rx_drop = %d",
  5430. pdev->stats.dropped.mon_rx_drop);
  5431. DP_PRINT_STATS(" mec_drop = %d",
  5432. pdev->stats.rx.mec_drop.num);
  5433. DP_PRINT_STATS(" Bytes = %llu",
  5434. pdev->stats.rx.mec_drop.bytes);
  5435. DP_PRINT_STATS("Sent To Stack:");
  5436. DP_PRINT_STATS(" Packets = %d",
  5437. pdev->stats.rx.to_stack.num);
  5438. DP_PRINT_STATS(" Bytes = %llu",
  5439. pdev->stats.rx.to_stack.bytes);
  5440. DP_PRINT_STATS("Multicast/Broadcast:");
  5441. DP_PRINT_STATS(" Packets = %d",
  5442. pdev->stats.rx.multicast.num);
  5443. DP_PRINT_STATS(" Bytes = %llu",
  5444. pdev->stats.rx.multicast.bytes);
  5445. DP_PRINT_STATS("Errors:");
  5446. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  5447. pdev->stats.replenish.rxdma_err);
  5448. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  5449. pdev->stats.err.desc_alloc_fail);
  5450. DP_PRINT_STATS(" IP checksum error = %d",
  5451. pdev->stats.err.ip_csum_err);
  5452. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  5453. pdev->stats.err.tcp_udp_csum_err);
  5454. /* Get bar_recv_cnt */
  5455. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  5456. DP_PRINT_STATS("BAR Received Count: = %d",
  5457. pdev->stats.rx.bar_recv_cnt);
  5458. }
  5459. /**
  5460. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  5461. * @pdev: DP_PDEV Handle
  5462. *
  5463. * Return: void
  5464. */
  5465. static inline void
  5466. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  5467. {
  5468. struct cdp_pdev_mon_stats *rx_mon_stats;
  5469. rx_mon_stats = &pdev->rx_mon_stats;
  5470. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  5471. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  5472. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  5473. rx_mon_stats->status_ppdu_done);
  5474. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  5475. rx_mon_stats->dest_ppdu_done);
  5476. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  5477. rx_mon_stats->dest_mpdu_done);
  5478. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  5479. rx_mon_stats->dest_mpdu_drop);
  5480. DP_PRINT_STATS("dup_mon_linkdesc_cnt = %d",
  5481. rx_mon_stats->dup_mon_linkdesc_cnt);
  5482. DP_PRINT_STATS("dup_mon_buf_cnt = %d",
  5483. rx_mon_stats->dup_mon_buf_cnt);
  5484. }
  5485. /**
  5486. * dp_print_soc_tx_stats(): Print SOC level stats
  5487. * @soc DP_SOC Handle
  5488. *
  5489. * Return: void
  5490. */
  5491. static inline void
  5492. dp_print_soc_tx_stats(struct dp_soc *soc)
  5493. {
  5494. uint8_t desc_pool_id;
  5495. soc->stats.tx.desc_in_use = 0;
  5496. DP_PRINT_STATS("SOC Tx Stats:\n");
  5497. for (desc_pool_id = 0;
  5498. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5499. desc_pool_id++)
  5500. soc->stats.tx.desc_in_use +=
  5501. soc->tx_desc[desc_pool_id].num_allocated;
  5502. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  5503. soc->stats.tx.desc_in_use);
  5504. DP_PRINT_STATS("Invalid peer:");
  5505. DP_PRINT_STATS(" Packets = %d",
  5506. soc->stats.tx.tx_invalid_peer.num);
  5507. DP_PRINT_STATS(" Bytes = %llu",
  5508. soc->stats.tx.tx_invalid_peer.bytes);
  5509. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  5510. soc->stats.tx.tcl_ring_full[0],
  5511. soc->stats.tx.tcl_ring_full[1],
  5512. soc->stats.tx.tcl_ring_full[2]);
  5513. }
  5514. /**
  5515. * dp_print_soc_rx_stats: Print SOC level Rx stats
  5516. * @soc: DP_SOC Handle
  5517. *
  5518. * Return:void
  5519. */
  5520. static inline void
  5521. dp_print_soc_rx_stats(struct dp_soc *soc)
  5522. {
  5523. uint32_t i;
  5524. char reo_error[DP_REO_ERR_LENGTH];
  5525. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  5526. uint8_t index = 0;
  5527. DP_PRINT_STATS("SOC Rx Stats:\n");
  5528. DP_PRINT_STATS("Fragmented packets: %u",
  5529. soc->stats.rx.rx_frags);
  5530. DP_PRINT_STATS("Reo reinjected packets: %u",
  5531. soc->stats.rx.reo_reinject);
  5532. DP_PRINT_STATS("Errors:\n");
  5533. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  5534. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  5535. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  5536. DP_PRINT_STATS("Invalid RBM = %d",
  5537. soc->stats.rx.err.invalid_rbm);
  5538. DP_PRINT_STATS("Invalid Vdev = %d",
  5539. soc->stats.rx.err.invalid_vdev);
  5540. DP_PRINT_STATS("Invalid Pdev = %d",
  5541. soc->stats.rx.err.invalid_pdev);
  5542. DP_PRINT_STATS("Invalid Peer = %d",
  5543. soc->stats.rx.err.rx_invalid_peer.num);
  5544. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  5545. soc->stats.rx.err.hal_ring_access_fail);
  5546. DP_PRINT_STATS("RX frags: %d", soc->stats.rx.rx_frags);
  5547. DP_PRINT_STATS("RX HP out_of_sync: %d", soc->stats.rx.hp_oos);
  5548. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  5549. index += qdf_snprint(&rxdma_error[index],
  5550. DP_RXDMA_ERR_LENGTH - index,
  5551. " %d", soc->stats.rx.err.rxdma_error[i]);
  5552. }
  5553. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  5554. rxdma_error);
  5555. index = 0;
  5556. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  5557. index += qdf_snprint(&reo_error[index],
  5558. DP_REO_ERR_LENGTH - index,
  5559. " %d", soc->stats.rx.err.reo_error[i]);
  5560. }
  5561. DP_PRINT_STATS("REO Error(0-14):%s",
  5562. reo_error);
  5563. }
  5564. /**
  5565. * dp_srng_get_str_from_ring_type() - Return string name for a ring
  5566. * @ring_type: Ring
  5567. *
  5568. * Return: char const pointer
  5569. */
  5570. static inline const
  5571. char *dp_srng_get_str_from_hal_ring_type(enum hal_ring_type ring_type)
  5572. {
  5573. switch (ring_type) {
  5574. case REO_DST:
  5575. return "Reo_dst";
  5576. case REO_EXCEPTION:
  5577. return "Reo_exception";
  5578. case REO_CMD:
  5579. return "Reo_cmd";
  5580. case REO_REINJECT:
  5581. return "Reo_reinject";
  5582. case REO_STATUS:
  5583. return "Reo_status";
  5584. case WBM2SW_RELEASE:
  5585. return "wbm2sw_release";
  5586. case TCL_DATA:
  5587. return "tcl_data";
  5588. case TCL_CMD:
  5589. return "tcl_cmd";
  5590. case TCL_STATUS:
  5591. return "tcl_status";
  5592. case SW2WBM_RELEASE:
  5593. return "sw2wbm_release";
  5594. case RXDMA_BUF:
  5595. return "Rxdma_buf";
  5596. case RXDMA_DST:
  5597. return "Rxdma_dst";
  5598. case RXDMA_MONITOR_BUF:
  5599. return "Rxdma_monitor_buf";
  5600. case RXDMA_MONITOR_DESC:
  5601. return "Rxdma_monitor_desc";
  5602. case RXDMA_MONITOR_STATUS:
  5603. return "Rxdma_monitor_status";
  5604. default:
  5605. dp_err("Invalid ring type");
  5606. break;
  5607. }
  5608. return "Invalid";
  5609. }
  5610. /**
  5611. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  5612. * @soc: DP_SOC handle
  5613. * @srng: DP_SRNG handle
  5614. * @ring_name: SRNG name
  5615. * @ring_type: srng src/dst ring
  5616. *
  5617. * Return: void
  5618. */
  5619. static void
  5620. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  5621. enum hal_ring_type ring_type)
  5622. {
  5623. uint32_t tailp;
  5624. uint32_t headp;
  5625. int32_t hw_headp = -1;
  5626. int32_t hw_tailp = -1;
  5627. const char *ring_name;
  5628. struct hal_soc *hal_soc = (struct hal_soc *)soc->hal_soc;
  5629. if (soc && srng && srng->hal_srng) {
  5630. ring_name = dp_srng_get_str_from_hal_ring_type(ring_type);
  5631. hal_get_sw_hptp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  5632. DP_PRINT_STATS("%s:SW:Head pointer = %d Tail Pointer = %d\n",
  5633. ring_name, headp, tailp);
  5634. hal_get_hw_hptp(hal_soc, srng->hal_srng, &hw_headp,
  5635. &hw_tailp, ring_type);
  5636. DP_PRINT_STATS("%s:HW:Head pointer = %d Tail Pointer = %d\n",
  5637. ring_name, hw_headp, hw_tailp);
  5638. }
  5639. }
  5640. /**
  5641. * dp_print_mon_ring_stats_from_hal() - Print stat for monitor rings based
  5642. * on target
  5643. * @pdev: physical device handle
  5644. * @mac_id: mac id
  5645. *
  5646. * Return: void
  5647. */
  5648. static inline
  5649. void dp_print_mon_ring_stat_from_hal(struct dp_pdev *pdev, uint8_t mac_id)
  5650. {
  5651. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable) {
  5652. dp_print_ring_stat_from_hal(pdev->soc,
  5653. &pdev->rxdma_mon_buf_ring[mac_id],
  5654. RXDMA_MONITOR_BUF);
  5655. dp_print_ring_stat_from_hal(pdev->soc,
  5656. &pdev->rxdma_mon_dst_ring[mac_id],
  5657. RXDMA_MONITOR_DST);
  5658. dp_print_ring_stat_from_hal(pdev->soc,
  5659. &pdev->rxdma_mon_desc_ring[mac_id],
  5660. RXDMA_MONITOR_DESC);
  5661. }
  5662. dp_print_ring_stat_from_hal(pdev->soc,
  5663. &pdev->rxdma_mon_status_ring[mac_id],
  5664. RXDMA_MONITOR_STATUS);
  5665. }
  5666. /**
  5667. * dp_print_ring_stats(): Print tail and head pointer
  5668. * @pdev: DP_PDEV handle
  5669. *
  5670. * Return:void
  5671. */
  5672. static inline void
  5673. dp_print_ring_stats(struct dp_pdev *pdev)
  5674. {
  5675. uint32_t i;
  5676. int mac_id;
  5677. dp_print_ring_stat_from_hal(pdev->soc,
  5678. &pdev->soc->reo_exception_ring,
  5679. REO_EXCEPTION);
  5680. dp_print_ring_stat_from_hal(pdev->soc,
  5681. &pdev->soc->reo_reinject_ring,
  5682. REO_REINJECT);
  5683. dp_print_ring_stat_from_hal(pdev->soc,
  5684. &pdev->soc->reo_cmd_ring,
  5685. REO_CMD);
  5686. dp_print_ring_stat_from_hal(pdev->soc,
  5687. &pdev->soc->reo_status_ring,
  5688. REO_STATUS);
  5689. dp_print_ring_stat_from_hal(pdev->soc,
  5690. &pdev->soc->rx_rel_ring,
  5691. WBM2SW_RELEASE);
  5692. dp_print_ring_stat_from_hal(pdev->soc,
  5693. &pdev->soc->tcl_cmd_ring,
  5694. TCL_CMD);
  5695. dp_print_ring_stat_from_hal(pdev->soc,
  5696. &pdev->soc->tcl_status_ring,
  5697. TCL_STATUS);
  5698. dp_print_ring_stat_from_hal(pdev->soc,
  5699. &pdev->soc->wbm_desc_rel_ring,
  5700. SW2WBM_RELEASE);
  5701. for (i = 0; i < MAX_REO_DEST_RINGS; i++)
  5702. dp_print_ring_stat_from_hal(pdev->soc,
  5703. &pdev->soc->reo_dest_ring[i],
  5704. REO_DST);
  5705. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++)
  5706. dp_print_ring_stat_from_hal(pdev->soc,
  5707. &pdev->soc->tcl_data_ring[i],
  5708. TCL_DATA);
  5709. for (i = 0; i < MAX_TCL_DATA_RINGS; i++)
  5710. dp_print_ring_stat_from_hal(pdev->soc,
  5711. &pdev->soc->tx_comp_ring[i],
  5712. WBM2SW_RELEASE);
  5713. dp_print_ring_stat_from_hal(pdev->soc,
  5714. &pdev->rx_refill_buf_ring,
  5715. RXDMA_BUF);
  5716. dp_print_ring_stat_from_hal(pdev->soc,
  5717. &pdev->rx_refill_buf_ring2,
  5718. RXDMA_BUF);
  5719. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  5720. dp_print_ring_stat_from_hal(pdev->soc,
  5721. &pdev->rx_mac_buf_ring[i],
  5722. RXDMA_BUF);
  5723. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++)
  5724. dp_print_mon_ring_stat_from_hal(pdev, mac_id);
  5725. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++)
  5726. dp_print_ring_stat_from_hal(pdev->soc,
  5727. &pdev->rxdma_err_dst_ring[i],
  5728. RXDMA_DST);
  5729. }
  5730. /**
  5731. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  5732. * @vdev: DP_VDEV handle
  5733. *
  5734. * Return:void
  5735. */
  5736. static inline void
  5737. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  5738. {
  5739. struct dp_peer *peer = NULL;
  5740. DP_STATS_CLR(vdev->pdev);
  5741. DP_STATS_CLR(vdev->pdev->soc);
  5742. DP_STATS_CLR(vdev);
  5743. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5744. if (!peer)
  5745. return;
  5746. DP_STATS_CLR(peer);
  5747. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5748. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5749. &peer->stats, peer->peer_ids[0],
  5750. UPDATE_PEER_STATS, vdev->pdev->pdev_id);
  5751. #endif
  5752. }
  5753. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5754. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5755. &vdev->stats, vdev->vdev_id,
  5756. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5757. #endif
  5758. }
  5759. /**
  5760. * dp_print_common_rates_info(): Print common rate for tx or rx
  5761. * @pkt_type_array: rate type array contains rate info
  5762. *
  5763. * Return:void
  5764. */
  5765. static inline void
  5766. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  5767. {
  5768. uint8_t mcs, pkt_type;
  5769. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5770. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5771. if (!dp_rate_string[pkt_type][mcs].valid)
  5772. continue;
  5773. DP_PRINT_STATS(" %s = %d",
  5774. dp_rate_string[pkt_type][mcs].mcs_type,
  5775. pkt_type_array[pkt_type].mcs_count[mcs]);
  5776. }
  5777. DP_PRINT_STATS("\n");
  5778. }
  5779. }
  5780. /**
  5781. * dp_print_rx_rates(): Print Rx rate stats
  5782. * @vdev: DP_VDEV handle
  5783. *
  5784. * Return:void
  5785. */
  5786. static inline void
  5787. dp_print_rx_rates(struct dp_vdev *vdev)
  5788. {
  5789. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5790. uint8_t i;
  5791. uint8_t index = 0;
  5792. char nss[DP_NSS_LENGTH];
  5793. DP_PRINT_STATS("Rx Rate Info:\n");
  5794. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  5795. index = 0;
  5796. for (i = 0; i < SS_COUNT; i++) {
  5797. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5798. " %d", pdev->stats.rx.nss[i]);
  5799. }
  5800. DP_PRINT_STATS("NSS(1-8) = %s",
  5801. nss);
  5802. DP_PRINT_STATS("SGI ="
  5803. " 0.8us %d,"
  5804. " 0.4us %d,"
  5805. " 1.6us %d,"
  5806. " 3.2us %d,",
  5807. pdev->stats.rx.sgi_count[0],
  5808. pdev->stats.rx.sgi_count[1],
  5809. pdev->stats.rx.sgi_count[2],
  5810. pdev->stats.rx.sgi_count[3]);
  5811. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5812. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  5813. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  5814. DP_PRINT_STATS("Reception Type ="
  5815. " SU: %d,"
  5816. " MU_MIMO:%d,"
  5817. " MU_OFDMA:%d,"
  5818. " MU_OFDMA_MIMO:%d\n",
  5819. pdev->stats.rx.reception_type[0],
  5820. pdev->stats.rx.reception_type[1],
  5821. pdev->stats.rx.reception_type[2],
  5822. pdev->stats.rx.reception_type[3]);
  5823. DP_PRINT_STATS("Aggregation:\n");
  5824. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  5825. pdev->stats.rx.ampdu_cnt);
  5826. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  5827. pdev->stats.rx.non_ampdu_cnt);
  5828. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  5829. pdev->stats.rx.amsdu_cnt);
  5830. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  5831. pdev->stats.rx.non_amsdu_cnt);
  5832. }
  5833. /**
  5834. * dp_print_tx_rates(): Print tx rates
  5835. * @vdev: DP_VDEV handle
  5836. *
  5837. * Return:void
  5838. */
  5839. static inline void
  5840. dp_print_tx_rates(struct dp_vdev *vdev)
  5841. {
  5842. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5843. uint8_t index;
  5844. char nss[DP_NSS_LENGTH];
  5845. int nss_index;
  5846. DP_PRINT_STATS("Tx Rate Info:\n");
  5847. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  5848. DP_PRINT_STATS("SGI ="
  5849. " 0.8us %d"
  5850. " 0.4us %d"
  5851. " 1.6us %d"
  5852. " 3.2us %d",
  5853. pdev->stats.tx.sgi_count[0],
  5854. pdev->stats.tx.sgi_count[1],
  5855. pdev->stats.tx.sgi_count[2],
  5856. pdev->stats.tx.sgi_count[3]);
  5857. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5858. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  5859. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  5860. index = 0;
  5861. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  5862. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5863. " %d", pdev->stats.tx.nss[nss_index]);
  5864. }
  5865. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  5866. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  5867. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  5868. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  5869. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  5870. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  5871. DP_PRINT_STATS("Aggregation:\n");
  5872. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  5873. pdev->stats.tx.amsdu_cnt);
  5874. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  5875. pdev->stats.tx.non_amsdu_cnt);
  5876. }
  5877. /**
  5878. * dp_print_peer_stats():print peer stats
  5879. * @peer: DP_PEER handle
  5880. *
  5881. * return void
  5882. */
  5883. static inline void dp_print_peer_stats(struct dp_peer *peer)
  5884. {
  5885. uint8_t i;
  5886. uint32_t index;
  5887. char nss[DP_NSS_LENGTH];
  5888. DP_PRINT_STATS("Node Tx Stats:\n");
  5889. DP_PRINT_STATS("Total Packet Completions = %d",
  5890. peer->stats.tx.comp_pkt.num);
  5891. DP_PRINT_STATS("Total Bytes Completions = %llu",
  5892. peer->stats.tx.comp_pkt.bytes);
  5893. DP_PRINT_STATS("Success Packets = %d",
  5894. peer->stats.tx.tx_success.num);
  5895. DP_PRINT_STATS("Success Bytes = %llu",
  5896. peer->stats.tx.tx_success.bytes);
  5897. DP_PRINT_STATS("Unicast Success Packets = %d",
  5898. peer->stats.tx.ucast.num);
  5899. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  5900. peer->stats.tx.ucast.bytes);
  5901. DP_PRINT_STATS("Multicast Success Packets = %d",
  5902. peer->stats.tx.mcast.num);
  5903. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  5904. peer->stats.tx.mcast.bytes);
  5905. DP_PRINT_STATS("Broadcast Success Packets = %d",
  5906. peer->stats.tx.bcast.num);
  5907. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  5908. peer->stats.tx.bcast.bytes);
  5909. DP_PRINT_STATS("Packets Failed = %d",
  5910. peer->stats.tx.tx_failed);
  5911. DP_PRINT_STATS("Packets In OFDMA = %d",
  5912. peer->stats.tx.ofdma);
  5913. DP_PRINT_STATS("Packets In STBC = %d",
  5914. peer->stats.tx.stbc);
  5915. DP_PRINT_STATS("Packets In LDPC = %d",
  5916. peer->stats.tx.ldpc);
  5917. DP_PRINT_STATS("Packet Retries = %d",
  5918. peer->stats.tx.retries);
  5919. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  5920. peer->stats.tx.amsdu_cnt);
  5921. DP_PRINT_STATS("Last Packet RSSI = %d",
  5922. peer->stats.tx.last_ack_rssi);
  5923. DP_PRINT_STATS("Dropped At FW: Removed Pkts = %u",
  5924. peer->stats.tx.dropped.fw_rem.num);
  5925. DP_PRINT_STATS("Dropped At FW: Removed bytes = %llu",
  5926. peer->stats.tx.dropped.fw_rem.bytes);
  5927. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  5928. peer->stats.tx.dropped.fw_rem_tx);
  5929. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  5930. peer->stats.tx.dropped.fw_rem_notx);
  5931. DP_PRINT_STATS("Dropped : Age Out = %d",
  5932. peer->stats.tx.dropped.age_out);
  5933. DP_PRINT_STATS("NAWDS : ");
  5934. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  5935. peer->stats.tx.nawds_mcast_drop);
  5936. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  5937. peer->stats.tx.nawds_mcast.num);
  5938. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  5939. peer->stats.tx.nawds_mcast.bytes);
  5940. DP_PRINT_STATS("Rate Info:");
  5941. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  5942. DP_PRINT_STATS("SGI = "
  5943. " 0.8us %d"
  5944. " 0.4us %d"
  5945. " 1.6us %d"
  5946. " 3.2us %d",
  5947. peer->stats.tx.sgi_count[0],
  5948. peer->stats.tx.sgi_count[1],
  5949. peer->stats.tx.sgi_count[2],
  5950. peer->stats.tx.sgi_count[3]);
  5951. DP_PRINT_STATS("Excess Retries per AC ");
  5952. DP_PRINT_STATS(" Best effort = %d",
  5953. peer->stats.tx.excess_retries_per_ac[0]);
  5954. DP_PRINT_STATS(" Background= %d",
  5955. peer->stats.tx.excess_retries_per_ac[1]);
  5956. DP_PRINT_STATS(" Video = %d",
  5957. peer->stats.tx.excess_retries_per_ac[2]);
  5958. DP_PRINT_STATS(" Voice = %d",
  5959. peer->stats.tx.excess_retries_per_ac[3]);
  5960. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  5961. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  5962. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  5963. index = 0;
  5964. for (i = 0; i < SS_COUNT; i++) {
  5965. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5966. " %d", peer->stats.tx.nss[i]);
  5967. }
  5968. DP_PRINT_STATS("NSS(1-8) = %s",
  5969. nss);
  5970. DP_PRINT_STATS("Aggregation:");
  5971. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  5972. peer->stats.tx.amsdu_cnt);
  5973. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  5974. peer->stats.tx.non_amsdu_cnt);
  5975. DP_PRINT_STATS("Bytes and Packets transmitted in last one sec:");
  5976. DP_PRINT_STATS(" Bytes transmitted in last sec: %d",
  5977. peer->stats.tx.tx_byte_rate);
  5978. DP_PRINT_STATS(" Data transmitted in last sec: %d",
  5979. peer->stats.tx.tx_data_rate);
  5980. DP_PRINT_STATS("Node Rx Stats:");
  5981. DP_PRINT_STATS("Packets Sent To Stack = %d",
  5982. peer->stats.rx.to_stack.num);
  5983. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  5984. peer->stats.rx.to_stack.bytes);
  5985. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  5986. DP_PRINT_STATS("Ring Id = %d", i);
  5987. DP_PRINT_STATS(" Packets Received = %d",
  5988. peer->stats.rx.rcvd_reo[i].num);
  5989. DP_PRINT_STATS(" Bytes Received = %llu",
  5990. peer->stats.rx.rcvd_reo[i].bytes);
  5991. }
  5992. DP_PRINT_STATS("Multicast Packets Received = %d",
  5993. peer->stats.rx.multicast.num);
  5994. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  5995. peer->stats.rx.multicast.bytes);
  5996. DP_PRINT_STATS("Broadcast Packets Received = %d",
  5997. peer->stats.rx.bcast.num);
  5998. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  5999. peer->stats.rx.bcast.bytes);
  6000. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  6001. peer->stats.rx.intra_bss.pkts.num);
  6002. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  6003. peer->stats.rx.intra_bss.pkts.bytes);
  6004. DP_PRINT_STATS("Raw Packets Received = %d",
  6005. peer->stats.rx.raw.num);
  6006. DP_PRINT_STATS("Raw Bytes Received = %llu",
  6007. peer->stats.rx.raw.bytes);
  6008. DP_PRINT_STATS("Errors: MIC Errors = %d",
  6009. peer->stats.rx.err.mic_err);
  6010. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  6011. peer->stats.rx.err.decrypt_err);
  6012. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  6013. peer->stats.rx.non_ampdu_cnt);
  6014. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  6015. peer->stats.rx.ampdu_cnt);
  6016. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  6017. peer->stats.rx.non_amsdu_cnt);
  6018. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  6019. peer->stats.rx.amsdu_cnt);
  6020. DP_PRINT_STATS("NAWDS : ");
  6021. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  6022. peer->stats.rx.nawds_mcast_drop);
  6023. DP_PRINT_STATS("SGI ="
  6024. " 0.8us %d"
  6025. " 0.4us %d"
  6026. " 1.6us %d"
  6027. " 3.2us %d",
  6028. peer->stats.rx.sgi_count[0],
  6029. peer->stats.rx.sgi_count[1],
  6030. peer->stats.rx.sgi_count[2],
  6031. peer->stats.rx.sgi_count[3]);
  6032. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  6033. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  6034. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  6035. DP_PRINT_STATS("Reception Type ="
  6036. " SU %d,"
  6037. " MU_MIMO %d,"
  6038. " MU_OFDMA %d,"
  6039. " MU_OFDMA_MIMO %d",
  6040. peer->stats.rx.reception_type[0],
  6041. peer->stats.rx.reception_type[1],
  6042. peer->stats.rx.reception_type[2],
  6043. peer->stats.rx.reception_type[3]);
  6044. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  6045. index = 0;
  6046. for (i = 0; i < SS_COUNT; i++) {
  6047. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6048. " %d", peer->stats.rx.nss[i]);
  6049. }
  6050. DP_PRINT_STATS("NSS(1-8) = %s",
  6051. nss);
  6052. DP_PRINT_STATS("Aggregation:");
  6053. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  6054. peer->stats.rx.ampdu_cnt);
  6055. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  6056. peer->stats.rx.non_ampdu_cnt);
  6057. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  6058. peer->stats.rx.amsdu_cnt);
  6059. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  6060. peer->stats.rx.non_amsdu_cnt);
  6061. DP_PRINT_STATS("Bytes and Packets received in last one sec:");
  6062. DP_PRINT_STATS(" Bytes received in last sec: %d",
  6063. peer->stats.rx.rx_byte_rate);
  6064. DP_PRINT_STATS(" Data received in last sec: %d",
  6065. peer->stats.rx.rx_data_rate);
  6066. }
  6067. /*
  6068. * dp_get_host_peer_stats()- function to print peer stats
  6069. * @pdev_handle: DP_PDEV handle
  6070. * @mac_addr: mac address of the peer
  6071. *
  6072. * Return: void
  6073. */
  6074. static void
  6075. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  6076. {
  6077. struct dp_peer *peer;
  6078. uint8_t local_id;
  6079. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  6080. &local_id);
  6081. if (!peer) {
  6082. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6083. "%s: Invalid peer\n", __func__);
  6084. return;
  6085. }
  6086. dp_print_peer_stats(peer);
  6087. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  6088. }
  6089. /**
  6090. * dp_print_soc_cfg_params()- Dump soc wlan config parameters
  6091. * @soc_handle: Soc handle
  6092. *
  6093. * Return: void
  6094. */
  6095. static void
  6096. dp_print_soc_cfg_params(struct dp_soc *soc)
  6097. {
  6098. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  6099. uint8_t index = 0, i = 0;
  6100. char ring_mask[DP_MAX_INT_CONTEXTS_STRING_LENGTH];
  6101. int num_of_int_contexts;
  6102. if (!soc) {
  6103. dp_err("Context is null");
  6104. return;
  6105. }
  6106. soc_cfg_ctx = soc->wlan_cfg_ctx;
  6107. if (!soc_cfg_ctx) {
  6108. dp_err("Context is null");
  6109. return;
  6110. }
  6111. num_of_int_contexts =
  6112. wlan_cfg_get_num_contexts(soc_cfg_ctx);
  6113. DP_TRACE_STATS(DEBUG, "No. of interrupt contexts: %u",
  6114. soc_cfg_ctx->num_int_ctxts);
  6115. DP_TRACE_STATS(DEBUG, "Max clients: %u",
  6116. soc_cfg_ctx->max_clients);
  6117. DP_TRACE_STATS(DEBUG, "Max alloc size: %u ",
  6118. soc_cfg_ctx->max_alloc_size);
  6119. DP_TRACE_STATS(DEBUG, "Per pdev tx ring: %u ",
  6120. soc_cfg_ctx->per_pdev_tx_ring);
  6121. DP_TRACE_STATS(DEBUG, "Num tcl data rings: %u ",
  6122. soc_cfg_ctx->num_tcl_data_rings);
  6123. DP_TRACE_STATS(DEBUG, "Per pdev rx ring: %u ",
  6124. soc_cfg_ctx->per_pdev_rx_ring);
  6125. DP_TRACE_STATS(DEBUG, "Per pdev lmac ring: %u ",
  6126. soc_cfg_ctx->per_pdev_lmac_ring);
  6127. DP_TRACE_STATS(DEBUG, "Num of reo dest rings: %u ",
  6128. soc_cfg_ctx->num_reo_dest_rings);
  6129. DP_TRACE_STATS(DEBUG, "Num tx desc pool: %u ",
  6130. soc_cfg_ctx->num_tx_desc_pool);
  6131. DP_TRACE_STATS(DEBUG, "Num tx ext desc pool: %u ",
  6132. soc_cfg_ctx->num_tx_ext_desc_pool);
  6133. DP_TRACE_STATS(DEBUG, "Num tx desc: %u ",
  6134. soc_cfg_ctx->num_tx_desc);
  6135. DP_TRACE_STATS(DEBUG, "Num tx ext desc: %u ",
  6136. soc_cfg_ctx->num_tx_ext_desc);
  6137. DP_TRACE_STATS(DEBUG, "Htt packet type: %u ",
  6138. soc_cfg_ctx->htt_packet_type);
  6139. DP_TRACE_STATS(DEBUG, "Max peer_ids: %u ",
  6140. soc_cfg_ctx->max_peer_id);
  6141. DP_TRACE_STATS(DEBUG, "Tx ring size: %u ",
  6142. soc_cfg_ctx->tx_ring_size);
  6143. DP_TRACE_STATS(DEBUG, "Tx comp ring size: %u ",
  6144. soc_cfg_ctx->tx_comp_ring_size);
  6145. DP_TRACE_STATS(DEBUG, "Tx comp ring size nss: %u ",
  6146. soc_cfg_ctx->tx_comp_ring_size_nss);
  6147. DP_TRACE_STATS(DEBUG, "Int batch threshold tx: %u ",
  6148. soc_cfg_ctx->int_batch_threshold_tx);
  6149. DP_TRACE_STATS(DEBUG, "Int timer threshold tx: %u ",
  6150. soc_cfg_ctx->int_timer_threshold_tx);
  6151. DP_TRACE_STATS(DEBUG, "Int batch threshold rx: %u ",
  6152. soc_cfg_ctx->int_batch_threshold_rx);
  6153. DP_TRACE_STATS(DEBUG, "Int timer threshold rx: %u ",
  6154. soc_cfg_ctx->int_timer_threshold_rx);
  6155. DP_TRACE_STATS(DEBUG, "Int batch threshold other: %u ",
  6156. soc_cfg_ctx->int_batch_threshold_other);
  6157. DP_TRACE_STATS(DEBUG, "Int timer threshold other: %u ",
  6158. soc_cfg_ctx->int_timer_threshold_other);
  6159. for (i = 0; i < num_of_int_contexts; i++) {
  6160. index += qdf_snprint(&ring_mask[index],
  6161. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6162. " %d",
  6163. soc_cfg_ctx->int_tx_ring_mask[i]);
  6164. }
  6165. DP_TRACE_STATS(DEBUG, "Tx ring mask (0-%d):%s",
  6166. num_of_int_contexts, ring_mask);
  6167. index = 0;
  6168. for (i = 0; i < num_of_int_contexts; i++) {
  6169. index += qdf_snprint(&ring_mask[index],
  6170. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6171. " %d",
  6172. soc_cfg_ctx->int_rx_ring_mask[i]);
  6173. }
  6174. DP_TRACE_STATS(DEBUG, "Rx ring mask (0-%d):%s",
  6175. num_of_int_contexts, ring_mask);
  6176. index = 0;
  6177. for (i = 0; i < num_of_int_contexts; i++) {
  6178. index += qdf_snprint(&ring_mask[index],
  6179. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6180. " %d",
  6181. soc_cfg_ctx->int_rx_mon_ring_mask[i]);
  6182. }
  6183. DP_TRACE_STATS(DEBUG, "Rx mon ring mask (0-%d):%s",
  6184. num_of_int_contexts, ring_mask);
  6185. index = 0;
  6186. for (i = 0; i < num_of_int_contexts; i++) {
  6187. index += qdf_snprint(&ring_mask[index],
  6188. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6189. " %d",
  6190. soc_cfg_ctx->int_rx_err_ring_mask[i]);
  6191. }
  6192. DP_TRACE_STATS(DEBUG, "Rx err ring mask (0-%d):%s",
  6193. num_of_int_contexts, ring_mask);
  6194. index = 0;
  6195. for (i = 0; i < num_of_int_contexts; i++) {
  6196. index += qdf_snprint(&ring_mask[index],
  6197. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6198. " %d",
  6199. soc_cfg_ctx->int_rx_wbm_rel_ring_mask[i]);
  6200. }
  6201. DP_TRACE_STATS(DEBUG, "Rx wbm rel ring mask (0-%d):%s",
  6202. num_of_int_contexts, ring_mask);
  6203. index = 0;
  6204. for (i = 0; i < num_of_int_contexts; i++) {
  6205. index += qdf_snprint(&ring_mask[index],
  6206. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6207. " %d",
  6208. soc_cfg_ctx->int_reo_status_ring_mask[i]);
  6209. }
  6210. DP_TRACE_STATS(DEBUG, "Reo ring mask (0-%d):%s",
  6211. num_of_int_contexts, ring_mask);
  6212. index = 0;
  6213. for (i = 0; i < num_of_int_contexts; i++) {
  6214. index += qdf_snprint(&ring_mask[index],
  6215. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6216. " %d",
  6217. soc_cfg_ctx->int_rxdma2host_ring_mask[i]);
  6218. }
  6219. DP_TRACE_STATS(DEBUG, "Rxdma2host ring mask (0-%d):%s",
  6220. num_of_int_contexts, ring_mask);
  6221. index = 0;
  6222. for (i = 0; i < num_of_int_contexts; i++) {
  6223. index += qdf_snprint(&ring_mask[index],
  6224. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6225. " %d",
  6226. soc_cfg_ctx->int_host2rxdma_ring_mask[i]);
  6227. }
  6228. DP_TRACE_STATS(DEBUG, "Host2rxdma ring mask (0-%d):%s",
  6229. num_of_int_contexts, ring_mask);
  6230. DP_TRACE_STATS(DEBUG, "Rx hash: %u ",
  6231. soc_cfg_ctx->rx_hash);
  6232. DP_TRACE_STATS(DEBUG, "Tso enabled: %u ",
  6233. soc_cfg_ctx->tso_enabled);
  6234. DP_TRACE_STATS(DEBUG, "Lro enabled: %u ",
  6235. soc_cfg_ctx->lro_enabled);
  6236. DP_TRACE_STATS(DEBUG, "Sg enabled: %u ",
  6237. soc_cfg_ctx->sg_enabled);
  6238. DP_TRACE_STATS(DEBUG, "Gro enabled: %u ",
  6239. soc_cfg_ctx->gro_enabled);
  6240. DP_TRACE_STATS(DEBUG, "rawmode enabled: %u ",
  6241. soc_cfg_ctx->rawmode_enabled);
  6242. DP_TRACE_STATS(DEBUG, "peer flow ctrl enabled: %u ",
  6243. soc_cfg_ctx->peer_flow_ctrl_enabled);
  6244. DP_TRACE_STATS(DEBUG, "napi enabled: %u ",
  6245. soc_cfg_ctx->napi_enabled);
  6246. DP_TRACE_STATS(DEBUG, "Tcp Udp checksum offload: %u ",
  6247. soc_cfg_ctx->tcp_udp_checksumoffload);
  6248. DP_TRACE_STATS(DEBUG, "Defrag timeout check: %u ",
  6249. soc_cfg_ctx->defrag_timeout_check);
  6250. DP_TRACE_STATS(DEBUG, "Rx defrag min timeout: %u ",
  6251. soc_cfg_ctx->rx_defrag_min_timeout);
  6252. DP_TRACE_STATS(DEBUG, "WBM release ring: %u ",
  6253. soc_cfg_ctx->wbm_release_ring);
  6254. DP_TRACE_STATS(DEBUG, "TCL CMD ring: %u ",
  6255. soc_cfg_ctx->tcl_cmd_ring);
  6256. DP_TRACE_STATS(DEBUG, "TCL Status ring: %u ",
  6257. soc_cfg_ctx->tcl_status_ring);
  6258. DP_TRACE_STATS(DEBUG, "REO Reinject ring: %u ",
  6259. soc_cfg_ctx->reo_reinject_ring);
  6260. DP_TRACE_STATS(DEBUG, "RX release ring: %u ",
  6261. soc_cfg_ctx->rx_release_ring);
  6262. DP_TRACE_STATS(DEBUG, "REO Exception ring: %u ",
  6263. soc_cfg_ctx->reo_exception_ring);
  6264. DP_TRACE_STATS(DEBUG, "REO CMD ring: %u ",
  6265. soc_cfg_ctx->reo_cmd_ring);
  6266. DP_TRACE_STATS(DEBUG, "REO STATUS ring: %u ",
  6267. soc_cfg_ctx->reo_status_ring);
  6268. DP_TRACE_STATS(DEBUG, "RXDMA refill ring: %u ",
  6269. soc_cfg_ctx->rxdma_refill_ring);
  6270. DP_TRACE_STATS(DEBUG, "RXDMA err dst ring: %u ",
  6271. soc_cfg_ctx->rxdma_err_dst_ring);
  6272. }
  6273. /**
  6274. * dp_print_vdev_cfg_params() - Print the pdev cfg parameters
  6275. * @pdev_handle: DP pdev handle
  6276. *
  6277. * Return - void
  6278. */
  6279. static void
  6280. dp_print_pdev_cfg_params(struct dp_pdev *pdev)
  6281. {
  6282. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  6283. if (!pdev) {
  6284. dp_err("Context is null");
  6285. return;
  6286. }
  6287. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  6288. if (!pdev_cfg_ctx) {
  6289. dp_err("Context is null");
  6290. return;
  6291. }
  6292. DP_TRACE_STATS(DEBUG, "Rx dma buf ring size: %d ",
  6293. pdev_cfg_ctx->rx_dma_buf_ring_size);
  6294. DP_TRACE_STATS(DEBUG, "DMA Mon buf ring size: %d ",
  6295. pdev_cfg_ctx->dma_mon_buf_ring_size);
  6296. DP_TRACE_STATS(DEBUG, "DMA Mon dest ring size: %d ",
  6297. pdev_cfg_ctx->dma_mon_dest_ring_size);
  6298. DP_TRACE_STATS(DEBUG, "DMA Mon status ring size: %d ",
  6299. pdev_cfg_ctx->dma_mon_status_ring_size);
  6300. DP_TRACE_STATS(DEBUG, "Rxdma monitor desc ring: %d",
  6301. pdev_cfg_ctx->rxdma_monitor_desc_ring);
  6302. DP_TRACE_STATS(DEBUG, "Num mac rings: %d ",
  6303. pdev_cfg_ctx->num_mac_rings);
  6304. }
  6305. /**
  6306. * dp_txrx_stats_help() - Helper function for Txrx_Stats
  6307. *
  6308. * Return: None
  6309. */
  6310. static void dp_txrx_stats_help(void)
  6311. {
  6312. dp_info("Command: iwpriv wlan0 txrx_stats <stats_option> <mac_id>");
  6313. dp_info("stats_option:");
  6314. dp_info(" 1 -- HTT Tx Statistics");
  6315. dp_info(" 2 -- HTT Rx Statistics");
  6316. dp_info(" 3 -- HTT Tx HW Queue Statistics");
  6317. dp_info(" 4 -- HTT Tx HW Sched Statistics");
  6318. dp_info(" 5 -- HTT Error Statistics");
  6319. dp_info(" 6 -- HTT TQM Statistics");
  6320. dp_info(" 7 -- HTT TQM CMDQ Statistics");
  6321. dp_info(" 8 -- HTT TX_DE_CMN Statistics");
  6322. dp_info(" 9 -- HTT Tx Rate Statistics");
  6323. dp_info(" 10 -- HTT Rx Rate Statistics");
  6324. dp_info(" 11 -- HTT Peer Statistics");
  6325. dp_info(" 12 -- HTT Tx SelfGen Statistics");
  6326. dp_info(" 13 -- HTT Tx MU HWQ Statistics");
  6327. dp_info(" 14 -- HTT RING_IF_INFO Statistics");
  6328. dp_info(" 15 -- HTT SRNG Statistics");
  6329. dp_info(" 16 -- HTT SFM Info Statistics");
  6330. dp_info(" 17 -- HTT PDEV_TX_MU_MIMO_SCHED INFO Statistics");
  6331. dp_info(" 18 -- HTT Peer List Details");
  6332. dp_info(" 20 -- Clear Host Statistics");
  6333. dp_info(" 21 -- Host Rx Rate Statistics");
  6334. dp_info(" 22 -- Host Tx Rate Statistics");
  6335. dp_info(" 23 -- Host Tx Statistics");
  6336. dp_info(" 24 -- Host Rx Statistics");
  6337. dp_info(" 25 -- Host AST Statistics");
  6338. dp_info(" 26 -- Host SRNG PTR Statistics");
  6339. dp_info(" 27 -- Host Mon Statistics");
  6340. dp_info(" 28 -- Host REO Queue Statistics");
  6341. dp_info(" 29 -- Host Soc cfg param Statistics");
  6342. dp_info(" 30 -- Host pdev cfg param Statistics");
  6343. }
  6344. /**
  6345. * dp_print_host_stats()- Function to print the stats aggregated at host
  6346. * @vdev_handle: DP_VDEV handle
  6347. * @type: host stats type
  6348. *
  6349. * Return: 0 on success, print error message in case of failure
  6350. */
  6351. static int
  6352. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  6353. struct cdp_txrx_stats_req *req)
  6354. {
  6355. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6356. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6357. enum cdp_host_txrx_stats type =
  6358. dp_stats_mapping_table[req->stats][STATS_HOST];
  6359. dp_aggregate_pdev_stats(pdev);
  6360. switch (type) {
  6361. case TXRX_CLEAR_STATS:
  6362. dp_txrx_host_stats_clr(vdev);
  6363. break;
  6364. case TXRX_RX_RATE_STATS:
  6365. dp_print_rx_rates(vdev);
  6366. break;
  6367. case TXRX_TX_RATE_STATS:
  6368. dp_print_tx_rates(vdev);
  6369. break;
  6370. case TXRX_TX_HOST_STATS:
  6371. dp_print_pdev_tx_stats(pdev);
  6372. dp_print_soc_tx_stats(pdev->soc);
  6373. break;
  6374. case TXRX_RX_HOST_STATS:
  6375. dp_print_pdev_rx_stats(pdev);
  6376. dp_print_soc_rx_stats(pdev->soc);
  6377. break;
  6378. case TXRX_AST_STATS:
  6379. dp_print_ast_stats(pdev->soc);
  6380. dp_print_peer_table(vdev);
  6381. break;
  6382. case TXRX_SRNG_PTR_STATS:
  6383. dp_print_ring_stats(pdev);
  6384. break;
  6385. case TXRX_RX_MON_STATS:
  6386. dp_print_pdev_rx_mon_stats(pdev);
  6387. break;
  6388. case TXRX_REO_QUEUE_STATS:
  6389. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  6390. break;
  6391. case TXRX_SOC_CFG_PARAMS:
  6392. dp_print_soc_cfg_params(pdev->soc);
  6393. break;
  6394. case TXRX_PDEV_CFG_PARAMS:
  6395. dp_print_pdev_cfg_params(pdev);
  6396. break;
  6397. default:
  6398. dp_info("Wrong Input For TxRx Host Stats");
  6399. dp_txrx_stats_help();
  6400. break;
  6401. }
  6402. return 0;
  6403. }
  6404. /*
  6405. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  6406. * @pdev: DP_PDEV handle
  6407. *
  6408. * Return: void
  6409. */
  6410. static void
  6411. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  6412. {
  6413. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  6414. int mac_id;
  6415. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  6416. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6417. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6418. pdev->pdev_id);
  6419. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6420. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6421. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6422. }
  6423. }
  6424. /*
  6425. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  6426. * @pdev: DP_PDEV handle
  6427. *
  6428. * Return: void
  6429. */
  6430. static void
  6431. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  6432. {
  6433. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6434. int mac_id;
  6435. htt_tlv_filter.mpdu_start = 1;
  6436. htt_tlv_filter.msdu_start = 0;
  6437. htt_tlv_filter.packet = 0;
  6438. htt_tlv_filter.msdu_end = 0;
  6439. htt_tlv_filter.mpdu_end = 0;
  6440. htt_tlv_filter.attention = 0;
  6441. htt_tlv_filter.ppdu_start = 1;
  6442. htt_tlv_filter.ppdu_end = 1;
  6443. htt_tlv_filter.ppdu_end_user_stats = 1;
  6444. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6445. htt_tlv_filter.ppdu_end_status_done = 1;
  6446. htt_tlv_filter.enable_fp = 1;
  6447. htt_tlv_filter.enable_md = 0;
  6448. if (pdev->neighbour_peers_added &&
  6449. pdev->soc->hw_nac_monitor_support) {
  6450. htt_tlv_filter.enable_md = 1;
  6451. htt_tlv_filter.packet_header = 1;
  6452. }
  6453. if (pdev->mcopy_mode) {
  6454. htt_tlv_filter.packet_header = 1;
  6455. htt_tlv_filter.enable_mo = 1;
  6456. }
  6457. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6458. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6459. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6460. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6461. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6462. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6463. if (pdev->neighbour_peers_added &&
  6464. pdev->soc->hw_nac_monitor_support)
  6465. htt_tlv_filter.md_data_filter = FILTER_DATA_ALL;
  6466. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6467. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6468. pdev->pdev_id);
  6469. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6470. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6471. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6472. }
  6473. }
  6474. /*
  6475. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  6476. * modes are enabled or not.
  6477. * @dp_pdev: dp pdev handle.
  6478. *
  6479. * Return: bool
  6480. */
  6481. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  6482. {
  6483. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  6484. !pdev->mcopy_mode)
  6485. return true;
  6486. else
  6487. return false;
  6488. }
  6489. /*
  6490. *dp_set_bpr_enable() - API to enable/disable bpr feature
  6491. *@pdev_handle: DP_PDEV handle.
  6492. *@val: Provided value.
  6493. *
  6494. *Return: void
  6495. */
  6496. static void
  6497. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  6498. {
  6499. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6500. switch (val) {
  6501. case CDP_BPR_DISABLE:
  6502. pdev->bpr_enable = CDP_BPR_DISABLE;
  6503. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6504. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6505. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6506. } else if (pdev->enhanced_stats_en &&
  6507. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6508. !pdev->pktlog_ppdu_stats) {
  6509. dp_h2t_cfg_stats_msg_send(pdev,
  6510. DP_PPDU_STATS_CFG_ENH_STATS,
  6511. pdev->pdev_id);
  6512. }
  6513. break;
  6514. case CDP_BPR_ENABLE:
  6515. pdev->bpr_enable = CDP_BPR_ENABLE;
  6516. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  6517. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  6518. dp_h2t_cfg_stats_msg_send(pdev,
  6519. DP_PPDU_STATS_CFG_BPR,
  6520. pdev->pdev_id);
  6521. } else if (pdev->enhanced_stats_en &&
  6522. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6523. !pdev->pktlog_ppdu_stats) {
  6524. dp_h2t_cfg_stats_msg_send(pdev,
  6525. DP_PPDU_STATS_CFG_BPR_ENH,
  6526. pdev->pdev_id);
  6527. } else if (pdev->pktlog_ppdu_stats) {
  6528. dp_h2t_cfg_stats_msg_send(pdev,
  6529. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  6530. pdev->pdev_id);
  6531. }
  6532. break;
  6533. default:
  6534. break;
  6535. }
  6536. }
  6537. /*
  6538. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  6539. * @pdev_handle: DP_PDEV handle
  6540. * @val: user provided value
  6541. *
  6542. * Return: void
  6543. */
  6544. static void
  6545. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  6546. {
  6547. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6548. switch (val) {
  6549. case 0:
  6550. pdev->tx_sniffer_enable = 0;
  6551. pdev->mcopy_mode = 0;
  6552. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6553. !pdev->bpr_enable) {
  6554. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6555. dp_ppdu_ring_reset(pdev);
  6556. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  6557. dp_h2t_cfg_stats_msg_send(pdev,
  6558. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6559. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  6560. dp_h2t_cfg_stats_msg_send(pdev,
  6561. DP_PPDU_STATS_CFG_BPR_ENH,
  6562. pdev->pdev_id);
  6563. } else {
  6564. dp_h2t_cfg_stats_msg_send(pdev,
  6565. DP_PPDU_STATS_CFG_BPR,
  6566. pdev->pdev_id);
  6567. }
  6568. break;
  6569. case 1:
  6570. pdev->tx_sniffer_enable = 1;
  6571. pdev->mcopy_mode = 0;
  6572. if (!pdev->pktlog_ppdu_stats)
  6573. dp_h2t_cfg_stats_msg_send(pdev,
  6574. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6575. break;
  6576. case 2:
  6577. pdev->mcopy_mode = 1;
  6578. pdev->tx_sniffer_enable = 0;
  6579. dp_ppdu_ring_cfg(pdev);
  6580. if (!pdev->pktlog_ppdu_stats)
  6581. dp_h2t_cfg_stats_msg_send(pdev,
  6582. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6583. break;
  6584. default:
  6585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6586. "Invalid value");
  6587. break;
  6588. }
  6589. }
  6590. /*
  6591. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  6592. * @pdev_handle: DP_PDEV handle
  6593. *
  6594. * Return: void
  6595. */
  6596. static void
  6597. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6598. {
  6599. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6600. if (pdev->enhanced_stats_en == 0)
  6601. dp_cal_client_timer_start(pdev->cal_client_ctx);
  6602. pdev->enhanced_stats_en = 1;
  6603. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6604. !pdev->monitor_vdev)
  6605. dp_ppdu_ring_cfg(pdev);
  6606. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6607. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6608. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  6609. dp_h2t_cfg_stats_msg_send(pdev,
  6610. DP_PPDU_STATS_CFG_BPR_ENH,
  6611. pdev->pdev_id);
  6612. }
  6613. }
  6614. /*
  6615. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  6616. * @pdev_handle: DP_PDEV handle
  6617. *
  6618. * Return: void
  6619. */
  6620. static void
  6621. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6622. {
  6623. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6624. if (pdev->enhanced_stats_en == 1)
  6625. dp_cal_client_timer_stop(pdev->cal_client_ctx);
  6626. pdev->enhanced_stats_en = 0;
  6627. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6628. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6629. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  6630. dp_h2t_cfg_stats_msg_send(pdev,
  6631. DP_PPDU_STATS_CFG_BPR,
  6632. pdev->pdev_id);
  6633. }
  6634. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6635. !pdev->monitor_vdev)
  6636. dp_ppdu_ring_reset(pdev);
  6637. }
  6638. /*
  6639. * dp_get_fw_peer_stats()- function to print peer stats
  6640. * @pdev_handle: DP_PDEV handle
  6641. * @mac_addr: mac address of the peer
  6642. * @cap: Type of htt stats requested
  6643. *
  6644. * Currently Supporting only MAC ID based requests Only
  6645. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  6646. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  6647. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  6648. *
  6649. * Return: void
  6650. */
  6651. static void
  6652. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  6653. uint32_t cap)
  6654. {
  6655. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6656. int i;
  6657. uint32_t config_param0 = 0;
  6658. uint32_t config_param1 = 0;
  6659. uint32_t config_param2 = 0;
  6660. uint32_t config_param3 = 0;
  6661. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  6662. config_param0 |= (1 << (cap + 1));
  6663. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  6664. config_param1 |= (1 << i);
  6665. }
  6666. config_param2 |= (mac_addr[0] & 0x000000ff);
  6667. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  6668. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  6669. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  6670. config_param3 |= (mac_addr[4] & 0x000000ff);
  6671. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  6672. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  6673. config_param0, config_param1, config_param2,
  6674. config_param3, 0, 0, 0);
  6675. }
  6676. /* This struct definition will be removed from here
  6677. * once it get added in FW headers*/
  6678. struct httstats_cmd_req {
  6679. uint32_t config_param0;
  6680. uint32_t config_param1;
  6681. uint32_t config_param2;
  6682. uint32_t config_param3;
  6683. int cookie;
  6684. u_int8_t stats_id;
  6685. };
  6686. /*
  6687. * dp_get_htt_stats: function to process the httstas request
  6688. * @pdev_handle: DP pdev handle
  6689. * @data: pointer to request data
  6690. * @data_len: length for request data
  6691. *
  6692. * return: void
  6693. */
  6694. static void
  6695. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  6696. {
  6697. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6698. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  6699. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  6700. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  6701. req->config_param0, req->config_param1,
  6702. req->config_param2, req->config_param3,
  6703. req->cookie, 0, 0);
  6704. }
  6705. /*
  6706. * dp_set_pdev_param: function to set parameters in pdev
  6707. * @pdev_handle: DP pdev handle
  6708. * @param: parameter type to be set
  6709. * @val: value of parameter to be set
  6710. *
  6711. * return: void
  6712. */
  6713. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  6714. enum cdp_pdev_param_type param, uint8_t val)
  6715. {
  6716. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6717. switch (param) {
  6718. case CDP_CONFIG_DEBUG_SNIFFER:
  6719. dp_config_debug_sniffer(pdev_handle, val);
  6720. break;
  6721. case CDP_CONFIG_BPR_ENABLE:
  6722. dp_set_bpr_enable(pdev_handle, val);
  6723. break;
  6724. case CDP_CONFIG_PRIMARY_RADIO:
  6725. pdev->is_primary = val;
  6726. break;
  6727. default:
  6728. break;
  6729. }
  6730. }
  6731. /*
  6732. * dp_get_vdev_param: function to get parameters from vdev
  6733. * @param: parameter type to get value
  6734. *
  6735. * return: void
  6736. */
  6737. static uint32_t dp_get_vdev_param(struct cdp_vdev *vdev_handle,
  6738. enum cdp_vdev_param_type param)
  6739. {
  6740. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6741. uint32_t val;
  6742. switch (param) {
  6743. case CDP_ENABLE_WDS:
  6744. val = vdev->wds_enabled;
  6745. break;
  6746. case CDP_ENABLE_MEC:
  6747. val = vdev->mec_enabled;
  6748. break;
  6749. case CDP_ENABLE_DA_WAR:
  6750. val = vdev->da_war_enabled;
  6751. break;
  6752. default:
  6753. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6754. "param value %d is wrong\n",
  6755. param);
  6756. val = -1;
  6757. break;
  6758. }
  6759. return val;
  6760. }
  6761. /*
  6762. * dp_set_vdev_param: function to set parameters in vdev
  6763. * @param: parameter type to be set
  6764. * @val: value of parameter to be set
  6765. *
  6766. * return: void
  6767. */
  6768. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  6769. enum cdp_vdev_param_type param, uint32_t val)
  6770. {
  6771. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6772. switch (param) {
  6773. case CDP_ENABLE_WDS:
  6774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6775. "wds_enable %d for vdev(%p) id(%d)\n",
  6776. val, vdev, vdev->vdev_id);
  6777. vdev->wds_enabled = val;
  6778. break;
  6779. case CDP_ENABLE_MEC:
  6780. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6781. "mec_enable %d for vdev(%p) id(%d)\n",
  6782. val, vdev, vdev->vdev_id);
  6783. vdev->mec_enabled = val;
  6784. break;
  6785. case CDP_ENABLE_DA_WAR:
  6786. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6787. "da_war_enable %d for vdev(%p) id(%d)\n",
  6788. val, vdev, vdev->vdev_id);
  6789. vdev->da_war_enabled = val;
  6790. break;
  6791. case CDP_ENABLE_NAWDS:
  6792. vdev->nawds_enabled = val;
  6793. break;
  6794. case CDP_ENABLE_MCAST_EN:
  6795. vdev->mcast_enhancement_en = val;
  6796. break;
  6797. case CDP_ENABLE_PROXYSTA:
  6798. vdev->proxysta_vdev = val;
  6799. break;
  6800. case CDP_UPDATE_TDLS_FLAGS:
  6801. vdev->tdls_link_connected = val;
  6802. break;
  6803. case CDP_CFG_WDS_AGING_TIMER:
  6804. if (val == 0)
  6805. qdf_timer_stop(&vdev->pdev->soc->ast_aging_timer);
  6806. else if (val != vdev->wds_aging_timer_val)
  6807. qdf_timer_mod(&vdev->pdev->soc->ast_aging_timer, val);
  6808. vdev->wds_aging_timer_val = val;
  6809. break;
  6810. case CDP_ENABLE_AP_BRIDGE:
  6811. if (wlan_op_mode_sta != vdev->opmode)
  6812. vdev->ap_bridge_enabled = val;
  6813. else
  6814. vdev->ap_bridge_enabled = false;
  6815. break;
  6816. case CDP_ENABLE_CIPHER:
  6817. vdev->sec_type = val;
  6818. break;
  6819. case CDP_ENABLE_QWRAP_ISOLATION:
  6820. vdev->isolation_vdev = val;
  6821. break;
  6822. default:
  6823. break;
  6824. }
  6825. dp_tx_vdev_update_search_flags(vdev);
  6826. }
  6827. /**
  6828. * dp_peer_set_nawds: set nawds bit in peer
  6829. * @peer_handle: pointer to peer
  6830. * @value: enable/disable nawds
  6831. *
  6832. * return: void
  6833. */
  6834. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  6835. {
  6836. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6837. peer->nawds_enabled = value;
  6838. }
  6839. /*
  6840. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  6841. * @vdev_handle: DP_VDEV handle
  6842. * @map_id:ID of map that needs to be updated
  6843. *
  6844. * Return: void
  6845. */
  6846. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  6847. uint8_t map_id)
  6848. {
  6849. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6850. vdev->dscp_tid_map_id = map_id;
  6851. return;
  6852. }
  6853. /* dp_txrx_get_pdev_stats - Returns cdp_pdev_stats
  6854. * @peer_handle: DP pdev handle
  6855. *
  6856. * return : cdp_pdev_stats pointer
  6857. */
  6858. static struct cdp_pdev_stats*
  6859. dp_txrx_get_pdev_stats(struct cdp_pdev *pdev_handle)
  6860. {
  6861. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6862. dp_aggregate_pdev_stats(pdev);
  6863. return &pdev->stats;
  6864. }
  6865. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  6866. * @peer_handle: DP_PEER handle
  6867. *
  6868. * return : cdp_peer_stats pointer
  6869. */
  6870. static struct cdp_peer_stats*
  6871. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  6872. {
  6873. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6874. qdf_assert(peer);
  6875. return &peer->stats;
  6876. }
  6877. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  6878. * @peer_handle: DP_PEER handle
  6879. *
  6880. * return : void
  6881. */
  6882. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  6883. {
  6884. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6885. qdf_assert(peer);
  6886. qdf_mem_set(&peer->stats, sizeof(peer->stats), 0);
  6887. }
  6888. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  6889. * @vdev_handle: DP_VDEV handle
  6890. * @buf: buffer for vdev stats
  6891. *
  6892. * return : int
  6893. */
  6894. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  6895. bool is_aggregate)
  6896. {
  6897. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6898. struct cdp_vdev_stats *vdev_stats = (struct cdp_vdev_stats *)buf;
  6899. if (is_aggregate)
  6900. dp_aggregate_vdev_stats(vdev, buf);
  6901. else
  6902. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  6903. return 0;
  6904. }
  6905. /*
  6906. * dp_get_total_per(): get total per
  6907. * @pdev_handle: DP_PDEV handle
  6908. *
  6909. * Return: % error rate using retries per packet and success packets
  6910. */
  6911. static int dp_get_total_per(struct cdp_pdev *pdev_handle)
  6912. {
  6913. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6914. dp_aggregate_pdev_stats(pdev);
  6915. if ((pdev->stats.tx.tx_success.num + pdev->stats.tx.retries) == 0)
  6916. return 0;
  6917. return ((pdev->stats.tx.retries * 100) /
  6918. ((pdev->stats.tx.tx_success.num) + (pdev->stats.tx.retries)));
  6919. }
  6920. /*
  6921. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  6922. * @pdev_handle: DP_PDEV handle
  6923. * @buf: to hold pdev_stats
  6924. *
  6925. * Return: int
  6926. */
  6927. static int
  6928. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  6929. {
  6930. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6931. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  6932. struct cdp_txrx_stats_req req = {0,};
  6933. dp_aggregate_pdev_stats(pdev);
  6934. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_TX;
  6935. req.cookie_val = 1;
  6936. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  6937. req.param1, req.param2, req.param3, 0,
  6938. req.cookie_val, 0);
  6939. msleep(DP_MAX_SLEEP_TIME);
  6940. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_RX;
  6941. req.cookie_val = 1;
  6942. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  6943. req.param1, req.param2, req.param3, 0,
  6944. req.cookie_val, 0);
  6945. msleep(DP_MAX_SLEEP_TIME);
  6946. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  6947. return TXRX_STATS_LEVEL;
  6948. }
  6949. /**
  6950. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  6951. * @pdev: DP_PDEV handle
  6952. * @map_id: ID of map that needs to be updated
  6953. * @tos: index value in map
  6954. * @tid: tid value passed by the user
  6955. *
  6956. * Return: void
  6957. */
  6958. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  6959. uint8_t map_id, uint8_t tos, uint8_t tid)
  6960. {
  6961. uint8_t dscp;
  6962. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  6963. struct dp_soc *soc = pdev->soc;
  6964. if (!soc)
  6965. return;
  6966. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  6967. pdev->dscp_tid_map[map_id][dscp] = tid;
  6968. if (map_id < soc->num_hw_dscp_tid_map)
  6969. hal_tx_update_dscp_tid(soc->hal_soc, tid,
  6970. map_id, dscp);
  6971. return;
  6972. }
  6973. /**
  6974. * dp_hmmc_tid_override_en_wifi3(): Function to enable hmmc tid override.
  6975. * @pdev_handle: pdev handle
  6976. * @val: hmmc-dscp flag value
  6977. *
  6978. * Return: void
  6979. */
  6980. static void dp_hmmc_tid_override_en_wifi3(struct cdp_pdev *pdev_handle,
  6981. bool val)
  6982. {
  6983. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6984. pdev->hmmc_tid_override_en = val;
  6985. }
  6986. /**
  6987. * dp_set_hmmc_tid_val_wifi3(): Function to set hmmc tid value.
  6988. * @pdev_handle: pdev handle
  6989. * @tid: tid value
  6990. *
  6991. * Return: void
  6992. */
  6993. static void dp_set_hmmc_tid_val_wifi3(struct cdp_pdev *pdev_handle,
  6994. uint8_t tid)
  6995. {
  6996. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6997. pdev->hmmc_tid = tid;
  6998. }
  6999. /**
  7000. * dp_fw_stats_process(): Process TxRX FW stats request
  7001. * @vdev_handle: DP VDEV handle
  7002. * @req: stats request
  7003. *
  7004. * return: int
  7005. */
  7006. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  7007. struct cdp_txrx_stats_req *req)
  7008. {
  7009. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7010. struct dp_pdev *pdev = NULL;
  7011. uint32_t stats = req->stats;
  7012. uint8_t mac_id = req->mac_id;
  7013. if (!vdev) {
  7014. DP_TRACE(NONE, "VDEV not found");
  7015. return 1;
  7016. }
  7017. pdev = vdev->pdev;
  7018. /*
  7019. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  7020. * from param0 to param3 according to below rule:
  7021. *
  7022. * PARAM:
  7023. * - config_param0 : start_offset (stats type)
  7024. * - config_param1 : stats bmask from start offset
  7025. * - config_param2 : stats bmask from start offset + 32
  7026. * - config_param3 : stats bmask from start offset + 64
  7027. */
  7028. if (req->stats == CDP_TXRX_STATS_0) {
  7029. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  7030. req->param1 = 0xFFFFFFFF;
  7031. req->param2 = 0xFFFFFFFF;
  7032. req->param3 = 0xFFFFFFFF;
  7033. } else if (req->stats == (uint8_t)HTT_DBG_EXT_STATS_PDEV_TX_MU) {
  7034. req->param0 = HTT_DBG_EXT_STATS_SET_VDEV_MASK(vdev->vdev_id);
  7035. }
  7036. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  7037. req->param1, req->param2, req->param3,
  7038. 0, 0, mac_id);
  7039. }
  7040. /**
  7041. * dp_txrx_stats_request - function to map to firmware and host stats
  7042. * @vdev: virtual handle
  7043. * @req: stats request
  7044. *
  7045. * Return: QDF_STATUS
  7046. */
  7047. static
  7048. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  7049. struct cdp_txrx_stats_req *req)
  7050. {
  7051. int host_stats;
  7052. int fw_stats;
  7053. enum cdp_stats stats;
  7054. int num_stats;
  7055. if (!vdev || !req) {
  7056. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7057. "Invalid vdev/req instance");
  7058. return QDF_STATUS_E_INVAL;
  7059. }
  7060. stats = req->stats;
  7061. if (stats >= CDP_TXRX_MAX_STATS)
  7062. return QDF_STATUS_E_INVAL;
  7063. /*
  7064. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  7065. * has to be updated if new FW HTT stats added
  7066. */
  7067. if (stats > CDP_TXRX_STATS_HTT_MAX)
  7068. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  7069. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  7070. if (stats >= num_stats) {
  7071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7072. "%s: Invalid stats option: %d", __func__, stats);
  7073. return QDF_STATUS_E_INVAL;
  7074. }
  7075. req->stats = stats;
  7076. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  7077. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  7078. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7079. "stats: %u fw_stats_type: %d host_stats: %d",
  7080. stats, fw_stats, host_stats);
  7081. if (fw_stats != TXRX_FW_STATS_INVALID) {
  7082. /* update request with FW stats type */
  7083. req->stats = fw_stats;
  7084. return dp_fw_stats_process(vdev, req);
  7085. }
  7086. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  7087. (host_stats <= TXRX_HOST_STATS_MAX))
  7088. return dp_print_host_stats(vdev, req);
  7089. else
  7090. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7091. "Wrong Input for TxRx Stats");
  7092. return QDF_STATUS_SUCCESS;
  7093. }
  7094. /*
  7095. * dp_print_napi_stats(): NAPI stats
  7096. * @soc - soc handle
  7097. */
  7098. static void dp_print_napi_stats(struct dp_soc *soc)
  7099. {
  7100. hif_print_napi_stats(soc->hif_handle);
  7101. }
  7102. /*
  7103. * dp_print_per_ring_stats(): Packet count per ring
  7104. * @soc - soc handle
  7105. */
  7106. static void dp_print_per_ring_stats(struct dp_soc *soc)
  7107. {
  7108. uint8_t ring;
  7109. uint16_t core;
  7110. uint64_t total_packets;
  7111. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  7112. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  7113. total_packets = 0;
  7114. DP_TRACE_STATS(INFO_HIGH,
  7115. "Packets on ring %u:", ring);
  7116. for (core = 0; core < NR_CPUS; core++) {
  7117. DP_TRACE_STATS(INFO_HIGH,
  7118. "Packets arriving on core %u: %llu",
  7119. core,
  7120. soc->stats.rx.ring_packets[core][ring]);
  7121. total_packets += soc->stats.rx.ring_packets[core][ring];
  7122. }
  7123. DP_TRACE_STATS(INFO_HIGH,
  7124. "Total packets on ring %u: %llu",
  7125. ring, total_packets);
  7126. }
  7127. }
  7128. /*
  7129. * dp_txrx_path_stats() - Function to display dump stats
  7130. * @soc - soc handle
  7131. *
  7132. * return: none
  7133. */
  7134. static void dp_txrx_path_stats(struct dp_soc *soc)
  7135. {
  7136. uint8_t error_code;
  7137. uint8_t loop_pdev;
  7138. struct dp_pdev *pdev;
  7139. uint8_t i;
  7140. if (!soc) {
  7141. DP_TRACE(ERROR, "%s: Invalid access",
  7142. __func__);
  7143. return;
  7144. }
  7145. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  7146. pdev = soc->pdev_list[loop_pdev];
  7147. dp_aggregate_pdev_stats(pdev);
  7148. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  7149. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  7150. pdev->stats.tx_i.rcvd.num,
  7151. pdev->stats.tx_i.rcvd.bytes);
  7152. DP_TRACE_STATS(INFO_HIGH,
  7153. "processed from host: %u msdus (%llu bytes)",
  7154. pdev->stats.tx_i.processed.num,
  7155. pdev->stats.tx_i.processed.bytes);
  7156. DP_TRACE_STATS(INFO_HIGH,
  7157. "successfully transmitted: %u msdus (%llu bytes)",
  7158. pdev->stats.tx.tx_success.num,
  7159. pdev->stats.tx.tx_success.bytes);
  7160. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  7161. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  7162. pdev->stats.tx_i.dropped.dropped_pkt.num);
  7163. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  7164. pdev->stats.tx_i.dropped.desc_na.num);
  7165. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  7166. pdev->stats.tx_i.dropped.ring_full);
  7167. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  7168. pdev->stats.tx_i.dropped.enqueue_fail);
  7169. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  7170. pdev->stats.tx_i.dropped.dma_error);
  7171. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  7172. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  7173. pdev->stats.tx.tx_failed);
  7174. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  7175. pdev->stats.tx.dropped.age_out);
  7176. DP_TRACE_STATS(INFO_HIGH, "firmware removed packets: %u",
  7177. pdev->stats.tx.dropped.fw_rem.num);
  7178. DP_TRACE_STATS(INFO_HIGH, "firmware removed bytes: %llu",
  7179. pdev->stats.tx.dropped.fw_rem.bytes);
  7180. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  7181. pdev->stats.tx.dropped.fw_rem_tx);
  7182. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  7183. pdev->stats.tx.dropped.fw_rem_notx);
  7184. DP_TRACE_STATS(INFO_HIGH, "peer_invalid: %u",
  7185. pdev->soc->stats.tx.tx_invalid_peer.num);
  7186. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  7187. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7188. pdev->stats.tx_comp_histogram.pkts_1);
  7189. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7190. pdev->stats.tx_comp_histogram.pkts_2_20);
  7191. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7192. pdev->stats.tx_comp_histogram.pkts_21_40);
  7193. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7194. pdev->stats.tx_comp_histogram.pkts_41_60);
  7195. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7196. pdev->stats.tx_comp_histogram.pkts_61_80);
  7197. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7198. pdev->stats.tx_comp_histogram.pkts_81_100);
  7199. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7200. pdev->stats.tx_comp_histogram.pkts_101_200);
  7201. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7202. pdev->stats.tx_comp_histogram.pkts_201_plus);
  7203. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  7204. DP_TRACE_STATS(INFO_HIGH,
  7205. "delivered %u msdus ( %llu bytes),",
  7206. pdev->stats.rx.to_stack.num,
  7207. pdev->stats.rx.to_stack.bytes);
  7208. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  7209. DP_TRACE_STATS(INFO_HIGH,
  7210. "received on reo[%d] %u msdus( %llu bytes),",
  7211. i, pdev->stats.rx.rcvd_reo[i].num,
  7212. pdev->stats.rx.rcvd_reo[i].bytes);
  7213. DP_TRACE_STATS(INFO_HIGH,
  7214. "intra-bss packets %u msdus ( %llu bytes),",
  7215. pdev->stats.rx.intra_bss.pkts.num,
  7216. pdev->stats.rx.intra_bss.pkts.bytes);
  7217. DP_TRACE_STATS(INFO_HIGH,
  7218. "intra-bss fails %u msdus ( %llu bytes),",
  7219. pdev->stats.rx.intra_bss.fail.num,
  7220. pdev->stats.rx.intra_bss.fail.bytes);
  7221. DP_TRACE_STATS(INFO_HIGH,
  7222. "raw packets %u msdus ( %llu bytes),",
  7223. pdev->stats.rx.raw.num,
  7224. pdev->stats.rx.raw.bytes);
  7225. DP_TRACE_STATS(INFO_HIGH, "dropped: error %u msdus",
  7226. pdev->stats.rx.err.mic_err);
  7227. DP_TRACE_STATS(INFO_HIGH, "peer invalid %u",
  7228. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  7229. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  7230. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  7231. pdev->soc->stats.rx.err.invalid_rbm);
  7232. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  7233. pdev->soc->stats.rx.err.hal_ring_access_fail);
  7234. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  7235. error_code++) {
  7236. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  7237. continue;
  7238. DP_TRACE_STATS(INFO_HIGH,
  7239. "Reo error number (%u): %u msdus",
  7240. error_code,
  7241. pdev->soc->stats.rx.err
  7242. .reo_error[error_code]);
  7243. }
  7244. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  7245. error_code++) {
  7246. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  7247. continue;
  7248. DP_TRACE_STATS(INFO_HIGH,
  7249. "Rxdma error number (%u): %u msdus",
  7250. error_code,
  7251. pdev->soc->stats.rx.err
  7252. .rxdma_error[error_code]);
  7253. }
  7254. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  7255. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7256. pdev->stats.rx_ind_histogram.pkts_1);
  7257. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7258. pdev->stats.rx_ind_histogram.pkts_2_20);
  7259. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7260. pdev->stats.rx_ind_histogram.pkts_21_40);
  7261. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7262. pdev->stats.rx_ind_histogram.pkts_41_60);
  7263. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7264. pdev->stats.rx_ind_histogram.pkts_61_80);
  7265. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7266. pdev->stats.rx_ind_histogram.pkts_81_100);
  7267. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7268. pdev->stats.rx_ind_histogram.pkts_101_200);
  7269. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7270. pdev->stats.rx_ind_histogram.pkts_201_plus);
  7271. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  7272. __func__,
  7273. pdev->soc->wlan_cfg_ctx
  7274. ->tso_enabled,
  7275. pdev->soc->wlan_cfg_ctx
  7276. ->lro_enabled,
  7277. pdev->soc->wlan_cfg_ctx
  7278. ->rx_hash,
  7279. pdev->soc->wlan_cfg_ctx
  7280. ->napi_enabled);
  7281. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7282. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  7283. __func__,
  7284. pdev->soc->wlan_cfg_ctx
  7285. ->tx_flow_stop_queue_threshold,
  7286. pdev->soc->wlan_cfg_ctx
  7287. ->tx_flow_start_queue_offset);
  7288. #endif
  7289. }
  7290. }
  7291. /*
  7292. * dp_txrx_dump_stats() - Dump statistics
  7293. * @value - Statistics option
  7294. */
  7295. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  7296. enum qdf_stats_verbosity_level level)
  7297. {
  7298. struct dp_soc *soc =
  7299. (struct dp_soc *)psoc;
  7300. QDF_STATUS status = QDF_STATUS_SUCCESS;
  7301. if (!soc) {
  7302. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7303. "%s: soc is NULL", __func__);
  7304. return QDF_STATUS_E_INVAL;
  7305. }
  7306. switch (value) {
  7307. case CDP_TXRX_PATH_STATS:
  7308. dp_txrx_path_stats(soc);
  7309. break;
  7310. case CDP_RX_RING_STATS:
  7311. dp_print_per_ring_stats(soc);
  7312. break;
  7313. case CDP_TXRX_TSO_STATS:
  7314. /* TODO: NOT IMPLEMENTED */
  7315. break;
  7316. case CDP_DUMP_TX_FLOW_POOL_INFO:
  7317. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  7318. break;
  7319. case CDP_DP_NAPI_STATS:
  7320. dp_print_napi_stats(soc);
  7321. break;
  7322. case CDP_TXRX_DESC_STATS:
  7323. /* TODO: NOT IMPLEMENTED */
  7324. break;
  7325. default:
  7326. status = QDF_STATUS_E_INVAL;
  7327. break;
  7328. }
  7329. return status;
  7330. }
  7331. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7332. /**
  7333. * dp_update_flow_control_parameters() - API to store datapath
  7334. * config parameters
  7335. * @soc: soc handle
  7336. * @cfg: ini parameter handle
  7337. *
  7338. * Return: void
  7339. */
  7340. static inline
  7341. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7342. struct cdp_config_params *params)
  7343. {
  7344. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  7345. params->tx_flow_stop_queue_threshold;
  7346. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  7347. params->tx_flow_start_queue_offset;
  7348. }
  7349. #else
  7350. static inline
  7351. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7352. struct cdp_config_params *params)
  7353. {
  7354. }
  7355. #endif
  7356. /**
  7357. * dp_update_config_parameters() - API to store datapath
  7358. * config parameters
  7359. * @soc: soc handle
  7360. * @cfg: ini parameter handle
  7361. *
  7362. * Return: status
  7363. */
  7364. static
  7365. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  7366. struct cdp_config_params *params)
  7367. {
  7368. struct dp_soc *soc = (struct dp_soc *)psoc;
  7369. if (!(soc)) {
  7370. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7371. "%s: Invalid handle", __func__);
  7372. return QDF_STATUS_E_INVAL;
  7373. }
  7374. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  7375. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  7376. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  7377. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  7378. params->tcp_udp_checksumoffload;
  7379. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  7380. soc->wlan_cfg_ctx->ipa_enabled = params->ipa_enable;
  7381. dp_update_flow_control_parameters(soc, params);
  7382. return QDF_STATUS_SUCCESS;
  7383. }
  7384. /**
  7385. * dp_txrx_set_wds_rx_policy() - API to store datapath
  7386. * config parameters
  7387. * @vdev_handle - datapath vdev handle
  7388. * @cfg: ini parameter handle
  7389. *
  7390. * Return: status
  7391. */
  7392. #ifdef WDS_VENDOR_EXTENSION
  7393. void
  7394. dp_txrx_set_wds_rx_policy(
  7395. struct cdp_vdev *vdev_handle,
  7396. u_int32_t val)
  7397. {
  7398. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7399. struct dp_peer *peer;
  7400. if (vdev->opmode == wlan_op_mode_ap) {
  7401. /* for ap, set it on bss_peer */
  7402. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  7403. if (peer->bss_peer) {
  7404. peer->wds_ecm.wds_rx_filter = 1;
  7405. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7406. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7407. break;
  7408. }
  7409. }
  7410. } else if (vdev->opmode == wlan_op_mode_sta) {
  7411. peer = TAILQ_FIRST(&vdev->peer_list);
  7412. peer->wds_ecm.wds_rx_filter = 1;
  7413. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7414. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7415. }
  7416. }
  7417. /**
  7418. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  7419. *
  7420. * @peer_handle - datapath peer handle
  7421. * @wds_tx_ucast: policy for unicast transmission
  7422. * @wds_tx_mcast: policy for multicast transmission
  7423. *
  7424. * Return: void
  7425. */
  7426. void
  7427. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  7428. int wds_tx_ucast, int wds_tx_mcast)
  7429. {
  7430. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7431. if (wds_tx_ucast || wds_tx_mcast) {
  7432. peer->wds_enabled = 1;
  7433. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  7434. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  7435. } else {
  7436. peer->wds_enabled = 0;
  7437. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  7438. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  7439. }
  7440. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7441. FL("Policy Update set to :\
  7442. peer->wds_enabled %d\
  7443. peer->wds_ecm.wds_tx_ucast_4addr %d\
  7444. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  7445. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  7446. peer->wds_ecm.wds_tx_mcast_4addr);
  7447. return;
  7448. }
  7449. #endif
  7450. static struct cdp_wds_ops dp_ops_wds = {
  7451. .vdev_set_wds = dp_vdev_set_wds,
  7452. #ifdef WDS_VENDOR_EXTENSION
  7453. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  7454. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  7455. #endif
  7456. };
  7457. /*
  7458. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  7459. * @vdev_handle - datapath vdev handle
  7460. * @callback - callback function
  7461. * @ctxt: callback context
  7462. *
  7463. */
  7464. static void
  7465. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  7466. ol_txrx_data_tx_cb callback, void *ctxt)
  7467. {
  7468. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7469. vdev->tx_non_std_data_callback.func = callback;
  7470. vdev->tx_non_std_data_callback.ctxt = ctxt;
  7471. }
  7472. /**
  7473. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  7474. * @pdev_hdl: datapath pdev handle
  7475. *
  7476. * Return: opaque pointer to dp txrx handle
  7477. */
  7478. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  7479. {
  7480. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7481. return pdev->dp_txrx_handle;
  7482. }
  7483. /**
  7484. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  7485. * @pdev_hdl: datapath pdev handle
  7486. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  7487. *
  7488. * Return: void
  7489. */
  7490. static void
  7491. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  7492. {
  7493. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7494. pdev->dp_txrx_handle = dp_txrx_hdl;
  7495. }
  7496. /**
  7497. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  7498. * @soc_handle: datapath soc handle
  7499. *
  7500. * Return: opaque pointer to external dp (non-core DP)
  7501. */
  7502. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  7503. {
  7504. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7505. return soc->external_txrx_handle;
  7506. }
  7507. /**
  7508. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  7509. * @soc_handle: datapath soc handle
  7510. * @txrx_handle: opaque pointer to external dp (non-core DP)
  7511. *
  7512. * Return: void
  7513. */
  7514. static void
  7515. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  7516. {
  7517. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7518. soc->external_txrx_handle = txrx_handle;
  7519. }
  7520. /**
  7521. * dp_get_cfg_capabilities() - get dp capabilities
  7522. * @soc_handle: datapath soc handle
  7523. * @dp_caps: enum for dp capabilities
  7524. *
  7525. * Return: bool to determine if dp caps is enabled
  7526. */
  7527. static bool
  7528. dp_get_cfg_capabilities(struct cdp_soc_t *soc_handle,
  7529. enum cdp_capabilities dp_caps)
  7530. {
  7531. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7532. return wlan_cfg_get_dp_caps(soc->wlan_cfg_ctx, dp_caps);
  7533. }
  7534. #ifdef FEATURE_AST
  7535. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  7536. {
  7537. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  7538. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  7539. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  7540. /*
  7541. * For BSS peer, new peer is not created on alloc_node if the
  7542. * peer with same address already exists , instead refcnt is
  7543. * increased for existing peer. Correspondingly in delete path,
  7544. * only refcnt is decreased; and peer is only deleted , when all
  7545. * references are deleted. So delete_in_progress should not be set
  7546. * for bss_peer, unless only 2 reference remains (peer map reference
  7547. * and peer hash table reference).
  7548. */
  7549. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  7550. return;
  7551. }
  7552. peer->delete_in_progress = true;
  7553. dp_peer_delete_ast_entries(soc, peer);
  7554. }
  7555. #endif
  7556. #ifdef ATH_SUPPORT_NAC_RSSI
  7557. /**
  7558. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  7559. * @vdev_hdl: DP vdev handle
  7560. * @rssi: rssi value
  7561. *
  7562. * Return: 0 for success. nonzero for failure.
  7563. */
  7564. QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  7565. char *mac_addr,
  7566. uint8_t *rssi)
  7567. {
  7568. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  7569. struct dp_pdev *pdev = vdev->pdev;
  7570. struct dp_neighbour_peer *peer = NULL;
  7571. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  7572. *rssi = 0;
  7573. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  7574. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  7575. neighbour_peer_list_elem) {
  7576. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  7577. mac_addr, DP_MAC_ADDR_LEN) == 0) {
  7578. *rssi = peer->rssi;
  7579. status = QDF_STATUS_SUCCESS;
  7580. break;
  7581. }
  7582. }
  7583. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  7584. return status;
  7585. }
  7586. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  7587. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  7588. uint8_t chan_num)
  7589. {
  7590. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7591. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  7592. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  7593. pdev->nac_rssi_filtering = 1;
  7594. /* Store address of NAC (neighbour peer) which will be checked
  7595. * against TA of received packets.
  7596. */
  7597. if (cmd == CDP_NAC_PARAM_ADD) {
  7598. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  7599. client_macaddr);
  7600. } else if (cmd == CDP_NAC_PARAM_DEL) {
  7601. dp_update_filter_neighbour_peers(vdev_handle,
  7602. DP_NAC_PARAM_DEL,
  7603. client_macaddr);
  7604. }
  7605. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  7606. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  7607. ((void *)vdev->pdev->ctrl_pdev,
  7608. vdev->vdev_id, cmd, bssid);
  7609. return QDF_STATUS_SUCCESS;
  7610. }
  7611. #endif
  7612. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  7613. uint32_t max_peers,
  7614. bool peer_map_unmap_v2)
  7615. {
  7616. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  7617. soc->max_peers = max_peers;
  7618. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  7619. if (dp_peer_find_attach(soc))
  7620. return QDF_STATUS_E_FAILURE;
  7621. soc->is_peer_map_unmap_v2 = peer_map_unmap_v2;
  7622. return QDF_STATUS_SUCCESS;
  7623. }
  7624. /**
  7625. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  7626. * @dp_pdev: dp pdev handle
  7627. * @ctrl_pdev: UMAC ctrl pdev handle
  7628. *
  7629. * Return: void
  7630. */
  7631. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  7632. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  7633. {
  7634. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  7635. pdev->ctrl_pdev = ctrl_pdev;
  7636. }
  7637. /*
  7638. * dp_get_cfg() - get dp cfg
  7639. * @soc: cdp soc handle
  7640. * @cfg: cfg enum
  7641. *
  7642. * Return: cfg value
  7643. */
  7644. static uint32_t dp_get_cfg(void *soc, enum cdp_dp_cfg cfg)
  7645. {
  7646. struct dp_soc *dpsoc = (struct dp_soc *)soc;
  7647. uint32_t value = 0;
  7648. switch (cfg) {
  7649. case cfg_dp_enable_data_stall:
  7650. value = dpsoc->wlan_cfg_ctx->enable_data_stall_detection;
  7651. break;
  7652. case cfg_dp_enable_ip_tcp_udp_checksum_offload:
  7653. value = dpsoc->wlan_cfg_ctx->tcp_udp_checksumoffload;
  7654. break;
  7655. case cfg_dp_tso_enable:
  7656. value = dpsoc->wlan_cfg_ctx->tso_enabled;
  7657. break;
  7658. case cfg_dp_lro_enable:
  7659. value = dpsoc->wlan_cfg_ctx->lro_enabled;
  7660. break;
  7661. case cfg_dp_gro_enable:
  7662. value = dpsoc->wlan_cfg_ctx->gro_enabled;
  7663. break;
  7664. case cfg_dp_tx_flow_start_queue_offset:
  7665. value = dpsoc->wlan_cfg_ctx->tx_flow_start_queue_offset;
  7666. break;
  7667. case cfg_dp_tx_flow_stop_queue_threshold:
  7668. value = dpsoc->wlan_cfg_ctx->tx_flow_stop_queue_threshold;
  7669. break;
  7670. case cfg_dp_disable_intra_bss_fwd:
  7671. value = dpsoc->wlan_cfg_ctx->disable_intra_bss_fwd;
  7672. break;
  7673. default:
  7674. value = 0;
  7675. }
  7676. return value;
  7677. }
  7678. static struct cdp_cmn_ops dp_ops_cmn = {
  7679. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  7680. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  7681. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  7682. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  7683. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  7684. .txrx_pdev_deinit = dp_pdev_deinit_wifi3,
  7685. .txrx_peer_create = dp_peer_create_wifi3,
  7686. .txrx_peer_setup = dp_peer_setup_wifi3,
  7687. #ifdef FEATURE_AST
  7688. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  7689. #else
  7690. .txrx_peer_teardown = NULL,
  7691. #endif
  7692. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  7693. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  7694. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  7695. .txrx_peer_ast_hash_find_soc = dp_peer_ast_hash_find_soc_wifi3,
  7696. .txrx_peer_ast_hash_find_by_pdevid =
  7697. dp_peer_ast_hash_find_by_pdevid_wifi3,
  7698. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  7699. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  7700. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  7701. .txrx_peer_ast_get_type = dp_peer_ast_get_type_wifi3,
  7702. .txrx_peer_ast_get_peer = dp_peer_ast_get_peer_wifi3,
  7703. .txrx_peer_ast_get_nexthop_peer_id =
  7704. dp_peer_ast_get_nexhop_peer_id_wifi3,
  7705. #if defined(FEATURE_AST) && defined(AST_HKV1_WORKAROUND)
  7706. .txrx_peer_ast_set_cp_ctx = dp_peer_ast_set_cp_ctx_wifi3,
  7707. .txrx_peer_ast_get_cp_ctx = dp_peer_ast_get_cp_ctx_wifi3,
  7708. .txrx_peer_ast_get_wmi_sent = dp_peer_ast_get_wmi_sent_wifi3,
  7709. .txrx_peer_ast_free_entry = dp_peer_ast_free_entry_wifi3,
  7710. #endif
  7711. .txrx_peer_delete = dp_peer_delete_wifi3,
  7712. .txrx_vdev_register = dp_vdev_register_wifi3,
  7713. .txrx_soc_detach = dp_soc_detach_wifi3,
  7714. .txrx_soc_deinit = dp_soc_deinit_wifi3,
  7715. .txrx_soc_init = dp_soc_init_wifi3,
  7716. .txrx_tso_soc_attach = dp_tso_soc_attach,
  7717. .txrx_tso_soc_detach = dp_tso_soc_detach,
  7718. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  7719. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  7720. .txrx_get_mon_vdev_from_pdev = dp_get_mon_vdev_from_pdev_wifi3,
  7721. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  7722. .txrx_ath_getstats = dp_get_device_stats,
  7723. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  7724. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  7725. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  7726. .delba_process = dp_delba_process_wifi3,
  7727. .set_addba_response = dp_set_addba_response,
  7728. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  7729. .flush_cache_rx_queue = NULL,
  7730. /* TODO: get API's for dscp-tid need to be added*/
  7731. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  7732. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  7733. .hmmc_tid_override_en = dp_hmmc_tid_override_en_wifi3,
  7734. .set_hmmc_tid_val = dp_set_hmmc_tid_val_wifi3,
  7735. .txrx_get_total_per = dp_get_total_per,
  7736. .txrx_stats_request = dp_txrx_stats_request,
  7737. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  7738. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  7739. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  7740. .txrx_set_nac = dp_set_nac,
  7741. .txrx_get_tx_pending = dp_get_tx_pending,
  7742. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  7743. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  7744. .display_stats = dp_txrx_dump_stats,
  7745. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  7746. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  7747. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  7748. .txrx_intr_detach = dp_soc_interrupt_detach,
  7749. .set_pn_check = dp_set_pn_check_wifi3,
  7750. .update_config_parameters = dp_update_config_parameters,
  7751. /* TODO: Add other functions */
  7752. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  7753. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  7754. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  7755. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  7756. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  7757. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  7758. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  7759. .tx_send = dp_tx_send,
  7760. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  7761. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  7762. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  7763. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  7764. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  7765. .txrx_get_os_rx_handles_from_vdev =
  7766. dp_get_os_rx_handles_from_vdev_wifi3,
  7767. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  7768. .get_dp_capabilities = dp_get_cfg_capabilities,
  7769. .txrx_get_cfg = dp_get_cfg,
  7770. };
  7771. static struct cdp_ctrl_ops dp_ops_ctrl = {
  7772. .txrx_peer_authorize = dp_peer_authorize,
  7773. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  7774. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  7775. #ifdef MESH_MODE_SUPPORT
  7776. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  7777. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  7778. #endif
  7779. .txrx_set_vdev_param = dp_set_vdev_param,
  7780. .txrx_peer_set_nawds = dp_peer_set_nawds,
  7781. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  7782. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  7783. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  7784. .txrx_update_filter_neighbour_peers =
  7785. dp_update_filter_neighbour_peers,
  7786. .txrx_get_sec_type = dp_get_sec_type,
  7787. /* TODO: Add other functions */
  7788. .txrx_wdi_event_sub = dp_wdi_event_sub,
  7789. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  7790. #ifdef WDI_EVENT_ENABLE
  7791. .txrx_get_pldev = dp_get_pldev,
  7792. #endif
  7793. .txrx_set_pdev_param = dp_set_pdev_param,
  7794. #ifdef ATH_SUPPORT_NAC_RSSI
  7795. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  7796. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  7797. #endif
  7798. .set_key = dp_set_michael_key,
  7799. .txrx_get_vdev_param = dp_get_vdev_param,
  7800. };
  7801. static struct cdp_me_ops dp_ops_me = {
  7802. #ifdef ATH_SUPPORT_IQUE
  7803. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  7804. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  7805. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  7806. #endif
  7807. .tx_me_find_ast_entry = NULL,
  7808. };
  7809. static struct cdp_mon_ops dp_ops_mon = {
  7810. .txrx_monitor_set_filter_ucast_data = NULL,
  7811. .txrx_monitor_set_filter_mcast_data = NULL,
  7812. .txrx_monitor_set_filter_non_data = NULL,
  7813. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  7814. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  7815. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  7816. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  7817. /* Added support for HK advance filter */
  7818. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  7819. };
  7820. static struct cdp_host_stats_ops dp_ops_host_stats = {
  7821. .txrx_per_peer_stats = dp_get_host_peer_stats,
  7822. .get_fw_peer_stats = dp_get_fw_peer_stats,
  7823. .get_htt_stats = dp_get_htt_stats,
  7824. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  7825. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  7826. .txrx_stats_publish = dp_txrx_stats_publish,
  7827. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  7828. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  7829. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  7830. .txrx_get_pdev_stats = dp_txrx_get_pdev_stats,
  7831. /* TODO */
  7832. };
  7833. static struct cdp_raw_ops dp_ops_raw = {
  7834. /* TODO */
  7835. };
  7836. #ifdef CONFIG_WIN
  7837. static struct cdp_pflow_ops dp_ops_pflow = {
  7838. /* TODO */
  7839. };
  7840. #endif /* CONFIG_WIN */
  7841. #ifdef FEATURE_RUNTIME_PM
  7842. /**
  7843. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  7844. * @opaque_pdev: DP pdev context
  7845. *
  7846. * DP is ready to runtime suspend if there are no pending TX packets.
  7847. *
  7848. * Return: QDF_STATUS
  7849. */
  7850. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  7851. {
  7852. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  7853. struct dp_soc *soc = pdev->soc;
  7854. /* Abort if there are any pending TX packets */
  7855. if (dp_get_tx_pending(opaque_pdev) > 0) {
  7856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7857. FL("Abort suspend due to pending TX packets"));
  7858. return QDF_STATUS_E_AGAIN;
  7859. }
  7860. if (soc->intr_mode == DP_INTR_POLL)
  7861. qdf_timer_stop(&soc->int_timer);
  7862. return QDF_STATUS_SUCCESS;
  7863. }
  7864. /**
  7865. * dp_runtime_resume() - ensure DP is ready to runtime resume
  7866. * @opaque_pdev: DP pdev context
  7867. *
  7868. * Resume DP for runtime PM.
  7869. *
  7870. * Return: QDF_STATUS
  7871. */
  7872. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  7873. {
  7874. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  7875. struct dp_soc *soc = pdev->soc;
  7876. void *hal_srng;
  7877. int i;
  7878. if (soc->intr_mode == DP_INTR_POLL)
  7879. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  7880. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  7881. hal_srng = soc->tcl_data_ring[i].hal_srng;
  7882. if (hal_srng) {
  7883. /* We actually only need to acquire the lock */
  7884. hal_srng_access_start(soc->hal_soc, hal_srng);
  7885. /* Update SRC ring head pointer for HW to send
  7886. all pending packets */
  7887. hal_srng_access_end(soc->hal_soc, hal_srng);
  7888. }
  7889. }
  7890. return QDF_STATUS_SUCCESS;
  7891. }
  7892. #endif /* FEATURE_RUNTIME_PM */
  7893. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  7894. {
  7895. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  7896. struct dp_soc *soc = pdev->soc;
  7897. if (soc->intr_mode == DP_INTR_POLL)
  7898. qdf_timer_stop(&soc->int_timer);
  7899. return QDF_STATUS_SUCCESS;
  7900. }
  7901. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  7902. {
  7903. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  7904. struct dp_soc *soc = pdev->soc;
  7905. if (soc->intr_mode == DP_INTR_POLL)
  7906. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  7907. return QDF_STATUS_SUCCESS;
  7908. }
  7909. #ifndef CONFIG_WIN
  7910. static struct cdp_misc_ops dp_ops_misc = {
  7911. .tx_non_std = dp_tx_non_std,
  7912. .get_opmode = dp_get_opmode,
  7913. #ifdef FEATURE_RUNTIME_PM
  7914. .runtime_suspend = dp_runtime_suspend,
  7915. .runtime_resume = dp_runtime_resume,
  7916. #endif /* FEATURE_RUNTIME_PM */
  7917. .pkt_log_init = dp_pkt_log_init,
  7918. .pkt_log_con_service = dp_pkt_log_con_service,
  7919. };
  7920. static struct cdp_flowctl_ops dp_ops_flowctl = {
  7921. /* WIFI 3.0 DP implement as required. */
  7922. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7923. .flow_pool_map_handler = dp_tx_flow_pool_map,
  7924. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  7925. .register_pause_cb = dp_txrx_register_pause_cb,
  7926. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  7927. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  7928. };
  7929. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  7930. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7931. };
  7932. #ifdef IPA_OFFLOAD
  7933. static struct cdp_ipa_ops dp_ops_ipa = {
  7934. .ipa_get_resource = dp_ipa_get_resource,
  7935. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  7936. .ipa_op_response = dp_ipa_op_response,
  7937. .ipa_register_op_cb = dp_ipa_register_op_cb,
  7938. .ipa_get_stat = dp_ipa_get_stat,
  7939. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  7940. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  7941. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  7942. .ipa_setup = dp_ipa_setup,
  7943. .ipa_cleanup = dp_ipa_cleanup,
  7944. .ipa_setup_iface = dp_ipa_setup_iface,
  7945. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  7946. .ipa_enable_pipes = dp_ipa_enable_pipes,
  7947. .ipa_disable_pipes = dp_ipa_disable_pipes,
  7948. .ipa_set_perf_level = dp_ipa_set_perf_level
  7949. };
  7950. #endif
  7951. static struct cdp_bus_ops dp_ops_bus = {
  7952. .bus_suspend = dp_bus_suspend,
  7953. .bus_resume = dp_bus_resume
  7954. };
  7955. static struct cdp_ocb_ops dp_ops_ocb = {
  7956. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7957. };
  7958. static struct cdp_throttle_ops dp_ops_throttle = {
  7959. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7960. };
  7961. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  7962. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7963. };
  7964. static struct cdp_cfg_ops dp_ops_cfg = {
  7965. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  7966. };
  7967. /*
  7968. * dp_peer_get_ref_find_by_addr - get peer with addr by ref count inc
  7969. * @dev: physical device instance
  7970. * @peer_mac_addr: peer mac address
  7971. * @local_id: local id for the peer
  7972. * @debug_id: to track enum peer access
  7973. *
  7974. * Return: peer instance pointer
  7975. */
  7976. static inline void *
  7977. dp_peer_get_ref_find_by_addr(struct cdp_pdev *dev, uint8_t *peer_mac_addr,
  7978. uint8_t *local_id,
  7979. enum peer_debug_id_type debug_id)
  7980. {
  7981. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  7982. struct dp_peer *peer;
  7983. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr, 0, DP_VDEV_ALL);
  7984. if (!peer)
  7985. return NULL;
  7986. *local_id = peer->local_id;
  7987. DP_TRACE(INFO, "%s: peer %pK id %d", __func__, peer, *local_id);
  7988. return peer;
  7989. }
  7990. /*
  7991. * dp_peer_release_ref - release peer ref count
  7992. * @peer: peer handle
  7993. * @debug_id: to track enum peer access
  7994. *
  7995. * Return: None
  7996. */
  7997. static inline
  7998. void dp_peer_release_ref(void *peer, enum peer_debug_id_type debug_id)
  7999. {
  8000. dp_peer_unref_delete(peer);
  8001. }
  8002. static struct cdp_peer_ops dp_ops_peer = {
  8003. .register_peer = dp_register_peer,
  8004. .clear_peer = dp_clear_peer,
  8005. .find_peer_by_addr = dp_find_peer_by_addr,
  8006. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  8007. .peer_get_ref_by_addr = dp_peer_get_ref_find_by_addr,
  8008. .peer_release_ref = dp_peer_release_ref,
  8009. .local_peer_id = dp_local_peer_id,
  8010. .peer_find_by_local_id = dp_peer_find_by_local_id,
  8011. .peer_state_update = dp_peer_state_update,
  8012. .get_vdevid = dp_get_vdevid,
  8013. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  8014. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  8015. .get_vdev_for_peer = dp_get_vdev_for_peer,
  8016. .get_peer_state = dp_get_peer_state,
  8017. };
  8018. #endif
  8019. static struct cdp_ops dp_txrx_ops = {
  8020. .cmn_drv_ops = &dp_ops_cmn,
  8021. .ctrl_ops = &dp_ops_ctrl,
  8022. .me_ops = &dp_ops_me,
  8023. .mon_ops = &dp_ops_mon,
  8024. .host_stats_ops = &dp_ops_host_stats,
  8025. .wds_ops = &dp_ops_wds,
  8026. .raw_ops = &dp_ops_raw,
  8027. #ifdef CONFIG_WIN
  8028. .pflow_ops = &dp_ops_pflow,
  8029. #endif /* CONFIG_WIN */
  8030. #ifndef CONFIG_WIN
  8031. .misc_ops = &dp_ops_misc,
  8032. .cfg_ops = &dp_ops_cfg,
  8033. .flowctl_ops = &dp_ops_flowctl,
  8034. .l_flowctl_ops = &dp_ops_l_flowctl,
  8035. #ifdef IPA_OFFLOAD
  8036. .ipa_ops = &dp_ops_ipa,
  8037. #endif
  8038. .bus_ops = &dp_ops_bus,
  8039. .ocb_ops = &dp_ops_ocb,
  8040. .peer_ops = &dp_ops_peer,
  8041. .throttle_ops = &dp_ops_throttle,
  8042. .mob_stats_ops = &dp_ops_mob_stats,
  8043. #endif
  8044. };
  8045. /*
  8046. * dp_soc_set_txrx_ring_map()
  8047. * @dp_soc: DP handler for soc
  8048. *
  8049. * Return: Void
  8050. */
  8051. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  8052. {
  8053. uint32_t i;
  8054. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  8055. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  8056. }
  8057. }
  8058. #ifdef QCA_WIFI_QCA8074
  8059. #ifndef QCA_MEM_ATTACH_ON_WIFI3
  8060. /**
  8061. * dp_soc_attach_wifi3() - Attach txrx SOC
  8062. * @ctrl_psoc: Opaque SOC handle from control plane
  8063. * @htc_handle: Opaque HTC handle
  8064. * @hif_handle: Opaque HIF handle
  8065. * @qdf_osdev: QDF device
  8066. * @ol_ops: Offload Operations
  8067. * @device_id: Device ID
  8068. *
  8069. * Return: DP SOC handle on success, NULL on failure
  8070. */
  8071. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8072. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8073. struct ol_if_ops *ol_ops, uint16_t device_id)
  8074. {
  8075. struct dp_soc *dp_soc = NULL;
  8076. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8077. ol_ops, device_id);
  8078. if (!dp_soc)
  8079. return NULL;
  8080. if (!dp_soc_init(dp_soc, htc_handle, hif_handle))
  8081. return NULL;
  8082. return (void *)dp_soc;
  8083. }
  8084. #else
  8085. /**
  8086. * dp_soc_attach_wifi3() - Attach txrx SOC
  8087. * @ctrl_psoc: Opaque SOC handle from control plane
  8088. * @htc_handle: Opaque HTC handle
  8089. * @hif_handle: Opaque HIF handle
  8090. * @qdf_osdev: QDF device
  8091. * @ol_ops: Offload Operations
  8092. * @device_id: Device ID
  8093. *
  8094. * Return: DP SOC handle on success, NULL on failure
  8095. */
  8096. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8097. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8098. struct ol_if_ops *ol_ops, uint16_t device_id)
  8099. {
  8100. struct dp_soc *dp_soc = NULL;
  8101. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8102. ol_ops, device_id);
  8103. return (void *)dp_soc;
  8104. }
  8105. #endif
  8106. /**
  8107. * dp_soc_attach() - Attach txrx SOC
  8108. * @ctrl_psoc: Opaque SOC handle from control plane
  8109. * @htc_handle: Opaque HTC handle
  8110. * @qdf_osdev: QDF device
  8111. * @ol_ops: Offload Operations
  8112. * @device_id: Device ID
  8113. *
  8114. * Return: DP SOC handle on success, NULL on failure
  8115. */
  8116. static struct dp_soc *
  8117. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8118. struct ol_if_ops *ol_ops, uint16_t device_id)
  8119. {
  8120. int int_ctx;
  8121. struct dp_soc *soc = NULL;
  8122. struct htt_soc *htt_soc = NULL;
  8123. soc = qdf_mem_malloc(sizeof(*soc));
  8124. if (!soc) {
  8125. dp_err("DP SOC memory allocation failed");
  8126. goto fail0;
  8127. }
  8128. int_ctx = 0;
  8129. soc->device_id = device_id;
  8130. soc->cdp_soc.ops = &dp_txrx_ops;
  8131. soc->cdp_soc.ol_ops = ol_ops;
  8132. soc->ctrl_psoc = ctrl_psoc;
  8133. soc->osdev = qdf_osdev;
  8134. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS;
  8135. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  8136. if (!soc->wlan_cfg_ctx) {
  8137. dp_err("wlan_cfg_ctx failed\n");
  8138. goto fail1;
  8139. }
  8140. htt_soc = qdf_mem_malloc(sizeof(*htt_soc));
  8141. if (!htt_soc) {
  8142. dp_err("HTT attach failed");
  8143. goto fail1;
  8144. }
  8145. soc->htt_handle = htt_soc;
  8146. htt_soc->dp_soc = soc;
  8147. htt_soc->htc_soc = htc_handle;
  8148. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  8149. goto fail2;
  8150. return (void *)soc;
  8151. fail2:
  8152. qdf_mem_free(htt_soc);
  8153. fail1:
  8154. qdf_mem_free(soc);
  8155. fail0:
  8156. return NULL;
  8157. }
  8158. /**
  8159. * dp_soc_init() - Initialize txrx SOC
  8160. * @dp_soc: Opaque DP SOC handle
  8161. * @htc_handle: Opaque HTC handle
  8162. * @hif_handle: Opaque HIF handle
  8163. *
  8164. * Return: DP SOC handle on success, NULL on failure
  8165. */
  8166. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle)
  8167. {
  8168. int target_type;
  8169. struct dp_soc *soc = (struct dp_soc *)dpsoc;
  8170. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  8171. htt_soc->htc_soc = htc_handle;
  8172. soc->hif_handle = hif_handle;
  8173. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  8174. if (!soc->hal_soc)
  8175. return NULL;
  8176. htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc, htt_soc->htc_soc,
  8177. soc->hal_soc, soc->osdev);
  8178. target_type = hal_get_target_type(soc->hal_soc);
  8179. switch (target_type) {
  8180. case TARGET_TYPE_QCA6290:
  8181. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8182. REO_DST_RING_SIZE_QCA6290);
  8183. soc->ast_override_support = 1;
  8184. break;
  8185. #ifdef QCA_WIFI_QCA6390
  8186. case TARGET_TYPE_QCA6390:
  8187. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8188. REO_DST_RING_SIZE_QCA6290);
  8189. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  8190. soc->ast_override_support = 1;
  8191. if (con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  8192. int int_ctx;
  8193. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  8194. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  8195. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  8196. }
  8197. }
  8198. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  8199. break;
  8200. #endif
  8201. case TARGET_TYPE_QCA8074:
  8202. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8203. REO_DST_RING_SIZE_QCA8074);
  8204. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  8205. soc->hw_nac_monitor_support = 1;
  8206. break;
  8207. case TARGET_TYPE_QCA8074V2:
  8208. case TARGET_TYPE_QCA6018:
  8209. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8210. REO_DST_RING_SIZE_QCA8074);
  8211. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  8212. soc->hw_nac_monitor_support = 1;
  8213. soc->ast_override_support = 1;
  8214. soc->per_tid_basize_max_tid = 8;
  8215. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  8216. break;
  8217. default:
  8218. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  8219. qdf_assert_always(0);
  8220. break;
  8221. }
  8222. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  8223. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  8224. soc->cce_disable = false;
  8225. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  8226. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  8227. CDP_CFG_MAX_PEER_ID);
  8228. if (ret != -EINVAL) {
  8229. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  8230. }
  8231. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  8232. CDP_CFG_CCE_DISABLE);
  8233. if (ret == 1)
  8234. soc->cce_disable = true;
  8235. }
  8236. qdf_spinlock_create(&soc->peer_ref_mutex);
  8237. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  8238. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  8239. /* fill the tx/rx cpu ring map*/
  8240. dp_soc_set_txrx_ring_map(soc);
  8241. qdf_spinlock_create(&soc->htt_stats.lock);
  8242. /* initialize work queue for stats processing */
  8243. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  8244. return soc;
  8245. }
  8246. /**
  8247. * dp_soc_init_wifi3() - Initialize txrx SOC
  8248. * @dp_soc: Opaque DP SOC handle
  8249. * @ctrl_psoc: Opaque SOC handle from control plane(Unused)
  8250. * @hif_handle: Opaque HIF handle
  8251. * @htc_handle: Opaque HTC handle
  8252. * @qdf_osdev: QDF device (Unused)
  8253. * @ol_ops: Offload Operations (Unused)
  8254. * @device_id: Device ID (Unused)
  8255. *
  8256. * Return: DP SOC handle on success, NULL on failure
  8257. */
  8258. void *dp_soc_init_wifi3(void *dpsoc, void *ctrl_psoc, void *hif_handle,
  8259. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8260. struct ol_if_ops *ol_ops, uint16_t device_id)
  8261. {
  8262. return dp_soc_init(dpsoc, htc_handle, hif_handle);
  8263. }
  8264. #endif
  8265. /*
  8266. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  8267. *
  8268. * @soc: handle to DP soc
  8269. * @mac_id: MAC id
  8270. *
  8271. * Return: Return pdev corresponding to MAC
  8272. */
  8273. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  8274. {
  8275. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  8276. return soc->pdev_list[mac_id];
  8277. /* Typically for MCL as there only 1 PDEV*/
  8278. return soc->pdev_list[0];
  8279. }
  8280. /*
  8281. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  8282. * @soc: DP SoC context
  8283. * @max_mac_rings: No of MAC rings
  8284. *
  8285. * Return: None
  8286. */
  8287. static
  8288. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  8289. int *max_mac_rings)
  8290. {
  8291. bool dbs_enable = false;
  8292. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  8293. dbs_enable = soc->cdp_soc.ol_ops->
  8294. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  8295. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  8296. }
  8297. /*
  8298. * dp_set_pktlog_wifi3() - attach txrx vdev
  8299. * @pdev: Datapath PDEV handle
  8300. * @event: which event's notifications are being subscribed to
  8301. * @enable: WDI event subscribe or not. (True or False)
  8302. *
  8303. * Return: Success, NULL on failure
  8304. */
  8305. #ifdef WDI_EVENT_ENABLE
  8306. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  8307. bool enable)
  8308. {
  8309. struct dp_soc *soc = NULL;
  8310. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  8311. int max_mac_rings = wlan_cfg_get_num_mac_rings
  8312. (pdev->wlan_cfg_ctx);
  8313. uint8_t mac_id = 0;
  8314. soc = pdev->soc;
  8315. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  8316. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  8317. FL("Max_mac_rings %d "),
  8318. max_mac_rings);
  8319. if (enable) {
  8320. switch (event) {
  8321. case WDI_EVENT_RX_DESC:
  8322. if (pdev->monitor_vdev) {
  8323. /* Nothing needs to be done if monitor mode is
  8324. * enabled
  8325. */
  8326. return 0;
  8327. }
  8328. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  8329. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  8330. htt_tlv_filter.mpdu_start = 1;
  8331. htt_tlv_filter.msdu_start = 1;
  8332. htt_tlv_filter.msdu_end = 1;
  8333. htt_tlv_filter.mpdu_end = 1;
  8334. htt_tlv_filter.packet_header = 1;
  8335. htt_tlv_filter.attention = 1;
  8336. htt_tlv_filter.ppdu_start = 1;
  8337. htt_tlv_filter.ppdu_end = 1;
  8338. htt_tlv_filter.ppdu_end_user_stats = 1;
  8339. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  8340. htt_tlv_filter.ppdu_end_status_done = 1;
  8341. htt_tlv_filter.enable_fp = 1;
  8342. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  8343. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  8344. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  8345. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  8346. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  8347. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  8348. for (mac_id = 0; mac_id < max_mac_rings;
  8349. mac_id++) {
  8350. int mac_for_pdev =
  8351. dp_get_mac_id_for_pdev(mac_id,
  8352. pdev->pdev_id);
  8353. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8354. mac_for_pdev,
  8355. pdev->rxdma_mon_status_ring[mac_id]
  8356. .hal_srng,
  8357. RXDMA_MONITOR_STATUS,
  8358. RX_BUFFER_SIZE,
  8359. &htt_tlv_filter);
  8360. }
  8361. if (soc->reap_timer_init)
  8362. qdf_timer_mod(&soc->mon_reap_timer,
  8363. DP_INTR_POLL_TIMER_MS);
  8364. }
  8365. break;
  8366. case WDI_EVENT_LITE_RX:
  8367. if (pdev->monitor_vdev) {
  8368. /* Nothing needs to be done if monitor mode is
  8369. * enabled
  8370. */
  8371. return 0;
  8372. }
  8373. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  8374. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  8375. htt_tlv_filter.ppdu_start = 1;
  8376. htt_tlv_filter.ppdu_end = 1;
  8377. htt_tlv_filter.ppdu_end_user_stats = 1;
  8378. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  8379. htt_tlv_filter.ppdu_end_status_done = 1;
  8380. htt_tlv_filter.mpdu_start = 1;
  8381. htt_tlv_filter.enable_fp = 1;
  8382. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  8383. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  8384. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  8385. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  8386. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  8387. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  8388. for (mac_id = 0; mac_id < max_mac_rings;
  8389. mac_id++) {
  8390. int mac_for_pdev =
  8391. dp_get_mac_id_for_pdev(mac_id,
  8392. pdev->pdev_id);
  8393. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8394. mac_for_pdev,
  8395. pdev->rxdma_mon_status_ring[mac_id]
  8396. .hal_srng,
  8397. RXDMA_MONITOR_STATUS,
  8398. RX_BUFFER_SIZE_PKTLOG_LITE,
  8399. &htt_tlv_filter);
  8400. }
  8401. if (soc->reap_timer_init)
  8402. qdf_timer_mod(&soc->mon_reap_timer,
  8403. DP_INTR_POLL_TIMER_MS);
  8404. }
  8405. break;
  8406. case WDI_EVENT_LITE_T2H:
  8407. if (pdev->monitor_vdev) {
  8408. /* Nothing needs to be done if monitor mode is
  8409. * enabled
  8410. */
  8411. return 0;
  8412. }
  8413. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  8414. int mac_for_pdev = dp_get_mac_id_for_pdev(
  8415. mac_id, pdev->pdev_id);
  8416. pdev->pktlog_ppdu_stats = true;
  8417. dp_h2t_cfg_stats_msg_send(pdev,
  8418. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  8419. mac_for_pdev);
  8420. }
  8421. break;
  8422. default:
  8423. /* Nothing needs to be done for other pktlog types */
  8424. break;
  8425. }
  8426. } else {
  8427. switch (event) {
  8428. case WDI_EVENT_RX_DESC:
  8429. case WDI_EVENT_LITE_RX:
  8430. if (pdev->monitor_vdev) {
  8431. /* Nothing needs to be done if monitor mode is
  8432. * enabled
  8433. */
  8434. return 0;
  8435. }
  8436. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  8437. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  8438. for (mac_id = 0; mac_id < max_mac_rings;
  8439. mac_id++) {
  8440. int mac_for_pdev =
  8441. dp_get_mac_id_for_pdev(mac_id,
  8442. pdev->pdev_id);
  8443. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8444. mac_for_pdev,
  8445. pdev->rxdma_mon_status_ring[mac_id]
  8446. .hal_srng,
  8447. RXDMA_MONITOR_STATUS,
  8448. RX_BUFFER_SIZE,
  8449. &htt_tlv_filter);
  8450. }
  8451. if (soc->reap_timer_init)
  8452. qdf_timer_stop(&soc->mon_reap_timer);
  8453. }
  8454. break;
  8455. case WDI_EVENT_LITE_T2H:
  8456. if (pdev->monitor_vdev) {
  8457. /* Nothing needs to be done if monitor mode is
  8458. * enabled
  8459. */
  8460. return 0;
  8461. }
  8462. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  8463. * passing value 0. Once these macros will define in htt
  8464. * header file will use proper macros
  8465. */
  8466. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  8467. int mac_for_pdev =
  8468. dp_get_mac_id_for_pdev(mac_id,
  8469. pdev->pdev_id);
  8470. pdev->pktlog_ppdu_stats = false;
  8471. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  8472. dp_h2t_cfg_stats_msg_send(pdev, 0,
  8473. mac_for_pdev);
  8474. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  8475. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  8476. mac_for_pdev);
  8477. } else if (pdev->enhanced_stats_en) {
  8478. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  8479. mac_for_pdev);
  8480. }
  8481. }
  8482. break;
  8483. default:
  8484. /* Nothing needs to be done for other pktlog types */
  8485. break;
  8486. }
  8487. }
  8488. return 0;
  8489. }
  8490. #endif