dp_rx.c 67 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  41. {
  42. return vdev->ap_bridge_enabled;
  43. }
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  46. void *ring_desc, struct dp_rx_desc *rx_desc)
  47. {
  48. void *hal_soc = soc->hal_soc;
  49. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  50. dp_rx_desc_dump(rx_desc);
  51. }
  52. #else
  53. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  54. void *ring_desc, struct dp_rx_desc *rx_desc)
  55. {
  56. void *hal_soc = soc->hal_soc;
  57. dp_rx_desc_dump(rx_desc);
  58. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  59. hal_srng_dump_ring(hal_soc, hal_ring);
  60. qdf_assert_always(0);
  61. }
  62. #endif
  63. /*
  64. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  65. * called during dp rx initialization
  66. * and at the end of dp_rx_process.
  67. *
  68. * @soc: core txrx main context
  69. * @mac_id: mac_id which is one of 3 mac_ids
  70. * @dp_rxdma_srng: dp rxdma circular ring
  71. * @rx_desc_pool: Pointer to free Rx descriptor pool
  72. * @num_req_buffers: number of buffer to be replenished
  73. * @desc_list: list of descs if called from dp_rx_process
  74. * or NULL during dp rx initialization or out of buffer
  75. * interrupt.
  76. * @tail: tail of descs list
  77. * Return: return success or failure
  78. */
  79. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  80. struct dp_srng *dp_rxdma_srng,
  81. struct rx_desc_pool *rx_desc_pool,
  82. uint32_t num_req_buffers,
  83. union dp_rx_desc_list_elem_t **desc_list,
  84. union dp_rx_desc_list_elem_t **tail)
  85. {
  86. uint32_t num_alloc_desc;
  87. uint16_t num_desc_to_free = 0;
  88. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  89. uint32_t num_entries_avail;
  90. uint32_t count;
  91. int sync_hw_ptr = 1;
  92. qdf_dma_addr_t paddr;
  93. qdf_nbuf_t rx_netbuf;
  94. void *rxdma_ring_entry;
  95. union dp_rx_desc_list_elem_t *next;
  96. QDF_STATUS ret;
  97. void *rxdma_srng;
  98. rxdma_srng = dp_rxdma_srng->hal_srng;
  99. if (!rxdma_srng) {
  100. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  101. "rxdma srng not initialized");
  102. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  103. return QDF_STATUS_E_FAILURE;
  104. }
  105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  106. "requested %d buffers for replenish", num_req_buffers);
  107. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  108. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  109. rxdma_srng,
  110. sync_hw_ptr);
  111. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  112. "no of available entries in rxdma ring: %d",
  113. num_entries_avail);
  114. if (!(*desc_list) && (num_entries_avail >
  115. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  116. num_req_buffers = num_entries_avail;
  117. } else if (num_entries_avail < num_req_buffers) {
  118. num_desc_to_free = num_req_buffers - num_entries_avail;
  119. num_req_buffers = num_entries_avail;
  120. }
  121. if (qdf_unlikely(!num_req_buffers)) {
  122. num_desc_to_free = num_req_buffers;
  123. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  124. goto free_descs;
  125. }
  126. /*
  127. * if desc_list is NULL, allocate the descs from freelist
  128. */
  129. if (!(*desc_list)) {
  130. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  131. rx_desc_pool,
  132. num_req_buffers,
  133. desc_list,
  134. tail);
  135. if (!num_alloc_desc) {
  136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  137. "no free rx_descs in freelist");
  138. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  139. num_req_buffers);
  140. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  141. return QDF_STATUS_E_NOMEM;
  142. }
  143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  144. "%d rx desc allocated", num_alloc_desc);
  145. num_req_buffers = num_alloc_desc;
  146. }
  147. count = 0;
  148. while (count < num_req_buffers) {
  149. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  150. RX_BUFFER_SIZE,
  151. RX_BUFFER_RESERVATION,
  152. RX_BUFFER_ALIGNMENT,
  153. FALSE);
  154. if (qdf_unlikely(!rx_netbuf)) {
  155. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  156. break;
  157. }
  158. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  159. QDF_DMA_FROM_DEVICE);
  160. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  161. qdf_nbuf_free(rx_netbuf);
  162. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  163. continue;
  164. }
  165. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  166. /*
  167. * check if the physical address of nbuf->data is
  168. * less then 0x50000000 then free the nbuf and try
  169. * allocating new nbuf. We can try for 100 times.
  170. * this is a temp WAR till we fix it properly.
  171. */
  172. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  173. if (ret == QDF_STATUS_E_FAILURE) {
  174. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  175. break;
  176. }
  177. count++;
  178. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  179. rxdma_srng);
  180. qdf_assert_always(rxdma_ring_entry);
  181. next = (*desc_list)->next;
  182. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  183. /* rx_desc.in_use should be zero at this time*/
  184. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  185. (*desc_list)->rx_desc.in_use = 1;
  186. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  187. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  188. (unsigned long long)paddr,
  189. (*desc_list)->rx_desc.cookie);
  190. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  191. (*desc_list)->rx_desc.cookie,
  192. rx_desc_pool->owner);
  193. *desc_list = next;
  194. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  195. }
  196. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  197. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  198. count, num_desc_to_free);
  199. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  200. (RX_BUFFER_SIZE * count));
  201. free_descs:
  202. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  203. /*
  204. * add any available free desc back to the free list
  205. */
  206. if (*desc_list)
  207. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  208. mac_id, rx_desc_pool);
  209. return QDF_STATUS_SUCCESS;
  210. }
  211. /*
  212. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  213. * pkts to RAW mode simulation to
  214. * decapsulate the pkt.
  215. *
  216. * @vdev: vdev on which RAW mode is enabled
  217. * @nbuf_list: list of RAW pkts to process
  218. * @peer: peer object from which the pkt is rx
  219. *
  220. * Return: void
  221. */
  222. void
  223. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  224. struct dp_peer *peer)
  225. {
  226. qdf_nbuf_t deliver_list_head = NULL;
  227. qdf_nbuf_t deliver_list_tail = NULL;
  228. qdf_nbuf_t nbuf;
  229. nbuf = nbuf_list;
  230. while (nbuf) {
  231. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  232. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  233. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  234. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  235. /*
  236. * reset the chfrag_start and chfrag_end bits in nbuf cb
  237. * as this is a non-amsdu pkt and RAW mode simulation expects
  238. * these bit s to be 0 for non-amsdu pkt.
  239. */
  240. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  241. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  242. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  243. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  244. }
  245. nbuf = next;
  246. }
  247. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  248. &deliver_list_tail, (struct cdp_peer*) peer);
  249. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  250. }
  251. #ifdef DP_LFR
  252. /*
  253. * In case of LFR, data of a new peer might be sent up
  254. * even before peer is added.
  255. */
  256. static inline struct dp_vdev *
  257. dp_get_vdev_from_peer(struct dp_soc *soc,
  258. uint16_t peer_id,
  259. struct dp_peer *peer,
  260. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  261. {
  262. struct dp_vdev *vdev;
  263. uint8_t vdev_id;
  264. if (unlikely(!peer)) {
  265. if (peer_id != HTT_INVALID_PEER) {
  266. vdev_id = DP_PEER_METADATA_ID_GET(
  267. mpdu_desc_info.peer_meta_data);
  268. QDF_TRACE(QDF_MODULE_ID_DP,
  269. QDF_TRACE_LEVEL_DEBUG,
  270. FL("PeerID %d not found use vdevID %d"),
  271. peer_id, vdev_id);
  272. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  273. vdev_id);
  274. } else {
  275. QDF_TRACE(QDF_MODULE_ID_DP,
  276. QDF_TRACE_LEVEL_DEBUG,
  277. FL("Invalid PeerID %d"),
  278. peer_id);
  279. return NULL;
  280. }
  281. } else {
  282. vdev = peer->vdev;
  283. }
  284. return vdev;
  285. }
  286. #else
  287. static inline struct dp_vdev *
  288. dp_get_vdev_from_peer(struct dp_soc *soc,
  289. uint16_t peer_id,
  290. struct dp_peer *peer,
  291. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  292. {
  293. if (unlikely(!peer)) {
  294. QDF_TRACE(QDF_MODULE_ID_DP,
  295. QDF_TRACE_LEVEL_DEBUG,
  296. FL("Peer not found for peerID %d"),
  297. peer_id);
  298. return NULL;
  299. } else {
  300. return peer->vdev;
  301. }
  302. }
  303. #endif
  304. #ifndef FEATURE_WDS
  305. static void
  306. dp_rx_da_learn(struct dp_soc *soc,
  307. uint8_t *rx_tlv_hdr,
  308. struct dp_peer *ta_peer,
  309. qdf_nbuf_t nbuf)
  310. {
  311. }
  312. #endif
  313. /*
  314. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  315. *
  316. * @soc: core txrx main context
  317. * @ta_peer : source peer entry
  318. * @rx_tlv_hdr : start address of rx tlvs
  319. * @nbuf : nbuf that has to be intrabss forwarded
  320. *
  321. * Return: bool: true if it is forwarded else false
  322. */
  323. static bool
  324. dp_rx_intrabss_fwd(struct dp_soc *soc,
  325. struct dp_peer *ta_peer,
  326. uint8_t *rx_tlv_hdr,
  327. qdf_nbuf_t nbuf)
  328. {
  329. uint16_t da_idx;
  330. uint16_t len;
  331. uint8_t is_frag;
  332. struct dp_peer *da_peer;
  333. struct dp_ast_entry *ast_entry;
  334. qdf_nbuf_t nbuf_copy;
  335. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  336. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  337. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  338. tid_stats.tid_rx_stats[ring_id][tid];
  339. /* check if the destination peer is available in peer table
  340. * and also check if the source peer and destination peer
  341. * belong to the same vap and destination peer is not bss peer.
  342. */
  343. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  344. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  345. ast_entry = soc->ast_table[da_idx];
  346. if (!ast_entry)
  347. return false;
  348. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  349. ast_entry->is_active = TRUE;
  350. return false;
  351. }
  352. da_peer = ast_entry->peer;
  353. if (!da_peer)
  354. return false;
  355. /* TA peer cannot be same as peer(DA) on which AST is present
  356. * this indicates a change in topology and that AST entries
  357. * are yet to be updated.
  358. */
  359. if (da_peer == ta_peer)
  360. return false;
  361. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  362. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  363. is_frag = qdf_nbuf_is_frag(nbuf);
  364. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  365. /* linearize the nbuf just before we send to
  366. * dp_tx_send()
  367. */
  368. if (qdf_unlikely(is_frag)) {
  369. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  370. return false;
  371. nbuf = qdf_nbuf_unshare(nbuf);
  372. if (!nbuf) {
  373. DP_STATS_INC_PKT(ta_peer,
  374. rx.intra_bss.fail,
  375. 1,
  376. len);
  377. /* return true even though the pkt is
  378. * not forwarded. Basically skb_unshare
  379. * failed and we want to continue with
  380. * next nbuf.
  381. */
  382. tid_stats->fail_cnt[INTRABSS_DROP]++;
  383. return true;
  384. }
  385. }
  386. if (!dp_tx_send(ta_peer->vdev, nbuf)) {
  387. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  388. len);
  389. return true;
  390. } else {
  391. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  392. len);
  393. tid_stats->fail_cnt[INTRABSS_DROP]++;
  394. return false;
  395. }
  396. }
  397. }
  398. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  399. * source, then clone the pkt and send the cloned pkt for
  400. * intra BSS forwarding and original pkt up the network stack
  401. * Note: how do we handle multicast pkts. do we forward
  402. * all multicast pkts as is or let a higher layer module
  403. * like igmpsnoop decide whether to forward or not with
  404. * Mcast enhancement.
  405. */
  406. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  407. !ta_peer->bss_peer))) {
  408. nbuf_copy = qdf_nbuf_copy(nbuf);
  409. if (!nbuf_copy)
  410. return false;
  411. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  412. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  413. if (dp_tx_send(ta_peer->vdev, nbuf_copy)) {
  414. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  415. tid_stats->fail_cnt[INTRABSS_DROP]++;
  416. qdf_nbuf_free(nbuf_copy);
  417. } else {
  418. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  419. tid_stats->intrabss_cnt++;
  420. }
  421. }
  422. /* return false as we have to still send the original pkt
  423. * up the stack
  424. */
  425. return false;
  426. }
  427. #ifdef MESH_MODE_SUPPORT
  428. /**
  429. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  430. *
  431. * @vdev: DP Virtual device handle
  432. * @nbuf: Buffer pointer
  433. * @rx_tlv_hdr: start of rx tlv header
  434. * @peer: pointer to peer
  435. *
  436. * This function allocated memory for mesh receive stats and fill the
  437. * required stats. Stores the memory address in skb cb.
  438. *
  439. * Return: void
  440. */
  441. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  442. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  443. {
  444. struct mesh_recv_hdr_s *rx_info = NULL;
  445. uint32_t pkt_type;
  446. uint32_t nss;
  447. uint32_t rate_mcs;
  448. uint32_t bw;
  449. /* fill recv mesh stats */
  450. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  451. /* upper layers are resposible to free this memory */
  452. if (!rx_info) {
  453. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  454. "Memory allocation failed for mesh rx stats");
  455. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  456. return;
  457. }
  458. rx_info->rs_flags = MESH_RXHDR_VER1;
  459. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  460. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  461. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  462. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  463. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  464. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  465. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  466. if (vdev->osif_get_key)
  467. vdev->osif_get_key(vdev->osif_vdev,
  468. &rx_info->rs_decryptkey[0],
  469. &peer->mac_addr.raw[0],
  470. rx_info->rs_keyix);
  471. }
  472. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  473. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  474. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  475. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  476. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  477. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  478. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  479. (bw << 24);
  480. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  481. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  482. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  483. rx_info->rs_flags,
  484. rx_info->rs_rssi,
  485. rx_info->rs_channel,
  486. rx_info->rs_ratephy1,
  487. rx_info->rs_keyix);
  488. }
  489. /**
  490. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  491. *
  492. * @vdev: DP Virtual device handle
  493. * @nbuf: Buffer pointer
  494. * @rx_tlv_hdr: start of rx tlv header
  495. *
  496. * This checks if the received packet is matching any filter out
  497. * catogery and and drop the packet if it matches.
  498. *
  499. * Return: status(0 indicates drop, 1 indicate to no drop)
  500. */
  501. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  502. uint8_t *rx_tlv_hdr)
  503. {
  504. union dp_align_mac_addr mac_addr;
  505. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  506. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  507. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  508. return QDF_STATUS_SUCCESS;
  509. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  510. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  511. return QDF_STATUS_SUCCESS;
  512. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  513. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  514. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  515. return QDF_STATUS_SUCCESS;
  516. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  517. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  518. &mac_addr.raw[0]))
  519. return QDF_STATUS_E_FAILURE;
  520. if (!qdf_mem_cmp(&mac_addr.raw[0],
  521. &vdev->mac_addr.raw[0],
  522. QDF_MAC_ADDR_SIZE))
  523. return QDF_STATUS_SUCCESS;
  524. }
  525. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  526. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  527. &mac_addr.raw[0]))
  528. return QDF_STATUS_E_FAILURE;
  529. if (!qdf_mem_cmp(&mac_addr.raw[0],
  530. &vdev->mac_addr.raw[0],
  531. QDF_MAC_ADDR_SIZE))
  532. return QDF_STATUS_SUCCESS;
  533. }
  534. }
  535. return QDF_STATUS_E_FAILURE;
  536. }
  537. #else
  538. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  539. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  540. {
  541. }
  542. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  543. uint8_t *rx_tlv_hdr)
  544. {
  545. return QDF_STATUS_E_FAILURE;
  546. }
  547. #endif
  548. #ifdef FEATURE_NAC_RSSI
  549. /**
  550. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  551. * clients
  552. * @pdev: DP pdev handle
  553. * @rx_pkt_hdr: Rx packet Header
  554. *
  555. * return: dp_vdev*
  556. */
  557. static
  558. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  559. uint8_t *rx_pkt_hdr)
  560. {
  561. struct ieee80211_frame *wh;
  562. struct dp_neighbour_peer *peer = NULL;
  563. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  564. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  565. return NULL;
  566. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  567. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  568. neighbour_peer_list_elem) {
  569. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  570. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  571. QDF_TRACE(
  572. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  573. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  574. peer->neighbour_peers_macaddr.raw[0],
  575. peer->neighbour_peers_macaddr.raw[1],
  576. peer->neighbour_peers_macaddr.raw[2],
  577. peer->neighbour_peers_macaddr.raw[3],
  578. peer->neighbour_peers_macaddr.raw[4],
  579. peer->neighbour_peers_macaddr.raw[5]);
  580. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  581. return pdev->monitor_vdev;
  582. }
  583. }
  584. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  585. return NULL;
  586. }
  587. /**
  588. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  589. * @soc: DP SOC handle
  590. * @mpdu: mpdu for which peer is invalid
  591. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  592. * pool_id has same mapping)
  593. *
  594. * return: integer type
  595. */
  596. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  597. uint8_t mac_id)
  598. {
  599. struct dp_invalid_peer_msg msg;
  600. struct dp_vdev *vdev = NULL;
  601. struct dp_pdev *pdev = NULL;
  602. struct ieee80211_frame *wh;
  603. qdf_nbuf_t curr_nbuf, next_nbuf;
  604. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  605. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  606. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  607. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  608. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  609. "Drop decapped frames");
  610. goto free;
  611. }
  612. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  613. if (!DP_FRAME_IS_DATA(wh)) {
  614. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  615. "NAWDS valid only for data frames");
  616. goto free;
  617. }
  618. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  619. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  620. "Invalid nbuf length");
  621. goto free;
  622. }
  623. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  624. if (!pdev) {
  625. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  626. "PDEV not found");
  627. goto free;
  628. }
  629. if (pdev->filter_neighbour_peers) {
  630. /* Next Hop scenario not yet handle */
  631. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  632. if (vdev) {
  633. dp_rx_mon_deliver(soc, pdev->pdev_id,
  634. pdev->invalid_peer_head_msdu,
  635. pdev->invalid_peer_tail_msdu);
  636. pdev->invalid_peer_head_msdu = NULL;
  637. pdev->invalid_peer_tail_msdu = NULL;
  638. return 0;
  639. }
  640. }
  641. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  642. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  643. QDF_MAC_ADDR_SIZE) == 0) {
  644. goto out;
  645. }
  646. }
  647. if (!vdev) {
  648. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  649. "VDEV not found");
  650. goto free;
  651. }
  652. out:
  653. msg.wh = wh;
  654. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  655. msg.nbuf = mpdu;
  656. msg.vdev_id = vdev->vdev_id;
  657. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  658. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  659. &msg);
  660. free:
  661. /* Drop and free packet */
  662. curr_nbuf = mpdu;
  663. while (curr_nbuf) {
  664. next_nbuf = qdf_nbuf_next(curr_nbuf);
  665. qdf_nbuf_free(curr_nbuf);
  666. curr_nbuf = next_nbuf;
  667. }
  668. return 0;
  669. }
  670. /**
  671. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  672. * @soc: DP SOC handle
  673. * @mpdu: mpdu for which peer is invalid
  674. * @mpdu_done: if an mpdu is completed
  675. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  676. * pool_id has same mapping)
  677. *
  678. * return: integer type
  679. */
  680. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  681. qdf_nbuf_t mpdu, bool mpdu_done,
  682. uint8_t mac_id)
  683. {
  684. /* Only trigger the process when mpdu is completed */
  685. if (mpdu_done)
  686. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  687. }
  688. #else
  689. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  690. uint8_t mac_id)
  691. {
  692. qdf_nbuf_t curr_nbuf, next_nbuf;
  693. struct dp_pdev *pdev;
  694. struct dp_vdev *vdev = NULL;
  695. struct ieee80211_frame *wh;
  696. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  697. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  698. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  699. if (!DP_FRAME_IS_DATA(wh)) {
  700. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  701. "only for data frames");
  702. goto free;
  703. }
  704. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  705. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  706. "Invalid nbuf length");
  707. goto free;
  708. }
  709. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  710. if (!pdev) {
  711. QDF_TRACE(QDF_MODULE_ID_DP,
  712. QDF_TRACE_LEVEL_ERROR,
  713. "PDEV not found");
  714. goto free;
  715. }
  716. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  717. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  718. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  719. QDF_MAC_ADDR_SIZE) == 0) {
  720. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  721. goto out;
  722. }
  723. }
  724. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  725. if (!vdev) {
  726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  727. "VDEV not found");
  728. goto free;
  729. }
  730. out:
  731. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  732. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  733. free:
  734. /* reset the head and tail pointers */
  735. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  736. if (pdev) {
  737. pdev->invalid_peer_head_msdu = NULL;
  738. pdev->invalid_peer_tail_msdu = NULL;
  739. }
  740. /* Drop and free packet */
  741. curr_nbuf = mpdu;
  742. while (curr_nbuf) {
  743. next_nbuf = qdf_nbuf_next(curr_nbuf);
  744. qdf_nbuf_free(curr_nbuf);
  745. curr_nbuf = next_nbuf;
  746. }
  747. return 0;
  748. }
  749. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  750. qdf_nbuf_t mpdu, bool mpdu_done,
  751. uint8_t mac_id)
  752. {
  753. /* Process the nbuf */
  754. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  755. }
  756. #endif
  757. #ifdef RECEIVE_OFFLOAD
  758. /**
  759. * dp_rx_print_offload_info() - Print offload info from RX TLV
  760. * @rx_tlv: RX TLV for which offload information is to be printed
  761. *
  762. * Return: None
  763. */
  764. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  765. {
  766. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  767. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  768. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  769. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  770. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  771. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  772. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  773. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  774. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  775. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  776. dp_verbose_debug("---------------------------------------------------------");
  777. }
  778. /**
  779. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  780. * @soc: DP SOC handle
  781. * @rx_tlv: RX TLV received for the msdu
  782. * @msdu: msdu for which GRO info needs to be filled
  783. *
  784. * Return: None
  785. */
  786. static
  787. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  788. qdf_nbuf_t msdu)
  789. {
  790. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  791. return;
  792. /* Filling up RX offload info only for TCP packets */
  793. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  794. return;
  795. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  796. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  797. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  798. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  799. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  800. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  801. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  802. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  803. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  804. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  805. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  806. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  807. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  808. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  809. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  810. HAL_RX_TLV_GET_IPV6(rx_tlv);
  811. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  812. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  813. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  814. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  815. dp_rx_print_offload_info(rx_tlv);
  816. }
  817. #else
  818. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  819. qdf_nbuf_t msdu)
  820. {
  821. }
  822. #endif /* RECEIVE_OFFLOAD */
  823. /**
  824. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  825. *
  826. * @nbuf: pointer to msdu.
  827. * @mpdu_len: mpdu length
  828. *
  829. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  830. */
  831. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  832. {
  833. bool last_nbuf;
  834. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  835. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  836. last_nbuf = false;
  837. } else {
  838. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  839. last_nbuf = true;
  840. }
  841. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  842. return last_nbuf;
  843. }
  844. /**
  845. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  846. * multiple nbufs.
  847. * @nbuf: pointer to the first msdu of an amsdu.
  848. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  849. *
  850. *
  851. * This function implements the creation of RX frag_list for cases
  852. * where an MSDU is spread across multiple nbufs.
  853. *
  854. * Return: returns the head nbuf which contains complete frag_list.
  855. */
  856. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  857. {
  858. qdf_nbuf_t parent, next, frag_list;
  859. uint16_t frag_list_len = 0;
  860. uint16_t mpdu_len;
  861. bool last_nbuf;
  862. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  863. /*
  864. * this is a case where the complete msdu fits in one single nbuf.
  865. * in this case HW sets both start and end bit and we only need to
  866. * reset these bits for RAW mode simulator to decap the pkt
  867. */
  868. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  869. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  870. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  871. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  872. return nbuf;
  873. }
  874. /*
  875. * This is a case where we have multiple msdus (A-MSDU) spread across
  876. * multiple nbufs. here we create a fraglist out of these nbufs.
  877. *
  878. * the moment we encounter a nbuf with continuation bit set we
  879. * know for sure we have an MSDU which is spread across multiple
  880. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  881. */
  882. parent = nbuf;
  883. frag_list = nbuf->next;
  884. nbuf = nbuf->next;
  885. /*
  886. * set the start bit in the first nbuf we encounter with continuation
  887. * bit set. This has the proper mpdu length set as it is the first
  888. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  889. * nbufs will form the frag_list of the parent nbuf.
  890. */
  891. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  892. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  893. /*
  894. * this is where we set the length of the fragments which are
  895. * associated to the parent nbuf. We iterate through the frag_list
  896. * till we hit the last_nbuf of the list.
  897. */
  898. do {
  899. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  900. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  901. frag_list_len += qdf_nbuf_len(nbuf);
  902. if (last_nbuf) {
  903. next = nbuf->next;
  904. nbuf->next = NULL;
  905. break;
  906. }
  907. nbuf = nbuf->next;
  908. } while (!last_nbuf);
  909. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  910. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  911. parent->next = next;
  912. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  913. return parent;
  914. }
  915. /**
  916. * dp_rx_compute_delay() - Compute and fill in all timestamps
  917. * to pass in correct fields
  918. *
  919. * @vdev: pdev handle
  920. * @tx_desc: tx descriptor
  921. * @tid: tid value
  922. * Return: none
  923. */
  924. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  925. {
  926. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  927. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  928. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  929. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  930. uint32_t interframe_delay =
  931. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  932. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  933. CDP_DELAY_STATS_REAP_STACK, ring_id);
  934. /*
  935. * Update interframe delay stats calculated at deliver_data_ol point.
  936. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  937. * interframe delay will not be calculate correctly for 1st frame.
  938. * On the other side, this will help in avoiding extra per packet check
  939. * of vdev->prev_rx_deliver_tstamp.
  940. */
  941. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  942. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  943. vdev->prev_rx_deliver_tstamp = current_ts;
  944. }
  945. /**
  946. * dp_rx_drop_nbuf_list() - drop an nbuf list
  947. * @pdev: dp pdev reference
  948. * @buf_list: buffer list to be dropepd
  949. *
  950. * Return: int (number of bufs dropped)
  951. */
  952. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  953. qdf_nbuf_t buf_list)
  954. {
  955. struct cdp_tid_rx_stats *stats = NULL;
  956. uint8_t tid = 0, ring_id = 0;
  957. int num_dropped = 0;
  958. qdf_nbuf_t buf, next_buf;
  959. buf = buf_list;
  960. while (buf) {
  961. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  962. next_buf = qdf_nbuf_queue_next(buf);
  963. tid = qdf_nbuf_get_tid_val(buf);
  964. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  965. stats->fail_cnt[INVALID_PEER_VDEV]++;
  966. stats->delivered_to_stack--;
  967. qdf_nbuf_free(buf);
  968. buf = next_buf;
  969. num_dropped++;
  970. }
  971. return num_dropped;
  972. }
  973. #ifdef PEER_CACHE_RX_PKTS
  974. /**
  975. * dp_rx_flush_rx_cached() - flush cached rx frames
  976. * @peer: peer
  977. * @drop: flag to drop frames or forward to net stack
  978. *
  979. * Return: None
  980. */
  981. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  982. {
  983. struct dp_peer_cached_bufq *bufqi;
  984. struct dp_rx_cached_buf *cache_buf = NULL;
  985. ol_txrx_rx_fp data_rx = NULL;
  986. int num_buff_elem;
  987. QDF_STATUS status;
  988. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  989. qdf_atomic_dec(&peer->flush_in_progress);
  990. return;
  991. }
  992. qdf_spin_lock_bh(&peer->peer_info_lock);
  993. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  994. data_rx = peer->vdev->osif_rx;
  995. else
  996. drop = true;
  997. qdf_spin_unlock_bh(&peer->peer_info_lock);
  998. bufqi = &peer->bufq_info;
  999. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1000. qdf_list_remove_front(&bufqi->cached_bufq,
  1001. (qdf_list_node_t **)&cache_buf);
  1002. while (cache_buf) {
  1003. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1004. cache_buf->buf);
  1005. bufqi->entries -= num_buff_elem;
  1006. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1007. if (drop) {
  1008. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1009. cache_buf->buf);
  1010. } else {
  1011. /* Flush the cached frames to OSIF DEV */
  1012. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1013. if (status != QDF_STATUS_SUCCESS)
  1014. bufqi->dropped = dp_rx_drop_nbuf_list(
  1015. peer->vdev->pdev,
  1016. cache_buf->buf);
  1017. }
  1018. qdf_mem_free(cache_buf);
  1019. cache_buf = NULL;
  1020. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1021. qdf_list_remove_front(&bufqi->cached_bufq,
  1022. (qdf_list_node_t **)&cache_buf);
  1023. }
  1024. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1025. qdf_atomic_dec(&peer->flush_in_progress);
  1026. }
  1027. /**
  1028. * dp_rx_enqueue_rx() - cache rx frames
  1029. * @peer: peer
  1030. * @rx_buf_list: cache buffer list
  1031. *
  1032. * Return: None
  1033. */
  1034. static QDF_STATUS
  1035. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1036. {
  1037. struct dp_rx_cached_buf *cache_buf;
  1038. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1039. int num_buff_elem;
  1040. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1041. bufqi->entries, bufqi->dropped);
  1042. if (!peer->valid) {
  1043. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1044. rx_buf_list);
  1045. return QDF_STATUS_E_INVAL;
  1046. }
  1047. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1048. if (bufqi->entries >= bufqi->thresh) {
  1049. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1050. rx_buf_list);
  1051. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1052. return QDF_STATUS_E_RESOURCES;
  1053. }
  1054. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1055. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1056. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1057. if (!cache_buf) {
  1058. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1059. "Failed to allocate buf to cache rx frames");
  1060. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1061. rx_buf_list);
  1062. return QDF_STATUS_E_NOMEM;
  1063. }
  1064. cache_buf->buf = rx_buf_list;
  1065. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1066. qdf_list_insert_back(&bufqi->cached_bufq,
  1067. &cache_buf->node);
  1068. bufqi->entries += num_buff_elem;
  1069. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1070. return QDF_STATUS_SUCCESS;
  1071. }
  1072. static inline
  1073. bool dp_rx_is_peer_cache_bufq_supported(void)
  1074. {
  1075. return true;
  1076. }
  1077. #else
  1078. static inline
  1079. bool dp_rx_is_peer_cache_bufq_supported(void)
  1080. {
  1081. return false;
  1082. }
  1083. static inline QDF_STATUS
  1084. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1085. {
  1086. return QDF_STATUS_SUCCESS;
  1087. }
  1088. #endif
  1089. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1090. struct dp_peer *peer,
  1091. qdf_nbuf_t nbuf_head,
  1092. qdf_nbuf_t nbuf_tail)
  1093. {
  1094. /*
  1095. * highly unlikely to have a vdev without a registered rx
  1096. * callback function. if so let us free the nbuf_list.
  1097. */
  1098. if (qdf_unlikely(!vdev->osif_rx)) {
  1099. if (dp_rx_is_peer_cache_bufq_supported())
  1100. dp_rx_enqueue_rx(peer, nbuf_head);
  1101. else
  1102. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1103. return;
  1104. }
  1105. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1106. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1107. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1108. &nbuf_tail, (struct cdp_peer *) peer);
  1109. }
  1110. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1111. }
  1112. /**
  1113. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1114. * @nbuf: pointer to the first msdu of an amsdu.
  1115. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1116. *
  1117. * The ipsumed field of the skb is set based on whether HW validated the
  1118. * IP/TCP/UDP checksum.
  1119. *
  1120. * Return: void
  1121. */
  1122. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1123. qdf_nbuf_t nbuf,
  1124. uint8_t *rx_tlv_hdr)
  1125. {
  1126. qdf_nbuf_rx_cksum_t cksum = {0};
  1127. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1128. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1129. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1130. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1131. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1132. } else {
  1133. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1134. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1135. }
  1136. }
  1137. /**
  1138. * dp_rx_msdu_stats_update() - update per msdu stats.
  1139. * @soc: core txrx main context
  1140. * @nbuf: pointer to the first msdu of an amsdu.
  1141. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1142. * @peer: pointer to the peer object.
  1143. * @ring_id: reo dest ring number on which pkt is reaped.
  1144. * @tid_stats: per tid rx stats.
  1145. *
  1146. * update all the per msdu stats for that nbuf.
  1147. * Return: void
  1148. */
  1149. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1150. qdf_nbuf_t nbuf,
  1151. uint8_t *rx_tlv_hdr,
  1152. struct dp_peer *peer,
  1153. uint8_t ring_id,
  1154. struct cdp_tid_rx_stats *tid_stats)
  1155. {
  1156. bool is_ampdu, is_not_amsdu;
  1157. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1158. struct dp_vdev *vdev = peer->vdev;
  1159. qdf_ether_header_t *eh;
  1160. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1161. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1162. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1163. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1164. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1165. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1166. tid_stats->msdu_cnt++;
  1167. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1168. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1169. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1170. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1171. tid_stats->mcast_msdu_cnt++;
  1172. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1173. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1174. tid_stats->bcast_msdu_cnt++;
  1175. }
  1176. }
  1177. /*
  1178. * currently we can return from here as we have similar stats
  1179. * updated at per ppdu level instead of msdu level
  1180. */
  1181. if (!soc->process_rx_status)
  1182. return;
  1183. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1184. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1185. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1186. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1187. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1188. tid = qdf_nbuf_get_tid_val(nbuf);
  1189. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1190. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1191. rx_tlv_hdr);
  1192. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1193. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1194. DP_STATS_INC(peer, rx.bw[bw], 1);
  1195. /*
  1196. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1197. * then increase index [nss - 1] in array counter.
  1198. */
  1199. if (nss > 0 && (pkt_type == DOT11_N ||
  1200. pkt_type == DOT11_AC ||
  1201. pkt_type == DOT11_AX))
  1202. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1203. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1204. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1205. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1206. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1207. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1208. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1209. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1210. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1211. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1212. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1213. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1214. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1215. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1216. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1217. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1218. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1219. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1220. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1221. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1222. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1223. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1224. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1225. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1226. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1227. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1228. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1229. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1230. if ((soc->process_rx_status) &&
  1231. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1232. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1233. if (!vdev->pdev)
  1234. return;
  1235. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1236. &peer->stats, peer->peer_ids[0],
  1237. UPDATE_PEER_STATS,
  1238. vdev->pdev->pdev_id);
  1239. #endif
  1240. }
  1241. }
  1242. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1243. void *rx_tlv_hdr,
  1244. qdf_nbuf_t nbuf)
  1245. {
  1246. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1247. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1248. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1249. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1250. qdf_nbuf_is_da_valid(nbuf) &&
  1251. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1252. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1253. return false;
  1254. return true;
  1255. }
  1256. #ifndef WDS_VENDOR_EXTENSION
  1257. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1258. struct dp_vdev *vdev,
  1259. struct dp_peer *peer)
  1260. {
  1261. return 1;
  1262. }
  1263. #endif
  1264. #ifdef RX_DESC_DEBUG_CHECK
  1265. /**
  1266. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1267. * corruption
  1268. *
  1269. * @ring_desc: REO ring descriptor
  1270. * @rx_desc: Rx descriptor
  1271. *
  1272. * Return: NONE
  1273. */
  1274. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1275. struct dp_rx_desc *rx_desc)
  1276. {
  1277. struct hal_buf_info hbi;
  1278. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1279. /* Sanity check for possible buffer paddr corruption */
  1280. qdf_assert_always((&hbi)->paddr ==
  1281. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1282. }
  1283. #else
  1284. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1285. struct dp_rx_desc *rx_desc)
  1286. {
  1287. }
  1288. #endif
  1289. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1290. static inline
  1291. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1292. {
  1293. bool limit_hit = false;
  1294. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1295. limit_hit =
  1296. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1297. if (limit_hit)
  1298. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1299. return limit_hit;
  1300. }
  1301. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1302. {
  1303. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1304. }
  1305. #else
  1306. static inline
  1307. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1308. {
  1309. return false;
  1310. }
  1311. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1312. {
  1313. return false;
  1314. }
  1315. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1316. /**
  1317. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1318. *
  1319. * @nbuf: pkt skb pointer
  1320. *
  1321. * Return: true if matched, false if not
  1322. */
  1323. static inline
  1324. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1325. {
  1326. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1327. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1328. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1329. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1330. return true;
  1331. else
  1332. return false;
  1333. }
  1334. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1335. /**
  1336. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1337. * no corresbonding peer found
  1338. * @soc: core txrx main context
  1339. * @nbuf: pkt skb pointer
  1340. *
  1341. * This function will try to deliver some RX special frames to stack
  1342. * even there is no peer matched found. for instance, LFR case, some
  1343. * eapol data will be sent to host before peer_map done.
  1344. *
  1345. * Return: None
  1346. */
  1347. static inline
  1348. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1349. {
  1350. uint32_t peer_mdata;
  1351. uint16_t peer_id;
  1352. uint8_t vdev_id;
  1353. struct dp_vdev *vdev;
  1354. uint32_t l2_hdr_offset = 0;
  1355. uint16_t msdu_len = 0;
  1356. uint32_t pkt_len = 0;
  1357. uint8_t *rx_tlv_hdr;
  1358. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1359. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1360. if (peer_id > soc->max_peers)
  1361. goto deliver_fail;
  1362. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1363. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1364. if (!vdev || !vdev->osif_rx)
  1365. goto deliver_fail;
  1366. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1367. l2_hdr_offset =
  1368. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1369. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1370. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1371. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1372. qdf_nbuf_pull_head(nbuf,
  1373. RX_PKT_TLVS_LEN +
  1374. l2_hdr_offset);
  1375. /* only allow special frames */
  1376. if (!dp_is_special_data(nbuf))
  1377. goto deliver_fail;
  1378. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1379. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1380. return;
  1381. deliver_fail:
  1382. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1383. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1384. qdf_nbuf_free(nbuf);
  1385. }
  1386. #else
  1387. static inline
  1388. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1389. {
  1390. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1391. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1392. qdf_nbuf_free(nbuf);
  1393. }
  1394. #endif
  1395. /**
  1396. * dp_rx_process() - Brain of the Rx processing functionality
  1397. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1398. * @soc: core txrx main context
  1399. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1400. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1401. * @quota: No. of units (packets) that can be serviced in one shot.
  1402. *
  1403. * This function implements the core of Rx functionality. This is
  1404. * expected to handle only non-error frames.
  1405. *
  1406. * Return: uint32_t: No. of elements processed
  1407. */
  1408. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1409. uint8_t reo_ring_num, uint32_t quota)
  1410. {
  1411. void *hal_soc;
  1412. void *ring_desc;
  1413. struct dp_rx_desc *rx_desc = NULL;
  1414. qdf_nbuf_t nbuf, next;
  1415. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1416. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1417. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1418. uint32_t l2_hdr_offset = 0;
  1419. uint16_t msdu_len = 0;
  1420. uint16_t peer_id;
  1421. struct dp_peer *peer;
  1422. struct dp_vdev *vdev;
  1423. uint32_t pkt_len = 0;
  1424. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1425. struct hal_rx_msdu_desc_info msdu_desc_info;
  1426. enum hal_reo_error_status error;
  1427. uint32_t peer_mdata;
  1428. uint8_t *rx_tlv_hdr;
  1429. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1430. uint8_t mac_id = 0;
  1431. struct dp_pdev *pdev;
  1432. struct dp_pdev *rx_pdev;
  1433. struct dp_srng *dp_rxdma_srng;
  1434. struct rx_desc_pool *rx_desc_pool;
  1435. struct dp_soc *soc = int_ctx->soc;
  1436. uint8_t ring_id = 0;
  1437. uint8_t core_id = 0;
  1438. struct cdp_tid_rx_stats *tid_stats;
  1439. qdf_nbuf_t nbuf_head;
  1440. qdf_nbuf_t nbuf_tail;
  1441. qdf_nbuf_t deliver_list_head;
  1442. qdf_nbuf_t deliver_list_tail;
  1443. uint32_t num_rx_bufs_reaped = 0;
  1444. uint32_t intr_id;
  1445. struct hif_opaque_softc *scn;
  1446. int32_t tid = 0;
  1447. bool is_prev_msdu_last = true;
  1448. uint32_t num_entries_avail = 0;
  1449. DP_HIST_INIT();
  1450. qdf_assert_always(soc && hal_ring);
  1451. hal_soc = soc->hal_soc;
  1452. qdf_assert_always(hal_soc);
  1453. scn = soc->hif_handle;
  1454. hif_pm_runtime_mark_last_busy(scn);
  1455. intr_id = int_ctx->dp_intr_id;
  1456. more_data:
  1457. /* reset local variables here to be re-used in the function */
  1458. nbuf_head = NULL;
  1459. nbuf_tail = NULL;
  1460. deliver_list_head = NULL;
  1461. deliver_list_tail = NULL;
  1462. peer = NULL;
  1463. vdev = NULL;
  1464. num_rx_bufs_reaped = 0;
  1465. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1466. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1467. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1468. qdf_mem_zero(head, sizeof(head));
  1469. qdf_mem_zero(tail, sizeof(tail));
  1470. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring))) {
  1471. /*
  1472. * Need API to convert from hal_ring pointer to
  1473. * Ring Type / Ring Id combo
  1474. */
  1475. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1476. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1477. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1478. goto done;
  1479. }
  1480. /*
  1481. * start reaping the buffers from reo ring and queue
  1482. * them in per vdev queue.
  1483. * Process the received pkts in a different per vdev loop.
  1484. */
  1485. while (qdf_likely(quota &&
  1486. (ring_desc = hal_srng_dst_peek(hal_soc, hal_ring)))) {
  1487. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1488. ring_id = hal_srng_ring_id_get(hal_ring);
  1489. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1490. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1491. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1492. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1493. /* Don't know how to deal with this -- assert */
  1494. qdf_assert(0);
  1495. }
  1496. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1497. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1498. qdf_assert(rx_desc);
  1499. /*
  1500. * this is a unlikely scenario where the host is reaping
  1501. * a descriptor which it already reaped just a while ago
  1502. * but is yet to replenish it back to HW.
  1503. * In this case host will dump the last 128 descriptors
  1504. * including the software descriptor rx_desc and assert.
  1505. */
  1506. if (qdf_unlikely(!rx_desc->in_use)) {
  1507. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1508. dp_info_rl("Reaping rx_desc not in use!");
  1509. dp_rx_dump_info_and_assert(soc, hal_ring,
  1510. ring_desc, rx_desc);
  1511. /* ignore duplicate RX desc and continue to process */
  1512. /* Pop out the descriptor */
  1513. hal_srng_dst_get_next(hal_soc, hal_ring);
  1514. continue;
  1515. }
  1516. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1517. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1518. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1519. dp_rx_dump_info_and_assert(soc, hal_ring,
  1520. ring_desc, rx_desc);
  1521. }
  1522. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1523. /* TODO */
  1524. /*
  1525. * Need a separate API for unmapping based on
  1526. * phyiscal address
  1527. */
  1528. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1529. QDF_DMA_FROM_DEVICE);
  1530. rx_desc->unmapped = 1;
  1531. core_id = smp_processor_id();
  1532. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1533. /* Get MPDU DESC info */
  1534. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1535. /* Get MSDU DESC info */
  1536. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1537. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1538. HAL_MPDU_F_RAW_AMPDU)) {
  1539. /* previous msdu has end bit set, so current one is
  1540. * the new MPDU
  1541. */
  1542. if (is_prev_msdu_last) {
  1543. is_prev_msdu_last = false;
  1544. /* Get number of entries available in HW ring */
  1545. num_entries_avail =
  1546. hal_srng_dst_num_valid(hal_soc, hal_ring, 1);
  1547. /* For new MPDU check if we can read complete
  1548. * MPDU by comparing the number of buffers
  1549. * available and number of buffers needed to
  1550. * reap this MPDU
  1551. */
  1552. if (((msdu_desc_info.msdu_len /
  1553. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1554. num_entries_avail)
  1555. break;
  1556. } else {
  1557. if (msdu_desc_info.msdu_flags &
  1558. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1559. is_prev_msdu_last = true;
  1560. }
  1561. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1562. }
  1563. /* Pop out the descriptor*/
  1564. hal_srng_dst_get_next(hal_soc, hal_ring);
  1565. rx_bufs_reaped[rx_desc->pool_id]++;
  1566. peer_mdata = mpdu_desc_info.peer_meta_data;
  1567. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1568. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1569. /*
  1570. * save msdu flags first, last and continuation msdu in
  1571. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1572. * length to nbuf->cb. This ensures the info required for
  1573. * per pkt processing is always in the same cache line.
  1574. * This helps in improving throughput for smaller pkt
  1575. * sizes.
  1576. */
  1577. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1578. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1579. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1580. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1581. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1582. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1583. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1584. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1585. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1586. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1587. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1588. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1589. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1590. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1591. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1592. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1593. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1594. /*
  1595. * if continuation bit is set then we have MSDU spread
  1596. * across multiple buffers, let us not decrement quota
  1597. * till we reap all buffers of that MSDU.
  1598. */
  1599. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1600. quota -= 1;
  1601. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1602. &tail[rx_desc->pool_id],
  1603. rx_desc);
  1604. num_rx_bufs_reaped++;
  1605. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1606. break;
  1607. }
  1608. done:
  1609. dp_srng_access_end(int_ctx, soc, hal_ring);
  1610. if (nbuf_tail)
  1611. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1612. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1613. /*
  1614. * continue with next mac_id if no pkts were reaped
  1615. * from that pool
  1616. */
  1617. if (!rx_bufs_reaped[mac_id])
  1618. continue;
  1619. pdev = soc->pdev_list[mac_id];
  1620. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1621. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1622. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1623. rx_desc_pool, rx_bufs_reaped[mac_id],
  1624. &head[mac_id], &tail[mac_id]);
  1625. }
  1626. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1627. /* Peer can be NULL is case of LFR */
  1628. if (qdf_likely(peer))
  1629. vdev = NULL;
  1630. /*
  1631. * BIG loop where each nbuf is dequeued from global queue,
  1632. * processed and queued back on a per vdev basis. These nbufs
  1633. * are sent to stack as and when we run out of nbufs
  1634. * or a new nbuf dequeued from global queue has a different
  1635. * vdev when compared to previous nbuf.
  1636. */
  1637. nbuf = nbuf_head;
  1638. while (nbuf) {
  1639. next = nbuf->next;
  1640. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1641. /* Get TID from struct cb->tid_val, save to tid */
  1642. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1643. tid = qdf_nbuf_get_tid_val(nbuf);
  1644. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1645. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1646. peer = dp_peer_find_by_id(soc, peer_id);
  1647. if (peer) {
  1648. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1649. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1650. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1651. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1652. QDF_NBUF_RX_PKT_DATA_TRACK;
  1653. }
  1654. rx_bufs_used++;
  1655. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1656. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1657. deliver_list_tail);
  1658. deliver_list_head = NULL;
  1659. deliver_list_tail = NULL;
  1660. }
  1661. if (qdf_likely(peer)) {
  1662. vdev = peer->vdev;
  1663. } else {
  1664. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1665. nbuf = next;
  1666. continue;
  1667. }
  1668. if (qdf_unlikely(!vdev)) {
  1669. qdf_nbuf_free(nbuf);
  1670. nbuf = next;
  1671. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1672. dp_peer_unref_del_find_by_id(peer);
  1673. continue;
  1674. }
  1675. rx_pdev = vdev->pdev;
  1676. DP_RX_TID_SAVE(nbuf, tid);
  1677. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1678. qdf_nbuf_set_timestamp(nbuf);
  1679. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1680. tid_stats =
  1681. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1682. /*
  1683. * Check if DMA completed -- msdu_done is the last bit
  1684. * to be written
  1685. */
  1686. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1687. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1688. dp_err("MSDU DONE failure");
  1689. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1690. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1691. QDF_TRACE_LEVEL_INFO);
  1692. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1693. qdf_nbuf_free(nbuf);
  1694. qdf_assert(0);
  1695. nbuf = next;
  1696. continue;
  1697. }
  1698. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1699. /*
  1700. * First IF condition:
  1701. * 802.11 Fragmented pkts are reinjected to REO
  1702. * HW block as SG pkts and for these pkts we only
  1703. * need to pull the RX TLVS header length.
  1704. * Second IF condition:
  1705. * The below condition happens when an MSDU is spread
  1706. * across multiple buffers. This can happen in two cases
  1707. * 1. The nbuf size is smaller then the received msdu.
  1708. * ex: we have set the nbuf size to 2048 during
  1709. * nbuf_alloc. but we received an msdu which is
  1710. * 2304 bytes in size then this msdu is spread
  1711. * across 2 nbufs.
  1712. *
  1713. * 2. AMSDUs when RAW mode is enabled.
  1714. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1715. * across 1st nbuf and 2nd nbuf and last MSDU is
  1716. * spread across 2nd nbuf and 3rd nbuf.
  1717. *
  1718. * for these scenarios let us create a skb frag_list and
  1719. * append these buffers till the last MSDU of the AMSDU
  1720. * Third condition:
  1721. * This is the most likely case, we receive 802.3 pkts
  1722. * decapsulated by HW, here we need to set the pkt length.
  1723. */
  1724. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1725. bool is_mcbc, is_sa_vld, is_da_vld;
  1726. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1727. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1728. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1729. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1730. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1731. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1732. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1733. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1734. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1735. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1736. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1737. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1738. next = nbuf->next;
  1739. } else {
  1740. l2_hdr_offset =
  1741. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1742. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1743. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1744. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1745. qdf_nbuf_pull_head(nbuf,
  1746. RX_PKT_TLVS_LEN +
  1747. l2_hdr_offset);
  1748. }
  1749. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1750. QDF_TRACE(QDF_MODULE_ID_DP,
  1751. QDF_TRACE_LEVEL_ERROR,
  1752. FL("Policy Check Drop pkt"));
  1753. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1754. /* Drop & free packet */
  1755. qdf_nbuf_free(nbuf);
  1756. /* Statistics */
  1757. nbuf = next;
  1758. dp_peer_unref_del_find_by_id(peer);
  1759. continue;
  1760. }
  1761. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1762. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1763. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1764. false))) {
  1765. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1766. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1767. qdf_nbuf_free(nbuf);
  1768. nbuf = next;
  1769. dp_peer_unref_del_find_by_id(peer);
  1770. continue;
  1771. }
  1772. if (soc->process_rx_status)
  1773. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1774. /* Update the protocol tag in SKB based on CCE metadata */
  1775. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1776. reo_ring_num, false, true);
  1777. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1778. ring_id, tid_stats);
  1779. if (qdf_unlikely(vdev->mesh_vdev)) {
  1780. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1781. == QDF_STATUS_SUCCESS) {
  1782. QDF_TRACE(QDF_MODULE_ID_DP,
  1783. QDF_TRACE_LEVEL_INFO_MED,
  1784. FL("mesh pkt filtered"));
  1785. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1786. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1787. 1);
  1788. qdf_nbuf_free(nbuf);
  1789. nbuf = next;
  1790. dp_peer_unref_del_find_by_id(peer);
  1791. continue;
  1792. }
  1793. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1794. }
  1795. if (qdf_likely(vdev->rx_decap_type ==
  1796. htt_cmn_pkt_type_ethernet) &&
  1797. qdf_likely(!vdev->mesh_vdev)) {
  1798. /* WDS Destination Address Learning */
  1799. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1800. /* Due to HW issue, sometimes we see that the sa_idx
  1801. * and da_idx are invalid with sa_valid and da_valid
  1802. * bits set
  1803. *
  1804. * in this case we also see that value of
  1805. * sa_sw_peer_id is set as 0
  1806. *
  1807. * Drop the packet if sa_idx and da_idx OOB or
  1808. * sa_sw_peerid is 0
  1809. */
  1810. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1811. qdf_nbuf_free(nbuf);
  1812. nbuf = next;
  1813. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1814. dp_peer_unref_del_find_by_id(peer);
  1815. continue;
  1816. }
  1817. /* WDS Source Port Learning */
  1818. if (qdf_likely(vdev->wds_enabled))
  1819. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1820. peer, nbuf);
  1821. /* Intrabss-fwd */
  1822. if (dp_rx_check_ap_bridge(vdev))
  1823. if (dp_rx_intrabss_fwd(soc,
  1824. peer,
  1825. rx_tlv_hdr,
  1826. nbuf)) {
  1827. nbuf = next;
  1828. dp_peer_unref_del_find_by_id(peer);
  1829. tid_stats->intrabss_cnt++;
  1830. continue; /* Get next desc */
  1831. }
  1832. }
  1833. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1834. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1835. DP_RX_LIST_APPEND(deliver_list_head,
  1836. deliver_list_tail,
  1837. nbuf);
  1838. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1839. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1840. tid_stats->delivered_to_stack++;
  1841. nbuf = next;
  1842. dp_peer_unref_del_find_by_id(peer);
  1843. }
  1844. if (deliver_list_head && peer)
  1845. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1846. deliver_list_tail);
  1847. if (dp_rx_enable_eol_data_check(soc)) {
  1848. if (quota &&
  1849. hal_srng_dst_peek_sync_locked(soc, hal_ring)) {
  1850. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1851. if (!hif_exec_should_yield(scn, intr_id))
  1852. goto more_data;
  1853. }
  1854. }
  1855. /* Update histogram statistics by looping through pdev's */
  1856. DP_RX_HIST_STATS_PER_PDEV();
  1857. return rx_bufs_used; /* Assume no scale factor for now */
  1858. }
  1859. /**
  1860. * dp_rx_detach() - detach dp rx
  1861. * @pdev: core txrx pdev context
  1862. *
  1863. * This function will detach DP RX into main device context
  1864. * will free DP Rx resources.
  1865. *
  1866. * Return: void
  1867. */
  1868. void
  1869. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1870. {
  1871. uint8_t pdev_id = pdev->pdev_id;
  1872. struct dp_soc *soc = pdev->soc;
  1873. struct rx_desc_pool *rx_desc_pool;
  1874. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1875. if (rx_desc_pool->pool_size != 0) {
  1876. if (!dp_is_soc_reinit(soc))
  1877. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1878. rx_desc_pool);
  1879. else
  1880. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1881. }
  1882. return;
  1883. }
  1884. static QDF_STATUS
  1885. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1886. struct dp_pdev *dp_pdev)
  1887. {
  1888. qdf_dma_addr_t paddr;
  1889. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1890. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1891. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1892. FALSE);
  1893. if (!(*nbuf)) {
  1894. dp_err("nbuf alloc failed");
  1895. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1896. return ret;
  1897. }
  1898. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1899. QDF_DMA_FROM_DEVICE);
  1900. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1901. qdf_nbuf_free(*nbuf);
  1902. dp_err("nbuf map failed");
  1903. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1904. return ret;
  1905. }
  1906. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1907. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1908. if (ret == QDF_STATUS_E_FAILURE) {
  1909. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1910. QDF_DMA_FROM_DEVICE);
  1911. qdf_nbuf_free(*nbuf);
  1912. dp_err("nbuf check x86 failed");
  1913. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1914. return ret;
  1915. }
  1916. return QDF_STATUS_SUCCESS;
  1917. }
  1918. QDF_STATUS
  1919. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1920. struct dp_srng *dp_rxdma_srng,
  1921. struct rx_desc_pool *rx_desc_pool,
  1922. uint32_t num_req_buffers)
  1923. {
  1924. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1925. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1926. union dp_rx_desc_list_elem_t *next;
  1927. void *rxdma_ring_entry;
  1928. qdf_dma_addr_t paddr;
  1929. qdf_nbuf_t *rx_nbuf_arr;
  1930. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1931. uint32_t buffer_index, nbuf_ptrs_per_page;
  1932. qdf_nbuf_t nbuf;
  1933. QDF_STATUS ret;
  1934. int page_idx, total_pages;
  1935. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1936. union dp_rx_desc_list_elem_t *tail = NULL;
  1937. if (qdf_unlikely(!rxdma_srng)) {
  1938. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1939. return QDF_STATUS_E_FAILURE;
  1940. }
  1941. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1942. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1943. num_req_buffers, &desc_list, &tail);
  1944. if (!nr_descs) {
  1945. dp_err("no free rx_descs in freelist");
  1946. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1947. return QDF_STATUS_E_NOMEM;
  1948. }
  1949. dp_debug("got %u RX descs for driver attach", nr_descs);
  1950. /*
  1951. * Try to allocate pointers to the nbuf one page at a time.
  1952. * Take pointers that can fit in one page of memory and
  1953. * iterate through the total descriptors that need to be
  1954. * allocated in order of pages. Reuse the pointers that
  1955. * have been allocated to fit in one page across each
  1956. * iteration to index into the nbuf.
  1957. */
  1958. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  1959. /*
  1960. * Add an extra page to store the remainder if any
  1961. */
  1962. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  1963. total_pages++;
  1964. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  1965. if (!rx_nbuf_arr) {
  1966. dp_err("failed to allocate nbuf array");
  1967. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1968. QDF_BUG(0);
  1969. return QDF_STATUS_E_NOMEM;
  1970. }
  1971. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  1972. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1973. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  1974. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1975. /*
  1976. * The last page of buffer pointers may not be required
  1977. * completely based on the number of descriptors. Below
  1978. * check will ensure we are allocating only the
  1979. * required number of descriptors.
  1980. */
  1981. if (nr_nbuf_total >= nr_descs)
  1982. break;
  1983. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1984. &rx_nbuf_arr[nr_nbuf],
  1985. dp_pdev);
  1986. if (QDF_IS_STATUS_ERROR(ret))
  1987. break;
  1988. nr_nbuf_total++;
  1989. }
  1990. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1991. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  1992. rxdma_ring_entry =
  1993. hal_srng_src_get_next(dp_soc->hal_soc,
  1994. rxdma_srng);
  1995. qdf_assert_always(rxdma_ring_entry);
  1996. next = desc_list->next;
  1997. nbuf = rx_nbuf_arr[buffer_index];
  1998. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1999. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2000. desc_list->rx_desc.in_use = 1;
  2001. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2002. desc_list->rx_desc.cookie,
  2003. rx_desc_pool->owner);
  2004. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2005. desc_list = next;
  2006. }
  2007. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2008. }
  2009. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2010. qdf_mem_free(rx_nbuf_arr);
  2011. if (!nr_nbuf_total) {
  2012. dp_err("No nbuf's allocated");
  2013. QDF_BUG(0);
  2014. return QDF_STATUS_E_RESOURCES;
  2015. }
  2016. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2017. RX_BUFFER_SIZE * nr_nbuf_total);
  2018. return QDF_STATUS_SUCCESS;
  2019. }
  2020. /**
  2021. * dp_rx_attach() - attach DP RX
  2022. * @pdev: core txrx pdev context
  2023. *
  2024. * This function will attach a DP RX instance into the main
  2025. * device (SOC) context. Will allocate dp rx resource and
  2026. * initialize resources.
  2027. *
  2028. * Return: QDF_STATUS_SUCCESS: success
  2029. * QDF_STATUS_E_RESOURCES: Error return
  2030. */
  2031. QDF_STATUS
  2032. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2033. {
  2034. uint8_t pdev_id = pdev->pdev_id;
  2035. struct dp_soc *soc = pdev->soc;
  2036. uint32_t rxdma_entries;
  2037. struct dp_srng *dp_rxdma_srng;
  2038. struct rx_desc_pool *rx_desc_pool;
  2039. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2041. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2042. return QDF_STATUS_SUCCESS;
  2043. }
  2044. pdev = soc->pdev_list[pdev_id];
  2045. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2046. rxdma_entries = dp_rxdma_srng->num_entries;
  2047. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2048. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2049. dp_rx_desc_pool_alloc(soc, pdev_id,
  2050. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  2051. rx_desc_pool);
  2052. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2053. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2054. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2055. rx_desc_pool, rxdma_entries - 1);
  2056. }
  2057. /*
  2058. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2059. * @soc: core txrx main context
  2060. * @pdev: core txrx pdev context
  2061. *
  2062. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2063. * until retry times reaches max threshold or succeeded.
  2064. *
  2065. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2066. */
  2067. qdf_nbuf_t
  2068. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2069. {
  2070. uint8_t *buf;
  2071. int32_t nbuf_retry_count;
  2072. QDF_STATUS ret;
  2073. qdf_nbuf_t nbuf = NULL;
  2074. for (nbuf_retry_count = 0; nbuf_retry_count <
  2075. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2076. nbuf_retry_count++) {
  2077. /* Allocate a new skb */
  2078. nbuf = qdf_nbuf_alloc(soc->osdev,
  2079. RX_BUFFER_SIZE,
  2080. RX_BUFFER_RESERVATION,
  2081. RX_BUFFER_ALIGNMENT,
  2082. FALSE);
  2083. if (!nbuf) {
  2084. DP_STATS_INC(pdev,
  2085. replenish.nbuf_alloc_fail, 1);
  2086. continue;
  2087. }
  2088. buf = qdf_nbuf_data(nbuf);
  2089. memset(buf, 0, RX_BUFFER_SIZE);
  2090. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2091. QDF_DMA_FROM_DEVICE);
  2092. /* nbuf map failed */
  2093. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2094. qdf_nbuf_free(nbuf);
  2095. DP_STATS_INC(pdev, replenish.map_err, 1);
  2096. continue;
  2097. }
  2098. /* qdf_nbuf alloc and map succeeded */
  2099. break;
  2100. }
  2101. /* qdf_nbuf still alloc or map failed */
  2102. if (qdf_unlikely(nbuf_retry_count >=
  2103. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2104. return NULL;
  2105. return nbuf;
  2106. }