dp_rx.c 75 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737
  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  41. static inline
  42. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  43. {
  44. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  45. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  46. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  47. return false;
  48. }
  49. return true;
  50. }
  51. #else
  52. static inline
  53. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  54. {
  55. return true;
  56. }
  57. #endif
  58. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  59. {
  60. return vdev->ap_bridge_enabled;
  61. }
  62. #ifdef DUP_RX_DESC_WAR
  63. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  64. hal_ring_handle_t hal_ring,
  65. hal_ring_desc_t ring_desc,
  66. struct dp_rx_desc *rx_desc)
  67. {
  68. void *hal_soc = soc->hal_soc;
  69. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  70. dp_rx_desc_dump(rx_desc);
  71. }
  72. #else
  73. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  74. hal_ring_handle_t hal_ring_hdl,
  75. hal_ring_desc_t ring_desc,
  76. struct dp_rx_desc *rx_desc)
  77. {
  78. hal_soc_handle_t hal_soc = soc->hal_soc;
  79. dp_rx_desc_dump(rx_desc);
  80. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  81. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  82. qdf_assert_always(0);
  83. }
  84. #endif
  85. /*
  86. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  87. * called during dp rx initialization
  88. * and at the end of dp_rx_process.
  89. *
  90. * @soc: core txrx main context
  91. * @mac_id: mac_id which is one of 3 mac_ids
  92. * @dp_rxdma_srng: dp rxdma circular ring
  93. * @rx_desc_pool: Pointer to free Rx descriptor pool
  94. * @num_req_buffers: number of buffer to be replenished
  95. * @desc_list: list of descs if called from dp_rx_process
  96. * or NULL during dp rx initialization or out of buffer
  97. * interrupt.
  98. * @tail: tail of descs list
  99. * Return: return success or failure
  100. */
  101. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  102. struct dp_srng *dp_rxdma_srng,
  103. struct rx_desc_pool *rx_desc_pool,
  104. uint32_t num_req_buffers,
  105. union dp_rx_desc_list_elem_t **desc_list,
  106. union dp_rx_desc_list_elem_t **tail)
  107. {
  108. uint32_t num_alloc_desc;
  109. uint16_t num_desc_to_free = 0;
  110. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  111. uint32_t num_entries_avail;
  112. uint32_t count;
  113. int sync_hw_ptr = 1;
  114. qdf_dma_addr_t paddr;
  115. qdf_nbuf_t rx_netbuf;
  116. void *rxdma_ring_entry;
  117. union dp_rx_desc_list_elem_t *next;
  118. QDF_STATUS ret;
  119. uint16_t buf_size = rx_desc_pool->buf_size;
  120. uint8_t buf_alignment = rx_desc_pool->buf_alignment;
  121. void *rxdma_srng;
  122. rxdma_srng = dp_rxdma_srng->hal_srng;
  123. if (!rxdma_srng) {
  124. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  125. "rxdma srng not initialized");
  126. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  127. return QDF_STATUS_E_FAILURE;
  128. }
  129. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  130. "requested %d buffers for replenish", num_req_buffers);
  131. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  132. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  133. rxdma_srng,
  134. sync_hw_ptr);
  135. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  136. "no of available entries in rxdma ring: %d",
  137. num_entries_avail);
  138. if (!(*desc_list) && (num_entries_avail >
  139. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  140. num_req_buffers = num_entries_avail;
  141. } else if (num_entries_avail < num_req_buffers) {
  142. num_desc_to_free = num_req_buffers - num_entries_avail;
  143. num_req_buffers = num_entries_avail;
  144. }
  145. if (qdf_unlikely(!num_req_buffers)) {
  146. num_desc_to_free = num_req_buffers;
  147. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  148. goto free_descs;
  149. }
  150. /*
  151. * if desc_list is NULL, allocate the descs from freelist
  152. */
  153. if (!(*desc_list)) {
  154. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  155. rx_desc_pool,
  156. num_req_buffers,
  157. desc_list,
  158. tail);
  159. if (!num_alloc_desc) {
  160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  161. "no free rx_descs in freelist");
  162. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  163. num_req_buffers);
  164. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  165. return QDF_STATUS_E_NOMEM;
  166. }
  167. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  168. "%d rx desc allocated", num_alloc_desc);
  169. num_req_buffers = num_alloc_desc;
  170. }
  171. count = 0;
  172. while (count < num_req_buffers) {
  173. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  174. buf_size,
  175. RX_BUFFER_RESERVATION,
  176. buf_alignment,
  177. FALSE);
  178. if (qdf_unlikely(!rx_netbuf)) {
  179. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  180. break;
  181. }
  182. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  183. QDF_DMA_FROM_DEVICE);
  184. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  185. qdf_nbuf_free(rx_netbuf);
  186. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  187. continue;
  188. }
  189. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  190. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  191. /*
  192. * check if the physical address of nbuf->data is
  193. * less then 0x50000000 then free the nbuf and try
  194. * allocating new nbuf. We can try for 100 times.
  195. * this is a temp WAR till we fix it properly.
  196. */
  197. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, rx_desc_pool);
  198. if (ret == QDF_STATUS_E_FAILURE) {
  199. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  200. break;
  201. }
  202. count++;
  203. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  204. rxdma_srng);
  205. qdf_assert_always(rxdma_ring_entry);
  206. next = (*desc_list)->next;
  207. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  208. /* rx_desc.in_use should be zero at this time*/
  209. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  210. (*desc_list)->rx_desc.in_use = 1;
  211. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  212. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  213. (unsigned long long)paddr,
  214. (*desc_list)->rx_desc.cookie);
  215. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  216. (*desc_list)->rx_desc.cookie,
  217. rx_desc_pool->owner);
  218. *desc_list = next;
  219. }
  220. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  221. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  222. count, num_desc_to_free);
  223. /* No need to count the number of bytes received during replenish.
  224. * Therefore set replenish.pkts.bytes as 0.
  225. */
  226. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  227. free_descs:
  228. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  229. /*
  230. * add any available free desc back to the free list
  231. */
  232. if (*desc_list)
  233. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  234. mac_id, rx_desc_pool);
  235. return QDF_STATUS_SUCCESS;
  236. }
  237. /*
  238. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  239. * pkts to RAW mode simulation to
  240. * decapsulate the pkt.
  241. *
  242. * @vdev: vdev on which RAW mode is enabled
  243. * @nbuf_list: list of RAW pkts to process
  244. * @peer: peer object from which the pkt is rx
  245. *
  246. * Return: void
  247. */
  248. void
  249. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  250. struct dp_peer *peer)
  251. {
  252. qdf_nbuf_t deliver_list_head = NULL;
  253. qdf_nbuf_t deliver_list_tail = NULL;
  254. qdf_nbuf_t nbuf;
  255. nbuf = nbuf_list;
  256. while (nbuf) {
  257. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  258. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  259. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  260. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  261. /*
  262. * reset the chfrag_start and chfrag_end bits in nbuf cb
  263. * as this is a non-amsdu pkt and RAW mode simulation expects
  264. * these bit s to be 0 for non-amsdu pkt.
  265. */
  266. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  267. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  268. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  269. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  270. }
  271. nbuf = next;
  272. }
  273. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  274. &deliver_list_tail, peer->mac_addr.raw);
  275. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  276. }
  277. #ifdef DP_LFR
  278. /*
  279. * In case of LFR, data of a new peer might be sent up
  280. * even before peer is added.
  281. */
  282. static inline struct dp_vdev *
  283. dp_get_vdev_from_peer(struct dp_soc *soc,
  284. uint16_t peer_id,
  285. struct dp_peer *peer,
  286. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  287. {
  288. struct dp_vdev *vdev;
  289. uint8_t vdev_id;
  290. if (unlikely(!peer)) {
  291. if (peer_id != HTT_INVALID_PEER) {
  292. vdev_id = DP_PEER_METADATA_VDEV_ID_GET(
  293. mpdu_desc_info.peer_meta_data);
  294. QDF_TRACE(QDF_MODULE_ID_DP,
  295. QDF_TRACE_LEVEL_DEBUG,
  296. FL("PeerID %d not found use vdevID %d"),
  297. peer_id, vdev_id);
  298. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  299. vdev_id);
  300. } else {
  301. QDF_TRACE(QDF_MODULE_ID_DP,
  302. QDF_TRACE_LEVEL_DEBUG,
  303. FL("Invalid PeerID %d"),
  304. peer_id);
  305. return NULL;
  306. }
  307. } else {
  308. vdev = peer->vdev;
  309. }
  310. return vdev;
  311. }
  312. #else
  313. static inline struct dp_vdev *
  314. dp_get_vdev_from_peer(struct dp_soc *soc,
  315. uint16_t peer_id,
  316. struct dp_peer *peer,
  317. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  318. {
  319. if (unlikely(!peer)) {
  320. QDF_TRACE(QDF_MODULE_ID_DP,
  321. QDF_TRACE_LEVEL_DEBUG,
  322. FL("Peer not found for peerID %d"),
  323. peer_id);
  324. return NULL;
  325. } else {
  326. return peer->vdev;
  327. }
  328. }
  329. #endif
  330. #ifndef FEATURE_WDS
  331. static void
  332. dp_rx_da_learn(struct dp_soc *soc,
  333. uint8_t *rx_tlv_hdr,
  334. struct dp_peer *ta_peer,
  335. qdf_nbuf_t nbuf)
  336. {
  337. }
  338. #endif
  339. /*
  340. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  341. *
  342. * @soc: core txrx main context
  343. * @ta_peer : source peer entry
  344. * @rx_tlv_hdr : start address of rx tlvs
  345. * @nbuf : nbuf that has to be intrabss forwarded
  346. *
  347. * Return: bool: true if it is forwarded else false
  348. */
  349. static bool
  350. dp_rx_intrabss_fwd(struct dp_soc *soc,
  351. struct dp_peer *ta_peer,
  352. uint8_t *rx_tlv_hdr,
  353. qdf_nbuf_t nbuf,
  354. struct hal_rx_msdu_metadata msdu_metadata)
  355. {
  356. uint16_t len;
  357. uint8_t is_frag;
  358. struct dp_peer *da_peer;
  359. struct dp_ast_entry *ast_entry;
  360. qdf_nbuf_t nbuf_copy;
  361. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  362. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  363. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  364. tid_stats.tid_rx_stats[ring_id][tid];
  365. /* check if the destination peer is available in peer table
  366. * and also check if the source peer and destination peer
  367. * belong to the same vap and destination peer is not bss peer.
  368. */
  369. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  370. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  371. if (!ast_entry)
  372. return false;
  373. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  374. ast_entry->is_active = TRUE;
  375. return false;
  376. }
  377. da_peer = ast_entry->peer;
  378. if (!da_peer)
  379. return false;
  380. /* TA peer cannot be same as peer(DA) on which AST is present
  381. * this indicates a change in topology and that AST entries
  382. * are yet to be updated.
  383. */
  384. if (da_peer == ta_peer)
  385. return false;
  386. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  387. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  388. is_frag = qdf_nbuf_is_frag(nbuf);
  389. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  390. /* linearize the nbuf just before we send to
  391. * dp_tx_send()
  392. */
  393. if (qdf_unlikely(is_frag)) {
  394. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  395. return false;
  396. nbuf = qdf_nbuf_unshare(nbuf);
  397. if (!nbuf) {
  398. DP_STATS_INC_PKT(ta_peer,
  399. rx.intra_bss.fail,
  400. 1,
  401. len);
  402. /* return true even though the pkt is
  403. * not forwarded. Basically skb_unshare
  404. * failed and we want to continue with
  405. * next nbuf.
  406. */
  407. tid_stats->fail_cnt[INTRABSS_DROP]++;
  408. return true;
  409. }
  410. }
  411. if (!dp_tx_send((struct cdp_soc_t *)soc,
  412. ta_peer->vdev->vdev_id, nbuf)) {
  413. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  414. len);
  415. return true;
  416. } else {
  417. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  418. len);
  419. tid_stats->fail_cnt[INTRABSS_DROP]++;
  420. return false;
  421. }
  422. }
  423. }
  424. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  425. * source, then clone the pkt and send the cloned pkt for
  426. * intra BSS forwarding and original pkt up the network stack
  427. * Note: how do we handle multicast pkts. do we forward
  428. * all multicast pkts as is or let a higher layer module
  429. * like igmpsnoop decide whether to forward or not with
  430. * Mcast enhancement.
  431. */
  432. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  433. !ta_peer->bss_peer))) {
  434. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  435. goto end;
  436. nbuf_copy = qdf_nbuf_copy(nbuf);
  437. if (!nbuf_copy)
  438. goto end;
  439. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  440. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  441. /* Set cb->ftype to intrabss FWD */
  442. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  443. if (dp_tx_send((struct cdp_soc_t *)soc,
  444. ta_peer->vdev->vdev_id, nbuf_copy)) {
  445. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  446. tid_stats->fail_cnt[INTRABSS_DROP]++;
  447. qdf_nbuf_free(nbuf_copy);
  448. } else {
  449. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  450. tid_stats->intrabss_cnt++;
  451. }
  452. }
  453. end:
  454. /* return false as we have to still send the original pkt
  455. * up the stack
  456. */
  457. return false;
  458. }
  459. #ifdef MESH_MODE_SUPPORT
  460. /**
  461. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  462. *
  463. * @vdev: DP Virtual device handle
  464. * @nbuf: Buffer pointer
  465. * @rx_tlv_hdr: start of rx tlv header
  466. * @peer: pointer to peer
  467. *
  468. * This function allocated memory for mesh receive stats and fill the
  469. * required stats. Stores the memory address in skb cb.
  470. *
  471. * Return: void
  472. */
  473. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  474. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  475. {
  476. struct mesh_recv_hdr_s *rx_info = NULL;
  477. uint32_t pkt_type;
  478. uint32_t nss;
  479. uint32_t rate_mcs;
  480. uint32_t bw;
  481. uint8_t primary_chan_num;
  482. uint32_t center_chan_freq;
  483. struct dp_soc *soc;
  484. /* fill recv mesh stats */
  485. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  486. /* upper layers are resposible to free this memory */
  487. if (!rx_info) {
  488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  489. "Memory allocation failed for mesh rx stats");
  490. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  491. return;
  492. }
  493. rx_info->rs_flags = MESH_RXHDR_VER1;
  494. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  495. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  496. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  497. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  498. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  499. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  500. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  501. if (vdev->osif_get_key)
  502. vdev->osif_get_key(vdev->osif_vdev,
  503. &rx_info->rs_decryptkey[0],
  504. &peer->mac_addr.raw[0],
  505. rx_info->rs_keyix);
  506. }
  507. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  508. soc = vdev->pdev->soc;
  509. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  510. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  511. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  512. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  513. soc->ctrl_psoc,
  514. vdev->pdev->pdev_id,
  515. center_chan_freq);
  516. }
  517. rx_info->rs_channel = primary_chan_num;
  518. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  519. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  520. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  521. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  522. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  523. (bw << 24);
  524. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  525. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  526. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  527. rx_info->rs_flags,
  528. rx_info->rs_rssi,
  529. rx_info->rs_channel,
  530. rx_info->rs_ratephy1,
  531. rx_info->rs_keyix);
  532. }
  533. /**
  534. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  535. *
  536. * @vdev: DP Virtual device handle
  537. * @nbuf: Buffer pointer
  538. * @rx_tlv_hdr: start of rx tlv header
  539. *
  540. * This checks if the received packet is matching any filter out
  541. * catogery and and drop the packet if it matches.
  542. *
  543. * Return: status(0 indicates drop, 1 indicate to no drop)
  544. */
  545. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  546. uint8_t *rx_tlv_hdr)
  547. {
  548. union dp_align_mac_addr mac_addr;
  549. struct dp_soc *soc = vdev->pdev->soc;
  550. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  551. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  552. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  553. rx_tlv_hdr))
  554. return QDF_STATUS_SUCCESS;
  555. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  556. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  557. rx_tlv_hdr))
  558. return QDF_STATUS_SUCCESS;
  559. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  560. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  561. rx_tlv_hdr) &&
  562. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  563. rx_tlv_hdr))
  564. return QDF_STATUS_SUCCESS;
  565. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  566. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  567. rx_tlv_hdr,
  568. &mac_addr.raw[0]))
  569. return QDF_STATUS_E_FAILURE;
  570. if (!qdf_mem_cmp(&mac_addr.raw[0],
  571. &vdev->mac_addr.raw[0],
  572. QDF_MAC_ADDR_SIZE))
  573. return QDF_STATUS_SUCCESS;
  574. }
  575. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  576. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  577. rx_tlv_hdr,
  578. &mac_addr.raw[0]))
  579. return QDF_STATUS_E_FAILURE;
  580. if (!qdf_mem_cmp(&mac_addr.raw[0],
  581. &vdev->mac_addr.raw[0],
  582. QDF_MAC_ADDR_SIZE))
  583. return QDF_STATUS_SUCCESS;
  584. }
  585. }
  586. return QDF_STATUS_E_FAILURE;
  587. }
  588. #else
  589. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  590. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  591. {
  592. }
  593. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  594. uint8_t *rx_tlv_hdr)
  595. {
  596. return QDF_STATUS_E_FAILURE;
  597. }
  598. #endif
  599. #ifdef FEATURE_NAC_RSSI
  600. /**
  601. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  602. * clients
  603. * @pdev: DP pdev handle
  604. * @rx_pkt_hdr: Rx packet Header
  605. *
  606. * return: dp_vdev*
  607. */
  608. static
  609. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  610. uint8_t *rx_pkt_hdr)
  611. {
  612. struct ieee80211_frame *wh;
  613. struct dp_neighbour_peer *peer = NULL;
  614. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  615. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  616. return NULL;
  617. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  618. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  619. neighbour_peer_list_elem) {
  620. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  621. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  622. QDF_TRACE(
  623. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  624. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  625. peer->neighbour_peers_macaddr.raw[0],
  626. peer->neighbour_peers_macaddr.raw[1],
  627. peer->neighbour_peers_macaddr.raw[2],
  628. peer->neighbour_peers_macaddr.raw[3],
  629. peer->neighbour_peers_macaddr.raw[4],
  630. peer->neighbour_peers_macaddr.raw[5]);
  631. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  632. return pdev->monitor_vdev;
  633. }
  634. }
  635. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  636. return NULL;
  637. }
  638. /**
  639. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  640. * @soc: DP SOC handle
  641. * @mpdu: mpdu for which peer is invalid
  642. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  643. * pool_id has same mapping)
  644. *
  645. * return: integer type
  646. */
  647. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  648. uint8_t mac_id)
  649. {
  650. struct dp_invalid_peer_msg msg;
  651. struct dp_vdev *vdev = NULL;
  652. struct dp_pdev *pdev = NULL;
  653. struct ieee80211_frame *wh;
  654. qdf_nbuf_t curr_nbuf, next_nbuf;
  655. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  656. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  657. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  658. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  659. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  660. "Drop decapped frames");
  661. goto free;
  662. }
  663. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  664. if (!DP_FRAME_IS_DATA(wh)) {
  665. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  666. "NAWDS valid only for data frames");
  667. goto free;
  668. }
  669. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  670. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  671. "Invalid nbuf length");
  672. goto free;
  673. }
  674. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  675. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  676. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  677. "PDEV %s", !pdev ? "not found" : "down");
  678. goto free;
  679. }
  680. if (pdev->filter_neighbour_peers) {
  681. /* Next Hop scenario not yet handle */
  682. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  683. if (vdev) {
  684. dp_rx_mon_deliver(soc, pdev->pdev_id,
  685. pdev->invalid_peer_head_msdu,
  686. pdev->invalid_peer_tail_msdu);
  687. pdev->invalid_peer_head_msdu = NULL;
  688. pdev->invalid_peer_tail_msdu = NULL;
  689. return 0;
  690. }
  691. }
  692. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  693. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  694. QDF_MAC_ADDR_SIZE) == 0) {
  695. goto out;
  696. }
  697. }
  698. if (!vdev) {
  699. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  700. "VDEV not found");
  701. goto free;
  702. }
  703. out:
  704. msg.wh = wh;
  705. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  706. msg.nbuf = mpdu;
  707. msg.vdev_id = vdev->vdev_id;
  708. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  709. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  710. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  711. pdev->pdev_id, &msg);
  712. free:
  713. /* Drop and free packet */
  714. curr_nbuf = mpdu;
  715. while (curr_nbuf) {
  716. next_nbuf = qdf_nbuf_next(curr_nbuf);
  717. qdf_nbuf_free(curr_nbuf);
  718. curr_nbuf = next_nbuf;
  719. }
  720. return 0;
  721. }
  722. /**
  723. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  724. * @soc: DP SOC handle
  725. * @mpdu: mpdu for which peer is invalid
  726. * @mpdu_done: if an mpdu is completed
  727. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  728. * pool_id has same mapping)
  729. *
  730. * return: integer type
  731. */
  732. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  733. qdf_nbuf_t mpdu, bool mpdu_done,
  734. uint8_t mac_id)
  735. {
  736. /* Only trigger the process when mpdu is completed */
  737. if (mpdu_done)
  738. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  739. }
  740. #else
  741. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  742. uint8_t mac_id)
  743. {
  744. qdf_nbuf_t curr_nbuf, next_nbuf;
  745. struct dp_pdev *pdev;
  746. struct dp_vdev *vdev = NULL;
  747. struct ieee80211_frame *wh;
  748. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  749. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  750. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  751. if (!DP_FRAME_IS_DATA(wh)) {
  752. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  753. "only for data frames");
  754. goto free;
  755. }
  756. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  757. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  758. "Invalid nbuf length");
  759. goto free;
  760. }
  761. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  762. if (!pdev) {
  763. QDF_TRACE(QDF_MODULE_ID_DP,
  764. QDF_TRACE_LEVEL_ERROR,
  765. "PDEV not found");
  766. goto free;
  767. }
  768. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  769. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  770. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  771. QDF_MAC_ADDR_SIZE) == 0) {
  772. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  773. goto out;
  774. }
  775. }
  776. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  777. if (!vdev) {
  778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  779. "VDEV not found");
  780. goto free;
  781. }
  782. out:
  783. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  784. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  785. free:
  786. /* reset the head and tail pointers */
  787. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  788. if (pdev) {
  789. pdev->invalid_peer_head_msdu = NULL;
  790. pdev->invalid_peer_tail_msdu = NULL;
  791. }
  792. /* Drop and free packet */
  793. curr_nbuf = mpdu;
  794. while (curr_nbuf) {
  795. next_nbuf = qdf_nbuf_next(curr_nbuf);
  796. qdf_nbuf_free(curr_nbuf);
  797. curr_nbuf = next_nbuf;
  798. }
  799. /* Reset the head and tail pointers */
  800. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  801. if (pdev) {
  802. pdev->invalid_peer_head_msdu = NULL;
  803. pdev->invalid_peer_tail_msdu = NULL;
  804. }
  805. return 0;
  806. }
  807. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  808. qdf_nbuf_t mpdu, bool mpdu_done,
  809. uint8_t mac_id)
  810. {
  811. /* Process the nbuf */
  812. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  813. }
  814. #endif
  815. #ifdef RECEIVE_OFFLOAD
  816. /**
  817. * dp_rx_print_offload_info() - Print offload info from RX TLV
  818. * @soc: dp soc handle
  819. * @rx_tlv: RX TLV for which offload information is to be printed
  820. *
  821. * Return: None
  822. */
  823. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  824. {
  825. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  826. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  827. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  828. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  829. rx_tlv));
  830. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  831. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  832. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  833. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  834. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  835. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  836. dp_verbose_debug("---------------------------------------------------------");
  837. }
  838. /**
  839. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  840. * @soc: DP SOC handle
  841. * @rx_tlv: RX TLV received for the msdu
  842. * @msdu: msdu for which GRO info needs to be filled
  843. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  844. *
  845. * Return: None
  846. */
  847. static
  848. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  849. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  850. {
  851. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  852. return;
  853. /* Filling up RX offload info only for TCP packets */
  854. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  855. return;
  856. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  857. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  858. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  859. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  860. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  861. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  862. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  863. rx_tlv);
  864. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  865. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  866. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  867. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  868. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  869. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  870. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  871. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  872. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  873. HAL_RX_TLV_GET_IPV6(rx_tlv);
  874. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  875. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  876. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  877. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  878. dp_rx_print_offload_info(soc, rx_tlv);
  879. }
  880. #else
  881. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  882. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  883. {
  884. }
  885. #endif /* RECEIVE_OFFLOAD */
  886. /**
  887. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  888. *
  889. * @nbuf: pointer to msdu.
  890. * @mpdu_len: mpdu length
  891. *
  892. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  893. */
  894. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  895. {
  896. bool last_nbuf;
  897. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  898. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  899. last_nbuf = false;
  900. } else {
  901. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  902. last_nbuf = true;
  903. }
  904. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  905. return last_nbuf;
  906. }
  907. /**
  908. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  909. * multiple nbufs.
  910. * @nbuf: pointer to the first msdu of an amsdu.
  911. *
  912. * This function implements the creation of RX frag_list for cases
  913. * where an MSDU is spread across multiple nbufs.
  914. *
  915. * Return: returns the head nbuf which contains complete frag_list.
  916. */
  917. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf)
  918. {
  919. qdf_nbuf_t parent, frag_list, next = NULL;
  920. uint16_t frag_list_len = 0;
  921. uint16_t mpdu_len;
  922. bool last_nbuf;
  923. /*
  924. * Use msdu len got from REO entry descriptor instead since
  925. * there is case the RX PKT TLV is corrupted while msdu_len
  926. * from REO descriptor is right for non-raw RX scatter msdu.
  927. */
  928. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  929. /*
  930. * this is a case where the complete msdu fits in one single nbuf.
  931. * in this case HW sets both start and end bit and we only need to
  932. * reset these bits for RAW mode simulator to decap the pkt
  933. */
  934. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  935. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  936. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  937. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  938. return nbuf;
  939. }
  940. /*
  941. * This is a case where we have multiple msdus (A-MSDU) spread across
  942. * multiple nbufs. here we create a fraglist out of these nbufs.
  943. *
  944. * the moment we encounter a nbuf with continuation bit set we
  945. * know for sure we have an MSDU which is spread across multiple
  946. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  947. */
  948. parent = nbuf;
  949. frag_list = nbuf->next;
  950. nbuf = nbuf->next;
  951. /*
  952. * set the start bit in the first nbuf we encounter with continuation
  953. * bit set. This has the proper mpdu length set as it is the first
  954. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  955. * nbufs will form the frag_list of the parent nbuf.
  956. */
  957. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  958. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  959. /*
  960. * this is where we set the length of the fragments which are
  961. * associated to the parent nbuf. We iterate through the frag_list
  962. * till we hit the last_nbuf of the list.
  963. */
  964. do {
  965. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  966. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  967. frag_list_len += qdf_nbuf_len(nbuf);
  968. if (last_nbuf) {
  969. next = nbuf->next;
  970. nbuf->next = NULL;
  971. break;
  972. }
  973. nbuf = nbuf->next;
  974. } while (!last_nbuf);
  975. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  976. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  977. parent->next = next;
  978. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  979. return parent;
  980. }
  981. /**
  982. * dp_rx_compute_delay() - Compute and fill in all timestamps
  983. * to pass in correct fields
  984. *
  985. * @vdev: pdev handle
  986. * @tx_desc: tx descriptor
  987. * @tid: tid value
  988. * Return: none
  989. */
  990. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  991. {
  992. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  993. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  994. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  995. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  996. uint32_t interframe_delay =
  997. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  998. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  999. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1000. /*
  1001. * Update interframe delay stats calculated at deliver_data_ol point.
  1002. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1003. * interframe delay will not be calculate correctly for 1st frame.
  1004. * On the other side, this will help in avoiding extra per packet check
  1005. * of vdev->prev_rx_deliver_tstamp.
  1006. */
  1007. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1008. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1009. vdev->prev_rx_deliver_tstamp = current_ts;
  1010. }
  1011. /**
  1012. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1013. * @pdev: dp pdev reference
  1014. * @buf_list: buffer list to be dropepd
  1015. *
  1016. * Return: int (number of bufs dropped)
  1017. */
  1018. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1019. qdf_nbuf_t buf_list)
  1020. {
  1021. struct cdp_tid_rx_stats *stats = NULL;
  1022. uint8_t tid = 0, ring_id = 0;
  1023. int num_dropped = 0;
  1024. qdf_nbuf_t buf, next_buf;
  1025. buf = buf_list;
  1026. while (buf) {
  1027. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1028. next_buf = qdf_nbuf_queue_next(buf);
  1029. tid = qdf_nbuf_get_tid_val(buf);
  1030. if (qdf_likely(pdev)) {
  1031. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1032. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1033. stats->delivered_to_stack--;
  1034. }
  1035. qdf_nbuf_free(buf);
  1036. buf = next_buf;
  1037. num_dropped++;
  1038. }
  1039. return num_dropped;
  1040. }
  1041. #ifdef PEER_CACHE_RX_PKTS
  1042. /**
  1043. * dp_rx_flush_rx_cached() - flush cached rx frames
  1044. * @peer: peer
  1045. * @drop: flag to drop frames or forward to net stack
  1046. *
  1047. * Return: None
  1048. */
  1049. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1050. {
  1051. struct dp_peer_cached_bufq *bufqi;
  1052. struct dp_rx_cached_buf *cache_buf = NULL;
  1053. ol_txrx_rx_fp data_rx = NULL;
  1054. int num_buff_elem;
  1055. QDF_STATUS status;
  1056. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1057. qdf_atomic_dec(&peer->flush_in_progress);
  1058. return;
  1059. }
  1060. qdf_spin_lock_bh(&peer->peer_info_lock);
  1061. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1062. data_rx = peer->vdev->osif_rx;
  1063. else
  1064. drop = true;
  1065. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1066. bufqi = &peer->bufq_info;
  1067. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1068. qdf_list_remove_front(&bufqi->cached_bufq,
  1069. (qdf_list_node_t **)&cache_buf);
  1070. while (cache_buf) {
  1071. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1072. cache_buf->buf);
  1073. bufqi->entries -= num_buff_elem;
  1074. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1075. if (drop) {
  1076. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1077. cache_buf->buf);
  1078. } else {
  1079. /* Flush the cached frames to OSIF DEV */
  1080. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1081. if (status != QDF_STATUS_SUCCESS)
  1082. bufqi->dropped = dp_rx_drop_nbuf_list(
  1083. peer->vdev->pdev,
  1084. cache_buf->buf);
  1085. }
  1086. qdf_mem_free(cache_buf);
  1087. cache_buf = NULL;
  1088. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1089. qdf_list_remove_front(&bufqi->cached_bufq,
  1090. (qdf_list_node_t **)&cache_buf);
  1091. }
  1092. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1093. qdf_atomic_dec(&peer->flush_in_progress);
  1094. }
  1095. /**
  1096. * dp_rx_enqueue_rx() - cache rx frames
  1097. * @peer: peer
  1098. * @rx_buf_list: cache buffer list
  1099. *
  1100. * Return: None
  1101. */
  1102. static QDF_STATUS
  1103. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1104. {
  1105. struct dp_rx_cached_buf *cache_buf;
  1106. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1107. int num_buff_elem;
  1108. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1109. bufqi->dropped);
  1110. if (!peer->valid) {
  1111. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1112. rx_buf_list);
  1113. return QDF_STATUS_E_INVAL;
  1114. }
  1115. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1116. if (bufqi->entries >= bufqi->thresh) {
  1117. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1118. rx_buf_list);
  1119. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1120. return QDF_STATUS_E_RESOURCES;
  1121. }
  1122. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1123. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1124. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1125. if (!cache_buf) {
  1126. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1127. "Failed to allocate buf to cache rx frames");
  1128. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1129. rx_buf_list);
  1130. return QDF_STATUS_E_NOMEM;
  1131. }
  1132. cache_buf->buf = rx_buf_list;
  1133. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1134. qdf_list_insert_back(&bufqi->cached_bufq,
  1135. &cache_buf->node);
  1136. bufqi->entries += num_buff_elem;
  1137. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1138. return QDF_STATUS_SUCCESS;
  1139. }
  1140. static inline
  1141. bool dp_rx_is_peer_cache_bufq_supported(void)
  1142. {
  1143. return true;
  1144. }
  1145. #else
  1146. static inline
  1147. bool dp_rx_is_peer_cache_bufq_supported(void)
  1148. {
  1149. return false;
  1150. }
  1151. static inline QDF_STATUS
  1152. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1153. {
  1154. return QDF_STATUS_SUCCESS;
  1155. }
  1156. #endif
  1157. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1158. struct dp_vdev *vdev,
  1159. struct dp_peer *peer,
  1160. qdf_nbuf_t nbuf_head,
  1161. qdf_nbuf_t nbuf_tail)
  1162. {
  1163. int num_nbuf = 0;
  1164. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1165. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1166. /*
  1167. * This is a special case where vdev is invalid,
  1168. * so we cannot know the pdev to which this packet
  1169. * belonged. Hence we update the soc rx error stats.
  1170. */
  1171. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1172. return;
  1173. }
  1174. /*
  1175. * highly unlikely to have a vdev without a registered rx
  1176. * callback function. if so let us free the nbuf_list.
  1177. */
  1178. if (qdf_unlikely(!vdev->osif_rx)) {
  1179. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1180. dp_rx_enqueue_rx(peer, nbuf_head);
  1181. } else {
  1182. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1183. nbuf_head);
  1184. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1185. }
  1186. return;
  1187. }
  1188. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1189. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1190. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1191. &nbuf_tail, peer->mac_addr.raw);
  1192. }
  1193. /* Function pointer initialized only when FISA is enabled */
  1194. if (vdev->osif_fisa_rx)
  1195. /* on failure send it via regular path */
  1196. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1197. else
  1198. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1199. }
  1200. /**
  1201. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1202. * @nbuf: pointer to the first msdu of an amsdu.
  1203. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1204. *
  1205. * The ipsumed field of the skb is set based on whether HW validated the
  1206. * IP/TCP/UDP checksum.
  1207. *
  1208. * Return: void
  1209. */
  1210. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1211. qdf_nbuf_t nbuf,
  1212. uint8_t *rx_tlv_hdr)
  1213. {
  1214. qdf_nbuf_rx_cksum_t cksum = {0};
  1215. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1216. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1217. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1218. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1219. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1220. } else {
  1221. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1222. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1223. }
  1224. }
  1225. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1226. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1227. { \
  1228. qdf_nbuf_t nbuf_local; \
  1229. struct dp_peer *peer_local; \
  1230. struct dp_vdev *vdev_local = vdev_hdl; \
  1231. do { \
  1232. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1233. break; \
  1234. nbuf_local = nbuf; \
  1235. peer_local = peer; \
  1236. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1237. break; \
  1238. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1239. break; \
  1240. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1241. (nbuf_local), \
  1242. (peer_local), 0, 1); \
  1243. } while (0); \
  1244. }
  1245. #else
  1246. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1247. #endif
  1248. /**
  1249. * dp_rx_msdu_stats_update() - update per msdu stats.
  1250. * @soc: core txrx main context
  1251. * @nbuf: pointer to the first msdu of an amsdu.
  1252. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1253. * @peer: pointer to the peer object.
  1254. * @ring_id: reo dest ring number on which pkt is reaped.
  1255. * @tid_stats: per tid rx stats.
  1256. *
  1257. * update all the per msdu stats for that nbuf.
  1258. * Return: void
  1259. */
  1260. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1261. qdf_nbuf_t nbuf,
  1262. uint8_t *rx_tlv_hdr,
  1263. struct dp_peer *peer,
  1264. uint8_t ring_id,
  1265. struct cdp_tid_rx_stats *tid_stats)
  1266. {
  1267. bool is_ampdu, is_not_amsdu;
  1268. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1269. struct dp_vdev *vdev = peer->vdev;
  1270. qdf_ether_header_t *eh;
  1271. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1272. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1273. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1274. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1275. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1276. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1277. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1278. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1279. tid_stats->msdu_cnt++;
  1280. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1281. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1282. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1283. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1284. tid_stats->mcast_msdu_cnt++;
  1285. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1286. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1287. tid_stats->bcast_msdu_cnt++;
  1288. }
  1289. }
  1290. /*
  1291. * currently we can return from here as we have similar stats
  1292. * updated at per ppdu level instead of msdu level
  1293. */
  1294. if (!soc->process_rx_status)
  1295. return;
  1296. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1297. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1298. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1299. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1300. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1301. tid = qdf_nbuf_get_tid_val(nbuf);
  1302. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1303. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1304. rx_tlv_hdr);
  1305. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1306. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1307. DP_STATS_INC(peer, rx.bw[bw], 1);
  1308. /*
  1309. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1310. * then increase index [nss - 1] in array counter.
  1311. */
  1312. if (nss > 0 && (pkt_type == DOT11_N ||
  1313. pkt_type == DOT11_AC ||
  1314. pkt_type == DOT11_AX))
  1315. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1316. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1317. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1318. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1319. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1320. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1321. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1322. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1323. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1324. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1325. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1326. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1327. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1328. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1329. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1330. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1331. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1332. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1333. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1334. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1335. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1336. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1337. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1338. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1339. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1340. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1341. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1342. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1343. if ((soc->process_rx_status) &&
  1344. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1345. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1346. if (!vdev->pdev)
  1347. return;
  1348. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1349. &peer->stats, peer->peer_ids[0],
  1350. UPDATE_PEER_STATS,
  1351. vdev->pdev->pdev_id);
  1352. #endif
  1353. }
  1354. }
  1355. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1356. uint8_t *rx_tlv_hdr,
  1357. qdf_nbuf_t nbuf,
  1358. struct hal_rx_msdu_metadata msdu_info)
  1359. {
  1360. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1361. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1362. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1363. qdf_nbuf_is_da_valid(nbuf) &&
  1364. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1365. return false;
  1366. return true;
  1367. }
  1368. #ifndef WDS_VENDOR_EXTENSION
  1369. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1370. struct dp_vdev *vdev,
  1371. struct dp_peer *peer)
  1372. {
  1373. return 1;
  1374. }
  1375. #endif
  1376. #ifdef RX_DESC_DEBUG_CHECK
  1377. /**
  1378. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1379. * corruption
  1380. *
  1381. * @ring_desc: REO ring descriptor
  1382. * @rx_desc: Rx descriptor
  1383. *
  1384. * Return: NONE
  1385. */
  1386. static inline
  1387. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1388. struct dp_rx_desc *rx_desc)
  1389. {
  1390. struct hal_buf_info hbi;
  1391. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1392. /* Sanity check for possible buffer paddr corruption */
  1393. qdf_assert_always((&hbi)->paddr ==
  1394. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1395. }
  1396. #else
  1397. static inline
  1398. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1399. struct dp_rx_desc *rx_desc)
  1400. {
  1401. }
  1402. #endif
  1403. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1404. static inline
  1405. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1406. {
  1407. bool limit_hit = false;
  1408. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1409. limit_hit =
  1410. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1411. if (limit_hit)
  1412. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1413. return limit_hit;
  1414. }
  1415. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1416. {
  1417. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1418. }
  1419. #else
  1420. static inline
  1421. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1422. {
  1423. return false;
  1424. }
  1425. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1426. {
  1427. return false;
  1428. }
  1429. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1430. /**
  1431. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1432. *
  1433. * @nbuf: pkt skb pointer
  1434. *
  1435. * Return: true if matched, false if not
  1436. */
  1437. static inline
  1438. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1439. {
  1440. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1441. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1442. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1443. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1444. return true;
  1445. else
  1446. return false;
  1447. }
  1448. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1449. /**
  1450. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1451. * no corresbonding peer found
  1452. * @soc: core txrx main context
  1453. * @nbuf: pkt skb pointer
  1454. *
  1455. * This function will try to deliver some RX special frames to stack
  1456. * even there is no peer matched found. for instance, LFR case, some
  1457. * eapol data will be sent to host before peer_map done.
  1458. *
  1459. * Return: None
  1460. */
  1461. static inline
  1462. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1463. {
  1464. uint16_t peer_id;
  1465. uint8_t vdev_id;
  1466. struct dp_vdev *vdev;
  1467. uint32_t l2_hdr_offset = 0;
  1468. uint16_t msdu_len = 0;
  1469. uint32_t pkt_len = 0;
  1470. uint8_t *rx_tlv_hdr;
  1471. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1472. if (peer_id > soc->max_peers)
  1473. goto deliver_fail;
  1474. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1475. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1476. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1477. goto deliver_fail;
  1478. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1479. l2_hdr_offset =
  1480. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1481. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1482. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1483. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1484. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1485. } else {
  1486. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1487. qdf_nbuf_pull_head(nbuf,
  1488. RX_PKT_TLVS_LEN +
  1489. l2_hdr_offset);
  1490. }
  1491. /* only allow special frames */
  1492. if (!dp_is_special_data(nbuf))
  1493. goto deliver_fail;
  1494. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1495. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1496. return;
  1497. deliver_fail:
  1498. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1499. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1500. qdf_nbuf_free(nbuf);
  1501. }
  1502. #else
  1503. static inline
  1504. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1505. {
  1506. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1507. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1508. qdf_nbuf_free(nbuf);
  1509. }
  1510. #endif
  1511. /**
  1512. * dp_rx_srng_get_num_pending() - get number of pending entries
  1513. * @hal_soc: hal soc opaque pointer
  1514. * @hal_ring: opaque pointer to the HAL Rx Ring
  1515. * @num_entries: number of entries in the hal_ring.
  1516. * @near_full: pointer to a boolean. This is set if ring is near full.
  1517. *
  1518. * The function returns the number of entries in a destination ring which are
  1519. * yet to be reaped. The function also checks if the ring is near full.
  1520. * If more than half of the ring needs to be reaped, the ring is considered
  1521. * approaching full.
  1522. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1523. * entries. It should not be called within a SRNG lock. HW pointer value is
  1524. * synced into cached_hp.
  1525. *
  1526. * Return: Number of pending entries if any
  1527. */
  1528. static
  1529. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1530. hal_ring_handle_t hal_ring_hdl,
  1531. uint32_t num_entries,
  1532. bool *near_full)
  1533. {
  1534. uint32_t num_pending = 0;
  1535. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1536. hal_ring_hdl,
  1537. true);
  1538. if (num_entries && (num_pending >= num_entries >> 1))
  1539. *near_full = true;
  1540. else
  1541. *near_full = false;
  1542. return num_pending;
  1543. }
  1544. #ifdef WLAN_SUPPORT_RX_FISA
  1545. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1546. {
  1547. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1548. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1549. }
  1550. #else
  1551. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1552. {
  1553. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1554. }
  1555. #endif
  1556. /**
  1557. * dp_rx_process() - Brain of the Rx processing functionality
  1558. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1559. * @int_ctx: per interrupt context
  1560. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1561. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1562. * @quota: No. of units (packets) that can be serviced in one shot.
  1563. *
  1564. * This function implements the core of Rx functionality. This is
  1565. * expected to handle only non-error frames.
  1566. *
  1567. * Return: uint32_t: No. of elements processed
  1568. */
  1569. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1570. uint8_t reo_ring_num, uint32_t quota)
  1571. {
  1572. hal_ring_desc_t ring_desc;
  1573. hal_soc_handle_t hal_soc;
  1574. struct dp_rx_desc *rx_desc = NULL;
  1575. qdf_nbuf_t nbuf, next;
  1576. bool near_full;
  1577. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1578. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1579. uint32_t num_pending;
  1580. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1581. uint16_t msdu_len = 0;
  1582. uint16_t peer_id;
  1583. uint8_t vdev_id;
  1584. struct dp_peer *peer;
  1585. struct dp_vdev *vdev;
  1586. uint32_t pkt_len = 0;
  1587. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1588. struct hal_rx_msdu_desc_info msdu_desc_info;
  1589. enum hal_reo_error_status error;
  1590. uint32_t peer_mdata;
  1591. uint8_t *rx_tlv_hdr;
  1592. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1593. uint8_t mac_id = 0;
  1594. struct dp_pdev *rx_pdev;
  1595. struct dp_srng *dp_rxdma_srng;
  1596. struct rx_desc_pool *rx_desc_pool;
  1597. struct dp_soc *soc = int_ctx->soc;
  1598. uint8_t ring_id = 0;
  1599. uint8_t core_id = 0;
  1600. struct cdp_tid_rx_stats *tid_stats;
  1601. qdf_nbuf_t nbuf_head;
  1602. qdf_nbuf_t nbuf_tail;
  1603. qdf_nbuf_t deliver_list_head;
  1604. qdf_nbuf_t deliver_list_tail;
  1605. uint32_t num_rx_bufs_reaped = 0;
  1606. uint32_t intr_id;
  1607. struct hif_opaque_softc *scn;
  1608. int32_t tid = 0;
  1609. bool is_prev_msdu_last = true;
  1610. uint32_t num_entries_avail = 0;
  1611. uint32_t rx_ol_pkt_cnt = 0;
  1612. uint32_t num_entries = 0;
  1613. struct hal_rx_msdu_metadata msdu_metadata;
  1614. DP_HIST_INIT();
  1615. qdf_assert_always(soc && hal_ring_hdl);
  1616. hal_soc = soc->hal_soc;
  1617. qdf_assert_always(hal_soc);
  1618. scn = soc->hif_handle;
  1619. hif_pm_runtime_mark_dp_rx_busy(scn);
  1620. intr_id = int_ctx->dp_intr_id;
  1621. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1622. more_data:
  1623. /* reset local variables here to be re-used in the function */
  1624. nbuf_head = NULL;
  1625. nbuf_tail = NULL;
  1626. deliver_list_head = NULL;
  1627. deliver_list_tail = NULL;
  1628. peer = NULL;
  1629. vdev = NULL;
  1630. num_rx_bufs_reaped = 0;
  1631. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1632. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1633. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1634. qdf_mem_zero(head, sizeof(head));
  1635. qdf_mem_zero(tail, sizeof(tail));
  1636. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1637. /*
  1638. * Need API to convert from hal_ring pointer to
  1639. * Ring Type / Ring Id combo
  1640. */
  1641. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1642. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1643. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1644. goto done;
  1645. }
  1646. /*
  1647. * start reaping the buffers from reo ring and queue
  1648. * them in per vdev queue.
  1649. * Process the received pkts in a different per vdev loop.
  1650. */
  1651. while (qdf_likely(quota &&
  1652. (ring_desc = hal_srng_dst_peek(hal_soc,
  1653. hal_ring_hdl)))) {
  1654. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1655. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1656. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1657. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1658. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1659. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1660. /* Don't know how to deal with this -- assert */
  1661. qdf_assert(0);
  1662. }
  1663. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1664. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1665. qdf_assert(rx_desc);
  1666. /*
  1667. * this is a unlikely scenario where the host is reaping
  1668. * a descriptor which it already reaped just a while ago
  1669. * but is yet to replenish it back to HW.
  1670. * In this case host will dump the last 128 descriptors
  1671. * including the software descriptor rx_desc and assert.
  1672. */
  1673. if (qdf_unlikely(!rx_desc->in_use)) {
  1674. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1675. dp_info_rl("Reaping rx_desc not in use!");
  1676. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1677. ring_desc, rx_desc);
  1678. /* ignore duplicate RX desc and continue to process */
  1679. /* Pop out the descriptor */
  1680. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1681. continue;
  1682. }
  1683. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1684. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1685. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1686. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1687. ring_desc, rx_desc);
  1688. }
  1689. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1690. /* TODO */
  1691. /*
  1692. * Need a separate API for unmapping based on
  1693. * phyiscal address
  1694. */
  1695. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1696. QDF_DMA_FROM_DEVICE);
  1697. rx_desc->unmapped = 1;
  1698. core_id = smp_processor_id();
  1699. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1700. /* Get MPDU DESC info */
  1701. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1702. /* Get MSDU DESC info */
  1703. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1704. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1705. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1706. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  1707. HAL_MSDU_F_MSDU_CONTINUATION)) {
  1708. /* previous msdu has end bit set, so current one is
  1709. * the new MPDU
  1710. */
  1711. if (is_prev_msdu_last) {
  1712. /* Get number of entries available in HW ring */
  1713. num_entries_avail =
  1714. hal_srng_dst_num_valid(hal_soc,
  1715. hal_ring_hdl, 1);
  1716. /* For new MPDU check if we can read complete
  1717. * MPDU by comparing the number of buffers
  1718. * available and number of buffers needed to
  1719. * reap this MPDU
  1720. */
  1721. if (((msdu_desc_info.msdu_len /
  1722. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  1723. 1)) > num_entries_avail) {
  1724. DP_STATS_INC(
  1725. soc,
  1726. rx.msdu_scatter_wait_break,
  1727. 1);
  1728. break;
  1729. }
  1730. is_prev_msdu_last = false;
  1731. }
  1732. }
  1733. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1734. HAL_MPDU_F_RAW_AMPDU))
  1735. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1736. if (!is_prev_msdu_last &&
  1737. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1738. is_prev_msdu_last = true;
  1739. /* Pop out the descriptor*/
  1740. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1741. rx_bufs_reaped[rx_desc->pool_id]++;
  1742. peer_mdata = mpdu_desc_info.peer_meta_data;
  1743. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1744. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1745. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  1746. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  1747. /*
  1748. * save msdu flags first, last and continuation msdu in
  1749. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1750. * length to nbuf->cb. This ensures the info required for
  1751. * per pkt processing is always in the same cache line.
  1752. * This helps in improving throughput for smaller pkt
  1753. * sizes.
  1754. */
  1755. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1756. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1757. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1758. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1759. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1760. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1761. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1762. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1763. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1764. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1765. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1766. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1767. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1768. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1769. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1770. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1771. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1772. /*
  1773. * if continuation bit is set then we have MSDU spread
  1774. * across multiple buffers, let us not decrement quota
  1775. * till we reap all buffers of that MSDU.
  1776. */
  1777. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1778. quota -= 1;
  1779. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1780. &tail[rx_desc->pool_id],
  1781. rx_desc);
  1782. num_rx_bufs_reaped++;
  1783. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1784. break;
  1785. }
  1786. done:
  1787. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1788. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1789. /*
  1790. * continue with next mac_id if no pkts were reaped
  1791. * from that pool
  1792. */
  1793. if (!rx_bufs_reaped[mac_id])
  1794. continue;
  1795. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1796. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1797. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1798. rx_desc_pool, rx_bufs_reaped[mac_id],
  1799. &head[mac_id], &tail[mac_id]);
  1800. }
  1801. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1802. /* Peer can be NULL is case of LFR */
  1803. if (qdf_likely(peer))
  1804. vdev = NULL;
  1805. /*
  1806. * BIG loop where each nbuf is dequeued from global queue,
  1807. * processed and queued back on a per vdev basis. These nbufs
  1808. * are sent to stack as and when we run out of nbufs
  1809. * or a new nbuf dequeued from global queue has a different
  1810. * vdev when compared to previous nbuf.
  1811. */
  1812. nbuf = nbuf_head;
  1813. while (nbuf) {
  1814. next = nbuf->next;
  1815. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1816. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1817. if (deliver_list_head && vdev && (vdev->vdev_id != vdev_id)) {
  1818. dp_rx_deliver_to_stack(soc, vdev, peer,
  1819. deliver_list_head,
  1820. deliver_list_tail);
  1821. deliver_list_head = NULL;
  1822. deliver_list_tail = NULL;
  1823. }
  1824. /* Get TID from struct cb->tid_val, save to tid */
  1825. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1826. tid = qdf_nbuf_get_tid_val(nbuf);
  1827. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1828. peer = dp_peer_find_by_id(soc, peer_id);
  1829. if (peer) {
  1830. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1831. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1832. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1833. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1834. QDF_NBUF_RX_PKT_DATA_TRACK;
  1835. }
  1836. rx_bufs_used++;
  1837. if (qdf_likely(peer)) {
  1838. vdev = peer->vdev;
  1839. } else {
  1840. nbuf->next = NULL;
  1841. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1842. nbuf = next;
  1843. continue;
  1844. }
  1845. if (qdf_unlikely(!vdev)) {
  1846. qdf_nbuf_free(nbuf);
  1847. nbuf = next;
  1848. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1849. dp_peer_unref_del_find_by_id(peer);
  1850. continue;
  1851. }
  1852. rx_pdev = vdev->pdev;
  1853. DP_RX_TID_SAVE(nbuf, tid);
  1854. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1855. qdf_nbuf_set_timestamp(nbuf);
  1856. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1857. tid_stats =
  1858. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1859. /*
  1860. * Check if DMA completed -- msdu_done is the last bit
  1861. * to be written
  1862. */
  1863. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  1864. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1865. dp_err("MSDU DONE failure");
  1866. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1867. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1868. QDF_TRACE_LEVEL_INFO);
  1869. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1870. qdf_nbuf_free(nbuf);
  1871. qdf_assert(0);
  1872. nbuf = next;
  1873. continue;
  1874. }
  1875. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1876. /*
  1877. * First IF condition:
  1878. * 802.11 Fragmented pkts are reinjected to REO
  1879. * HW block as SG pkts and for these pkts we only
  1880. * need to pull the RX TLVS header length.
  1881. * Second IF condition:
  1882. * The below condition happens when an MSDU is spread
  1883. * across multiple buffers. This can happen in two cases
  1884. * 1. The nbuf size is smaller then the received msdu.
  1885. * ex: we have set the nbuf size to 2048 during
  1886. * nbuf_alloc. but we received an msdu which is
  1887. * 2304 bytes in size then this msdu is spread
  1888. * across 2 nbufs.
  1889. *
  1890. * 2. AMSDUs when RAW mode is enabled.
  1891. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1892. * across 1st nbuf and 2nd nbuf and last MSDU is
  1893. * spread across 2nd nbuf and 3rd nbuf.
  1894. *
  1895. * for these scenarios let us create a skb frag_list and
  1896. * append these buffers till the last MSDU of the AMSDU
  1897. * Third condition:
  1898. * This is the most likely case, we receive 802.3 pkts
  1899. * decapsulated by HW, here we need to set the pkt length.
  1900. */
  1901. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  1902. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1903. bool is_mcbc, is_sa_vld, is_da_vld;
  1904. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1905. rx_tlv_hdr);
  1906. is_sa_vld =
  1907. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1908. rx_tlv_hdr);
  1909. is_da_vld =
  1910. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1911. rx_tlv_hdr);
  1912. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1913. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1914. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1915. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1916. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1917. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1918. nbuf = dp_rx_sg_create(nbuf);
  1919. next = nbuf->next;
  1920. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1921. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1922. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1923. } else {
  1924. qdf_nbuf_free(nbuf);
  1925. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  1926. dp_info_rl("scatter msdu len %d, dropped",
  1927. msdu_len);
  1928. nbuf = next;
  1929. dp_peer_unref_del_find_by_id(peer);
  1930. continue;
  1931. }
  1932. } else {
  1933. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1934. pkt_len = msdu_len +
  1935. msdu_metadata.l3_hdr_pad +
  1936. RX_PKT_TLVS_LEN;
  1937. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1938. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  1939. }
  1940. /*
  1941. * process frame for mulitpass phrase processing
  1942. */
  1943. if (qdf_unlikely(vdev->multipass_en)) {
  1944. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1945. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  1946. qdf_nbuf_free(nbuf);
  1947. nbuf = next;
  1948. dp_peer_unref_del_find_by_id(peer);
  1949. continue;
  1950. }
  1951. }
  1952. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1953. QDF_TRACE(QDF_MODULE_ID_DP,
  1954. QDF_TRACE_LEVEL_ERROR,
  1955. FL("Policy Check Drop pkt"));
  1956. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1957. /* Drop & free packet */
  1958. qdf_nbuf_free(nbuf);
  1959. /* Statistics */
  1960. nbuf = next;
  1961. dp_peer_unref_del_find_by_id(peer);
  1962. continue;
  1963. }
  1964. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1965. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1966. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  1967. rx_tlv_hdr) ==
  1968. false))) {
  1969. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1970. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1971. qdf_nbuf_free(nbuf);
  1972. nbuf = next;
  1973. dp_peer_unref_del_find_by_id(peer);
  1974. continue;
  1975. }
  1976. if (soc->process_rx_status)
  1977. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1978. /* Update the protocol tag in SKB based on CCE metadata */
  1979. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1980. reo_ring_num, false, true);
  1981. /* Update the flow tag in SKB based on FSE metadata */
  1982. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1983. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1984. ring_id, tid_stats);
  1985. if (qdf_unlikely(vdev->mesh_vdev)) {
  1986. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1987. == QDF_STATUS_SUCCESS) {
  1988. QDF_TRACE(QDF_MODULE_ID_DP,
  1989. QDF_TRACE_LEVEL_INFO_MED,
  1990. FL("mesh pkt filtered"));
  1991. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1992. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1993. 1);
  1994. qdf_nbuf_free(nbuf);
  1995. nbuf = next;
  1996. dp_peer_unref_del_find_by_id(peer);
  1997. continue;
  1998. }
  1999. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2000. }
  2001. if (qdf_likely(vdev->rx_decap_type ==
  2002. htt_cmn_pkt_type_ethernet) &&
  2003. qdf_likely(!vdev->mesh_vdev)) {
  2004. /* WDS Destination Address Learning */
  2005. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2006. /* Due to HW issue, sometimes we see that the sa_idx
  2007. * and da_idx are invalid with sa_valid and da_valid
  2008. * bits set
  2009. *
  2010. * in this case we also see that value of
  2011. * sa_sw_peer_id is set as 0
  2012. *
  2013. * Drop the packet if sa_idx and da_idx OOB or
  2014. * sa_sw_peerid is 0
  2015. */
  2016. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2017. msdu_metadata)) {
  2018. qdf_nbuf_free(nbuf);
  2019. nbuf = next;
  2020. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2021. dp_peer_unref_del_find_by_id(peer);
  2022. continue;
  2023. }
  2024. /* WDS Source Port Learning */
  2025. if (qdf_likely(vdev->wds_enabled))
  2026. dp_rx_wds_srcport_learn(soc,
  2027. rx_tlv_hdr,
  2028. peer,
  2029. nbuf,
  2030. msdu_metadata);
  2031. /* Intrabss-fwd */
  2032. if (dp_rx_check_ap_bridge(vdev))
  2033. if (dp_rx_intrabss_fwd(soc,
  2034. peer,
  2035. rx_tlv_hdr,
  2036. nbuf,
  2037. msdu_metadata)) {
  2038. nbuf = next;
  2039. dp_peer_unref_del_find_by_id(peer);
  2040. tid_stats->intrabss_cnt++;
  2041. continue; /* Get next desc */
  2042. }
  2043. }
  2044. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2045. DP_RX_LIST_APPEND(deliver_list_head,
  2046. deliver_list_tail,
  2047. nbuf);
  2048. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2049. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2050. tid_stats->delivered_to_stack++;
  2051. nbuf = next;
  2052. dp_peer_unref_del_find_by_id(peer);
  2053. }
  2054. if (qdf_likely(deliver_list_head)) {
  2055. if (qdf_likely(peer))
  2056. dp_rx_deliver_to_stack(soc, vdev, peer,
  2057. deliver_list_head,
  2058. deliver_list_tail);
  2059. else {
  2060. nbuf = deliver_list_head;
  2061. while (nbuf) {
  2062. next = nbuf->next;
  2063. nbuf->next = NULL;
  2064. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2065. nbuf = next;
  2066. }
  2067. }
  2068. }
  2069. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2070. if (quota) {
  2071. num_pending =
  2072. dp_rx_srng_get_num_pending(hal_soc,
  2073. hal_ring_hdl,
  2074. num_entries,
  2075. &near_full);
  2076. if (num_pending) {
  2077. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2078. if (!hif_exec_should_yield(scn, intr_id))
  2079. goto more_data;
  2080. if (qdf_unlikely(near_full)) {
  2081. DP_STATS_INC(soc, rx.near_full, 1);
  2082. goto more_data;
  2083. }
  2084. }
  2085. }
  2086. if (vdev && vdev->osif_fisa_flush)
  2087. vdev->osif_fisa_flush(soc, reo_ring_num);
  2088. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2089. vdev->osif_gro_flush(vdev->osif_vdev,
  2090. reo_ring_num);
  2091. }
  2092. }
  2093. /* Update histogram statistics by looping through pdev's */
  2094. DP_RX_HIST_STATS_PER_PDEV();
  2095. return rx_bufs_used; /* Assume no scale factor for now */
  2096. }
  2097. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2098. {
  2099. QDF_STATUS ret;
  2100. if (vdev->osif_rx_flush) {
  2101. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2102. if (!ret) {
  2103. dp_err("Failed to flush rx pkts for vdev %d\n",
  2104. vdev->vdev_id);
  2105. return ret;
  2106. }
  2107. }
  2108. return QDF_STATUS_SUCCESS;
  2109. }
  2110. /**
  2111. * dp_rx_pdev_detach() - detach dp rx
  2112. * @pdev: core txrx pdev context
  2113. *
  2114. * This function will detach DP RX into main device context
  2115. * will free DP Rx resources.
  2116. *
  2117. * Return: void
  2118. */
  2119. void
  2120. dp_rx_pdev_detach(struct dp_pdev *pdev)
  2121. {
  2122. uint8_t mac_for_pdev = pdev->lmac_id;
  2123. struct dp_soc *soc = pdev->soc;
  2124. struct rx_desc_pool *rx_desc_pool;
  2125. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2126. if (rx_desc_pool->pool_size != 0) {
  2127. if (!dp_is_soc_reinit(soc))
  2128. dp_rx_desc_nbuf_and_pool_free(soc, mac_for_pdev,
  2129. rx_desc_pool);
  2130. else
  2131. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2132. }
  2133. return;
  2134. }
  2135. static QDF_STATUS
  2136. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  2137. struct dp_pdev *dp_pdev,
  2138. struct rx_desc_pool *rx_desc_pool)
  2139. {
  2140. qdf_dma_addr_t paddr;
  2141. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2142. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2143. RX_BUFFER_RESERVATION,
  2144. rx_desc_pool->buf_alignment, FALSE);
  2145. if (!(*nbuf)) {
  2146. dp_err("nbuf alloc failed");
  2147. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2148. return ret;
  2149. }
  2150. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  2151. QDF_DMA_FROM_DEVICE);
  2152. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2153. qdf_nbuf_free(*nbuf);
  2154. dp_err("nbuf map failed");
  2155. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2156. return ret;
  2157. }
  2158. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  2159. ret = check_x86_paddr(dp_soc, nbuf, &paddr, rx_desc_pool);
  2160. if (ret == QDF_STATUS_E_FAILURE) {
  2161. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  2162. QDF_DMA_FROM_DEVICE);
  2163. qdf_nbuf_free(*nbuf);
  2164. dp_err("nbuf check x86 failed");
  2165. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2166. return ret;
  2167. }
  2168. return QDF_STATUS_SUCCESS;
  2169. }
  2170. QDF_STATUS
  2171. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2172. struct dp_srng *dp_rxdma_srng,
  2173. struct rx_desc_pool *rx_desc_pool,
  2174. uint32_t num_req_buffers)
  2175. {
  2176. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2177. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2178. union dp_rx_desc_list_elem_t *next;
  2179. void *rxdma_ring_entry;
  2180. qdf_dma_addr_t paddr;
  2181. qdf_nbuf_t *rx_nbuf_arr;
  2182. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2183. uint32_t buffer_index, nbuf_ptrs_per_page;
  2184. qdf_nbuf_t nbuf;
  2185. QDF_STATUS ret;
  2186. int page_idx, total_pages;
  2187. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2188. union dp_rx_desc_list_elem_t *tail = NULL;
  2189. if (qdf_unlikely(!rxdma_srng)) {
  2190. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2191. return QDF_STATUS_E_FAILURE;
  2192. }
  2193. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2194. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2195. num_req_buffers, &desc_list, &tail);
  2196. if (!nr_descs) {
  2197. dp_err("no free rx_descs in freelist");
  2198. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2199. return QDF_STATUS_E_NOMEM;
  2200. }
  2201. dp_debug("got %u RX descs for driver attach", nr_descs);
  2202. /*
  2203. * Try to allocate pointers to the nbuf one page at a time.
  2204. * Take pointers that can fit in one page of memory and
  2205. * iterate through the total descriptors that need to be
  2206. * allocated in order of pages. Reuse the pointers that
  2207. * have been allocated to fit in one page across each
  2208. * iteration to index into the nbuf.
  2209. */
  2210. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2211. /*
  2212. * Add an extra page to store the remainder if any
  2213. */
  2214. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2215. total_pages++;
  2216. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2217. if (!rx_nbuf_arr) {
  2218. dp_err("failed to allocate nbuf array");
  2219. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2220. QDF_BUG(0);
  2221. return QDF_STATUS_E_NOMEM;
  2222. }
  2223. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2224. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2225. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2226. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2227. /*
  2228. * The last page of buffer pointers may not be required
  2229. * completely based on the number of descriptors. Below
  2230. * check will ensure we are allocating only the
  2231. * required number of descriptors.
  2232. */
  2233. if (nr_nbuf_total >= nr_descs)
  2234. break;
  2235. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2236. &rx_nbuf_arr[nr_nbuf],
  2237. dp_pdev, rx_desc_pool);
  2238. if (QDF_IS_STATUS_ERROR(ret))
  2239. break;
  2240. nr_nbuf_total++;
  2241. }
  2242. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2243. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2244. rxdma_ring_entry =
  2245. hal_srng_src_get_next(dp_soc->hal_soc,
  2246. rxdma_srng);
  2247. qdf_assert_always(rxdma_ring_entry);
  2248. next = desc_list->next;
  2249. nbuf = rx_nbuf_arr[buffer_index];
  2250. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2251. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2252. desc_list->rx_desc.in_use = 1;
  2253. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2254. desc_list->rx_desc.cookie,
  2255. rx_desc_pool->owner);
  2256. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2257. desc_list = next;
  2258. }
  2259. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2260. }
  2261. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2262. qdf_mem_free(rx_nbuf_arr);
  2263. if (!nr_nbuf_total) {
  2264. dp_err("No nbuf's allocated");
  2265. QDF_BUG(0);
  2266. return QDF_STATUS_E_RESOURCES;
  2267. }
  2268. /* No need to count the number of bytes received during replenish.
  2269. * Therefore set replenish.pkts.bytes as 0.
  2270. */
  2271. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2272. return QDF_STATUS_SUCCESS;
  2273. }
  2274. /**
  2275. * dp_rx_attach() - attach DP RX
  2276. * @pdev: core txrx pdev context
  2277. *
  2278. * This function will attach a DP RX instance into the main
  2279. * device (SOC) context. Will allocate dp rx resource and
  2280. * initialize resources.
  2281. *
  2282. * Return: QDF_STATUS_SUCCESS: success
  2283. * QDF_STATUS_E_RESOURCES: Error return
  2284. */
  2285. QDF_STATUS
  2286. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2287. {
  2288. uint8_t pdev_id = pdev->pdev_id;
  2289. struct dp_soc *soc = pdev->soc;
  2290. uint32_t rxdma_entries;
  2291. uint32_t rx_sw_desc_weight;
  2292. struct dp_srng *dp_rxdma_srng;
  2293. struct rx_desc_pool *rx_desc_pool;
  2294. QDF_STATUS ret_val;
  2295. int mac_for_pdev;
  2296. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2297. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2298. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2299. return QDF_STATUS_SUCCESS;
  2300. }
  2301. pdev = soc->pdev_list[pdev_id];
  2302. mac_for_pdev = pdev->lmac_id;
  2303. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2304. rxdma_entries = dp_rxdma_srng->num_entries;
  2305. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2306. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2307. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2308. dp_rx_desc_pool_alloc(soc, mac_for_pdev,
  2309. rx_sw_desc_weight * rxdma_entries,
  2310. rx_desc_pool);
  2311. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2312. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2313. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2314. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2315. ret_val = dp_rx_fst_attach(soc, pdev);
  2316. if ((ret_val != QDF_STATUS_SUCCESS) &&
  2317. (ret_val != QDF_STATUS_E_NOSUPPORT)) {
  2318. QDF_TRACE(QDF_MODULE_ID_ANY, QDF_TRACE_LEVEL_ERROR,
  2319. "RX Flow Search Table attach failed: pdev %d err %d",
  2320. pdev_id, ret_val);
  2321. return ret_val;
  2322. }
  2323. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2324. rx_desc_pool, rxdma_entries - 1);
  2325. }
  2326. /*
  2327. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2328. * @soc: core txrx main context
  2329. * @pdev: core txrx pdev context
  2330. *
  2331. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2332. * until retry times reaches max threshold or succeeded.
  2333. *
  2334. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2335. */
  2336. qdf_nbuf_t
  2337. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2338. {
  2339. uint8_t *buf;
  2340. int32_t nbuf_retry_count;
  2341. QDF_STATUS ret;
  2342. qdf_nbuf_t nbuf = NULL;
  2343. for (nbuf_retry_count = 0; nbuf_retry_count <
  2344. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2345. nbuf_retry_count++) {
  2346. /* Allocate a new skb */
  2347. nbuf = qdf_nbuf_alloc(soc->osdev,
  2348. RX_DATA_BUFFER_SIZE,
  2349. RX_BUFFER_RESERVATION,
  2350. RX_DATA_BUFFER_ALIGNMENT,
  2351. FALSE);
  2352. if (!nbuf) {
  2353. DP_STATS_INC(pdev,
  2354. replenish.nbuf_alloc_fail, 1);
  2355. continue;
  2356. }
  2357. buf = qdf_nbuf_data(nbuf);
  2358. memset(buf, 0, RX_DATA_BUFFER_SIZE);
  2359. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2360. QDF_DMA_FROM_DEVICE);
  2361. /* nbuf map failed */
  2362. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2363. qdf_nbuf_free(nbuf);
  2364. DP_STATS_INC(pdev, replenish.map_err, 1);
  2365. continue;
  2366. }
  2367. /* qdf_nbuf alloc and map succeeded */
  2368. break;
  2369. }
  2370. /* qdf_nbuf still alloc or map failed */
  2371. if (qdf_unlikely(nbuf_retry_count >=
  2372. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2373. return NULL;
  2374. return nbuf;
  2375. }