cdp_txrx_mon_struct.h 16 KB

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  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /**
  20. * @file cdp_txrx_mon_struct.h
  21. * @brief Define the monitor mode API structure
  22. * shared by data path and the OS interface module
  23. */
  24. #ifndef _CDP_TXRX_MON_STRUCT_H_
  25. #define _CDP_TXRX_MON_STRUCT_H_
  26. #ifdef QCA_SUPPORT_LITE_MONITOR
  27. #define CDP_LITE_MON_PEER_MAX 16
  28. #define CDP_MON_FRM_TYPE_MAX 3
  29. #define CDP_MON_FRM_FILTER_MODE_MAX 4
  30. #define CDP_LITE_MON_LEN_64B 0x40
  31. #define CDP_LITE_MON_LEN_128B 0x80
  32. #define CDP_LITE_MON_LEN_256B 0x100
  33. #define CDP_LITE_MON_LEN_FULL 0xFFFF
  34. #define CDP_LITE_MON_FILTER_ALL 0xFFFF
  35. /* This should align with nac mac type enumerations in ieee80211_ioctl.h */
  36. #define CDP_LITE_MON_PEER_MAC_TYPE_CLIENT 2
  37. /* lite mon frame levels */
  38. enum cdp_lite_mon_level {
  39. /* level invalid */
  40. CDP_LITE_MON_LEVEL_INVALID = 0,
  41. /* level msdu */
  42. CDP_LITE_MON_LEVEL_MSDU = 1,
  43. /* level mpdu */
  44. CDP_LITE_MON_LEVEL_MPDU = 2,
  45. /* level ppdu */
  46. CDP_LITE_MON_LEVEL_PPDU = 3,
  47. };
  48. /* lite mon peer action */
  49. enum cdp_lite_mon_peer_action {
  50. /* peer add */
  51. CDP_LITE_MON_PEER_ADD = 0,
  52. /* peer remove */
  53. CDP_LITE_MON_PEER_REMOVE = 1,
  54. };
  55. /* lite mon config direction */
  56. enum cdp_lite_mon_direction {
  57. /* lite mon config direction rx */
  58. CDP_LITE_MON_DIRECTION_RX = 1,
  59. /* lite mon config direction tx */
  60. CDP_LITE_MON_DIRECTION_TX = 2,
  61. };
  62. #endif
  63. /* Same as MAX_20MHZ_SEGMENTS */
  64. #define CDP_MAX_20MHZ_SEGS 16
  65. /* Same as MAX_ANTENNA_EIGHT */
  66. #define CDP_MAX_NUM_ANTENNA 8
  67. /* XXX not really a mode; there are really multiple PHY's */
  68. enum cdp_mon_phymode {
  69. /* autoselect */
  70. CDP_IEEE80211_MODE_AUTO = 0,
  71. /* 5GHz, OFDM */
  72. CDP_IEEE80211_MODE_11A = 1,
  73. /* 2GHz, CCK */
  74. CDP_IEEE80211_MODE_11B = 2,
  75. /* 2GHz, OFDM */
  76. CDP_IEEE80211_MODE_11G = 3,
  77. /* 2GHz, GFSK */
  78. CDP_IEEE80211_MODE_FH = 4,
  79. /* 5GHz, OFDM, 2x clock dynamic turbo */
  80. CDP_IEEE80211_MODE_TURBO_A = 5,
  81. /* 2GHz, OFDM, 2x clock dynamic turbo */
  82. CDP_IEEE80211_MODE_TURBO_G = 6,
  83. /* 5Ghz, HT20 */
  84. CDP_IEEE80211_MODE_11NA_HT20 = 7,
  85. /* 2Ghz, HT20 */
  86. CDP_IEEE80211_MODE_11NG_HT20 = 8,
  87. /* 5Ghz, HT40 (ext ch +1) */
  88. CDP_IEEE80211_MODE_11NA_HT40PLUS = 9,
  89. /* 5Ghz, HT40 (ext ch -1) */
  90. CDP_IEEE80211_MODE_11NA_HT40MINUS = 10,
  91. /* 2Ghz, HT40 (ext ch +1) */
  92. CDP_IEEE80211_MODE_11NG_HT40PLUS = 11,
  93. /* 2Ghz, HT40 (ext ch -1) */
  94. CDP_IEEE80211_MODE_11NG_HT40MINUS = 12,
  95. /* 2Ghz, Auto HT40 */
  96. CDP_IEEE80211_MODE_11NG_HT40 = 13,
  97. /* 5Ghz, Auto HT40 */
  98. CDP_IEEE80211_MODE_11NA_HT40 = 14,
  99. /* 5Ghz, VHT20 */
  100. CDP_IEEE80211_MODE_11AC_VHT20 = 15,
  101. /* 5Ghz, VHT40 (Ext ch +1) */
  102. CDP_IEEE80211_MODE_11AC_VHT40PLUS = 16,
  103. /* 5Ghz VHT40 (Ext ch -1) */
  104. CDP_IEEE80211_MODE_11AC_VHT40MINUS = 17,
  105. /* 5Ghz, VHT40 */
  106. CDP_IEEE80211_MODE_11AC_VHT40 = 18,
  107. /* 5Ghz, VHT80 */
  108. CDP_IEEE80211_MODE_11AC_VHT80 = 19,
  109. /* 5Ghz, VHT160 */
  110. CDP_IEEE80211_MODE_11AC_VHT160 = 20,
  111. /* 5Ghz, VHT80_80 */
  112. CDP_IEEE80211_MODE_11AC_VHT80_80 = 21,
  113. };
  114. enum {
  115. CDP_PKT_TYPE_OFDM = 0,
  116. CDP_PKT_TYPE_CCK,
  117. CDP_PKT_TYPE_HT,
  118. CDP_PKT_TYPE_VHT,
  119. CDP_PKT_TYPE_HE,
  120. };
  121. enum {
  122. CDP_SGI_0_8_US = 0,
  123. CDP_SGI_0_4_US,
  124. CDP_SGI_1_6_US,
  125. CDP_SGI_3_2_US,
  126. };
  127. enum {
  128. CDP_RX_TYPE_SU = 0,
  129. CDP_RX_TYPE_MU_MIMO,
  130. CDP_RX_TYPE_MU_OFDMA,
  131. CDP_RX_TYPE_MU_OFDMA_MIMO,
  132. };
  133. /*
  134. *Band Width Types
  135. */
  136. enum CMN_BW_TYPES {
  137. CMN_BW_20MHZ,
  138. CMN_BW_40MHZ,
  139. CMN_BW_80MHZ,
  140. CMN_BW_160MHZ,
  141. CMN_BW_80_80MHZ,
  142. #ifdef WLAN_FEATURE_11BE
  143. CMN_BW_320MHZ,
  144. #endif
  145. CMN_BW_CNT,
  146. CMN_BW_IDLE = 0xFF, /*default BW state */
  147. };
  148. enum cdp_punctured_modes {
  149. NO_PUNCTURE,
  150. #ifdef WLAN_FEATURE_11BE
  151. PUNCTURED_20MHZ,
  152. PUNCTURED_40MHZ,
  153. PUNCTURED_80MHZ,
  154. PUNCTURED_120MHZ,
  155. #endif
  156. PUNCTURED_MODE_CNT,
  157. };
  158. struct cdp_mon_status {
  159. /* bss color value 1-63 used for update on ppdu_desc bsscolor */
  160. uint8_t bsscolor;
  161. int rs_numchains;
  162. int rs_flags;
  163. #define IEEE80211_RX_FCS_ERROR 0x01
  164. #define IEEE80211_RX_MIC_ERROR 0x02
  165. #define IEEE80211_RX_DECRYPT_ERROR 0x04
  166. /* holes in flags here between, ATH_RX_XXXX to IEEE80211_RX_XXX */
  167. #define IEEE80211_RX_KEYMISS 0x200
  168. #define IEEE80211_RX_PN_ERROR 0x400
  169. int rs_rssi; /* RSSI (noise floor ajusted) */
  170. int rs_abs_rssi; /* absolute RSSI */
  171. int rs_datarate; /* data rate received */
  172. int rs_rateieee;
  173. int rs_ratephy1;
  174. int rs_ratephy2;
  175. int rs_ratephy3;
  176. /* Keep the same as ATH_MAX_ANTENNA */
  177. #define IEEE80211_MAX_ANTENNA 3
  178. /* RSSI (noise floor ajusted) */
  179. u_int8_t rs_rssictl[IEEE80211_MAX_ANTENNA];
  180. /* RSSI (noise floor ajusted) */
  181. u_int8_t rs_rssiextn[IEEE80211_MAX_ANTENNA];
  182. /* rs_rssi is valid or not */
  183. u_int8_t rs_isvalidrssi;
  184. enum cdp_mon_phymode rs_phymode;
  185. int rs_freq;
  186. union {
  187. u_int8_t data[8];
  188. u_int64_t tsf;
  189. } rs_tstamp;
  190. /*
  191. * Detail channel structure of recv frame.
  192. * It could be NULL if not available
  193. */
  194. #ifdef ATH_SUPPORT_AOW
  195. u_int16_t rs_rxseq; /* WLAN Sequence number */
  196. #endif
  197. #ifdef ATH_VOW_EXT_STATS
  198. /* Lower 16 bits holds the udp checksum offset in the data pkt */
  199. u_int32_t vow_extstats_offset;
  200. /* Higher 16 bits contains offset in the data pkt at which vow
  201. * ext stats are embedded
  202. */
  203. #endif
  204. u_int8_t rs_isaggr;
  205. u_int8_t rs_isapsd;
  206. int16_t rs_noisefloor;
  207. u_int16_t rs_channel;
  208. #ifdef ATH_SUPPORT_TxBF
  209. u_int32_t rs_rpttstamp; /* txbf report time stamp*/
  210. #endif
  211. /* The following counts are meant to assist in stats calculation.
  212. * These variables are incremented only in specific situations, and
  213. * should not be relied upon for any purpose other than the original
  214. * stats related purpose they have been introduced for.
  215. */
  216. u_int16_t rs_cryptodecapcount; /* Crypto bytes decapped/demic'ed. */
  217. u_int8_t rs_padspace; /* No. of padding bytes present after
  218. header in wbuf. */
  219. u_int8_t rs_qosdecapcount; /* QoS/HTC bytes decapped. */
  220. /* End of stats calculation related counts. */
  221. /*
  222. * uint8_t rs_lsig[IEEE80211_LSIG_LEN];
  223. * uint8_t rs_htsig[IEEE80211_HTSIG_LEN];
  224. * uint8_t rs_servicebytes[IEEE80211_SB_LEN];
  225. * uint8_t rs_fcs_error;
  226. */
  227. /* cdp convergence monitor mode status */
  228. union {
  229. u_int8_t cdp_data[8];
  230. u_int64_t cdp_tsf;
  231. } cdp_rs_tstamp;
  232. uint8_t cdp_rs_pream_type;
  233. uint32_t cdp_rs_user_rssi;
  234. uint8_t cdp_rs_stbc;
  235. uint8_t cdp_rs_sgi;
  236. uint32_t cdf_rs_rate_mcs;
  237. uint32_t cdp_rs_reception_type;
  238. uint32_t cdp_rs_bw;
  239. uint32_t cdp_rs_nss;
  240. uint8_t cdp_rs_fcs_err;
  241. bool cdp_rs_rxdma_err;
  242. };
  243. enum {
  244. CDP_MON_PPDU_START = 0,
  245. CDP_MON_PPDU_END,
  246. };
  247. #ifdef QCA_UNDECODED_METADATA_SUPPORT
  248. /**
  249. * enum cdp_mon_phyrx_abort_reason_code: Phy err code to store the reason
  250. * why PHY generated an abort request.
  251. */
  252. enum cdp_mon_phyrx_abort_reason_code {
  253. CDP_PHYRX_ERR_PHY_OFF = 0,
  254. CDP_PHYRX_ERR_SYNTH_OFF,
  255. CDP_PHYRX_ERR_OFDMA_TIMING,
  256. CDP_PHYRX_ERR_OFDMA_SIGNAL_PARITY,
  257. CDP_PHYRX_ERR_OFDMA_RATE_ILLEGAL,
  258. CDP_PHYRX_ERR_OFDMA_LENGTH_ILLEGAL,
  259. CDP_PHYRX_ERR_OFDMA_RESTART,
  260. CDP_PHYRX_ERR_OFDMA_SERVICE,
  261. CDP_PHYRX_ERR_PPDU_OFDMA_POWER_DROP,
  262. CDP_PHYRX_ERR_CCK_BLOKKER,
  263. CDP_PHYRX_ERR_CCK_TIMING = 10,
  264. CDP_PHYRX_ERR_CCK_HEADER_CRC,
  265. CDP_PHYRX_ERR_CCK_RATE_ILLEGAL,
  266. CDP_PHYRX_ERR_CCK_LENGTH_ILLEGAL,
  267. CDP_PHYRX_ERR_CCK_RESTART,
  268. CDP_PHYRX_ERR_CCK_SERVICE,
  269. CDP_PHYRX_ERR_CCK_POWER_DROP,
  270. CDP_PHYRX_ERR_HT_CRC_ERR,
  271. CDP_PHYRX_ERR_HT_LENGTH_ILLEGAL,
  272. CDP_PHYRX_ERR_HT_RATE_ILLEGAL,
  273. CDP_PHYRX_ERR_HT_ZLF = 20,
  274. CDP_PHYRX_ERR_FALSE_RADAR_EXT,
  275. CDP_PHYRX_ERR_GREEN_FIELD,
  276. CDP_PHYRX_ERR_BW_GT_DYN_BW,
  277. CDP_PHYRX_ERR_HT_LSIG_RATE_MISMATCH,
  278. CDP_PHYRX_ERR_VHT_CRC_ERROR,
  279. CDP_PHYRX_ERR_VHT_SIGA_UNSUPPORTED,
  280. CDP_PHYRX_ERR_VHT_LSIG_LEN_INVALID,
  281. CDP_PHYRX_ERR_VHT_NDP_OR_ZLF,
  282. CDP_PHYRX_ERR_VHT_NSYM_LT_ZERO,
  283. CDP_PHYRX_ERR_VHT_RX_EXTRA_SYMBOL_MISMATCH = 30,
  284. CDP_PHYRX_ERR_VHT_RX_SKIP_GROUP_ID0,
  285. CDP_PHYRX_ERR_VHT_RX_SKIP_GROUP_ID1TO62,
  286. CDP_PHYRX_ERR_VHT_RX_SKIP_GROUP_ID63,
  287. CDP_PHYRX_ERR_OFDM_LDPC_DECODER_DISABLED,
  288. CDP_PHYRX_ERR_DEFER_NAP,
  289. CDP_PHYRX_ERR_FDOMAIN_TIMEOUT,
  290. CDP_PHYRX_ERR_LSIG_REL_CHECK,
  291. CDP_PHYRX_ERR_BT_COLLISION,
  292. CDP_PHYRX_ERR_UNSUPPORTED_MU_FEEDBACK,
  293. CDP_PHYRX_ERR_PPDU_TX_INTERRUPT_RX = 40,
  294. CDP_PHYRX_ERR_UNSUPPORTED_CBF,
  295. CDP_PHYRX_ERR_OTHER,
  296. CDP_PHYRX_ERR_HE_SIGA_UNSUPPORTED,
  297. CDP_PHYRX_ERR_HE_SIGA_CRC_ERROR,
  298. CDP_PHYRX_ERR_HE_SIGB_UNSUPPORTED,
  299. CDP_PHYRX_ERR_HE_SIGB_CRC_ERROR,
  300. CDP_PHYRX_ERR_HE_MU_MODE_UNSUPPORTED,
  301. CDP_PHYRX_ERR_HE_NDP_OR_ZLF,
  302. CDP_PHYRX_ERR_HE_NSYM_LT_ZERO,
  303. CDP_PHYRX_ERR_HE_RU_PARAMS_UNSUPPORTED = 50,
  304. CDP_PHYRX_ERR_HE_NUM_USERS_UNSUPPORTED,
  305. CDP_PHYRX_ERR_HE_SOUNDING_PARAMS_UNSUPPORTED,
  306. CDP_PHYRX_ERR_HE_EXT_SU_UNSUPPORTED,
  307. CDP_PHYRX_ERR_HE_TRIG_UNSUPPORTED,
  308. CDP_PHYRX_ERR_HE_LSIG_LEN_INVALID = 55,
  309. CDP_PHYRX_ERR_HE_LSIG_RATE_MISMATCH,
  310. CDP_PHYRX_ERR_OFDMA_SIGNAL_RELIABILITY,
  311. CDP_PHYRX_ERR_HT_NSYM_LT_ZERO,
  312. CDP_PHYRX_ERR_VHT_LSIG_RATE_MISMATCH,
  313. CDP_PHYRX_ERR_VHT_PAID_GID_MISMATCH = 60,
  314. CDP_PHYRX_ERR_VHT_UNSUPPORTED_BW,
  315. CDP_PHYRX_ERR_VHT_GI_DISAM_MISMATCH,
  316. CDP_PHYRX_ERR_RX_WDG_TIMEOUT = 63,
  317. CDP_PHYRX_ERR_MAX
  318. };
  319. #endif
  320. #define MAX_PPDU_ID_HIST 128
  321. /**
  322. * struct cdp_pdev_mon_stats
  323. * @status_ppdu_state: state on PPDU start and end
  324. * @status_ppdu_start: status ring PPDU start TLV count
  325. * @status_ppdu_end: status ring PPDU end TLV count
  326. * @status_ppdu_compl: status ring matching start and end count on PPDU
  327. * @status_ppdu_start_mis: status ring missing start TLV count on PPDU
  328. * @status_ppdu_end_mis: status ring missing end TLV count on PPDU
  329. * @status_ppdu_done: status ring PPDU done TLV count
  330. * @dest_ppdu_done: destination ring PPDU count
  331. * @dest_mpdu_done: destination ring MPDU count
  332. * @dup_mon_linkdesc_cnt: duplicate link descriptor indications from HW
  333. * @dup_mon_buf_cnt: duplicate buffer indications from HW
  334. * @tlv_tag_status_err: status not correct in the tlv tag
  335. * @status_buf_done_war: Number of status ring buffers for which DMA not done
  336. * WAR is applied.
  337. * @mon_rx_bufs_replenished_dest: Rx buffers replenish count
  338. * @mon_rx_bufs_reaped_dest: Rx buffer reap count
  339. * @ppdu_id_mismatch: counter to track ppdu id mismatch in
  340. * mointor status and monitor destination ring
  341. * @ppdu_id_match: counter to track ppdu id match in
  342. * mointor status and monitor destination ring
  343. * @status_ppdu_drop: Number of ppdu dropped from monitor status ring
  344. * @dest_ppdu_drop: Number of ppdu dropped from monitor destination ring
  345. * @mon_link_desc_invalid: msdu link desc invalid count
  346. * @mon_rx_desc_invalid: rx_desc invalid count
  347. * @mpdu_ppdu_id_mismatch_drop: mpdu's ppdu id did not match destination
  348. * ring ppdu id
  349. * @mpdu_decap_type_invalid: mpdu decap type invalid count
  350. * @rx_undecoded_count: Received undecoded frame count
  351. * @rx_undecoded_error: Rx undecoded errors
  352. * @rx_hdr_not_received: Rx HDR not received for MPDU
  353. * @parent_buf_alloc: Numder of parent nbuf allocated for MPDU
  354. * @parent_buf_free: Number of parent nbuf freed
  355. * @pkt_buf_count: Number of packet buffers received
  356. * @mpdus_to_stack: Number of MPDUs delivered to stack
  357. * @status_buf_count: Number of status buffer received
  358. * @empty_desc_ppdu: Number of empty desc received
  359. * @total_ppdu_info_enq: Number of PPDUs enqueued to wq
  360. * @total_ppdu_info_drop: Number of PPDUs dropped
  361. * @total_ppdu_info_alloc: Number of PPDU info allocated
  362. * @total_ppdu_info_free: Number of PPDU info freeed
  363. */
  364. struct cdp_pdev_mon_stats {
  365. #ifndef REMOVE_MON_DBG_STATS
  366. uint32_t status_ppdu_state;
  367. uint32_t status_ppdu_start;
  368. uint32_t status_ppdu_end;
  369. uint32_t status_ppdu_compl;
  370. uint32_t status_ppdu_start_mis;
  371. uint32_t status_ppdu_end_mis;
  372. #endif
  373. uint32_t status_ppdu_done;
  374. uint32_t dest_ppdu_done;
  375. uint32_t dest_mpdu_done;
  376. uint32_t dest_mpdu_drop;
  377. uint32_t dup_mon_linkdesc_cnt;
  378. uint32_t dup_mon_buf_cnt;
  379. uint32_t stat_ring_ppdu_id_hist[MAX_PPDU_ID_HIST];
  380. uint32_t dest_ring_ppdu_id_hist[MAX_PPDU_ID_HIST];
  381. uint32_t ppdu_id_hist_idx;
  382. uint32_t mon_rx_dest_stuck;
  383. uint32_t tlv_tag_status_err;
  384. uint32_t status_buf_done_war;
  385. uint32_t mon_rx_bufs_replenished_dest;
  386. uint32_t mon_rx_bufs_reaped_dest;
  387. uint32_t ppdu_id_mismatch;
  388. uint32_t ppdu_id_match;
  389. uint32_t status_ppdu_drop;
  390. uint32_t dest_ppdu_drop;
  391. uint32_t mon_link_desc_invalid;
  392. uint32_t mon_rx_desc_invalid;
  393. uint32_t mon_nbuf_sanity_err;
  394. uint32_t mpdu_ppdu_id_mismatch_drop;
  395. uint32_t mpdu_decap_type_invalid;
  396. #ifdef QCA_UNDECODED_METADATA_SUPPORT
  397. uint32_t rx_undecoded_count;
  398. uint32_t rx_undecoded_error[CDP_PHYRX_ERR_MAX];
  399. #endif
  400. uint32_t rx_hdr_not_received;
  401. uint32_t parent_buf_alloc;
  402. uint32_t parent_buf_free;
  403. uint32_t pkt_buf_count;
  404. uint32_t mpdus_buf_to_stack;
  405. uint32_t status_buf_count;
  406. uint32_t empty_desc_ppdu;
  407. uint32_t total_ppdu_info_enq;
  408. uint32_t total_ppdu_info_drop;
  409. uint32_t total_ppdu_info_alloc;
  410. uint32_t total_ppdu_info_free;
  411. };
  412. #ifdef QCA_SUPPORT_LITE_MONITOR
  413. /**
  414. * cdp_lite_mon_filter_config - lite mon set/get filter config
  415. * @direction: direction tx/rx
  416. * @disable: disables lite mon
  417. * @level: MSDU/MPDU/PPDU levels
  418. * @metadata: meta information to be added
  419. * @mgmt_filter: mgmt filter for modes fp,md,mo
  420. * @ctrl_filter: ctrl filter for modes fp,md,mo
  421. * @data_filter: data filter for modes fp,md,mo
  422. * @len: mgmt/ctrl/data frame lens
  423. * @debug: debug options
  424. * @vdev_id: output vdev id
  425. */
  426. struct cdp_lite_mon_filter_config {
  427. uint8_t direction;
  428. uint8_t disable;
  429. uint8_t level;
  430. uint8_t metadata;
  431. uint16_t mgmt_filter[CDP_MON_FRM_FILTER_MODE_MAX];
  432. uint16_t ctrl_filter[CDP_MON_FRM_FILTER_MODE_MAX];
  433. uint16_t data_filter[CDP_MON_FRM_FILTER_MODE_MAX];
  434. uint16_t len[CDP_MON_FRM_TYPE_MAX];
  435. uint8_t debug;
  436. uint8_t vdev_id;
  437. };
  438. /**
  439. * cdp_lite_mon_peer_config - lite mon set peer config
  440. * @direction: direction tx/rx
  441. * @action: add/del
  442. * @vdev_id: peer vdev id
  443. * @mac: peer mac
  444. */
  445. struct cdp_lite_mon_peer_config {
  446. uint8_t direction;
  447. uint8_t action;
  448. uint8_t vdev_id;
  449. uint8_t mac[QDF_MAC_ADDR_SIZE];
  450. };
  451. /**
  452. * cdp_lite_mon_peer_info - lite mon get peer config
  453. * @direction: direction tx/rx
  454. * @count: no of peers
  455. * @mac: peer macs
  456. */
  457. struct cdp_lite_mon_peer_info {
  458. uint8_t direction;
  459. uint8_t count;
  460. uint8_t mac[CDP_LITE_MON_PEER_MAX][QDF_MAC_ADDR_SIZE];
  461. };
  462. #endif
  463. /* channel operating width */
  464. enum cdp_channel_width {
  465. CHAN_WIDTH_20 = 0,
  466. CHAN_WIDTH_40,
  467. CHAN_WIDTH_80,
  468. CHAN_WIDTH_160,
  469. CHAN_WIDTH_80P80,
  470. CHAN_WIDTH_5,
  471. CHAN_WIDTH_10,
  472. CHAN_WIDTH_165,
  473. CHAN_WIDTH_160P160,
  474. CHAN_WIDTH_320,
  475. CHAN_WIDTH_MAX,
  476. };
  477. /* struct cdp_rssi_temp_off_param_dp
  478. * @rssi_temp_offset: Temperature based rssi offset , send every 30 secs
  479. */
  480. struct cdp_rssi_temp_off_param_dp {
  481. int32_t rssi_temp_offset;
  482. };
  483. /*
  484. * struct cdp_rssi_dbm_conv_param_dp
  485. * @curr_bw: Current bandwidth
  486. * @curr_rx_chainmask: Current rx chainmask
  487. * @xbar_config: 4 bytes, used for BB to RF Chain mapping
  488. * @xlna_bypass_offset: Low noise amplifier bypass offset
  489. * @xlna_bypass_threshold: Low noise amplifier bypass threshold
  490. * @nfHwDbm: HW noise floor in dBm per chain, per 20MHz subband
  491. */
  492. struct cdp_rssi_dbm_conv_param_dp {
  493. uint32_t curr_bw;
  494. uint32_t curr_rx_chainmask;
  495. uint32_t xbar_config;
  496. int32_t xlna_bypass_offset;
  497. int32_t xlna_bypass_threshold;
  498. int8_t nf_hw_dbm[CDP_MAX_NUM_ANTENNA][CDP_MAX_20MHZ_SEGS];
  499. };
  500. /*
  501. * struct cdp_rssi_db2dbm_param_dp
  502. * @pdev_id: pdev_id
  503. * @rssi_temp_off_present: to check temp offset values present or not
  504. * @rssi_dbm_info_present: to check rssi dbm converstion parameters
  505. * present or not
  506. * @temp_off_param: cdp_rssi_temp_off_param_dp structure value
  507. * @rssi_dbm_param: cdp_rssi_dbm_conv_param_dp staructure value
  508. */
  509. struct cdp_rssi_db2dbm_param_dp {
  510. uint32_t pdev_id;
  511. bool rssi_temp_off_present;
  512. bool rssi_dbm_info_present;
  513. struct cdp_rssi_temp_off_param_dp temp_off_param;
  514. struct cdp_rssi_dbm_conv_param_dp rssi_dbm_param;
  515. };
  516. /*
  517. * enum cdp_mon_reap_source: trigger source of the reap timer of
  518. * monitor status ring
  519. * @CDP_MON_REAP_SOURCE_PKTLOG: pktlog
  520. * @CDP_MON_REAP_SOURCE_CFR: CFR
  521. * @CDP_MON_REAP_SOURCE_EMESH: easy mesh
  522. * @CDP_MON_REAP_SOURCE_NUM: total number of the sources
  523. * @CDP_MON_REAP_SOURCE_ANY: any of the sources
  524. */
  525. enum cdp_mon_reap_source {
  526. CDP_MON_REAP_SOURCE_PKTLOG,
  527. CDP_MON_REAP_SOURCE_CFR,
  528. CDP_MON_REAP_SOURCE_EMESH,
  529. /* keep last */
  530. CDP_MON_REAP_SOURCE_NUM,
  531. CDP_MON_REAP_SOURCE_ANY,
  532. };
  533. #endif