dp_li_tx.c 14 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "dp_types.h"
  21. #include "dp_tx.h"
  22. #include "dp_li_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include <dp_internal.h>
  25. #include <dp_htt.h>
  26. #include <hal_li_api.h>
  27. #include <hal_li_tx.h>
  28. #include "dp_peer.h"
  29. #ifdef FEATURE_WDS
  30. #include "dp_txrx_wds.h"
  31. #endif
  32. #include "dp_li.h"
  33. extern uint8_t sec_type_map[MAX_CDP_SEC_TYPE];
  34. void dp_tx_comp_get_params_from_hal_desc_li(struct dp_soc *soc,
  35. void *tx_comp_hal_desc,
  36. struct dp_tx_desc_s **r_tx_desc)
  37. {
  38. uint8_t pool_id;
  39. uint32_t tx_desc_id;
  40. tx_desc_id = hal_tx_comp_get_desc_id(tx_comp_hal_desc);
  41. pool_id = (tx_desc_id & DP_TX_DESC_ID_POOL_MASK) >>
  42. DP_TX_DESC_ID_POOL_OS;
  43. /* Find Tx descriptor */
  44. *r_tx_desc = dp_tx_desc_find(soc, pool_id,
  45. (tx_desc_id & DP_TX_DESC_ID_PAGE_MASK) >>
  46. DP_TX_DESC_ID_PAGE_OS,
  47. (tx_desc_id & DP_TX_DESC_ID_OFFSET_MASK) >>
  48. DP_TX_DESC_ID_OFFSET_OS);
  49. /* Pool id is not matching. Error */
  50. if ((*r_tx_desc)->pool_id != pool_id) {
  51. dp_tx_comp_alert("Tx Comp pool id %d not matched %d",
  52. pool_id, (*r_tx_desc)->pool_id);
  53. qdf_assert_always(0);
  54. }
  55. (*r_tx_desc)->peer_id = hal_tx_comp_get_peer_id(tx_comp_hal_desc);
  56. }
  57. static inline
  58. void dp_tx_process_mec_notify_li(struct dp_soc *soc, uint8_t *status)
  59. {
  60. struct dp_vdev *vdev;
  61. uint8_t vdev_id;
  62. uint32_t *htt_desc = (uint32_t *)status;
  63. /*
  64. * Get vdev id from HTT status word in case of MEC
  65. * notification
  66. */
  67. vdev_id = HTT_TX_WBM_COMPLETION_V2_VDEV_ID_GET(htt_desc[3]);
  68. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  69. return;
  70. vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  71. DP_MOD_ID_HTT_COMP);
  72. if (!vdev)
  73. return;
  74. dp_tx_mec_handler(vdev, status);
  75. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_HTT_COMP);
  76. }
  77. void dp_tx_process_htt_completion_li(struct dp_soc *soc,
  78. struct dp_tx_desc_s *tx_desc,
  79. uint8_t *status,
  80. uint8_t ring_id)
  81. {
  82. uint8_t tx_status;
  83. struct dp_pdev *pdev;
  84. struct dp_vdev *vdev = NULL;
  85. struct hal_tx_completion_status ts = {0};
  86. uint32_t *htt_desc = (uint32_t *)status;
  87. struct dp_peer *peer;
  88. struct cdp_tid_tx_stats *tid_stats = NULL;
  89. struct htt_soc *htt_handle;
  90. uint8_t vdev_id;
  91. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  92. htt_handle = (struct htt_soc *)soc->htt_handle;
  93. htt_wbm_event_record(htt_handle->htt_logger_handle, tx_status, status);
  94. /*
  95. * There can be scenario where WBM consuming descriptor enqueued
  96. * from TQM2WBM first and TQM completion can happen before MEC
  97. * notification comes from FW2WBM. Avoid access any field of tx
  98. * descriptor in case of MEC notify.
  99. */
  100. if (tx_status == HTT_TX_FW2WBM_TX_STATUS_MEC_NOTIFY)
  101. return dp_tx_process_mec_notify_li(soc, status);
  102. /*
  103. * If the descriptor is already freed in vdev_detach,
  104. * continue to next descriptor
  105. */
  106. if (qdf_unlikely(!tx_desc->flags)) {
  107. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  108. tx_desc->id);
  109. return;
  110. }
  111. if (qdf_unlikely(tx_desc->vdev_id == DP_INVALID_VDEV_ID)) {
  112. dp_tx_comp_info_rl("Invalid vdev_id %d", tx_desc->id);
  113. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  114. goto release_tx_desc;
  115. }
  116. pdev = tx_desc->pdev;
  117. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  118. dp_tx_comp_info_rl("pdev in down state %d", tx_desc->id);
  119. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  120. goto release_tx_desc;
  121. }
  122. qdf_assert(tx_desc->pdev);
  123. vdev_id = tx_desc->vdev_id;
  124. vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  125. DP_MOD_ID_HTT_COMP);
  126. if (qdf_unlikely(!vdev)) {
  127. dp_tx_comp_info_rl("Unable to get vdev ref %d", tx_desc->id);
  128. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  129. goto release_tx_desc;
  130. }
  131. switch (tx_status) {
  132. case HTT_TX_FW2WBM_TX_STATUS_OK:
  133. case HTT_TX_FW2WBM_TX_STATUS_DROP:
  134. case HTT_TX_FW2WBM_TX_STATUS_TTL:
  135. {
  136. uint8_t tid;
  137. if (HTT_TX_WBM_COMPLETION_V2_VALID_GET(htt_desc[2])) {
  138. ts.peer_id =
  139. HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_GET(
  140. htt_desc[2]);
  141. ts.tid =
  142. HTT_TX_WBM_COMPLETION_V2_TID_NUM_GET(
  143. htt_desc[2]);
  144. } else {
  145. ts.peer_id = HTT_INVALID_PEER;
  146. ts.tid = HTT_INVALID_TID;
  147. }
  148. ts.release_src = HAL_TX_COMP_RELEASE_SOURCE_FW;
  149. ts.ppdu_id =
  150. HTT_TX_WBM_COMPLETION_V2_SCH_CMD_ID_GET(
  151. htt_desc[1]);
  152. ts.ack_frame_rssi =
  153. HTT_TX_WBM_COMPLETION_V2_ACK_FRAME_RSSI_GET(
  154. htt_desc[1]);
  155. ts.tsf = htt_desc[3];
  156. ts.first_msdu = 1;
  157. ts.last_msdu = 1;
  158. tid = ts.tid;
  159. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  160. tid = CDP_MAX_DATA_TIDS - 1;
  161. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  162. if (qdf_unlikely(pdev->delay_stats_flag))
  163. dp_tx_compute_delay(vdev, tx_desc, tid, ring_id);
  164. if (tx_status < CDP_MAX_TX_HTT_STATUS)
  165. tid_stats->htt_status_cnt[tx_status]++;
  166. peer = dp_peer_get_ref_by_id(soc, ts.peer_id,
  167. DP_MOD_ID_HTT_COMP);
  168. if (qdf_likely(peer)) {
  169. DP_STATS_INC_PKT(peer, tx.comp_pkt, 1,
  170. qdf_nbuf_len(tx_desc->nbuf));
  171. DP_STATS_INCC(peer, tx.tx_failed, 1,
  172. tx_status != HTT_TX_FW2WBM_TX_STATUS_OK);
  173. }
  174. dp_tx_comp_process_tx_status(soc, tx_desc, &ts, peer, ring_id);
  175. dp_tx_comp_process_desc(soc, tx_desc, &ts, peer);
  176. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  177. if (qdf_likely(peer))
  178. dp_peer_unref_delete(peer, DP_MOD_ID_HTT_COMP);
  179. break;
  180. }
  181. case HTT_TX_FW2WBM_TX_STATUS_REINJECT:
  182. {
  183. uint8_t reinject_reason;
  184. reinject_reason =
  185. HTT_TX_WBM_COMPLETION_V2_REINJECT_REASON_GET(
  186. htt_desc[0]);
  187. dp_tx_reinject_handler(soc, vdev, tx_desc,
  188. status, reinject_reason);
  189. break;
  190. }
  191. case HTT_TX_FW2WBM_TX_STATUS_INSPECT:
  192. {
  193. dp_tx_inspect_handler(soc, vdev, tx_desc, status);
  194. break;
  195. }
  196. case HTT_TX_FW2WBM_TX_STATUS_VDEVID_MISMATCH:
  197. {
  198. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  199. goto release_tx_desc;
  200. }
  201. default:
  202. dp_tx_comp_err("Invalid HTT tx_status %d\n",
  203. tx_status);
  204. goto release_tx_desc;
  205. }
  206. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_HTT_COMP);
  207. return;
  208. release_tx_desc:
  209. dp_tx_comp_free_buf(soc, tx_desc);
  210. dp_tx_desc_release(tx_desc, tx_desc->pool_id);
  211. if (vdev)
  212. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_HTT_COMP);
  213. }
  214. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  215. /*
  216. * dp_tx_get_rbm_id()- Get the RBM ID for data transmission completion.
  217. * @dp_soc - DP soc structure pointer
  218. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  219. *
  220. * Return - HAL ring handle
  221. */
  222. #ifdef IPA_OFFLOAD
  223. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  224. uint8_t ring_id)
  225. {
  226. return (ring_id + soc->wbm_sw0_bm_id);
  227. }
  228. #else
  229. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  230. uint8_t ring_id)
  231. {
  232. return (ring_id ? soc->wbm_sw0_bm_id + (ring_id - 1) :
  233. HAL_WBM_SW2_BM_ID(soc->wbm_sw0_bm_id));
  234. }
  235. #endif
  236. #else
  237. #ifdef TX_MULTI_TCL
  238. #ifdef IPA_OFFLOAD
  239. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  240. uint8_t ring_id)
  241. {
  242. if (soc->wlan_cfg_ctx->ipa_enabled)
  243. return (ring_id + soc->wbm_sw0_bm_id);
  244. return soc->wlan_cfg_ctx->tcl_wbm_map_array[ring_id].wbm_rbm_id;
  245. }
  246. #else
  247. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  248. uint8_t ring_id)
  249. {
  250. return soc->wlan_cfg_ctx->tcl_wbm_map_array[ring_id].wbm_rbm_id;
  251. }
  252. #endif
  253. #else
  254. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  255. uint8_t ring_id)
  256. {
  257. return (ring_id + soc->wbm_sw0_bm_id);
  258. }
  259. #endif
  260. #endif
  261. #if defined(CLEAR_SW2TCL_CONSUMED_DESC)
  262. /**
  263. * dp_tx_clear_consumed_hw_descs - Reset all the consumed Tx ring descs to 0
  264. *
  265. * @soc: DP soc handle
  266. * @hal_ring_hdl: Source ring pointer
  267. *
  268. * Return: void
  269. */
  270. static inline
  271. void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
  272. hal_ring_handle_t hal_ring_hdl)
  273. {
  274. void *desc = hal_srng_src_get_next_consumed(soc->hal_soc, hal_ring_hdl);
  275. while (desc) {
  276. hal_tx_desc_clear(desc);
  277. desc = hal_srng_src_get_next_consumed(soc->hal_soc,
  278. hal_ring_hdl);
  279. }
  280. }
  281. #else
  282. static inline
  283. void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
  284. hal_ring_handle_t hal_ring_hdl)
  285. {
  286. }
  287. #endif /* CLEAR_SW2TCL_CONSUMED_DESC */
  288. QDF_STATUS
  289. dp_tx_hw_enqueue_li(struct dp_soc *soc, struct dp_vdev *vdev,
  290. struct dp_tx_desc_s *tx_desc, uint16_t fw_metadata,
  291. struct cdp_tx_exception_metadata *tx_exc_metadata,
  292. struct dp_tx_msdu_info_s *msdu_info)
  293. {
  294. void *hal_tx_desc;
  295. uint32_t *hal_tx_desc_cached;
  296. int coalesce = 0;
  297. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  298. uint8_t ring_id = tx_q->ring_id & DP_TX_QUEUE_MASK;
  299. uint8_t tid = msdu_info->tid;
  300. /*
  301. * Setting it initialization statically here to avoid
  302. * a memset call jump with qdf_mem_set call
  303. */
  304. uint8_t cached_desc[HAL_TX_DESC_LEN_BYTES] = { 0 };
  305. enum cdp_sec_type sec_type = ((tx_exc_metadata &&
  306. tx_exc_metadata->sec_type != CDP_INVALID_SEC_TYPE) ?
  307. tx_exc_metadata->sec_type : vdev->sec_type);
  308. /* Return Buffer Manager ID */
  309. uint8_t bm_id = dp_tx_get_rbm_id_li(soc, ring_id);
  310. hal_ring_handle_t hal_ring_hdl = NULL;
  311. QDF_STATUS status = QDF_STATUS_E_RESOURCES;
  312. if (!dp_tx_is_desc_id_valid(soc, tx_desc->id)) {
  313. dp_err_rl("Invalid tx desc id:%d", tx_desc->id);
  314. return QDF_STATUS_E_RESOURCES;
  315. }
  316. hal_tx_desc_cached = (void *)cached_desc;
  317. hal_tx_desc_set_buf_addr(soc->hal_soc, hal_tx_desc_cached,
  318. tx_desc->dma_addr, bm_id, tx_desc->id,
  319. (tx_desc->flags & DP_TX_DESC_FLAG_FRAG));
  320. hal_tx_desc_set_lmac_id_li(soc->hal_soc, hal_tx_desc_cached,
  321. vdev->lmac_id);
  322. hal_tx_desc_set_search_type_li(soc->hal_soc, hal_tx_desc_cached,
  323. vdev->search_type);
  324. hal_tx_desc_set_search_index_li(soc->hal_soc, hal_tx_desc_cached,
  325. vdev->bss_ast_idx);
  326. hal_tx_desc_set_dscp_tid_table_id(soc->hal_soc, hal_tx_desc_cached,
  327. vdev->dscp_tid_map_id);
  328. hal_tx_desc_set_encrypt_type(hal_tx_desc_cached,
  329. sec_type_map[sec_type]);
  330. hal_tx_desc_set_cache_set_num(soc->hal_soc, hal_tx_desc_cached,
  331. (vdev->bss_ast_hash & 0xF));
  332. hal_tx_desc_set_fw_metadata(hal_tx_desc_cached, fw_metadata);
  333. hal_tx_desc_set_buf_length(hal_tx_desc_cached, tx_desc->length);
  334. hal_tx_desc_set_buf_offset(hal_tx_desc_cached, tx_desc->pkt_offset);
  335. hal_tx_desc_set_encap_type(hal_tx_desc_cached, tx_desc->tx_encap_type);
  336. hal_tx_desc_set_addr_search_flags(hal_tx_desc_cached,
  337. vdev->hal_desc_addr_search_flags);
  338. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  339. hal_tx_desc_set_to_fw(hal_tx_desc_cached, 1);
  340. /* verify checksum offload configuration*/
  341. if ((qdf_nbuf_get_tx_cksum(tx_desc->nbuf) ==
  342. QDF_NBUF_TX_CKSUM_TCP_UDP) ||
  343. qdf_nbuf_is_tso(tx_desc->nbuf)) {
  344. hal_tx_desc_set_l3_checksum_en(hal_tx_desc_cached, 1);
  345. hal_tx_desc_set_l4_checksum_en(hal_tx_desc_cached, 1);
  346. }
  347. if (tid != HTT_TX_EXT_TID_INVALID)
  348. hal_tx_desc_set_hlos_tid(hal_tx_desc_cached, tid);
  349. if (tx_desc->flags & DP_TX_DESC_FLAG_MESH)
  350. hal_tx_desc_set_mesh_en(soc->hal_soc, hal_tx_desc_cached, 1);
  351. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  352. qdf_unlikely(
  353. wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)) ||
  354. dp_tx_pkt_tracepoints_enabled() ||
  355. qdf_unlikely(soc->rdkstats_enabled))
  356. tx_desc->timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  357. else
  358. dp_tx_desc_set_timestamp(tx_desc);
  359. dp_verbose_debug("length:%d , type = %d, dma_addr %llx, offset %d desc id %u",
  360. tx_desc->length,
  361. (tx_desc->flags & DP_TX_DESC_FLAG_FRAG),
  362. (uint64_t)tx_desc->dma_addr, tx_desc->pkt_offset,
  363. tx_desc->id);
  364. hal_ring_hdl = dp_tx_get_hal_ring_hdl(soc, ring_id);
  365. if (qdf_unlikely(dp_tx_hal_ring_access_start(soc, hal_ring_hdl))) {
  366. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  367. "%s %d : HAL RING Access Failed -- %pK",
  368. __func__, __LINE__, hal_ring_hdl);
  369. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  370. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  371. return status;
  372. }
  373. dp_tx_clear_consumed_hw_descs(soc, hal_ring_hdl);
  374. /* Sync cached descriptor with HW */
  375. hal_tx_desc = hal_srng_src_get_next(soc->hal_soc, hal_ring_hdl);
  376. if (qdf_unlikely(!hal_tx_desc)) {
  377. dp_verbose_debug("TCL ring full ring_id:%d", ring_id);
  378. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  379. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  380. goto ring_access_fail;
  381. }
  382. tx_desc->flags |= DP_TX_DESC_FLAG_QUEUED_TX;
  383. dp_vdev_peer_stats_update_protocol_cnt_tx(vdev, tx_desc->nbuf);
  384. hal_tx_desc_sync(hal_tx_desc_cached, hal_tx_desc);
  385. coalesce = dp_tx_attempt_coalescing(soc, vdev, tx_desc, tid);
  386. DP_STATS_INC_PKT(vdev, tx_i.processed, 1, tx_desc->length);
  387. DP_STATS_INC(soc, tx.tcl_enq[ring_id], 1);
  388. dp_tx_update_stats(soc, tx_desc->nbuf);
  389. status = QDF_STATUS_SUCCESS;
  390. dp_tx_hw_desc_update_evt((uint8_t *)hal_tx_desc_cached,
  391. hal_ring_hdl, soc);
  392. ring_access_fail:
  393. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, coalesce);
  394. dp_pkt_add_timestamp(vdev, QDF_PKT_TX_DRIVER_EXIT,
  395. qdf_get_log_timestamp(), tx_desc->nbuf);
  396. return status;
  397. }
  398. QDF_STATUS dp_tx_desc_pool_init_li(struct dp_soc *soc,
  399. uint16_t num_elem,
  400. uint8_t pool_id)
  401. {
  402. uint32_t id, count, page_id, offset, pool_id_32;
  403. struct dp_tx_desc_s *tx_desc;
  404. struct dp_tx_desc_pool_s *tx_desc_pool;
  405. uint16_t num_desc_per_page;
  406. tx_desc_pool = &soc->tx_desc[pool_id];
  407. tx_desc = tx_desc_pool->freelist;
  408. count = 0;
  409. pool_id_32 = (uint32_t)pool_id;
  410. num_desc_per_page = tx_desc_pool->desc_pages.num_element_per_page;
  411. while (tx_desc) {
  412. page_id = count / num_desc_per_page;
  413. offset = count % num_desc_per_page;
  414. id = ((pool_id_32 << DP_TX_DESC_ID_POOL_OS) |
  415. (page_id << DP_TX_DESC_ID_PAGE_OS) | offset);
  416. tx_desc->id = id;
  417. tx_desc->pool_id = pool_id;
  418. dp_tx_desc_set_magic(tx_desc, DP_TX_MAGIC_PATTERN_FREE);
  419. tx_desc = tx_desc->next;
  420. count++;
  421. }
  422. return QDF_STATUS_SUCCESS;
  423. }
  424. void dp_tx_desc_pool_deinit_li(struct dp_soc *soc,
  425. struct dp_tx_desc_pool_s *tx_desc_pool,
  426. uint8_t pool_id)
  427. {
  428. }