dp_rx_mon_status.c 44 KB

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  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  35. #include "dp_rx_mon_feature.h"
  36. #else
  37. static QDF_STATUS
  38. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  39. struct hal_rx_ppdu_info *ppdu_info)
  40. {
  41. return QDF_STATUS_SUCCESS;
  42. }
  43. static void
  44. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  45. qdf_nbuf_t status_nbuf,
  46. struct hal_rx_ppdu_info *ppdu_info,
  47. bool *nbuf_used)
  48. {
  49. }
  50. #endif
  51. #ifdef FEATURE_PERPKT_INFO
  52. static inline void
  53. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  54. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  55. {
  56. uint8_t chain, bw;
  57. int8_t rssi;
  58. for (chain = 0; chain < SS_COUNT; chain++) {
  59. for (bw = 0; bw < MAX_BW; bw++) {
  60. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  61. if (rssi != DP_RSSI_INVAL)
  62. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  63. else
  64. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  65. }
  66. }
  67. }
  68. /*
  69. * dp_rx_populate_su_evm_details() - Populate su evm info
  70. * @ppdu_info: ppdu info structure from ppdu ring
  71. * @cdp_rx_ppdu: rx ppdu indication structure
  72. */
  73. static inline void
  74. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  75. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  76. {
  77. uint8_t pilot_evm;
  78. uint8_t nss_count;
  79. uint8_t pilot_count;
  80. nss_count = ppdu_info->evm_info.nss_count;
  81. pilot_count = ppdu_info->evm_info.pilot_count;
  82. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  83. qdf_err("pilot evm count is more than expected");
  84. return;
  85. }
  86. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  87. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  88. /* Populate evm for pilot_evm = nss_count*pilot_count */
  89. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  90. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  91. ppdu_info->evm_info.pilot_evm[pilot_evm];
  92. }
  93. }
  94. /**
  95. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  96. * @pdev: pdev ctx
  97. * @rx_user_status: mon rx user status
  98. *
  99. * Return: bool
  100. */
  101. static inline bool
  102. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  103. struct mon_rx_user_status *rx_user_status)
  104. {
  105. uint32_t ru_size;
  106. bool is_data;
  107. ru_size = rx_user_status->dl_ofdma_ru_size;
  108. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  109. DP_STATS_INC(pdev,
  110. ul_ofdma.data_rx_ru_size[ru_size], 1);
  111. is_data = true;
  112. } else {
  113. DP_STATS_INC(pdev,
  114. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  115. is_data = false;
  116. }
  117. return is_data;
  118. }
  119. /**
  120. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  121. * @pdev: pdev ctx
  122. * @ppdu_info: ppdu info structure from ppdu ring
  123. * @ppdu_nbuf: qdf nbuf abstraction for linux skb
  124. *
  125. * Return: none
  126. */
  127. static inline void
  128. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  129. struct hal_rx_ppdu_info *ppdu_info,
  130. qdf_nbuf_t ppdu_nbuf)
  131. {
  132. struct dp_peer *peer;
  133. struct dp_soc *soc = pdev->soc;
  134. struct dp_ast_entry *ast_entry;
  135. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  136. uint32_t ast_index;
  137. int i;
  138. struct mon_rx_user_status *rx_user_status;
  139. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  140. int ru_size;
  141. bool is_data = false;
  142. uint32_t num_users;
  143. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  144. num_users = ppdu_info->com_info.num_users;
  145. for (i = 0; i < num_users; i++) {
  146. if (i > OFDMA_NUM_USERS)
  147. return;
  148. rx_user_status = &ppdu_info->rx_user_status[i];
  149. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  150. ast_index = rx_user_status->ast_index;
  151. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  152. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  153. return;
  154. }
  155. ast_entry = soc->ast_table[ast_index];
  156. if (!ast_entry) {
  157. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  158. return;
  159. }
  160. peer = ast_entry->peer;
  161. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  162. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  163. return;
  164. }
  165. rx_stats_peruser->first_data_seq_ctrl =
  166. rx_user_status->first_data_seq_ctrl;
  167. rx_stats_peruser->frame_control =
  168. rx_user_status->frame_control;
  169. rx_stats_peruser->tcp_msdu_count =
  170. rx_user_status->tcp_msdu_count;
  171. rx_stats_peruser->udp_msdu_count =
  172. rx_user_status->udp_msdu_count;
  173. rx_stats_peruser->other_msdu_count =
  174. rx_user_status->other_msdu_count;
  175. rx_stats_peruser->preamble_type =
  176. rx_user_status->preamble_type;
  177. rx_stats_peruser->mpdu_cnt_fcs_ok =
  178. rx_user_status->mpdu_cnt_fcs_ok;
  179. rx_stats_peruser->mpdu_cnt_fcs_err =
  180. rx_user_status->mpdu_cnt_fcs_err;
  181. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  182. &rx_user_status->mpdu_fcs_ok_bitmap,
  183. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  184. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  185. rx_stats_peruser->mpdu_ok_byte_count =
  186. rx_user_status->mpdu_ok_byte_count;
  187. rx_stats_peruser->mpdu_err_byte_count =
  188. rx_user_status->mpdu_err_byte_count;
  189. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  190. cdp_rx_ppdu->num_msdu +=
  191. (rx_stats_peruser->tcp_msdu_count +
  192. rx_stats_peruser->udp_msdu_count +
  193. rx_stats_peruser->other_msdu_count);
  194. rx_stats_peruser->retries =
  195. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  196. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  197. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  198. rx_stats_peruser->is_ampdu = 1;
  199. else
  200. rx_stats_peruser->is_ampdu = 0;
  201. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  202. qdf_mem_copy(rx_stats_peruser->mac_addr,
  203. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  204. rx_stats_peruser->peer_id = peer->peer_ids[0];
  205. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  206. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  207. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA) {
  208. if (rx_user_status->ofdma_info_valid) {
  209. rx_stats_peruser->nss = rx_user_status->nss;
  210. rx_stats_peruser->mcs = rx_user_status->mcs;
  211. rx_stats_peruser->ofdma_info_valid =
  212. rx_user_status->ofdma_info_valid;
  213. rx_stats_peruser->ofdma_ru_start_index =
  214. rx_user_status->dl_ofdma_ru_start_index;
  215. rx_stats_peruser->ofdma_ru_width =
  216. rx_user_status->dl_ofdma_ru_width;
  217. rx_stats_peruser->user_index = i;
  218. ru_size = rx_user_status->dl_ofdma_ru_size;
  219. /*
  220. * max RU size will be equal to
  221. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  222. */
  223. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  224. dp_err("invalid ru_size %d\n",
  225. ru_size);
  226. return;
  227. }
  228. is_data = dp_rx_inc_rusize_cnt(pdev,
  229. rx_user_status);
  230. } else {
  231. rx_stats_peruser->ofdma_info_valid = 0;
  232. }
  233. if (is_data) {
  234. /* counter to get number of MU OFDMA */
  235. pdev->stats.ul_ofdma.data_rx_ppdu++;
  236. pdev->stats.ul_ofdma.data_users[num_users]++;
  237. }
  238. }
  239. }
  240. }
  241. /**
  242. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  243. * @pdev: pdev ctx
  244. * @ppdu_info: ppdu info structure from ppdu ring
  245. * @ppdu_nbuf: qdf nbuf abstraction for linux skb
  246. *
  247. * Return: none
  248. */
  249. static inline void
  250. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  251. struct hal_rx_ppdu_info *ppdu_info,
  252. qdf_nbuf_t ppdu_nbuf)
  253. {
  254. struct dp_peer *peer;
  255. struct dp_soc *soc = pdev->soc;
  256. struct dp_ast_entry *ast_entry;
  257. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  258. uint32_t ast_index;
  259. uint32_t i;
  260. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  261. cdp_rx_ppdu->first_data_seq_ctrl =
  262. ppdu_info->rx_status.first_data_seq_ctrl;
  263. cdp_rx_ppdu->frame_ctrl =
  264. ppdu_info->rx_status.frame_control;
  265. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  266. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  267. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  268. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  269. /* num mpdu is consolidated and added together in num user loop */
  270. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  271. /* num msdu is consolidated and added together in num user loop */
  272. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  273. cdp_rx_ppdu->udp_msdu_count +
  274. cdp_rx_ppdu->other_msdu_count);
  275. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  276. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  277. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  278. cdp_rx_ppdu->is_ampdu = 1;
  279. else
  280. cdp_rx_ppdu->is_ampdu = 0;
  281. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  282. ast_index = ppdu_info->rx_status.ast_index;
  283. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  284. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  285. return;
  286. }
  287. ast_entry = soc->ast_table[ast_index];
  288. if (!ast_entry) {
  289. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  290. return;
  291. }
  292. peer = ast_entry->peer;
  293. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  294. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  295. return;
  296. }
  297. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  298. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  299. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  300. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  301. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  302. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  303. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  304. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  305. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  306. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  307. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  308. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  309. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  310. else
  311. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  312. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  313. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  314. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  315. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  316. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  317. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  318. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  319. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  320. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  321. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  322. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  323. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  324. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  325. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  326. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  327. for (i = 0; i < MAX_CHAIN; i++)
  328. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  329. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  330. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  331. cdp_rx_ppdu->num_mpdu = 0;
  332. cdp_rx_ppdu->num_msdu = 0;
  333. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, ppdu_nbuf);
  334. }
  335. #else
  336. static inline void
  337. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  338. struct hal_rx_ppdu_info *ppdu_info,
  339. qdf_nbuf_t ppdu_nbuf)
  340. {
  341. }
  342. #endif
  343. /**
  344. * dp_rx_stats_update() - Update per-peer statistics
  345. * @soc: Datapath SOC handle
  346. * @peer: Datapath peer handle
  347. * @ppdu: PPDU Descriptor
  348. *
  349. * Return: None
  350. */
  351. #ifdef FEATURE_PERPKT_INFO
  352. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  353. struct cdp_rx_indication_ppdu *ppdu)
  354. {
  355. uint32_t ratekbps = 0;
  356. uint32_t ppdu_rx_rate = 0;
  357. uint32_t nss = 0;
  358. uint32_t rix;
  359. uint16_t ratecode;
  360. if (!peer || !ppdu)
  361. return;
  362. if (ppdu->u.nss == 0)
  363. nss = 0;
  364. else
  365. nss = ppdu->u.nss - 1;
  366. ratekbps = dp_getrateindex(ppdu->u.gi,
  367. ppdu->u.mcs,
  368. nss,
  369. ppdu->u.preamble,
  370. ppdu->u.bw,
  371. &rix,
  372. &ratecode);
  373. if (!ratekbps)
  374. return;
  375. ppdu->rix = rix;
  376. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  377. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  378. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  379. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  380. ppdu->rx_ratekbps = ratekbps;
  381. ppdu->rx_ratecode = ratecode;
  382. if (peer->vdev)
  383. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  384. }
  385. static void dp_rx_stats_update(struct dp_pdev *pdev, struct dp_peer *peer,
  386. struct cdp_rx_indication_ppdu *ppdu)
  387. {
  388. struct dp_soc *soc = NULL;
  389. uint8_t mcs, preamble, ac = 0;
  390. uint16_t num_msdu;
  391. bool is_invalid_peer = false;
  392. mcs = ppdu->u.mcs;
  393. preamble = ppdu->u.preamble;
  394. num_msdu = ppdu->num_msdu;
  395. if (pdev)
  396. soc = pdev->soc;
  397. else
  398. return;
  399. if (!peer) {
  400. is_invalid_peer = true;
  401. peer = pdev->invalid_peer;
  402. }
  403. if (!soc || soc->process_rx_status)
  404. return;
  405. DP_STATS_UPD(peer, rx.rssi, ppdu->rssi);
  406. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  407. peer->stats.rx.avg_rssi = ppdu->rssi;
  408. else
  409. peer->stats.rx.avg_rssi =
  410. DP_GET_AVG_RSSI(peer->stats.rx.avg_rssi, ppdu->rssi);
  411. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  412. ppdu->u.nss = 1;
  413. if (ppdu->u.nss)
  414. DP_STATS_INC(peer, rx.nss[ppdu->u.nss - 1], num_msdu);
  415. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  416. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  417. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type], num_msdu);
  418. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu, ppdu->is_ampdu);
  419. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu, !(ppdu->is_ampdu));
  420. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  421. DP_STATS_INCC(peer,
  422. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  423. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  424. DP_STATS_INCC(peer,
  425. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  426. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  427. DP_STATS_INCC(peer,
  428. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  429. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  430. DP_STATS_INCC(peer,
  431. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  432. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  433. DP_STATS_INCC(peer,
  434. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  435. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  436. DP_STATS_INCC(peer,
  437. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  438. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  439. DP_STATS_INCC(peer,
  440. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  441. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  442. DP_STATS_INCC(peer,
  443. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  444. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  445. DP_STATS_INCC(peer,
  446. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  447. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  448. DP_STATS_INCC(peer,
  449. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  450. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  451. /*
  452. * If invalid TID, it could be a non-qos frame, hence do not update
  453. * any AC counters
  454. */
  455. ac = TID_TO_WME_AC(ppdu->tid);
  456. if (ppdu->tid != HAL_TID_INVALID)
  457. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  458. dp_peer_stats_notify(peer);
  459. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  460. if (is_invalid_peer)
  461. return;
  462. if (dp_is_subtype_data(ppdu->frame_ctrl))
  463. dp_rx_rate_stats_update(peer, ppdu);
  464. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  465. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  466. &peer->stats, ppdu->peer_id,
  467. UPDATE_PEER_STATS, pdev->pdev_id);
  468. #endif
  469. }
  470. #endif
  471. /*
  472. * dp_rx_get_fcs_ok_msdu() - get ppdu status buffer containing fcs_ok msdu
  473. * @pdev: pdev object
  474. * @ppdu_info: ppdu info object
  475. *
  476. * Return: nbuf
  477. */
  478. static inline qdf_nbuf_t
  479. dp_rx_get_fcs_ok_msdu(struct dp_pdev *pdev,
  480. struct hal_rx_ppdu_info *ppdu_info)
  481. {
  482. uint16_t mpdu_fcs_ok;
  483. qdf_nbuf_t status_nbuf = NULL;
  484. unsigned long *fcs_ok_bitmap;
  485. if (qdf_unlikely(qdf_nbuf_is_queue_empty(&pdev->rx_ppdu_buf_q)))
  486. return NULL;
  487. /* Obtain fcs_ok passed index from bitmap
  488. * this index is used to get fcs passed first msdu payload
  489. */
  490. fcs_ok_bitmap =
  491. (unsigned long *)&ppdu_info->com_info.mpdu_fcs_ok_bitmap[0];
  492. mpdu_fcs_ok = qdf_find_first_bit(fcs_ok_bitmap,
  493. HAL_RX_MAX_MPDU);
  494. if (qdf_unlikely(mpdu_fcs_ok >= HAL_RX_MAX_MPDU))
  495. goto end;
  496. if (qdf_unlikely(!ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf))
  497. goto end;
  498. /* Get status buffer by indexing mpdu_fcs_ok index
  499. * containing first msdu payload with fcs passed
  500. * and clone the buffer
  501. */
  502. status_nbuf = ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf;
  503. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf = NULL;
  504. /* Take ref of status nbuf as this nbuf is to be
  505. * freeed by upper layer.
  506. */
  507. qdf_nbuf_ref(status_nbuf);
  508. ppdu_info->fcs_ok_msdu_info.first_msdu_payload =
  509. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].first_msdu_payload;
  510. ppdu_info->fcs_ok_msdu_info.payload_len =
  511. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].payload_len;
  512. end:
  513. /* Free the ppdu status buffer queue */
  514. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  515. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  516. (ppdu_info->com_info.mpdu_cnt_fcs_ok +
  517. ppdu_info->com_info.mpdu_cnt_fcs_err)
  518. * sizeof(struct hal_rx_msdu_payload_info));
  519. return status_nbuf;
  520. }
  521. static inline void
  522. dp_rx_handle_ppdu_status_buf(struct dp_pdev *pdev,
  523. struct hal_rx_ppdu_info *ppdu_info,
  524. qdf_nbuf_t status_nbuf)
  525. {
  526. qdf_nbuf_t dropnbuf;
  527. if (qdf_nbuf_queue_len(&pdev->rx_ppdu_buf_q) >
  528. HAL_RX_MAX_MPDU) {
  529. dropnbuf = qdf_nbuf_queue_remove(&pdev->rx_ppdu_buf_q);
  530. qdf_nbuf_free(dropnbuf);
  531. }
  532. qdf_nbuf_queue_add(&pdev->rx_ppdu_buf_q, status_nbuf);
  533. }
  534. /**
  535. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  536. * @soc: core txrx main context
  537. * @pdev: pdev strcuture
  538. * @ppdu_info: structure for rx ppdu ring
  539. *
  540. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  541. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  542. */
  543. #ifdef FEATURE_PERPKT_INFO
  544. static inline QDF_STATUS
  545. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  546. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  547. {
  548. uint8_t size = 0;
  549. struct ieee80211_frame *wh;
  550. uint32_t *nbuf_data;
  551. if (!ppdu_info->fcs_ok_msdu_info.first_msdu_payload)
  552. return QDF_STATUS_SUCCESS;
  553. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  554. return QDF_STATUS_SUCCESS;
  555. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  556. wh = (struct ieee80211_frame *)
  557. (ppdu_info->fcs_ok_msdu_info.first_msdu_payload + 4);
  558. size = (ppdu_info->fcs_ok_msdu_info.first_msdu_payload -
  559. qdf_nbuf_data(nbuf));
  560. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  561. return QDF_STATUS_SUCCESS;
  562. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  563. IEEE80211_FC0_TYPE_MGT) ||
  564. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  565. IEEE80211_FC0_TYPE_CTL)) {
  566. return QDF_STATUS_SUCCESS;
  567. }
  568. ppdu_info->fcs_ok_msdu_info.first_msdu_payload = NULL;
  569. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  570. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  571. /* only retain RX MSDU payload in the skb */
  572. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  573. ppdu_info->fcs_ok_msdu_info.payload_len);
  574. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  575. nbuf, HTT_INVALID_PEER, WDI_NO_VAL, pdev->pdev_id);
  576. return QDF_STATUS_E_ALREADY;
  577. }
  578. #else
  579. static inline QDF_STATUS
  580. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  581. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  582. {
  583. return QDF_STATUS_SUCCESS;
  584. }
  585. #endif
  586. #ifdef FEATURE_PERPKT_INFO
  587. static inline void
  588. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  589. struct hal_rx_ppdu_info *ppdu_info,
  590. uint32_t tlv_status,
  591. qdf_nbuf_t status_nbuf)
  592. {
  593. QDF_STATUS mcopy_status;
  594. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt)) {
  595. qdf_nbuf_free(status_nbuf);
  596. return;
  597. }
  598. /* Add buffers to queue until we receive
  599. * HAL_TLV_STATUS_PPDU_DONE
  600. */
  601. dp_rx_handle_ppdu_status_buf(pdev, ppdu_info, status_nbuf);
  602. /* If tlv_status is PPDU_DONE, process rx_ppdu_buf_q
  603. * and devliver fcs_ok msdu buffer
  604. */
  605. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  606. if (qdf_unlikely(ppdu_info->com_info.mpdu_cnt !=
  607. (ppdu_info->com_info.mpdu_cnt_fcs_ok +
  608. ppdu_info->com_info.mpdu_cnt_fcs_err))) {
  609. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  610. return;
  611. }
  612. /* Get rx ppdu status buffer having fcs ok msdu */
  613. status_nbuf = dp_rx_get_fcs_ok_msdu(pdev, ppdu_info);
  614. if (status_nbuf) {
  615. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  616. ppdu_info,
  617. status_nbuf);
  618. if (mcopy_status == QDF_STATUS_SUCCESS)
  619. qdf_nbuf_free(status_nbuf);
  620. }
  621. }
  622. }
  623. #else
  624. static inline void
  625. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  626. struct hal_rx_ppdu_info *ppdu_info,
  627. uint32_t tlv_status,
  628. qdf_nbuf_t status_nbuf)
  629. {
  630. }
  631. #endif
  632. /**
  633. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  634. * @soc: Datapath SOC handle
  635. * @pdev: Datapath PDEV handle
  636. * @ppdu_info: Structure for rx ppdu info
  637. * @nbuf: Qdf nbuf abstraction for linux skb
  638. *
  639. * Return: 0 on success, 1 on failure
  640. */
  641. static inline int
  642. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  643. struct hal_rx_ppdu_info *ppdu_info,
  644. qdf_nbuf_t nbuf)
  645. {
  646. uint8_t size = 0;
  647. if (!pdev->monitor_vdev) {
  648. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  649. "[%s]:[%d] Monitor vdev is NULL !!",
  650. __func__, __LINE__);
  651. return 1;
  652. }
  653. if (!ppdu_info->msdu_info.first_msdu_payload) {
  654. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  655. "[%s]:[%d] First msdu payload not present",
  656. __func__, __LINE__);
  657. return 1;
  658. }
  659. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  660. size = (ppdu_info->msdu_info.first_msdu_payload -
  661. qdf_nbuf_data(nbuf)) + 4;
  662. ppdu_info->msdu_info.first_msdu_payload = NULL;
  663. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  664. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  665. "[%s]:[%d] No header present",
  666. __func__, __LINE__);
  667. return 1;
  668. }
  669. /* Only retain RX MSDU payload in the skb */
  670. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  671. ppdu_info->msdu_info.payload_len);
  672. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  673. qdf_nbuf_headroom(nbuf))) {
  674. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  675. return 1;
  676. }
  677. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  678. nbuf, NULL);
  679. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  680. return 0;
  681. }
  682. /**
  683. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  684. * @soc: core txrx main context
  685. * @pdev: pdev strcuture
  686. * @ppdu_info: structure for rx ppdu ring
  687. *
  688. * Return: none
  689. */
  690. #ifdef FEATURE_PERPKT_INFO
  691. static inline void
  692. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  693. struct hal_rx_ppdu_info *ppdu_info)
  694. {
  695. qdf_nbuf_t ppdu_nbuf;
  696. struct dp_peer *peer;
  697. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  698. /*
  699. * Do not allocate if fcs error,
  700. * ast idx invalid / fctl invalid
  701. */
  702. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  703. return;
  704. if (ppdu_info->nac_info.fc_valid &&
  705. ppdu_info->nac_info.to_ds_flag &&
  706. ppdu_info->nac_info.mac_addr2_valid) {
  707. struct dp_neighbour_peer *peer = NULL;
  708. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  709. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  710. if (pdev->neighbour_peers_added) {
  711. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  712. neighbour_peer_list_elem) {
  713. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  714. &ppdu_info->nac_info.mac_addr2,
  715. QDF_MAC_ADDR_SIZE)) {
  716. peer->rssi = rssi;
  717. break;
  718. }
  719. }
  720. }
  721. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  722. }
  723. /* need not generate wdi event when mcopy and
  724. * enhanced stats are not enabled
  725. */
  726. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en)
  727. return;
  728. if (!pdev->mcopy_mode) {
  729. if (!ppdu_info->rx_status.frame_control_info_valid)
  730. return;
  731. if (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)
  732. return;
  733. }
  734. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  735. sizeof(struct cdp_rx_indication_ppdu), 0, 0, FALSE);
  736. if (ppdu_nbuf) {
  737. dp_rx_populate_cdp_indication_ppdu(pdev, ppdu_info, ppdu_nbuf);
  738. qdf_nbuf_put_tail(ppdu_nbuf,
  739. sizeof(struct cdp_rx_indication_ppdu));
  740. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  741. peer = dp_peer_find_by_id(soc, cdp_rx_ppdu->peer_id);
  742. if (peer) {
  743. cdp_rx_ppdu->cookie = (void *)peer->wlanstats_ctx;
  744. dp_rx_stats_update(pdev, peer, cdp_rx_ppdu);
  745. dp_peer_unref_del_find_by_id(peer);
  746. }
  747. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  748. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  749. soc, ppdu_nbuf,
  750. cdp_rx_ppdu->peer_id,
  751. WDI_NO_VAL, pdev->pdev_id);
  752. } else if (pdev->mcopy_mode) {
  753. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  754. ppdu_nbuf, HTT_INVALID_PEER,
  755. WDI_NO_VAL, pdev->pdev_id);
  756. } else {
  757. qdf_nbuf_free(ppdu_nbuf);
  758. }
  759. }
  760. }
  761. #else
  762. static inline void
  763. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  764. struct hal_rx_ppdu_info *ppdu_info)
  765. {
  766. }
  767. #endif
  768. /**
  769. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  770. * filtering enabled
  771. * @soc: core txrx main context
  772. * @ppdu_info: Structure for rx ppdu info
  773. * @status_nbuf: Qdf nbuf abstraction for linux skb
  774. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  775. *
  776. * Return: none
  777. */
  778. static inline void
  779. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  780. struct hal_rx_ppdu_info *ppdu_info,
  781. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  782. {
  783. struct dp_peer *peer;
  784. struct dp_ast_entry *ast_entry;
  785. uint32_t ast_index;
  786. ast_index = ppdu_info->rx_status.ast_index;
  787. if (ast_index < (WLAN_UMAC_PSOC_MAX_PEERS * 2)) {
  788. ast_entry = soc->ast_table[ast_index];
  789. if (ast_entry) {
  790. peer = ast_entry->peer;
  791. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  792. if (peer->peer_based_pktlog_filter) {
  793. dp_wdi_event_handler(
  794. WDI_EVENT_RX_DESC, soc,
  795. status_nbuf,
  796. peer->peer_ids[0],
  797. WDI_NO_VAL, mac_id);
  798. }
  799. }
  800. }
  801. }
  802. }
  803. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  804. static inline void
  805. dp_rx_ul_ofdma_ru_size_to_width(
  806. uint32_t ru_size,
  807. uint32_t *ru_width)
  808. {
  809. uint32_t width;
  810. width = 0;
  811. switch (ru_size) {
  812. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  813. width = 1;
  814. break;
  815. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  816. width = 2;
  817. break;
  818. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  819. width = 4;
  820. break;
  821. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  822. width = 9;
  823. break;
  824. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  825. width = 18;
  826. break;
  827. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  828. width = 37;
  829. break;
  830. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  831. width = 74;
  832. break;
  833. default:
  834. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  835. "RU size to width convert err");
  836. break;
  837. }
  838. *ru_width = width;
  839. }
  840. static inline void
  841. dp_rx_mon_handle_ofdma_info(struct hal_rx_ppdu_info *ppdu_info)
  842. {
  843. struct mon_rx_user_status *mon_rx_user_status;
  844. uint32_t num_users;
  845. uint32_t i;
  846. uint32_t ul_ofdma_user_v0_word0;
  847. uint32_t ul_ofdma_user_v0_word1;
  848. uint32_t ru_width;
  849. if (ppdu_info->rx_status.reception_type != HAL_RX_TYPE_MU_OFDMA)
  850. return;
  851. num_users = ppdu_info->com_info.num_users;
  852. if (num_users > HAL_MAX_UL_MU_USERS)
  853. num_users = HAL_MAX_UL_MU_USERS;
  854. for (i = 0; i < num_users; i++) {
  855. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  856. ul_ofdma_user_v0_word0 =
  857. mon_rx_user_status->ul_ofdma_user_v0_word0;
  858. ul_ofdma_user_v0_word1 =
  859. mon_rx_user_status->ul_ofdma_user_v0_word1;
  860. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  861. ul_ofdma_user_v0_word0) &&
  862. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  863. ul_ofdma_user_v0_word0)) {
  864. mon_rx_user_status->mcs =
  865. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  866. ul_ofdma_user_v0_word1);
  867. mon_rx_user_status->nss =
  868. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  869. ul_ofdma_user_v0_word1);
  870. mon_rx_user_status->ofdma_info_valid = 1;
  871. mon_rx_user_status->dl_ofdma_ru_start_index =
  872. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  873. ul_ofdma_user_v0_word1);
  874. dp_rx_ul_ofdma_ru_size_to_width(
  875. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  876. ul_ofdma_user_v0_word1),
  877. &ru_width);
  878. mon_rx_user_status->dl_ofdma_ru_width = ru_width;
  879. }
  880. }
  881. }
  882. #else
  883. static inline void
  884. dp_rx_mon_handle_ofdma_info(struct hal_rx_ppdu_info *ppdu_info)
  885. {
  886. }
  887. #endif
  888. /**
  889. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  890. * buffer on Rx status Queue posted by status SRNG processing.
  891. * @soc: core txrx main context
  892. * @mac_id: mac_id which is one of 3 mac_ids _ring
  893. *
  894. * Return: none
  895. */
  896. static inline void
  897. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  898. uint32_t quota)
  899. {
  900. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  901. struct hal_rx_ppdu_info *ppdu_info;
  902. qdf_nbuf_t status_nbuf;
  903. uint8_t *rx_tlv;
  904. uint8_t *rx_tlv_start;
  905. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  906. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  907. struct cdp_pdev_mon_stats *rx_mon_stats;
  908. int smart_mesh_status;
  909. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  910. bool nbuf_used;
  911. uint32_t rx_enh_capture_mode;
  912. ppdu_info = &pdev->ppdu_info;
  913. rx_mon_stats = &pdev->rx_mon_stats;
  914. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  915. return;
  916. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  917. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  918. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  919. rx_tlv = qdf_nbuf_data(status_nbuf);
  920. rx_tlv_start = rx_tlv;
  921. nbuf_used = false;
  922. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  923. pdev->mcopy_mode ||
  924. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  925. do {
  926. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  927. ppdu_info, pdev->soc->hal_soc,
  928. status_nbuf);
  929. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  930. rx_mon_stats);
  931. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  932. status_nbuf, ppdu_info,
  933. &nbuf_used);
  934. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  935. if ((rx_tlv - rx_tlv_start) >= RX_BUFFER_SIZE)
  936. break;
  937. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  938. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  939. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  940. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  941. }
  942. if (pdev->dp_peer_based_pktlog) {
  943. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  944. status_nbuf, mac_id);
  945. } else {
  946. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  947. pktlog_mode = WDI_EVENT_RX_DESC;
  948. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  949. pktlog_mode = WDI_EVENT_LITE_RX;
  950. if (pktlog_mode != WDI_NO_VAL)
  951. dp_wdi_event_handler(pktlog_mode, soc,
  952. status_nbuf,
  953. HTT_INVALID_PEER,
  954. WDI_NO_VAL, mac_id);
  955. }
  956. /* smart monitor vap and m_copy cannot co-exist */
  957. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  958. && pdev->monitor_vdev) {
  959. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  960. pdev, ppdu_info, status_nbuf);
  961. if (smart_mesh_status)
  962. qdf_nbuf_free(status_nbuf);
  963. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  964. dp_rx_process_mcopy_mode(soc, pdev,
  965. ppdu_info, tlv_status,
  966. status_nbuf);
  967. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  968. if (!nbuf_used)
  969. qdf_nbuf_free(status_nbuf);
  970. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  971. enh_log_status =
  972. dp_rx_handle_enh_capture(soc,
  973. pdev, ppdu_info);
  974. } else {
  975. qdf_nbuf_free(status_nbuf);
  976. }
  977. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  978. dp_rx_mon_deliver_non_std(soc, mac_id);
  979. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  980. rx_mon_stats->status_ppdu_done++;
  981. dp_rx_mon_handle_ofdma_info(ppdu_info);
  982. if (pdev->enhanced_stats_en ||
  983. pdev->mcopy_mode || pdev->neighbour_peers_added)
  984. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  985. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  986. dp_rx_mon_dest_process(soc, mac_id, quota);
  987. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  988. }
  989. }
  990. return;
  991. }
  992. /*
  993. * dp_rx_mon_status_srng_process() - Process monitor status ring
  994. * post the status ring buffer to Rx status Queue for later
  995. * processing when status ring is filled with status TLV.
  996. * Allocate a new buffer to status ring if the filled buffer
  997. * is posted.
  998. *
  999. * @soc: core txrx main context
  1000. * @mac_id: mac_id which is one of 3 mac_ids
  1001. * @quota: No. of ring entry that can be serviced in one shot.
  1002. * Return: uint32_t: No. of ring entry that is processed.
  1003. */
  1004. static inline uint32_t
  1005. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  1006. uint32_t quota)
  1007. {
  1008. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1009. hal_soc_handle_t hal_soc;
  1010. void *mon_status_srng;
  1011. void *rxdma_mon_status_ring_entry;
  1012. QDF_STATUS status;
  1013. uint32_t work_done = 0;
  1014. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1015. mon_status_srng = pdev->rxdma_mon_status_ring[mac_for_pdev].hal_srng;
  1016. qdf_assert(mon_status_srng);
  1017. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1018. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1019. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1020. __func__, __LINE__, mon_status_srng);
  1021. return work_done;
  1022. }
  1023. hal_soc = soc->hal_soc;
  1024. qdf_assert(hal_soc);
  1025. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  1026. goto done;
  1027. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1028. * BUFFER_ADDR_INFO STRUCT
  1029. */
  1030. while (qdf_likely((rxdma_mon_status_ring_entry =
  1031. hal_srng_src_peek(hal_soc, mon_status_srng))
  1032. && quota--)) {
  1033. uint32_t rx_buf_cookie;
  1034. qdf_nbuf_t status_nbuf;
  1035. struct dp_rx_desc *rx_desc;
  1036. uint8_t *status_buf;
  1037. qdf_dma_addr_t paddr;
  1038. uint64_t buf_addr;
  1039. buf_addr =
  1040. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1041. rxdma_mon_status_ring_entry) |
  1042. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1043. rxdma_mon_status_ring_entry)) << 32));
  1044. if (qdf_likely(buf_addr)) {
  1045. rx_buf_cookie =
  1046. HAL_RX_BUF_COOKIE_GET(
  1047. rxdma_mon_status_ring_entry);
  1048. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1049. rx_buf_cookie);
  1050. qdf_assert(rx_desc);
  1051. status_nbuf = rx_desc->nbuf;
  1052. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1053. QDF_DMA_FROM_DEVICE);
  1054. status_buf = qdf_nbuf_data(status_nbuf);
  1055. status = hal_get_rx_status_done(status_buf);
  1056. if (status != QDF_STATUS_SUCCESS) {
  1057. uint32_t hp, tp;
  1058. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1059. &tp, &hp);
  1060. QDF_TRACE(QDF_MODULE_ID_DP,
  1061. QDF_TRACE_LEVEL_ERROR,
  1062. "[%s][%d] status not done - hp:%u, tp:%u",
  1063. __func__, __LINE__, hp, tp);
  1064. /* WAR for missing status: Skip status entry */
  1065. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1066. continue;
  1067. }
  1068. qdf_nbuf_set_pktlen(status_nbuf, RX_BUFFER_SIZE);
  1069. qdf_nbuf_unmap_single(soc->osdev, status_nbuf,
  1070. QDF_DMA_FROM_DEVICE);
  1071. /* Put the status_nbuf to queue */
  1072. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1073. } else {
  1074. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1075. union dp_rx_desc_list_elem_t *tail = NULL;
  1076. struct rx_desc_pool *rx_desc_pool;
  1077. uint32_t num_alloc_desc;
  1078. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1079. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1080. rx_desc_pool,
  1081. 1,
  1082. &desc_list,
  1083. &tail);
  1084. /*
  1085. * No free descriptors available
  1086. */
  1087. if (qdf_unlikely(num_alloc_desc == 0)) {
  1088. work_done++;
  1089. break;
  1090. }
  1091. rx_desc = &desc_list->rx_desc;
  1092. }
  1093. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1094. /*
  1095. * qdf_nbuf alloc or map failed,
  1096. * free the dp rx desc to free list,
  1097. * fill in NULL dma address at current HP entry,
  1098. * keep HP in mon_status_ring unchanged,
  1099. * wait next time dp_rx_mon_status_srng_process
  1100. * to fill in buffer at current HP.
  1101. */
  1102. if (qdf_unlikely(!status_nbuf)) {
  1103. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1104. union dp_rx_desc_list_elem_t *tail = NULL;
  1105. struct rx_desc_pool *rx_desc_pool;
  1106. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1108. "%s: fail to allocate or map qdf_nbuf",
  1109. __func__);
  1110. dp_rx_add_to_free_desc_list(&desc_list,
  1111. &tail, rx_desc);
  1112. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1113. &tail, mac_id, rx_desc_pool);
  1114. hal_rxdma_buff_addr_info_set(
  1115. rxdma_mon_status_ring_entry,
  1116. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1117. work_done++;
  1118. break;
  1119. }
  1120. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1121. rx_desc->nbuf = status_nbuf;
  1122. rx_desc->in_use = 1;
  1123. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1124. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1125. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1126. work_done++;
  1127. }
  1128. done:
  1129. hal_srng_access_end(hal_soc, mon_status_srng);
  1130. return work_done;
  1131. }
  1132. /*
  1133. * dp_rx_mon_status_process() - Process monitor status ring and
  1134. * TLV in status ring.
  1135. *
  1136. * @soc: core txrx main context
  1137. * @mac_id: mac_id which is one of 3 mac_ids
  1138. * @quota: No. of ring entry that can be serviced in one shot.
  1139. * Return: uint32_t: No. of ring entry that is processed.
  1140. */
  1141. static inline uint32_t
  1142. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1143. uint32_t work_done;
  1144. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  1145. quota -= work_done;
  1146. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  1147. return work_done;
  1148. }
  1149. /**
  1150. * dp_mon_process() - Main monitor mode processing roution.
  1151. * This call monitor status ring process then monitor
  1152. * destination ring process.
  1153. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1154. * @soc: core txrx main context
  1155. * @mac_id: mac_id which is one of 3 mac_ids
  1156. * @quota: No. of status ring entry that can be serviced in one shot.
  1157. * Return: uint32_t: No. of ring entry that is processed.
  1158. */
  1159. uint32_t
  1160. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1161. return dp_rx_mon_status_process(soc, mac_id, quota);
  1162. }
  1163. /**
  1164. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  1165. * @pdev: core txrx pdev context
  1166. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1167. *
  1168. * This function will detach DP RX status ring from
  1169. * main device context. will free DP Rx resources for
  1170. * status ring
  1171. *
  1172. * Return: QDF_STATUS_SUCCESS: success
  1173. * QDF_STATUS_E_RESOURCES: Error return
  1174. */
  1175. QDF_STATUS
  1176. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  1177. {
  1178. struct dp_soc *soc = pdev->soc;
  1179. struct rx_desc_pool *rx_desc_pool;
  1180. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1181. if (rx_desc_pool->pool_size != 0) {
  1182. if (!dp_is_soc_reinit(soc))
  1183. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1184. rx_desc_pool);
  1185. else
  1186. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1187. }
  1188. return QDF_STATUS_SUCCESS;
  1189. }
  1190. /*
  1191. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1192. * rx nbufs called during dp rx
  1193. * monitor status ring initialization
  1194. *
  1195. * @soc: core txrx main context
  1196. * @mac_id: mac_id which is one of 3 mac_ids
  1197. * @dp_rxdma_srng: dp monitor status circular ring
  1198. * @rx_desc_pool; Pointer to Rx descriptor pool
  1199. * @num_req_buffers: number of buffer to be replenished
  1200. * @desc_list: list of descs if called from dp rx monitor status
  1201. * process or NULL during dp rx initialization or
  1202. * out of buffer interrupt
  1203. * @tail: tail of descs list
  1204. * @owner: who owns the nbuf (host, NSS etc...)
  1205. * Return: return success or failure
  1206. */
  1207. static inline
  1208. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1209. uint32_t mac_id,
  1210. struct dp_srng *dp_rxdma_srng,
  1211. struct rx_desc_pool *rx_desc_pool,
  1212. uint32_t num_req_buffers,
  1213. union dp_rx_desc_list_elem_t **desc_list,
  1214. union dp_rx_desc_list_elem_t **tail,
  1215. uint8_t owner)
  1216. {
  1217. uint32_t num_alloc_desc;
  1218. uint16_t num_desc_to_free = 0;
  1219. uint32_t num_entries_avail;
  1220. uint32_t count = 0;
  1221. int sync_hw_ptr = 1;
  1222. qdf_dma_addr_t paddr;
  1223. qdf_nbuf_t rx_netbuf;
  1224. void *rxdma_ring_entry;
  1225. union dp_rx_desc_list_elem_t *next;
  1226. void *rxdma_srng;
  1227. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1228. rxdma_srng = dp_rxdma_srng->hal_srng;
  1229. qdf_assert(rxdma_srng);
  1230. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1231. "[%s][%d] requested %d buffers for replenish",
  1232. __func__, __LINE__, num_req_buffers);
  1233. /*
  1234. * if desc_list is NULL, allocate the descs from freelist
  1235. */
  1236. if (!(*desc_list)) {
  1237. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1238. rx_desc_pool,
  1239. num_req_buffers,
  1240. desc_list,
  1241. tail);
  1242. if (!num_alloc_desc) {
  1243. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1244. "[%s][%d] no free rx_descs in freelist",
  1245. __func__, __LINE__);
  1246. return QDF_STATUS_E_NOMEM;
  1247. }
  1248. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1249. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1250. num_alloc_desc);
  1251. num_req_buffers = num_alloc_desc;
  1252. }
  1253. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1254. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1255. rxdma_srng, sync_hw_ptr);
  1256. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1257. "[%s][%d] no of available entries in rxdma ring: %d",
  1258. __func__, __LINE__, num_entries_avail);
  1259. if (num_entries_avail < num_req_buffers) {
  1260. num_desc_to_free = num_req_buffers - num_entries_avail;
  1261. num_req_buffers = num_entries_avail;
  1262. }
  1263. while (count < num_req_buffers) {
  1264. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1265. /*
  1266. * qdf_nbuf alloc or map failed,
  1267. * keep HP in mon_status_ring unchanged,
  1268. * wait dp_rx_mon_status_srng_process
  1269. * to fill in buffer at current HP.
  1270. */
  1271. if (qdf_unlikely(!rx_netbuf)) {
  1272. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1273. "%s: qdf_nbuf allocate or map fail, count %d",
  1274. __func__, count);
  1275. break;
  1276. }
  1277. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1278. next = (*desc_list)->next;
  1279. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  1280. rxdma_srng);
  1281. if (qdf_unlikely(!rxdma_ring_entry)) {
  1282. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1283. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1284. __func__, __LINE__, count);
  1285. qdf_nbuf_unmap_single(dp_soc->osdev, rx_netbuf,
  1286. QDF_DMA_FROM_DEVICE);
  1287. qdf_nbuf_free(rx_netbuf);
  1288. break;
  1289. }
  1290. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1291. (*desc_list)->rx_desc.in_use = 1;
  1292. count++;
  1293. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1294. (*desc_list)->rx_desc.cookie, owner);
  1295. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1296. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  1297. paddr=%pK",
  1298. __func__, __LINE__, &(*desc_list)->rx_desc,
  1299. (*desc_list)->rx_desc.cookie, rx_netbuf,
  1300. (void *)paddr);
  1301. *desc_list = next;
  1302. }
  1303. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1304. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1305. "successfully replenished %d buffers", num_req_buffers);
  1306. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1307. "%d rx desc added back to free list", num_desc_to_free);
  1308. /*
  1309. * add any available free desc back to the free list
  1310. */
  1311. if (*desc_list) {
  1312. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  1313. mac_id, rx_desc_pool);
  1314. }
  1315. return QDF_STATUS_SUCCESS;
  1316. }
  1317. /**
  1318. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  1319. * @pdev: core txrx pdev context
  1320. * @ring_id: ring number
  1321. * This function will attach a DP RX monitor status ring into pDEV
  1322. * and replenish monitor status ring with buffer.
  1323. *
  1324. * Return: QDF_STATUS_SUCCESS: success
  1325. * QDF_STATUS_E_RESOURCES: Error return
  1326. */
  1327. QDF_STATUS
  1328. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  1329. struct dp_soc *soc = pdev->soc;
  1330. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1331. union dp_rx_desc_list_elem_t *tail = NULL;
  1332. struct dp_srng *mon_status_ring;
  1333. uint32_t num_entries;
  1334. uint32_t i;
  1335. struct rx_desc_pool *rx_desc_pool;
  1336. QDF_STATUS status;
  1337. int mac_for_pdev = dp_get_mac_id_for_mac(soc, ring_id);
  1338. mon_status_ring = &pdev->rxdma_mon_status_ring[mac_for_pdev];
  1339. num_entries = mon_status_ring->num_entries;
  1340. rx_desc_pool = &soc->rx_desc_status[ring_id];
  1341. dp_info("Mon RX Status Pool[%d] entries=%d",
  1342. ring_id, num_entries);
  1343. status = dp_rx_desc_pool_alloc(soc, ring_id, num_entries + 1,
  1344. rx_desc_pool);
  1345. if (!QDF_IS_STATUS_SUCCESS(status))
  1346. return status;
  1347. dp_debug("Mon RX Status Buffers Replenish ring_id=%d", ring_id);
  1348. status = dp_rx_mon_status_buffers_replenish(soc, ring_id,
  1349. mon_status_ring,
  1350. rx_desc_pool,
  1351. num_entries,
  1352. &desc_list, &tail,
  1353. HAL_RX_BUF_RBM_SW3_BM);
  1354. if (!QDF_IS_STATUS_SUCCESS(status))
  1355. return status;
  1356. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1357. qdf_nbuf_queue_init(&pdev->rx_ppdu_buf_q);
  1358. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1359. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  1360. sizeof(pdev->ppdu_info.rx_status));
  1361. qdf_mem_zero(&pdev->rx_mon_stats,
  1362. sizeof(pdev->rx_mon_stats));
  1363. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1364. &pdev->rx_mon_stats);
  1365. for (i = 0; i < MAX_MU_USERS; i++) {
  1366. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1367. pdev->is_mpdu_hdr[i] = true;
  1368. }
  1369. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1370. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1371. return QDF_STATUS_SUCCESS;
  1372. }