2edb0c0388
RHINE is soft UMAC based architecture which is not having REO block, all the REO functionality will be implemented in F.W and host level. Host will get the RX packets in CE-RX rings in HTT format, to reap RX packets new HTT messages will be extracted and parsed. So implement RX handling based on new softumac architecture for RHINE. Change-Id: If430dd017309e2b2a3eb5e27e1d8b58696abceb4 CRs-Fixed: 3382920
216 行
5.7 KiB
C
216 行
5.7 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _DP_RH_RX_H_
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#define _DP_RH_RX_H_
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#include <dp_types.h>
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#include <dp_rx.h>
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#include "dp_rh.h"
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/**
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* dp_rx_desc_pool_init_rh() - Initialize Rx Descriptor pool(s)
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* @soc: Handle to DP Soc structure
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* @rx_desc_pool: Rx descriptor pool handler
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* @pool_id: Rx descriptor pool ID
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*
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* Return: None
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*/
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QDF_STATUS dp_rx_desc_pool_init_rh(struct dp_soc *soc,
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struct rx_desc_pool *rx_desc_pool,
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uint32_t pool_id);
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/**
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* dp_rx_desc_pool_deinit_rh() - De-initialize Rx Descriptor pool(s)
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* @soc: Handle to DP Soc structure
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* @rx_desc_pool: Rx descriptor pool handler
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* @pool_id: Rx descriptor pool ID
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*
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* Return: None
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*/
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void dp_rx_desc_pool_deinit_rh(struct dp_soc *soc,
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struct rx_desc_pool *rx_desc_pool,
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uint32_t pool_id);
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/**
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* dp_rx_desc_cookie_2_va_rh() - Convert RX Desc cookie ID to VA
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* @soc:Handle to DP Soc structure
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* @cookie: cookie used to lookup virtual address
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*
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* Return: Rx descriptor virtual address
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*/
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static inline
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struct dp_rx_desc *dp_rx_desc_cookie_2_va_rh(struct dp_soc *soc,
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uint32_t cookie)
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{
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return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
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}
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#define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
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#define DP_PEER_METADATA_VDEV_ID_SHIFT 16
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#define DP_PEER_METADATA_OFFLOAD_MASK 0x01000000
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#define DP_PEER_METADATA_OFFLOAD_SHIFT 24
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#define DP_PEER_METADATA_VDEV_ID_GET_RH(_peer_metadata) \
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(((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
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>> DP_PEER_METADATA_VDEV_ID_SHIFT)
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#define DP_PEER_METADATA_OFFLOAD_GET_RH(_peer_metadata) \
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(((_peer_metadata) & DP_PEER_METADATA_OFFLOAD_MASK) \
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>> DP_PEER_METADATA_OFFLOAD_SHIFT)
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static inline uint16_t
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dp_rx_peer_metadata_peer_id_get_rh(struct dp_soc *soc, uint32_t peer_metadata)
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{
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struct htt_rx_peer_metadata_v0 *metadata =
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(struct htt_rx_peer_metadata_v0 *)&peer_metadata;
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return metadata->peer_id;
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}
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/**
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* dp_rx_data_flush() - Flush RX data after reaping from RX rings
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*
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* @data: reference to flush RX data
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*
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* Return: None
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*/
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void
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dp_rx_data_flush(void *data);
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/**
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* dp_rx_data_indication_handler() - Indicate when RX data is available in rings
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*
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* @soc:DP soc reference
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* @data_ind: Data indication message info
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* @vdev_id: Vdev id
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* @peer_id: Peer id
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* @msdu_count: Number of MSDUs available in message
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*
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* Return: None
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*/
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void
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dp_rx_data_indication_handler(struct dp_soc *soc, qdf_nbuf_t data_ind,
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uint16_t vdev_id, uint16_t peer_id,
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uint16_t msdu_count);
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/**
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* dp_rx_frag_indication_handler() - Indicate when RX frag data is available in ring
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*
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* @soc:DP soc reference
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* @data_ind: Data indication message info
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* @vdev_id: Vdev id
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* @peer_id: Peer id
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*
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* Return: None
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*/
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void
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dp_rx_frag_indication_handler(struct dp_soc *soc, qdf_nbuf_t data_ind,
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uint16_t vdev_id, uint16_t peer_id);
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static inline bool
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dp_rx_intrabss_handle_nawds_rh(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
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qdf_nbuf_t nbuf_copy,
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struct cdp_tid_rx_stats *tid_stats)
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{
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return false;
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}
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/**
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* dp_wbm_get_rx_desc_from_hal_desc_rh() - NOP in RH arch implementation
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*
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* @soc: Handle to DP Soc structure
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* @ring_desc: ring descriptor structure pointer
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* @r_rx_desc: pointer to a pointer of Rx Desc
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*
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* Return: QDF_STATUS_SUCCESS - succeeded, others - failed
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*/
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static inline
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QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_rh(
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struct dp_soc *soc,
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void *ring_desc,
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struct dp_rx_desc **r_rx_desc)
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{
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return QDF_STATUS_SUCCESS;
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}
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static inline
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void dp_rx_word_mask_subscribe_rh(struct dp_soc *soc,
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uint32_t *msg_word,
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void *rx_filter)
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{
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}
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static inline
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void dp_peer_get_reo_hash_rh(struct dp_vdev *vdev,
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struct cdp_peer_setup_info *setup_info,
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enum cdp_host_reo_dest_ring *reo_dest,
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bool *hash_based,
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uint8_t *lmac_peer_id_msb)
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{
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}
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static inline
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bool dp_reo_remap_config_rh(struct dp_soc *soc,
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uint32_t *remap0,
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uint32_t *remap1,
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uint32_t *remap2)
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{
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return false;
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}
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/**
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* dp_rx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
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* @soc: DP soc structure
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* @hal_soc: Handle to HAL Soc structure
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* @quota: quota to process
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* @hal_ring_hdl: Destination ring pointer
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* @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
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* @last_prefetched_sw_desc: input & output param of last prefetch SW desc
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*
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* Return: None
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*/
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static inline
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void dp_rx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
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hal_soc_handle_t hal_soc,
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uint32_t quota,
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hal_ring_handle_t hal_ring_hdl,
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hal_ring_desc_t *last_prefetched_hw_desc,
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struct dp_rx_desc **last_prefetched_sw_desc)
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{
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}
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/**
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* dp_peer_rx_reorder_queue_setup_rh() - NOP for RH arch implementation
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* @soc: Handle to HAL Soc structure
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* @peer: DP peer structure
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* @tid: tid id
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* @ba_window_size: BA window size
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*
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* Return: None
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*/
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static inline
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QDF_STATUS dp_peer_rx_reorder_queue_setup_rh(struct dp_soc *soc,
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struct dp_peer *peer,
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int tid,
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uint32_t ba_window_size)
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{
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return QDF_STATUS_SUCCESS;
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}
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#endif
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