dp_main.c 228 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include <cdp_txrx_handle.h>
  36. #include <wlan_cfg.h>
  37. #include "cdp_txrx_cmn_struct.h"
  38. #include "cdp_txrx_stats_struct.h"
  39. #include "cdp_txrx_cmn_reg.h"
  40. #include <qdf_util.h>
  41. #include "dp_peer.h"
  42. #include "dp_rx_mon.h"
  43. #include "htt_stats.h"
  44. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  45. #include "cfg_ucfg_api.h"
  46. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  47. #include "cdp_txrx_flow_ctrl_v2.h"
  48. #else
  49. static inline void
  50. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  51. {
  52. return;
  53. }
  54. #endif
  55. #include "dp_ipa.h"
  56. #ifdef CONFIG_MCL
  57. #ifndef REMOVE_PKT_LOG
  58. #include <pktlog_ac_api.h>
  59. #include <pktlog_ac.h>
  60. #endif
  61. #endif
  62. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  63. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  64. uint8_t *peer_mac_addr,
  65. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  66. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  67. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  68. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  69. #define DP_INTR_POLL_TIMER_MS 10
  70. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  71. #define DP_MCS_LENGTH (6*MAX_MCS)
  72. #define DP_NSS_LENGTH (6*SS_COUNT)
  73. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  74. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  75. #define DP_MAX_MCS_STRING_LEN 30
  76. #define DP_CURR_FW_STATS_AVAIL 19
  77. #define DP_HTT_DBG_EXT_STATS_MAX 256
  78. #define DP_MAX_SLEEP_TIME 100
  79. #ifdef IPA_OFFLOAD
  80. /* Exclude IPA rings from the interrupt context */
  81. #define TX_RING_MASK_VAL 0xb
  82. #define RX_RING_MASK_VAL 0x7
  83. #else
  84. #define TX_RING_MASK_VAL 0xF
  85. #define RX_RING_MASK_VAL 0xF
  86. #endif
  87. #define STR_MAXLEN 64
  88. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  89. /* PPDU stats mask sent to FW to enable enhanced stats */
  90. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  91. /* PPDU stats mask sent to FW to support debug sniffer feature */
  92. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  93. /* PPDU stats mask sent to FW to support BPR feature*/
  94. #define DP_PPDU_STATS_CFG_BPR 0x2000
  95. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  96. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  97. DP_PPDU_STATS_CFG_ENH_STATS)
  98. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  99. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  100. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  101. #define RNG_ERR "SRNG setup failed for"
  102. /**
  103. * default_dscp_tid_map - Default DSCP-TID mapping
  104. *
  105. * DSCP TID
  106. * 000000 0
  107. * 001000 1
  108. * 010000 2
  109. * 011000 3
  110. * 100000 4
  111. * 101000 5
  112. * 110000 6
  113. * 111000 7
  114. */
  115. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  116. 0, 0, 0, 0, 0, 0, 0, 0,
  117. 1, 1, 1, 1, 1, 1, 1, 1,
  118. 2, 2, 2, 2, 2, 2, 2, 2,
  119. 3, 3, 3, 3, 3, 3, 3, 3,
  120. 4, 4, 4, 4, 4, 4, 4, 4,
  121. 5, 5, 5, 5, 5, 5, 5, 5,
  122. 6, 6, 6, 6, 6, 6, 6, 6,
  123. 7, 7, 7, 7, 7, 7, 7, 7,
  124. };
  125. /*
  126. * struct dp_rate_debug
  127. *
  128. * @mcs_type: print string for a given mcs
  129. * @valid: valid mcs rate?
  130. */
  131. struct dp_rate_debug {
  132. char mcs_type[DP_MAX_MCS_STRING_LEN];
  133. uint8_t valid;
  134. };
  135. #define MCS_VALID 1
  136. #define MCS_INVALID 0
  137. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  138. {
  139. {"OFDM 48 Mbps", MCS_VALID},
  140. {"OFDM 24 Mbps", MCS_VALID},
  141. {"OFDM 12 Mbps", MCS_VALID},
  142. {"OFDM 6 Mbps ", MCS_VALID},
  143. {"OFDM 54 Mbps", MCS_VALID},
  144. {"OFDM 36 Mbps", MCS_VALID},
  145. {"OFDM 18 Mbps", MCS_VALID},
  146. {"OFDM 9 Mbps ", MCS_VALID},
  147. {"INVALID ", MCS_INVALID},
  148. {"INVALID ", MCS_INVALID},
  149. {"INVALID ", MCS_INVALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_VALID},
  152. },
  153. {
  154. {"CCK 11 Mbps Long ", MCS_VALID},
  155. {"CCK 5.5 Mbps Long ", MCS_VALID},
  156. {"CCK 2 Mbps Long ", MCS_VALID},
  157. {"CCK 1 Mbps Long ", MCS_VALID},
  158. {"CCK 11 Mbps Short ", MCS_VALID},
  159. {"CCK 5.5 Mbps Short", MCS_VALID},
  160. {"CCK 2 Mbps Short ", MCS_VALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_INVALID},
  164. {"INVALID ", MCS_INVALID},
  165. {"INVALID ", MCS_INVALID},
  166. {"INVALID ", MCS_VALID},
  167. },
  168. {
  169. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  170. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  171. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  172. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  173. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  174. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  175. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  176. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  177. {"INVALID ", MCS_INVALID},
  178. {"INVALID ", MCS_INVALID},
  179. {"INVALID ", MCS_INVALID},
  180. {"INVALID ", MCS_INVALID},
  181. {"INVALID ", MCS_VALID},
  182. },
  183. {
  184. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  185. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  186. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  187. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  188. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  189. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  190. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  191. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  192. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  193. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  194. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  195. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  196. {"INVALID ", MCS_VALID},
  197. },
  198. {
  199. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  200. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  201. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  202. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  203. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  204. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  205. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  206. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  207. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  208. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  209. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  210. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  211. {"INVALID ", MCS_VALID},
  212. }
  213. };
  214. /**
  215. * @brief Cpu ring map types
  216. */
  217. enum dp_cpu_ring_map_types {
  218. DP_DEFAULT_MAP,
  219. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  220. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  221. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  222. DP_CPU_RING_MAP_MAX
  223. };
  224. /**
  225. * @brief Cpu to tx ring map
  226. */
  227. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  228. {0x0, 0x1, 0x2, 0x0},
  229. {0x1, 0x2, 0x1, 0x2},
  230. {0x0, 0x2, 0x0, 0x2},
  231. {0x2, 0x2, 0x2, 0x2}
  232. };
  233. /**
  234. * @brief Select the type of statistics
  235. */
  236. enum dp_stats_type {
  237. STATS_FW = 0,
  238. STATS_HOST = 1,
  239. STATS_TYPE_MAX = 2,
  240. };
  241. /**
  242. * @brief General Firmware statistics options
  243. *
  244. */
  245. enum dp_fw_stats {
  246. TXRX_FW_STATS_INVALID = -1,
  247. };
  248. /**
  249. * dp_stats_mapping_table - Firmware and Host statistics
  250. * currently supported
  251. */
  252. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  253. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  261. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  262. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  263. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  264. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  265. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  266. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  267. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  268. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  269. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  270. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  271. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  272. /* Last ENUM for HTT FW STATS */
  273. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  274. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  275. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  276. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  277. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  278. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  279. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  280. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  281. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  282. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  283. };
  284. /* MCL specific functions */
  285. #ifdef CONFIG_MCL
  286. /**
  287. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  288. * @soc: pointer to dp_soc handle
  289. * @intr_ctx_num: interrupt context number for which mon mask is needed
  290. *
  291. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  292. * This function is returning 0, since in interrupt mode(softirq based RX),
  293. * we donot want to process monitor mode rings in a softirq.
  294. *
  295. * So, in case packet log is enabled for SAP/STA/P2P modes,
  296. * regular interrupt processing will not process monitor mode rings. It would be
  297. * done in a separate timer context.
  298. *
  299. * Return: 0
  300. */
  301. static inline
  302. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  303. {
  304. return 0;
  305. }
  306. /*
  307. * dp_service_mon_rings()- timer to reap monitor rings
  308. * reqd as we are not getting ppdu end interrupts
  309. * @arg: SoC Handle
  310. *
  311. * Return:
  312. *
  313. */
  314. static void dp_service_mon_rings(void *arg)
  315. {
  316. struct dp_soc *soc = (struct dp_soc *)arg;
  317. int ring = 0, work_done, mac_id;
  318. struct dp_pdev *pdev = NULL;
  319. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  320. pdev = soc->pdev_list[ring];
  321. if (!pdev)
  322. continue;
  323. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  324. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  325. pdev->pdev_id);
  326. work_done = dp_mon_process(soc, mac_for_pdev,
  327. QCA_NAPI_BUDGET);
  328. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  329. FL("Reaped %d descs from Monitor rings"),
  330. work_done);
  331. }
  332. }
  333. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  334. }
  335. #ifndef REMOVE_PKT_LOG
  336. /**
  337. * dp_pkt_log_init() - API to initialize packet log
  338. * @ppdev: physical device handle
  339. * @scn: HIF context
  340. *
  341. * Return: none
  342. */
  343. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  344. {
  345. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  346. if (handle->pkt_log_init) {
  347. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  348. "%s: Packet log not initialized", __func__);
  349. return;
  350. }
  351. pktlog_sethandle(&handle->pl_dev, scn);
  352. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  353. if (pktlogmod_init(scn)) {
  354. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  355. "%s: pktlogmod_init failed", __func__);
  356. handle->pkt_log_init = false;
  357. } else {
  358. handle->pkt_log_init = true;
  359. }
  360. }
  361. /**
  362. * dp_pkt_log_con_service() - connect packet log service
  363. * @ppdev: physical device handle
  364. * @scn: device context
  365. *
  366. * Return: none
  367. */
  368. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  369. {
  370. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  371. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  372. pktlog_htc_attach();
  373. }
  374. /**
  375. * dp_pktlogmod_exit() - API to cleanup pktlog info
  376. * @handle: Pdev handle
  377. *
  378. * Return: none
  379. */
  380. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  381. {
  382. void *scn = (void *)handle->soc->hif_handle;
  383. if (!scn) {
  384. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  385. "%s: Invalid hif(scn) handle", __func__);
  386. return;
  387. }
  388. pktlogmod_exit(scn);
  389. handle->pkt_log_init = false;
  390. }
  391. #endif
  392. #else
  393. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  394. /**
  395. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  396. * @soc: pointer to dp_soc handle
  397. * @intr_ctx_num: interrupt context number for which mon mask is needed
  398. *
  399. * Return: mon mask value
  400. */
  401. static inline
  402. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  403. {
  404. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  405. }
  406. #endif
  407. /**
  408. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  409. * @cdp_opaque_vdev: pointer to cdp_vdev
  410. *
  411. * Return: pointer to dp_vdev
  412. */
  413. static
  414. struct dp_vdev * dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  415. {
  416. return (struct dp_vdev *)cdp_opaque_vdev;
  417. }
  418. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  419. struct cdp_peer *peer_hdl,
  420. uint8_t *mac_addr,
  421. enum cdp_txrx_ast_entry_type type,
  422. uint32_t flags)
  423. {
  424. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  425. (struct dp_peer *)peer_hdl,
  426. mac_addr,
  427. type,
  428. flags);
  429. }
  430. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  431. void *ast_entry_hdl)
  432. {
  433. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  434. qdf_spin_lock_bh(&soc->ast_lock);
  435. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  436. (struct dp_ast_entry *)ast_entry_hdl);
  437. qdf_spin_unlock_bh(&soc->ast_lock);
  438. }
  439. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  440. struct cdp_peer *peer_hdl,
  441. uint8_t *wds_macaddr,
  442. uint32_t flags)
  443. {
  444. int status = -1;
  445. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  446. struct dp_ast_entry *ast_entry = NULL;
  447. qdf_spin_lock_bh(&soc->ast_lock);
  448. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  449. if (ast_entry) {
  450. status = dp_peer_update_ast(soc,
  451. (struct dp_peer *)peer_hdl,
  452. ast_entry, flags);
  453. }
  454. qdf_spin_unlock_bh(&soc->ast_lock);
  455. return status;
  456. }
  457. /*
  458. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  459. * @soc_handle: Datapath SOC handle
  460. * @wds_macaddr: WDS entry MAC Address
  461. * Return: None
  462. */
  463. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  464. uint8_t *wds_macaddr, void *vdev_handle)
  465. {
  466. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  467. struct dp_ast_entry *ast_entry = NULL;
  468. qdf_spin_lock_bh(&soc->ast_lock);
  469. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  470. if (ast_entry) {
  471. if ((ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) &&
  472. (ast_entry->type != CDP_TXRX_AST_TYPE_SELF)) {
  473. ast_entry->is_active = TRUE;
  474. }
  475. }
  476. qdf_spin_unlock_bh(&soc->ast_lock);
  477. }
  478. /*
  479. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  480. * @soc: Datapath SOC handle
  481. *
  482. * Return: None
  483. */
  484. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  485. void *vdev_hdl)
  486. {
  487. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  488. struct dp_pdev *pdev;
  489. struct dp_vdev *vdev;
  490. struct dp_peer *peer;
  491. struct dp_ast_entry *ase, *temp_ase;
  492. int i;
  493. qdf_spin_lock_bh(&soc->ast_lock);
  494. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  495. pdev = soc->pdev_list[i];
  496. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  497. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  498. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  499. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  500. if ((ase->type ==
  501. CDP_TXRX_AST_TYPE_STATIC) ||
  502. (ase->type ==
  503. CDP_TXRX_AST_TYPE_SELF))
  504. continue;
  505. ase->is_active = TRUE;
  506. }
  507. }
  508. }
  509. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  510. }
  511. qdf_spin_unlock_bh(&soc->ast_lock);
  512. }
  513. /*
  514. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  515. * @soc: Datapath SOC handle
  516. *
  517. * Return: None
  518. */
  519. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  520. {
  521. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  522. struct dp_pdev *pdev;
  523. struct dp_vdev *vdev;
  524. struct dp_peer *peer;
  525. struct dp_ast_entry *ase, *temp_ase;
  526. int i;
  527. qdf_spin_lock_bh(&soc->ast_lock);
  528. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  529. pdev = soc->pdev_list[i];
  530. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  531. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  532. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  533. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  534. if ((ase->type ==
  535. CDP_TXRX_AST_TYPE_STATIC) ||
  536. (ase->type ==
  537. CDP_TXRX_AST_TYPE_SELF))
  538. continue;
  539. dp_peer_del_ast(soc, ase);
  540. }
  541. }
  542. }
  543. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  544. }
  545. qdf_spin_unlock_bh(&soc->ast_lock);
  546. }
  547. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  548. uint8_t *ast_mac_addr)
  549. {
  550. struct dp_ast_entry *ast_entry;
  551. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  552. qdf_spin_lock_bh(&soc->ast_lock);
  553. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  554. qdf_spin_unlock_bh(&soc->ast_lock);
  555. return (void *)ast_entry;
  556. }
  557. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  558. void *ast_entry_hdl)
  559. {
  560. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  561. (struct dp_ast_entry *)ast_entry_hdl);
  562. }
  563. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  564. void *ast_entry_hdl)
  565. {
  566. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  567. (struct dp_ast_entry *)ast_entry_hdl);
  568. }
  569. static void dp_peer_ast_set_type_wifi3(
  570. struct cdp_soc_t *soc_hdl,
  571. void *ast_entry_hdl,
  572. enum cdp_txrx_ast_entry_type type)
  573. {
  574. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  575. (struct dp_ast_entry *)ast_entry_hdl,
  576. type);
  577. }
  578. static enum cdp_txrx_ast_entry_type dp_peer_ast_get_type_wifi3(
  579. struct cdp_soc_t *soc_hdl,
  580. void *ast_entry_hdl)
  581. {
  582. return ((struct dp_ast_entry *)ast_entry_hdl)->type;
  583. }
  584. /**
  585. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  586. * @ring_num: ring num of the ring being queried
  587. * @grp_mask: the grp_mask array for the ring type in question.
  588. *
  589. * The grp_mask array is indexed by group number and the bit fields correspond
  590. * to ring numbers. We are finding which interrupt group a ring belongs to.
  591. *
  592. * Return: the index in the grp_mask array with the ring number.
  593. * -QDF_STATUS_E_NOENT if no entry is found
  594. */
  595. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  596. {
  597. int ext_group_num;
  598. int mask = 1 << ring_num;
  599. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  600. ext_group_num++) {
  601. if (mask & grp_mask[ext_group_num])
  602. return ext_group_num;
  603. }
  604. return -QDF_STATUS_E_NOENT;
  605. }
  606. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  607. enum hal_ring_type ring_type,
  608. int ring_num)
  609. {
  610. int *grp_mask;
  611. switch (ring_type) {
  612. case WBM2SW_RELEASE:
  613. /* dp_tx_comp_handler - soc->tx_comp_ring */
  614. if (ring_num < 3)
  615. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  616. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  617. else if (ring_num == 3) {
  618. /* sw treats this as a separate ring type */
  619. grp_mask = &soc->wlan_cfg_ctx->
  620. int_rx_wbm_rel_ring_mask[0];
  621. ring_num = 0;
  622. } else {
  623. qdf_assert(0);
  624. return -QDF_STATUS_E_NOENT;
  625. }
  626. break;
  627. case REO_EXCEPTION:
  628. /* dp_rx_err_process - &soc->reo_exception_ring */
  629. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  630. break;
  631. case REO_DST:
  632. /* dp_rx_process - soc->reo_dest_ring */
  633. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  634. break;
  635. case REO_STATUS:
  636. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  637. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  638. break;
  639. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  640. case RXDMA_MONITOR_STATUS:
  641. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  642. case RXDMA_MONITOR_DST:
  643. /* dp_mon_process */
  644. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  645. break;
  646. case RXDMA_DST:
  647. /* dp_rxdma_err_process */
  648. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  649. break;
  650. case RXDMA_BUF:
  651. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  652. break;
  653. case RXDMA_MONITOR_BUF:
  654. /* TODO: support low_thresh interrupt */
  655. return -QDF_STATUS_E_NOENT;
  656. break;
  657. case TCL_DATA:
  658. case TCL_CMD:
  659. case REO_CMD:
  660. case SW2WBM_RELEASE:
  661. case WBM_IDLE_LINK:
  662. /* normally empty SW_TO_HW rings */
  663. return -QDF_STATUS_E_NOENT;
  664. break;
  665. case TCL_STATUS:
  666. case REO_REINJECT:
  667. /* misc unused rings */
  668. return -QDF_STATUS_E_NOENT;
  669. break;
  670. case CE_SRC:
  671. case CE_DST:
  672. case CE_DST_STATUS:
  673. /* CE_rings - currently handled by hif */
  674. default:
  675. return -QDF_STATUS_E_NOENT;
  676. break;
  677. }
  678. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  679. }
  680. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  681. *ring_params, int ring_type, int ring_num)
  682. {
  683. int msi_group_number;
  684. int msi_data_count;
  685. int ret;
  686. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  687. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  688. &msi_data_count, &msi_data_start,
  689. &msi_irq_start);
  690. if (ret)
  691. return;
  692. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  693. ring_num);
  694. if (msi_group_number < 0) {
  695. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  696. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  697. ring_type, ring_num);
  698. ring_params->msi_addr = 0;
  699. ring_params->msi_data = 0;
  700. return;
  701. }
  702. if (msi_group_number > msi_data_count) {
  703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  704. FL("2 msi_groups will share an msi; msi_group_num %d"),
  705. msi_group_number);
  706. QDF_ASSERT(0);
  707. }
  708. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  709. ring_params->msi_addr = addr_low;
  710. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  711. ring_params->msi_data = (msi_group_number % msi_data_count)
  712. + msi_data_start;
  713. ring_params->flags |= HAL_SRNG_MSI_INTR;
  714. }
  715. /**
  716. * dp_print_ast_stats() - Dump AST table contents
  717. * @soc: Datapath soc handle
  718. *
  719. * return void
  720. */
  721. #ifdef FEATURE_AST
  722. static void dp_print_ast_stats(struct dp_soc *soc)
  723. {
  724. uint8_t i;
  725. uint8_t num_entries = 0;
  726. struct dp_vdev *vdev;
  727. struct dp_pdev *pdev;
  728. struct dp_peer *peer;
  729. struct dp_ast_entry *ase, *tmp_ase;
  730. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  731. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS"};
  732. DP_PRINT_STATS("AST Stats:");
  733. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  734. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  735. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  736. DP_PRINT_STATS("AST Table:");
  737. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  738. pdev = soc->pdev_list[i];
  739. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  740. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  741. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  742. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  743. DP_PRINT_STATS("%6d mac_addr = %pM"
  744. " peer_mac_addr = %pM"
  745. " type = %s"
  746. " next_hop = %d"
  747. " is_active = %d"
  748. " is_bss = %d"
  749. " ast_idx = %d"
  750. " pdev_id = %d"
  751. " vdev_id = %d",
  752. ++num_entries,
  753. ase->mac_addr.raw,
  754. ase->peer->mac_addr.raw,
  755. type[ase->type],
  756. ase->next_hop,
  757. ase->is_active,
  758. ase->is_bss,
  759. ase->ast_idx,
  760. ase->pdev_id,
  761. ase->vdev_id);
  762. }
  763. }
  764. }
  765. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  766. }
  767. }
  768. #else
  769. static void dp_print_ast_stats(struct dp_soc *soc)
  770. {
  771. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  772. return;
  773. }
  774. #endif
  775. static void dp_print_peer_table(struct dp_vdev *vdev)
  776. {
  777. struct dp_peer *peer = NULL;
  778. DP_PRINT_STATS("Dumping Peer Table Stats:");
  779. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  780. if (!peer) {
  781. DP_PRINT_STATS("Invalid Peer");
  782. return;
  783. }
  784. DP_PRINT_STATS(" peer_mac_addr = %pM"
  785. " nawds_enabled = %d"
  786. " bss_peer = %d"
  787. " wapi = %d"
  788. " wds_enabled = %d"
  789. " delete in progress = %d",
  790. peer->mac_addr.raw,
  791. peer->nawds_enabled,
  792. peer->bss_peer,
  793. peer->wapi,
  794. peer->wds_enabled,
  795. peer->delete_in_progress);
  796. }
  797. }
  798. /*
  799. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  800. */
  801. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  802. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  803. {
  804. void *hal_soc = soc->hal_soc;
  805. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  806. /* TODO: See if we should get align size from hal */
  807. uint32_t ring_base_align = 8;
  808. struct hal_srng_params ring_params;
  809. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  810. /* TODO: Currently hal layer takes care of endianness related settings.
  811. * See if these settings need to passed from DP layer
  812. */
  813. ring_params.flags = 0;
  814. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  815. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  816. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  817. srng->hal_srng = NULL;
  818. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  819. srng->num_entries = num_entries;
  820. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  821. soc->osdev, soc->osdev->dev, srng->alloc_size,
  822. &(srng->base_paddr_unaligned));
  823. if (!srng->base_vaddr_unaligned) {
  824. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  825. FL("alloc failed - ring_type: %d, ring_num %d"),
  826. ring_type, ring_num);
  827. return QDF_STATUS_E_NOMEM;
  828. }
  829. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  830. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  831. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  832. ((unsigned long)(ring_params.ring_base_vaddr) -
  833. (unsigned long)srng->base_vaddr_unaligned);
  834. ring_params.num_entries = num_entries;
  835. if (soc->intr_mode == DP_INTR_MSI) {
  836. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  837. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  838. FL("Using MSI for ring_type: %d, ring_num %d"),
  839. ring_type, ring_num);
  840. } else {
  841. ring_params.msi_data = 0;
  842. ring_params.msi_addr = 0;
  843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  844. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  845. ring_type, ring_num);
  846. }
  847. /*
  848. * Setup interrupt timer and batch counter thresholds for
  849. * interrupt mitigation based on ring type
  850. */
  851. if (ring_type == REO_DST) {
  852. ring_params.intr_timer_thres_us =
  853. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  854. ring_params.intr_batch_cntr_thres_entries =
  855. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  856. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  857. ring_params.intr_timer_thres_us =
  858. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  859. ring_params.intr_batch_cntr_thres_entries =
  860. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  861. } else {
  862. ring_params.intr_timer_thres_us =
  863. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  864. ring_params.intr_batch_cntr_thres_entries =
  865. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  866. }
  867. /* Enable low threshold interrupts for rx buffer rings (regular and
  868. * monitor buffer rings.
  869. * TODO: See if this is required for any other ring
  870. */
  871. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  872. (ring_type == RXDMA_MONITOR_STATUS)) {
  873. /* TODO: Setting low threshold to 1/8th of ring size
  874. * see if this needs to be configurable
  875. */
  876. ring_params.low_threshold = num_entries >> 3;
  877. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  878. ring_params.intr_timer_thres_us =
  879. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  880. ring_params.intr_batch_cntr_thres_entries = 0;
  881. }
  882. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  883. mac_id, &ring_params);
  884. if (!srng->hal_srng) {
  885. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  886. srng->alloc_size,
  887. srng->base_vaddr_unaligned,
  888. srng->base_paddr_unaligned, 0);
  889. }
  890. return 0;
  891. }
  892. /**
  893. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  894. * Any buffers allocated and attached to ring entries are expected to be freed
  895. * before calling this function.
  896. */
  897. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  898. int ring_type, int ring_num)
  899. {
  900. if (!srng->hal_srng) {
  901. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  902. FL("Ring type: %d, num:%d not setup"),
  903. ring_type, ring_num);
  904. return;
  905. }
  906. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  907. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  908. srng->alloc_size,
  909. srng->base_vaddr_unaligned,
  910. srng->base_paddr_unaligned, 0);
  911. srng->hal_srng = NULL;
  912. }
  913. /* TODO: Need this interface from HIF */
  914. void *hif_get_hal_handle(void *hif_handle);
  915. /*
  916. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  917. * @dp_ctx: DP SOC handle
  918. * @budget: Number of frames/descriptors that can be processed in one shot
  919. *
  920. * Return: remaining budget/quota for the soc device
  921. */
  922. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  923. {
  924. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  925. struct dp_soc *soc = int_ctx->soc;
  926. int ring = 0;
  927. uint32_t work_done = 0;
  928. int budget = dp_budget;
  929. uint8_t tx_mask = int_ctx->tx_ring_mask;
  930. uint8_t rx_mask = int_ctx->rx_ring_mask;
  931. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  932. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  933. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  934. uint32_t remaining_quota = dp_budget;
  935. struct dp_pdev *pdev = NULL;
  936. int mac_id;
  937. /* Process Tx completion interrupts first to return back buffers */
  938. while (tx_mask) {
  939. if (tx_mask & 0x1) {
  940. work_done = dp_tx_comp_handler(soc,
  941. soc->tx_comp_ring[ring].hal_srng,
  942. remaining_quota);
  943. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  944. "tx mask 0x%x ring %d, budget %d, work_done %d",
  945. tx_mask, ring, budget, work_done);
  946. budget -= work_done;
  947. if (budget <= 0)
  948. goto budget_done;
  949. remaining_quota = budget;
  950. }
  951. tx_mask = tx_mask >> 1;
  952. ring++;
  953. }
  954. /* Process REO Exception ring interrupt */
  955. if (rx_err_mask) {
  956. work_done = dp_rx_err_process(soc,
  957. soc->reo_exception_ring.hal_srng,
  958. remaining_quota);
  959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  960. "REO Exception Ring: work_done %d budget %d",
  961. work_done, budget);
  962. budget -= work_done;
  963. if (budget <= 0) {
  964. goto budget_done;
  965. }
  966. remaining_quota = budget;
  967. }
  968. /* Process Rx WBM release ring interrupt */
  969. if (rx_wbm_rel_mask) {
  970. work_done = dp_rx_wbm_err_process(soc,
  971. soc->rx_rel_ring.hal_srng, remaining_quota);
  972. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  973. "WBM Release Ring: work_done %d budget %d",
  974. work_done, budget);
  975. budget -= work_done;
  976. if (budget <= 0) {
  977. goto budget_done;
  978. }
  979. remaining_quota = budget;
  980. }
  981. /* Process Rx interrupts */
  982. if (rx_mask) {
  983. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  984. if (rx_mask & (1 << ring)) {
  985. work_done = dp_rx_process(int_ctx,
  986. soc->reo_dest_ring[ring].hal_srng,
  987. ring,
  988. remaining_quota);
  989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  990. "rx mask 0x%x ring %d, work_done %d budget %d",
  991. rx_mask, ring, work_done, budget);
  992. budget -= work_done;
  993. if (budget <= 0)
  994. goto budget_done;
  995. remaining_quota = budget;
  996. }
  997. }
  998. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  999. work_done = dp_rxdma_err_process(soc, ring,
  1000. remaining_quota);
  1001. budget -= work_done;
  1002. }
  1003. }
  1004. if (reo_status_mask)
  1005. dp_reo_status_ring_handler(soc);
  1006. /* Process LMAC interrupts */
  1007. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1008. pdev = soc->pdev_list[ring];
  1009. if (pdev == NULL)
  1010. continue;
  1011. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1012. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1013. pdev->pdev_id);
  1014. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1015. work_done = dp_mon_process(soc, mac_for_pdev,
  1016. remaining_quota);
  1017. budget -= work_done;
  1018. if (budget <= 0)
  1019. goto budget_done;
  1020. remaining_quota = budget;
  1021. }
  1022. if (int_ctx->rxdma2host_ring_mask &
  1023. (1 << mac_for_pdev)) {
  1024. work_done = dp_rxdma_err_process(soc,
  1025. mac_for_pdev,
  1026. remaining_quota);
  1027. budget -= work_done;
  1028. if (budget <= 0)
  1029. goto budget_done;
  1030. remaining_quota = budget;
  1031. }
  1032. if (int_ctx->host2rxdma_ring_mask &
  1033. (1 << mac_for_pdev)) {
  1034. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1035. union dp_rx_desc_list_elem_t *tail = NULL;
  1036. struct dp_srng *rx_refill_buf_ring =
  1037. &pdev->rx_refill_buf_ring;
  1038. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1039. 1);
  1040. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1041. rx_refill_buf_ring,
  1042. &soc->rx_desc_buf[mac_for_pdev], 0,
  1043. &desc_list, &tail);
  1044. }
  1045. }
  1046. }
  1047. qdf_lro_flush(int_ctx->lro_ctx);
  1048. budget_done:
  1049. return dp_budget - budget;
  1050. }
  1051. #ifdef DP_INTR_POLL_BASED
  1052. /* dp_interrupt_timer()- timer poll for interrupts
  1053. *
  1054. * @arg: SoC Handle
  1055. *
  1056. * Return:
  1057. *
  1058. */
  1059. static void dp_interrupt_timer(void *arg)
  1060. {
  1061. struct dp_soc *soc = (struct dp_soc *) arg;
  1062. int i;
  1063. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1064. for (i = 0;
  1065. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1066. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1067. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1068. }
  1069. }
  1070. /*
  1071. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  1072. * @txrx_soc: DP SOC handle
  1073. *
  1074. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1075. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1076. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1077. *
  1078. * Return: 0 for success. nonzero for failure.
  1079. */
  1080. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1081. {
  1082. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1083. int i;
  1084. soc->intr_mode = DP_INTR_POLL;
  1085. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1086. soc->intr_ctx[i].dp_intr_id = i;
  1087. soc->intr_ctx[i].tx_ring_mask =
  1088. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1089. soc->intr_ctx[i].rx_ring_mask =
  1090. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1091. soc->intr_ctx[i].rx_mon_ring_mask =
  1092. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1093. soc->intr_ctx[i].rx_err_ring_mask =
  1094. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1095. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1096. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1097. soc->intr_ctx[i].reo_status_ring_mask =
  1098. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1099. soc->intr_ctx[i].rxdma2host_ring_mask =
  1100. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1101. soc->intr_ctx[i].soc = soc;
  1102. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1103. }
  1104. qdf_timer_init(soc->osdev, &soc->int_timer,
  1105. dp_interrupt_timer, (void *)soc,
  1106. QDF_TIMER_TYPE_WAKE_APPS);
  1107. return QDF_STATUS_SUCCESS;
  1108. }
  1109. #else
  1110. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1111. {
  1112. return -QDF_STATUS_E_NOSUPPORT;
  1113. }
  1114. #endif
  1115. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1116. #if defined(CONFIG_MCL)
  1117. extern int con_mode_monitor;
  1118. /*
  1119. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1120. * @txrx_soc: DP SOC handle
  1121. *
  1122. * Call the appropriate attach function based on the mode of operation.
  1123. * This is a WAR for enabling monitor mode.
  1124. *
  1125. * Return: 0 for success. nonzero for failure.
  1126. */
  1127. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1128. {
  1129. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1130. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1131. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1132. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1133. "%s: Poll mode", __func__);
  1134. return dp_soc_attach_poll(txrx_soc);
  1135. } else {
  1136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1137. "%s: Interrupt mode", __func__);
  1138. return dp_soc_interrupt_attach(txrx_soc);
  1139. }
  1140. }
  1141. #else
  1142. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1143. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1144. {
  1145. return dp_soc_attach_poll(txrx_soc);
  1146. }
  1147. #else
  1148. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1149. {
  1150. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1151. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1152. return dp_soc_attach_poll(txrx_soc);
  1153. else
  1154. return dp_soc_interrupt_attach(txrx_soc);
  1155. }
  1156. #endif
  1157. #endif
  1158. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1159. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1160. {
  1161. int j;
  1162. int num_irq = 0;
  1163. int tx_mask =
  1164. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1165. int rx_mask =
  1166. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1167. int rx_mon_mask =
  1168. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1169. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1170. soc->wlan_cfg_ctx, intr_ctx_num);
  1171. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1172. soc->wlan_cfg_ctx, intr_ctx_num);
  1173. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1174. soc->wlan_cfg_ctx, intr_ctx_num);
  1175. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1176. soc->wlan_cfg_ctx, intr_ctx_num);
  1177. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1178. soc->wlan_cfg_ctx, intr_ctx_num);
  1179. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1180. if (tx_mask & (1 << j)) {
  1181. irq_id_map[num_irq++] =
  1182. (wbm2host_tx_completions_ring1 - j);
  1183. }
  1184. if (rx_mask & (1 << j)) {
  1185. irq_id_map[num_irq++] =
  1186. (reo2host_destination_ring1 - j);
  1187. }
  1188. if (rxdma2host_ring_mask & (1 << j)) {
  1189. irq_id_map[num_irq++] =
  1190. rxdma2host_destination_ring_mac1 -
  1191. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1192. }
  1193. if (host2rxdma_ring_mask & (1 << j)) {
  1194. irq_id_map[num_irq++] =
  1195. host2rxdma_host_buf_ring_mac1 -
  1196. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1197. }
  1198. if (rx_mon_mask & (1 << j)) {
  1199. irq_id_map[num_irq++] =
  1200. ppdu_end_interrupts_mac1 -
  1201. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1202. irq_id_map[num_irq++] =
  1203. rxdma2host_monitor_status_ring_mac1 -
  1204. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1205. }
  1206. if (rx_wbm_rel_ring_mask & (1 << j))
  1207. irq_id_map[num_irq++] = wbm2host_rx_release;
  1208. if (rx_err_ring_mask & (1 << j))
  1209. irq_id_map[num_irq++] = reo2host_exception;
  1210. if (reo_status_ring_mask & (1 << j))
  1211. irq_id_map[num_irq++] = reo2host_status;
  1212. }
  1213. *num_irq_r = num_irq;
  1214. }
  1215. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1216. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1217. int msi_vector_count, int msi_vector_start)
  1218. {
  1219. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1220. soc->wlan_cfg_ctx, intr_ctx_num);
  1221. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1222. soc->wlan_cfg_ctx, intr_ctx_num);
  1223. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1224. soc->wlan_cfg_ctx, intr_ctx_num);
  1225. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1226. soc->wlan_cfg_ctx, intr_ctx_num);
  1227. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1228. soc->wlan_cfg_ctx, intr_ctx_num);
  1229. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1230. soc->wlan_cfg_ctx, intr_ctx_num);
  1231. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1232. soc->wlan_cfg_ctx, intr_ctx_num);
  1233. unsigned int vector =
  1234. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1235. int num_irq = 0;
  1236. soc->intr_mode = DP_INTR_MSI;
  1237. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1238. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1239. irq_id_map[num_irq++] =
  1240. pld_get_msi_irq(soc->osdev->dev, vector);
  1241. *num_irq_r = num_irq;
  1242. }
  1243. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1244. int *irq_id_map, int *num_irq)
  1245. {
  1246. int msi_vector_count, ret;
  1247. uint32_t msi_base_data, msi_vector_start;
  1248. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1249. &msi_vector_count,
  1250. &msi_base_data,
  1251. &msi_vector_start);
  1252. if (ret)
  1253. return dp_soc_interrupt_map_calculate_integrated(soc,
  1254. intr_ctx_num, irq_id_map, num_irq);
  1255. else
  1256. dp_soc_interrupt_map_calculate_msi(soc,
  1257. intr_ctx_num, irq_id_map, num_irq,
  1258. msi_vector_count, msi_vector_start);
  1259. }
  1260. /*
  1261. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1262. * @txrx_soc: DP SOC handle
  1263. *
  1264. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1265. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1266. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1267. *
  1268. * Return: 0 for success. nonzero for failure.
  1269. */
  1270. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1271. {
  1272. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1273. int i = 0;
  1274. int num_irq = 0;
  1275. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1276. int ret = 0;
  1277. /* Map of IRQ ids registered with one interrupt context */
  1278. int irq_id_map[HIF_MAX_GRP_IRQ];
  1279. int tx_mask =
  1280. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1281. int rx_mask =
  1282. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1283. int rx_mon_mask =
  1284. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1285. int rx_err_ring_mask =
  1286. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1287. int rx_wbm_rel_ring_mask =
  1288. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1289. int reo_status_ring_mask =
  1290. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1291. int rxdma2host_ring_mask =
  1292. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1293. int host2rxdma_ring_mask =
  1294. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1295. soc->intr_ctx[i].dp_intr_id = i;
  1296. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1297. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1298. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1299. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1300. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1301. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1302. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1303. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1304. soc->intr_ctx[i].soc = soc;
  1305. num_irq = 0;
  1306. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1307. &num_irq);
  1308. ret = hif_register_ext_group(soc->hif_handle,
  1309. num_irq, irq_id_map, dp_service_srngs,
  1310. &soc->intr_ctx[i], "dp_intr",
  1311. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1312. if (ret) {
  1313. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1314. FL("failed, ret = %d"), ret);
  1315. return QDF_STATUS_E_FAILURE;
  1316. }
  1317. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1318. }
  1319. hif_configure_ext_group_interrupts(soc->hif_handle);
  1320. return QDF_STATUS_SUCCESS;
  1321. }
  1322. /*
  1323. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1324. * @txrx_soc: DP SOC handle
  1325. *
  1326. * Return: void
  1327. */
  1328. static void dp_soc_interrupt_detach(void *txrx_soc)
  1329. {
  1330. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1331. int i;
  1332. if (soc->intr_mode == DP_INTR_POLL) {
  1333. qdf_timer_stop(&soc->int_timer);
  1334. qdf_timer_free(&soc->int_timer);
  1335. } else {
  1336. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1337. }
  1338. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1339. soc->intr_ctx[i].tx_ring_mask = 0;
  1340. soc->intr_ctx[i].rx_ring_mask = 0;
  1341. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1342. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1343. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1344. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1345. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1346. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1347. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1348. }
  1349. }
  1350. #define AVG_MAX_MPDUS_PER_TID 128
  1351. #define AVG_TIDS_PER_CLIENT 2
  1352. #define AVG_FLOWS_PER_TID 2
  1353. #define AVG_MSDUS_PER_FLOW 128
  1354. #define AVG_MSDUS_PER_MPDU 4
  1355. /*
  1356. * Allocate and setup link descriptor pool that will be used by HW for
  1357. * various link and queue descriptors and managed by WBM
  1358. */
  1359. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1360. {
  1361. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1362. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1363. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1364. uint32_t num_mpdus_per_link_desc =
  1365. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1366. uint32_t num_msdus_per_link_desc =
  1367. hal_num_msdus_per_link_desc(soc->hal_soc);
  1368. uint32_t num_mpdu_links_per_queue_desc =
  1369. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1370. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1371. uint32_t total_link_descs, total_mem_size;
  1372. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1373. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1374. uint32_t num_link_desc_banks;
  1375. uint32_t last_bank_size = 0;
  1376. uint32_t entry_size, num_entries;
  1377. int i;
  1378. uint32_t desc_id = 0;
  1379. /* Only Tx queue descriptors are allocated from common link descriptor
  1380. * pool Rx queue descriptors are not included in this because (REO queue
  1381. * extension descriptors) they are expected to be allocated contiguously
  1382. * with REO queue descriptors
  1383. */
  1384. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1385. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1386. num_mpdu_queue_descs = num_mpdu_link_descs /
  1387. num_mpdu_links_per_queue_desc;
  1388. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1389. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1390. num_msdus_per_link_desc;
  1391. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1392. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1393. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1394. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1395. /* Round up to power of 2 */
  1396. total_link_descs = 1;
  1397. while (total_link_descs < num_entries)
  1398. total_link_descs <<= 1;
  1399. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1400. FL("total_link_descs: %u, link_desc_size: %d"),
  1401. total_link_descs, link_desc_size);
  1402. total_mem_size = total_link_descs * link_desc_size;
  1403. total_mem_size += link_desc_align;
  1404. if (total_mem_size <= max_alloc_size) {
  1405. num_link_desc_banks = 0;
  1406. last_bank_size = total_mem_size;
  1407. } else {
  1408. num_link_desc_banks = (total_mem_size) /
  1409. (max_alloc_size - link_desc_align);
  1410. last_bank_size = total_mem_size %
  1411. (max_alloc_size - link_desc_align);
  1412. }
  1413. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1414. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1415. total_mem_size, num_link_desc_banks);
  1416. for (i = 0; i < num_link_desc_banks; i++) {
  1417. soc->link_desc_banks[i].base_vaddr_unaligned =
  1418. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1419. max_alloc_size,
  1420. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1421. soc->link_desc_banks[i].size = max_alloc_size;
  1422. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1423. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1424. ((unsigned long)(
  1425. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1426. link_desc_align));
  1427. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1428. soc->link_desc_banks[i].base_paddr_unaligned) +
  1429. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1430. (unsigned long)(
  1431. soc->link_desc_banks[i].base_vaddr_unaligned));
  1432. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1433. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1434. FL("Link descriptor memory alloc failed"));
  1435. goto fail;
  1436. }
  1437. }
  1438. if (last_bank_size) {
  1439. /* Allocate last bank in case total memory required is not exact
  1440. * multiple of max_alloc_size
  1441. */
  1442. soc->link_desc_banks[i].base_vaddr_unaligned =
  1443. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1444. last_bank_size,
  1445. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1446. soc->link_desc_banks[i].size = last_bank_size;
  1447. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1448. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1449. ((unsigned long)(
  1450. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1451. link_desc_align));
  1452. soc->link_desc_banks[i].base_paddr =
  1453. (unsigned long)(
  1454. soc->link_desc_banks[i].base_paddr_unaligned) +
  1455. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1456. (unsigned long)(
  1457. soc->link_desc_banks[i].base_vaddr_unaligned));
  1458. }
  1459. /* Allocate and setup link descriptor idle list for HW internal use */
  1460. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1461. total_mem_size = entry_size * total_link_descs;
  1462. if (total_mem_size <= max_alloc_size) {
  1463. void *desc;
  1464. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1465. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1466. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1467. FL("Link desc idle ring setup failed"));
  1468. goto fail;
  1469. }
  1470. hal_srng_access_start_unlocked(soc->hal_soc,
  1471. soc->wbm_idle_link_ring.hal_srng);
  1472. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1473. soc->link_desc_banks[i].base_paddr; i++) {
  1474. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1475. ((unsigned long)(
  1476. soc->link_desc_banks[i].base_vaddr) -
  1477. (unsigned long)(
  1478. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1479. / link_desc_size;
  1480. unsigned long paddr = (unsigned long)(
  1481. soc->link_desc_banks[i].base_paddr);
  1482. while (num_entries && (desc = hal_srng_src_get_next(
  1483. soc->hal_soc,
  1484. soc->wbm_idle_link_ring.hal_srng))) {
  1485. hal_set_link_desc_addr(desc,
  1486. LINK_DESC_COOKIE(desc_id, i), paddr);
  1487. num_entries--;
  1488. desc_id++;
  1489. paddr += link_desc_size;
  1490. }
  1491. }
  1492. hal_srng_access_end_unlocked(soc->hal_soc,
  1493. soc->wbm_idle_link_ring.hal_srng);
  1494. } else {
  1495. uint32_t num_scatter_bufs;
  1496. uint32_t num_entries_per_buf;
  1497. uint32_t rem_entries;
  1498. uint8_t *scatter_buf_ptr;
  1499. uint16_t scatter_buf_num;
  1500. soc->wbm_idle_scatter_buf_size =
  1501. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1502. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1503. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1504. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1505. soc->hal_soc, total_mem_size,
  1506. soc->wbm_idle_scatter_buf_size);
  1507. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1508. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1509. FL("scatter bufs size out of bounds"));
  1510. goto fail;
  1511. }
  1512. for (i = 0; i < num_scatter_bufs; i++) {
  1513. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1514. qdf_mem_alloc_consistent(soc->osdev,
  1515. soc->osdev->dev,
  1516. soc->wbm_idle_scatter_buf_size,
  1517. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1518. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1519. QDF_TRACE(QDF_MODULE_ID_DP,
  1520. QDF_TRACE_LEVEL_ERROR,
  1521. FL("Scatter list memory alloc failed"));
  1522. goto fail;
  1523. }
  1524. }
  1525. /* Populate idle list scatter buffers with link descriptor
  1526. * pointers
  1527. */
  1528. scatter_buf_num = 0;
  1529. scatter_buf_ptr = (uint8_t *)(
  1530. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1531. rem_entries = num_entries_per_buf;
  1532. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1533. soc->link_desc_banks[i].base_paddr; i++) {
  1534. uint32_t num_link_descs =
  1535. (soc->link_desc_banks[i].size -
  1536. ((unsigned long)(
  1537. soc->link_desc_banks[i].base_vaddr) -
  1538. (unsigned long)(
  1539. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1540. / link_desc_size;
  1541. unsigned long paddr = (unsigned long)(
  1542. soc->link_desc_banks[i].base_paddr);
  1543. while (num_link_descs) {
  1544. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1545. LINK_DESC_COOKIE(desc_id, i), paddr);
  1546. num_link_descs--;
  1547. desc_id++;
  1548. paddr += link_desc_size;
  1549. rem_entries--;
  1550. if (rem_entries) {
  1551. scatter_buf_ptr += entry_size;
  1552. } else {
  1553. rem_entries = num_entries_per_buf;
  1554. scatter_buf_num++;
  1555. if (scatter_buf_num >= num_scatter_bufs)
  1556. break;
  1557. scatter_buf_ptr = (uint8_t *)(
  1558. soc->wbm_idle_scatter_buf_base_vaddr[
  1559. scatter_buf_num]);
  1560. }
  1561. }
  1562. }
  1563. /* Setup link descriptor idle list in HW */
  1564. hal_setup_link_idle_list(soc->hal_soc,
  1565. soc->wbm_idle_scatter_buf_base_paddr,
  1566. soc->wbm_idle_scatter_buf_base_vaddr,
  1567. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1568. (uint32_t)(scatter_buf_ptr -
  1569. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1570. scatter_buf_num-1])), total_link_descs);
  1571. }
  1572. return 0;
  1573. fail:
  1574. if (soc->wbm_idle_link_ring.hal_srng) {
  1575. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1576. WBM_IDLE_LINK, 0);
  1577. }
  1578. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1579. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1580. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1581. soc->wbm_idle_scatter_buf_size,
  1582. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1583. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1584. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1585. }
  1586. }
  1587. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1588. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1589. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1590. soc->link_desc_banks[i].size,
  1591. soc->link_desc_banks[i].base_vaddr_unaligned,
  1592. soc->link_desc_banks[i].base_paddr_unaligned,
  1593. 0);
  1594. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1595. }
  1596. }
  1597. return QDF_STATUS_E_FAILURE;
  1598. }
  1599. /*
  1600. * Free link descriptor pool that was setup HW
  1601. */
  1602. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1603. {
  1604. int i;
  1605. if (soc->wbm_idle_link_ring.hal_srng) {
  1606. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1607. WBM_IDLE_LINK, 0);
  1608. }
  1609. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1610. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1611. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1612. soc->wbm_idle_scatter_buf_size,
  1613. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1614. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1615. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1616. }
  1617. }
  1618. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1619. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1620. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1621. soc->link_desc_banks[i].size,
  1622. soc->link_desc_banks[i].base_vaddr_unaligned,
  1623. soc->link_desc_banks[i].base_paddr_unaligned,
  1624. 0);
  1625. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1626. }
  1627. }
  1628. }
  1629. #define REO_DST_RING_SIZE_QCA6290 1024
  1630. #define REO_DST_RING_SIZE_QCA8074 2048
  1631. /*
  1632. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1633. * @soc: Datapath SOC handle
  1634. *
  1635. * This is a timer function used to age out stale AST nodes from
  1636. * AST table
  1637. */
  1638. #ifdef FEATURE_WDS
  1639. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1640. {
  1641. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1642. struct dp_pdev *pdev;
  1643. struct dp_vdev *vdev;
  1644. struct dp_peer *peer;
  1645. struct dp_ast_entry *ase, *temp_ase;
  1646. int i;
  1647. qdf_spin_lock_bh(&soc->ast_lock);
  1648. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1649. pdev = soc->pdev_list[i];
  1650. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1651. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1652. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1653. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1654. /*
  1655. * Do not expire static ast entries
  1656. * and HM WDS entries
  1657. */
  1658. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1659. continue;
  1660. if (ase->is_active) {
  1661. ase->is_active = FALSE;
  1662. continue;
  1663. }
  1664. DP_STATS_INC(soc, ast.aged_out, 1);
  1665. dp_peer_del_ast(soc, ase);
  1666. }
  1667. }
  1668. }
  1669. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1670. }
  1671. qdf_spin_unlock_bh(&soc->ast_lock);
  1672. if (qdf_atomic_read(&soc->cmn_init_done))
  1673. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1674. }
  1675. /*
  1676. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1677. * @soc: Datapath SOC handle
  1678. *
  1679. * Return: None
  1680. */
  1681. static void dp_soc_wds_attach(struct dp_soc *soc)
  1682. {
  1683. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1684. dp_wds_aging_timer_fn, (void *)soc,
  1685. QDF_TIMER_TYPE_WAKE_APPS);
  1686. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1687. }
  1688. /*
  1689. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1690. * @txrx_soc: DP SOC handle
  1691. *
  1692. * Return: None
  1693. */
  1694. static void dp_soc_wds_detach(struct dp_soc *soc)
  1695. {
  1696. qdf_timer_stop(&soc->wds_aging_timer);
  1697. qdf_timer_free(&soc->wds_aging_timer);
  1698. }
  1699. #else
  1700. static void dp_soc_wds_attach(struct dp_soc *soc)
  1701. {
  1702. }
  1703. static void dp_soc_wds_detach(struct dp_soc *soc)
  1704. {
  1705. }
  1706. #endif
  1707. /*
  1708. * dp_soc_reset_ring_map() - Reset cpu ring map
  1709. * @soc: Datapath soc handler
  1710. *
  1711. * This api resets the default cpu ring map
  1712. */
  1713. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1714. {
  1715. uint8_t i;
  1716. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1717. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1718. if (nss_config == 1) {
  1719. /*
  1720. * Setting Tx ring map for one nss offloaded radio
  1721. */
  1722. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1723. } else if (nss_config == 2) {
  1724. /*
  1725. * Setting Tx ring for two nss offloaded radios
  1726. */
  1727. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1728. } else {
  1729. /*
  1730. * Setting Tx ring map for all nss offloaded radios
  1731. */
  1732. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1733. }
  1734. }
  1735. }
  1736. /*
  1737. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1738. * @dp_soc - DP soc handle
  1739. * @ring_type - ring type
  1740. * @ring_num - ring_num
  1741. *
  1742. * return 0 or 1
  1743. */
  1744. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1745. {
  1746. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1747. uint8_t status = 0;
  1748. switch (ring_type) {
  1749. case WBM2SW_RELEASE:
  1750. case REO_DST:
  1751. case RXDMA_BUF:
  1752. status = ((nss_config) & (1 << ring_num));
  1753. break;
  1754. default:
  1755. break;
  1756. }
  1757. return status;
  1758. }
  1759. /*
  1760. * dp_soc_reset_intr_mask() - reset interrupt mask
  1761. * @dp_soc - DP Soc handle
  1762. *
  1763. * Return: Return void
  1764. */
  1765. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1766. {
  1767. uint8_t j;
  1768. int *grp_mask = NULL;
  1769. int group_number, mask, num_ring;
  1770. /* number of tx ring */
  1771. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1772. /*
  1773. * group mask for tx completion ring.
  1774. */
  1775. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1776. /* loop and reset the mask for only offloaded ring */
  1777. for (j = 0; j < num_ring; j++) {
  1778. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1779. continue;
  1780. }
  1781. /*
  1782. * Group number corresponding to tx offloaded ring.
  1783. */
  1784. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1785. if (group_number < 0) {
  1786. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1787. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1788. WBM2SW_RELEASE, j);
  1789. return;
  1790. }
  1791. /* reset the tx mask for offloaded ring */
  1792. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1793. mask &= (~(1 << j));
  1794. /*
  1795. * reset the interrupt mask for offloaded ring.
  1796. */
  1797. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1798. }
  1799. /* number of rx rings */
  1800. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1801. /*
  1802. * group mask for reo destination ring.
  1803. */
  1804. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1805. /* loop and reset the mask for only offloaded ring */
  1806. for (j = 0; j < num_ring; j++) {
  1807. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1808. continue;
  1809. }
  1810. /*
  1811. * Group number corresponding to rx offloaded ring.
  1812. */
  1813. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1814. if (group_number < 0) {
  1815. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1816. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1817. REO_DST, j);
  1818. return;
  1819. }
  1820. /* set the interrupt mask for offloaded ring */
  1821. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1822. mask &= (~(1 << j));
  1823. /*
  1824. * set the interrupt mask to zero for rx offloaded radio.
  1825. */
  1826. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1827. }
  1828. /*
  1829. * group mask for Rx buffer refill ring
  1830. */
  1831. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1832. /* loop and reset the mask for only offloaded ring */
  1833. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1834. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1835. continue;
  1836. }
  1837. /*
  1838. * Group number corresponding to rx offloaded ring.
  1839. */
  1840. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1841. if (group_number < 0) {
  1842. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1843. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1844. REO_DST, j);
  1845. return;
  1846. }
  1847. /* set the interrupt mask for offloaded ring */
  1848. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1849. group_number);
  1850. mask &= (~(1 << j));
  1851. /*
  1852. * set the interrupt mask to zero for rx offloaded radio.
  1853. */
  1854. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1855. group_number, mask);
  1856. }
  1857. }
  1858. #ifdef IPA_OFFLOAD
  1859. /**
  1860. * dp_reo_remap_config() - configure reo remap register value based
  1861. * nss configuration.
  1862. * based on offload_radio value below remap configuration
  1863. * get applied.
  1864. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1865. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1866. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1867. * 3 - both Radios handled by NSS (remap not required)
  1868. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1869. *
  1870. * @remap1: output parameter indicates reo remap 1 register value
  1871. * @remap2: output parameter indicates reo remap 2 register value
  1872. * Return: bool type, true if remap is configured else false.
  1873. */
  1874. static bool dp_reo_remap_config(struct dp_soc *soc,
  1875. uint32_t *remap1,
  1876. uint32_t *remap2)
  1877. {
  1878. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1879. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1880. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1881. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1882. return true;
  1883. }
  1884. #else
  1885. static bool dp_reo_remap_config(struct dp_soc *soc,
  1886. uint32_t *remap1,
  1887. uint32_t *remap2)
  1888. {
  1889. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1890. switch (offload_radio) {
  1891. case 0:
  1892. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1893. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1894. (0x3 << 18) | (0x4 << 21)) << 8;
  1895. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1896. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1897. (0x3 << 18) | (0x4 << 21)) << 8;
  1898. break;
  1899. case 1:
  1900. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1901. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1902. (0x2 << 18) | (0x3 << 21)) << 8;
  1903. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1904. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1905. (0x4 << 18) | (0x2 << 21)) << 8;
  1906. break;
  1907. case 2:
  1908. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1909. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1910. (0x1 << 18) | (0x3 << 21)) << 8;
  1911. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1912. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1913. (0x4 << 18) | (0x1 << 21)) << 8;
  1914. break;
  1915. case 3:
  1916. /* return false if both radios are offloaded to NSS */
  1917. return false;
  1918. }
  1919. return true;
  1920. }
  1921. #endif
  1922. /*
  1923. * dp_reo_frag_dst_set() - configure reo register to set the
  1924. * fragment destination ring
  1925. * @soc : Datapath soc
  1926. * @frag_dst_ring : output parameter to set fragment destination ring
  1927. *
  1928. * Based on offload_radio below fragment destination rings is selected
  1929. * 0 - TCL
  1930. * 1 - SW1
  1931. * 2 - SW2
  1932. * 3 - SW3
  1933. * 4 - SW4
  1934. * 5 - Release
  1935. * 6 - FW
  1936. * 7 - alternate select
  1937. *
  1938. * return: void
  1939. */
  1940. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1941. {
  1942. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1943. switch (offload_radio) {
  1944. case 0:
  1945. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1946. break;
  1947. case 3:
  1948. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1949. break;
  1950. default:
  1951. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1952. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1953. break;
  1954. }
  1955. }
  1956. /*
  1957. * dp_soc_cmn_setup() - Common SoC level initializion
  1958. * @soc: Datapath SOC handle
  1959. *
  1960. * This is an internal function used to setup common SOC data structures,
  1961. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1962. */
  1963. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1964. {
  1965. int i;
  1966. struct hal_reo_params reo_params;
  1967. int tx_ring_size;
  1968. int tx_comp_ring_size;
  1969. int reo_dst_ring_size;
  1970. uint32_t entries;
  1971. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1972. if (qdf_atomic_read(&soc->cmn_init_done))
  1973. return 0;
  1974. if (dp_hw_link_desc_pool_setup(soc))
  1975. goto fail1;
  1976. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1977. /* Setup SRNG rings */
  1978. /* Common rings */
  1979. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1980. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  1981. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1982. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1983. goto fail1;
  1984. }
  1985. soc->num_tcl_data_rings = 0;
  1986. /* Tx data rings */
  1987. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  1988. soc->num_tcl_data_rings =
  1989. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  1990. tx_comp_ring_size =
  1991. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1992. tx_ring_size =
  1993. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  1994. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1995. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1996. TCL_DATA, i, 0, tx_ring_size)) {
  1997. QDF_TRACE(QDF_MODULE_ID_DP,
  1998. QDF_TRACE_LEVEL_ERROR,
  1999. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2000. goto fail1;
  2001. }
  2002. /*
  2003. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2004. * count
  2005. */
  2006. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2007. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2008. QDF_TRACE(QDF_MODULE_ID_DP,
  2009. QDF_TRACE_LEVEL_ERROR,
  2010. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2011. goto fail1;
  2012. }
  2013. }
  2014. } else {
  2015. /* This will be incremented during per pdev ring setup */
  2016. soc->num_tcl_data_rings = 0;
  2017. }
  2018. if (dp_tx_soc_attach(soc)) {
  2019. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2020. FL("dp_tx_soc_attach failed"));
  2021. goto fail1;
  2022. }
  2023. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2024. /* TCL command and status rings */
  2025. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2026. entries)) {
  2027. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2028. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2029. goto fail1;
  2030. }
  2031. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2032. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2033. entries)) {
  2034. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2035. FL("dp_srng_setup failed for tcl_status_ring"));
  2036. goto fail1;
  2037. }
  2038. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2039. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2040. * descriptors
  2041. */
  2042. /* Rx data rings */
  2043. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2044. soc->num_reo_dest_rings =
  2045. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2046. QDF_TRACE(QDF_MODULE_ID_DP,
  2047. QDF_TRACE_LEVEL_INFO,
  2048. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2049. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2050. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2051. i, 0, reo_dst_ring_size)) {
  2052. QDF_TRACE(QDF_MODULE_ID_DP,
  2053. QDF_TRACE_LEVEL_ERROR,
  2054. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2055. goto fail1;
  2056. }
  2057. }
  2058. } else {
  2059. /* This will be incremented during per pdev ring setup */
  2060. soc->num_reo_dest_rings = 0;
  2061. }
  2062. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2063. /* LMAC RxDMA to SW Rings configuration */
  2064. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2065. /* Only valid for MCL */
  2066. struct dp_pdev *pdev = soc->pdev_list[0];
  2067. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2068. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2069. RXDMA_DST, 0, i,
  2070. entries)) {
  2071. QDF_TRACE(QDF_MODULE_ID_DP,
  2072. QDF_TRACE_LEVEL_ERROR,
  2073. FL(RNG_ERR "rxdma_err_dst_ring"));
  2074. goto fail1;
  2075. }
  2076. }
  2077. }
  2078. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2079. /* REO reinjection ring */
  2080. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2081. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2082. entries)) {
  2083. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2084. FL("dp_srng_setup failed for reo_reinject_ring"));
  2085. goto fail1;
  2086. }
  2087. /* Rx release ring */
  2088. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2089. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2090. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2091. FL("dp_srng_setup failed for rx_rel_ring"));
  2092. goto fail1;
  2093. }
  2094. /* Rx exception ring */
  2095. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2096. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2097. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2098. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2099. FL("dp_srng_setup failed for reo_exception_ring"));
  2100. goto fail1;
  2101. }
  2102. /* REO command and status rings */
  2103. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2104. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2106. FL("dp_srng_setup failed for reo_cmd_ring"));
  2107. goto fail1;
  2108. }
  2109. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2110. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2111. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2112. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2113. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2114. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2115. FL("dp_srng_setup failed for reo_status_ring"));
  2116. goto fail1;
  2117. }
  2118. qdf_spinlock_create(&soc->ast_lock);
  2119. dp_soc_wds_attach(soc);
  2120. /* Reset the cpu ring map if radio is NSS offloaded */
  2121. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2122. dp_soc_reset_cpu_ring_map(soc);
  2123. dp_soc_reset_intr_mask(soc);
  2124. }
  2125. /* Setup HW REO */
  2126. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2127. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2128. /*
  2129. * Reo ring remap is not required if both radios
  2130. * are offloaded to NSS
  2131. */
  2132. if (!dp_reo_remap_config(soc,
  2133. &reo_params.remap1,
  2134. &reo_params.remap2))
  2135. goto out;
  2136. reo_params.rx_hash_enabled = true;
  2137. }
  2138. /* setup the global rx defrag waitlist */
  2139. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2140. soc->rx.defrag.timeout_ms =
  2141. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2142. soc->rx.flags.defrag_timeout_check =
  2143. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2144. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2145. out:
  2146. /*
  2147. * set the fragment destination ring
  2148. */
  2149. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2150. hal_reo_setup(soc->hal_soc, &reo_params);
  2151. qdf_atomic_set(&soc->cmn_init_done, 1);
  2152. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2153. return 0;
  2154. fail1:
  2155. /*
  2156. * Cleanup will be done as part of soc_detach, which will
  2157. * be called on pdev attach failure
  2158. */
  2159. return QDF_STATUS_E_FAILURE;
  2160. }
  2161. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2162. static void dp_lro_hash_setup(struct dp_soc *soc)
  2163. {
  2164. struct cdp_lro_hash_config lro_hash;
  2165. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2166. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2167. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2168. FL("LRO disabled RX hash disabled"));
  2169. return;
  2170. }
  2171. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2172. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2173. lro_hash.lro_enable = 1;
  2174. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2175. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2176. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2177. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2178. }
  2179. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2180. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2181. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2182. LRO_IPV4_SEED_ARR_SZ));
  2183. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2184. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2185. LRO_IPV6_SEED_ARR_SZ));
  2186. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2187. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2188. lro_hash.lro_enable, lro_hash.tcp_flag,
  2189. lro_hash.tcp_flag_mask);
  2190. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2191. QDF_TRACE_LEVEL_ERROR,
  2192. (void *)lro_hash.toeplitz_hash_ipv4,
  2193. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2194. LRO_IPV4_SEED_ARR_SZ));
  2195. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2196. QDF_TRACE_LEVEL_ERROR,
  2197. (void *)lro_hash.toeplitz_hash_ipv6,
  2198. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2199. LRO_IPV6_SEED_ARR_SZ));
  2200. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2201. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2202. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2203. (soc->ctrl_psoc, &lro_hash);
  2204. }
  2205. /*
  2206. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2207. * @soc: data path SoC handle
  2208. * @pdev: Physical device handle
  2209. *
  2210. * Return: 0 - success, > 0 - failure
  2211. */
  2212. #ifdef QCA_HOST2FW_RXBUF_RING
  2213. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2214. struct dp_pdev *pdev)
  2215. {
  2216. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2217. int max_mac_rings;
  2218. int i;
  2219. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2220. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2221. for (i = 0; i < max_mac_rings; i++) {
  2222. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2223. "%s: pdev_id %d mac_id %d",
  2224. __func__, pdev->pdev_id, i);
  2225. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2226. RXDMA_BUF, 1, i,
  2227. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2228. QDF_TRACE(QDF_MODULE_ID_DP,
  2229. QDF_TRACE_LEVEL_ERROR,
  2230. FL("failed rx mac ring setup"));
  2231. return QDF_STATUS_E_FAILURE;
  2232. }
  2233. }
  2234. return QDF_STATUS_SUCCESS;
  2235. }
  2236. #else
  2237. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2238. struct dp_pdev *pdev)
  2239. {
  2240. return QDF_STATUS_SUCCESS;
  2241. }
  2242. #endif
  2243. /**
  2244. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2245. * @pdev - DP_PDEV handle
  2246. *
  2247. * Return: void
  2248. */
  2249. static inline void
  2250. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2251. {
  2252. uint8_t map_id;
  2253. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2254. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2255. sizeof(default_dscp_tid_map));
  2256. }
  2257. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2258. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2259. pdev->dscp_tid_map[map_id],
  2260. map_id);
  2261. }
  2262. }
  2263. #ifdef QCA_SUPPORT_SON
  2264. /**
  2265. * dp_mark_peer_inact(): Update peer inactivity status
  2266. * @peer_handle - datapath peer handle
  2267. *
  2268. * Return: void
  2269. */
  2270. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2271. {
  2272. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2273. struct dp_pdev *pdev;
  2274. struct dp_soc *soc;
  2275. bool inactive_old;
  2276. if (!peer)
  2277. return;
  2278. pdev = peer->vdev->pdev;
  2279. soc = pdev->soc;
  2280. inactive_old = peer->peer_bs_inact_flag == 1;
  2281. if (!inactive)
  2282. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2283. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2284. if (inactive_old != inactive) {
  2285. /**
  2286. * Note: a node lookup can happen in RX datapath context
  2287. * when a node changes from inactive to active (at most once
  2288. * per inactivity timeout threshold)
  2289. */
  2290. if (soc->cdp_soc.ol_ops->record_act_change) {
  2291. soc->cdp_soc.ol_ops->record_act_change(
  2292. (void *)pdev->ctrl_pdev,
  2293. peer->mac_addr.raw, !inactive);
  2294. }
  2295. }
  2296. }
  2297. /**
  2298. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2299. *
  2300. * Periodically checks the inactivity status
  2301. */
  2302. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2303. {
  2304. struct dp_pdev *pdev;
  2305. struct dp_vdev *vdev;
  2306. struct dp_peer *peer;
  2307. struct dp_soc *soc;
  2308. int i;
  2309. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2310. qdf_spin_lock(&soc->peer_ref_mutex);
  2311. for (i = 0; i < soc->pdev_count; i++) {
  2312. pdev = soc->pdev_list[i];
  2313. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2314. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2315. if (vdev->opmode != wlan_op_mode_ap)
  2316. continue;
  2317. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2318. if (!peer->authorize) {
  2319. /**
  2320. * Inactivity check only interested in
  2321. * connected node
  2322. */
  2323. continue;
  2324. }
  2325. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2326. /**
  2327. * This check ensures we do not wait extra long
  2328. * due to the potential race condition
  2329. */
  2330. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2331. }
  2332. if (peer->peer_bs_inact > 0) {
  2333. /* Do not let it wrap around */
  2334. peer->peer_bs_inact--;
  2335. }
  2336. if (peer->peer_bs_inact == 0)
  2337. dp_mark_peer_inact(peer, true);
  2338. }
  2339. }
  2340. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2341. }
  2342. qdf_spin_unlock(&soc->peer_ref_mutex);
  2343. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2344. soc->pdev_bs_inact_interval * 1000);
  2345. }
  2346. /**
  2347. * dp_free_inact_timer(): free inact timer
  2348. * @timer - inact timer handle
  2349. *
  2350. * Return: bool
  2351. */
  2352. void dp_free_inact_timer(struct dp_soc *soc)
  2353. {
  2354. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2355. }
  2356. #else
  2357. void dp_mark_peer_inact(void *peer, bool inactive)
  2358. {
  2359. return;
  2360. }
  2361. void dp_free_inact_timer(struct dp_soc *soc)
  2362. {
  2363. return;
  2364. }
  2365. #endif
  2366. #ifdef IPA_OFFLOAD
  2367. /**
  2368. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2369. * @soc: data path instance
  2370. * @pdev: core txrx pdev context
  2371. *
  2372. * Return: QDF_STATUS_SUCCESS: success
  2373. * QDF_STATUS_E_RESOURCES: Error return
  2374. */
  2375. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2376. struct dp_pdev *pdev)
  2377. {
  2378. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2379. int entries;
  2380. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2381. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2382. /* Setup second Rx refill buffer ring */
  2383. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2384. IPA_RX_REFILL_BUF_RING_IDX,
  2385. pdev->pdev_id,
  2386. entries)) {
  2387. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2388. FL("dp_srng_setup failed second rx refill ring"));
  2389. return QDF_STATUS_E_FAILURE;
  2390. }
  2391. return QDF_STATUS_SUCCESS;
  2392. }
  2393. /**
  2394. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2395. * @soc: data path instance
  2396. * @pdev: core txrx pdev context
  2397. *
  2398. * Return: void
  2399. */
  2400. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2401. struct dp_pdev *pdev)
  2402. {
  2403. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2404. IPA_RX_REFILL_BUF_RING_IDX);
  2405. }
  2406. #else
  2407. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2408. struct dp_pdev *pdev)
  2409. {
  2410. return QDF_STATUS_SUCCESS;
  2411. }
  2412. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2413. struct dp_pdev *pdev)
  2414. {
  2415. }
  2416. #endif
  2417. #ifndef QCA_WIFI_QCA6390
  2418. static
  2419. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2420. {
  2421. int mac_id = 0;
  2422. int pdev_id = pdev->pdev_id;
  2423. int entries;
  2424. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2425. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2426. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2427. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2428. entries = wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2429. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2430. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2431. entries)) {
  2432. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2433. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2434. return QDF_STATUS_E_NOMEM;
  2435. }
  2436. entries = wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2437. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2438. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2439. entries)) {
  2440. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2441. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2442. return QDF_STATUS_E_NOMEM;
  2443. }
  2444. entries = wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2445. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2446. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2447. entries)) {
  2448. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2449. FL(RNG_ERR "rxdma_mon_status_ring"));
  2450. return QDF_STATUS_E_NOMEM;
  2451. }
  2452. entries = wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2453. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2454. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2455. entries)) {
  2456. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2457. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2458. return QDF_STATUS_E_NOMEM;
  2459. }
  2460. }
  2461. return QDF_STATUS_SUCCESS;
  2462. }
  2463. #else
  2464. static QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2465. {
  2466. return QDF_STATUS_SUCCESS;
  2467. }
  2468. #endif
  2469. /*
  2470. * dp_pdev_attach_wifi3() - attach txrx pdev
  2471. * @ctrl_pdev: Opaque PDEV object
  2472. * @txrx_soc: Datapath SOC handle
  2473. * @htc_handle: HTC handle for host-target interface
  2474. * @qdf_osdev: QDF OS device
  2475. * @pdev_id: PDEV ID
  2476. *
  2477. * Return: DP PDEV handle on success, NULL on failure
  2478. */
  2479. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2480. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2481. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2482. {
  2483. int tx_ring_size;
  2484. int tx_comp_ring_size;
  2485. int reo_dst_ring_size;
  2486. int entries;
  2487. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2488. int nss_cfg;
  2489. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2490. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2491. if (!pdev) {
  2492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2493. FL("DP PDEV memory allocation failed"));
  2494. goto fail0;
  2495. }
  2496. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2497. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2498. if (!pdev->wlan_cfg_ctx) {
  2499. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2500. FL("pdev cfg_attach failed"));
  2501. qdf_mem_free(pdev);
  2502. goto fail0;
  2503. }
  2504. /*
  2505. * set nss pdev config based on soc config
  2506. */
  2507. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2508. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2509. (nss_cfg & (1 << pdev_id)));
  2510. pdev->soc = soc;
  2511. pdev->ctrl_pdev = ctrl_pdev;
  2512. pdev->pdev_id = pdev_id;
  2513. soc->pdev_list[pdev_id] = pdev;
  2514. soc->pdev_count++;
  2515. TAILQ_INIT(&pdev->vdev_list);
  2516. qdf_spinlock_create(&pdev->vdev_list_lock);
  2517. pdev->vdev_count = 0;
  2518. qdf_spinlock_create(&pdev->tx_mutex);
  2519. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2520. TAILQ_INIT(&pdev->neighbour_peers_list);
  2521. pdev->neighbour_peers_added = false;
  2522. if (dp_soc_cmn_setup(soc)) {
  2523. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2524. FL("dp_soc_cmn_setup failed"));
  2525. goto fail1;
  2526. }
  2527. /* Setup per PDEV TCL rings if configured */
  2528. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2529. tx_ring_size =
  2530. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2531. tx_comp_ring_size =
  2532. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2533. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2534. pdev_id, pdev_id, tx_ring_size)) {
  2535. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2536. FL("dp_srng_setup failed for tcl_data_ring"));
  2537. goto fail1;
  2538. }
  2539. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2540. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2541. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2542. FL("dp_srng_setup failed for tx_comp_ring"));
  2543. goto fail1;
  2544. }
  2545. soc->num_tcl_data_rings++;
  2546. }
  2547. /* Tx specific init */
  2548. if (dp_tx_pdev_attach(pdev)) {
  2549. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2550. FL("dp_tx_pdev_attach failed"));
  2551. goto fail1;
  2552. }
  2553. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2554. /* Setup per PDEV REO rings if configured */
  2555. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2556. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2557. pdev_id, pdev_id, reo_dst_ring_size)) {
  2558. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2559. FL("dp_srng_setup failed for reo_dest_ringn"));
  2560. goto fail1;
  2561. }
  2562. soc->num_reo_dest_rings++;
  2563. }
  2564. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2565. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2566. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2567. FL("dp_srng_setup failed rx refill ring"));
  2568. goto fail1;
  2569. }
  2570. if (dp_rxdma_ring_setup(soc, pdev)) {
  2571. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2572. FL("RXDMA ring config failed"));
  2573. goto fail1;
  2574. }
  2575. if (dp_mon_rings_setup(soc, pdev)) {
  2576. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2577. FL("MONITOR rings setup failed"));
  2578. goto fail1;
  2579. }
  2580. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2581. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2582. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2583. 0, pdev_id,
  2584. entries)) {
  2585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2586. FL(RNG_ERR "rxdma_err_dst_ring"));
  2587. goto fail1;
  2588. }
  2589. }
  2590. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2591. goto fail1;
  2592. if (dp_ipa_ring_resource_setup(soc, pdev))
  2593. goto fail1;
  2594. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2595. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2596. FL("dp_ipa_uc_attach failed"));
  2597. goto fail1;
  2598. }
  2599. /* Rx specific init */
  2600. if (dp_rx_pdev_attach(pdev)) {
  2601. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2602. FL("dp_rx_pdev_attach failed"));
  2603. goto fail0;
  2604. }
  2605. DP_STATS_INIT(pdev);
  2606. /* Monitor filter init */
  2607. pdev->mon_filter_mode = MON_FILTER_ALL;
  2608. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2609. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2610. pdev->fp_data_filter = FILTER_DATA_ALL;
  2611. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2612. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2613. pdev->mo_data_filter = FILTER_DATA_ALL;
  2614. dp_local_peer_id_pool_init(pdev);
  2615. dp_dscp_tid_map_setup(pdev);
  2616. /* Rx monitor mode specific init */
  2617. if (dp_rx_pdev_mon_attach(pdev)) {
  2618. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2619. "dp_rx_pdev_attach failed");
  2620. goto fail1;
  2621. }
  2622. if (dp_wdi_event_attach(pdev)) {
  2623. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2624. "dp_wdi_evet_attach failed");
  2625. goto fail1;
  2626. }
  2627. /* set the reo destination during initialization */
  2628. pdev->reo_dest = pdev->pdev_id + 1;
  2629. /*
  2630. * initialize ppdu tlv list
  2631. */
  2632. TAILQ_INIT(&pdev->ppdu_info_list);
  2633. pdev->tlv_count = 0;
  2634. pdev->list_depth = 0;
  2635. return (struct cdp_pdev *)pdev;
  2636. fail1:
  2637. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2638. fail0:
  2639. return NULL;
  2640. }
  2641. /*
  2642. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2643. * @soc: data path SoC handle
  2644. * @pdev: Physical device handle
  2645. *
  2646. * Return: void
  2647. */
  2648. #ifdef QCA_HOST2FW_RXBUF_RING
  2649. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2650. struct dp_pdev *pdev)
  2651. {
  2652. int max_mac_rings =
  2653. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2654. int i;
  2655. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2656. max_mac_rings : MAX_RX_MAC_RINGS;
  2657. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2658. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2659. RXDMA_BUF, 1);
  2660. qdf_timer_free(&soc->mon_reap_timer);
  2661. }
  2662. #else
  2663. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2664. struct dp_pdev *pdev)
  2665. {
  2666. }
  2667. #endif
  2668. /*
  2669. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2670. * @pdev: device object
  2671. *
  2672. * Return: void
  2673. */
  2674. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2675. {
  2676. struct dp_neighbour_peer *peer = NULL;
  2677. struct dp_neighbour_peer *temp_peer = NULL;
  2678. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2679. neighbour_peer_list_elem, temp_peer) {
  2680. /* delete this peer from the list */
  2681. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2682. peer, neighbour_peer_list_elem);
  2683. qdf_mem_free(peer);
  2684. }
  2685. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2686. }
  2687. /**
  2688. * dp_htt_ppdu_stats_detach() - detach stats resources
  2689. * @pdev: Datapath PDEV handle
  2690. *
  2691. * Return: void
  2692. */
  2693. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2694. {
  2695. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2696. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2697. ppdu_info_list_elem, ppdu_info_next) {
  2698. if (!ppdu_info)
  2699. break;
  2700. qdf_assert_always(ppdu_info->nbuf);
  2701. qdf_nbuf_free(ppdu_info->nbuf);
  2702. qdf_mem_free(ppdu_info);
  2703. }
  2704. }
  2705. #ifndef QCA_WIFI_QCA6390
  2706. static
  2707. void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2708. int mac_id)
  2709. {
  2710. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2711. RXDMA_MONITOR_BUF, 0);
  2712. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2713. RXDMA_MONITOR_DST, 0);
  2714. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2715. RXDMA_MONITOR_STATUS, 0);
  2716. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2717. RXDMA_MONITOR_DESC, 0);
  2718. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2719. RXDMA_DST, 0);
  2720. }
  2721. #else
  2722. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2723. int mac_id)
  2724. {
  2725. }
  2726. #endif
  2727. /*
  2728. * dp_pdev_detach_wifi3() - detach txrx pdev
  2729. * @txrx_pdev: Datapath PDEV handle
  2730. * @force: Force detach
  2731. *
  2732. */
  2733. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2734. {
  2735. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2736. struct dp_soc *soc = pdev->soc;
  2737. qdf_nbuf_t curr_nbuf, next_nbuf;
  2738. int mac_id;
  2739. dp_wdi_event_detach(pdev);
  2740. dp_tx_pdev_detach(pdev);
  2741. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2742. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2743. TCL_DATA, pdev->pdev_id);
  2744. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2745. WBM2SW_RELEASE, pdev->pdev_id);
  2746. }
  2747. dp_pktlogmod_exit(pdev);
  2748. dp_rx_pdev_detach(pdev);
  2749. dp_rx_pdev_mon_detach(pdev);
  2750. dp_neighbour_peers_detach(pdev);
  2751. qdf_spinlock_destroy(&pdev->tx_mutex);
  2752. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2753. dp_ipa_uc_detach(soc, pdev);
  2754. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2755. /* Cleanup per PDEV REO rings if configured */
  2756. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2757. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2758. REO_DST, pdev->pdev_id);
  2759. }
  2760. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2761. dp_rxdma_ring_cleanup(soc, pdev);
  2762. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2763. dp_mon_ring_deinit(soc, pdev, mac_id);
  2764. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2765. RXDMA_DST, 0);
  2766. }
  2767. curr_nbuf = pdev->invalid_peer_head_msdu;
  2768. while (curr_nbuf) {
  2769. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2770. qdf_nbuf_free(curr_nbuf);
  2771. curr_nbuf = next_nbuf;
  2772. }
  2773. dp_htt_ppdu_stats_detach(pdev);
  2774. soc->pdev_list[pdev->pdev_id] = NULL;
  2775. soc->pdev_count--;
  2776. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2777. qdf_mem_free(pdev->dp_txrx_handle);
  2778. qdf_mem_free(pdev);
  2779. }
  2780. /*
  2781. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2782. * @soc: DP SOC handle
  2783. */
  2784. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2785. {
  2786. struct reo_desc_list_node *desc;
  2787. struct dp_rx_tid *rx_tid;
  2788. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2789. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2790. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2791. rx_tid = &desc->rx_tid;
  2792. qdf_mem_unmap_nbytes_single(soc->osdev,
  2793. rx_tid->hw_qdesc_paddr,
  2794. QDF_DMA_BIDIRECTIONAL,
  2795. rx_tid->hw_qdesc_alloc_size);
  2796. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2797. qdf_mem_free(desc);
  2798. }
  2799. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2800. qdf_list_destroy(&soc->reo_desc_freelist);
  2801. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2802. }
  2803. /*
  2804. * dp_soc_detach_wifi3() - Detach txrx SOC
  2805. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2806. */
  2807. static void dp_soc_detach_wifi3(void *txrx_soc)
  2808. {
  2809. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2810. int i;
  2811. qdf_atomic_set(&soc->cmn_init_done, 0);
  2812. qdf_flush_work(&soc->htt_stats.work);
  2813. qdf_disable_work(&soc->htt_stats.work);
  2814. /* Free pending htt stats messages */
  2815. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2816. dp_free_inact_timer(soc);
  2817. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2818. if (soc->pdev_list[i])
  2819. dp_pdev_detach_wifi3(
  2820. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2821. }
  2822. dp_peer_find_detach(soc);
  2823. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2824. * SW descriptors
  2825. */
  2826. /* Free the ring memories */
  2827. /* Common rings */
  2828. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2829. dp_tx_soc_detach(soc);
  2830. /* Tx data rings */
  2831. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2832. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2833. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2834. TCL_DATA, i);
  2835. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2836. WBM2SW_RELEASE, i);
  2837. }
  2838. }
  2839. /* TCL command and status rings */
  2840. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2841. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2842. /* Rx data rings */
  2843. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2844. soc->num_reo_dest_rings =
  2845. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2846. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2847. /* TODO: Get number of rings and ring sizes
  2848. * from wlan_cfg
  2849. */
  2850. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2851. REO_DST, i);
  2852. }
  2853. }
  2854. /* REO reinjection ring */
  2855. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2856. /* Rx release ring */
  2857. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2858. /* Rx exception ring */
  2859. /* TODO: Better to store ring_type and ring_num in
  2860. * dp_srng during setup
  2861. */
  2862. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2863. /* REO command and status rings */
  2864. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2865. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2866. dp_hw_link_desc_pool_cleanup(soc);
  2867. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2868. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2869. htt_soc_detach(soc->htt_handle);
  2870. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2871. dp_reo_cmdlist_destroy(soc);
  2872. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2873. dp_reo_desc_freelist_destroy(soc);
  2874. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2875. dp_soc_wds_detach(soc);
  2876. qdf_spinlock_destroy(&soc->ast_lock);
  2877. qdf_mem_free(soc);
  2878. }
  2879. #ifndef QCA_WIFI_QCA6390
  2880. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2881. struct dp_pdev *pdev,
  2882. int mac_id,
  2883. int mac_for_pdev)
  2884. {
  2885. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2886. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2887. RXDMA_MONITOR_BUF);
  2888. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2889. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2890. RXDMA_MONITOR_DST);
  2891. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2892. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2893. RXDMA_MONITOR_STATUS);
  2894. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2895. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2896. RXDMA_MONITOR_DESC);
  2897. }
  2898. #else
  2899. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2900. struct dp_pdev *pdev,
  2901. int mac_id,
  2902. int mac_for_pdev)
  2903. {
  2904. }
  2905. #endif
  2906. /*
  2907. * dp_rxdma_ring_config() - configure the RX DMA rings
  2908. *
  2909. * This function is used to configure the MAC rings.
  2910. * On MCL host provides buffers in Host2FW ring
  2911. * FW refills (copies) buffers to the ring and updates
  2912. * ring_idx in register
  2913. *
  2914. * @soc: data path SoC handle
  2915. *
  2916. * Return: void
  2917. */
  2918. #ifdef QCA_HOST2FW_RXBUF_RING
  2919. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2920. {
  2921. int i;
  2922. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2923. struct dp_pdev *pdev = soc->pdev_list[i];
  2924. if (pdev) {
  2925. int mac_id;
  2926. bool dbs_enable = 0;
  2927. int max_mac_rings =
  2928. wlan_cfg_get_num_mac_rings
  2929. (pdev->wlan_cfg_ctx);
  2930. htt_srng_setup(soc->htt_handle, 0,
  2931. pdev->rx_refill_buf_ring.hal_srng,
  2932. RXDMA_BUF);
  2933. if (pdev->rx_refill_buf_ring2.hal_srng)
  2934. htt_srng_setup(soc->htt_handle, 0,
  2935. pdev->rx_refill_buf_ring2.hal_srng,
  2936. RXDMA_BUF);
  2937. if (soc->cdp_soc.ol_ops->
  2938. is_hw_dbs_2x2_capable) {
  2939. dbs_enable = soc->cdp_soc.ol_ops->
  2940. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2941. }
  2942. if (dbs_enable) {
  2943. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2944. QDF_TRACE_LEVEL_ERROR,
  2945. FL("DBS enabled max_mac_rings %d"),
  2946. max_mac_rings);
  2947. } else {
  2948. max_mac_rings = 1;
  2949. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2950. QDF_TRACE_LEVEL_ERROR,
  2951. FL("DBS disabled, max_mac_rings %d"),
  2952. max_mac_rings);
  2953. }
  2954. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2955. FL("pdev_id %d max_mac_rings %d"),
  2956. pdev->pdev_id, max_mac_rings);
  2957. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2958. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2959. mac_id, pdev->pdev_id);
  2960. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2961. QDF_TRACE_LEVEL_ERROR,
  2962. FL("mac_id %d"), mac_for_pdev);
  2963. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2964. pdev->rx_mac_buf_ring[mac_id]
  2965. .hal_srng,
  2966. RXDMA_BUF);
  2967. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2968. pdev->rxdma_err_dst_ring[mac_id]
  2969. .hal_srng,
  2970. RXDMA_DST);
  2971. /* Configure monitor mode rings */
  2972. dp_mon_htt_srng_setup(soc, pdev, mac_id,
  2973. mac_for_pdev);
  2974. }
  2975. }
  2976. }
  2977. /*
  2978. * Timer to reap rxdma status rings.
  2979. * Needed until we enable ppdu end interrupts
  2980. */
  2981. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2982. dp_service_mon_rings, (void *)soc,
  2983. QDF_TIMER_TYPE_WAKE_APPS);
  2984. soc->reap_timer_init = 1;
  2985. }
  2986. #else
  2987. /* This is only for WIN */
  2988. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2989. {
  2990. int i;
  2991. int mac_id;
  2992. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2993. struct dp_pdev *pdev = soc->pdev_list[i];
  2994. if (pdev == NULL)
  2995. continue;
  2996. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2997. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2998. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2999. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3000. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3001. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3002. RXDMA_MONITOR_BUF);
  3003. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3004. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3005. RXDMA_MONITOR_DST);
  3006. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3007. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3008. RXDMA_MONITOR_STATUS);
  3009. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3010. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3011. RXDMA_MONITOR_DESC);
  3012. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3013. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3014. RXDMA_DST);
  3015. }
  3016. }
  3017. }
  3018. #endif
  3019. /*
  3020. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3021. * @txrx_soc: Datapath SOC handle
  3022. */
  3023. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3024. {
  3025. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3026. htt_soc_attach_target(soc->htt_handle);
  3027. dp_rxdma_ring_config(soc);
  3028. DP_STATS_INIT(soc);
  3029. /* initialize work queue for stats processing */
  3030. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3031. return 0;
  3032. }
  3033. /*
  3034. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3035. * @txrx_soc: Datapath SOC handle
  3036. */
  3037. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3038. {
  3039. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3040. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3041. }
  3042. /*
  3043. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3044. * @txrx_soc: Datapath SOC handle
  3045. * @nss_cfg: nss config
  3046. */
  3047. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3048. {
  3049. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3050. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3051. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3052. /*
  3053. * TODO: masked out based on the per offloaded radio
  3054. */
  3055. if (config == dp_nss_cfg_dbdc) {
  3056. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3057. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3058. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3059. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3060. }
  3061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3062. FL("nss-wifi<0> nss config is enabled"));
  3063. }
  3064. /*
  3065. * dp_vdev_attach_wifi3() - attach txrx vdev
  3066. * @txrx_pdev: Datapath PDEV handle
  3067. * @vdev_mac_addr: MAC address of the virtual interface
  3068. * @vdev_id: VDEV Id
  3069. * @wlan_op_mode: VDEV operating mode
  3070. *
  3071. * Return: DP VDEV handle on success, NULL on failure
  3072. */
  3073. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3074. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3075. {
  3076. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3077. struct dp_soc *soc = pdev->soc;
  3078. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3079. if (!vdev) {
  3080. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3081. FL("DP VDEV memory allocation failed"));
  3082. goto fail0;
  3083. }
  3084. vdev->pdev = pdev;
  3085. vdev->vdev_id = vdev_id;
  3086. vdev->opmode = op_mode;
  3087. vdev->osdev = soc->osdev;
  3088. vdev->osif_rx = NULL;
  3089. vdev->osif_rsim_rx_decap = NULL;
  3090. vdev->osif_get_key = NULL;
  3091. vdev->osif_rx_mon = NULL;
  3092. vdev->osif_tx_free_ext = NULL;
  3093. vdev->osif_vdev = NULL;
  3094. vdev->delete.pending = 0;
  3095. vdev->safemode = 0;
  3096. vdev->drop_unenc = 1;
  3097. vdev->sec_type = cdp_sec_type_none;
  3098. #ifdef notyet
  3099. vdev->filters_num = 0;
  3100. #endif
  3101. qdf_mem_copy(
  3102. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3103. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3104. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3105. vdev->dscp_tid_map_id = 0;
  3106. vdev->mcast_enhancement_en = 0;
  3107. /* TODO: Initialize default HTT meta data that will be used in
  3108. * TCL descriptors for packets transmitted from this VDEV
  3109. */
  3110. TAILQ_INIT(&vdev->peer_list);
  3111. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3112. /* add this vdev into the pdev's list */
  3113. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3114. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3115. pdev->vdev_count++;
  3116. dp_tx_vdev_attach(vdev);
  3117. if ((soc->intr_mode == DP_INTR_POLL) &&
  3118. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3119. if (pdev->vdev_count == 1)
  3120. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3121. }
  3122. dp_lro_hash_setup(soc);
  3123. /* LRO */
  3124. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  3125. wlan_op_mode_sta == vdev->opmode)
  3126. vdev->lro_enable = true;
  3127. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3128. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  3129. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3130. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3131. DP_STATS_INIT(vdev);
  3132. if (wlan_op_mode_sta == vdev->opmode)
  3133. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3134. vdev->mac_addr.raw,
  3135. NULL);
  3136. return (struct cdp_vdev *)vdev;
  3137. fail0:
  3138. return NULL;
  3139. }
  3140. /**
  3141. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3142. * @vdev: Datapath VDEV handle
  3143. * @osif_vdev: OSIF vdev handle
  3144. * @ctrl_vdev: UMAC vdev handle
  3145. * @txrx_ops: Tx and Rx operations
  3146. *
  3147. * Return: DP VDEV handle on success, NULL on failure
  3148. */
  3149. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3150. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3151. struct ol_txrx_ops *txrx_ops)
  3152. {
  3153. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3154. vdev->osif_vdev = osif_vdev;
  3155. vdev->ctrl_vdev = ctrl_vdev;
  3156. vdev->osif_rx = txrx_ops->rx.rx;
  3157. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3158. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3159. vdev->osif_get_key = txrx_ops->get_key;
  3160. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3161. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3162. #ifdef notyet
  3163. #if ATH_SUPPORT_WAPI
  3164. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3165. #endif
  3166. #endif
  3167. #ifdef UMAC_SUPPORT_PROXY_ARP
  3168. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3169. #endif
  3170. vdev->me_convert = txrx_ops->me_convert;
  3171. /* TODO: Enable the following once Tx code is integrated */
  3172. if (vdev->mesh_vdev)
  3173. txrx_ops->tx.tx = dp_tx_send_mesh;
  3174. else
  3175. txrx_ops->tx.tx = dp_tx_send;
  3176. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3178. "DP Vdev Register success");
  3179. }
  3180. /**
  3181. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3182. * @vdev: Datapath VDEV handle
  3183. *
  3184. * Return: void
  3185. */
  3186. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  3187. {
  3188. struct dp_pdev *pdev = vdev->pdev;
  3189. struct dp_soc *soc = pdev->soc;
  3190. struct dp_peer *peer;
  3191. uint16_t *peer_ids;
  3192. uint8_t i = 0, j = 0;
  3193. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3194. if (!peer_ids) {
  3195. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3196. "DP alloc failure - unable to flush peers");
  3197. return;
  3198. }
  3199. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3200. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3201. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3202. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3203. if (j < soc->max_peers)
  3204. peer_ids[j++] = peer->peer_ids[i];
  3205. }
  3206. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3207. for (i = 0; i < j ; i++)
  3208. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  3209. qdf_mem_free(peer_ids);
  3210. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3211. FL("Flushed peers for vdev object %pK "), vdev);
  3212. }
  3213. /*
  3214. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3215. * @txrx_vdev: Datapath VDEV handle
  3216. * @callback: Callback OL_IF on completion of detach
  3217. * @cb_context: Callback context
  3218. *
  3219. */
  3220. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  3221. ol_txrx_vdev_delete_cb callback, void *cb_context)
  3222. {
  3223. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3224. struct dp_pdev *pdev = vdev->pdev;
  3225. struct dp_soc *soc = pdev->soc;
  3226. struct dp_neighbour_peer *peer = NULL;
  3227. /* preconditions */
  3228. qdf_assert(vdev);
  3229. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3230. /* remove the vdev from its parent pdev's list */
  3231. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  3232. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3233. if (wlan_op_mode_sta == vdev->opmode)
  3234. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  3235. /*
  3236. * If Target is hung, flush all peers before detaching vdev
  3237. * this will free all references held due to missing
  3238. * unmap commands from Target
  3239. */
  3240. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3241. dp_vdev_flush_peers(vdev);
  3242. /*
  3243. * Use peer_ref_mutex while accessing peer_list, in case
  3244. * a peer is in the process of being removed from the list.
  3245. */
  3246. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3247. /* check that the vdev has no peers allocated */
  3248. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3249. /* debug print - will be removed later */
  3250. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3251. FL("not deleting vdev object %pK (%pM)"
  3252. "until deletion finishes for all its peers"),
  3253. vdev, vdev->mac_addr.raw);
  3254. /* indicate that the vdev needs to be deleted */
  3255. vdev->delete.pending = 1;
  3256. vdev->delete.callback = callback;
  3257. vdev->delete.context = cb_context;
  3258. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3259. return;
  3260. }
  3261. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3262. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3263. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3264. neighbour_peer_list_elem) {
  3265. QDF_ASSERT(peer->vdev != vdev);
  3266. }
  3267. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3268. dp_tx_vdev_detach(vdev);
  3269. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3270. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3271. qdf_mem_free(vdev);
  3272. if (callback)
  3273. callback(cb_context);
  3274. }
  3275. /*
  3276. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3277. * @soc - datapath soc handle
  3278. * @peer - datapath peer handle
  3279. *
  3280. * Delete the AST entries belonging to a peer
  3281. */
  3282. #ifdef FEATURE_AST
  3283. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3284. struct dp_peer *peer)
  3285. {
  3286. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3287. qdf_spin_lock_bh(&soc->ast_lock);
  3288. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3289. dp_peer_del_ast(soc, ast_entry);
  3290. peer->self_ast_entry = NULL;
  3291. TAILQ_INIT(&peer->ast_entry_list);
  3292. qdf_spin_unlock_bh(&soc->ast_lock);
  3293. }
  3294. #else
  3295. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3296. struct dp_peer *peer)
  3297. {
  3298. }
  3299. #endif
  3300. #if ATH_SUPPORT_WRAP
  3301. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3302. uint8_t *peer_mac_addr)
  3303. {
  3304. struct dp_peer *peer;
  3305. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3306. 0, vdev->vdev_id);
  3307. if (!peer)
  3308. return NULL;
  3309. if (peer->bss_peer)
  3310. return peer;
  3311. qdf_atomic_dec(&peer->ref_cnt);
  3312. return NULL;
  3313. }
  3314. #else
  3315. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3316. uint8_t *peer_mac_addr)
  3317. {
  3318. struct dp_peer *peer;
  3319. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3320. 0, vdev->vdev_id);
  3321. if (!peer)
  3322. return NULL;
  3323. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  3324. return peer;
  3325. qdf_atomic_dec(&peer->ref_cnt);
  3326. return NULL;
  3327. }
  3328. #endif
  3329. /*
  3330. * dp_peer_create_wifi3() - attach txrx peer
  3331. * @txrx_vdev: Datapath VDEV handle
  3332. * @peer_mac_addr: Peer MAC address
  3333. *
  3334. * Return: DP peeer handle on success, NULL on failure
  3335. */
  3336. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3337. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  3338. {
  3339. struct dp_peer *peer;
  3340. int i;
  3341. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3342. struct dp_pdev *pdev;
  3343. struct dp_soc *soc;
  3344. struct dp_ast_entry *ast_entry;
  3345. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  3346. /* preconditions */
  3347. qdf_assert(vdev);
  3348. qdf_assert(peer_mac_addr);
  3349. pdev = vdev->pdev;
  3350. soc = pdev->soc;
  3351. /*
  3352. * If a peer entry with given MAC address already exists,
  3353. * reuse the peer and reset the state of peer.
  3354. */
  3355. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  3356. if (peer) {
  3357. peer->delete_in_progress = false;
  3358. dp_peer_delete_ast_entries(soc, peer);
  3359. if ((vdev->opmode == wlan_op_mode_sta) &&
  3360. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  3361. DP_MAC_ADDR_LEN)) {
  3362. ast_type = CDP_TXRX_AST_TYPE_SELF;
  3363. }
  3364. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  3365. /*
  3366. * Control path maintains a node count which is incremented
  3367. * for every new peer create command. Since new peer is not being
  3368. * created and earlier reference is reused here,
  3369. * peer_unref_delete event is sent to control path to
  3370. * increment the count back.
  3371. */
  3372. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3373. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3374. vdev->vdev_id, peer->mac_addr.raw);
  3375. }
  3376. peer->ctrl_peer = ctrl_peer;
  3377. dp_local_peer_id_alloc(pdev, peer);
  3378. DP_STATS_INIT(peer);
  3379. return (void *)peer;
  3380. } else {
  3381. /*
  3382. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  3383. * need to remove the AST entry which was earlier added as a WDS
  3384. * entry.
  3385. * If an AST entry exists, but no peer entry exists with a given
  3386. * MAC addresses, we could deduce it as a WDS entry
  3387. */
  3388. qdf_spin_lock_bh(&soc->ast_lock);
  3389. ast_entry = dp_peer_ast_hash_find(soc, peer_mac_addr);
  3390. if (ast_entry)
  3391. dp_peer_del_ast(soc, ast_entry);
  3392. qdf_spin_unlock_bh(&soc->ast_lock);
  3393. }
  3394. #ifdef notyet
  3395. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3396. soc->mempool_ol_ath_peer);
  3397. #else
  3398. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3399. #endif
  3400. if (!peer)
  3401. return NULL; /* failure */
  3402. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3403. TAILQ_INIT(&peer->ast_entry_list);
  3404. /* store provided params */
  3405. peer->vdev = vdev;
  3406. peer->ctrl_peer = ctrl_peer;
  3407. if ((vdev->opmode == wlan_op_mode_sta) &&
  3408. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  3409. DP_MAC_ADDR_LEN)) {
  3410. ast_type = CDP_TXRX_AST_TYPE_SELF;
  3411. }
  3412. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  3413. qdf_spinlock_create(&peer->peer_info_lock);
  3414. qdf_mem_copy(
  3415. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3416. /* TODO: See of rx_opt_proc is really required */
  3417. peer->rx_opt_proc = soc->rx_opt_proc;
  3418. /* initialize the peer_id */
  3419. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3420. peer->peer_ids[i] = HTT_INVALID_PEER;
  3421. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3422. qdf_atomic_init(&peer->ref_cnt);
  3423. /* keep one reference for attach */
  3424. qdf_atomic_inc(&peer->ref_cnt);
  3425. /* add this peer into the vdev's list */
  3426. if (wlan_op_mode_sta == vdev->opmode)
  3427. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3428. else
  3429. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3430. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3431. /* TODO: See if hash based search is required */
  3432. dp_peer_find_hash_add(soc, peer);
  3433. /* Initialize the peer state */
  3434. peer->state = OL_TXRX_PEER_STATE_DISC;
  3435. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3436. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3437. vdev, peer, peer->mac_addr.raw,
  3438. qdf_atomic_read(&peer->ref_cnt));
  3439. /*
  3440. * For every peer MAp message search and set if bss_peer
  3441. */
  3442. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3443. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3444. "vdev bss_peer!!!!");
  3445. peer->bss_peer = 1;
  3446. vdev->vap_bss_peer = peer;
  3447. }
  3448. for (i = 0; i < DP_MAX_TIDS; i++)
  3449. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  3450. dp_local_peer_id_alloc(pdev, peer);
  3451. DP_STATS_INIT(peer);
  3452. return (void *)peer;
  3453. }
  3454. /*
  3455. * dp_peer_setup_wifi3() - initialize the peer
  3456. * @vdev_hdl: virtual device object
  3457. * @peer: Peer object
  3458. *
  3459. * Return: void
  3460. */
  3461. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3462. {
  3463. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3464. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3465. struct dp_pdev *pdev;
  3466. struct dp_soc *soc;
  3467. bool hash_based = 0;
  3468. enum cdp_host_reo_dest_ring reo_dest;
  3469. /* preconditions */
  3470. qdf_assert(vdev);
  3471. qdf_assert(peer);
  3472. pdev = vdev->pdev;
  3473. soc = pdev->soc;
  3474. peer->last_assoc_rcvd = 0;
  3475. peer->last_disassoc_rcvd = 0;
  3476. peer->last_deauth_rcvd = 0;
  3477. /*
  3478. * hash based steering is disabled for Radios which are offloaded
  3479. * to NSS
  3480. */
  3481. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3482. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3483. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3484. FL("hash based steering for pdev: %d is %d"),
  3485. pdev->pdev_id, hash_based);
  3486. /*
  3487. * Below line of code will ensure the proper reo_dest ring is chosen
  3488. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3489. */
  3490. reo_dest = pdev->reo_dest;
  3491. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3492. /* TODO: Check the destination ring number to be passed to FW */
  3493. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3494. pdev->ctrl_pdev, peer->mac_addr.raw,
  3495. peer->vdev->vdev_id, hash_based, reo_dest);
  3496. }
  3497. dp_peer_rx_init(pdev, peer);
  3498. return;
  3499. }
  3500. /*
  3501. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3502. * @vdev_handle: virtual device object
  3503. * @htt_pkt_type: type of pkt
  3504. *
  3505. * Return: void
  3506. */
  3507. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3508. enum htt_cmn_pkt_type val)
  3509. {
  3510. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3511. vdev->tx_encap_type = val;
  3512. }
  3513. /*
  3514. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3515. * @vdev_handle: virtual device object
  3516. * @htt_pkt_type: type of pkt
  3517. *
  3518. * Return: void
  3519. */
  3520. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3521. enum htt_cmn_pkt_type val)
  3522. {
  3523. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3524. vdev->rx_decap_type = val;
  3525. }
  3526. /*
  3527. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  3528. * @txrx_soc: cdp soc handle
  3529. * @ac: Access category
  3530. * @value: timeout value in millisec
  3531. *
  3532. * Return: void
  3533. */
  3534. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  3535. uint8_t ac, uint32_t value)
  3536. {
  3537. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3538. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  3539. }
  3540. /*
  3541. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  3542. * @txrx_soc: cdp soc handle
  3543. * @ac: access category
  3544. * @value: timeout value in millisec
  3545. *
  3546. * Return: void
  3547. */
  3548. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  3549. uint8_t ac, uint32_t *value)
  3550. {
  3551. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3552. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  3553. }
  3554. /*
  3555. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3556. * @pdev_handle: physical device object
  3557. * @val: reo destination ring index (1 - 4)
  3558. *
  3559. * Return: void
  3560. */
  3561. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3562. enum cdp_host_reo_dest_ring val)
  3563. {
  3564. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3565. if (pdev)
  3566. pdev->reo_dest = val;
  3567. }
  3568. /*
  3569. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3570. * @pdev_handle: physical device object
  3571. *
  3572. * Return: reo destination ring index
  3573. */
  3574. static enum cdp_host_reo_dest_ring
  3575. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3576. {
  3577. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3578. if (pdev)
  3579. return pdev->reo_dest;
  3580. else
  3581. return cdp_host_reo_dest_ring_unknown;
  3582. }
  3583. #ifdef QCA_SUPPORT_SON
  3584. static void dp_son_peer_authorize(struct dp_peer *peer)
  3585. {
  3586. struct dp_soc *soc;
  3587. soc = peer->vdev->pdev->soc;
  3588. peer->peer_bs_inact_flag = 0;
  3589. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3590. return;
  3591. }
  3592. #else
  3593. static void dp_son_peer_authorize(struct dp_peer *peer)
  3594. {
  3595. return;
  3596. }
  3597. #endif
  3598. /*
  3599. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3600. * @pdev_handle: device object
  3601. * @val: value to be set
  3602. *
  3603. * Return: void
  3604. */
  3605. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3606. uint32_t val)
  3607. {
  3608. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3609. /* Enable/Disable smart mesh filtering. This flag will be checked
  3610. * during rx processing to check if packets are from NAC clients.
  3611. */
  3612. pdev->filter_neighbour_peers = val;
  3613. return 0;
  3614. }
  3615. /*
  3616. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3617. * address for smart mesh filtering
  3618. * @vdev_handle: virtual device object
  3619. * @cmd: Add/Del command
  3620. * @macaddr: nac client mac address
  3621. *
  3622. * Return: void
  3623. */
  3624. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  3625. uint32_t cmd, uint8_t *macaddr)
  3626. {
  3627. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3628. struct dp_pdev *pdev = vdev->pdev;
  3629. struct dp_neighbour_peer *peer = NULL;
  3630. if (!macaddr)
  3631. goto fail0;
  3632. /* Store address of NAC (neighbour peer) which will be checked
  3633. * against TA of received packets.
  3634. */
  3635. if (cmd == DP_NAC_PARAM_ADD) {
  3636. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3637. sizeof(*peer));
  3638. if (!peer) {
  3639. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3640. FL("DP neighbour peer node memory allocation failed"));
  3641. goto fail0;
  3642. }
  3643. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3644. macaddr, DP_MAC_ADDR_LEN);
  3645. peer->vdev = vdev;
  3646. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3647. /* add this neighbour peer into the list */
  3648. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3649. neighbour_peer_list_elem);
  3650. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3651. /* first neighbour */
  3652. if (!pdev->neighbour_peers_added) {
  3653. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en)
  3654. dp_ppdu_ring_cfg(pdev);
  3655. pdev->neighbour_peers_added = true;
  3656. }
  3657. return 1;
  3658. } else if (cmd == DP_NAC_PARAM_DEL) {
  3659. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3660. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3661. neighbour_peer_list_elem) {
  3662. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3663. macaddr, DP_MAC_ADDR_LEN)) {
  3664. /* delete this peer from the list */
  3665. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3666. peer, neighbour_peer_list_elem);
  3667. qdf_mem_free(peer);
  3668. break;
  3669. }
  3670. }
  3671. /* last neighbour deleted */
  3672. if (TAILQ_EMPTY(&pdev->neighbour_peers_list))
  3673. pdev->neighbour_peers_added = false;
  3674. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3675. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  3676. !pdev->enhanced_stats_en)
  3677. dp_ppdu_ring_reset(pdev);
  3678. return 1;
  3679. }
  3680. fail0:
  3681. return 0;
  3682. }
  3683. /*
  3684. * dp_get_sec_type() - Get the security type
  3685. * @peer: Datapath peer handle
  3686. * @sec_idx: Security id (mcast, ucast)
  3687. *
  3688. * return sec_type: Security type
  3689. */
  3690. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3691. {
  3692. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3693. return dpeer->security[sec_idx].sec_type;
  3694. }
  3695. /*
  3696. * dp_peer_authorize() - authorize txrx peer
  3697. * @peer_handle: Datapath peer handle
  3698. * @authorize
  3699. *
  3700. */
  3701. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3702. {
  3703. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3704. struct dp_soc *soc;
  3705. if (peer != NULL) {
  3706. soc = peer->vdev->pdev->soc;
  3707. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3708. dp_son_peer_authorize(peer);
  3709. peer->authorize = authorize ? 1 : 0;
  3710. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3711. }
  3712. }
  3713. #ifdef QCA_SUPPORT_SON
  3714. /*
  3715. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3716. * @pdev_handle: Device handle
  3717. * @new_threshold : updated threshold value
  3718. *
  3719. */
  3720. static void
  3721. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3722. u_int16_t new_threshold)
  3723. {
  3724. struct dp_vdev *vdev;
  3725. struct dp_peer *peer;
  3726. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3727. struct dp_soc *soc = pdev->soc;
  3728. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3729. if (old_threshold == new_threshold)
  3730. return;
  3731. soc->pdev_bs_inact_reload = new_threshold;
  3732. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3733. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3734. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3735. if (vdev->opmode != wlan_op_mode_ap)
  3736. continue;
  3737. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3738. if (!peer->authorize)
  3739. continue;
  3740. if (old_threshold - peer->peer_bs_inact >=
  3741. new_threshold) {
  3742. dp_mark_peer_inact((void *)peer, true);
  3743. peer->peer_bs_inact = 0;
  3744. } else {
  3745. peer->peer_bs_inact = new_threshold -
  3746. (old_threshold - peer->peer_bs_inact);
  3747. }
  3748. }
  3749. }
  3750. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3751. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3752. }
  3753. /**
  3754. * dp_txrx_reset_inact_count(): Reset inact count
  3755. * @pdev_handle - device handle
  3756. *
  3757. * Return: void
  3758. */
  3759. static void
  3760. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3761. {
  3762. struct dp_vdev *vdev = NULL;
  3763. struct dp_peer *peer = NULL;
  3764. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3765. struct dp_soc *soc = pdev->soc;
  3766. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3767. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3768. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3769. if (vdev->opmode != wlan_op_mode_ap)
  3770. continue;
  3771. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3772. if (!peer->authorize)
  3773. continue;
  3774. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3775. }
  3776. }
  3777. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3778. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3779. }
  3780. /**
  3781. * dp_set_inact_params(): set inactivity params
  3782. * @pdev_handle - device handle
  3783. * @inact_check_interval - inactivity interval
  3784. * @inact_normal - Inactivity normal
  3785. * @inact_overload - Inactivity overload
  3786. *
  3787. * Return: bool
  3788. */
  3789. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3790. u_int16_t inact_check_interval,
  3791. u_int16_t inact_normal, u_int16_t inact_overload)
  3792. {
  3793. struct dp_soc *soc;
  3794. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3795. if (!pdev)
  3796. return false;
  3797. soc = pdev->soc;
  3798. if (!soc)
  3799. return false;
  3800. soc->pdev_bs_inact_interval = inact_check_interval;
  3801. soc->pdev_bs_inact_normal = inact_normal;
  3802. soc->pdev_bs_inact_overload = inact_overload;
  3803. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3804. soc->pdev_bs_inact_normal);
  3805. return true;
  3806. }
  3807. /**
  3808. * dp_start_inact_timer(): Inactivity timer start
  3809. * @pdev_handle - device handle
  3810. * @enable - Inactivity timer start/stop
  3811. *
  3812. * Return: bool
  3813. */
  3814. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3815. {
  3816. struct dp_soc *soc;
  3817. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3818. if (!pdev)
  3819. return false;
  3820. soc = pdev->soc;
  3821. if (!soc)
  3822. return false;
  3823. if (enable) {
  3824. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3825. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3826. soc->pdev_bs_inact_interval * 1000);
  3827. } else {
  3828. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3829. }
  3830. return true;
  3831. }
  3832. /**
  3833. * dp_set_overload(): Set inactivity overload
  3834. * @pdev_handle - device handle
  3835. * @overload - overload status
  3836. *
  3837. * Return: void
  3838. */
  3839. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3840. {
  3841. struct dp_soc *soc;
  3842. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3843. if (!pdev)
  3844. return;
  3845. soc = pdev->soc;
  3846. if (!soc)
  3847. return;
  3848. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3849. overload ? soc->pdev_bs_inact_overload :
  3850. soc->pdev_bs_inact_normal);
  3851. }
  3852. /**
  3853. * dp_peer_is_inact(): check whether peer is inactive
  3854. * @peer_handle - datapath peer handle
  3855. *
  3856. * Return: bool
  3857. */
  3858. bool dp_peer_is_inact(void *peer_handle)
  3859. {
  3860. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3861. if (!peer)
  3862. return false;
  3863. return peer->peer_bs_inact_flag == 1;
  3864. }
  3865. /**
  3866. * dp_init_inact_timer: initialize the inact timer
  3867. * @soc - SOC handle
  3868. *
  3869. * Return: void
  3870. */
  3871. void dp_init_inact_timer(struct dp_soc *soc)
  3872. {
  3873. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3874. dp_txrx_peer_find_inact_timeout_handler,
  3875. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3876. }
  3877. #else
  3878. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3879. u_int16_t inact_normal, u_int16_t inact_overload)
  3880. {
  3881. return false;
  3882. }
  3883. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3884. {
  3885. return false;
  3886. }
  3887. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3888. {
  3889. return;
  3890. }
  3891. void dp_init_inact_timer(struct dp_soc *soc)
  3892. {
  3893. return;
  3894. }
  3895. bool dp_peer_is_inact(void *peer)
  3896. {
  3897. return false;
  3898. }
  3899. #endif
  3900. /*
  3901. * dp_peer_unref_delete() - unref and delete peer
  3902. * @peer_handle: Datapath peer handle
  3903. *
  3904. */
  3905. void dp_peer_unref_delete(void *peer_handle)
  3906. {
  3907. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3908. struct dp_peer *bss_peer = NULL;
  3909. struct dp_vdev *vdev = peer->vdev;
  3910. struct dp_pdev *pdev = vdev->pdev;
  3911. struct dp_soc *soc = pdev->soc;
  3912. struct dp_peer *tmppeer;
  3913. int found = 0;
  3914. uint16_t peer_id;
  3915. uint16_t vdev_id;
  3916. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3917. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3918. peer, qdf_atomic_read(&peer->ref_cnt));
  3919. /*
  3920. * Hold the lock all the way from checking if the peer ref count
  3921. * is zero until the peer references are removed from the hash
  3922. * table and vdev list (if the peer ref count is zero).
  3923. * This protects against a new HL tx operation starting to use the
  3924. * peer object just after this function concludes it's done being used.
  3925. * Furthermore, the lock needs to be held while checking whether the
  3926. * vdev's list of peers is empty, to make sure that list is not modified
  3927. * concurrently with the empty check.
  3928. */
  3929. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3930. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3931. peer_id = peer->peer_ids[0];
  3932. vdev_id = vdev->vdev_id;
  3933. /*
  3934. * Make sure that the reference to the peer in
  3935. * peer object map is removed
  3936. */
  3937. if (peer_id != HTT_INVALID_PEER)
  3938. soc->peer_id_to_obj_map[peer_id] = NULL;
  3939. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3940. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3941. /* remove the reference to the peer from the hash table */
  3942. dp_peer_find_hash_remove(soc, peer);
  3943. qdf_spin_lock_bh(&soc->ast_lock);
  3944. if (peer->self_ast_entry) {
  3945. dp_peer_del_ast(soc, peer->self_ast_entry);
  3946. peer->self_ast_entry = NULL;
  3947. }
  3948. qdf_spin_unlock_bh(&soc->ast_lock);
  3949. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3950. if (tmppeer == peer) {
  3951. found = 1;
  3952. break;
  3953. }
  3954. }
  3955. if (found) {
  3956. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3957. peer_list_elem);
  3958. } else {
  3959. /*Ignoring the remove operation as peer not found*/
  3960. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3961. "peer:%pK not found in vdev:%pK peerlist:%pK",
  3962. peer, vdev, &peer->vdev->peer_list);
  3963. }
  3964. /* cleanup the peer data */
  3965. dp_peer_cleanup(vdev, peer);
  3966. /* check whether the parent vdev has no peers left */
  3967. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3968. /*
  3969. * Now that there are no references to the peer, we can
  3970. * release the peer reference lock.
  3971. */
  3972. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3973. /*
  3974. * Check if the parent vdev was waiting for its peers
  3975. * to be deleted, in order for it to be deleted too.
  3976. */
  3977. if (vdev->delete.pending) {
  3978. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3979. vdev->delete.callback;
  3980. void *vdev_delete_context =
  3981. vdev->delete.context;
  3982. QDF_TRACE(QDF_MODULE_ID_DP,
  3983. QDF_TRACE_LEVEL_INFO_HIGH,
  3984. FL("deleting vdev object %pK (%pM)"
  3985. " - its last peer is done"),
  3986. vdev, vdev->mac_addr.raw);
  3987. /* all peers are gone, go ahead and delete it */
  3988. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3989. FLOW_TYPE_VDEV,
  3990. vdev_id);
  3991. dp_tx_vdev_detach(vdev);
  3992. QDF_TRACE(QDF_MODULE_ID_DP,
  3993. QDF_TRACE_LEVEL_INFO_HIGH,
  3994. FL("deleting vdev object %pK (%pM)"),
  3995. vdev, vdev->mac_addr.raw);
  3996. qdf_mem_free(vdev);
  3997. vdev = NULL;
  3998. if (vdev_delete_cb)
  3999. vdev_delete_cb(vdev_delete_context);
  4000. }
  4001. } else {
  4002. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4003. }
  4004. if (vdev) {
  4005. if (vdev->vap_bss_peer == peer) {
  4006. vdev->vap_bss_peer = NULL;
  4007. }
  4008. }
  4009. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  4010. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4011. vdev_id, peer->mac_addr.raw);
  4012. }
  4013. if (!vdev || !vdev->vap_bss_peer) {
  4014. goto free_peer;
  4015. }
  4016. #ifdef notyet
  4017. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  4018. #else
  4019. bss_peer = vdev->vap_bss_peer;
  4020. DP_UPDATE_STATS(vdev, peer);
  4021. free_peer:
  4022. qdf_mem_free(peer);
  4023. #endif
  4024. } else {
  4025. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4026. }
  4027. }
  4028. /*
  4029. * dp_peer_detach_wifi3() – Detach txrx peer
  4030. * @peer_handle: Datapath peer handle
  4031. * @bitmap: bitmap indicating special handling of request.
  4032. *
  4033. */
  4034. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4035. {
  4036. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4037. /* redirect the peer's rx delivery function to point to a
  4038. * discard func
  4039. */
  4040. peer->rx_opt_proc = dp_rx_discard;
  4041. peer->ctrl_peer = NULL;
  4042. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4043. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4044. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4045. qdf_spinlock_destroy(&peer->peer_info_lock);
  4046. /*
  4047. * Remove the reference added during peer_attach.
  4048. * The peer will still be left allocated until the
  4049. * PEER_UNMAP message arrives to remove the other
  4050. * reference, added by the PEER_MAP message.
  4051. */
  4052. dp_peer_unref_delete(peer_handle);
  4053. }
  4054. /*
  4055. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4056. * @peer_handle: Datapath peer handle
  4057. *
  4058. */
  4059. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4060. {
  4061. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4062. return vdev->mac_addr.raw;
  4063. }
  4064. /*
  4065. * dp_vdev_set_wds() - Enable per packet stats
  4066. * @vdev_handle: DP VDEV handle
  4067. * @val: value
  4068. *
  4069. * Return: none
  4070. */
  4071. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  4072. {
  4073. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4074. vdev->wds_enabled = val;
  4075. return 0;
  4076. }
  4077. /*
  4078. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  4079. * @peer_handle: Datapath peer handle
  4080. *
  4081. */
  4082. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  4083. uint8_t vdev_id)
  4084. {
  4085. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4086. struct dp_vdev *vdev = NULL;
  4087. if (qdf_unlikely(!pdev))
  4088. return NULL;
  4089. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4090. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4091. if (vdev->vdev_id == vdev_id)
  4092. break;
  4093. }
  4094. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4095. return (struct cdp_vdev *)vdev;
  4096. }
  4097. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  4098. {
  4099. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4100. return vdev->opmode;
  4101. }
  4102. static
  4103. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  4104. ol_txrx_rx_fp *stack_fn_p,
  4105. ol_osif_vdev_handle *osif_vdev_p)
  4106. {
  4107. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  4108. qdf_assert(vdev);
  4109. *stack_fn_p = vdev->osif_rx_stack;
  4110. *osif_vdev_p = vdev->osif_vdev;
  4111. }
  4112. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  4113. {
  4114. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4115. struct dp_pdev *pdev = vdev->pdev;
  4116. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  4117. }
  4118. /**
  4119. * dp_reset_monitor_mode() - Disable monitor mode
  4120. * @pdev_handle: Datapath PDEV handle
  4121. *
  4122. * Return: 0 on success, not 0 on failure
  4123. */
  4124. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  4125. {
  4126. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4127. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4128. struct dp_soc *soc = pdev->soc;
  4129. uint8_t pdev_id;
  4130. int mac_id;
  4131. pdev_id = pdev->pdev_id;
  4132. soc = pdev->soc;
  4133. qdf_spin_lock_bh(&pdev->mon_lock);
  4134. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4135. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4136. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4137. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4138. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4139. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4140. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4141. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4142. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4143. }
  4144. pdev->monitor_vdev = NULL;
  4145. qdf_spin_unlock_bh(&pdev->mon_lock);
  4146. return 0;
  4147. }
  4148. /**
  4149. * dp_set_nac() - set peer_nac
  4150. * @peer_handle: Datapath PEER handle
  4151. *
  4152. * Return: void
  4153. */
  4154. static void dp_set_nac(struct cdp_peer *peer_handle)
  4155. {
  4156. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4157. peer->nac = 1;
  4158. }
  4159. /**
  4160. * dp_get_tx_pending() - read pending tx
  4161. * @pdev_handle: Datapath PDEV handle
  4162. *
  4163. * Return: outstanding tx
  4164. */
  4165. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  4166. {
  4167. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4168. return qdf_atomic_read(&pdev->num_tx_outstanding);
  4169. }
  4170. /**
  4171. * dp_get_peer_mac_from_peer_id() - get peer mac
  4172. * @pdev_handle: Datapath PDEV handle
  4173. * @peer_id: Peer ID
  4174. * @peer_mac: MAC addr of PEER
  4175. *
  4176. * Return: void
  4177. */
  4178. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  4179. uint32_t peer_id, uint8_t *peer_mac)
  4180. {
  4181. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4182. struct dp_peer *peer;
  4183. if (pdev && peer_mac) {
  4184. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  4185. if (peer && peer->mac_addr.raw) {
  4186. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  4187. DP_MAC_ADDR_LEN);
  4188. }
  4189. }
  4190. }
  4191. /**
  4192. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  4193. * @vdev_handle: Datapath VDEV handle
  4194. * @smart_monitor: Flag to denote if its smart monitor mode
  4195. *
  4196. * Return: 0 on success, not 0 on failure
  4197. */
  4198. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  4199. uint8_t smart_monitor)
  4200. {
  4201. /* Many monitor VAPs can exists in a system but only one can be up at
  4202. * anytime
  4203. */
  4204. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4205. struct dp_pdev *pdev;
  4206. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4207. struct dp_soc *soc;
  4208. uint8_t pdev_id;
  4209. int mac_id;
  4210. qdf_assert(vdev);
  4211. pdev = vdev->pdev;
  4212. pdev_id = pdev->pdev_id;
  4213. soc = pdev->soc;
  4214. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4215. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4216. pdev, pdev_id, soc, vdev);
  4217. /*Check if current pdev's monitor_vdev exists */
  4218. if (pdev->monitor_vdev) {
  4219. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4220. "vdev=%pK", vdev);
  4221. qdf_assert(vdev);
  4222. }
  4223. pdev->monitor_vdev = vdev;
  4224. /* If smart monitor mode, do not configure monitor ring */
  4225. if (smart_monitor)
  4226. return QDF_STATUS_SUCCESS;
  4227. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4228. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4229. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4230. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4231. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4232. pdev->mo_data_filter);
  4233. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4234. htt_tlv_filter.mpdu_start = 1;
  4235. htt_tlv_filter.msdu_start = 1;
  4236. htt_tlv_filter.packet = 1;
  4237. htt_tlv_filter.msdu_end = 1;
  4238. htt_tlv_filter.mpdu_end = 1;
  4239. htt_tlv_filter.packet_header = 1;
  4240. htt_tlv_filter.attention = 1;
  4241. htt_tlv_filter.ppdu_start = 0;
  4242. htt_tlv_filter.ppdu_end = 0;
  4243. htt_tlv_filter.ppdu_end_user_stats = 0;
  4244. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4245. htt_tlv_filter.ppdu_end_status_done = 0;
  4246. htt_tlv_filter.header_per_msdu = 1;
  4247. htt_tlv_filter.enable_fp =
  4248. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4249. htt_tlv_filter.enable_md = 0;
  4250. htt_tlv_filter.enable_mo =
  4251. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4252. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4253. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4254. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4255. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4256. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4257. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4258. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4259. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4260. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4261. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4262. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4263. }
  4264. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4265. htt_tlv_filter.mpdu_start = 1;
  4266. htt_tlv_filter.msdu_start = 0;
  4267. htt_tlv_filter.packet = 0;
  4268. htt_tlv_filter.msdu_end = 0;
  4269. htt_tlv_filter.mpdu_end = 0;
  4270. htt_tlv_filter.attention = 0;
  4271. htt_tlv_filter.ppdu_start = 1;
  4272. htt_tlv_filter.ppdu_end = 1;
  4273. htt_tlv_filter.ppdu_end_user_stats = 1;
  4274. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4275. htt_tlv_filter.ppdu_end_status_done = 1;
  4276. htt_tlv_filter.enable_fp = 1;
  4277. htt_tlv_filter.enable_md = 0;
  4278. htt_tlv_filter.enable_mo = 1;
  4279. if (pdev->mcopy_mode) {
  4280. htt_tlv_filter.packet_header = 1;
  4281. }
  4282. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4283. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4284. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4285. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4286. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4287. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4288. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4289. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4290. pdev->pdev_id);
  4291. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4292. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4293. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4294. }
  4295. return QDF_STATUS_SUCCESS;
  4296. }
  4297. /**
  4298. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  4299. * @pdev_handle: Datapath PDEV handle
  4300. * @filter_val: Flag to select Filter for monitor mode
  4301. * Return: 0 on success, not 0 on failure
  4302. */
  4303. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  4304. struct cdp_monitor_filter *filter_val)
  4305. {
  4306. /* Many monitor VAPs can exists in a system but only one can be up at
  4307. * anytime
  4308. */
  4309. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4310. struct dp_vdev *vdev = pdev->monitor_vdev;
  4311. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4312. struct dp_soc *soc;
  4313. uint8_t pdev_id;
  4314. int mac_id;
  4315. pdev_id = pdev->pdev_id;
  4316. soc = pdev->soc;
  4317. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4318. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4319. pdev, pdev_id, soc, vdev);
  4320. /*Check if current pdev's monitor_vdev exists */
  4321. if (!pdev->monitor_vdev) {
  4322. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4323. "vdev=%pK", vdev);
  4324. qdf_assert(vdev);
  4325. }
  4326. /* update filter mode, type in pdev structure */
  4327. pdev->mon_filter_mode = filter_val->mode;
  4328. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  4329. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  4330. pdev->fp_data_filter = filter_val->fp_data;
  4331. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  4332. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  4333. pdev->mo_data_filter = filter_val->mo_data;
  4334. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4335. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4336. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4337. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4338. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4339. pdev->mo_data_filter);
  4340. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4341. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4342. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4343. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4344. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4345. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4346. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4347. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4348. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4349. }
  4350. htt_tlv_filter.mpdu_start = 1;
  4351. htt_tlv_filter.msdu_start = 1;
  4352. htt_tlv_filter.packet = 1;
  4353. htt_tlv_filter.msdu_end = 1;
  4354. htt_tlv_filter.mpdu_end = 1;
  4355. htt_tlv_filter.packet_header = 1;
  4356. htt_tlv_filter.attention = 1;
  4357. htt_tlv_filter.ppdu_start = 0;
  4358. htt_tlv_filter.ppdu_end = 0;
  4359. htt_tlv_filter.ppdu_end_user_stats = 0;
  4360. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4361. htt_tlv_filter.ppdu_end_status_done = 0;
  4362. htt_tlv_filter.header_per_msdu = 1;
  4363. htt_tlv_filter.enable_fp =
  4364. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4365. htt_tlv_filter.enable_md = 0;
  4366. htt_tlv_filter.enable_mo =
  4367. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4368. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4369. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4370. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4371. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4372. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4373. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4374. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4375. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4376. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4377. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4378. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4379. }
  4380. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4381. htt_tlv_filter.mpdu_start = 1;
  4382. htt_tlv_filter.msdu_start = 0;
  4383. htt_tlv_filter.packet = 0;
  4384. htt_tlv_filter.msdu_end = 0;
  4385. htt_tlv_filter.mpdu_end = 0;
  4386. htt_tlv_filter.attention = 0;
  4387. htt_tlv_filter.ppdu_start = 1;
  4388. htt_tlv_filter.ppdu_end = 1;
  4389. htt_tlv_filter.ppdu_end_user_stats = 1;
  4390. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4391. htt_tlv_filter.ppdu_end_status_done = 1;
  4392. htt_tlv_filter.enable_fp = 1;
  4393. htt_tlv_filter.enable_md = 0;
  4394. htt_tlv_filter.enable_mo = 1;
  4395. if (pdev->mcopy_mode) {
  4396. htt_tlv_filter.packet_header = 1;
  4397. }
  4398. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4399. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4400. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4401. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4402. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4403. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4404. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4405. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4406. pdev->pdev_id);
  4407. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4408. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4409. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4410. }
  4411. return QDF_STATUS_SUCCESS;
  4412. }
  4413. /**
  4414. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4415. * @pdev_handle: Datapath PDEV handle
  4416. *
  4417. * Return: pdev_id
  4418. */
  4419. static
  4420. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4421. {
  4422. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4423. return pdev->pdev_id;
  4424. }
  4425. /**
  4426. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  4427. * @pdev_handle: Datapath PDEV handle
  4428. * @chan_noise_floor: Channel Noise Floor
  4429. *
  4430. * Return: void
  4431. */
  4432. static
  4433. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  4434. int16_t chan_noise_floor)
  4435. {
  4436. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4437. pdev->chan_noise_floor = chan_noise_floor;
  4438. }
  4439. /**
  4440. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4441. * @vdev_handle: Datapath VDEV handle
  4442. * Return: true on ucast filter flag set
  4443. */
  4444. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4445. {
  4446. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4447. struct dp_pdev *pdev;
  4448. pdev = vdev->pdev;
  4449. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4450. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4451. return true;
  4452. return false;
  4453. }
  4454. /**
  4455. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4456. * @vdev_handle: Datapath VDEV handle
  4457. * Return: true on mcast filter flag set
  4458. */
  4459. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4460. {
  4461. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4462. struct dp_pdev *pdev;
  4463. pdev = vdev->pdev;
  4464. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4465. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4466. return true;
  4467. return false;
  4468. }
  4469. /**
  4470. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4471. * @vdev_handle: Datapath VDEV handle
  4472. * Return: true on non data filter flag set
  4473. */
  4474. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4475. {
  4476. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4477. struct dp_pdev *pdev;
  4478. pdev = vdev->pdev;
  4479. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4480. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4481. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4482. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4483. return true;
  4484. }
  4485. }
  4486. return false;
  4487. }
  4488. #ifdef MESH_MODE_SUPPORT
  4489. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4490. {
  4491. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4493. FL("val %d"), val);
  4494. vdev->mesh_vdev = val;
  4495. }
  4496. /*
  4497. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4498. * @vdev_hdl: virtual device object
  4499. * @val: value to be set
  4500. *
  4501. * Return: void
  4502. */
  4503. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4504. {
  4505. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4506. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4507. FL("val %d"), val);
  4508. vdev->mesh_rx_filter = val;
  4509. }
  4510. #endif
  4511. /*
  4512. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4513. * Current scope is bar received count
  4514. *
  4515. * @pdev_handle: DP_PDEV handle
  4516. *
  4517. * Return: void
  4518. */
  4519. #define STATS_PROC_TIMEOUT (HZ/1000)
  4520. static void
  4521. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4522. {
  4523. struct dp_vdev *vdev;
  4524. struct dp_peer *peer;
  4525. uint32_t waitcnt;
  4526. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4527. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4528. if (!peer) {
  4529. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4530. FL("DP Invalid Peer refernce"));
  4531. return;
  4532. }
  4533. if (peer->delete_in_progress) {
  4534. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4535. FL("DP Peer deletion in progress"));
  4536. continue;
  4537. }
  4538. qdf_atomic_inc(&peer->ref_cnt);
  4539. waitcnt = 0;
  4540. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4541. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4542. && waitcnt < 10) {
  4543. schedule_timeout_interruptible(
  4544. STATS_PROC_TIMEOUT);
  4545. waitcnt++;
  4546. }
  4547. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4548. dp_peer_unref_delete(peer);
  4549. }
  4550. }
  4551. }
  4552. /**
  4553. * dp_rx_bar_stats_cb(): BAR received stats callback
  4554. * @soc: SOC handle
  4555. * @cb_ctxt: Call back context
  4556. * @reo_status: Reo status
  4557. *
  4558. * return: void
  4559. */
  4560. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4561. union hal_reo_status *reo_status)
  4562. {
  4563. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4564. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4565. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4566. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4567. queue_status->header.status);
  4568. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4569. return;
  4570. }
  4571. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4572. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4573. }
  4574. /**
  4575. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4576. * @vdev: DP VDEV handle
  4577. *
  4578. * return: void
  4579. */
  4580. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  4581. struct cdp_vdev_stats *vdev_stats)
  4582. {
  4583. struct dp_peer *peer = NULL;
  4584. struct dp_soc *soc = vdev->pdev->soc;
  4585. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  4586. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4587. dp_update_vdev_stats(vdev_stats, peer);
  4588. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4589. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4590. &vdev->stats, (uint16_t) vdev->vdev_id,
  4591. UPDATE_VDEV_STATS);
  4592. }
  4593. /**
  4594. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4595. * @pdev: DP PDEV handle
  4596. *
  4597. * return: void
  4598. */
  4599. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4600. {
  4601. struct dp_vdev *vdev = NULL;
  4602. struct dp_soc *soc = pdev->soc;
  4603. struct cdp_vdev_stats *vdev_stats =
  4604. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  4605. if (!vdev_stats) {
  4606. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4607. "DP alloc failure - unable to get alloc vdev stats");
  4608. return;
  4609. }
  4610. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4611. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4612. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4613. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4614. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4615. dp_aggregate_vdev_stats(vdev, vdev_stats);
  4616. dp_update_pdev_stats(pdev, vdev_stats);
  4617. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4618. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4619. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4620. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4621. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4622. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4623. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4624. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4625. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host.num);
  4626. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4627. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host.num);
  4628. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4629. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4630. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4631. DP_STATS_AGGR(pdev, vdev,
  4632. tx_i.mcast_en.dropped_map_error);
  4633. DP_STATS_AGGR(pdev, vdev,
  4634. tx_i.mcast_en.dropped_self_mac);
  4635. DP_STATS_AGGR(pdev, vdev,
  4636. tx_i.mcast_en.dropped_send_fail);
  4637. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4638. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4639. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4640. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4641. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na.num);
  4642. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4643. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4644. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4645. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4646. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4647. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4648. pdev->stats.tx_i.dropped.dma_error +
  4649. pdev->stats.tx_i.dropped.ring_full +
  4650. pdev->stats.tx_i.dropped.enqueue_fail +
  4651. pdev->stats.tx_i.dropped.desc_na.num +
  4652. pdev->stats.tx_i.dropped.res_full;
  4653. pdev->stats.tx.last_ack_rssi =
  4654. vdev->stats.tx.last_ack_rssi;
  4655. pdev->stats.tx_i.tso.num_seg =
  4656. vdev->stats.tx_i.tso.num_seg;
  4657. }
  4658. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4659. qdf_mem_free(vdev_stats);
  4660. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4661. soc->cdp_soc.ol_ops->update_dp_stats(pdev->ctrl_pdev,
  4662. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4663. }
  4664. /**
  4665. * dp_vdev_getstats() - get vdev packet level stats
  4666. * @vdev_handle: Datapath VDEV handle
  4667. * @stats: cdp network device stats structure
  4668. *
  4669. * Return: void
  4670. */
  4671. static void dp_vdev_getstats(void *vdev_handle,
  4672. struct cdp_dev_stats *stats)
  4673. {
  4674. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4675. struct cdp_vdev_stats *vdev_stats =
  4676. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  4677. if (!vdev_stats) {
  4678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4679. "DP alloc failure - unable to get alloc vdev stats");
  4680. return;
  4681. }
  4682. dp_aggregate_vdev_stats(vdev, vdev_stats);
  4683. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  4684. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  4685. stats->tx_errors = vdev_stats->tx.tx_failed +
  4686. vdev_stats->tx_i.dropped.dropped_pkt.num;
  4687. stats->tx_dropped = stats->tx_errors;
  4688. stats->rx_packets = vdev_stats->rx.unicast.num +
  4689. vdev_stats->rx.multicast.num +
  4690. vdev_stats->rx.bcast.num;
  4691. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  4692. vdev_stats->rx.multicast.bytes +
  4693. vdev_stats->rx.bcast.bytes;
  4694. }
  4695. /**
  4696. * dp_pdev_getstats() - get pdev packet level stats
  4697. * @pdev_handle: Datapath PDEV handle
  4698. * @stats: cdp network device stats structure
  4699. *
  4700. * Return: void
  4701. */
  4702. static void dp_pdev_getstats(void *pdev_handle,
  4703. struct cdp_dev_stats *stats)
  4704. {
  4705. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4706. dp_aggregate_pdev_stats(pdev);
  4707. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4708. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4709. stats->tx_errors = pdev->stats.tx.tx_failed +
  4710. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4711. stats->tx_dropped = stats->tx_errors;
  4712. stats->rx_packets = pdev->stats.rx.unicast.num +
  4713. pdev->stats.rx.multicast.num +
  4714. pdev->stats.rx.bcast.num;
  4715. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4716. pdev->stats.rx.multicast.bytes +
  4717. pdev->stats.rx.bcast.bytes;
  4718. }
  4719. /**
  4720. * dp_get_device_stats() - get interface level packet stats
  4721. * @handle: device handle
  4722. * @stats: cdp network device stats structure
  4723. * @type: device type pdev/vdev
  4724. *
  4725. * Return: void
  4726. */
  4727. static void dp_get_device_stats(void *handle,
  4728. struct cdp_dev_stats *stats, uint8_t type)
  4729. {
  4730. switch (type) {
  4731. case UPDATE_VDEV_STATS:
  4732. dp_vdev_getstats(handle, stats);
  4733. break;
  4734. case UPDATE_PDEV_STATS:
  4735. dp_pdev_getstats(handle, stats);
  4736. break;
  4737. default:
  4738. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4739. "apstats cannot be updated for this input "
  4740. "type %d", type);
  4741. break;
  4742. }
  4743. }
  4744. /**
  4745. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4746. * @pdev: DP_PDEV Handle
  4747. *
  4748. * Return:void
  4749. */
  4750. static inline void
  4751. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4752. {
  4753. uint8_t index = 0;
  4754. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4755. DP_PRINT_STATS("Received From Stack:");
  4756. DP_PRINT_STATS(" Packets = %d",
  4757. pdev->stats.tx_i.rcvd.num);
  4758. DP_PRINT_STATS(" Bytes = %llu",
  4759. pdev->stats.tx_i.rcvd.bytes);
  4760. DP_PRINT_STATS("Processed:");
  4761. DP_PRINT_STATS(" Packets = %d",
  4762. pdev->stats.tx_i.processed.num);
  4763. DP_PRINT_STATS(" Bytes = %llu",
  4764. pdev->stats.tx_i.processed.bytes);
  4765. DP_PRINT_STATS("Total Completions:");
  4766. DP_PRINT_STATS(" Packets = %u",
  4767. pdev->stats.tx.comp_pkt.num);
  4768. DP_PRINT_STATS(" Bytes = %llu",
  4769. pdev->stats.tx.comp_pkt.bytes);
  4770. DP_PRINT_STATS("Successful Completions:");
  4771. DP_PRINT_STATS(" Packets = %u",
  4772. pdev->stats.tx.tx_success.num);
  4773. DP_PRINT_STATS(" Bytes = %llu",
  4774. pdev->stats.tx.tx_success.bytes);
  4775. DP_PRINT_STATS("Dropped:");
  4776. DP_PRINT_STATS(" Total = %d",
  4777. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4778. DP_PRINT_STATS(" Dma_map_error = %d",
  4779. pdev->stats.tx_i.dropped.dma_error);
  4780. DP_PRINT_STATS(" Ring Full = %d",
  4781. pdev->stats.tx_i.dropped.ring_full);
  4782. DP_PRINT_STATS(" Descriptor Not available = %d",
  4783. pdev->stats.tx_i.dropped.desc_na.num);
  4784. DP_PRINT_STATS(" HW enqueue failed= %d",
  4785. pdev->stats.tx_i.dropped.enqueue_fail);
  4786. DP_PRINT_STATS(" Resources Full = %d",
  4787. pdev->stats.tx_i.dropped.res_full);
  4788. DP_PRINT_STATS(" FW removed = %d",
  4789. pdev->stats.tx.dropped.fw_rem);
  4790. DP_PRINT_STATS(" FW removed transmitted = %d",
  4791. pdev->stats.tx.dropped.fw_rem_tx);
  4792. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4793. pdev->stats.tx.dropped.fw_rem_notx);
  4794. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4795. pdev->stats.tx.dropped.fw_reason1);
  4796. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4797. pdev->stats.tx.dropped.fw_reason2);
  4798. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4799. pdev->stats.tx.dropped.fw_reason3);
  4800. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4801. pdev->stats.tx.dropped.age_out);
  4802. DP_PRINT_STATS(" Multicast:");
  4803. DP_PRINT_STATS(" Packets: %u",
  4804. pdev->stats.tx.mcast.num);
  4805. DP_PRINT_STATS(" Bytes: %llu",
  4806. pdev->stats.tx.mcast.bytes);
  4807. DP_PRINT_STATS("Scatter Gather:");
  4808. DP_PRINT_STATS(" Packets = %d",
  4809. pdev->stats.tx_i.sg.sg_pkt.num);
  4810. DP_PRINT_STATS(" Bytes = %llu",
  4811. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4812. DP_PRINT_STATS(" Dropped By Host = %d",
  4813. pdev->stats.tx_i.sg.dropped_host.num);
  4814. DP_PRINT_STATS(" Dropped By Target = %d",
  4815. pdev->stats.tx_i.sg.dropped_target);
  4816. DP_PRINT_STATS("TSO:");
  4817. DP_PRINT_STATS(" Number of Segments = %d",
  4818. pdev->stats.tx_i.tso.num_seg);
  4819. DP_PRINT_STATS(" Packets = %d",
  4820. pdev->stats.tx_i.tso.tso_pkt.num);
  4821. DP_PRINT_STATS(" Bytes = %llu",
  4822. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4823. DP_PRINT_STATS(" Dropped By Host = %d",
  4824. pdev->stats.tx_i.tso.dropped_host.num);
  4825. DP_PRINT_STATS("Mcast Enhancement:");
  4826. DP_PRINT_STATS(" Packets = %d",
  4827. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4828. DP_PRINT_STATS(" Bytes = %llu",
  4829. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4830. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4831. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4832. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4833. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4834. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4835. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4836. DP_PRINT_STATS(" Unicast sent = %d",
  4837. pdev->stats.tx_i.mcast_en.ucast);
  4838. DP_PRINT_STATS("Raw:");
  4839. DP_PRINT_STATS(" Packets = %d",
  4840. pdev->stats.tx_i.raw.raw_pkt.num);
  4841. DP_PRINT_STATS(" Bytes = %llu",
  4842. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4843. DP_PRINT_STATS(" DMA map error = %d",
  4844. pdev->stats.tx_i.raw.dma_map_error);
  4845. DP_PRINT_STATS("Reinjected:");
  4846. DP_PRINT_STATS(" Packets = %d",
  4847. pdev->stats.tx_i.reinject_pkts.num);
  4848. DP_PRINT_STATS(" Bytes = %llu\n",
  4849. pdev->stats.tx_i.reinject_pkts.bytes);
  4850. DP_PRINT_STATS("Inspected:");
  4851. DP_PRINT_STATS(" Packets = %d",
  4852. pdev->stats.tx_i.inspect_pkts.num);
  4853. DP_PRINT_STATS(" Bytes = %llu",
  4854. pdev->stats.tx_i.inspect_pkts.bytes);
  4855. DP_PRINT_STATS("Nawds Multicast:");
  4856. DP_PRINT_STATS(" Packets = %d",
  4857. pdev->stats.tx_i.nawds_mcast.num);
  4858. DP_PRINT_STATS(" Bytes = %llu",
  4859. pdev->stats.tx_i.nawds_mcast.bytes);
  4860. DP_PRINT_STATS("CCE Classified:");
  4861. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4862. pdev->stats.tx_i.cce_classified);
  4863. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4864. pdev->stats.tx_i.cce_classified_raw);
  4865. DP_PRINT_STATS("Mesh stats:");
  4866. DP_PRINT_STATS(" frames to firmware: %u",
  4867. pdev->stats.tx_i.mesh.exception_fw);
  4868. DP_PRINT_STATS(" completions from fw: %u",
  4869. pdev->stats.tx_i.mesh.completion_fw);
  4870. DP_PRINT_STATS("PPDU stats counter");
  4871. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4872. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4873. pdev->stats.ppdu_stats_counter[index]);
  4874. }
  4875. }
  4876. /**
  4877. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4878. * @pdev: DP_PDEV Handle
  4879. *
  4880. * Return: void
  4881. */
  4882. static inline void
  4883. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4884. {
  4885. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4886. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4887. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4888. pdev->stats.rx.rcvd_reo[0].num,
  4889. pdev->stats.rx.rcvd_reo[1].num,
  4890. pdev->stats.rx.rcvd_reo[2].num,
  4891. pdev->stats.rx.rcvd_reo[3].num);
  4892. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4893. pdev->stats.rx.rcvd_reo[0].bytes,
  4894. pdev->stats.rx.rcvd_reo[1].bytes,
  4895. pdev->stats.rx.rcvd_reo[2].bytes,
  4896. pdev->stats.rx.rcvd_reo[3].bytes);
  4897. DP_PRINT_STATS("Replenished:");
  4898. DP_PRINT_STATS(" Packets = %d",
  4899. pdev->stats.replenish.pkts.num);
  4900. DP_PRINT_STATS(" Bytes = %llu",
  4901. pdev->stats.replenish.pkts.bytes);
  4902. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4903. pdev->stats.buf_freelist);
  4904. DP_PRINT_STATS(" Low threshold intr = %d",
  4905. pdev->stats.replenish.low_thresh_intrs);
  4906. DP_PRINT_STATS("Dropped:");
  4907. DP_PRINT_STATS(" msdu_not_done = %d",
  4908. pdev->stats.dropped.msdu_not_done);
  4909. DP_PRINT_STATS(" mon_rx_drop = %d",
  4910. pdev->stats.dropped.mon_rx_drop);
  4911. DP_PRINT_STATS("Sent To Stack:");
  4912. DP_PRINT_STATS(" Packets = %d",
  4913. pdev->stats.rx.to_stack.num);
  4914. DP_PRINT_STATS(" Bytes = %llu",
  4915. pdev->stats.rx.to_stack.bytes);
  4916. DP_PRINT_STATS("Multicast/Broadcast:");
  4917. DP_PRINT_STATS(" Packets = %d",
  4918. (pdev->stats.rx.multicast.num +
  4919. pdev->stats.rx.bcast.num));
  4920. DP_PRINT_STATS(" Bytes = %llu",
  4921. (pdev->stats.rx.multicast.bytes +
  4922. pdev->stats.rx.bcast.bytes));
  4923. DP_PRINT_STATS("Errors:");
  4924. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4925. pdev->stats.replenish.rxdma_err);
  4926. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4927. pdev->stats.err.desc_alloc_fail);
  4928. DP_PRINT_STATS(" IP checksum error = %d",
  4929. pdev->stats.err.ip_csum_err);
  4930. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  4931. pdev->stats.err.tcp_udp_csum_err);
  4932. /* Get bar_recv_cnt */
  4933. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4934. DP_PRINT_STATS("BAR Received Count: = %d",
  4935. pdev->stats.rx.bar_recv_cnt);
  4936. }
  4937. /**
  4938. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  4939. * @pdev: DP_PDEV Handle
  4940. *
  4941. * Return: void
  4942. */
  4943. static inline void
  4944. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  4945. {
  4946. struct cdp_pdev_mon_stats *rx_mon_stats;
  4947. rx_mon_stats = &pdev->rx_mon_stats;
  4948. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  4949. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  4950. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  4951. rx_mon_stats->status_ppdu_done);
  4952. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  4953. rx_mon_stats->dest_ppdu_done);
  4954. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  4955. rx_mon_stats->dest_mpdu_done);
  4956. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  4957. rx_mon_stats->dest_mpdu_drop);
  4958. }
  4959. /**
  4960. * dp_print_soc_tx_stats(): Print SOC level stats
  4961. * @soc DP_SOC Handle
  4962. *
  4963. * Return: void
  4964. */
  4965. static inline void
  4966. dp_print_soc_tx_stats(struct dp_soc *soc)
  4967. {
  4968. uint8_t desc_pool_id;
  4969. soc->stats.tx.desc_in_use = 0;
  4970. DP_PRINT_STATS("SOC Tx Stats:\n");
  4971. for (desc_pool_id = 0;
  4972. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  4973. desc_pool_id++)
  4974. soc->stats.tx.desc_in_use +=
  4975. soc->tx_desc[desc_pool_id].num_allocated;
  4976. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4977. soc->stats.tx.desc_in_use);
  4978. DP_PRINT_STATS("Invalid peer:");
  4979. DP_PRINT_STATS(" Packets = %d",
  4980. soc->stats.tx.tx_invalid_peer.num);
  4981. DP_PRINT_STATS(" Bytes = %llu",
  4982. soc->stats.tx.tx_invalid_peer.bytes);
  4983. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4984. soc->stats.tx.tcl_ring_full[0],
  4985. soc->stats.tx.tcl_ring_full[1],
  4986. soc->stats.tx.tcl_ring_full[2]);
  4987. }
  4988. /**
  4989. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4990. * @soc: DP_SOC Handle
  4991. *
  4992. * Return:void
  4993. */
  4994. static inline void
  4995. dp_print_soc_rx_stats(struct dp_soc *soc)
  4996. {
  4997. uint32_t i;
  4998. char reo_error[DP_REO_ERR_LENGTH];
  4999. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  5000. uint8_t index = 0;
  5001. DP_PRINT_STATS("SOC Rx Stats:\n");
  5002. DP_PRINT_STATS("Errors:\n");
  5003. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  5004. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  5005. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  5006. DP_PRINT_STATS("Invalid RBM = %d",
  5007. soc->stats.rx.err.invalid_rbm);
  5008. DP_PRINT_STATS("Invalid Vdev = %d",
  5009. soc->stats.rx.err.invalid_vdev);
  5010. DP_PRINT_STATS("Invalid Pdev = %d",
  5011. soc->stats.rx.err.invalid_pdev);
  5012. DP_PRINT_STATS("Invalid Peer = %d",
  5013. soc->stats.rx.err.rx_invalid_peer.num);
  5014. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  5015. soc->stats.rx.err.hal_ring_access_fail);
  5016. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  5017. index += qdf_snprint(&rxdma_error[index],
  5018. DP_RXDMA_ERR_LENGTH - index,
  5019. " %d", soc->stats.rx.err.rxdma_error[i]);
  5020. }
  5021. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  5022. rxdma_error);
  5023. index = 0;
  5024. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  5025. index += qdf_snprint(&reo_error[index],
  5026. DP_REO_ERR_LENGTH - index,
  5027. " %d", soc->stats.rx.err.reo_error[i]);
  5028. }
  5029. DP_PRINT_STATS("REO Error(0-14):%s",
  5030. reo_error);
  5031. }
  5032. /**
  5033. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  5034. * @soc: DP_SOC handle
  5035. * @srng: DP_SRNG handle
  5036. * @ring_name: SRNG name
  5037. *
  5038. * Return: void
  5039. */
  5040. static inline void
  5041. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  5042. char *ring_name)
  5043. {
  5044. uint32_t tailp;
  5045. uint32_t headp;
  5046. if (srng->hal_srng != NULL) {
  5047. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  5048. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  5049. ring_name, headp, tailp);
  5050. }
  5051. }
  5052. /**
  5053. * dp_print_ring_stats(): Print tail and head pointer
  5054. * @pdev: DP_PDEV handle
  5055. *
  5056. * Return:void
  5057. */
  5058. static inline void
  5059. dp_print_ring_stats(struct dp_pdev *pdev)
  5060. {
  5061. uint32_t i;
  5062. char ring_name[STR_MAXLEN + 1];
  5063. int mac_id;
  5064. dp_print_ring_stat_from_hal(pdev->soc,
  5065. &pdev->soc->reo_exception_ring,
  5066. "Reo Exception Ring");
  5067. dp_print_ring_stat_from_hal(pdev->soc,
  5068. &pdev->soc->reo_reinject_ring,
  5069. "Reo Inject Ring");
  5070. dp_print_ring_stat_from_hal(pdev->soc,
  5071. &pdev->soc->reo_cmd_ring,
  5072. "Reo Command Ring");
  5073. dp_print_ring_stat_from_hal(pdev->soc,
  5074. &pdev->soc->reo_status_ring,
  5075. "Reo Status Ring");
  5076. dp_print_ring_stat_from_hal(pdev->soc,
  5077. &pdev->soc->rx_rel_ring,
  5078. "Rx Release ring");
  5079. dp_print_ring_stat_from_hal(pdev->soc,
  5080. &pdev->soc->tcl_cmd_ring,
  5081. "Tcl command Ring");
  5082. dp_print_ring_stat_from_hal(pdev->soc,
  5083. &pdev->soc->tcl_status_ring,
  5084. "Tcl Status Ring");
  5085. dp_print_ring_stat_from_hal(pdev->soc,
  5086. &pdev->soc->wbm_desc_rel_ring,
  5087. "Wbm Desc Rel Ring");
  5088. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  5089. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  5090. dp_print_ring_stat_from_hal(pdev->soc,
  5091. &pdev->soc->reo_dest_ring[i],
  5092. ring_name);
  5093. }
  5094. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  5095. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  5096. dp_print_ring_stat_from_hal(pdev->soc,
  5097. &pdev->soc->tcl_data_ring[i],
  5098. ring_name);
  5099. }
  5100. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5101. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  5102. dp_print_ring_stat_from_hal(pdev->soc,
  5103. &pdev->soc->tx_comp_ring[i],
  5104. ring_name);
  5105. }
  5106. dp_print_ring_stat_from_hal(pdev->soc,
  5107. &pdev->rx_refill_buf_ring,
  5108. "Rx Refill Buf Ring");
  5109. dp_print_ring_stat_from_hal(pdev->soc,
  5110. &pdev->rx_refill_buf_ring2,
  5111. "Second Rx Refill Buf Ring");
  5112. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5113. dp_print_ring_stat_from_hal(pdev->soc,
  5114. &pdev->rxdma_mon_buf_ring[mac_id],
  5115. "Rxdma Mon Buf Ring");
  5116. dp_print_ring_stat_from_hal(pdev->soc,
  5117. &pdev->rxdma_mon_dst_ring[mac_id],
  5118. "Rxdma Mon Dst Ring");
  5119. dp_print_ring_stat_from_hal(pdev->soc,
  5120. &pdev->rxdma_mon_status_ring[mac_id],
  5121. "Rxdma Mon Status Ring");
  5122. dp_print_ring_stat_from_hal(pdev->soc,
  5123. &pdev->rxdma_mon_desc_ring[mac_id],
  5124. "Rxdma mon desc Ring");
  5125. }
  5126. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++) {
  5127. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  5128. dp_print_ring_stat_from_hal(pdev->soc,
  5129. &pdev->rxdma_err_dst_ring[i],
  5130. ring_name);
  5131. }
  5132. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  5133. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  5134. dp_print_ring_stat_from_hal(pdev->soc,
  5135. &pdev->rx_mac_buf_ring[i],
  5136. ring_name);
  5137. }
  5138. }
  5139. /**
  5140. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  5141. * @vdev: DP_VDEV handle
  5142. *
  5143. * Return:void
  5144. */
  5145. static inline void
  5146. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  5147. {
  5148. struct dp_peer *peer = NULL;
  5149. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  5150. DP_STATS_CLR(vdev->pdev);
  5151. DP_STATS_CLR(vdev->pdev->soc);
  5152. DP_STATS_CLR(vdev);
  5153. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5154. if (!peer)
  5155. return;
  5156. DP_STATS_CLR(peer);
  5157. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  5158. soc->cdp_soc.ol_ops->update_dp_stats(
  5159. vdev->pdev->ctrl_pdev,
  5160. &peer->stats,
  5161. peer->peer_ids[0],
  5162. UPDATE_PEER_STATS);
  5163. }
  5164. }
  5165. if (soc->cdp_soc.ol_ops->update_dp_stats)
  5166. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  5167. &vdev->stats, (uint16_t)vdev->vdev_id,
  5168. UPDATE_VDEV_STATS);
  5169. }
  5170. /**
  5171. * dp_print_common_rates_info(): Print common rate for tx or rx
  5172. * @pkt_type_array: rate type array contains rate info
  5173. *
  5174. * Return:void
  5175. */
  5176. static inline void
  5177. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  5178. {
  5179. uint8_t mcs, pkt_type;
  5180. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5181. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5182. if (!dp_rate_string[pkt_type][mcs].valid)
  5183. continue;
  5184. DP_PRINT_STATS(" %s = %d",
  5185. dp_rate_string[pkt_type][mcs].mcs_type,
  5186. pkt_type_array[pkt_type].mcs_count[mcs]);
  5187. }
  5188. DP_PRINT_STATS("\n");
  5189. }
  5190. }
  5191. /**
  5192. * dp_print_rx_rates(): Print Rx rate stats
  5193. * @vdev: DP_VDEV handle
  5194. *
  5195. * Return:void
  5196. */
  5197. static inline void
  5198. dp_print_rx_rates(struct dp_vdev *vdev)
  5199. {
  5200. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5201. uint8_t i;
  5202. uint8_t index = 0;
  5203. char nss[DP_NSS_LENGTH];
  5204. DP_PRINT_STATS("Rx Rate Info:\n");
  5205. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  5206. index = 0;
  5207. for (i = 0; i < SS_COUNT; i++) {
  5208. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5209. " %d", pdev->stats.rx.nss[i]);
  5210. }
  5211. DP_PRINT_STATS("NSS(1-8) = %s",
  5212. nss);
  5213. DP_PRINT_STATS("SGI ="
  5214. " 0.8us %d,"
  5215. " 0.4us %d,"
  5216. " 1.6us %d,"
  5217. " 3.2us %d,",
  5218. pdev->stats.rx.sgi_count[0],
  5219. pdev->stats.rx.sgi_count[1],
  5220. pdev->stats.rx.sgi_count[2],
  5221. pdev->stats.rx.sgi_count[3]);
  5222. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5223. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  5224. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  5225. DP_PRINT_STATS("Reception Type ="
  5226. " SU: %d,"
  5227. " MU_MIMO:%d,"
  5228. " MU_OFDMA:%d,"
  5229. " MU_OFDMA_MIMO:%d\n",
  5230. pdev->stats.rx.reception_type[0],
  5231. pdev->stats.rx.reception_type[1],
  5232. pdev->stats.rx.reception_type[2],
  5233. pdev->stats.rx.reception_type[3]);
  5234. DP_PRINT_STATS("Aggregation:\n");
  5235. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  5236. pdev->stats.rx.ampdu_cnt);
  5237. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  5238. pdev->stats.rx.non_ampdu_cnt);
  5239. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  5240. pdev->stats.rx.amsdu_cnt);
  5241. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  5242. pdev->stats.rx.non_amsdu_cnt);
  5243. }
  5244. /**
  5245. * dp_print_tx_rates(): Print tx rates
  5246. * @vdev: DP_VDEV handle
  5247. *
  5248. * Return:void
  5249. */
  5250. static inline void
  5251. dp_print_tx_rates(struct dp_vdev *vdev)
  5252. {
  5253. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5254. uint8_t index;
  5255. char nss[DP_NSS_LENGTH];
  5256. int nss_index;
  5257. DP_PRINT_STATS("Tx Rate Info:\n");
  5258. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  5259. DP_PRINT_STATS("SGI ="
  5260. " 0.8us %d"
  5261. " 0.4us %d"
  5262. " 1.6us %d"
  5263. " 3.2us %d",
  5264. pdev->stats.tx.sgi_count[0],
  5265. pdev->stats.tx.sgi_count[1],
  5266. pdev->stats.tx.sgi_count[2],
  5267. pdev->stats.tx.sgi_count[3]);
  5268. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5269. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  5270. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  5271. index = 0;
  5272. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  5273. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5274. " %d", pdev->stats.tx.nss[nss_index]);
  5275. }
  5276. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  5277. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  5278. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  5279. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  5280. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  5281. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  5282. DP_PRINT_STATS("Aggregation:\n");
  5283. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  5284. pdev->stats.tx.amsdu_cnt);
  5285. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  5286. pdev->stats.tx.non_amsdu_cnt);
  5287. }
  5288. /**
  5289. * dp_print_peer_stats():print peer stats
  5290. * @peer: DP_PEER handle
  5291. *
  5292. * return void
  5293. */
  5294. static inline void dp_print_peer_stats(struct dp_peer *peer)
  5295. {
  5296. uint8_t i;
  5297. uint32_t index;
  5298. char nss[DP_NSS_LENGTH];
  5299. DP_PRINT_STATS("Node Tx Stats:\n");
  5300. DP_PRINT_STATS("Total Packet Completions = %d",
  5301. peer->stats.tx.comp_pkt.num);
  5302. DP_PRINT_STATS("Total Bytes Completions = %llu",
  5303. peer->stats.tx.comp_pkt.bytes);
  5304. DP_PRINT_STATS("Success Packets = %d",
  5305. peer->stats.tx.tx_success.num);
  5306. DP_PRINT_STATS("Success Bytes = %llu",
  5307. peer->stats.tx.tx_success.bytes);
  5308. DP_PRINT_STATS("Unicast Success Packets = %d",
  5309. peer->stats.tx.ucast.num);
  5310. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  5311. peer->stats.tx.ucast.bytes);
  5312. DP_PRINT_STATS("Multicast Success Packets = %d",
  5313. peer->stats.tx.mcast.num);
  5314. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  5315. peer->stats.tx.mcast.bytes);
  5316. DP_PRINT_STATS("Broadcast Success Packets = %d",
  5317. peer->stats.tx.bcast.num);
  5318. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  5319. peer->stats.tx.bcast.bytes);
  5320. DP_PRINT_STATS("Packets Failed = %d",
  5321. peer->stats.tx.tx_failed);
  5322. DP_PRINT_STATS("Packets In OFDMA = %d",
  5323. peer->stats.tx.ofdma);
  5324. DP_PRINT_STATS("Packets In STBC = %d",
  5325. peer->stats.tx.stbc);
  5326. DP_PRINT_STATS("Packets In LDPC = %d",
  5327. peer->stats.tx.ldpc);
  5328. DP_PRINT_STATS("Packet Retries = %d",
  5329. peer->stats.tx.retries);
  5330. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  5331. peer->stats.tx.amsdu_cnt);
  5332. DP_PRINT_STATS("Last Packet RSSI = %d",
  5333. peer->stats.tx.last_ack_rssi);
  5334. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  5335. peer->stats.tx.dropped.fw_rem);
  5336. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  5337. peer->stats.tx.dropped.fw_rem_tx);
  5338. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  5339. peer->stats.tx.dropped.fw_rem_notx);
  5340. DP_PRINT_STATS("Dropped : Age Out = %d",
  5341. peer->stats.tx.dropped.age_out);
  5342. DP_PRINT_STATS("NAWDS : ");
  5343. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  5344. peer->stats.tx.nawds_mcast_drop);
  5345. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  5346. peer->stats.tx.nawds_mcast.num);
  5347. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  5348. peer->stats.tx.nawds_mcast.bytes);
  5349. DP_PRINT_STATS("Rate Info:");
  5350. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  5351. DP_PRINT_STATS("SGI = "
  5352. " 0.8us %d"
  5353. " 0.4us %d"
  5354. " 1.6us %d"
  5355. " 3.2us %d",
  5356. peer->stats.tx.sgi_count[0],
  5357. peer->stats.tx.sgi_count[1],
  5358. peer->stats.tx.sgi_count[2],
  5359. peer->stats.tx.sgi_count[3]);
  5360. DP_PRINT_STATS("Excess Retries per AC ");
  5361. DP_PRINT_STATS(" Best effort = %d",
  5362. peer->stats.tx.excess_retries_per_ac[0]);
  5363. DP_PRINT_STATS(" Background= %d",
  5364. peer->stats.tx.excess_retries_per_ac[1]);
  5365. DP_PRINT_STATS(" Video = %d",
  5366. peer->stats.tx.excess_retries_per_ac[2]);
  5367. DP_PRINT_STATS(" Voice = %d",
  5368. peer->stats.tx.excess_retries_per_ac[3]);
  5369. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  5370. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  5371. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  5372. index = 0;
  5373. for (i = 0; i < SS_COUNT; i++) {
  5374. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5375. " %d", peer->stats.tx.nss[i]);
  5376. }
  5377. DP_PRINT_STATS("NSS(1-8) = %s",
  5378. nss);
  5379. DP_PRINT_STATS("Aggregation:");
  5380. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  5381. peer->stats.tx.amsdu_cnt);
  5382. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  5383. peer->stats.tx.non_amsdu_cnt);
  5384. DP_PRINT_STATS("Node Rx Stats:");
  5385. DP_PRINT_STATS("Packets Sent To Stack = %d",
  5386. peer->stats.rx.to_stack.num);
  5387. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  5388. peer->stats.rx.to_stack.bytes);
  5389. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  5390. DP_PRINT_STATS("Ring Id = %d", i);
  5391. DP_PRINT_STATS(" Packets Received = %d",
  5392. peer->stats.rx.rcvd_reo[i].num);
  5393. DP_PRINT_STATS(" Bytes Received = %llu",
  5394. peer->stats.rx.rcvd_reo[i].bytes);
  5395. }
  5396. DP_PRINT_STATS("Multicast Packets Received = %d",
  5397. peer->stats.rx.multicast.num);
  5398. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  5399. peer->stats.rx.multicast.bytes);
  5400. DP_PRINT_STATS("Broadcast Packets Received = %d",
  5401. peer->stats.rx.bcast.num);
  5402. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  5403. peer->stats.rx.bcast.bytes);
  5404. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  5405. peer->stats.rx.intra_bss.pkts.num);
  5406. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  5407. peer->stats.rx.intra_bss.pkts.bytes);
  5408. DP_PRINT_STATS("Raw Packets Received = %d",
  5409. peer->stats.rx.raw.num);
  5410. DP_PRINT_STATS("Raw Bytes Received = %llu",
  5411. peer->stats.rx.raw.bytes);
  5412. DP_PRINT_STATS("Errors: MIC Errors = %d",
  5413. peer->stats.rx.err.mic_err);
  5414. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  5415. peer->stats.rx.err.decrypt_err);
  5416. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  5417. peer->stats.rx.non_ampdu_cnt);
  5418. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  5419. peer->stats.rx.ampdu_cnt);
  5420. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  5421. peer->stats.rx.non_amsdu_cnt);
  5422. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  5423. peer->stats.rx.amsdu_cnt);
  5424. DP_PRINT_STATS("NAWDS : ");
  5425. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  5426. peer->stats.rx.nawds_mcast_drop);
  5427. DP_PRINT_STATS("SGI ="
  5428. " 0.8us %d"
  5429. " 0.4us %d"
  5430. " 1.6us %d"
  5431. " 3.2us %d",
  5432. peer->stats.rx.sgi_count[0],
  5433. peer->stats.rx.sgi_count[1],
  5434. peer->stats.rx.sgi_count[2],
  5435. peer->stats.rx.sgi_count[3]);
  5436. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5437. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5438. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5439. DP_PRINT_STATS("Reception Type ="
  5440. " SU %d,"
  5441. " MU_MIMO %d,"
  5442. " MU_OFDMA %d,"
  5443. " MU_OFDMA_MIMO %d",
  5444. peer->stats.rx.reception_type[0],
  5445. peer->stats.rx.reception_type[1],
  5446. peer->stats.rx.reception_type[2],
  5447. peer->stats.rx.reception_type[3]);
  5448. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  5449. index = 0;
  5450. for (i = 0; i < SS_COUNT; i++) {
  5451. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5452. " %d", peer->stats.rx.nss[i]);
  5453. }
  5454. DP_PRINT_STATS("NSS(1-8) = %s",
  5455. nss);
  5456. DP_PRINT_STATS("Aggregation:");
  5457. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5458. peer->stats.rx.ampdu_cnt);
  5459. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5460. peer->stats.rx.non_ampdu_cnt);
  5461. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5462. peer->stats.rx.amsdu_cnt);
  5463. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5464. peer->stats.rx.non_amsdu_cnt);
  5465. }
  5466. /*
  5467. * dp_get_host_peer_stats()- function to print peer stats
  5468. * @pdev_handle: DP_PDEV handle
  5469. * @mac_addr: mac address of the peer
  5470. *
  5471. * Return: void
  5472. */
  5473. static void
  5474. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5475. {
  5476. struct dp_peer *peer;
  5477. uint8_t local_id;
  5478. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5479. &local_id);
  5480. if (!peer) {
  5481. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5482. "%s: Invalid peer\n", __func__);
  5483. return;
  5484. }
  5485. dp_print_peer_stats(peer);
  5486. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5487. }
  5488. /**
  5489. * dp_print_host_stats()- Function to print the stats aggregated at host
  5490. * @vdev_handle: DP_VDEV handle
  5491. * @type: host stats type
  5492. *
  5493. * Available Stat types
  5494. * TXRX_CLEAR_STATS : Clear the stats
  5495. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5496. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5497. * TXRX_TX_HOST_STATS: Print Tx Stats
  5498. * TXRX_RX_HOST_STATS: Print Rx Stats
  5499. * TXRX_AST_STATS: Print AST Stats
  5500. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5501. *
  5502. * Return: 0 on success, print error message in case of failure
  5503. */
  5504. static int
  5505. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  5506. struct cdp_txrx_stats_req *req)
  5507. {
  5508. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5509. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5510. enum cdp_host_txrx_stats type =
  5511. dp_stats_mapping_table[req->stats][STATS_HOST];
  5512. dp_aggregate_pdev_stats(pdev);
  5513. switch (type) {
  5514. case TXRX_CLEAR_STATS:
  5515. dp_txrx_host_stats_clr(vdev);
  5516. break;
  5517. case TXRX_RX_RATE_STATS:
  5518. dp_print_rx_rates(vdev);
  5519. break;
  5520. case TXRX_TX_RATE_STATS:
  5521. dp_print_tx_rates(vdev);
  5522. break;
  5523. case TXRX_TX_HOST_STATS:
  5524. dp_print_pdev_tx_stats(pdev);
  5525. dp_print_soc_tx_stats(pdev->soc);
  5526. break;
  5527. case TXRX_RX_HOST_STATS:
  5528. dp_print_pdev_rx_stats(pdev);
  5529. dp_print_soc_rx_stats(pdev->soc);
  5530. break;
  5531. case TXRX_AST_STATS:
  5532. dp_print_ast_stats(pdev->soc);
  5533. dp_print_peer_table(vdev);
  5534. break;
  5535. case TXRX_SRNG_PTR_STATS:
  5536. dp_print_ring_stats(pdev);
  5537. break;
  5538. case TXRX_RX_MON_STATS:
  5539. dp_print_pdev_rx_mon_stats(pdev);
  5540. break;
  5541. case TXRX_REO_QUEUE_STATS:
  5542. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  5543. break;
  5544. default:
  5545. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5546. break;
  5547. }
  5548. return 0;
  5549. }
  5550. /*
  5551. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5552. * @pdev: DP_PDEV handle
  5553. *
  5554. * Return: void
  5555. */
  5556. static void
  5557. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5558. {
  5559. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5560. int mac_id;
  5561. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5562. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5563. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5564. pdev->pdev_id);
  5565. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5566. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5567. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5568. }
  5569. }
  5570. /*
  5571. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5572. * @pdev: DP_PDEV handle
  5573. *
  5574. * Return: void
  5575. */
  5576. static void
  5577. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5578. {
  5579. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5580. int mac_id;
  5581. htt_tlv_filter.mpdu_start = 1;
  5582. htt_tlv_filter.msdu_start = 0;
  5583. htt_tlv_filter.packet = 0;
  5584. htt_tlv_filter.msdu_end = 0;
  5585. htt_tlv_filter.mpdu_end = 0;
  5586. htt_tlv_filter.attention = 0;
  5587. htt_tlv_filter.ppdu_start = 1;
  5588. htt_tlv_filter.ppdu_end = 1;
  5589. htt_tlv_filter.ppdu_end_user_stats = 1;
  5590. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5591. htt_tlv_filter.ppdu_end_status_done = 1;
  5592. htt_tlv_filter.enable_fp = 1;
  5593. htt_tlv_filter.enable_md = 0;
  5594. if (pdev->mcopy_mode) {
  5595. htt_tlv_filter.packet_header = 1;
  5596. htt_tlv_filter.enable_mo = 1;
  5597. }
  5598. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5599. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5600. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5601. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5602. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5603. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5604. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5605. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5606. pdev->pdev_id);
  5607. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5608. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5609. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5610. }
  5611. }
  5612. /*
  5613. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  5614. * modes are enabled or not.
  5615. * @dp_pdev: dp pdev handle.
  5616. *
  5617. * Return: bool
  5618. */
  5619. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  5620. {
  5621. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  5622. !pdev->mcopy_mode)
  5623. return true;
  5624. else
  5625. return false;
  5626. }
  5627. /*
  5628. *dp_set_bpr_enable() - API to enable/disable bpr feature
  5629. *@pdev_handle: DP_PDEV handle.
  5630. *@val: Provided value.
  5631. *
  5632. *Return: void
  5633. */
  5634. static void
  5635. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  5636. {
  5637. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5638. switch (val) {
  5639. case CDP_BPR_DISABLE:
  5640. pdev->bpr_enable = CDP_BPR_DISABLE;
  5641. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5642. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  5643. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5644. } else if (pdev->enhanced_stats_en &&
  5645. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5646. !pdev->pktlog_ppdu_stats) {
  5647. dp_h2t_cfg_stats_msg_send(pdev,
  5648. DP_PPDU_STATS_CFG_ENH_STATS,
  5649. pdev->pdev_id);
  5650. }
  5651. break;
  5652. case CDP_BPR_ENABLE:
  5653. pdev->bpr_enable = CDP_BPR_ENABLE;
  5654. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  5655. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  5656. dp_h2t_cfg_stats_msg_send(pdev,
  5657. DP_PPDU_STATS_CFG_BPR,
  5658. pdev->pdev_id);
  5659. } else if (pdev->enhanced_stats_en &&
  5660. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5661. !pdev->pktlog_ppdu_stats) {
  5662. dp_h2t_cfg_stats_msg_send(pdev,
  5663. DP_PPDU_STATS_CFG_BPR_ENH,
  5664. pdev->pdev_id);
  5665. } else if (pdev->pktlog_ppdu_stats) {
  5666. dp_h2t_cfg_stats_msg_send(pdev,
  5667. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  5668. pdev->pdev_id);
  5669. }
  5670. break;
  5671. default:
  5672. break;
  5673. }
  5674. }
  5675. /*
  5676. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5677. * @pdev_handle: DP_PDEV handle
  5678. * @val: user provided value
  5679. *
  5680. * Return: void
  5681. */
  5682. static void
  5683. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5684. {
  5685. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5686. switch (val) {
  5687. case 0:
  5688. pdev->tx_sniffer_enable = 0;
  5689. pdev->mcopy_mode = 0;
  5690. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5691. !pdev->bpr_enable) {
  5692. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5693. dp_ppdu_ring_reset(pdev);
  5694. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  5695. dp_h2t_cfg_stats_msg_send(pdev,
  5696. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5697. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  5698. dp_h2t_cfg_stats_msg_send(pdev,
  5699. DP_PPDU_STATS_CFG_BPR_ENH,
  5700. pdev->pdev_id);
  5701. } else {
  5702. dp_h2t_cfg_stats_msg_send(pdev,
  5703. DP_PPDU_STATS_CFG_BPR,
  5704. pdev->pdev_id);
  5705. }
  5706. break;
  5707. case 1:
  5708. pdev->tx_sniffer_enable = 1;
  5709. pdev->mcopy_mode = 0;
  5710. if (!pdev->pktlog_ppdu_stats)
  5711. dp_h2t_cfg_stats_msg_send(pdev,
  5712. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5713. break;
  5714. case 2:
  5715. pdev->mcopy_mode = 1;
  5716. pdev->tx_sniffer_enable = 0;
  5717. dp_ppdu_ring_cfg(pdev);
  5718. if (!pdev->pktlog_ppdu_stats)
  5719. dp_h2t_cfg_stats_msg_send(pdev,
  5720. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5721. break;
  5722. default:
  5723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5724. "Invalid value");
  5725. break;
  5726. }
  5727. }
  5728. /*
  5729. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5730. * @pdev_handle: DP_PDEV handle
  5731. *
  5732. * Return: void
  5733. */
  5734. static void
  5735. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5736. {
  5737. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5738. pdev->enhanced_stats_en = 1;
  5739. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added)
  5740. dp_ppdu_ring_cfg(pdev);
  5741. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  5742. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5743. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  5744. dp_h2t_cfg_stats_msg_send(pdev,
  5745. DP_PPDU_STATS_CFG_BPR_ENH,
  5746. pdev->pdev_id);
  5747. }
  5748. }
  5749. /*
  5750. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5751. * @pdev_handle: DP_PDEV handle
  5752. *
  5753. * Return: void
  5754. */
  5755. static void
  5756. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5757. {
  5758. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5759. pdev->enhanced_stats_en = 0;
  5760. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  5761. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5762. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  5763. dp_h2t_cfg_stats_msg_send(pdev,
  5764. DP_PPDU_STATS_CFG_BPR,
  5765. pdev->pdev_id);
  5766. }
  5767. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added)
  5768. dp_ppdu_ring_reset(pdev);
  5769. }
  5770. /*
  5771. * dp_get_fw_peer_stats()- function to print peer stats
  5772. * @pdev_handle: DP_PDEV handle
  5773. * @mac_addr: mac address of the peer
  5774. * @cap: Type of htt stats requested
  5775. *
  5776. * Currently Supporting only MAC ID based requests Only
  5777. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5778. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5779. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5780. *
  5781. * Return: void
  5782. */
  5783. static void
  5784. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5785. uint32_t cap)
  5786. {
  5787. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5788. int i;
  5789. uint32_t config_param0 = 0;
  5790. uint32_t config_param1 = 0;
  5791. uint32_t config_param2 = 0;
  5792. uint32_t config_param3 = 0;
  5793. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5794. config_param0 |= (1 << (cap + 1));
  5795. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5796. config_param1 |= (1 << i);
  5797. }
  5798. config_param2 |= (mac_addr[0] & 0x000000ff);
  5799. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5800. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5801. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5802. config_param3 |= (mac_addr[4] & 0x000000ff);
  5803. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5804. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5805. config_param0, config_param1, config_param2,
  5806. config_param3, 0, 0, 0);
  5807. }
  5808. /* This struct definition will be removed from here
  5809. * once it get added in FW headers*/
  5810. struct httstats_cmd_req {
  5811. uint32_t config_param0;
  5812. uint32_t config_param1;
  5813. uint32_t config_param2;
  5814. uint32_t config_param3;
  5815. int cookie;
  5816. u_int8_t stats_id;
  5817. };
  5818. /*
  5819. * dp_get_htt_stats: function to process the httstas request
  5820. * @pdev_handle: DP pdev handle
  5821. * @data: pointer to request data
  5822. * @data_len: length for request data
  5823. *
  5824. * return: void
  5825. */
  5826. static void
  5827. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5828. {
  5829. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5830. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5831. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5832. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5833. req->config_param0, req->config_param1,
  5834. req->config_param2, req->config_param3,
  5835. req->cookie, 0, 0);
  5836. }
  5837. /*
  5838. * dp_set_pdev_param: function to set parameters in pdev
  5839. * @pdev_handle: DP pdev handle
  5840. * @param: parameter type to be set
  5841. * @val: value of parameter to be set
  5842. *
  5843. * return: void
  5844. */
  5845. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5846. enum cdp_pdev_param_type param, uint8_t val)
  5847. {
  5848. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5849. switch (param) {
  5850. case CDP_CONFIG_DEBUG_SNIFFER:
  5851. dp_config_debug_sniffer(pdev_handle, val);
  5852. break;
  5853. case CDP_CONFIG_BPR_ENABLE:
  5854. dp_set_bpr_enable(pdev_handle, val);
  5855. break;
  5856. case CDP_CONFIG_PRIMARY_RADIO:
  5857. pdev->is_primary = val;
  5858. break;
  5859. default:
  5860. break;
  5861. }
  5862. }
  5863. /*
  5864. * dp_set_vdev_param: function to set parameters in vdev
  5865. * @param: parameter type to be set
  5866. * @val: value of parameter to be set
  5867. *
  5868. * return: void
  5869. */
  5870. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5871. enum cdp_vdev_param_type param, uint32_t val)
  5872. {
  5873. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5874. switch (param) {
  5875. case CDP_ENABLE_WDS:
  5876. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5877. "wds_enable %d for vdev(%p) id(%d)\n",
  5878. val, vdev, vdev->vdev_id);
  5879. vdev->wds_enabled = val;
  5880. break;
  5881. case CDP_ENABLE_NAWDS:
  5882. vdev->nawds_enabled = val;
  5883. break;
  5884. case CDP_ENABLE_MCAST_EN:
  5885. vdev->mcast_enhancement_en = val;
  5886. break;
  5887. case CDP_ENABLE_PROXYSTA:
  5888. vdev->proxysta_vdev = val;
  5889. break;
  5890. case CDP_UPDATE_TDLS_FLAGS:
  5891. vdev->tdls_link_connected = val;
  5892. break;
  5893. case CDP_CFG_WDS_AGING_TIMER:
  5894. if (val == 0)
  5895. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5896. else if (val != vdev->wds_aging_timer_val)
  5897. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5898. vdev->wds_aging_timer_val = val;
  5899. break;
  5900. case CDP_ENABLE_AP_BRIDGE:
  5901. if (wlan_op_mode_sta != vdev->opmode)
  5902. vdev->ap_bridge_enabled = val;
  5903. else
  5904. vdev->ap_bridge_enabled = false;
  5905. break;
  5906. case CDP_ENABLE_CIPHER:
  5907. vdev->sec_type = val;
  5908. break;
  5909. case CDP_ENABLE_QWRAP_ISOLATION:
  5910. vdev->isolation_vdev = val;
  5911. break;
  5912. default:
  5913. break;
  5914. }
  5915. dp_tx_vdev_update_search_flags(vdev);
  5916. }
  5917. /**
  5918. * dp_peer_set_nawds: set nawds bit in peer
  5919. * @peer_handle: pointer to peer
  5920. * @value: enable/disable nawds
  5921. *
  5922. * return: void
  5923. */
  5924. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5925. {
  5926. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5927. peer->nawds_enabled = value;
  5928. }
  5929. /*
  5930. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5931. * @vdev_handle: DP_VDEV handle
  5932. * @map_id:ID of map that needs to be updated
  5933. *
  5934. * Return: void
  5935. */
  5936. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5937. uint8_t map_id)
  5938. {
  5939. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5940. vdev->dscp_tid_map_id = map_id;
  5941. return;
  5942. }
  5943. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  5944. * @peer_handle: DP_PEER handle
  5945. *
  5946. * return : cdp_peer_stats pointer
  5947. */
  5948. static struct cdp_peer_stats*
  5949. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  5950. {
  5951. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5952. qdf_assert(peer);
  5953. return &peer->stats;
  5954. }
  5955. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  5956. * @peer_handle: DP_PEER handle
  5957. *
  5958. * return : void
  5959. */
  5960. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  5961. {
  5962. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5963. qdf_assert(peer);
  5964. qdf_mem_set(&peer->stats, sizeof(peer->stats), 0);
  5965. }
  5966. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  5967. * @vdev_handle: DP_VDEV handle
  5968. * @buf: buffer for vdev stats
  5969. *
  5970. * return : int
  5971. */
  5972. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  5973. bool is_aggregate)
  5974. {
  5975. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5976. struct cdp_vdev_stats *vdev_stats = (struct cdp_vdev_stats *)buf;
  5977. if (is_aggregate)
  5978. dp_aggregate_vdev_stats(vdev, buf);
  5979. else
  5980. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  5981. return 0;
  5982. }
  5983. /*
  5984. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5985. * @pdev_handle: DP_PDEV handle
  5986. * @buf: to hold pdev_stats
  5987. *
  5988. * Return: int
  5989. */
  5990. static int
  5991. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5992. {
  5993. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5994. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5995. struct cdp_txrx_stats_req req = {0,};
  5996. dp_aggregate_pdev_stats(pdev);
  5997. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5998. req.cookie_val = 1;
  5999. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  6000. req.param1, req.param2, req.param3, 0,
  6001. req.cookie_val, 0);
  6002. msleep(DP_MAX_SLEEP_TIME);
  6003. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  6004. req.cookie_val = 1;
  6005. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  6006. req.param1, req.param2, req.param3, 0,
  6007. req.cookie_val, 0);
  6008. msleep(DP_MAX_SLEEP_TIME);
  6009. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  6010. return TXRX_STATS_LEVEL;
  6011. }
  6012. /**
  6013. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  6014. * @pdev: DP_PDEV handle
  6015. * @map_id: ID of map that needs to be updated
  6016. * @tos: index value in map
  6017. * @tid: tid value passed by the user
  6018. *
  6019. * Return: void
  6020. */
  6021. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  6022. uint8_t map_id, uint8_t tos, uint8_t tid)
  6023. {
  6024. uint8_t dscp;
  6025. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  6026. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  6027. pdev->dscp_tid_map[map_id][dscp] = tid;
  6028. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  6029. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  6030. map_id, dscp);
  6031. return;
  6032. }
  6033. /**
  6034. * dp_fw_stats_process(): Process TxRX FW stats request
  6035. * @vdev_handle: DP VDEV handle
  6036. * @req: stats request
  6037. *
  6038. * return: int
  6039. */
  6040. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  6041. struct cdp_txrx_stats_req *req)
  6042. {
  6043. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6044. struct dp_pdev *pdev = NULL;
  6045. uint32_t stats = req->stats;
  6046. uint8_t mac_id = req->mac_id;
  6047. if (!vdev) {
  6048. DP_TRACE(NONE, "VDEV not found");
  6049. return 1;
  6050. }
  6051. pdev = vdev->pdev;
  6052. /*
  6053. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  6054. * from param0 to param3 according to below rule:
  6055. *
  6056. * PARAM:
  6057. * - config_param0 : start_offset (stats type)
  6058. * - config_param1 : stats bmask from start offset
  6059. * - config_param2 : stats bmask from start offset + 32
  6060. * - config_param3 : stats bmask from start offset + 64
  6061. */
  6062. if (req->stats == CDP_TXRX_STATS_0) {
  6063. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  6064. req->param1 = 0xFFFFFFFF;
  6065. req->param2 = 0xFFFFFFFF;
  6066. req->param3 = 0xFFFFFFFF;
  6067. }
  6068. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  6069. req->param1, req->param2, req->param3,
  6070. 0, 0, mac_id);
  6071. }
  6072. /**
  6073. * dp_txrx_stats_request - function to map to firmware and host stats
  6074. * @vdev: virtual handle
  6075. * @req: stats request
  6076. *
  6077. * Return: QDF_STATUS
  6078. */
  6079. static
  6080. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  6081. struct cdp_txrx_stats_req *req)
  6082. {
  6083. int host_stats;
  6084. int fw_stats;
  6085. enum cdp_stats stats;
  6086. int num_stats;
  6087. if (!vdev || !req) {
  6088. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6089. "Invalid vdev/req instance");
  6090. return QDF_STATUS_E_INVAL;
  6091. }
  6092. stats = req->stats;
  6093. if (stats >= CDP_TXRX_MAX_STATS)
  6094. return QDF_STATUS_E_INVAL;
  6095. /*
  6096. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  6097. * has to be updated if new FW HTT stats added
  6098. */
  6099. if (stats > CDP_TXRX_STATS_HTT_MAX)
  6100. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  6101. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  6102. if (stats >= num_stats) {
  6103. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6104. "%s: Invalid stats option: %d", __func__, stats);
  6105. return QDF_STATUS_E_INVAL;
  6106. }
  6107. req->stats = stats;
  6108. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  6109. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  6110. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6111. "stats: %u fw_stats_type: %d host_stats: %d",
  6112. stats, fw_stats, host_stats);
  6113. if (fw_stats != TXRX_FW_STATS_INVALID) {
  6114. /* update request with FW stats type */
  6115. req->stats = fw_stats;
  6116. return dp_fw_stats_process(vdev, req);
  6117. }
  6118. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  6119. (host_stats <= TXRX_HOST_STATS_MAX))
  6120. return dp_print_host_stats(vdev, req);
  6121. else
  6122. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6123. "Wrong Input for TxRx Stats");
  6124. return QDF_STATUS_SUCCESS;
  6125. }
  6126. /*
  6127. * dp_print_napi_stats(): NAPI stats
  6128. * @soc - soc handle
  6129. */
  6130. static void dp_print_napi_stats(struct dp_soc *soc)
  6131. {
  6132. hif_print_napi_stats(soc->hif_handle);
  6133. }
  6134. /*
  6135. * dp_print_per_ring_stats(): Packet count per ring
  6136. * @soc - soc handle
  6137. */
  6138. static void dp_print_per_ring_stats(struct dp_soc *soc)
  6139. {
  6140. uint8_t ring;
  6141. uint16_t core;
  6142. uint64_t total_packets;
  6143. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  6144. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  6145. total_packets = 0;
  6146. DP_TRACE_STATS(INFO_HIGH,
  6147. "Packets on ring %u:", ring);
  6148. for (core = 0; core < NR_CPUS; core++) {
  6149. DP_TRACE_STATS(INFO_HIGH,
  6150. "Packets arriving on core %u: %llu",
  6151. core,
  6152. soc->stats.rx.ring_packets[core][ring]);
  6153. total_packets += soc->stats.rx.ring_packets[core][ring];
  6154. }
  6155. DP_TRACE_STATS(INFO_HIGH,
  6156. "Total packets on ring %u: %llu",
  6157. ring, total_packets);
  6158. }
  6159. }
  6160. /*
  6161. * dp_txrx_path_stats() - Function to display dump stats
  6162. * @soc - soc handle
  6163. *
  6164. * return: none
  6165. */
  6166. static void dp_txrx_path_stats(struct dp_soc *soc)
  6167. {
  6168. uint8_t error_code;
  6169. uint8_t loop_pdev;
  6170. struct dp_pdev *pdev;
  6171. uint8_t i;
  6172. if (!soc) {
  6173. DP_TRACE(ERROR, "%s: Invalid access",
  6174. __func__);
  6175. return;
  6176. }
  6177. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  6178. pdev = soc->pdev_list[loop_pdev];
  6179. dp_aggregate_pdev_stats(pdev);
  6180. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  6181. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  6182. pdev->stats.tx_i.rcvd.num,
  6183. pdev->stats.tx_i.rcvd.bytes);
  6184. DP_TRACE_STATS(INFO_HIGH,
  6185. "processed from host: %u msdus (%llu bytes)",
  6186. pdev->stats.tx_i.processed.num,
  6187. pdev->stats.tx_i.processed.bytes);
  6188. DP_TRACE_STATS(INFO_HIGH,
  6189. "successfully transmitted: %u msdus (%llu bytes)",
  6190. pdev->stats.tx.tx_success.num,
  6191. pdev->stats.tx.tx_success.bytes);
  6192. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  6193. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  6194. pdev->stats.tx_i.dropped.dropped_pkt.num);
  6195. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  6196. pdev->stats.tx_i.dropped.desc_na.num);
  6197. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  6198. pdev->stats.tx_i.dropped.ring_full);
  6199. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  6200. pdev->stats.tx_i.dropped.enqueue_fail);
  6201. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  6202. pdev->stats.tx_i.dropped.dma_error);
  6203. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  6204. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  6205. pdev->stats.tx.tx_failed);
  6206. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  6207. pdev->stats.tx.dropped.age_out);
  6208. DP_TRACE_STATS(INFO_HIGH, "firmware removed: %u",
  6209. pdev->stats.tx.dropped.fw_rem);
  6210. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  6211. pdev->stats.tx.dropped.fw_rem_tx);
  6212. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  6213. pdev->stats.tx.dropped.fw_rem_notx);
  6214. DP_TRACE_STATS(INFO_HIGH, "peer_invalid: %u",
  6215. pdev->soc->stats.tx.tx_invalid_peer.num);
  6216. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  6217. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  6218. pdev->stats.tx_comp_histogram.pkts_1);
  6219. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  6220. pdev->stats.tx_comp_histogram.pkts_2_20);
  6221. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  6222. pdev->stats.tx_comp_histogram.pkts_21_40);
  6223. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  6224. pdev->stats.tx_comp_histogram.pkts_41_60);
  6225. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  6226. pdev->stats.tx_comp_histogram.pkts_61_80);
  6227. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  6228. pdev->stats.tx_comp_histogram.pkts_81_100);
  6229. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  6230. pdev->stats.tx_comp_histogram.pkts_101_200);
  6231. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  6232. pdev->stats.tx_comp_histogram.pkts_201_plus);
  6233. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  6234. DP_TRACE_STATS(INFO_HIGH,
  6235. "delivered %u msdus ( %llu bytes),",
  6236. pdev->stats.rx.to_stack.num,
  6237. pdev->stats.rx.to_stack.bytes);
  6238. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  6239. DP_TRACE_STATS(INFO_HIGH,
  6240. "received on reo[%d] %u msdus( %llu bytes),",
  6241. i, pdev->stats.rx.rcvd_reo[i].num,
  6242. pdev->stats.rx.rcvd_reo[i].bytes);
  6243. DP_TRACE_STATS(INFO_HIGH,
  6244. "intra-bss packets %u msdus ( %llu bytes),",
  6245. pdev->stats.rx.intra_bss.pkts.num,
  6246. pdev->stats.rx.intra_bss.pkts.bytes);
  6247. DP_TRACE_STATS(INFO_HIGH,
  6248. "intra-bss fails %u msdus ( %llu bytes),",
  6249. pdev->stats.rx.intra_bss.fail.num,
  6250. pdev->stats.rx.intra_bss.fail.bytes);
  6251. DP_TRACE_STATS(INFO_HIGH,
  6252. "raw packets %u msdus ( %llu bytes),",
  6253. pdev->stats.rx.raw.num,
  6254. pdev->stats.rx.raw.bytes);
  6255. DP_TRACE_STATS(INFO_HIGH, "dropped: error %u msdus",
  6256. pdev->stats.rx.err.mic_err);
  6257. DP_TRACE_STATS(INFO_HIGH, "peer invalid %u",
  6258. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  6259. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  6260. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  6261. pdev->soc->stats.rx.err.invalid_rbm);
  6262. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  6263. pdev->soc->stats.rx.err.hal_ring_access_fail);
  6264. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  6265. error_code++) {
  6266. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  6267. continue;
  6268. DP_TRACE_STATS(INFO_HIGH,
  6269. "Reo error number (%u): %u msdus",
  6270. error_code,
  6271. pdev->soc->stats.rx.err
  6272. .reo_error[error_code]);
  6273. }
  6274. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  6275. error_code++) {
  6276. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  6277. continue;
  6278. DP_TRACE_STATS(INFO_HIGH,
  6279. "Rxdma error number (%u): %u msdus",
  6280. error_code,
  6281. pdev->soc->stats.rx.err
  6282. .rxdma_error[error_code]);
  6283. }
  6284. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  6285. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  6286. pdev->stats.rx_ind_histogram.pkts_1);
  6287. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  6288. pdev->stats.rx_ind_histogram.pkts_2_20);
  6289. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  6290. pdev->stats.rx_ind_histogram.pkts_21_40);
  6291. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  6292. pdev->stats.rx_ind_histogram.pkts_41_60);
  6293. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  6294. pdev->stats.rx_ind_histogram.pkts_61_80);
  6295. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  6296. pdev->stats.rx_ind_histogram.pkts_81_100);
  6297. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  6298. pdev->stats.rx_ind_histogram.pkts_101_200);
  6299. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  6300. pdev->stats.rx_ind_histogram.pkts_201_plus);
  6301. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  6302. __func__,
  6303. pdev->soc->wlan_cfg_ctx
  6304. ->tso_enabled,
  6305. pdev->soc->wlan_cfg_ctx
  6306. ->lro_enabled,
  6307. pdev->soc->wlan_cfg_ctx
  6308. ->rx_hash,
  6309. pdev->soc->wlan_cfg_ctx
  6310. ->napi_enabled);
  6311. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6312. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  6313. __func__,
  6314. pdev->soc->wlan_cfg_ctx
  6315. ->tx_flow_stop_queue_threshold,
  6316. pdev->soc->wlan_cfg_ctx
  6317. ->tx_flow_start_queue_offset);
  6318. #endif
  6319. }
  6320. }
  6321. /*
  6322. * dp_txrx_dump_stats() - Dump statistics
  6323. * @value - Statistics option
  6324. */
  6325. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  6326. enum qdf_stats_verbosity_level level)
  6327. {
  6328. struct dp_soc *soc =
  6329. (struct dp_soc *)psoc;
  6330. QDF_STATUS status = QDF_STATUS_SUCCESS;
  6331. if (!soc) {
  6332. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6333. "%s: soc is NULL", __func__);
  6334. return QDF_STATUS_E_INVAL;
  6335. }
  6336. switch (value) {
  6337. case CDP_TXRX_PATH_STATS:
  6338. dp_txrx_path_stats(soc);
  6339. break;
  6340. case CDP_RX_RING_STATS:
  6341. dp_print_per_ring_stats(soc);
  6342. break;
  6343. case CDP_TXRX_TSO_STATS:
  6344. /* TODO: NOT IMPLEMENTED */
  6345. break;
  6346. case CDP_DUMP_TX_FLOW_POOL_INFO:
  6347. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  6348. break;
  6349. case CDP_DP_NAPI_STATS:
  6350. dp_print_napi_stats(soc);
  6351. break;
  6352. case CDP_TXRX_DESC_STATS:
  6353. /* TODO: NOT IMPLEMENTED */
  6354. break;
  6355. default:
  6356. status = QDF_STATUS_E_INVAL;
  6357. break;
  6358. }
  6359. return status;
  6360. }
  6361. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6362. /**
  6363. * dp_update_flow_control_parameters() - API to store datapath
  6364. * config parameters
  6365. * @soc: soc handle
  6366. * @cfg: ini parameter handle
  6367. *
  6368. * Return: void
  6369. */
  6370. static inline
  6371. void dp_update_flow_control_parameters(struct dp_soc *soc,
  6372. struct cdp_config_params *params)
  6373. {
  6374. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  6375. params->tx_flow_stop_queue_threshold;
  6376. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  6377. params->tx_flow_start_queue_offset;
  6378. }
  6379. #else
  6380. static inline
  6381. void dp_update_flow_control_parameters(struct dp_soc *soc,
  6382. struct cdp_config_params *params)
  6383. {
  6384. }
  6385. #endif
  6386. /**
  6387. * dp_update_config_parameters() - API to store datapath
  6388. * config parameters
  6389. * @soc: soc handle
  6390. * @cfg: ini parameter handle
  6391. *
  6392. * Return: status
  6393. */
  6394. static
  6395. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  6396. struct cdp_config_params *params)
  6397. {
  6398. struct dp_soc *soc = (struct dp_soc *)psoc;
  6399. if (!(soc)) {
  6400. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6401. "%s: Invalid handle", __func__);
  6402. return QDF_STATUS_E_INVAL;
  6403. }
  6404. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  6405. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  6406. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  6407. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  6408. params->tcp_udp_checksumoffload;
  6409. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  6410. dp_update_flow_control_parameters(soc, params);
  6411. return QDF_STATUS_SUCCESS;
  6412. }
  6413. /**
  6414. * dp_txrx_set_wds_rx_policy() - API to store datapath
  6415. * config parameters
  6416. * @vdev_handle - datapath vdev handle
  6417. * @cfg: ini parameter handle
  6418. *
  6419. * Return: status
  6420. */
  6421. #ifdef WDS_VENDOR_EXTENSION
  6422. void
  6423. dp_txrx_set_wds_rx_policy(
  6424. struct cdp_vdev *vdev_handle,
  6425. u_int32_t val)
  6426. {
  6427. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6428. struct dp_peer *peer;
  6429. if (vdev->opmode == wlan_op_mode_ap) {
  6430. /* for ap, set it on bss_peer */
  6431. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6432. if (peer->bss_peer) {
  6433. peer->wds_ecm.wds_rx_filter = 1;
  6434. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6435. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6436. break;
  6437. }
  6438. }
  6439. } else if (vdev->opmode == wlan_op_mode_sta) {
  6440. peer = TAILQ_FIRST(&vdev->peer_list);
  6441. peer->wds_ecm.wds_rx_filter = 1;
  6442. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6443. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6444. }
  6445. }
  6446. /**
  6447. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  6448. *
  6449. * @peer_handle - datapath peer handle
  6450. * @wds_tx_ucast: policy for unicast transmission
  6451. * @wds_tx_mcast: policy for multicast transmission
  6452. *
  6453. * Return: void
  6454. */
  6455. void
  6456. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  6457. int wds_tx_ucast, int wds_tx_mcast)
  6458. {
  6459. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6460. if (wds_tx_ucast || wds_tx_mcast) {
  6461. peer->wds_enabled = 1;
  6462. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  6463. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  6464. } else {
  6465. peer->wds_enabled = 0;
  6466. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  6467. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  6468. }
  6469. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6470. FL("Policy Update set to :\
  6471. peer->wds_enabled %d\
  6472. peer->wds_ecm.wds_tx_ucast_4addr %d\
  6473. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  6474. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  6475. peer->wds_ecm.wds_tx_mcast_4addr);
  6476. return;
  6477. }
  6478. #endif
  6479. static struct cdp_wds_ops dp_ops_wds = {
  6480. .vdev_set_wds = dp_vdev_set_wds,
  6481. #ifdef WDS_VENDOR_EXTENSION
  6482. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  6483. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  6484. #endif
  6485. };
  6486. /*
  6487. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  6488. * @vdev_handle - datapath vdev handle
  6489. * @callback - callback function
  6490. * @ctxt: callback context
  6491. *
  6492. */
  6493. static void
  6494. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  6495. ol_txrx_data_tx_cb callback, void *ctxt)
  6496. {
  6497. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6498. vdev->tx_non_std_data_callback.func = callback;
  6499. vdev->tx_non_std_data_callback.ctxt = ctxt;
  6500. }
  6501. /**
  6502. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  6503. * @pdev_hdl: datapath pdev handle
  6504. *
  6505. * Return: opaque pointer to dp txrx handle
  6506. */
  6507. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  6508. {
  6509. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6510. return pdev->dp_txrx_handle;
  6511. }
  6512. /**
  6513. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  6514. * @pdev_hdl: datapath pdev handle
  6515. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  6516. *
  6517. * Return: void
  6518. */
  6519. static void
  6520. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  6521. {
  6522. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6523. pdev->dp_txrx_handle = dp_txrx_hdl;
  6524. }
  6525. /**
  6526. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  6527. * @soc_handle: datapath soc handle
  6528. *
  6529. * Return: opaque pointer to external dp (non-core DP)
  6530. */
  6531. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  6532. {
  6533. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6534. return soc->external_txrx_handle;
  6535. }
  6536. /**
  6537. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  6538. * @soc_handle: datapath soc handle
  6539. * @txrx_handle: opaque pointer to external dp (non-core DP)
  6540. *
  6541. * Return: void
  6542. */
  6543. static void
  6544. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  6545. {
  6546. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6547. soc->external_txrx_handle = txrx_handle;
  6548. }
  6549. #ifdef FEATURE_AST
  6550. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  6551. {
  6552. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  6553. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  6554. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6555. /*
  6556. * For BSS peer, new peer is not created on alloc_node if the
  6557. * peer with same address already exists , instead refcnt is
  6558. * increased for existing peer. Correspondingly in delete path,
  6559. * only refcnt is decreased; and peer is only deleted , when all
  6560. * references are deleted. So delete_in_progress should not be set
  6561. * for bss_peer, unless only 2 reference remains (peer map reference
  6562. * and peer hash table reference).
  6563. */
  6564. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  6565. return;
  6566. }
  6567. peer->delete_in_progress = true;
  6568. dp_peer_delete_ast_entries(soc, peer);
  6569. }
  6570. #endif
  6571. #ifdef ATH_SUPPORT_NAC_RSSI
  6572. /**
  6573. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  6574. * @vdev_hdl: DP vdev handle
  6575. * @rssi: rssi value
  6576. *
  6577. * Return: 0 for success. nonzero for failure.
  6578. */
  6579. QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  6580. char *mac_addr,
  6581. uint8_t *rssi)
  6582. {
  6583. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  6584. struct dp_pdev *pdev = vdev->pdev;
  6585. struct dp_neighbour_peer *peer = NULL;
  6586. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  6587. *rssi = 0;
  6588. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  6589. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  6590. neighbour_peer_list_elem) {
  6591. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  6592. mac_addr, DP_MAC_ADDR_LEN) == 0) {
  6593. *rssi = peer->rssi;
  6594. status = QDF_STATUS_SUCCESS;
  6595. break;
  6596. }
  6597. }
  6598. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  6599. return status;
  6600. }
  6601. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  6602. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6603. uint8_t chan_num)
  6604. {
  6605. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6606. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6607. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6608. pdev->nac_rssi_filtering = 1;
  6609. /* Store address of NAC (neighbour peer) which will be checked
  6610. * against TA of received packets.
  6611. */
  6612. if (cmd == CDP_NAC_PARAM_ADD) {
  6613. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  6614. client_macaddr);
  6615. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6616. dp_update_filter_neighbour_peers(vdev_handle,
  6617. DP_NAC_PARAM_DEL,
  6618. client_macaddr);
  6619. }
  6620. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6621. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6622. ((void *)vdev->pdev->ctrl_pdev,
  6623. vdev->vdev_id, cmd, bssid);
  6624. return QDF_STATUS_SUCCESS;
  6625. }
  6626. #endif
  6627. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6628. uint32_t max_peers)
  6629. {
  6630. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6631. soc->max_peers = max_peers;
  6632. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6633. if (dp_peer_find_attach(soc))
  6634. return QDF_STATUS_E_FAILURE;
  6635. return QDF_STATUS_SUCCESS;
  6636. }
  6637. /**
  6638. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  6639. * @dp_pdev: dp pdev handle
  6640. * @ctrl_pdev: UMAC ctrl pdev handle
  6641. *
  6642. * Return: void
  6643. */
  6644. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  6645. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  6646. {
  6647. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  6648. pdev->ctrl_pdev = ctrl_pdev;
  6649. }
  6650. static struct cdp_cmn_ops dp_ops_cmn = {
  6651. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6652. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6653. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6654. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6655. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6656. .txrx_peer_create = dp_peer_create_wifi3,
  6657. .txrx_peer_setup = dp_peer_setup_wifi3,
  6658. #ifdef FEATURE_AST
  6659. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6660. #else
  6661. .txrx_peer_teardown = NULL,
  6662. #endif
  6663. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6664. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6665. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6666. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6667. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6668. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6669. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6670. .txrx_peer_ast_get_type = dp_peer_ast_get_type_wifi3,
  6671. .txrx_peer_delete = dp_peer_delete_wifi3,
  6672. .txrx_vdev_register = dp_vdev_register_wifi3,
  6673. .txrx_soc_detach = dp_soc_detach_wifi3,
  6674. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6675. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6676. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6677. .txrx_ath_getstats = dp_get_device_stats,
  6678. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6679. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6680. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  6681. .delba_process = dp_delba_process_wifi3,
  6682. .set_addba_response = dp_set_addba_response,
  6683. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6684. .flush_cache_rx_queue = NULL,
  6685. /* TODO: get API's for dscp-tid need to be added*/
  6686. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6687. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6688. .txrx_stats_request = dp_txrx_stats_request,
  6689. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6690. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6691. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  6692. .txrx_set_nac = dp_set_nac,
  6693. .txrx_get_tx_pending = dp_get_tx_pending,
  6694. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6695. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6696. .display_stats = dp_txrx_dump_stats,
  6697. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6698. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6699. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6700. .txrx_intr_detach = dp_soc_interrupt_detach,
  6701. .set_pn_check = dp_set_pn_check_wifi3,
  6702. .update_config_parameters = dp_update_config_parameters,
  6703. /* TODO: Add other functions */
  6704. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6705. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6706. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6707. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6708. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6709. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  6710. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  6711. .tx_send = dp_tx_send,
  6712. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6713. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6714. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6715. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6716. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  6717. .txrx_get_os_rx_handles_from_vdev =
  6718. dp_get_os_rx_handles_from_vdev_wifi3,
  6719. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  6720. };
  6721. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6722. .txrx_peer_authorize = dp_peer_authorize,
  6723. #ifdef QCA_SUPPORT_SON
  6724. .txrx_set_inact_params = dp_set_inact_params,
  6725. .txrx_start_inact_timer = dp_start_inact_timer,
  6726. .txrx_set_overload = dp_set_overload,
  6727. .txrx_peer_is_inact = dp_peer_is_inact,
  6728. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6729. #endif
  6730. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6731. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6732. #ifdef MESH_MODE_SUPPORT
  6733. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6734. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6735. #endif
  6736. .txrx_set_vdev_param = dp_set_vdev_param,
  6737. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6738. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6739. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6740. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6741. .txrx_update_filter_neighbour_peers =
  6742. dp_update_filter_neighbour_peers,
  6743. .txrx_get_sec_type = dp_get_sec_type,
  6744. /* TODO: Add other functions */
  6745. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6746. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6747. #ifdef WDI_EVENT_ENABLE
  6748. .txrx_get_pldev = dp_get_pldev,
  6749. #endif
  6750. .txrx_set_pdev_param = dp_set_pdev_param,
  6751. #ifdef ATH_SUPPORT_NAC_RSSI
  6752. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6753. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  6754. #endif
  6755. .set_key = dp_set_michael_key,
  6756. };
  6757. static struct cdp_me_ops dp_ops_me = {
  6758. #ifdef ATH_SUPPORT_IQUE
  6759. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6760. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6761. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6762. #endif
  6763. };
  6764. static struct cdp_mon_ops dp_ops_mon = {
  6765. .txrx_monitor_set_filter_ucast_data = NULL,
  6766. .txrx_monitor_set_filter_mcast_data = NULL,
  6767. .txrx_monitor_set_filter_non_data = NULL,
  6768. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6769. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6770. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6771. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6772. /* Added support for HK advance filter */
  6773. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6774. };
  6775. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6776. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6777. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6778. .get_htt_stats = dp_get_htt_stats,
  6779. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6780. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6781. .txrx_stats_publish = dp_txrx_stats_publish,
  6782. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  6783. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  6784. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  6785. /* TODO */
  6786. };
  6787. static struct cdp_raw_ops dp_ops_raw = {
  6788. /* TODO */
  6789. };
  6790. #ifdef CONFIG_WIN
  6791. static struct cdp_pflow_ops dp_ops_pflow = {
  6792. /* TODO */
  6793. };
  6794. #endif /* CONFIG_WIN */
  6795. #ifdef FEATURE_RUNTIME_PM
  6796. /**
  6797. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6798. * @opaque_pdev: DP pdev context
  6799. *
  6800. * DP is ready to runtime suspend if there are no pending TX packets.
  6801. *
  6802. * Return: QDF_STATUS
  6803. */
  6804. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6805. {
  6806. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6807. struct dp_soc *soc = pdev->soc;
  6808. /* Abort if there are any pending TX packets */
  6809. if (dp_get_tx_pending(opaque_pdev) > 0) {
  6810. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6811. FL("Abort suspend due to pending TX packets"));
  6812. return QDF_STATUS_E_AGAIN;
  6813. }
  6814. if (soc->intr_mode == DP_INTR_POLL)
  6815. qdf_timer_stop(&soc->int_timer);
  6816. return QDF_STATUS_SUCCESS;
  6817. }
  6818. /**
  6819. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6820. * @opaque_pdev: DP pdev context
  6821. *
  6822. * Resume DP for runtime PM.
  6823. *
  6824. * Return: QDF_STATUS
  6825. */
  6826. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6827. {
  6828. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6829. struct dp_soc *soc = pdev->soc;
  6830. void *hal_srng;
  6831. int i;
  6832. if (soc->intr_mode == DP_INTR_POLL)
  6833. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6834. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6835. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6836. if (hal_srng) {
  6837. /* We actually only need to acquire the lock */
  6838. hal_srng_access_start(soc->hal_soc, hal_srng);
  6839. /* Update SRC ring head pointer for HW to send
  6840. all pending packets */
  6841. hal_srng_access_end(soc->hal_soc, hal_srng);
  6842. }
  6843. }
  6844. return QDF_STATUS_SUCCESS;
  6845. }
  6846. #endif /* FEATURE_RUNTIME_PM */
  6847. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6848. {
  6849. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6850. struct dp_soc *soc = pdev->soc;
  6851. if (soc->intr_mode == DP_INTR_POLL)
  6852. qdf_timer_stop(&soc->int_timer);
  6853. return QDF_STATUS_SUCCESS;
  6854. }
  6855. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6856. {
  6857. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6858. struct dp_soc *soc = pdev->soc;
  6859. if (soc->intr_mode == DP_INTR_POLL)
  6860. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6861. return QDF_STATUS_SUCCESS;
  6862. }
  6863. #ifndef CONFIG_WIN
  6864. static struct cdp_misc_ops dp_ops_misc = {
  6865. .tx_non_std = dp_tx_non_std,
  6866. .get_opmode = dp_get_opmode,
  6867. #ifdef FEATURE_RUNTIME_PM
  6868. .runtime_suspend = dp_runtime_suspend,
  6869. .runtime_resume = dp_runtime_resume,
  6870. #endif /* FEATURE_RUNTIME_PM */
  6871. .pkt_log_init = dp_pkt_log_init,
  6872. .pkt_log_con_service = dp_pkt_log_con_service,
  6873. };
  6874. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6875. /* WIFI 3.0 DP implement as required. */
  6876. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6877. .flow_pool_map_handler = dp_tx_flow_pool_map,
  6878. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  6879. .register_pause_cb = dp_txrx_register_pause_cb,
  6880. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6881. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6882. };
  6883. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6884. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6885. };
  6886. #ifdef IPA_OFFLOAD
  6887. static struct cdp_ipa_ops dp_ops_ipa = {
  6888. .ipa_get_resource = dp_ipa_get_resource,
  6889. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6890. .ipa_op_response = dp_ipa_op_response,
  6891. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6892. .ipa_get_stat = dp_ipa_get_stat,
  6893. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6894. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6895. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6896. .ipa_setup = dp_ipa_setup,
  6897. .ipa_cleanup = dp_ipa_cleanup,
  6898. .ipa_setup_iface = dp_ipa_setup_iface,
  6899. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6900. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6901. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6902. .ipa_set_perf_level = dp_ipa_set_perf_level
  6903. };
  6904. #endif
  6905. static struct cdp_bus_ops dp_ops_bus = {
  6906. .bus_suspend = dp_bus_suspend,
  6907. .bus_resume = dp_bus_resume
  6908. };
  6909. static struct cdp_ocb_ops dp_ops_ocb = {
  6910. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6911. };
  6912. static struct cdp_throttle_ops dp_ops_throttle = {
  6913. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6914. };
  6915. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6916. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6917. };
  6918. static struct cdp_cfg_ops dp_ops_cfg = {
  6919. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6920. };
  6921. /*
  6922. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6923. * @dev: physical device instance
  6924. * @peer_mac_addr: peer mac address
  6925. * @local_id: local id for the peer
  6926. * @debug_id: to track enum peer access
  6927. * Return: peer instance pointer
  6928. */
  6929. static inline void *
  6930. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6931. u8 *local_id,
  6932. enum peer_debug_id_type debug_id)
  6933. {
  6934. /*
  6935. * Currently this function does not implement the "get ref"
  6936. * functionality and is mapped to dp_find_peer_by_addr which does not
  6937. * increment the peer ref count. So the peer state is uncertain after
  6938. * calling this API. The functionality needs to be implemented.
  6939. * Accordingly the corresponding release_ref function is NULL.
  6940. */
  6941. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6942. }
  6943. static struct cdp_peer_ops dp_ops_peer = {
  6944. .register_peer = dp_register_peer,
  6945. .clear_peer = dp_clear_peer,
  6946. .find_peer_by_addr = dp_find_peer_by_addr,
  6947. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6948. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6949. .peer_release_ref = NULL,
  6950. .local_peer_id = dp_local_peer_id,
  6951. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6952. .peer_state_update = dp_peer_state_update,
  6953. .get_vdevid = dp_get_vdevid,
  6954. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6955. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6956. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6957. .get_peer_state = dp_get_peer_state,
  6958. .get_last_mgmt_timestamp = dp_get_last_mgmt_timestamp,
  6959. .update_last_mgmt_timestamp = dp_update_last_mgmt_timestamp,
  6960. };
  6961. #endif
  6962. static struct cdp_ops dp_txrx_ops = {
  6963. .cmn_drv_ops = &dp_ops_cmn,
  6964. .ctrl_ops = &dp_ops_ctrl,
  6965. .me_ops = &dp_ops_me,
  6966. .mon_ops = &dp_ops_mon,
  6967. .host_stats_ops = &dp_ops_host_stats,
  6968. .wds_ops = &dp_ops_wds,
  6969. .raw_ops = &dp_ops_raw,
  6970. #ifdef CONFIG_WIN
  6971. .pflow_ops = &dp_ops_pflow,
  6972. #endif /* CONFIG_WIN */
  6973. #ifndef CONFIG_WIN
  6974. .misc_ops = &dp_ops_misc,
  6975. .cfg_ops = &dp_ops_cfg,
  6976. .flowctl_ops = &dp_ops_flowctl,
  6977. .l_flowctl_ops = &dp_ops_l_flowctl,
  6978. #ifdef IPA_OFFLOAD
  6979. .ipa_ops = &dp_ops_ipa,
  6980. #endif
  6981. .bus_ops = &dp_ops_bus,
  6982. .ocb_ops = &dp_ops_ocb,
  6983. .peer_ops = &dp_ops_peer,
  6984. .throttle_ops = &dp_ops_throttle,
  6985. .mob_stats_ops = &dp_ops_mob_stats,
  6986. #endif
  6987. };
  6988. /*
  6989. * dp_soc_set_txrx_ring_map()
  6990. * @dp_soc: DP handler for soc
  6991. *
  6992. * Return: Void
  6993. */
  6994. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6995. {
  6996. uint32_t i;
  6997. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6998. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6999. }
  7000. }
  7001. #ifdef QCA_WIFI_QCA8074
  7002. /**
  7003. * dp_soc_attach_wifi3() - Attach txrx SOC
  7004. * @ctrl_psoc: Opaque SOC handle from control plane
  7005. * @htc_handle: Opaque HTC handle
  7006. * @hif_handle: Opaque HIF handle
  7007. * @qdf_osdev: QDF device
  7008. * @ol_ops: Offload Operations
  7009. * @device_id: Device ID
  7010. *
  7011. * Return: DP SOC handle on success, NULL on failure
  7012. */
  7013. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  7014. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  7015. struct ol_if_ops *ol_ops, uint16_t device_id)
  7016. {
  7017. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  7018. int target_type;
  7019. if (!soc) {
  7020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7021. FL("DP SOC memory allocation failed"));
  7022. goto fail0;
  7023. }
  7024. soc->device_id = device_id;
  7025. soc->cdp_soc.ops = &dp_txrx_ops;
  7026. soc->cdp_soc.ol_ops = ol_ops;
  7027. soc->ctrl_psoc = ctrl_psoc;
  7028. soc->osdev = qdf_osdev;
  7029. soc->hif_handle = hif_handle;
  7030. soc->hal_soc = hif_get_hal_handle(hif_handle);
  7031. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  7032. soc->hal_soc, qdf_osdev);
  7033. if (!soc->htt_handle) {
  7034. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7035. FL("HTT attach failed"));
  7036. goto fail1;
  7037. }
  7038. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  7039. if (!soc->wlan_cfg_ctx) {
  7040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7041. FL("wlan_cfg_soc_attach failed"));
  7042. goto fail2;
  7043. }
  7044. target_type = hal_get_target_type(soc->hal_soc);
  7045. switch (target_type) {
  7046. case TARGET_TYPE_QCA6290:
  7047. #ifdef QCA_WIFI_QCA6390
  7048. case TARGET_TYPE_QCA6390:
  7049. #endif
  7050. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  7051. REO_DST_RING_SIZE_QCA6290);
  7052. break;
  7053. case TARGET_TYPE_QCA8074:
  7054. case TARGET_TYPE_QCA8074V2:
  7055. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  7056. REO_DST_RING_SIZE_QCA8074);
  7057. break;
  7058. default:
  7059. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  7060. qdf_assert_always(0);
  7061. break;
  7062. }
  7063. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  7064. cfg_get(ctrl_psoc, CFG_DP_RX_HASH));
  7065. soc->cce_disable = false;
  7066. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  7067. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  7068. CDP_CFG_MAX_PEER_ID);
  7069. if (ret != -EINVAL) {
  7070. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  7071. }
  7072. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  7073. CDP_CFG_CCE_DISABLE);
  7074. if (ret == 1)
  7075. soc->cce_disable = true;
  7076. }
  7077. qdf_spinlock_create(&soc->peer_ref_mutex);
  7078. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  7079. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  7080. /* fill the tx/rx cpu ring map*/
  7081. dp_soc_set_txrx_ring_map(soc);
  7082. qdf_spinlock_create(&soc->htt_stats.lock);
  7083. /* initialize work queue for stats processing */
  7084. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  7085. /*Initialize inactivity timer for wifison */
  7086. dp_init_inact_timer(soc);
  7087. return (void *)soc;
  7088. fail2:
  7089. htt_soc_detach(soc->htt_handle);
  7090. fail1:
  7091. qdf_mem_free(soc);
  7092. fail0:
  7093. return NULL;
  7094. }
  7095. #endif
  7096. /*
  7097. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  7098. *
  7099. * @soc: handle to DP soc
  7100. * @mac_id: MAC id
  7101. *
  7102. * Return: Return pdev corresponding to MAC
  7103. */
  7104. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  7105. {
  7106. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  7107. return soc->pdev_list[mac_id];
  7108. /* Typically for MCL as there only 1 PDEV*/
  7109. return soc->pdev_list[0];
  7110. }
  7111. /*
  7112. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  7113. * @soc: DP SoC context
  7114. * @max_mac_rings: No of MAC rings
  7115. *
  7116. * Return: None
  7117. */
  7118. static
  7119. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  7120. int *max_mac_rings)
  7121. {
  7122. bool dbs_enable = false;
  7123. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  7124. dbs_enable = soc->cdp_soc.ol_ops->
  7125. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  7126. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  7127. }
  7128. /*
  7129. * dp_set_pktlog_wifi3() - attach txrx vdev
  7130. * @pdev: Datapath PDEV handle
  7131. * @event: which event's notifications are being subscribed to
  7132. * @enable: WDI event subscribe or not. (True or False)
  7133. *
  7134. * Return: Success, NULL on failure
  7135. */
  7136. #ifdef WDI_EVENT_ENABLE
  7137. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  7138. bool enable)
  7139. {
  7140. struct dp_soc *soc = pdev->soc;
  7141. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  7142. int max_mac_rings = wlan_cfg_get_num_mac_rings
  7143. (pdev->wlan_cfg_ctx);
  7144. uint8_t mac_id = 0;
  7145. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  7146. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  7147. FL("Max_mac_rings %d "),
  7148. max_mac_rings);
  7149. if (enable) {
  7150. switch (event) {
  7151. case WDI_EVENT_RX_DESC:
  7152. if (pdev->monitor_vdev) {
  7153. /* Nothing needs to be done if monitor mode is
  7154. * enabled
  7155. */
  7156. return 0;
  7157. }
  7158. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  7159. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  7160. htt_tlv_filter.mpdu_start = 1;
  7161. htt_tlv_filter.msdu_start = 1;
  7162. htt_tlv_filter.msdu_end = 1;
  7163. htt_tlv_filter.mpdu_end = 1;
  7164. htt_tlv_filter.packet_header = 1;
  7165. htt_tlv_filter.attention = 1;
  7166. htt_tlv_filter.ppdu_start = 1;
  7167. htt_tlv_filter.ppdu_end = 1;
  7168. htt_tlv_filter.ppdu_end_user_stats = 1;
  7169. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  7170. htt_tlv_filter.ppdu_end_status_done = 1;
  7171. htt_tlv_filter.enable_fp = 1;
  7172. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  7173. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  7174. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  7175. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  7176. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  7177. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  7178. for (mac_id = 0; mac_id < max_mac_rings;
  7179. mac_id++) {
  7180. int mac_for_pdev =
  7181. dp_get_mac_id_for_pdev(mac_id,
  7182. pdev->pdev_id);
  7183. htt_h2t_rx_ring_cfg(soc->htt_handle,
  7184. mac_for_pdev,
  7185. pdev->rxdma_mon_status_ring[mac_id]
  7186. .hal_srng,
  7187. RXDMA_MONITOR_STATUS,
  7188. RX_BUFFER_SIZE,
  7189. &htt_tlv_filter);
  7190. }
  7191. if (soc->reap_timer_init)
  7192. qdf_timer_mod(&soc->mon_reap_timer,
  7193. DP_INTR_POLL_TIMER_MS);
  7194. }
  7195. break;
  7196. case WDI_EVENT_LITE_RX:
  7197. if (pdev->monitor_vdev) {
  7198. /* Nothing needs to be done if monitor mode is
  7199. * enabled
  7200. */
  7201. return 0;
  7202. }
  7203. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  7204. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  7205. htt_tlv_filter.ppdu_start = 1;
  7206. htt_tlv_filter.ppdu_end = 1;
  7207. htt_tlv_filter.ppdu_end_user_stats = 1;
  7208. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  7209. htt_tlv_filter.ppdu_end_status_done = 1;
  7210. htt_tlv_filter.mpdu_start = 1;
  7211. htt_tlv_filter.enable_fp = 1;
  7212. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  7213. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  7214. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  7215. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  7216. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  7217. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  7218. for (mac_id = 0; mac_id < max_mac_rings;
  7219. mac_id++) {
  7220. int mac_for_pdev =
  7221. dp_get_mac_id_for_pdev(mac_id,
  7222. pdev->pdev_id);
  7223. htt_h2t_rx_ring_cfg(soc->htt_handle,
  7224. mac_for_pdev,
  7225. pdev->rxdma_mon_status_ring[mac_id]
  7226. .hal_srng,
  7227. RXDMA_MONITOR_STATUS,
  7228. RX_BUFFER_SIZE_PKTLOG_LITE,
  7229. &htt_tlv_filter);
  7230. }
  7231. if (soc->reap_timer_init)
  7232. qdf_timer_mod(&soc->mon_reap_timer,
  7233. DP_INTR_POLL_TIMER_MS);
  7234. }
  7235. break;
  7236. case WDI_EVENT_LITE_T2H:
  7237. if (pdev->monitor_vdev) {
  7238. /* Nothing needs to be done if monitor mode is
  7239. * enabled
  7240. */
  7241. return 0;
  7242. }
  7243. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  7244. int mac_for_pdev = dp_get_mac_id_for_pdev(
  7245. mac_id, pdev->pdev_id);
  7246. pdev->pktlog_ppdu_stats = true;
  7247. dp_h2t_cfg_stats_msg_send(pdev,
  7248. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  7249. mac_for_pdev);
  7250. }
  7251. break;
  7252. default:
  7253. /* Nothing needs to be done for other pktlog types */
  7254. break;
  7255. }
  7256. } else {
  7257. switch (event) {
  7258. case WDI_EVENT_RX_DESC:
  7259. case WDI_EVENT_LITE_RX:
  7260. if (pdev->monitor_vdev) {
  7261. /* Nothing needs to be done if monitor mode is
  7262. * enabled
  7263. */
  7264. return 0;
  7265. }
  7266. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  7267. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  7268. for (mac_id = 0; mac_id < max_mac_rings;
  7269. mac_id++) {
  7270. int mac_for_pdev =
  7271. dp_get_mac_id_for_pdev(mac_id,
  7272. pdev->pdev_id);
  7273. htt_h2t_rx_ring_cfg(soc->htt_handle,
  7274. mac_for_pdev,
  7275. pdev->rxdma_mon_status_ring[mac_id]
  7276. .hal_srng,
  7277. RXDMA_MONITOR_STATUS,
  7278. RX_BUFFER_SIZE,
  7279. &htt_tlv_filter);
  7280. }
  7281. if (soc->reap_timer_init)
  7282. qdf_timer_stop(&soc->mon_reap_timer);
  7283. }
  7284. break;
  7285. case WDI_EVENT_LITE_T2H:
  7286. if (pdev->monitor_vdev) {
  7287. /* Nothing needs to be done if monitor mode is
  7288. * enabled
  7289. */
  7290. return 0;
  7291. }
  7292. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  7293. * passing value 0. Once these macros will define in htt
  7294. * header file will use proper macros
  7295. */
  7296. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  7297. int mac_for_pdev =
  7298. dp_get_mac_id_for_pdev(mac_id,
  7299. pdev->pdev_id);
  7300. pdev->pktlog_ppdu_stats = false;
  7301. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  7302. dp_h2t_cfg_stats_msg_send(pdev, 0,
  7303. mac_for_pdev);
  7304. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  7305. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  7306. mac_for_pdev);
  7307. } else if (pdev->enhanced_stats_en) {
  7308. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  7309. mac_for_pdev);
  7310. }
  7311. }
  7312. break;
  7313. default:
  7314. /* Nothing needs to be done for other pktlog types */
  7315. break;
  7316. }
  7317. }
  7318. return 0;
  7319. }
  7320. #endif