qmi.c 92 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  28. #ifdef CONFIG_CNSS2_DEBUG
  29. #define QDSS_DEBUG_FILE_STR "debug_"
  30. #else
  31. #define QDSS_DEBUG_FILE_STR ""
  32. #endif
  33. #define HW_V1_NUMBER "v1"
  34. #define HW_V2_NUMBER "v2"
  35. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  36. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  37. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  38. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  39. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  40. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  41. #define DMS_QMI_MAX_MSG_LEN SZ_256
  42. #define MAX_SHADOW_REG_RESERVED 2
  43. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  44. MAX_SHADOW_REG_RESERVED)
  45. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  46. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  47. #ifdef CONFIG_CNSS2_DEBUG
  48. static bool ignore_qmi_failure;
  49. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  50. void cnss_ignore_qmi_failure(bool ignore)
  51. {
  52. ignore_qmi_failure = ignore;
  53. }
  54. #else
  55. #define CNSS_QMI_ASSERT() do { } while (0)
  56. void cnss_ignore_qmi_failure(bool ignore) { }
  57. #endif
  58. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  59. {
  60. switch (mode) {
  61. case CNSS_MISSION:
  62. return "MISSION";
  63. case CNSS_FTM:
  64. return "FTM";
  65. case CNSS_EPPING:
  66. return "EPPING";
  67. case CNSS_WALTEST:
  68. return "WALTEST";
  69. case CNSS_OFF:
  70. return "OFF";
  71. case CNSS_CCPM:
  72. return "CCPM";
  73. case CNSS_QVIT:
  74. return "QVIT";
  75. case CNSS_CALIBRATION:
  76. return "CALIBRATION";
  77. default:
  78. return "UNKNOWN";
  79. }
  80. };
  81. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  82. {
  83. struct wlfw_ind_register_req_msg_v01 *req;
  84. struct wlfw_ind_register_resp_msg_v01 *resp;
  85. struct qmi_txn txn;
  86. int ret = 0;
  87. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  88. plat_priv->driver_state);
  89. req = kzalloc(sizeof(*req), GFP_KERNEL);
  90. if (!req)
  91. return -ENOMEM;
  92. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  93. if (!resp) {
  94. kfree(req);
  95. return -ENOMEM;
  96. }
  97. req->client_id_valid = 1;
  98. req->client_id = WLFW_CLIENT_ID;
  99. req->request_mem_enable_valid = 1;
  100. req->request_mem_enable = 1;
  101. req->fw_mem_ready_enable_valid = 1;
  102. req->fw_mem_ready_enable = 1;
  103. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  104. req->fw_init_done_enable_valid = 1;
  105. req->fw_init_done_enable = 1;
  106. req->pin_connect_result_enable_valid = 1;
  107. req->pin_connect_result_enable = 1;
  108. req->cal_done_enable_valid = 1;
  109. req->cal_done_enable = 1;
  110. req->qdss_trace_req_mem_enable_valid = 1;
  111. req->qdss_trace_req_mem_enable = 1;
  112. req->qdss_trace_save_enable_valid = 1;
  113. req->qdss_trace_save_enable = 1;
  114. req->qdss_trace_free_enable_valid = 1;
  115. req->qdss_trace_free_enable = 1;
  116. req->respond_get_info_enable_valid = 1;
  117. req->respond_get_info_enable = 1;
  118. req->wfc_call_twt_config_enable_valid = 1;
  119. req->wfc_call_twt_config_enable = 1;
  120. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  121. wlfw_ind_register_resp_msg_v01_ei, resp);
  122. if (ret < 0) {
  123. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  124. ret);
  125. goto out;
  126. }
  127. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  128. QMI_WLFW_IND_REGISTER_REQ_V01,
  129. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  130. wlfw_ind_register_req_msg_v01_ei, req);
  131. if (ret < 0) {
  132. qmi_txn_cancel(&txn);
  133. cnss_pr_err("Failed to send indication register request, err: %d\n",
  134. ret);
  135. goto out;
  136. }
  137. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  138. if (ret < 0) {
  139. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  140. ret);
  141. goto out;
  142. }
  143. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  144. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  145. resp->resp.result, resp->resp.error);
  146. ret = -resp->resp.result;
  147. goto out;
  148. }
  149. if (resp->fw_status_valid) {
  150. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  151. ret = -EALREADY;
  152. goto qmi_registered;
  153. }
  154. }
  155. kfree(req);
  156. kfree(resp);
  157. return 0;
  158. out:
  159. CNSS_QMI_ASSERT();
  160. qmi_registered:
  161. kfree(req);
  162. kfree(resp);
  163. return ret;
  164. }
  165. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  166. struct wlfw_host_cap_req_msg_v01 *req)
  167. {
  168. if (plat_priv->device_id == KIWI_DEVICE_ID) {
  169. req->mlo_capable_valid = 1;
  170. req->mlo_capable = 1;
  171. req->mlo_chip_id_valid = 1;
  172. req->mlo_chip_id = 0;
  173. req->mlo_group_id_valid = 1;
  174. req->mlo_group_id = 0;
  175. req->max_mlo_peer_valid = 1;
  176. /* Max peer number generally won't change for the same device
  177. * but needs to be synced with host driver.
  178. */
  179. req->max_mlo_peer = 32;
  180. req->mlo_num_chips_valid = 1;
  181. req->mlo_num_chips = 1;
  182. req->mlo_chip_info_valid = 1;
  183. req->mlo_chip_info[0].chip_id = 0;
  184. req->mlo_chip_info[0].num_local_links = 2;
  185. req->mlo_chip_info[0].hw_link_id[0] = 0;
  186. req->mlo_chip_info[0].hw_link_id[1] = 1;
  187. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  188. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  189. }
  190. }
  191. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  192. {
  193. struct wlfw_host_cap_req_msg_v01 *req;
  194. struct wlfw_host_cap_resp_msg_v01 *resp;
  195. struct qmi_txn txn;
  196. int ret = 0;
  197. u64 iova_start = 0, iova_size = 0,
  198. iova_ipa_start = 0, iova_ipa_size = 0;
  199. u64 feature_list = 0;
  200. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  201. plat_priv->driver_state);
  202. req = kzalloc(sizeof(*req), GFP_KERNEL);
  203. if (!req)
  204. return -ENOMEM;
  205. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  206. if (!resp) {
  207. kfree(req);
  208. return -ENOMEM;
  209. }
  210. req->num_clients_valid = 1;
  211. req->num_clients = 1;
  212. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  213. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  214. if (req->wake_msi) {
  215. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  216. req->wake_msi_valid = 1;
  217. }
  218. req->bdf_support_valid = 1;
  219. req->bdf_support = 1;
  220. req->m3_support_valid = 1;
  221. req->m3_support = 1;
  222. req->m3_cache_support_valid = 1;
  223. req->m3_cache_support = 1;
  224. req->cal_done_valid = 1;
  225. req->cal_done = plat_priv->cal_done;
  226. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  227. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  228. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  229. &iova_ipa_size)) {
  230. req->ddr_range_valid = 1;
  231. req->ddr_range[0].start = iova_start;
  232. req->ddr_range[0].size = iova_size + iova_ipa_size;
  233. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  234. req->ddr_range[0].start, req->ddr_range[0].size);
  235. }
  236. req->host_build_type_valid = 1;
  237. req->host_build_type = cnss_get_host_build_type();
  238. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  239. ret = cnss_get_feature_list(plat_priv, &feature_list);
  240. if (!ret) {
  241. req->feature_list_valid = 1;
  242. req->feature_list = feature_list;
  243. cnss_pr_dbg("Sending feature list 0x%llx\n",
  244. req->feature_list);
  245. }
  246. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  247. wlfw_host_cap_resp_msg_v01_ei, resp);
  248. if (ret < 0) {
  249. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  250. ret);
  251. goto out;
  252. }
  253. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  254. QMI_WLFW_HOST_CAP_REQ_V01,
  255. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  256. wlfw_host_cap_req_msg_v01_ei, req);
  257. if (ret < 0) {
  258. qmi_txn_cancel(&txn);
  259. cnss_pr_err("Failed to send host capability request, err: %d\n",
  260. ret);
  261. goto out;
  262. }
  263. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  264. if (ret < 0) {
  265. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  266. ret);
  267. goto out;
  268. }
  269. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  270. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  271. resp->resp.result, resp->resp.error);
  272. ret = -resp->resp.result;
  273. goto out;
  274. }
  275. kfree(req);
  276. kfree(resp);
  277. return 0;
  278. out:
  279. CNSS_QMI_ASSERT();
  280. kfree(req);
  281. kfree(resp);
  282. return ret;
  283. }
  284. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  285. {
  286. struct wlfw_respond_mem_req_msg_v01 *req;
  287. struct wlfw_respond_mem_resp_msg_v01 *resp;
  288. struct qmi_txn txn;
  289. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  290. int ret = 0, i;
  291. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  292. plat_priv->driver_state);
  293. req = kzalloc(sizeof(*req), GFP_KERNEL);
  294. if (!req)
  295. return -ENOMEM;
  296. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  297. if (!resp) {
  298. kfree(req);
  299. return -ENOMEM;
  300. }
  301. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  302. for (i = 0; i < req->mem_seg_len; i++) {
  303. if (!fw_mem[i].pa || !fw_mem[i].size) {
  304. if (fw_mem[i].type == 0) {
  305. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  306. i);
  307. ret = -EINVAL;
  308. goto out;
  309. }
  310. cnss_pr_err("Memory for FW is not available for type: %u\n",
  311. fw_mem[i].type);
  312. ret = -ENOMEM;
  313. goto out;
  314. }
  315. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  316. fw_mem[i].va, &fw_mem[i].pa,
  317. fw_mem[i].size, fw_mem[i].type);
  318. req->mem_seg[i].addr = fw_mem[i].pa;
  319. req->mem_seg[i].size = fw_mem[i].size;
  320. req->mem_seg[i].type = fw_mem[i].type;
  321. }
  322. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  323. wlfw_respond_mem_resp_msg_v01_ei, resp);
  324. if (ret < 0) {
  325. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  326. ret);
  327. goto out;
  328. }
  329. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  330. QMI_WLFW_RESPOND_MEM_REQ_V01,
  331. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  332. wlfw_respond_mem_req_msg_v01_ei, req);
  333. if (ret < 0) {
  334. qmi_txn_cancel(&txn);
  335. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  336. ret);
  337. goto out;
  338. }
  339. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  340. if (ret < 0) {
  341. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  342. ret);
  343. goto out;
  344. }
  345. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  346. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  347. resp->resp.result, resp->resp.error);
  348. ret = -resp->resp.result;
  349. goto out;
  350. }
  351. kfree(req);
  352. kfree(resp);
  353. return 0;
  354. out:
  355. CNSS_QMI_ASSERT();
  356. kfree(req);
  357. kfree(resp);
  358. return ret;
  359. }
  360. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  361. {
  362. struct wlfw_cap_req_msg_v01 *req;
  363. struct wlfw_cap_resp_msg_v01 *resp;
  364. struct qmi_txn txn;
  365. char *fw_build_timestamp;
  366. int ret = 0, i;
  367. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  368. plat_priv->driver_state);
  369. req = kzalloc(sizeof(*req), GFP_KERNEL);
  370. if (!req)
  371. return -ENOMEM;
  372. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  373. if (!resp) {
  374. kfree(req);
  375. return -ENOMEM;
  376. }
  377. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  378. wlfw_cap_resp_msg_v01_ei, resp);
  379. if (ret < 0) {
  380. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  381. ret);
  382. goto out;
  383. }
  384. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  385. QMI_WLFW_CAP_REQ_V01,
  386. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  387. wlfw_cap_req_msg_v01_ei, req);
  388. if (ret < 0) {
  389. qmi_txn_cancel(&txn);
  390. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  391. ret);
  392. goto out;
  393. }
  394. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  395. if (ret < 0) {
  396. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  397. ret);
  398. goto out;
  399. }
  400. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  401. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  402. resp->resp.result, resp->resp.error);
  403. ret = -resp->resp.result;
  404. goto out;
  405. }
  406. if (resp->chip_info_valid) {
  407. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  408. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  409. }
  410. if (resp->board_info_valid)
  411. plat_priv->board_info.board_id = resp->board_info.board_id;
  412. else
  413. plat_priv->board_info.board_id = 0xFF;
  414. if (resp->soc_info_valid)
  415. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  416. if (resp->fw_version_info_valid) {
  417. plat_priv->fw_version_info.fw_version =
  418. resp->fw_version_info.fw_version;
  419. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  420. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  421. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  422. resp->fw_version_info.fw_build_timestamp,
  423. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  424. }
  425. if (resp->fw_build_id_valid) {
  426. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  427. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  428. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  429. }
  430. if (resp->voltage_mv_valid) {
  431. plat_priv->cpr_info.voltage = resp->voltage_mv;
  432. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  433. plat_priv->cpr_info.voltage);
  434. cnss_update_cpr_info(plat_priv);
  435. }
  436. if (resp->time_freq_hz_valid) {
  437. plat_priv->device_freq_hz = resp->time_freq_hz;
  438. cnss_pr_dbg("Device frequency is %d HZ\n",
  439. plat_priv->device_freq_hz);
  440. }
  441. if (resp->otp_version_valid)
  442. plat_priv->otp_version = resp->otp_version;
  443. if (resp->dev_mem_info_valid) {
  444. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  445. plat_priv->dev_mem_info[i].start =
  446. resp->dev_mem_info[i].start;
  447. plat_priv->dev_mem_info[i].size =
  448. resp->dev_mem_info[i].size;
  449. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  450. i, plat_priv->dev_mem_info[i].start,
  451. plat_priv->dev_mem_info[i].size);
  452. }
  453. }
  454. if (resp->fw_caps_valid)
  455. plat_priv->fw_pcie_gen_switch =
  456. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  457. if (resp->hang_data_length_valid &&
  458. resp->hang_data_length &&
  459. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  460. plat_priv->hang_event_data_len = resp->hang_data_length;
  461. else
  462. plat_priv->hang_event_data_len = 0;
  463. if (resp->hang_data_addr_offset_valid)
  464. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  465. else
  466. plat_priv->hang_data_addr_offset = 0;
  467. if (resp->ol_cpr_cfg_valid)
  468. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  469. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  470. plat_priv->chip_info.chip_id,
  471. plat_priv->chip_info.chip_family,
  472. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  473. plat_priv->otp_version);
  474. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s\n",
  475. plat_priv->fw_version_info.fw_version,
  476. plat_priv->fw_version_info.fw_build_timestamp,
  477. plat_priv->fw_build_id);
  478. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  479. plat_priv->hang_event_data_len,
  480. plat_priv->hang_data_addr_offset);
  481. kfree(req);
  482. kfree(resp);
  483. return 0;
  484. out:
  485. CNSS_QMI_ASSERT();
  486. kfree(req);
  487. kfree(resp);
  488. return ret;
  489. }
  490. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  491. u32 bdf_type, char *filename,
  492. u32 filename_len)
  493. {
  494. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  495. int ret = 0;
  496. switch (bdf_type) {
  497. case CNSS_BDF_ELF:
  498. /* Board ID will be equal or less than 0xFF in GF mask case */
  499. if (plat_priv->board_info.board_id == 0xFF) {
  500. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  501. snprintf(filename_tmp, filename_len,
  502. ELF_BDF_FILE_NAME_GF);
  503. else
  504. snprintf(filename_tmp, filename_len,
  505. ELF_BDF_FILE_NAME);
  506. } else if (plat_priv->board_info.board_id < 0xFF) {
  507. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  508. snprintf(filename_tmp, filename_len,
  509. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  510. plat_priv->board_info.board_id);
  511. else
  512. snprintf(filename_tmp, filename_len,
  513. ELF_BDF_FILE_NAME_PREFIX "%02x",
  514. plat_priv->board_info.board_id);
  515. } else {
  516. snprintf(filename_tmp, filename_len,
  517. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  518. plat_priv->board_info.board_id >> 8 & 0xFF,
  519. plat_priv->board_info.board_id & 0xFF);
  520. }
  521. break;
  522. case CNSS_BDF_BIN:
  523. if (plat_priv->board_info.board_id == 0xFF) {
  524. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  525. snprintf(filename_tmp, filename_len,
  526. BIN_BDF_FILE_NAME_GF);
  527. else
  528. snprintf(filename_tmp, filename_len,
  529. BIN_BDF_FILE_NAME);
  530. } else if (plat_priv->board_info.board_id < 0xFF) {
  531. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  532. snprintf(filename_tmp, filename_len,
  533. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  534. plat_priv->board_info.board_id);
  535. else
  536. snprintf(filename_tmp, filename_len,
  537. BIN_BDF_FILE_NAME_PREFIX "%02x",
  538. plat_priv->board_info.board_id);
  539. } else {
  540. snprintf(filename_tmp, filename_len,
  541. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  542. plat_priv->board_info.board_id >> 8 & 0xFF,
  543. plat_priv->board_info.board_id & 0xFF);
  544. }
  545. break;
  546. case CNSS_BDF_REGDB:
  547. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  548. break;
  549. case CNSS_BDF_HDS:
  550. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  551. break;
  552. default:
  553. cnss_pr_err("Invalid BDF type: %d\n",
  554. plat_priv->ctrl_params.bdf_type);
  555. ret = -EINVAL;
  556. break;
  557. }
  558. if (!ret)
  559. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  560. return ret;
  561. }
  562. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  563. u32 bdf_type)
  564. {
  565. struct wlfw_bdf_download_req_msg_v01 *req;
  566. struct wlfw_bdf_download_resp_msg_v01 *resp;
  567. struct qmi_txn txn;
  568. char filename[MAX_FIRMWARE_NAME_LEN];
  569. const struct firmware *fw_entry = NULL;
  570. const u8 *temp;
  571. unsigned int remaining;
  572. int ret = 0;
  573. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  574. plat_priv->driver_state, bdf_type);
  575. req = kzalloc(sizeof(*req), GFP_KERNEL);
  576. if (!req)
  577. return -ENOMEM;
  578. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  579. if (!resp) {
  580. kfree(req);
  581. return -ENOMEM;
  582. }
  583. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  584. filename, sizeof(filename));
  585. if (ret)
  586. goto err_req_fw;
  587. if (bdf_type == CNSS_BDF_REGDB)
  588. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  589. filename);
  590. else
  591. ret = firmware_request_nowarn(&fw_entry, filename,
  592. &plat_priv->plat_dev->dev);
  593. if (ret) {
  594. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  595. goto err_req_fw;
  596. }
  597. temp = fw_entry->data;
  598. remaining = fw_entry->size;
  599. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  600. while (remaining) {
  601. req->valid = 1;
  602. req->file_id_valid = 1;
  603. req->file_id = plat_priv->board_info.board_id;
  604. req->total_size_valid = 1;
  605. req->total_size = remaining;
  606. req->seg_id_valid = 1;
  607. req->data_valid = 1;
  608. req->end_valid = 1;
  609. req->bdf_type_valid = 1;
  610. req->bdf_type = bdf_type;
  611. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  612. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  613. } else {
  614. req->data_len = remaining;
  615. req->end = 1;
  616. }
  617. memcpy(req->data, temp, req->data_len);
  618. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  619. wlfw_bdf_download_resp_msg_v01_ei, resp);
  620. if (ret < 0) {
  621. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  622. ret);
  623. goto err_send;
  624. }
  625. ret = qmi_send_request
  626. (&plat_priv->qmi_wlfw, NULL, &txn,
  627. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  628. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  629. wlfw_bdf_download_req_msg_v01_ei, req);
  630. if (ret < 0) {
  631. qmi_txn_cancel(&txn);
  632. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  633. ret);
  634. goto err_send;
  635. }
  636. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  637. if (ret < 0) {
  638. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  639. ret);
  640. goto err_send;
  641. }
  642. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  643. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  644. resp->resp.result, resp->resp.error);
  645. ret = -resp->resp.result;
  646. goto err_send;
  647. }
  648. remaining -= req->data_len;
  649. temp += req->data_len;
  650. req->seg_id++;
  651. }
  652. release_firmware(fw_entry);
  653. if (resp->host_bdf_data_valid) {
  654. /* QCA6490 enable S3E regulator for IPA configuration only */
  655. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  656. cnss_enable_int_pow_amp_vreg(plat_priv);
  657. plat_priv->cbc_file_download =
  658. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  659. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  660. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  661. plat_priv->cbc_file_download);
  662. }
  663. kfree(req);
  664. kfree(resp);
  665. return 0;
  666. err_send:
  667. release_firmware(fw_entry);
  668. err_req_fw:
  669. if (!(bdf_type == CNSS_BDF_REGDB ||
  670. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  671. ret == -EAGAIN))
  672. CNSS_QMI_ASSERT();
  673. kfree(req);
  674. kfree(resp);
  675. return ret;
  676. }
  677. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  678. {
  679. struct wlfw_m3_info_req_msg_v01 *req;
  680. struct wlfw_m3_info_resp_msg_v01 *resp;
  681. struct qmi_txn txn;
  682. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  683. int ret = 0;
  684. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  685. plat_priv->driver_state);
  686. req = kzalloc(sizeof(*req), GFP_KERNEL);
  687. if (!req)
  688. return -ENOMEM;
  689. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  690. if (!resp) {
  691. kfree(req);
  692. return -ENOMEM;
  693. }
  694. if (!m3_mem->pa || !m3_mem->size) {
  695. cnss_pr_err("Memory for M3 is not available\n");
  696. ret = -ENOMEM;
  697. goto out;
  698. }
  699. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  700. m3_mem->va, &m3_mem->pa, m3_mem->size);
  701. req->addr = plat_priv->m3_mem.pa;
  702. req->size = plat_priv->m3_mem.size;
  703. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  704. wlfw_m3_info_resp_msg_v01_ei, resp);
  705. if (ret < 0) {
  706. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  707. ret);
  708. goto out;
  709. }
  710. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  711. QMI_WLFW_M3_INFO_REQ_V01,
  712. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  713. wlfw_m3_info_req_msg_v01_ei, req);
  714. if (ret < 0) {
  715. qmi_txn_cancel(&txn);
  716. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  717. ret);
  718. goto out;
  719. }
  720. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  721. if (ret < 0) {
  722. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  723. ret);
  724. goto out;
  725. }
  726. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  727. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  728. resp->resp.result, resp->resp.error);
  729. ret = -resp->resp.result;
  730. goto out;
  731. }
  732. kfree(req);
  733. kfree(resp);
  734. return 0;
  735. out:
  736. CNSS_QMI_ASSERT();
  737. kfree(req);
  738. kfree(resp);
  739. return ret;
  740. }
  741. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  742. u8 *mac, u32 mac_len)
  743. {
  744. struct wlfw_mac_addr_req_msg_v01 req;
  745. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  746. struct qmi_txn txn;
  747. int ret;
  748. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  749. return -EINVAL;
  750. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  751. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  752. if (ret < 0) {
  753. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  754. ret);
  755. ret = -EIO;
  756. goto out;
  757. }
  758. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  759. mac, plat_priv->driver_state);
  760. memcpy(req.mac_addr, mac, mac_len);
  761. req.mac_addr_valid = 1;
  762. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  763. QMI_WLFW_MAC_ADDR_REQ_V01,
  764. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  765. wlfw_mac_addr_req_msg_v01_ei, &req);
  766. if (ret < 0) {
  767. qmi_txn_cancel(&txn);
  768. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  769. ret = -EIO;
  770. goto out;
  771. }
  772. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  773. if (ret < 0) {
  774. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  775. ret);
  776. ret = -EIO;
  777. goto out;
  778. }
  779. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  780. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  781. resp.resp.result);
  782. ret = -resp.resp.result;
  783. }
  784. out:
  785. return ret;
  786. }
  787. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  788. u32 total_size)
  789. {
  790. int ret = 0;
  791. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  792. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  793. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  794. unsigned int remaining;
  795. struct qmi_txn txn;
  796. cnss_pr_dbg("%s\n", __func__);
  797. req = kzalloc(sizeof(*req), GFP_KERNEL);
  798. if (!req)
  799. return -ENOMEM;
  800. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  801. if (!resp) {
  802. kfree(req);
  803. return -ENOMEM;
  804. }
  805. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  806. if (!p_qdss_trace_data) {
  807. ret = ENOMEM;
  808. goto end;
  809. }
  810. remaining = total_size;
  811. p_qdss_trace_data_temp = p_qdss_trace_data;
  812. while (remaining && resp->end == 0) {
  813. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  814. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  815. if (ret < 0) {
  816. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  817. ret);
  818. goto fail;
  819. }
  820. ret = qmi_send_request
  821. (&plat_priv->qmi_wlfw, NULL, &txn,
  822. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  823. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  824. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  825. if (ret < 0) {
  826. qmi_txn_cancel(&txn);
  827. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  828. ret);
  829. goto fail;
  830. }
  831. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  832. if (ret < 0) {
  833. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  834. ret);
  835. goto fail;
  836. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  837. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  838. resp->resp.result, resp->resp.error);
  839. ret = -resp->resp.result;
  840. goto fail;
  841. } else {
  842. ret = 0;
  843. }
  844. cnss_pr_dbg("%s: response total size %d data len %d",
  845. __func__, resp->total_size, resp->data_len);
  846. if ((resp->total_size_valid == 1 &&
  847. resp->total_size == total_size) &&
  848. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  849. (resp->data_valid == 1 &&
  850. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  851. memcpy(p_qdss_trace_data_temp,
  852. resp->data, resp->data_len);
  853. } else {
  854. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  855. __func__,
  856. total_size, req->seg_id,
  857. resp->total_size_valid,
  858. resp->total_size,
  859. resp->seg_id_valid,
  860. resp->seg_id,
  861. resp->data_valid,
  862. resp->data_len);
  863. ret = -1;
  864. goto fail;
  865. }
  866. remaining -= resp->data_len;
  867. p_qdss_trace_data_temp += resp->data_len;
  868. req->seg_id++;
  869. }
  870. if (remaining == 0 && (resp->end_valid && resp->end)) {
  871. ret = cnss_genl_send_msg(p_qdss_trace_data,
  872. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  873. total_size);
  874. if (ret < 0) {
  875. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  876. ret);
  877. ret = -1;
  878. goto fail;
  879. }
  880. } else {
  881. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  882. __func__,
  883. remaining, resp->end_valid, resp->end);
  884. ret = -1;
  885. goto fail;
  886. }
  887. fail:
  888. kfree(p_qdss_trace_data);
  889. end:
  890. kfree(req);
  891. kfree(resp);
  892. return ret;
  893. }
  894. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  895. char *filename, u32 filename_len)
  896. {
  897. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  898. char *debug_str = QDSS_DEBUG_FILE_STR;
  899. if (plat_priv->device_id == KIWI_DEVICE_ID)
  900. debug_str = "";
  901. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  902. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  903. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  904. else
  905. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  906. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  907. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  908. }
  909. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  910. {
  911. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  912. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  913. struct qmi_txn txn;
  914. const struct firmware *fw_entry = NULL;
  915. const u8 *temp;
  916. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  917. unsigned int remaining;
  918. int ret = 0;
  919. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  920. plat_priv->driver_state);
  921. req = kzalloc(sizeof(*req), GFP_KERNEL);
  922. if (!req)
  923. return -ENOMEM;
  924. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  925. if (!resp) {
  926. kfree(req);
  927. return -ENOMEM;
  928. }
  929. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  930. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  931. qdss_cfg_filename);
  932. if (ret) {
  933. cnss_pr_dbg("Unable to load %s\n",
  934. qdss_cfg_filename);
  935. goto err_req_fw;
  936. }
  937. temp = fw_entry->data;
  938. remaining = fw_entry->size;
  939. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  940. qdss_cfg_filename, remaining);
  941. while (remaining) {
  942. req->total_size_valid = 1;
  943. req->total_size = remaining;
  944. req->seg_id_valid = 1;
  945. req->data_valid = 1;
  946. req->end_valid = 1;
  947. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  948. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  949. } else {
  950. req->data_len = remaining;
  951. req->end = 1;
  952. }
  953. memcpy(req->data, temp, req->data_len);
  954. ret = qmi_txn_init
  955. (&plat_priv->qmi_wlfw, &txn,
  956. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  957. resp);
  958. if (ret < 0) {
  959. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  960. ret);
  961. goto err_send;
  962. }
  963. ret = qmi_send_request
  964. (&plat_priv->qmi_wlfw, NULL, &txn,
  965. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  966. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  967. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  968. if (ret < 0) {
  969. qmi_txn_cancel(&txn);
  970. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  971. ret);
  972. goto err_send;
  973. }
  974. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  975. if (ret < 0) {
  976. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  977. ret);
  978. goto err_send;
  979. }
  980. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  981. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  982. resp->resp.result, resp->resp.error);
  983. ret = -resp->resp.result;
  984. goto err_send;
  985. }
  986. remaining -= req->data_len;
  987. temp += req->data_len;
  988. req->seg_id++;
  989. }
  990. release_firmware(fw_entry);
  991. kfree(req);
  992. kfree(resp);
  993. return 0;
  994. err_send:
  995. release_firmware(fw_entry);
  996. err_req_fw:
  997. kfree(req);
  998. kfree(resp);
  999. return ret;
  1000. }
  1001. static int wlfw_send_qdss_trace_mode_req
  1002. (struct cnss_plat_data *plat_priv,
  1003. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1004. unsigned long long option)
  1005. {
  1006. int rc = 0;
  1007. int tmp = 0;
  1008. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1009. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1010. struct qmi_txn txn;
  1011. if (!plat_priv)
  1012. return -ENODEV;
  1013. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1014. if (!req)
  1015. return -ENOMEM;
  1016. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1017. if (!resp) {
  1018. kfree(req);
  1019. return -ENOMEM;
  1020. }
  1021. req->mode_valid = 1;
  1022. req->mode = mode;
  1023. req->option_valid = 1;
  1024. req->option = option;
  1025. tmp = plat_priv->hw_trc_override;
  1026. req->hw_trc_disable_override_valid = 1;
  1027. req->hw_trc_disable_override =
  1028. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1029. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1030. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1031. __func__, mode, option, req->hw_trc_disable_override);
  1032. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1033. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1034. if (rc < 0) {
  1035. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1036. rc);
  1037. goto out;
  1038. }
  1039. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1040. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1041. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1042. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1043. if (rc < 0) {
  1044. qmi_txn_cancel(&txn);
  1045. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1046. goto out;
  1047. }
  1048. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1049. if (rc < 0) {
  1050. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1051. rc);
  1052. goto out;
  1053. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1054. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1055. resp->resp.result, resp->resp.error);
  1056. rc = -resp->resp.result;
  1057. goto out;
  1058. }
  1059. kfree(resp);
  1060. kfree(req);
  1061. return rc;
  1062. out:
  1063. kfree(resp);
  1064. kfree(req);
  1065. CNSS_QMI_ASSERT();
  1066. return rc;
  1067. }
  1068. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1069. {
  1070. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1071. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1072. }
  1073. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1074. {
  1075. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1076. option);
  1077. }
  1078. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1079. enum cnss_driver_mode mode)
  1080. {
  1081. struct wlfw_wlan_mode_req_msg_v01 *req;
  1082. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1083. struct qmi_txn txn;
  1084. int ret = 0;
  1085. if (!plat_priv)
  1086. return -ENODEV;
  1087. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1088. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1089. if (mode == CNSS_OFF &&
  1090. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1091. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1092. return 0;
  1093. }
  1094. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1095. if (!req)
  1096. return -ENOMEM;
  1097. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1098. if (!resp) {
  1099. kfree(req);
  1100. return -ENOMEM;
  1101. }
  1102. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1103. req->hw_debug_valid = 1;
  1104. req->hw_debug = 0;
  1105. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1106. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1107. if (ret < 0) {
  1108. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1109. cnss_qmi_mode_to_str(mode), mode, ret);
  1110. goto out;
  1111. }
  1112. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1113. QMI_WLFW_WLAN_MODE_REQ_V01,
  1114. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1115. wlfw_wlan_mode_req_msg_v01_ei, req);
  1116. if (ret < 0) {
  1117. qmi_txn_cancel(&txn);
  1118. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1119. cnss_qmi_mode_to_str(mode), mode, ret);
  1120. goto out;
  1121. }
  1122. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1123. if (ret < 0) {
  1124. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1125. cnss_qmi_mode_to_str(mode), mode, ret);
  1126. goto out;
  1127. }
  1128. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1129. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1130. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1131. resp->resp.error);
  1132. ret = -resp->resp.result;
  1133. goto out;
  1134. }
  1135. kfree(req);
  1136. kfree(resp);
  1137. return 0;
  1138. out:
  1139. if (mode == CNSS_OFF) {
  1140. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1141. ret = 0;
  1142. } else {
  1143. CNSS_QMI_ASSERT();
  1144. }
  1145. kfree(req);
  1146. kfree(resp);
  1147. return ret;
  1148. }
  1149. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1150. struct cnss_wlan_enable_cfg *config,
  1151. const char *host_version)
  1152. {
  1153. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1154. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1155. struct qmi_txn txn;
  1156. u32 i;
  1157. int ret = 0;
  1158. if (!plat_priv)
  1159. return -ENODEV;
  1160. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1161. plat_priv->driver_state);
  1162. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1163. if (!req)
  1164. return -ENOMEM;
  1165. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1166. if (!resp) {
  1167. kfree(req);
  1168. return -ENOMEM;
  1169. }
  1170. req->host_version_valid = 1;
  1171. strlcpy(req->host_version, host_version,
  1172. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1173. req->tgt_cfg_valid = 1;
  1174. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1175. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1176. else
  1177. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1178. for (i = 0; i < req->tgt_cfg_len; i++) {
  1179. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1180. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1181. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1182. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1183. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1184. }
  1185. req->svc_cfg_valid = 1;
  1186. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1187. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1188. else
  1189. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1190. for (i = 0; i < req->svc_cfg_len; i++) {
  1191. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1192. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1193. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1194. }
  1195. if (plat_priv->device_id != KIWI_DEVICE_ID) {
  1196. req->shadow_reg_v2_valid = 1;
  1197. if (config->num_shadow_reg_v2_cfg >
  1198. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1199. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1200. else
  1201. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1202. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1203. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1204. * req->shadow_reg_v2_len);
  1205. } else {
  1206. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1207. config->num_shadow_reg_v3_cfg);
  1208. req->shadow_reg_v3_valid = 1;
  1209. if (config->num_shadow_reg_v3_cfg >
  1210. MAX_NUM_SHADOW_REG_V3)
  1211. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1212. else
  1213. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1214. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1215. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1216. * req->shadow_reg_v3_len);
  1217. }
  1218. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1219. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1220. if (ret < 0) {
  1221. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1222. ret);
  1223. goto out;
  1224. }
  1225. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1226. QMI_WLFW_WLAN_CFG_REQ_V01,
  1227. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1228. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1229. if (ret < 0) {
  1230. qmi_txn_cancel(&txn);
  1231. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1232. ret);
  1233. goto out;
  1234. }
  1235. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1236. if (ret < 0) {
  1237. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1238. ret);
  1239. goto out;
  1240. }
  1241. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1242. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1243. resp->resp.result, resp->resp.error);
  1244. ret = -resp->resp.result;
  1245. goto out;
  1246. }
  1247. kfree(req);
  1248. kfree(resp);
  1249. return 0;
  1250. out:
  1251. CNSS_QMI_ASSERT();
  1252. kfree(req);
  1253. kfree(resp);
  1254. return ret;
  1255. }
  1256. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1257. u32 offset, u32 mem_type,
  1258. u32 data_len, u8 *data)
  1259. {
  1260. struct wlfw_athdiag_read_req_msg_v01 *req;
  1261. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1262. struct qmi_txn txn;
  1263. int ret = 0;
  1264. if (!plat_priv)
  1265. return -ENODEV;
  1266. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1267. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1268. data, data_len);
  1269. return -EINVAL;
  1270. }
  1271. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1272. plat_priv->driver_state, offset, mem_type, data_len);
  1273. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1274. if (!req)
  1275. return -ENOMEM;
  1276. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1277. if (!resp) {
  1278. kfree(req);
  1279. return -ENOMEM;
  1280. }
  1281. req->offset = offset;
  1282. req->mem_type = mem_type;
  1283. req->data_len = data_len;
  1284. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1285. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1286. if (ret < 0) {
  1287. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1288. ret);
  1289. goto out;
  1290. }
  1291. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1292. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1293. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1294. wlfw_athdiag_read_req_msg_v01_ei, req);
  1295. if (ret < 0) {
  1296. qmi_txn_cancel(&txn);
  1297. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1298. ret);
  1299. goto out;
  1300. }
  1301. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1302. if (ret < 0) {
  1303. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1304. ret);
  1305. goto out;
  1306. }
  1307. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1308. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1309. resp->resp.result, resp->resp.error);
  1310. ret = -resp->resp.result;
  1311. goto out;
  1312. }
  1313. if (!resp->data_valid || resp->data_len != data_len) {
  1314. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1315. resp->data_valid, resp->data_len);
  1316. ret = -EINVAL;
  1317. goto out;
  1318. }
  1319. memcpy(data, resp->data, resp->data_len);
  1320. kfree(req);
  1321. kfree(resp);
  1322. return 0;
  1323. out:
  1324. kfree(req);
  1325. kfree(resp);
  1326. return ret;
  1327. }
  1328. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1329. u32 offset, u32 mem_type,
  1330. u32 data_len, u8 *data)
  1331. {
  1332. struct wlfw_athdiag_write_req_msg_v01 *req;
  1333. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1334. struct qmi_txn txn;
  1335. int ret = 0;
  1336. if (!plat_priv)
  1337. return -ENODEV;
  1338. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1339. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1340. data, data_len);
  1341. return -EINVAL;
  1342. }
  1343. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1344. plat_priv->driver_state, offset, mem_type, data_len, data);
  1345. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1346. if (!req)
  1347. return -ENOMEM;
  1348. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1349. if (!resp) {
  1350. kfree(req);
  1351. return -ENOMEM;
  1352. }
  1353. req->offset = offset;
  1354. req->mem_type = mem_type;
  1355. req->data_len = data_len;
  1356. memcpy(req->data, data, data_len);
  1357. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1358. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1359. if (ret < 0) {
  1360. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1361. ret);
  1362. goto out;
  1363. }
  1364. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1365. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1366. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1367. wlfw_athdiag_write_req_msg_v01_ei, req);
  1368. if (ret < 0) {
  1369. qmi_txn_cancel(&txn);
  1370. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1371. ret);
  1372. goto out;
  1373. }
  1374. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1375. if (ret < 0) {
  1376. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1377. ret);
  1378. goto out;
  1379. }
  1380. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1381. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1382. resp->resp.result, resp->resp.error);
  1383. ret = -resp->resp.result;
  1384. goto out;
  1385. }
  1386. kfree(req);
  1387. kfree(resp);
  1388. return 0;
  1389. out:
  1390. kfree(req);
  1391. kfree(resp);
  1392. return ret;
  1393. }
  1394. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1395. u8 fw_log_mode)
  1396. {
  1397. struct wlfw_ini_req_msg_v01 *req;
  1398. struct wlfw_ini_resp_msg_v01 *resp;
  1399. struct qmi_txn txn;
  1400. int ret = 0;
  1401. if (!plat_priv)
  1402. return -ENODEV;
  1403. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1404. plat_priv->driver_state, fw_log_mode);
  1405. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1406. if (!req)
  1407. return -ENOMEM;
  1408. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1409. if (!resp) {
  1410. kfree(req);
  1411. return -ENOMEM;
  1412. }
  1413. req->enablefwlog_valid = 1;
  1414. req->enablefwlog = fw_log_mode;
  1415. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1416. wlfw_ini_resp_msg_v01_ei, resp);
  1417. if (ret < 0) {
  1418. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1419. fw_log_mode, ret);
  1420. goto out;
  1421. }
  1422. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1423. QMI_WLFW_INI_REQ_V01,
  1424. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1425. wlfw_ini_req_msg_v01_ei, req);
  1426. if (ret < 0) {
  1427. qmi_txn_cancel(&txn);
  1428. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1429. fw_log_mode, ret);
  1430. goto out;
  1431. }
  1432. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1433. if (ret < 0) {
  1434. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1435. fw_log_mode, ret);
  1436. goto out;
  1437. }
  1438. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1439. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1440. fw_log_mode, resp->resp.result, resp->resp.error);
  1441. ret = -resp->resp.result;
  1442. goto out;
  1443. }
  1444. kfree(req);
  1445. kfree(resp);
  1446. return 0;
  1447. out:
  1448. kfree(req);
  1449. kfree(resp);
  1450. return ret;
  1451. }
  1452. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1453. {
  1454. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1455. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1456. struct qmi_txn txn;
  1457. int ret = 0;
  1458. if (!plat_priv)
  1459. return -ENODEV;
  1460. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1461. !plat_priv->fw_pcie_gen_switch) {
  1462. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1463. return 0;
  1464. }
  1465. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1466. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1467. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1468. plat_priv->pcie_gen_speed;
  1469. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1470. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1471. if (ret < 0) {
  1472. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1473. ret);
  1474. goto out;
  1475. }
  1476. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1477. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1478. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1479. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1480. if (ret < 0) {
  1481. qmi_txn_cancel(&txn);
  1482. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1483. goto out;
  1484. }
  1485. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1486. if (ret < 0) {
  1487. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1488. ret);
  1489. goto out;
  1490. }
  1491. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1492. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1493. plat_priv->pcie_gen_speed, resp.resp.result,
  1494. resp.resp.error);
  1495. ret = -resp.resp.result;
  1496. }
  1497. out:
  1498. /* Reset PCIE Gen speed after one time use */
  1499. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1500. return ret;
  1501. }
  1502. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1503. {
  1504. struct wlfw_antenna_switch_req_msg_v01 *req;
  1505. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1506. struct qmi_txn txn;
  1507. int ret = 0;
  1508. if (!plat_priv)
  1509. return -ENODEV;
  1510. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1511. plat_priv->driver_state);
  1512. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1513. if (!req)
  1514. return -ENOMEM;
  1515. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1516. if (!resp) {
  1517. kfree(req);
  1518. return -ENOMEM;
  1519. }
  1520. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1521. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1522. if (ret < 0) {
  1523. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1524. ret);
  1525. goto out;
  1526. }
  1527. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1528. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1529. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1530. wlfw_antenna_switch_req_msg_v01_ei, req);
  1531. if (ret < 0) {
  1532. qmi_txn_cancel(&txn);
  1533. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1534. ret);
  1535. goto out;
  1536. }
  1537. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1538. if (ret < 0) {
  1539. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1540. ret);
  1541. goto out;
  1542. }
  1543. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1544. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1545. resp->resp.result, resp->resp.error);
  1546. ret = -resp->resp.result;
  1547. goto out;
  1548. }
  1549. if (resp->antenna_valid)
  1550. plat_priv->antenna = resp->antenna;
  1551. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1552. resp->antenna_valid, resp->antenna);
  1553. kfree(req);
  1554. kfree(resp);
  1555. return 0;
  1556. out:
  1557. kfree(req);
  1558. kfree(resp);
  1559. return ret;
  1560. }
  1561. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1562. {
  1563. struct wlfw_antenna_grant_req_msg_v01 *req;
  1564. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1565. struct qmi_txn txn;
  1566. int ret = 0;
  1567. if (!plat_priv)
  1568. return -ENODEV;
  1569. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1570. plat_priv->driver_state, plat_priv->grant);
  1571. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1572. if (!req)
  1573. return -ENOMEM;
  1574. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1575. if (!resp) {
  1576. kfree(req);
  1577. return -ENOMEM;
  1578. }
  1579. req->grant_valid = 1;
  1580. req->grant = plat_priv->grant;
  1581. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1582. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1583. if (ret < 0) {
  1584. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1585. ret);
  1586. goto out;
  1587. }
  1588. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1589. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1590. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1591. wlfw_antenna_grant_req_msg_v01_ei, req);
  1592. if (ret < 0) {
  1593. qmi_txn_cancel(&txn);
  1594. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1595. ret);
  1596. goto out;
  1597. }
  1598. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1599. if (ret < 0) {
  1600. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1601. ret);
  1602. goto out;
  1603. }
  1604. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1605. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1606. resp->resp.result, resp->resp.error);
  1607. ret = -resp->resp.result;
  1608. goto out;
  1609. }
  1610. kfree(req);
  1611. kfree(resp);
  1612. return 0;
  1613. out:
  1614. kfree(req);
  1615. kfree(resp);
  1616. return ret;
  1617. }
  1618. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1619. {
  1620. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1621. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1622. struct qmi_txn txn;
  1623. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1624. int ret = 0;
  1625. int i;
  1626. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1627. plat_priv->driver_state);
  1628. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1629. if (!req)
  1630. return -ENOMEM;
  1631. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1632. if (!resp) {
  1633. kfree(req);
  1634. return -ENOMEM;
  1635. }
  1636. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1637. for (i = 0; i < req->mem_seg_len; i++) {
  1638. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1639. qdss_mem[i].va, &qdss_mem[i].pa,
  1640. qdss_mem[i].size, qdss_mem[i].type);
  1641. req->mem_seg[i].addr = qdss_mem[i].pa;
  1642. req->mem_seg[i].size = qdss_mem[i].size;
  1643. req->mem_seg[i].type = qdss_mem[i].type;
  1644. }
  1645. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1646. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1647. if (ret < 0) {
  1648. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1649. ret);
  1650. goto out;
  1651. }
  1652. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1653. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1654. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1655. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1656. if (ret < 0) {
  1657. qmi_txn_cancel(&txn);
  1658. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1659. ret);
  1660. goto out;
  1661. }
  1662. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1663. if (ret < 0) {
  1664. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1665. ret);
  1666. goto out;
  1667. }
  1668. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1669. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1670. resp->resp.result, resp->resp.error);
  1671. ret = -resp->resp.result;
  1672. goto out;
  1673. }
  1674. kfree(req);
  1675. kfree(resp);
  1676. return 0;
  1677. out:
  1678. kfree(req);
  1679. kfree(resp);
  1680. return ret;
  1681. }
  1682. static int cnss_wlfw_wfc_call_status_send_sync
  1683. (struct cnss_plat_data *plat_priv,
  1684. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1685. {
  1686. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1687. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1688. struct qmi_txn txn;
  1689. int ret = 0;
  1690. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1691. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1692. return -EINVAL;
  1693. }
  1694. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1695. if (!req)
  1696. return -ENOMEM;
  1697. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1698. if (!resp) {
  1699. kfree(req);
  1700. return -ENOMEM;
  1701. }
  1702. /**
  1703. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1704. * But in r2 update QMI structure is expanded and as an effect qmi
  1705. * decoded structures have padding. Thus we cannot use buffer design.
  1706. * For backward compatibility for r1 design copy only wfc_call_active
  1707. * value in hex buffer.
  1708. */
  1709. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1710. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1711. /* wfc_call_active is mandatory in IMS indication */
  1712. req->wfc_call_active_valid = 1;
  1713. req->wfc_call_active = ind_msg->wfc_call_active;
  1714. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1715. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1716. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1717. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1718. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1719. req->twt_ims_start = ind_msg->twt_ims_start;
  1720. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1721. req->twt_ims_int = ind_msg->twt_ims_int;
  1722. req->media_quality_valid = ind_msg->media_quality_valid;
  1723. req->media_quality =
  1724. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1725. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1726. plat_priv->driver_state);
  1727. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1728. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1729. if (ret < 0) {
  1730. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1731. ret);
  1732. goto out;
  1733. }
  1734. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1735. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1736. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1737. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1738. if (ret < 0) {
  1739. qmi_txn_cancel(&txn);
  1740. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1741. ret);
  1742. goto out;
  1743. }
  1744. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1745. if (ret < 0) {
  1746. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1747. ret);
  1748. goto out;
  1749. }
  1750. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1751. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1752. resp->resp.result, resp->resp.error);
  1753. ret = -resp->resp.result;
  1754. goto out;
  1755. }
  1756. ret = 0;
  1757. out:
  1758. kfree(req);
  1759. kfree(resp);
  1760. return ret;
  1761. }
  1762. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1763. {
  1764. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1765. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1766. struct qmi_txn txn;
  1767. int ret = 0;
  1768. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1769. plat_priv->dynamic_feature,
  1770. plat_priv->driver_state);
  1771. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1772. if (!req)
  1773. return -ENOMEM;
  1774. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1775. if (!resp) {
  1776. kfree(req);
  1777. return -ENOMEM;
  1778. }
  1779. req->mask_valid = 1;
  1780. req->mask = plat_priv->dynamic_feature;
  1781. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1782. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1783. if (ret < 0) {
  1784. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1785. ret);
  1786. goto out;
  1787. }
  1788. ret = qmi_send_request
  1789. (&plat_priv->qmi_wlfw, NULL, &txn,
  1790. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1791. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1792. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1793. if (ret < 0) {
  1794. qmi_txn_cancel(&txn);
  1795. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1796. ret);
  1797. goto out;
  1798. }
  1799. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1800. if (ret < 0) {
  1801. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1802. ret);
  1803. goto out;
  1804. }
  1805. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1806. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1807. resp->resp.result, resp->resp.error);
  1808. ret = -resp->resp.result;
  1809. goto out;
  1810. }
  1811. out:
  1812. kfree(req);
  1813. kfree(resp);
  1814. return ret;
  1815. }
  1816. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1817. void *cmd, int cmd_len)
  1818. {
  1819. struct wlfw_get_info_req_msg_v01 *req;
  1820. struct wlfw_get_info_resp_msg_v01 *resp;
  1821. struct qmi_txn txn;
  1822. int ret = 0;
  1823. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1824. type, cmd_len, plat_priv->driver_state);
  1825. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1826. return -EINVAL;
  1827. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1828. if (!req)
  1829. return -ENOMEM;
  1830. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1831. if (!resp) {
  1832. kfree(req);
  1833. return -ENOMEM;
  1834. }
  1835. req->type = type;
  1836. req->data_len = cmd_len;
  1837. memcpy(req->data, cmd, req->data_len);
  1838. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1839. wlfw_get_info_resp_msg_v01_ei, resp);
  1840. if (ret < 0) {
  1841. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  1842. ret);
  1843. goto out;
  1844. }
  1845. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1846. QMI_WLFW_GET_INFO_REQ_V01,
  1847. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1848. wlfw_get_info_req_msg_v01_ei, req);
  1849. if (ret < 0) {
  1850. qmi_txn_cancel(&txn);
  1851. cnss_pr_err("Failed to send get info request, err: %d\n",
  1852. ret);
  1853. goto out;
  1854. }
  1855. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1856. if (ret < 0) {
  1857. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  1858. ret);
  1859. goto out;
  1860. }
  1861. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1862. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  1863. resp->resp.result, resp->resp.error);
  1864. ret = -resp->resp.result;
  1865. goto out;
  1866. }
  1867. kfree(req);
  1868. kfree(resp);
  1869. return 0;
  1870. out:
  1871. kfree(req);
  1872. kfree(resp);
  1873. return ret;
  1874. }
  1875. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  1876. {
  1877. return QMI_WLFW_TIMEOUT_MS;
  1878. }
  1879. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  1880. struct sockaddr_qrtr *sq,
  1881. struct qmi_txn *txn, const void *data)
  1882. {
  1883. struct cnss_plat_data *plat_priv =
  1884. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1885. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  1886. int i;
  1887. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  1888. if (!txn) {
  1889. cnss_pr_err("Spurious indication\n");
  1890. return;
  1891. }
  1892. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  1893. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  1894. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  1895. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  1896. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  1897. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  1898. if (plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  1899. plat_priv->fw_mem[i].attrs |=
  1900. DMA_ATTR_FORCE_CONTIGUOUS;
  1901. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  1902. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  1903. }
  1904. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  1905. 0, NULL);
  1906. }
  1907. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1908. struct sockaddr_qrtr *sq,
  1909. struct qmi_txn *txn, const void *data)
  1910. {
  1911. struct cnss_plat_data *plat_priv =
  1912. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1913. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  1914. if (!txn) {
  1915. cnss_pr_err("Spurious indication\n");
  1916. return;
  1917. }
  1918. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  1919. 0, NULL);
  1920. }
  1921. /**
  1922. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  1923. *
  1924. * This event is not required for HST/ HSP as FW calibration done is
  1925. * provided in QMI_WLFW_CAL_DONE_IND_V01
  1926. */
  1927. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1928. struct sockaddr_qrtr *sq,
  1929. struct qmi_txn *txn, const void *data)
  1930. {
  1931. struct cnss_plat_data *plat_priv =
  1932. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1933. struct cnss_cal_info *cal_info;
  1934. if (!txn) {
  1935. cnss_pr_err("Spurious indication\n");
  1936. return;
  1937. }
  1938. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  1939. plat_priv->device_id == QCA6490_DEVICE_ID) {
  1940. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  1941. return;
  1942. }
  1943. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  1944. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  1945. if (!cal_info)
  1946. return;
  1947. cal_info->cal_status = CNSS_CAL_DONE;
  1948. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  1949. 0, cal_info);
  1950. }
  1951. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  1952. struct sockaddr_qrtr *sq,
  1953. struct qmi_txn *txn, const void *data)
  1954. {
  1955. struct cnss_plat_data *plat_priv =
  1956. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1957. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  1958. if (!txn) {
  1959. cnss_pr_err("Spurious indication\n");
  1960. return;
  1961. }
  1962. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  1963. }
  1964. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  1965. struct sockaddr_qrtr *sq,
  1966. struct qmi_txn *txn, const void *data)
  1967. {
  1968. struct cnss_plat_data *plat_priv =
  1969. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1970. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  1971. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  1972. if (!txn) {
  1973. cnss_pr_err("Spurious indication\n");
  1974. return;
  1975. }
  1976. if (ind_msg->pwr_pin_result_valid)
  1977. plat_priv->pin_result.fw_pwr_pin_result =
  1978. ind_msg->pwr_pin_result;
  1979. if (ind_msg->phy_io_pin_result_valid)
  1980. plat_priv->pin_result.fw_phy_io_pin_result =
  1981. ind_msg->phy_io_pin_result;
  1982. if (ind_msg->rf_pin_result_valid)
  1983. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  1984. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  1985. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  1986. ind_msg->rf_pin_result);
  1987. }
  1988. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  1989. u32 cal_file_download_size)
  1990. {
  1991. struct wlfw_cal_report_req_msg_v01 req = {0};
  1992. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  1993. struct qmi_txn txn;
  1994. int ret = 0;
  1995. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  1996. cal_file_download_size, plat_priv->driver_state);
  1997. req.cal_file_download_size_valid = 1;
  1998. req.cal_file_download_size = cal_file_download_size;
  1999. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2000. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2001. if (ret < 0) {
  2002. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2003. ret);
  2004. goto out;
  2005. }
  2006. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2007. QMI_WLFW_CAL_REPORT_REQ_V01,
  2008. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2009. wlfw_cal_report_req_msg_v01_ei, &req);
  2010. if (ret < 0) {
  2011. qmi_txn_cancel(&txn);
  2012. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2013. ret);
  2014. goto out;
  2015. }
  2016. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2017. if (ret < 0) {
  2018. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2019. ret);
  2020. goto out;
  2021. }
  2022. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2023. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2024. resp.resp.result, resp.resp.error);
  2025. ret = -resp.resp.result;
  2026. goto out;
  2027. }
  2028. out:
  2029. return ret;
  2030. }
  2031. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2032. struct sockaddr_qrtr *sq,
  2033. struct qmi_txn *txn, const void *data)
  2034. {
  2035. struct cnss_plat_data *plat_priv =
  2036. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2037. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2038. struct cnss_cal_info *cal_info;
  2039. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2040. ind->cal_file_upload_size);
  2041. cnss_pr_info("Calibration took %d ms\n",
  2042. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2043. if (!txn) {
  2044. cnss_pr_err("Spurious indication\n");
  2045. return;
  2046. }
  2047. if (ind->cal_file_upload_size_valid)
  2048. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2049. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2050. if (!cal_info)
  2051. return;
  2052. cal_info->cal_status = CNSS_CAL_DONE;
  2053. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2054. 0, cal_info);
  2055. }
  2056. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2057. struct sockaddr_qrtr *sq,
  2058. struct qmi_txn *txn,
  2059. const void *data)
  2060. {
  2061. struct cnss_plat_data *plat_priv =
  2062. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2063. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2064. int i;
  2065. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2066. if (!txn) {
  2067. cnss_pr_err("Spurious indication\n");
  2068. return;
  2069. }
  2070. if (plat_priv->qdss_mem_seg_len) {
  2071. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2072. plat_priv->qdss_mem_seg_len);
  2073. return;
  2074. }
  2075. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2076. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2077. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2078. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2079. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2080. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2081. }
  2082. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2083. 0, NULL);
  2084. }
  2085. /**
  2086. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2087. *
  2088. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2089. * fw memory segment for dumping to file system. Only one type of mem can be
  2090. * saved per indication and is provided in mem seg index 0.
  2091. *
  2092. * Return: None
  2093. */
  2094. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2095. struct sockaddr_qrtr *sq,
  2096. struct qmi_txn *txn,
  2097. const void *data)
  2098. {
  2099. struct cnss_plat_data *plat_priv =
  2100. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2101. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2102. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2103. int i = 0;
  2104. if (!txn || !data) {
  2105. cnss_pr_err("Spurious indication\n");
  2106. return;
  2107. }
  2108. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2109. ind_msg->source, ind_msg->mem_seg_valid,
  2110. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2111. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2112. if (!event_data)
  2113. return;
  2114. event_data->mem_type = ind_msg->mem_seg[0].type;
  2115. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2116. event_data->total_size = ind_msg->total_size;
  2117. if (ind_msg->mem_seg_valid) {
  2118. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2119. cnss_pr_err("Invalid seg len indication\n");
  2120. goto free_event_data;
  2121. }
  2122. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2123. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2124. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2125. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2126. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2127. goto free_event_data;
  2128. }
  2129. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2130. i, ind_msg->mem_seg[i].addr,
  2131. ind_msg->mem_seg[i].size);
  2132. }
  2133. }
  2134. if (ind_msg->file_name_valid)
  2135. strlcpy(event_data->file_name, ind_msg->file_name,
  2136. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2137. if (ind_msg->source == 1) {
  2138. if (!ind_msg->file_name_valid)
  2139. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2140. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2141. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2142. 0, event_data);
  2143. } else {
  2144. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2145. if (!ind_msg->file_name_valid)
  2146. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2147. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2148. } else {
  2149. if (!ind_msg->file_name_valid)
  2150. strlcpy(event_data->file_name, "fw_mem_dump",
  2151. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2152. }
  2153. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2154. 0, event_data);
  2155. }
  2156. return;
  2157. free_event_data:
  2158. kfree(event_data);
  2159. }
  2160. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2161. struct sockaddr_qrtr *sq,
  2162. struct qmi_txn *txn,
  2163. const void *data)
  2164. {
  2165. struct cnss_plat_data *plat_priv =
  2166. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2167. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2168. 0, NULL);
  2169. }
  2170. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2171. struct sockaddr_qrtr *sq,
  2172. struct qmi_txn *txn,
  2173. const void *data)
  2174. {
  2175. struct cnss_plat_data *plat_priv =
  2176. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2177. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2178. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2179. if (!txn) {
  2180. cnss_pr_err("Spurious indication\n");
  2181. return;
  2182. }
  2183. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2184. ind_msg->data_len, ind_msg->type,
  2185. ind_msg->is_last, ind_msg->seq_no);
  2186. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2187. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2188. (void *)ind_msg->data,
  2189. ind_msg->data_len);
  2190. }
  2191. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2192. (struct cnss_plat_data *plat_priv,
  2193. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2194. {
  2195. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2196. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2197. struct qmi_txn txn;
  2198. int ret = 0;
  2199. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2200. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2201. return -EINVAL;
  2202. }
  2203. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2204. if (!req)
  2205. return -ENOMEM;
  2206. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2207. if (!resp) {
  2208. kfree(req);
  2209. return -ENOMEM;
  2210. }
  2211. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2212. req->twt_sta_start = ind_msg->twt_sta_start;
  2213. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2214. req->twt_sta_int = ind_msg->twt_sta_int;
  2215. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2216. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2217. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2218. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2219. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2220. req->twt_sta_dl = req->twt_sta_dl;
  2221. req->twt_sta_config_changed_valid =
  2222. ind_msg->twt_sta_config_changed_valid;
  2223. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2224. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2225. plat_priv->driver_state);
  2226. ret =
  2227. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2228. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2229. resp);
  2230. if (ret < 0) {
  2231. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2232. ret);
  2233. goto out;
  2234. }
  2235. ret =
  2236. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2237. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2238. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2239. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2240. if (ret < 0) {
  2241. qmi_txn_cancel(&txn);
  2242. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2243. goto out;
  2244. }
  2245. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2246. if (ret < 0) {
  2247. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2248. goto out;
  2249. }
  2250. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2251. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2252. resp->resp.result, resp->resp.error);
  2253. ret = -resp->resp.result;
  2254. goto out;
  2255. }
  2256. ret = 0;
  2257. out:
  2258. kfree(req);
  2259. kfree(resp);
  2260. return ret;
  2261. }
  2262. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2263. void *data)
  2264. {
  2265. int ret;
  2266. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2267. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2268. kfree(data);
  2269. return ret;
  2270. }
  2271. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2272. struct sockaddr_qrtr *sq,
  2273. struct qmi_txn *txn,
  2274. const void *data)
  2275. {
  2276. struct cnss_plat_data *plat_priv =
  2277. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2278. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2279. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2280. if (!txn) {
  2281. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2282. return;
  2283. }
  2284. if (!ind_msg) {
  2285. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2286. return;
  2287. }
  2288. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2289. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2290. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2291. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2292. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2293. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2294. ind_msg->twt_sta_config_changed_valid,
  2295. ind_msg->twt_sta_config_changed);
  2296. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2297. if (!event_data)
  2298. return;
  2299. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2300. event_data);
  2301. }
  2302. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2303. {
  2304. .type = QMI_INDICATION,
  2305. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2306. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2307. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2308. .fn = cnss_wlfw_request_mem_ind_cb
  2309. },
  2310. {
  2311. .type = QMI_INDICATION,
  2312. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2313. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2314. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2315. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2316. },
  2317. {
  2318. .type = QMI_INDICATION,
  2319. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2320. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2321. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2322. .fn = cnss_wlfw_fw_ready_ind_cb
  2323. },
  2324. {
  2325. .type = QMI_INDICATION,
  2326. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2327. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2328. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2329. .fn = cnss_wlfw_fw_init_done_ind_cb
  2330. },
  2331. {
  2332. .type = QMI_INDICATION,
  2333. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2334. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2335. .decoded_size =
  2336. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2337. .fn = cnss_wlfw_pin_result_ind_cb
  2338. },
  2339. {
  2340. .type = QMI_INDICATION,
  2341. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2342. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2343. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2344. .fn = cnss_wlfw_cal_done_ind_cb
  2345. },
  2346. {
  2347. .type = QMI_INDICATION,
  2348. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2349. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2350. .decoded_size =
  2351. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2352. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2353. },
  2354. {
  2355. .type = QMI_INDICATION,
  2356. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2357. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2358. .decoded_size =
  2359. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2360. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2361. },
  2362. {
  2363. .type = QMI_INDICATION,
  2364. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2365. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2366. .decoded_size =
  2367. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2368. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2369. },
  2370. {
  2371. .type = QMI_INDICATION,
  2372. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2373. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2374. .decoded_size =
  2375. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2376. .fn = cnss_wlfw_respond_get_info_ind_cb
  2377. },
  2378. {
  2379. .type = QMI_INDICATION,
  2380. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2381. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2382. .decoded_size =
  2383. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2384. .fn = cnss_wlfw_process_twt_cfg_ind
  2385. },
  2386. {}
  2387. };
  2388. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2389. void *data)
  2390. {
  2391. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2392. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2393. struct sockaddr_qrtr sq = { 0 };
  2394. int ret = 0;
  2395. if (!event_data)
  2396. return -EINVAL;
  2397. sq.sq_family = AF_QIPCRTR;
  2398. sq.sq_node = event_data->node;
  2399. sq.sq_port = event_data->port;
  2400. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2401. sizeof(sq), 0);
  2402. if (ret < 0) {
  2403. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2404. goto out;
  2405. }
  2406. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2407. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2408. plat_priv->driver_state);
  2409. kfree(data);
  2410. return 0;
  2411. out:
  2412. CNSS_QMI_ASSERT();
  2413. kfree(data);
  2414. return ret;
  2415. }
  2416. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2417. {
  2418. int ret = 0;
  2419. if (!plat_priv)
  2420. return -ENODEV;
  2421. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2422. cnss_pr_err("Unexpected WLFW server arrive\n");
  2423. CNSS_ASSERT(0);
  2424. return -EINVAL;
  2425. }
  2426. cnss_ignore_qmi_failure(false);
  2427. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2428. if (ret < 0)
  2429. goto out;
  2430. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2431. if (ret < 0) {
  2432. if (ret == -EALREADY)
  2433. ret = 0;
  2434. goto out;
  2435. }
  2436. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2437. if (ret < 0)
  2438. goto out;
  2439. return 0;
  2440. out:
  2441. return ret;
  2442. }
  2443. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2444. {
  2445. int ret;
  2446. if (!plat_priv)
  2447. return -ENODEV;
  2448. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2449. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2450. plat_priv->driver_state);
  2451. cnss_qmi_deinit(plat_priv);
  2452. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2453. ret = cnss_qmi_init(plat_priv);
  2454. if (ret < 0) {
  2455. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2456. CNSS_ASSERT(0);
  2457. }
  2458. return 0;
  2459. }
  2460. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2461. struct qmi_service *service)
  2462. {
  2463. struct cnss_plat_data *plat_priv =
  2464. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2465. struct cnss_qmi_event_server_arrive_data *event_data;
  2466. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2467. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2468. plat_priv->driver_state);
  2469. return 0;
  2470. }
  2471. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2472. service->node, service->port);
  2473. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2474. if (!event_data)
  2475. return -ENOMEM;
  2476. event_data->node = service->node;
  2477. event_data->port = service->port;
  2478. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2479. 0, event_data);
  2480. return 0;
  2481. }
  2482. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2483. struct qmi_service *service)
  2484. {
  2485. struct cnss_plat_data *plat_priv =
  2486. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2487. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2488. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2489. plat_priv->driver_state);
  2490. return;
  2491. }
  2492. cnss_pr_dbg("WLFW server exiting\n");
  2493. if (plat_priv) {
  2494. cnss_ignore_qmi_failure(true);
  2495. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2496. }
  2497. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2498. 0, NULL);
  2499. }
  2500. static struct qmi_ops qmi_wlfw_ops = {
  2501. .new_server = wlfw_new_server,
  2502. .del_server = wlfw_del_server,
  2503. };
  2504. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2505. {
  2506. int ret = 0;
  2507. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2508. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2509. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2510. if (ret < 0) {
  2511. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2512. ret);
  2513. goto out;
  2514. }
  2515. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2516. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2517. if (ret < 0)
  2518. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2519. out:
  2520. return ret;
  2521. }
  2522. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2523. {
  2524. qmi_handle_release(&plat_priv->qmi_wlfw);
  2525. }
  2526. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2527. {
  2528. struct dms_get_mac_address_req_msg_v01 req;
  2529. struct dms_get_mac_address_resp_msg_v01 resp;
  2530. struct qmi_txn txn;
  2531. int ret = 0;
  2532. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2533. cnss_pr_err("DMS QMI connection not established\n");
  2534. return -EINVAL;
  2535. }
  2536. cnss_pr_dbg("Requesting DMS MAC address");
  2537. memset(&resp, 0, sizeof(resp));
  2538. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2539. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2540. if (ret < 0) {
  2541. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2542. ret);
  2543. goto out;
  2544. }
  2545. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2546. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2547. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2548. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2549. dms_get_mac_address_req_msg_v01_ei, &req);
  2550. if (ret < 0) {
  2551. qmi_txn_cancel(&txn);
  2552. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2553. ret);
  2554. goto out;
  2555. }
  2556. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2557. if (ret < 0) {
  2558. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2559. ret);
  2560. goto out;
  2561. }
  2562. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2563. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2564. resp.resp.result, resp.resp.error);
  2565. ret = -resp.resp.result;
  2566. goto out;
  2567. }
  2568. if (!resp.mac_address_valid ||
  2569. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2570. cnss_pr_err("Invalid MAC address received from DMS\n");
  2571. plat_priv->dms.mac_valid = false;
  2572. goto out;
  2573. }
  2574. plat_priv->dms.mac_valid = true;
  2575. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2576. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2577. out:
  2578. return ret;
  2579. }
  2580. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2581. unsigned int node, unsigned int port)
  2582. {
  2583. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2584. struct sockaddr_qrtr sq = {0};
  2585. int ret = 0;
  2586. sq.sq_family = AF_QIPCRTR;
  2587. sq.sq_node = node;
  2588. sq.sq_port = port;
  2589. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2590. sizeof(sq), 0);
  2591. if (ret < 0) {
  2592. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2593. node, port);
  2594. goto out;
  2595. }
  2596. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2597. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2598. plat_priv->driver_state);
  2599. out:
  2600. return ret;
  2601. }
  2602. static int dms_new_server(struct qmi_handle *qmi_dms,
  2603. struct qmi_service *service)
  2604. {
  2605. struct cnss_plat_data *plat_priv =
  2606. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2607. if (!service)
  2608. return -EINVAL;
  2609. return cnss_dms_connect_to_server(plat_priv, service->node,
  2610. service->port);
  2611. }
  2612. static void dms_del_server(struct qmi_handle *qmi_dms,
  2613. struct qmi_service *service)
  2614. {
  2615. struct cnss_plat_data *plat_priv =
  2616. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2617. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2618. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2619. plat_priv->driver_state);
  2620. }
  2621. static struct qmi_ops qmi_dms_ops = {
  2622. .new_server = dms_new_server,
  2623. .del_server = dms_del_server,
  2624. };
  2625. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2626. {
  2627. int ret = 0;
  2628. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2629. &qmi_dms_ops, NULL);
  2630. if (ret < 0) {
  2631. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2632. goto out;
  2633. }
  2634. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2635. DMS_SERVICE_VERS_V01, 0);
  2636. if (ret < 0)
  2637. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2638. out:
  2639. return ret;
  2640. }
  2641. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2642. {
  2643. qmi_handle_release(&plat_priv->qmi_dms);
  2644. }
  2645. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2646. {
  2647. int ret;
  2648. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2649. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2650. struct qmi_txn txn;
  2651. if (!plat_priv)
  2652. return -ENODEV;
  2653. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2654. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2655. if (!req)
  2656. return -ENOMEM;
  2657. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2658. if (!resp) {
  2659. kfree(req);
  2660. return -ENOMEM;
  2661. }
  2662. req->antenna = plat_priv->antenna;
  2663. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2664. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2665. if (ret < 0) {
  2666. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2667. ret);
  2668. goto out;
  2669. }
  2670. ret = qmi_send_request
  2671. (&plat_priv->coex_qmi, NULL, &txn,
  2672. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2673. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2674. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2675. if (ret < 0) {
  2676. qmi_txn_cancel(&txn);
  2677. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2678. ret);
  2679. goto out;
  2680. }
  2681. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2682. if (ret < 0) {
  2683. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2684. ret);
  2685. goto out;
  2686. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2687. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2688. resp->resp.result, resp->resp.error);
  2689. ret = -resp->resp.result;
  2690. goto out;
  2691. }
  2692. if (resp->grant_valid)
  2693. plat_priv->grant = resp->grant;
  2694. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2695. kfree(resp);
  2696. kfree(req);
  2697. return 0;
  2698. out:
  2699. kfree(resp);
  2700. kfree(req);
  2701. return ret;
  2702. }
  2703. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2704. {
  2705. int ret;
  2706. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2707. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2708. struct qmi_txn txn;
  2709. if (!plat_priv)
  2710. return -ENODEV;
  2711. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2712. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2713. if (!req)
  2714. return -ENOMEM;
  2715. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2716. if (!resp) {
  2717. kfree(req);
  2718. return -ENOMEM;
  2719. }
  2720. req->antenna = plat_priv->antenna;
  2721. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2722. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2723. if (ret < 0) {
  2724. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2725. ret);
  2726. goto out;
  2727. }
  2728. ret = qmi_send_request
  2729. (&plat_priv->coex_qmi, NULL, &txn,
  2730. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2731. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2732. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2733. if (ret < 0) {
  2734. qmi_txn_cancel(&txn);
  2735. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2736. ret);
  2737. goto out;
  2738. }
  2739. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2740. if (ret < 0) {
  2741. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2742. ret);
  2743. goto out;
  2744. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2745. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2746. resp->resp.result, resp->resp.error);
  2747. ret = -resp->resp.result;
  2748. goto out;
  2749. }
  2750. kfree(resp);
  2751. kfree(req);
  2752. return 0;
  2753. out:
  2754. kfree(resp);
  2755. kfree(req);
  2756. return ret;
  2757. }
  2758. static int coex_new_server(struct qmi_handle *qmi,
  2759. struct qmi_service *service)
  2760. {
  2761. struct cnss_plat_data *plat_priv =
  2762. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2763. struct sockaddr_qrtr sq = { 0 };
  2764. int ret = 0;
  2765. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2766. service->node, service->port);
  2767. sq.sq_family = AF_QIPCRTR;
  2768. sq.sq_node = service->node;
  2769. sq.sq_port = service->port;
  2770. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2771. if (ret < 0) {
  2772. cnss_pr_err("Fail to connect to remote service port\n");
  2773. return ret;
  2774. }
  2775. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2776. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2777. plat_priv->driver_state);
  2778. return 0;
  2779. }
  2780. static void coex_del_server(struct qmi_handle *qmi,
  2781. struct qmi_service *service)
  2782. {
  2783. struct cnss_plat_data *plat_priv =
  2784. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2785. cnss_pr_dbg("COEX server exit\n");
  2786. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2787. }
  2788. static struct qmi_ops coex_qmi_ops = {
  2789. .new_server = coex_new_server,
  2790. .del_server = coex_del_server,
  2791. };
  2792. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  2793. { int ret;
  2794. ret = qmi_handle_init(&plat_priv->coex_qmi,
  2795. COEX_SERVICE_MAX_MSG_LEN,
  2796. &coex_qmi_ops, NULL);
  2797. if (ret < 0)
  2798. return ret;
  2799. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  2800. COEX_SERVICE_VERS_V01, 0);
  2801. return ret;
  2802. }
  2803. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  2804. {
  2805. qmi_handle_release(&plat_priv->coex_qmi);
  2806. }
  2807. /* IMS Service */
  2808. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  2809. {
  2810. int ret;
  2811. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  2812. struct qmi_txn *txn;
  2813. if (!plat_priv)
  2814. return -ENODEV;
  2815. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  2816. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2817. if (!req)
  2818. return -ENOMEM;
  2819. req->wfc_call_status_valid = 1;
  2820. req->wfc_call_status = 1;
  2821. txn = &plat_priv->txn;
  2822. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  2823. if (ret < 0) {
  2824. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  2825. ret);
  2826. goto out;
  2827. }
  2828. ret = qmi_send_request
  2829. (&plat_priv->ims_qmi, NULL, txn,
  2830. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2831. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  2832. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  2833. if (ret < 0) {
  2834. qmi_txn_cancel(txn);
  2835. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  2836. ret);
  2837. goto out;
  2838. }
  2839. kfree(req);
  2840. return 0;
  2841. out:
  2842. kfree(req);
  2843. return ret;
  2844. }
  2845. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  2846. struct sockaddr_qrtr *sq,
  2847. struct qmi_txn *txn,
  2848. const void *data)
  2849. {
  2850. const
  2851. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  2852. data;
  2853. cnss_pr_dbg("Received IMS subscribe indication response\n");
  2854. if (!txn) {
  2855. cnss_pr_err("spurious response\n");
  2856. return;
  2857. }
  2858. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2859. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  2860. resp->resp.result, resp->resp.error);
  2861. txn->result = -resp->resp.result;
  2862. }
  2863. }
  2864. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  2865. void *data)
  2866. {
  2867. int ret;
  2868. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2869. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  2870. kfree(data);
  2871. return ret;
  2872. }
  2873. static void
  2874. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  2875. struct sockaddr_qrtr *sq,
  2876. struct qmi_txn *txn, const void *data)
  2877. {
  2878. struct cnss_plat_data *plat_priv =
  2879. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  2880. const
  2881. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2882. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  2883. if (!txn) {
  2884. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  2885. return;
  2886. }
  2887. if (!ind_msg) {
  2888. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  2889. return;
  2890. }
  2891. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  2892. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  2893. ind_msg->all_wfc_calls_held,
  2894. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  2895. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  2896. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  2897. ind_msg->media_quality_valid, ind_msg->media_quality);
  2898. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2899. if (!event_data)
  2900. return;
  2901. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  2902. 0, event_data);
  2903. }
  2904. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  2905. {
  2906. .type = QMI_RESPONSE,
  2907. .msg_id =
  2908. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2909. .ei =
  2910. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  2911. .decoded_size = sizeof(struct
  2912. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  2913. .fn = ims_subscribe_for_indication_resp_cb
  2914. },
  2915. {
  2916. .type = QMI_INDICATION,
  2917. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  2918. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  2919. .decoded_size =
  2920. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  2921. .fn = cnss_ims_process_wfc_call_ind_cb
  2922. },
  2923. {}
  2924. };
  2925. static int ims_new_server(struct qmi_handle *qmi,
  2926. struct qmi_service *service)
  2927. {
  2928. struct cnss_plat_data *plat_priv =
  2929. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2930. struct sockaddr_qrtr sq = { 0 };
  2931. int ret = 0;
  2932. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  2933. service->node, service->port);
  2934. sq.sq_family = AF_QIPCRTR;
  2935. sq.sq_node = service->node;
  2936. sq.sq_port = service->port;
  2937. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2938. if (ret < 0) {
  2939. cnss_pr_err("Fail to connect to remote service port\n");
  2940. return ret;
  2941. }
  2942. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  2943. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  2944. plat_priv->driver_state);
  2945. ret = ims_subscribe_for_indication_send_async(plat_priv);
  2946. return ret;
  2947. }
  2948. static void ims_del_server(struct qmi_handle *qmi,
  2949. struct qmi_service *service)
  2950. {
  2951. struct cnss_plat_data *plat_priv =
  2952. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2953. cnss_pr_dbg("IMS server exit\n");
  2954. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  2955. }
  2956. static struct qmi_ops ims_qmi_ops = {
  2957. .new_server = ims_new_server,
  2958. .del_server = ims_del_server,
  2959. };
  2960. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  2961. { int ret;
  2962. ret = qmi_handle_init(&plat_priv->ims_qmi,
  2963. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  2964. &ims_qmi_ops, qmi_ims_msg_handlers);
  2965. if (ret < 0)
  2966. return ret;
  2967. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  2968. IMSPRIVATE_SERVICE_VERS_V01, 0);
  2969. return ret;
  2970. }
  2971. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  2972. {
  2973. qmi_handle_release(&plat_priv->ims_qmi);
  2974. }