regmap-swr.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/device.h>
  7. #include <linux/slab.h>
  8. #include <linux/mutex.h>
  9. #include <linux/regmap.h>
  10. #include <linux/module.h>
  11. #include <linux/init.h>
  12. #include <soc/soundwire.h>
  13. #define ADDR_BYTES (2)
  14. #define ADDR_BYTES_4 (4)
  15. #define VAL_BYTES (1)
  16. #define PAD_BYTES (0)
  17. #define SCP1_ADDRESS_VAL_MASK (0x7f800000)
  18. #define SCP2_ADDRESS_VAL_MASK (0x007f8000)
  19. #define BIT_WIDTH_CHECK_MASK (0xffff0000)
  20. #define SCP1_ADDRESS_VAL_SHIFT (23)
  21. #define SCP2_ADDRESS_VAL_SHIFT (15)
  22. #define SCP1_ADDRESS (0X48)
  23. #define SCP2_ADDRESS (0X49)
  24. #define SDCA_READ_WRITE_BIT (0x8000)
  25. static DEFINE_MUTEX(swr_rw_lock);
  26. static int regmap_swr_reg_address_get(struct swr_device *swr,
  27. u16 *reg_addr, const void *reg, size_t reg_size)
  28. {
  29. u8 scp1_val = 0, scp2_val = 0;
  30. u32 temp = 0;
  31. int ret = 0;
  32. if (reg_size == ADDR_BYTES_4) {
  33. temp = (*(u32 *)reg) & SCP1_ADDRESS_VAL_MASK;
  34. scp1_val = temp >> SCP1_ADDRESS_VAL_SHIFT;
  35. temp = (*(u32 *)reg) & SCP2_ADDRESS_VAL_MASK;
  36. scp2_val = temp >> SCP2_ADDRESS_VAL_SHIFT;
  37. if (scp1_val || scp2_val) {
  38. if (scp1_val != swr->scp1_val) {
  39. ret = swr_write(swr, swr->dev_num, SCP1_ADDRESS, &scp1_val);
  40. if (ret < 0) {
  41. dev_err(&swr->dev, "%s: write reg scp1_address failed, err %d\n",
  42. __func__, ret);
  43. return ret;
  44. }
  45. swr->scp1_val = scp1_val;
  46. }
  47. if (scp2_val != swr->scp2_val) {
  48. ret = swr_write(swr, swr->dev_num, SCP2_ADDRESS, &scp2_val);
  49. if (ret < 0) {
  50. dev_err(&swr->dev, "%s: write reg scp2_address failed, err %d\n",
  51. __func__, ret);
  52. return ret;
  53. }
  54. swr->scp2_val = scp2_val;
  55. }
  56. *reg_addr = (*(u16 *)reg | SDCA_READ_WRITE_BIT);
  57. dev_dbg(&swr->dev, "%s: reg: 0x%x, scp1_val: 0x%x, scp2_val: 0x%x, reg_addr: 0x%x\n",
  58. __func__, *(u32 *)reg, scp1_val, scp2_val, *reg_addr);
  59. } else {
  60. *reg_addr = *(u16 *)reg;
  61. }
  62. } else {
  63. *reg_addr = *(u16 *)reg;
  64. }
  65. return ret;
  66. }
  67. static int regmap_swr_gather_write(void *context,
  68. const void *reg, size_t reg_size,
  69. const void *val, size_t val_len)
  70. {
  71. struct device *dev = context;
  72. struct swr_device *swr = to_swr_device(dev);
  73. struct regmap *map = dev_get_regmap(dev, NULL);
  74. int i, ret = 0;
  75. u16 reg_addr = 0;
  76. u8 *value;
  77. if (map == NULL) {
  78. dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
  79. return -EINVAL;
  80. }
  81. if (swr == NULL) {
  82. dev_err_ratelimited(dev, "%s: swr device is NULL\n", __func__);
  83. return -EINVAL;
  84. }
  85. if ((reg_size != ADDR_BYTES) && (reg_size != ADDR_BYTES_4)) {
  86. dev_err_ratelimited(dev, "%s: reg size %zd bytes not supported\n",
  87. __func__, reg_size);
  88. return -EINVAL;
  89. }
  90. mutex_lock(&swr_rw_lock);
  91. ret = regmap_swr_reg_address_get(swr, &reg_addr, reg, reg_size);
  92. if (ret < 0) {
  93. mutex_unlock(&swr_rw_lock);
  94. return ret;
  95. }
  96. /* val_len = VAL_BYTES * val_count */
  97. for (i = 0; i < (val_len / VAL_BYTES); i++) {
  98. value = (u8 *)val + (VAL_BYTES * i);
  99. ret = swr_write(swr, swr->dev_num, (reg_addr + i), value);
  100. if (ret < 0) {
  101. dev_err_ratelimited(dev, "%s: write reg 0x%x failed, err %d\n",
  102. __func__, (reg_addr + i), ret);
  103. break;
  104. }
  105. dev_dbg(dev, "%s: dev_num: 0x%x, gather write reg: 0x%x, value: 0x%x\n",
  106. __func__, swr->dev_num, (reg_addr + i), *value);
  107. }
  108. mutex_unlock(&swr_rw_lock);
  109. return ret;
  110. }
  111. static int regmap_swr_raw_multi_reg_write(void *context, const void *data,
  112. size_t count)
  113. {
  114. struct device *dev = context;
  115. struct swr_device *swr = to_swr_device(dev);
  116. struct regmap *map = dev_get_regmap(dev, NULL);
  117. size_t num_regs;
  118. int i = 0;
  119. int ret = 0;
  120. u16 *reg;
  121. u8 *val;
  122. u8 *buf;
  123. if (swr == NULL) {
  124. dev_err_ratelimited(dev, "%s: swr device is NULL\n", __func__);
  125. return -EINVAL;
  126. }
  127. if (map == NULL) {
  128. dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
  129. return -EINVAL;
  130. }
  131. if (ADDR_BYTES + VAL_BYTES + PAD_BYTES == 0) {
  132. dev_err_ratelimited(dev, "%s: sum of addr, value and pad is 0\n", __func__);
  133. return -EINVAL;
  134. }
  135. num_regs = count / (ADDR_BYTES + VAL_BYTES + PAD_BYTES);
  136. reg = kcalloc(num_regs, sizeof(u16), GFP_KERNEL);
  137. if (!reg)
  138. return -ENOMEM;
  139. val = kcalloc(num_regs, sizeof(u8), GFP_KERNEL);
  140. if (!val) {
  141. ret = -ENOMEM;
  142. goto mem_fail;
  143. }
  144. buf = (u8 *)data;
  145. for (i = 0; i < num_regs; i++) {
  146. reg[i] = *(u16 *)buf;
  147. buf += (ADDR_BYTES + PAD_BYTES);
  148. val[i] = *buf;
  149. buf += VAL_BYTES;
  150. }
  151. ret = swr_bulk_write(swr, swr->dev_num, reg, val, num_regs);
  152. if (ret)
  153. dev_err_ratelimited(dev, "%s: multi reg write failed\n", __func__);
  154. kfree(val);
  155. mem_fail:
  156. kfree(reg);
  157. return ret;
  158. }
  159. static int regmap_swr_write(void *context, const void *data, size_t count)
  160. {
  161. struct device *dev = context;
  162. struct swr_device *swr = to_swr_device(dev);
  163. struct regmap *map = dev_get_regmap(dev, NULL);
  164. int addr_bytes = 0;
  165. if (map == NULL) {
  166. dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
  167. return -EINVAL;
  168. }
  169. if (swr == NULL) {
  170. dev_err_ratelimited(dev, "%s: swr is NULL\n", __func__);
  171. return -EINVAL;
  172. }
  173. addr_bytes = (swr->paging_support ? ADDR_BYTES_4 : ADDR_BYTES);
  174. WARN_ON(count < addr_bytes);
  175. if (count > (addr_bytes + VAL_BYTES + PAD_BYTES))
  176. return regmap_swr_raw_multi_reg_write(context, data, count);
  177. else
  178. return regmap_swr_gather_write(context, data, addr_bytes,
  179. (data + addr_bytes),
  180. (count - addr_bytes));
  181. }
  182. static int regmap_swr_read(void *context,
  183. const void *reg, size_t reg_size,
  184. void *val, size_t val_size)
  185. {
  186. struct device *dev = context;
  187. struct swr_device *swr = to_swr_device(dev);
  188. struct regmap *map = dev_get_regmap(dev, NULL);
  189. int ret = 0;
  190. u16 reg_addr = 0;
  191. if (map == NULL) {
  192. dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
  193. return -EINVAL;
  194. }
  195. if (swr == NULL) {
  196. dev_err_ratelimited(dev, "%s: swr is NULL\n", __func__);
  197. return -EINVAL;
  198. }
  199. if ((reg_size != ADDR_BYTES) && (reg_size != ADDR_BYTES_4)) {
  200. dev_err_ratelimited(dev, "%s: reg size %zd bytes not supported\n",
  201. __func__, reg_size);
  202. return -EINVAL;
  203. }
  204. mutex_lock(&swr_rw_lock);
  205. ret = regmap_swr_reg_address_get(swr, &reg_addr, reg, reg_size);
  206. if (ret < 0) {
  207. dev_err_ratelimited(dev,
  208. "%s: regmap_swr_reg_address_get failed, reg: 0x%x\n",
  209. __func__, *(u32 *)reg);
  210. mutex_unlock(&swr_rw_lock);
  211. return ret;
  212. }
  213. ret = swr_read(swr, swr->dev_num, reg_addr, val, val_size);
  214. if (ret < 0)
  215. dev_err_ratelimited(dev, "%s: codec reg 0x%x read failed %d\n",
  216. __func__, reg_addr, ret);
  217. mutex_unlock(&swr_rw_lock);
  218. return ret;
  219. }
  220. static struct regmap_bus regmap_swr = {
  221. .write = regmap_swr_write,
  222. .gather_write = regmap_swr_gather_write,
  223. .read = regmap_swr_read,
  224. .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
  225. .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
  226. };
  227. struct regmap *__regmap_init_swr(struct swr_device *swr,
  228. const struct regmap_config *config,
  229. struct lock_class_key *lock_key,
  230. const char *lock_name)
  231. {
  232. return __regmap_init(&swr->dev, &regmap_swr, &swr->dev, config,
  233. lock_key, lock_name);
  234. }
  235. EXPORT_SYMBOL(__regmap_init_swr);
  236. struct regmap *__devm_regmap_init_swr(struct swr_device *swr,
  237. const struct regmap_config *config,
  238. struct lock_class_key *lock_key,
  239. const char *lock_name)
  240. {
  241. return __devm_regmap_init(&swr->dev, &regmap_swr, &swr->dev, config,
  242. lock_key, lock_name);
  243. }
  244. EXPORT_SYMBOL(__devm_regmap_init_swr);
  245. MODULE_LICENSE("GPL v2");