msm_common.c 35 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/gpio.h>
  7. #include <linux/of_gpio.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/slab.h>
  10. #include <linux/of_device.h>
  11. #include <linux/arch_topology.h>
  12. #include <sound/control.h>
  13. #include <sound/core.h>
  14. #include <sound/soc.h>
  15. #include <sound/pcm_params.h>
  16. #include <asoc/msm-cdc-pinctrl.h>
  17. #include <dsp/spf-core.h>
  18. #include <dsp/msm_audio_ion.h>
  19. #include <sound/info.h>
  20. #include <dsp/audio_prm.h>
  21. #include <dsp/digital-cdc-rsc-mgr.h>
  22. #include <linux/sched/walt.h>
  23. #include "msm_common.h"
  24. #ifndef topology_cluster_id
  25. #define topology_cluster_id(cpu) topology_physical_package_id(cpu)
  26. #endif
  27. struct snd_card_pdata {
  28. struct kobject snd_card_kobj;
  29. int card_status;
  30. }*snd_card_pdata;
  31. #define to_asoc_mach_common_pdata(kobj) \
  32. container_of((kobj), struct msm_common_pdata, aud_dev_kobj)
  33. #define DEVICE_ENABLE 1
  34. #define DEVICE_DISABLE 0
  35. #define ARRAY_SZ 21
  36. #define BUF_SZ 32
  37. #define DIR_SZ 10
  38. #define MAX_CODEC_DAI 8
  39. #define TDM_SLOT_WIDTH_BITS 32
  40. #define TDM_MAX_SLOTS 8
  41. #define MI2S_NUM_CHANNELS 2
  42. #define SAMPLING_RATE_44P1KHZ 44100
  43. #define SAMPLING_RATE_88P2KHZ 88200
  44. #define SAMPLING_RATE_176P4KHZ 176400
  45. #define SAMPLING_RATE_352P8KHZ 352800
  46. struct mutex vote_against_sleep_lock;
  47. static struct attribute device_state_attr = {
  48. .name = "state",
  49. .mode = 0660,
  50. };
  51. static struct attribute card_state_attr = {
  52. .name = "card_state",
  53. .mode = 0660,
  54. };
  55. #define MAX_PORT 20
  56. #define CODEC_CHMAP "Channel Map"
  57. enum backend_id {
  58. SLIM = 1,
  59. CODEC_DMA,
  60. };
  61. struct chmap_pdata {
  62. int id;
  63. uint32_t num_codec_dai;
  64. struct snd_soc_dai *dai[MAX_CODEC_DAI];
  65. };
  66. static const struct snd_pcm_hardware dummy_dma_hardware = {
  67. /* Random values to keep userspace happy when checking constraints */
  68. .info = SNDRV_PCM_INFO_INTERLEAVED |
  69. SNDRV_PCM_INFO_BLOCK_TRANSFER,
  70. .buffer_bytes_max = 128*1024,
  71. .period_bytes_min = PAGE_SIZE,
  72. .period_bytes_max = PAGE_SIZE*2,
  73. .periods_min = 2,
  74. .periods_max = 128,
  75. };
  76. #define MAX_USR_INPUT 10
  77. #define MAX_CPU_CLUSTER 4 /* Silver, Gold, T, Prime */
  78. static int qos_vote_status;
  79. static uint8_t cpu_vote_mask;
  80. static bool lpi_pcm_logging_enable;
  81. static bool vote_against_sleep_enable;
  82. static unsigned int vote_against_sleep_cnt;
  83. static struct dev_pm_qos_request latency_pm_qos_req; /* pm_qos request */
  84. static unsigned int qos_client_active_cnt;
  85. static int cluster_first_cpu[MAX_CPU_CLUSTER] = {-1, };
  86. static struct dev_pm_qos_request *msm_audio_req = NULL;
  87. static bool kregister_pm_qos_latency_controls = false;
  88. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  89. static ssize_t aud_dev_sysfs_store(struct kobject *kobj,
  90. struct attribute *attr,
  91. const char *buf, size_t count)
  92. {
  93. ssize_t ret = -EINVAL;
  94. struct msm_common_pdata *pdata = to_asoc_mach_common_pdata(kobj);
  95. uint32_t pcm_id, state = 0;
  96. if (count > MAX_USR_INPUT) {
  97. pr_err("%s: invalid string written", __func__);
  98. goto done;
  99. }
  100. sscanf(buf, "%d %d", &pcm_id, &state);
  101. if ((pcm_id >= pdata->num_aud_devs) || (pcm_id < 0)) {
  102. pr_err("%s: invalid pcm id %d \n", __func__, pcm_id);
  103. goto done;
  104. }
  105. if ((state > DEVICE_ENABLE) || (state < DEVICE_DISABLE)) {
  106. pr_err("%s: invalid state %d \n", __func__, state);
  107. goto done;
  108. }
  109. pr_debug("%s: pcm_id %d state %d \n", __func__, pcm_id, state);
  110. pdata->aud_dev_state[pcm_id] = state;
  111. ret = count;
  112. done:
  113. return ret;
  114. }
  115. static const struct sysfs_ops aud_dev_sysfs_ops = {
  116. .store = aud_dev_sysfs_store,
  117. };
  118. static struct kobj_type aud_dev_ktype = {
  119. .sysfs_ops = &aud_dev_sysfs_ops,
  120. };
  121. static int aud_dev_sysfs_init(struct msm_common_pdata *pdata)
  122. {
  123. int ret = 0;
  124. char dir[10] = "aud_dev";
  125. ret = kobject_init_and_add(&pdata->aud_dev_kobj, &aud_dev_ktype,
  126. kernel_kobj, dir);
  127. if (ret < 0) {
  128. pr_err("%s: Failed to add kobject %s, err = %d\n",
  129. __func__, dir, ret);
  130. goto done;
  131. }
  132. ret = sysfs_create_file(&pdata->aud_dev_kobj, &device_state_attr);
  133. if (ret < 0) {
  134. pr_err("%s: Failed to add wdsp_boot sysfs entry to %s\n",
  135. __func__, dir);
  136. goto fail_create_file;
  137. }
  138. return ret;
  139. fail_create_file:
  140. kobject_put(&pdata->aud_dev_kobj);
  141. done:
  142. return ret;
  143. }
  144. int snd_card_notify_user(snd_card_status_t card_status)
  145. {
  146. snd_card_pdata->card_status = card_status;
  147. sysfs_notify(&snd_card_pdata->snd_card_kobj, NULL, "card_state");
  148. if (card_status == 0) {
  149. mutex_lock(&vote_against_sleep_lock);
  150. vote_against_sleep_cnt = 0;
  151. pr_debug("%s: SSR/PDR triggered reset vote_against_sleep_cnt = %d\n",
  152. __func__, vote_against_sleep_cnt);
  153. mutex_unlock(&vote_against_sleep_lock);
  154. }
  155. return 0;
  156. }
  157. int snd_card_set_card_status(snd_card_status_t card_status)
  158. {
  159. snd_card_pdata->card_status = card_status;
  160. return 0;
  161. }
  162. static ssize_t snd_card_sysfs_show(struct kobject *kobj,
  163. struct attribute *attr, char *buf)
  164. {
  165. return snprintf(buf, BUF_SZ, "%d", snd_card_pdata->card_status);
  166. }
  167. static ssize_t snd_card_sysfs_store(struct kobject *kobj,
  168. struct attribute *attr, const char *buf, size_t count)
  169. {
  170. sscanf(buf, "%d", &snd_card_pdata->card_status);
  171. sysfs_notify(&snd_card_pdata->snd_card_kobj, NULL, "card_state");
  172. return 0;
  173. }
  174. static const struct sysfs_ops snd_card_sysfs_ops = {
  175. .show = snd_card_sysfs_show,
  176. .store = snd_card_sysfs_store,
  177. };
  178. static struct kobj_type snd_card_ktype = {
  179. .sysfs_ops = &snd_card_sysfs_ops,
  180. };
  181. int snd_card_sysfs_init(void)
  182. {
  183. int ret = 0;
  184. char dir[DIR_SZ] = "snd_card";
  185. snd_card_pdata = kcalloc(1, sizeof(struct snd_card_pdata), GFP_KERNEL);
  186. ret = kobject_init_and_add(&snd_card_pdata->snd_card_kobj, &snd_card_ktype,
  187. kernel_kobj, dir);
  188. if (ret < 0) {
  189. pr_err("%s: Failed to add kobject %s, err = %d\n",
  190. __func__, dir, ret);
  191. goto done;
  192. }
  193. ret = sysfs_create_file(&snd_card_pdata->snd_card_kobj, &card_state_attr);
  194. if (ret < 0) {
  195. pr_err("%s: Failed to add snd_card sysfs entry to %s\n",
  196. __func__, dir);
  197. goto fail_create_file;
  198. }
  199. return ret;
  200. fail_create_file:
  201. kobject_put(&snd_card_pdata->snd_card_kobj);
  202. done:
  203. return ret;
  204. }
  205. static int get_mi2s_tdm_auxpcm_intf_index(const char *stream_name)
  206. {
  207. if (!strnstr(stream_name, "TDM", strlen(stream_name)) &&
  208. !strnstr(stream_name, "MI2S", strlen(stream_name)) &&
  209. !strnstr(stream_name, "AUXPCM", strlen(stream_name)))
  210. return -EINVAL;
  211. if (strnstr(stream_name, "LPAIF_RXTX", strlen(stream_name)))
  212. return QUAT_MI2S_TDM_AUXPCM;
  213. else if (strnstr(stream_name, "LPAIF_WSA", strlen(stream_name)))
  214. return SEN_MI2S_TDM_AUXPCM;
  215. else if (strnstr(stream_name, "LPAIF_VA", strlen(stream_name)))
  216. return QUIN_MI2S_TDM_AUXPCM;
  217. else if (strnstr(stream_name, "LPAIF_AUD", strlen(stream_name))){
  218. if (strnstr(stream_name, "PRIMARY", strlen(stream_name)))
  219. return SEP_MI2S_TDM_AUXPCM;
  220. else if (strnstr(stream_name, "SECONDARY", strlen(stream_name)))
  221. return TER_MI2S_TDM_AUXPCM;
  222. }
  223. else if (strnstr(stream_name, "LPAIF", strlen(stream_name))) {
  224. if (strnstr(stream_name, "PRIMARY", strlen(stream_name)))
  225. return PRI_MI2S_TDM_AUXPCM;
  226. else if (strnstr(stream_name, "SECONDARY", strlen(stream_name)))
  227. return SEC_MI2S_TDM_AUXPCM;
  228. }
  229. pr_debug("%s: stream name %s does not match\n", __func__, stream_name);
  230. return -EINVAL;
  231. }
  232. static bool is_fractional_sample_rate(unsigned int sample_rate)
  233. {
  234. switch (sample_rate) {
  235. case SAMPLING_RATE_44P1KHZ:
  236. case SAMPLING_RATE_88P2KHZ:
  237. case SAMPLING_RATE_176P4KHZ:
  238. case SAMPLING_RATE_352P8KHZ:
  239. return true;
  240. default:
  241. return false;
  242. }
  243. return false;
  244. }
  245. static int get_mi2s_clk_id(int index)
  246. {
  247. int clk_id = -EINVAL;
  248. switch(index) {
  249. case PRI_MI2S_TDM_AUXPCM:
  250. clk_id = CLOCK_ID_PRI_MI2S_IBIT;
  251. break;
  252. case SEC_MI2S_TDM_AUXPCM:
  253. clk_id = CLOCK_ID_SEC_MI2S_IBIT;
  254. break;
  255. case TER_MI2S_TDM_AUXPCM:
  256. clk_id = CLOCK_ID_TER_MI2S_IBIT;
  257. break;
  258. case QUAT_MI2S_TDM_AUXPCM:
  259. clk_id = CLOCK_ID_QUAD_MI2S_IBIT;
  260. break;
  261. case QUIN_MI2S_TDM_AUXPCM:
  262. clk_id = CLOCK_ID_QUI_MI2S_IBIT;
  263. break;
  264. case SEN_MI2S_TDM_AUXPCM:
  265. clk_id = CLOCK_ID_SEN_MI2S_IBIT;
  266. break;
  267. case SEP_MI2S_TDM_AUXPCM:
  268. clk_id = CLOCK_ID_SEP_MI2S_IBIT;
  269. break;
  270. default:
  271. pr_err("%s: Invalid interface index: %d\n", __func__, index);
  272. }
  273. pr_debug("%s: clk id: %d\n", __func__, clk_id);
  274. return clk_id;
  275. }
  276. static int get_tdm_clk_id(int index)
  277. {
  278. int clk_id = -EINVAL;
  279. switch(index) {
  280. case PRI_MI2S_TDM_AUXPCM:
  281. clk_id = CLOCK_ID_PRI_TDM_IBIT;
  282. break;
  283. case SEC_MI2S_TDM_AUXPCM:
  284. clk_id = CLOCK_ID_SEC_TDM_IBIT;
  285. break;
  286. case TER_MI2S_TDM_AUXPCM:
  287. clk_id = CLOCK_ID_TER_TDM_IBIT;
  288. break;
  289. case QUAT_MI2S_TDM_AUXPCM:
  290. clk_id = CLOCK_ID_QUAD_TDM_IBIT;
  291. break;
  292. case QUIN_MI2S_TDM_AUXPCM:
  293. clk_id = CLOCK_ID_QUI_TDM_IBIT;
  294. break;
  295. case SEN_MI2S_TDM_AUXPCM:
  296. clk_id = CLOCK_ID_SEN_TDM_IBIT;
  297. break;
  298. case SEP_MI2S_TDM_AUXPCM:
  299. clk_id = CLOCK_ID_SEP_TDM_IBIT;
  300. break;
  301. default:
  302. pr_err("%s: Invalid interface index: %d\n", __func__, index);
  303. }
  304. pr_debug("%s: clk id: %d\n", __func__, clk_id);
  305. return clk_id;
  306. }
  307. int mi2s_tdm_hw_vote_req(struct msm_common_pdata *pdata, int enable)
  308. {
  309. int ret = 0;
  310. if (!pdata || (pdata->lpass_audio_hw_vote == NULL)) {
  311. pr_err("%s: pdata or lpass audio hw vote node NULL", __func__);
  312. return -EINVAL;
  313. }
  314. pr_debug("%s: lpass audio hw vote for fractional sample rate enable: %d\n",
  315. __func__, enable);
  316. if (enable) {
  317. if (atomic_read(&pdata->lpass_audio_hw_vote_ref_cnt) == 0) {
  318. ret = digital_cdc_rsc_mgr_hw_vote_enable(pdata->lpass_audio_hw_vote, NULL);
  319. if (ret < 0) {
  320. pr_err("%s lpass audio hw vote enable failed %d\n",
  321. __func__, ret);
  322. return ret;
  323. }
  324. }
  325. atomic_inc(&pdata->lpass_audio_hw_vote_ref_cnt);
  326. } else {
  327. atomic_dec(&pdata->lpass_audio_hw_vote_ref_cnt);
  328. if (atomic_read(&pdata->lpass_audio_hw_vote_ref_cnt) == 0)
  329. digital_cdc_rsc_mgr_hw_vote_disable(pdata->lpass_audio_hw_vote, NULL);
  330. else if (atomic_read(&pdata->lpass_audio_hw_vote_ref_cnt) < 0)
  331. atomic_set(&pdata->lpass_audio_hw_vote_ref_cnt, 0);
  332. }
  333. return ret;
  334. }
  335. int msm_common_snd_hw_params(struct snd_pcm_substream *substream,
  336. struct snd_pcm_hw_params *params)
  337. {
  338. int ret = 0;
  339. int slot_width = TDM_SLOT_WIDTH_BITS;
  340. int slots;
  341. int sample_width;
  342. unsigned int rate;
  343. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  344. const char *stream_name = rtd->dai_link->stream_name;
  345. struct snd_soc_card *card = rtd->card;
  346. struct msm_common_pdata *pdata = msm_common_get_pdata(card);
  347. int index = get_mi2s_tdm_auxpcm_intf_index(stream_name);
  348. struct clk_cfg intf_clk_cfg;
  349. dev_dbg(rtd->card->dev,
  350. "%s: substream = %s stream = %d\n",
  351. __func__, substream->name, substream->stream);
  352. if (!pdata) {
  353. dev_err(rtd->card->dev, "%s: pdata is NULL\n", __func__);
  354. return -EINVAL;
  355. }
  356. if (index >= 0) {
  357. mutex_lock(&pdata->lock[index]);
  358. if (atomic_read(&pdata->lpass_intf_clk_ref_cnt[index]) == 0) {
  359. if ((strnstr(stream_name, "TDM", strlen(stream_name)))) {
  360. slots = pdata->tdm_max_slots;
  361. rate = params_rate(params);
  362. ret = get_tdm_clk_id(index);
  363. if ( ret < 0)
  364. goto done;
  365. intf_clk_cfg.clk_id = ret;
  366. intf_clk_cfg.clk_freq_in_hz = rate * slot_width * slots;
  367. intf_clk_cfg.clk_attri = pdata->tdm_clk_attribute[index];
  368. intf_clk_cfg.clk_root = 0;
  369. if (pdata->is_audio_hw_vote_required[index] &&
  370. (is_fractional_sample_rate(rate) ||
  371. (index == QUIN_MI2S_TDM_AUXPCM))) {
  372. ret = mi2s_tdm_hw_vote_req(pdata, 1);
  373. if (ret < 0) {
  374. pr_err("%s lpass audio hw vote enable failed %d\n",
  375. __func__, ret);
  376. goto done;
  377. }
  378. }
  379. pr_debug("%s: clk_id :%d clk freq %d\n", __func__,
  380. intf_clk_cfg.clk_id, intf_clk_cfg.clk_freq_in_hz);
  381. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 1);
  382. if (ret < 0) {
  383. pr_err("%s: prm lpass tdm clk cfg set failed ret %d\n",
  384. __func__, ret);
  385. goto done;
  386. }
  387. } else if ((strnstr(stream_name, "MI2S", strlen(stream_name)))) {
  388. ret = get_mi2s_clk_id(index);
  389. if (ret < 0)
  390. goto done;
  391. intf_clk_cfg.clk_id = ret;
  392. rate = params_rate(params);
  393. switch (params_format(params)) {
  394. case SNDRV_PCM_FORMAT_S24_LE:
  395. case SNDRV_PCM_FORMAT_S24_3LE:
  396. case SNDRV_PCM_FORMAT_S32_LE:
  397. sample_width = 32;
  398. break;
  399. case SNDRV_PCM_FORMAT_S16_LE:
  400. default:
  401. sample_width = 16;
  402. pr_debug("%s: bitwidth set to default : %d\n",
  403. __func__, sample_width);
  404. }
  405. intf_clk_cfg.clk_freq_in_hz = rate *
  406. MI2S_NUM_CHANNELS * sample_width;
  407. intf_clk_cfg.clk_attri = pdata->mi2s_clk_attribute[index];
  408. intf_clk_cfg.clk_root = CLOCK_ROOT_DEFAULT;
  409. if (pdata->is_audio_hw_vote_required[index] &&
  410. (is_fractional_sample_rate(rate) ||
  411. (index == QUIN_MI2S_TDM_AUXPCM))) {
  412. ret = mi2s_tdm_hw_vote_req(pdata, 1);
  413. if (ret < 0) {
  414. pr_err("%s lpass audio hw vote enable failed %d\n",
  415. __func__, ret);
  416. goto done;
  417. }
  418. }
  419. pr_debug("%s: mi2s clk_id :%d clk freq %d\n", __func__,
  420. intf_clk_cfg.clk_id, intf_clk_cfg.clk_freq_in_hz);
  421. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 1);
  422. if (ret < 0) {
  423. pr_err("%s: prm lpass mi2s clk cfg set failed ret %d\n",
  424. __func__, ret);
  425. goto done;
  426. }
  427. } else {
  428. pr_err("%s: unsupported stream name: %s\n",
  429. __func__, stream_name);
  430. goto done;
  431. }
  432. }
  433. atomic_inc(&pdata->lpass_intf_clk_ref_cnt[index]);
  434. done:
  435. mutex_unlock(&pdata->lock[index]);
  436. }
  437. return ret;
  438. }
  439. int msm_common_snd_startup(struct snd_pcm_substream *substream)
  440. {
  441. int ret = 0;
  442. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  443. struct snd_soc_card *card = rtd->card;
  444. struct msm_common_pdata *pdata = msm_common_get_pdata(card);
  445. const char *stream_name = rtd->dai_link->stream_name;
  446. int index = get_mi2s_tdm_auxpcm_intf_index(stream_name);
  447. dev_dbg(rtd->card->dev,
  448. "%s: substream = %s stream = %d\n",
  449. __func__, substream->name, substream->stream);
  450. if (!pdata) {
  451. dev_err(rtd->card->dev, "%s: pdata is NULL\n", __func__);
  452. return -EINVAL;
  453. }
  454. if (!rtd->dai_link->no_pcm)
  455. snd_soc_set_runtime_hwparams(substream, &dummy_dma_hardware);
  456. if (index >= 0) {
  457. mutex_lock(&pdata->lock[index]);
  458. if (pdata->mi2s_gpio_p[index]) {
  459. if (atomic_read(&(pdata->mi2s_gpio_ref_cnt[index])) == 0) {
  460. ret = msm_cdc_pinctrl_select_active_state(
  461. pdata->mi2s_gpio_p[index]);
  462. if (ret) {
  463. pr_err("%s:pinctrl set actve fail with %d\n",
  464. __func__, ret);
  465. goto done;
  466. }
  467. }
  468. atomic_inc(&(pdata->mi2s_gpio_ref_cnt[index]));
  469. }
  470. done:
  471. mutex_unlock(&pdata->lock[index]);
  472. }
  473. return ret;
  474. }
  475. void msm_common_snd_shutdown(struct snd_pcm_substream *substream)
  476. {
  477. int ret;
  478. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  479. struct snd_soc_card *card = rtd->card;
  480. struct msm_common_pdata *pdata = msm_common_get_pdata(card);
  481. struct snd_pcm_runtime *runtime = substream->runtime;
  482. const char *stream_name = rtd->dai_link->stream_name;
  483. int index = get_mi2s_tdm_auxpcm_intf_index(stream_name);
  484. struct clk_cfg intf_clk_cfg;
  485. unsigned int rate = runtime->rate;
  486. memset(&intf_clk_cfg, 0, sizeof(struct clk_cfg));
  487. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  488. substream->name, substream->stream);
  489. if (!pdata) {
  490. dev_err(card->dev, "%s: pdata is NULL\n", __func__);
  491. return;
  492. }
  493. if (index >= 0) {
  494. mutex_lock(&pdata->lock[index]);
  495. atomic_dec(&pdata->lpass_intf_clk_ref_cnt[index]);
  496. if (atomic_read(&pdata->lpass_intf_clk_ref_cnt[index]) == 0) {
  497. if ((strnstr(stream_name, "TDM", strlen(stream_name)))) {
  498. ret = get_tdm_clk_id(index);
  499. if (ret > 0) {
  500. intf_clk_cfg.clk_id = ret;
  501. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 0);
  502. if (ret < 0)
  503. pr_err("%s: prm tdm clk cfg set failed ret %d\n",
  504. __func__, ret);
  505. }
  506. } else if((strnstr(stream_name, "MI2S", strlen(stream_name)))) {
  507. ret = get_mi2s_clk_id(index);
  508. if (ret > 0) {
  509. intf_clk_cfg.clk_id = ret;
  510. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 0);
  511. if (ret < 0)
  512. pr_err("%s: prm mi2s clk cfg disable failed ret %d\n",
  513. __func__, ret);
  514. }
  515. } else {
  516. pr_err("%s: unsupported stream name: %s\n",
  517. __func__, stream_name);
  518. }
  519. if (pdata->is_audio_hw_vote_required[index] &&
  520. (is_fractional_sample_rate(rate) ||
  521. (index == QUIN_MI2S_TDM_AUXPCM))) {
  522. ret = mi2s_tdm_hw_vote_req(pdata, 0);
  523. }
  524. } else if (atomic_read(&pdata->lpass_intf_clk_ref_cnt[index]) < 0) {
  525. atomic_set(&pdata->lpass_intf_clk_ref_cnt[index], 0);
  526. }
  527. if (pdata->mi2s_gpio_p[index]) {
  528. atomic_dec(&pdata->mi2s_gpio_ref_cnt[index]);
  529. if (atomic_read(&pdata->mi2s_gpio_ref_cnt[index]) == 0) {
  530. ret = msm_cdc_pinctrl_select_sleep_state(
  531. pdata->mi2s_gpio_p[index]);
  532. if (ret)
  533. dev_err(card->dev,
  534. "%s: pinctrl set actv fail %d\n",
  535. __func__, ret);
  536. } else if (atomic_read(&pdata->mi2s_gpio_ref_cnt[index]) < 0) {
  537. atomic_set(&pdata->mi2s_gpio_ref_cnt[index], 0);
  538. }
  539. }
  540. mutex_unlock(&pdata->lock[index]);
  541. }
  542. }
  543. static void msm_audio_add_qos_request(void)
  544. {
  545. int num_req = 0;
  546. int cpu = 0;
  547. int ret = 0;
  548. int cid, prev_cid = -1;
  549. int cluster_num = 0;
  550. cpumask_t *cluster_cpu_mask = NULL;
  551. msm_audio_req = kcalloc(num_possible_cpus(),
  552. sizeof(struct dev_pm_qos_request), GFP_KERNEL);
  553. if (!msm_audio_req)
  554. return;
  555. for_each_cpu(cpu, cpu_possible_mask) {
  556. cid = topology_cluster_id(cpu);
  557. if (cid != prev_cid) {
  558. cluster_first_cpu[cluster_num++] = cpu;
  559. prev_cid = cid;
  560. }
  561. }
  562. /* Pick the first cluster as it represents the Silver cluster. */
  563. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  564. for_each_cpu(cpu, cluster_cpu_mask) {
  565. ret = dev_pm_qos_add_request(get_cpu_device(cpu),
  566. &msm_audio_req[cpu],
  567. DEV_PM_QOS_RESUME_LATENCY,
  568. PM_QOS_CPU_LATENCY_DEFAULT_VALUE);
  569. if (ret < 0) {
  570. pr_err("%s error (%d) adding resume latency to cpu %d.\n",
  571. __func__, ret, cpu);
  572. } else {
  573. cpu_vote_mask |= (1 << cpu);
  574. pr_debug("%s set cpu affinity to logical core %d.\n", __func__, cpu);
  575. }
  576. /* Limit the request to 2 silver cpu cores. */
  577. if (++num_req == 2)
  578. break;
  579. }
  580. }
  581. static void msm_audio_remove_qos_request(void)
  582. {
  583. int cpu = 0;
  584. int ret = 0;
  585. uint8_t cpu_bit = 0;
  586. cpumask_t *cluster_cpu_mask = NULL;
  587. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  588. if (msm_audio_req) {
  589. for_each_cpu(cpu, cluster_cpu_mask) {
  590. cpu_bit = 1 << cpu;
  591. if (cpu_bit & cpu_vote_mask) {
  592. ret = dev_pm_qos_remove_request(
  593. &msm_audio_req[cpu]);
  594. cpu_vote_mask &= ~cpu_bit;
  595. } else
  596. pr_debug("%s: core %d not voted.\n",
  597. __func__, cpu);
  598. if (ret < 0)
  599. pr_err("%s error (%d) removing request from cpu %d.\n",
  600. __func__, ret, cpu);
  601. pr_debug("%s remove cpu affinity of core %d.\n", __func__, cpu);
  602. }
  603. kfree(msm_audio_req);
  604. }
  605. }
  606. int msm_common_snd_init(struct platform_device *pdev, struct snd_soc_card *card)
  607. {
  608. struct msm_common_pdata *common_pdata = NULL;
  609. int count, ret = 0;
  610. uint32_t val_array[MI2S_TDM_AUXPCM_MAX] = {0};
  611. struct clk *lpass_audio_hw_vote = NULL;
  612. common_pdata = kcalloc(1, sizeof(struct msm_common_pdata), GFP_KERNEL);
  613. if (!common_pdata)
  614. return -ENOMEM;
  615. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  616. mutex_init(&common_pdata->lock[count]);
  617. atomic_set(&common_pdata->mi2s_gpio_ref_cnt[count], 0);
  618. }
  619. ret = of_property_read_u32(pdev->dev.of_node, "qcom,tdm-max-slots",
  620. &common_pdata->tdm_max_slots);
  621. if (ret) {
  622. dev_info(&pdev->dev, "%s: No DT match for tdm max slots\n",
  623. __func__);
  624. }
  625. if ((common_pdata->tdm_max_slots <= 0) || (common_pdata->tdm_max_slots >
  626. TDM_MAX_SLOTS)) {
  627. common_pdata->tdm_max_slots = TDM_MAX_SLOTS;
  628. dev_info(&pdev->dev, "%s: Using default tdm max slot: %d\n",
  629. __func__, common_pdata->tdm_max_slots);
  630. }
  631. /* Register LPASS audio hw vote */
  632. lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
  633. if (IS_ERR(lpass_audio_hw_vote)) {
  634. ret = PTR_ERR(lpass_audio_hw_vote);
  635. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  636. __func__, "lpass_audio_hw_vote", ret);
  637. lpass_audio_hw_vote = NULL;
  638. ret = 0;
  639. }
  640. common_pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
  641. ret = of_property_read_u32_array(pdev->dev.of_node,
  642. "qcom,mi2s-tdm-is-hw-vote-needed",
  643. val_array, MI2S_TDM_AUXPCM_MAX);
  644. if (ret) {
  645. dev_dbg(&pdev->dev, "%s:no qcom,mi2s-tdm-is-hw-vote-needed in DT node\n",
  646. __func__);
  647. } else {
  648. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  649. common_pdata->is_audio_hw_vote_required[count] =
  650. val_array[count];
  651. }
  652. }
  653. ret = of_property_read_u32_array(pdev->dev.of_node, "qcom,tdm-clk-attribute",
  654. val_array, MI2S_TDM_AUXPCM_MAX);
  655. if (ret) {
  656. dev_info(&pdev->dev,
  657. "%s: No DT match for tdm clk attribute, set to default\n", __func__);
  658. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  659. common_pdata->tdm_clk_attribute[count] =
  660. CLOCK_ATTRIBUTE_COUPLE_NO;
  661. }
  662. } else {
  663. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  664. common_pdata->tdm_clk_attribute[count] =
  665. val_array[count];
  666. }
  667. }
  668. ret = of_property_read_u32_array(pdev->dev.of_node, "qcom,mi2s-clk-attribute",
  669. val_array, MI2S_TDM_AUXPCM_MAX);
  670. if (ret) {
  671. dev_info(&pdev->dev,
  672. "%s: No DT match for mi2s clk attribute, set to default\n", __func__);
  673. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  674. common_pdata->mi2s_clk_attribute[count] =
  675. CLOCK_ATTRIBUTE_COUPLE_NO;
  676. }
  677. } else {
  678. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  679. common_pdata->mi2s_clk_attribute[count] =
  680. val_array[count];
  681. }
  682. }
  683. common_pdata->mi2s_gpio_p[PRI_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  684. "qcom,pri-mi2s-gpios", 0);
  685. common_pdata->mi2s_gpio_p[SEC_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  686. "qcom,sec-mi2s-gpios", 0);
  687. common_pdata->mi2s_gpio_p[TER_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  688. "qcom,tert-mi2s-gpios", 0);
  689. common_pdata->mi2s_gpio_p[QUAT_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  690. "qcom,quat-mi2s-gpios", 0);
  691. common_pdata->mi2s_gpio_p[QUIN_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  692. "qcom,quin-mi2s-gpios", 0);
  693. common_pdata->mi2s_gpio_p[SEN_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  694. "qcom,sen-mi2s-gpios", 0);
  695. common_pdata->mi2s_gpio_p[SEP_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  696. "qcom,sep-mi2s-gpios", 0);
  697. common_pdata->aud_dev_state = devm_kcalloc(&pdev->dev, card->num_links,
  698. sizeof(uint8_t), GFP_KERNEL);
  699. dev_info(&pdev->dev, "num_links %d \n", card->num_links);
  700. common_pdata->num_aud_devs = card->num_links;
  701. mutex_init(&common_pdata->aud_dev_lock);
  702. aud_dev_sysfs_init(common_pdata);
  703. msm_common_set_pdata(card, common_pdata);
  704. /* Add QoS request for audio tasks */
  705. msm_audio_add_qos_request();
  706. mutex_init(&vote_against_sleep_lock);
  707. return 0;
  708. };
  709. void msm_common_snd_deinit(struct msm_common_pdata *common_pdata)
  710. {
  711. int count;
  712. if (!common_pdata)
  713. return;
  714. mutex_destroy(&vote_against_sleep_lock);
  715. msm_audio_remove_qos_request();
  716. mutex_destroy(&common_pdata->aud_dev_lock);
  717. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  718. mutex_destroy(&common_pdata->lock[count]);
  719. }
  720. }
  721. int msm_channel_map_info(struct snd_kcontrol *kcontrol,
  722. struct snd_ctl_elem_info *uinfo)
  723. {
  724. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  725. uinfo->count = sizeof(uint32_t) * MAX_PORT;
  726. return 0;
  727. }
  728. int msm_channel_map_get(struct snd_kcontrol *kcontrol,
  729. struct snd_ctl_elem_value *ucontrol)
  730. {
  731. struct chmap_pdata *kctl_pdata =
  732. (struct chmap_pdata *)kcontrol->private_data;
  733. struct snd_soc_dai *codec_dai = NULL;
  734. int backend_id = 0;
  735. uint32_t rx_ch[MAX_PORT] = {0}, tx_ch[MAX_PORT] = {0};
  736. uint32_t rx_ch_cnt = 0, tx_ch_cnt = 0;
  737. uint32_t *chmap_data = NULL;
  738. int ret = 0, len = 0, i = 0;
  739. if (kctl_pdata == NULL) {
  740. pr_debug("%s: chmap_pdata is not initialized\n", __func__);
  741. return -EINVAL;
  742. }
  743. codec_dai = kctl_pdata->dai[0];
  744. backend_id = kctl_pdata->id;
  745. switch (backend_id) {
  746. case SLIM: {
  747. uint32_t *chmap;
  748. uint32_t ch_cnt;
  749. ret = snd_soc_dai_get_channel_map(codec_dai,
  750. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  751. if (ret || (tx_ch_cnt == 0 && rx_ch_cnt == 0)) {
  752. pr_debug("%s: got incorrect channel map for backend_id:%d\n",
  753. __func__, backend_id);
  754. return ret;
  755. }
  756. if (rx_ch_cnt) {
  757. chmap = rx_ch;
  758. ch_cnt = rx_ch_cnt;
  759. } else {
  760. chmap = tx_ch;
  761. ch_cnt = tx_ch_cnt;
  762. }
  763. if (ch_cnt > 2) {
  764. pr_err("%s: Incorrect channel count: %d\n", __func__, ch_cnt);
  765. return -EINVAL;
  766. }
  767. len = sizeof(uint32_t) * (ch_cnt + 1);
  768. chmap_data = kzalloc(len, GFP_KERNEL);
  769. if (!chmap_data)
  770. return -ENOMEM;
  771. chmap_data[0] = ch_cnt;
  772. for (i = 0; i < ch_cnt; i++)
  773. chmap_data[i+1] = chmap[i];
  774. memcpy(ucontrol->value.bytes.data, chmap_data, len);
  775. break;
  776. }
  777. case CODEC_DMA: {
  778. uint32_t cur_rx_ch = 0, cur_tx_ch = 0;
  779. uint32_t cur_rx_ch_cnt = 0, cur_tx_ch_cnt = 0;
  780. for (i = 0; i < kctl_pdata->num_codec_dai; ++i) {
  781. codec_dai = kctl_pdata->dai[i];
  782. if(!codec_dai) {
  783. continue;
  784. }
  785. cur_rx_ch_cnt = 0;
  786. cur_tx_ch_cnt = 0;
  787. cur_tx_ch = 0;
  788. cur_rx_ch = 0;
  789. ret = snd_soc_dai_get_channel_map(codec_dai,
  790. &cur_tx_ch_cnt, &cur_tx_ch,
  791. &cur_rx_ch_cnt, &cur_rx_ch);
  792. /* DAIs that not supports get_channel_map should pass */
  793. if (ret && (ret != -ENOTSUPP)) {
  794. pr_err("%s: get channel map failed for backend_id:%d,"
  795. " ret:%d\n",
  796. __func__, backend_id, ret);
  797. return ret;
  798. }
  799. rx_ch_cnt += cur_rx_ch_cnt;
  800. tx_ch_cnt += cur_tx_ch_cnt;
  801. rx_ch[0] |= cur_rx_ch;
  802. tx_ch[0] |= cur_tx_ch;
  803. }
  804. /* reset return value from the loop above */
  805. ret = 0;
  806. if (rx_ch_cnt == 0 && tx_ch_cnt == 0) {
  807. pr_debug("%s: incorrect ch map for backend_id:%d, RX Channel Cnt:%d, TX Channel Cnt:%d\n",
  808. __func__, backend_id, rx_ch_cnt, tx_ch_cnt);
  809. return ret;
  810. }
  811. chmap_data = kzalloc(sizeof(uint32_t) * 2, GFP_KERNEL);
  812. if (!chmap_data)
  813. return -ENOMEM;
  814. if (rx_ch_cnt) {
  815. chmap_data[0] = rx_ch_cnt;
  816. chmap_data[1] = rx_ch[0];
  817. } else {
  818. chmap_data[0] = tx_ch_cnt;
  819. chmap_data[1] = tx_ch[0];
  820. }
  821. memcpy(ucontrol->value.bytes.data, chmap_data,
  822. sizeof(uint32_t) * 2);
  823. break;
  824. }
  825. default:
  826. pr_err("%s, Invalid backend %d\n", __func__, backend_id);
  827. ret = -EINVAL;
  828. break;
  829. }
  830. kfree(chmap_data);
  831. return ret;
  832. }
  833. void msm_common_get_backend_name(const char *stream_name, char **backend_name)
  834. {
  835. char arg[ARRAY_SZ] = {0};
  836. char value[61] = {0};
  837. sscanf(stream_name, "%20[^-]-%60s", arg, value);
  838. *backend_name = kzalloc(ARRAY_SZ, GFP_KERNEL);
  839. if (!(*backend_name))
  840. return;
  841. strlcpy(*backend_name, arg, ARRAY_SZ);
  842. }
  843. static void msm_audio_update_qos_request(u32 latency)
  844. {
  845. int cpu = 0;
  846. uint8_t cpu_bit = 0;
  847. int ret = -1;
  848. int num_req = 0;
  849. cpumask_t *cluster_cpu_mask = NULL;
  850. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  851. if (msm_audio_req) {
  852. for_each_cpu(cpu, cluster_cpu_mask) {
  853. cpu_bit = 1 << cpu;
  854. if (cpu_bit & cpu_vote_mask)
  855. ret = dev_pm_qos_update_request(
  856. &msm_audio_req[cpu], latency);
  857. else
  858. pr_debug("%s: core %d not voted.\n",
  859. __func__, cpu);
  860. if (1 == ret ) {
  861. pr_debug("%s: updated latency of core %d to %u.\n",
  862. __func__, cpu, latency);
  863. } else if (0 == ret) {
  864. pr_debug("%s: latency of core %d not changed. latency %u.\n",
  865. __func__, cpu, latency);
  866. } else {
  867. pr_err("%s: failed to update latency of core %d, error %d \n",
  868. __func__, cpu, ret);
  869. }
  870. /* Limit the request to 2 Silver CPU cores. */
  871. if (++num_req == 2)
  872. break;
  873. }
  874. }
  875. }
  876. static int msm_get_and_print_cpu_map_taken(cpumask_t* expected_cpu_map) {
  877. int ret = 0;
  878. int cpu = 0;
  879. cpumask_t current_cpu_map = walt_get_cpus_taken();
  880. if (memcmp(&current_cpu_map, &CPU_MASK_NONE, sizeof(cpumask_t)) == 0) {
  881. pr_debug("%s: current cpu map is none.\n", __func__);
  882. } else {
  883. for_each_cpu(cpu, &current_cpu_map) {
  884. pr_debug("%s: current cpu core taken %d.\n", __func__, cpu);
  885. }
  886. }
  887. if (memcmp(&current_cpu_map, expected_cpu_map, sizeof(cpumask_t)) == 0)
  888. ret = 1;
  889. return ret;
  890. }
  891. static int msm_qos_ctl_put(struct snd_kcontrol *kcontrol,
  892. struct snd_ctl_elem_value *ucontrol)
  893. {
  894. cpumask_t expected_cpu_map = CPU_MASK_NONE;
  895. cpumask_t *cluster_cpu_mask = NULL;
  896. qos_vote_status = ucontrol->value.enumerated.item[0];
  897. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  898. pr_debug("%s: qos_vote_status = %d, qos_client_active_cnt = %d.\n",
  899. __func__, qos_vote_status, qos_client_active_cnt);
  900. if (qos_vote_status) {
  901. if (dev_pm_qos_request_active(&latency_pm_qos_req))
  902. dev_pm_qos_remove_request(&latency_pm_qos_req);
  903. qos_client_active_cnt++;
  904. if (qos_client_active_cnt == 1) {
  905. msm_audio_update_qos_request(MSM_LL_QOS_VALUE);
  906. expected_cpu_map = *cluster_cpu_mask;
  907. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  908. pr_debug("%s: already expected, don't need to set it.\n",
  909. __func__);
  910. return 0;
  911. }
  912. walt_set_cpus_taken(cluster_cpu_mask);
  913. pr_debug("%s: set cpus taken to walt for audio RT tasks.\n",
  914. __func__);
  915. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  916. pr_debug("%s: set cpus taken as expected successfully.\n",
  917. __func__);
  918. }
  919. }
  920. } else {
  921. if (qos_client_active_cnt > 0)
  922. qos_client_active_cnt--;
  923. if (qos_client_active_cnt == 0) {
  924. msm_audio_update_qos_request(PM_QOS_CPU_LATENCY_DEFAULT_VALUE);
  925. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  926. pr_debug("%s: already expected, don't need to unset it.\n",
  927. __func__);
  928. return 0;
  929. }
  930. walt_unset_cpus_taken(cluster_cpu_mask);
  931. pr_debug("%s: unset cpus taken to walt for audio RT tasks.\n",
  932. __func__);
  933. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  934. pr_debug("%s: unset cpus taken as expected successfully.\n",
  935. __func__);
  936. }
  937. }
  938. }
  939. return 0;
  940. }
  941. static int msm_qos_ctl_get(struct snd_kcontrol *kcontrol,
  942. struct snd_ctl_elem_value *ucontrol)
  943. {
  944. ucontrol->value.enumerated.item[0] = qos_vote_status;
  945. return 0;
  946. }
  947. static int msm_lpi_logging_enable_put(struct snd_kcontrol *kcontrol,
  948. struct snd_ctl_elem_value *ucontrol)
  949. {
  950. lpi_pcm_logging_enable = ucontrol->value.integer.value[0];
  951. pr_debug("%s: lpi pcm logging enable: %d", __func__,
  952. lpi_pcm_logging_enable);
  953. audio_prm_set_lpi_logging_status((int)lpi_pcm_logging_enable);
  954. return 0;
  955. }
  956. static int msm_lpi_logging_enable_get(struct snd_kcontrol *kcontrol,
  957. struct snd_ctl_elem_value *ucontrol)
  958. {
  959. ucontrol->value.integer.value[0] = lpi_pcm_logging_enable;
  960. return 0;
  961. }
  962. static int msm_vote_against_sleep_ctl_put(struct snd_kcontrol *kcontrol,
  963. struct snd_ctl_elem_value *ucontrol)
  964. {
  965. int ret = 0;
  966. mutex_lock(&vote_against_sleep_lock);
  967. vote_against_sleep_enable = ucontrol->value.integer.value[0];
  968. pr_debug("%s: vote against sleep enable: %d sleep cnt: %d", __func__,
  969. vote_against_sleep_enable, vote_against_sleep_cnt);
  970. if (vote_against_sleep_enable) {
  971. vote_against_sleep_cnt++;
  972. if (vote_against_sleep_cnt == 1) {
  973. ret = audio_prm_set_vote_against_sleep(1);
  974. if (ret < 0) {
  975. if (vote_against_sleep_cnt > 0)
  976. --vote_against_sleep_cnt;
  977. pr_err("%s: failed to vote against sleep ret: %d\n", __func__, ret);
  978. }
  979. }
  980. } else {
  981. if (vote_against_sleep_cnt == 1)
  982. ret = audio_prm_set_vote_against_sleep(0);
  983. if (vote_against_sleep_cnt > 0)
  984. vote_against_sleep_cnt--;
  985. }
  986. pr_debug("%s: vote against sleep vote ret: %d\n", __func__, ret);
  987. mutex_unlock(&vote_against_sleep_lock);
  988. return ret;
  989. }
  990. static int msm_vote_against_sleep_ctl_get(struct snd_kcontrol *kcontrol,
  991. struct snd_ctl_elem_value *ucontrol)
  992. {
  993. ucontrol->value.integer.value[0] = vote_against_sleep_enable;
  994. pr_debug("%s: vote against sleep enable: %d", __func__,
  995. vote_against_sleep_enable);
  996. return 0;
  997. }
  998. static const char *const qos_text[] = {"Disable", "Enable"};
  999. static const char *const against_sleep_text[] = {"Disable", "Enable"};
  1000. static SOC_ENUM_SINGLE_EXT_DECL(qos_vote, qos_text);
  1001. static SOC_ENUM_SINGLE_EXT_DECL(sleep_against, against_sleep_text);
  1002. static const struct snd_kcontrol_new card_mixer_controls[] = {
  1003. SOC_ENUM_EXT("PM_QOS Vote", qos_vote,
  1004. msm_qos_ctl_get, msm_qos_ctl_put),
  1005. SOC_SINGLE_EXT("LPI PCM Logging Enable", 0, 0, 1, 0,
  1006. msm_lpi_logging_enable_get, msm_lpi_logging_enable_put),
  1007. SOC_ENUM_EXT("VOTE Against Sleep", sleep_against,
  1008. msm_vote_against_sleep_ctl_get, msm_vote_against_sleep_ctl_put),
  1009. };
  1010. static int msm_register_pm_qos_latency_controls(struct snd_soc_pcm_runtime *rtd)
  1011. {
  1012. struct snd_soc_component *lpass_cdc_component = NULL;
  1013. int ret = 0;
  1014. lpass_cdc_component = snd_soc_rtdcom_lookup(rtd, "lpass-cdc");
  1015. if (!lpass_cdc_component) {
  1016. pr_err("%s: could not find component for lpass-cdc\n",
  1017. __func__);
  1018. return -EINVAL;
  1019. }
  1020. ret = snd_soc_add_component_controls(lpass_cdc_component,
  1021. card_mixer_controls, ARRAY_SIZE(card_mixer_controls));
  1022. if (ret < 0) {
  1023. pr_err("%s: add common snd controls failed: %d\n",
  1024. __func__, ret);
  1025. return -EINVAL;
  1026. }
  1027. return 0;
  1028. }
  1029. int msm_common_dai_link_init(struct snd_soc_pcm_runtime *rtd)
  1030. {
  1031. struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
  1032. struct snd_soc_component *component = NULL;
  1033. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  1034. struct device *dev = rtd->card->dev;
  1035. int ret = 0;
  1036. int index = 0;
  1037. const char *mixer_ctl_name = CODEC_CHMAP;
  1038. char *mixer_str = NULL;
  1039. char *backend_name = NULL;
  1040. uint32_t ctl_len = 0;
  1041. struct chmap_pdata *pdata;
  1042. struct snd_kcontrol *kctl;
  1043. struct snd_kcontrol_new msm_common_channel_map[1] = {
  1044. {
  1045. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1046. .name = "?",
  1047. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1048. .info = msm_channel_map_info,
  1049. .get = msm_channel_map_get,
  1050. .private_value = 0,
  1051. }
  1052. };
  1053. if (!codec_dai) {
  1054. pr_err("%s: failed to get codec dai", __func__);
  1055. return -EINVAL;
  1056. }
  1057. component = codec_dai->component;
  1058. msm_common_get_backend_name(dai_link->stream_name, &backend_name);
  1059. if (!backend_name) {
  1060. pr_err("%s: failed to get backend name", __func__);
  1061. return -EINVAL;
  1062. }
  1063. pdata = devm_kzalloc(dev, sizeof(struct chmap_pdata), GFP_KERNEL);
  1064. if (!pdata) {
  1065. ret = -ENOMEM;
  1066. goto free_backend;
  1067. }
  1068. if ((!strncmp(backend_name, "SLIM", strlen("SLIM"))) ||
  1069. (!strncmp(backend_name, "CODEC_DMA", strlen("CODEC_DMA")))) {
  1070. ctl_len = strlen(dai_link->stream_name) + 1 +
  1071. strlen(mixer_ctl_name) + 1;
  1072. mixer_str = kzalloc(ctl_len, GFP_KERNEL);
  1073. if (!mixer_str) {
  1074. ret = -ENOMEM;
  1075. goto free_backend;
  1076. }
  1077. snprintf(mixer_str, ctl_len, "%s %s", dai_link->stream_name,
  1078. mixer_ctl_name);
  1079. msm_common_channel_map[0].name = mixer_str;
  1080. msm_common_channel_map[0].private_value = 0;
  1081. pr_debug("Registering new mixer ctl %s\n", mixer_str);
  1082. ret = snd_soc_add_component_controls(component,
  1083. msm_common_channel_map,
  1084. ARRAY_SIZE(msm_common_channel_map));
  1085. kctl = snd_soc_card_get_kcontrol(rtd->card, mixer_str);
  1086. if (!kctl) {
  1087. pr_err("failed to get kctl %s\n", mixer_str);
  1088. ret = -EINVAL;
  1089. goto free_mixer_str;
  1090. }
  1091. pdata->dai[0] = codec_dai;
  1092. pdata->num_codec_dai = 1;
  1093. if (!strncmp(backend_name, "SLIM", strlen("SLIM"))) {
  1094. pdata->id = SLIM;
  1095. } else {
  1096. pdata->id = CODEC_DMA;
  1097. if (rtd->dai_link->num_codecs <= MAX_CODEC_DAI) {
  1098. pdata->num_codec_dai = rtd->dai_link->num_codecs;
  1099. for_each_rtd_codec_dais(rtd, index, codec_dai) {
  1100. pdata->dai[index] = codec_dai;
  1101. }
  1102. }
  1103. }
  1104. kctl->private_data = pdata;
  1105. }
  1106. if (!kregister_pm_qos_latency_controls) {
  1107. if (!msm_register_pm_qos_latency_controls(rtd))
  1108. kregister_pm_qos_latency_controls = true;
  1109. }
  1110. free_mixer_str:
  1111. if (mixer_str) {
  1112. kfree(mixer_str);
  1113. mixer_str = NULL;
  1114. }
  1115. free_backend:
  1116. if (backend_name) {
  1117. kfree(backend_name);
  1118. backend_name = NULL;
  1119. }
  1120. return ret;
  1121. }