internal.h 9.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _WCD939X_INTERNAL_H
  7. #define _WCD939X_INTERNAL_H
  8. #include <asoc/wcd-mbhc-v2.h>
  9. #include <asoc/wcd-irq.h>
  10. #include <asoc/wcd-clsh.h>
  11. #include <soc/soundwire.h>
  12. #include "wcd939x-mbhc.h"
  13. #include "wcd939x.h"
  14. #define SWR_SCP_CONTROL 0x44
  15. #define SWR_SCP_HOST_CLK_DIV2_CTL_BANK 0xE0
  16. #define WCD939X_MAX_MICBIAS 4
  17. #define R_COMMON_GND_BUFFER_SIZE 4
  18. #define MAX_XTALK_SCALE 31
  19. #define MIN_XTALK_ALPHA 0
  20. #define MIN_K_TIMES_100 -90
  21. #define MAX_K_TIMES_100 10000
  22. #define MAX_USBCSS_HS_IMPEDANCE_MOHMS 20000
  23. #define MIN_DIFF_SLOPE_FACTOR 9800
  24. #define MAX_DIFF_SLOPE_FACTOR 10000
  25. /* Convert from vout ctl to micbias voltage in mV */
  26. #define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
  27. #define MAX_PORT 8
  28. #define MAX_CH_PER_PORT 8
  29. #define TX_ADC_MAX 4
  30. #define SWR_NUM_PORTS 4
  31. enum {
  32. RX_CLK_9P6MHZ,
  33. RX_CLK_12P288MHZ,
  34. RX_CLK_11P2896MHZ,
  35. };
  36. enum {
  37. WCD939X_HPHL,
  38. WCD939X_HPHR,
  39. WCD939X_HPH_MAX,
  40. };
  41. enum {
  42. TX_HDR12 = 0,
  43. TX_HDR34,
  44. TX_HDR_MAX,
  45. };
  46. enum xtalk_mode {
  47. XTALK_NONE = 0,
  48. XTALK_DIGITAL = 1,
  49. XTALK_ANALOG = 2
  50. };
  51. extern struct regmap_config wcd939x_regmap_config;
  52. struct comp_coeff_val {
  53. u8 lsb;
  54. u8 msb;
  55. };
  56. struct codec_port_info {
  57. u32 slave_port_type;
  58. u32 master_port_type;
  59. u32 ch_mask;
  60. u32 num_ch;
  61. u32 ch_rate;
  62. };
  63. struct wcd939x_priv {
  64. struct device *dev;
  65. int variant;
  66. struct snd_soc_component *component;
  67. struct device_node *rst_np;
  68. struct regmap *regmap;
  69. struct swr_device *rx_swr_dev;
  70. struct swr_device *tx_swr_dev;
  71. s32 micb_ref[WCD939X_MAX_MICBIAS];
  72. s32 pullup_ref[WCD939X_MAX_MICBIAS];
  73. struct fw_info *fw_data;
  74. struct device_node *wcd_rst_np;
  75. struct mutex micb_lock;
  76. struct mutex wakeup_lock;
  77. s32 dmic_0_1_clk_cnt;
  78. s32 dmic_2_3_clk_cnt;
  79. s32 dmic_4_5_clk_cnt;
  80. s32 dmic_6_7_clk_cnt;
  81. int hdr_en[TX_HDR_MAX];
  82. /* class h specific info */
  83. struct wcd_clsh_cdc_info clsh_info;
  84. /* mbhc module */
  85. struct wcd939x_mbhc *mbhc;
  86. /*compander and xtalk*/
  87. int compander_enabled[WCD939X_HPH_MAX];
  88. int xtalk_enabled[WCD939X_HPH_MAX];
  89. u8 hph_pcm_enabled;
  90. u32 hph_mode;
  91. u32 tx_mode[TX_ADC_MAX];
  92. s32 adc_count;
  93. bool comp1_enable;
  94. bool comp2_enable;
  95. bool ldoh;
  96. bool bcs_dis;
  97. bool dapm_bias_off;
  98. bool in_2Vpk_mode;
  99. struct irq_domain *virq;
  100. struct wcd_irq_info irq_info;
  101. u32 rx_clk_cnt;
  102. int num_irq_regs;
  103. /* to track the status */
  104. unsigned long status_mask;
  105. u8 num_tx_ports;
  106. u8 num_rx_ports;
  107. struct codec_port_info
  108. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  109. struct codec_port_info
  110. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  111. struct swr_port_params tx_port_params[SWR_UC_MAX][SWR_NUM_PORTS];
  112. struct swr_dev_frame_config swr_tx_port_params[SWR_UC_MAX];
  113. struct regulator_bulk_data *supplies;
  114. struct notifier_block nblock;
  115. /* wcd callback to bolero */
  116. void *handle;
  117. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  118. int (*register_notifier)(void *handle,
  119. struct notifier_block *nblock,
  120. bool enable);
  121. int (*wakeup)(void *handle, bool enable);
  122. u32 version;
  123. /* Entry for version info */
  124. struct snd_info_entry *entry;
  125. struct snd_info_entry *version_entry;
  126. struct snd_info_entry *variant_entry;
  127. int flyback_cur_det_disable;
  128. int ear_rx_path;
  129. bool dev_up;
  130. u8 tx_master_ch_map[WCD939X_MAX_SLAVE_CH_TYPES];
  131. bool usbc_hs_status;
  132. u8 rx_clk_config;
  133. /* wcd to swr dmic notification */
  134. bool notify_swr_dmic;
  135. struct blocking_notifier_head notifier;
  136. };
  137. struct wcd939x_micbias_setting {
  138. u8 ldoh_v;
  139. u32 cfilt1_mv;
  140. u32 micb1_mv;
  141. u32 micb2_mv;
  142. u32 micb3_mv;
  143. u32 micb4_mv;
  144. u8 bias1_cfilt_sel;
  145. };
  146. struct aud_ch_params {
  147. /* Resistance of audio-side internal FET */
  148. u32 r_aud_int_fet_mohms;
  149. /* Resistance of audio-side external FET */
  150. u32 r_aud_ext_fet_mohms;
  151. /* Total right audio-side resistance */
  152. u32 r_aud_res_tot_mohms;
  153. /* Sum of audio-side parasitics and the left/right side of the load */
  154. u32 r_load_eff_mohms;
  155. /* DT audio parasitics between HPH_L/R and HPHL/R_FB, in milliohms */
  156. u32 r1;
  157. /* DT audio-side parasitics between the WCD and external FET,
  158. * in milliohms
  159. */
  160. u32 r3;
  161. /* Calibrated and adjusted SE zdet measurement value */
  162. u32 zval;
  163. };
  164. struct aud_params {
  165. /* Left-side audio params */
  166. struct aud_ch_params l;
  167. /* Right-side audio params */
  168. struct aud_ch_params r;
  169. /* Surge switch resistance */
  170. u32 r_surge_mohms;
  171. /* Tap out linearizer constant for the audio path, multiplied by 100 from the original
  172. * constants to support decimal values up to the hundredth place
  173. */
  174. s32 k_aud_times_100;
  175. /* Fixed offset to be applied to audio taps */
  176. s32 aud_tap_offset;
  177. };
  178. struct gnd_sbu_params {
  179. /* Resistance of ground-side internal FET */
  180. u32 r_gnd_int_fet_mohms;
  181. /* Total ground-side parasitics between the WCD and external FET */
  182. u32 r_gnd_par_route1_mohms;
  183. /* Total ground-side parasitics between the external FET and connector */
  184. u32 r_gnd_par_route2_mohms;
  185. /* Total ground-side parasitics between the WCD and connector; sum of route1 and route2 */
  186. u32 r_gnd_par_tot_mohms;
  187. /* Total ground-side resistance */
  188. u32 r_gnd_res_tot_mohms;
  189. /* DT ground-side parasitics between the external FET and connector, in milliohms */
  190. u32 r4;
  191. /* For digital crosstalk with remote sensed analog crosstalk mode, DT ground path parasitic
  192. * resistance between the WCD SBU pin and the external MOSFET, in milliohms
  193. */
  194. u32 r5;
  195. /* For digital crosstalk with local sensed analog crosstalk mode, DT ground path parasitic
  196. * resistance between the WCD GSBU tap point and the external MOSFET, in milliohms
  197. */
  198. u32 r6;
  199. /* For digital crosstalk with local sensed analog crosstalk mode, DT ground path parasitic
  200. * resistance between the WCD GSBU tap point and the WCD SBU pin, in milliohms
  201. */
  202. u32 r7;
  203. };
  204. struct r_common_gnd_buffer {
  205. /* Data for elements in buffer */
  206. u32 data[R_COMMON_GND_BUFFER_SIZE];
  207. /* Index to write next element in buffer */
  208. size_t write_index;
  209. };
  210. struct gnd_params {
  211. /* SBU1-ground params */
  212. struct gnd_sbu_params sbu1;
  213. /* SBU2-ground params */
  214. struct gnd_sbu_params sbu2;
  215. /* FIFO circular buffer for storing previous values of r_common_gnd_mohms */
  216. struct r_common_gnd_buffer r_cm_gnd_buffer;
  217. /* DT resistance of the ground-side external FET, in milliohms */
  218. u32 rdson_mohms;
  219. /* DT resistance of the ground-side external FET, Vgs=3.6V, in milliohms */
  220. u32 rdson_3p6v_mohms;
  221. /* Difference between the ground external FET, Vgs=3.6V and Vgs=6V */
  222. u32 gnd_ext_fet_delta_mohms;
  223. /* Minimum value used for linearizer audio tap calculations */
  224. u32 gnd_ext_fet_min_mohms;
  225. /* SW-computed resistance for the ground-side external FET */
  226. u32 r_gnd_ext_fet_mohms;
  227. /* Total ground-side resistance, with the internal FET and the route1 parasitic removed */
  228. u32 r_common_gnd_mohms;
  229. /* Ground path offset for testing debug, in milliohms */
  230. s32 r_common_gnd_offset;
  231. /* Margin to check if the calculated r_common_gnd is in a reasonable range, in milliohms */
  232. u32 r_common_gnd_margin;
  233. };
  234. struct xtalk_params {
  235. /* Computed optimal d-xtalk left-side scale value */
  236. u8 scale_l;
  237. /* Computed optimal d-xtalk left-side alpha value */
  238. u8 alpha_l;
  239. /* Computed optimal d-xtalk right-side scale value */
  240. u8 scale_r;
  241. /* Computed optimal d-xtalk right-side alpha value */
  242. u8 alpha_r;
  243. /* DT configuration for d-xtalk:
  244. * 0 for digital crosstalk disabled,
  245. * 1 for digital crosstalk with local sensed a-xtalk enabled, and
  246. * 2 for digital crosstalk with remote sensed a-xtalk enabled.
  247. */
  248. enum xtalk_mode xtalk_config;
  249. };
  250. struct wcd939x_usbcss_hs_params {
  251. /* Audio-side USBCSS-HS impedance parameters */
  252. struct aud_params aud;
  253. /* Ground-side USBCSS-HS impedance parameters */
  254. struct gnd_params gnd;
  255. /* Xtalk-specific parameters */
  256. struct xtalk_params xtalk;
  257. /* Calibrated and adjusted differential zdet measurement value */
  258. u32 zdiffval;
  259. /* Multiplicative scale factor to adjust differential zdet measurement value, times 1000 */
  260. u32 diff_slope_factor_times_1000;
  261. /* Multiplicative scale factor to adjust single-ended zdet measurement value, times 1000 */
  262. u32 se_slope_factor_times_1000;
  263. };
  264. struct wcd939x_pdata {
  265. struct device_node *rst_np;
  266. struct device_node *rx_slave;
  267. struct device_node *tx_slave;
  268. struct wcd939x_micbias_setting micbias;
  269. struct wcd939x_usbcss_hs_params usbcss_hs;
  270. struct cdc_regulator *regulator;
  271. int num_supplies;
  272. };
  273. struct wcd_ctrl_platform_data {
  274. void *handle;
  275. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  276. int (*register_notifier)(void *handle,
  277. struct notifier_block *nblock,
  278. bool enable);
  279. };
  280. enum {
  281. WCD_RX1,
  282. WCD_RX2,
  283. WCD_RX3
  284. };
  285. enum {
  286. /* INTR_CTRL_INT_MASK_0 */
  287. WCD939X_IRQ_MBHC_BUTTON_PRESS_DET = 0,
  288. WCD939X_IRQ_MBHC_BUTTON_RELEASE_DET,
  289. WCD939X_IRQ_MBHC_ELECT_INS_REM_DET,
  290. WCD939X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  291. WCD939X_IRQ_MBHC_SW_DET,
  292. WCD939X_IRQ_HPHR_OCP_INT,
  293. WCD939X_IRQ_HPHR_CNP_INT,
  294. WCD939X_IRQ_HPHL_OCP_INT,
  295. /* INTR_CTRL_INT_MASK_1 */
  296. WCD939X_IRQ_HPHL_CNP_INT,
  297. WCD939X_IRQ_EAR_CNP_INT,
  298. WCD939X_IRQ_EAR_SCD_INT,
  299. WCD939X_IRQ_HPHL_PDM_WD_INT,
  300. WCD939X_IRQ_HPHR_PDM_WD_INT,
  301. WCD939X_IRQ_EAR_PDM_WD_INT,
  302. /* INTR_CTRL_INT_MASK_2 */
  303. WCD939X_IRQ_MBHC_MOISTURE_INT,
  304. WCD939X_IRQ_HPHL_SURGE_DET_INT,
  305. WCD939X_IRQ_HPHR_SURGE_DET_INT,
  306. WCD939X_NUM_IRQS,
  307. };
  308. extern struct wcd939x_mbhc *wcd939x_soc_get_mbhc(
  309. struct snd_soc_component *component);
  310. extern void wcd939x_disable_bcs_before_slow_insert(
  311. struct snd_soc_component *component,
  312. bool bcs_disable);
  313. extern int wcd939x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  314. int volt, int micb_num);
  315. extern int wcd939x_get_micb_vout_ctl_val(u32 micb_mv);
  316. extern int wcd939x_micbias_control(struct snd_soc_component *component,
  317. int micb_num, int req, bool is_dapm);
  318. #endif /* _WCD939X_INTERNAL_H */