internal.h 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _WCD938X_INTERNAL_H
  6. #define _WCD938X_INTERNAL_H
  7. #include <asoc/wcd-mbhc-v2.h>
  8. #include <asoc/wcd-irq.h>
  9. #include <asoc/wcd-clsh.h>
  10. #include <soc/soundwire.h>
  11. #include "wcd938x-mbhc.h"
  12. #include "wcd938x.h"
  13. #define SWR_SCP_CONTROL 0x44
  14. #define SWR_SCP_HOST_CLK_DIV2_CTL_BANK 0xE0
  15. #define WCD938X_MAX_MICBIAS 4
  16. /* Convert from vout ctl to micbias voltage in mV */
  17. #define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
  18. #define MAX_PORT 8
  19. #define MAX_CH_PER_PORT 8
  20. #define TX_ADC_MAX 4
  21. #define SWR_NUM_PORTS 4
  22. enum {
  23. TX_HDR12 = 0,
  24. TX_HDR34,
  25. TX_HDR_MAX,
  26. };
  27. extern struct regmap_config wcd938x_regmap_config;
  28. struct codec_port_info {
  29. u32 slave_port_type;
  30. u32 master_port_type;
  31. u32 ch_mask;
  32. u32 num_ch;
  33. u32 ch_rate;
  34. };
  35. struct wcd938x_priv {
  36. struct device *dev;
  37. int variant;
  38. struct snd_soc_component *component;
  39. struct device_node *rst_np;
  40. struct regmap *regmap;
  41. struct swr_device *rx_swr_dev;
  42. struct swr_device *tx_swr_dev;
  43. s32 micb_ref[WCD938X_MAX_MICBIAS];
  44. s32 pullup_ref[WCD938X_MAX_MICBIAS];
  45. struct fw_info *fw_data;
  46. struct device_node *wcd_rst_np;
  47. struct mutex micb_lock;
  48. struct mutex wakeup_lock;
  49. s32 dmic_0_1_clk_cnt;
  50. s32 dmic_2_3_clk_cnt;
  51. s32 dmic_4_5_clk_cnt;
  52. s32 dmic_6_7_clk_cnt;
  53. int hdr_en[TX_HDR_MAX];
  54. /* class h specific info */
  55. struct wcd_clsh_cdc_info clsh_info;
  56. /* mbhc module */
  57. struct wcd938x_mbhc *mbhc;
  58. u32 hph_mode;
  59. u32 tx_mode[TX_ADC_MAX];
  60. s32 adc_count;
  61. bool comp1_enable;
  62. bool comp2_enable;
  63. bool ldoh;
  64. bool bcs_dis;
  65. bool dapm_bias_off;
  66. struct irq_domain *virq;
  67. struct wcd_irq_info irq_info;
  68. u32 rx_clk_cnt;
  69. int num_irq_regs;
  70. /* to track the status */
  71. unsigned long status_mask;
  72. u8 num_tx_ports;
  73. u8 num_rx_ports;
  74. struct codec_port_info
  75. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  76. struct codec_port_info
  77. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  78. struct swr_port_params tx_port_params[SWR_UC_MAX][SWR_NUM_PORTS];
  79. struct swr_dev_frame_config swr_tx_port_params[SWR_UC_MAX];
  80. struct regulator_bulk_data *supplies;
  81. struct notifier_block nblock;
  82. /* wcd callback to bolero */
  83. void *handle;
  84. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  85. int (*register_notifier)(void *handle,
  86. struct notifier_block *nblock,
  87. bool enable);
  88. int (*wakeup)(void *handle, bool enable);
  89. u32 version;
  90. /* Entry for version info */
  91. struct snd_info_entry *entry;
  92. struct snd_info_entry *version_entry;
  93. struct snd_info_entry *variant_entry;
  94. int flyback_cur_det_disable;
  95. int ear_rx_path;
  96. bool dev_up;
  97. u8 tx_master_ch_map[WCD938X_MAX_SLAVE_CH_TYPES];
  98. bool usbc_hs_status;
  99. /* wcd to swr dmic notification */
  100. bool notify_swr_dmic;
  101. struct blocking_notifier_head notifier;
  102. };
  103. struct wcd938x_micbias_setting {
  104. u8 ldoh_v;
  105. u32 cfilt1_mv;
  106. u32 micb1_mv;
  107. u32 micb2_mv;
  108. u32 micb3_mv;
  109. u32 micb4_mv;
  110. u8 bias1_cfilt_sel;
  111. };
  112. struct wcd938x_pdata {
  113. struct device_node *rst_np;
  114. struct device_node *rx_slave;
  115. struct device_node *tx_slave;
  116. struct wcd938x_micbias_setting micbias;
  117. struct cdc_regulator *regulator;
  118. int num_supplies;
  119. };
  120. struct wcd_ctrl_platform_data {
  121. void *handle;
  122. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  123. int (*register_notifier)(void *handle,
  124. struct notifier_block *nblock,
  125. bool enable);
  126. };
  127. enum {
  128. WCD_RX1,
  129. WCD_RX2,
  130. WCD_RX3
  131. };
  132. enum {
  133. /* INTR_CTRL_INT_MASK_0 */
  134. WCD938X_IRQ_MBHC_BUTTON_PRESS_DET = 0,
  135. WCD938X_IRQ_MBHC_BUTTON_RELEASE_DET,
  136. WCD938X_IRQ_MBHC_ELECT_INS_REM_DET,
  137. WCD938X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  138. WCD938X_IRQ_MBHC_SW_DET,
  139. WCD938X_IRQ_HPHR_OCP_INT,
  140. WCD938X_IRQ_HPHR_CNP_INT,
  141. WCD938X_IRQ_HPHL_OCP_INT,
  142. /* INTR_CTRL_INT_MASK_1 */
  143. WCD938X_IRQ_HPHL_CNP_INT,
  144. WCD938X_IRQ_EAR_CNP_INT,
  145. WCD938X_IRQ_EAR_SCD_INT,
  146. WCD938X_IRQ_AUX_CNP_INT,
  147. WCD938X_IRQ_AUX_SCD_INT,
  148. WCD938X_IRQ_HPHL_PDM_WD_INT,
  149. WCD938X_IRQ_HPHR_PDM_WD_INT,
  150. WCD938X_IRQ_AUX_PDM_WD_INT,
  151. /* INTR_CTRL_INT_MASK_2 */
  152. WCD938X_IRQ_LDORT_SCD_INT,
  153. WCD938X_IRQ_MBHC_MOISTURE_INT,
  154. WCD938X_IRQ_HPHL_SURGE_DET_INT,
  155. WCD938X_IRQ_HPHR_SURGE_DET_INT,
  156. WCD938X_NUM_IRQS,
  157. };
  158. extern struct wcd938x_mbhc *wcd938x_soc_get_mbhc(
  159. struct snd_soc_component *component);
  160. extern void wcd938x_disable_bcs_before_slow_insert(
  161. struct snd_soc_component *component,
  162. bool bcs_disable);
  163. extern int wcd938x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  164. int volt, int micb_num);
  165. extern int wcd938x_get_micb_vout_ctl_val(u32 micb_mv);
  166. extern int wcd938x_micbias_control(struct snd_soc_component *component,
  167. int micb_num, int req, bool is_dapm);
  168. #endif /* _WCD938X_INTERNAL_H */