lpass-bt-swr.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  3. */
  4. #include <linux/of_platform.h>
  5. #include <linux/module.h>
  6. #include <linux/init.h>
  7. #include <linux/irq.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/printk.h>
  10. #include <linux/kernel.h>
  11. #include <linux/clk.h>
  12. #include <linux/pm_runtime.h>
  13. #include <soc/swr-common.h>
  14. #include <asoc/msm-cdc-pinctrl.h>
  15. #include <dsp/digital-cdc-rsc-mgr.h>
  16. #include <soc/swr-wcd.h>
  17. #include <soc/snd_event.h>
  18. #define DRV_NAME "lpass-bt-swr"
  19. /* pm runtime auto suspend timer in msecs */
  20. #define LPASS_BT_SWR_AUTO_SUSPEND_DELAY 100 /* delay in msec */
  21. #define LPASS_BT_SWR_STRING_LEN 80
  22. #define LPASS_BT_SWR_CHILD_DEVICES_MAX 1
  23. /* Hold instance to soundwire platform device */
  24. struct lpass_bt_swr_ctrl_data {
  25. struct platform_device *lpass_bt_swr_pdev;
  26. };
  27. struct lpass_bt_swr_ctrl_platform_data {
  28. void *handle; /* holds parent private data */
  29. int (*read)(void *handle, int reg);
  30. int (*write)(void *handle, int reg, int val);
  31. int (*bulk_write)(void *handle, u32 *reg, u32 *val, size_t len);
  32. int (*clk)(void *handle, bool enable);
  33. int (*core_vote)(void *handle, bool enable);
  34. int (*handle_irq)(void *handle,
  35. irqreturn_t (*swrm_irq_handler)(int irq,
  36. void *data),
  37. void *swrm_handle,
  38. int action);
  39. };
  40. struct lpass_bt_swr_priv {
  41. struct device *dev;
  42. struct mutex vote_lock;
  43. struct mutex swr_clk_lock;
  44. struct mutex ssr_lock;
  45. bool dev_up;
  46. bool initial_boot;
  47. struct clk *lpass_core_hw_vote;
  48. struct clk *lpass_audio_hw_vote;
  49. int core_hw_vote_count;
  50. int core_audio_vote_count;
  51. int swr_clk_users;
  52. struct clk *clk_handle;
  53. struct clk *clk_handle_2x;
  54. struct lpass_bt_swr_ctrl_data *swr_ctrl_data;
  55. struct lpass_bt_swr_ctrl_platform_data swr_plat_data;
  56. struct work_struct lpass_bt_swr_add_child_devices_work;
  57. struct platform_device *pdev_child_devices
  58. [LPASS_BT_SWR_CHILD_DEVICES_MAX];
  59. int child_count;
  60. struct device_node *bt_swr_gpio_p;
  61. /* Entry for version info */
  62. struct snd_info_entry *entry;
  63. struct snd_info_entry *version_entry;
  64. struct blocking_notifier_head notifier;
  65. struct device *clk_dev;
  66. };
  67. static struct lpass_bt_swr_priv *lpass_bt_priv;
  68. static void lpass_bt_swr_add_child_devices(struct work_struct *work)
  69. {
  70. struct lpass_bt_swr_priv *priv;
  71. struct platform_device *pdev;
  72. struct device_node *node;
  73. struct lpass_bt_swr_ctrl_data *swr_ctrl_data = NULL, *temp;
  74. int ret;
  75. u16 count = 0, ctrl_num = 0;
  76. struct lpass_bt_swr_ctrl_platform_data *platdata;
  77. char plat_dev_name[LPASS_BT_SWR_STRING_LEN];
  78. priv = container_of(work, struct lpass_bt_swr_priv,
  79. lpass_bt_swr_add_child_devices_work);
  80. if (!priv) {
  81. pr_err("%s: Memory for priv does not exist\n",
  82. __func__);
  83. return;
  84. }
  85. if (!priv->dev || !priv->dev->of_node) {
  86. dev_err(priv->dev,
  87. "%s: DT node for priv does not exist\n", __func__);
  88. return;
  89. }
  90. platdata = &priv->swr_plat_data;
  91. priv->child_count = 0;
  92. for_each_available_child_of_node(priv->dev->of_node, node) {
  93. if (strnstr(node->name, "bt_swr_mstr",
  94. strlen("bt_swr_mstr")) != NULL)
  95. strscpy(plat_dev_name, "bt_swr_mstr",
  96. (LPASS_BT_SWR_STRING_LEN - 1));
  97. else
  98. continue;
  99. pdev = platform_device_alloc(plat_dev_name, -1);
  100. if (!pdev) {
  101. dev_err(priv->dev, "%s: pdev memory alloc failed\n",
  102. __func__);
  103. ret = -ENOMEM;
  104. return;
  105. }
  106. pdev->dev.parent = priv->dev;
  107. pdev->dev.of_node = node;
  108. ret = platform_device_add_data(pdev, platdata,
  109. sizeof(*platdata));
  110. if (ret) {
  111. dev_err(&pdev->dev,
  112. "%s: cannot add plat data ctrl:%d\n",
  113. __func__, ctrl_num);
  114. goto fail_pdev_add;
  115. }
  116. temp = krealloc(swr_ctrl_data,
  117. (ctrl_num + 1) * sizeof(
  118. struct lpass_bt_swr_ctrl_data),
  119. GFP_KERNEL);
  120. if (!temp) {
  121. dev_err(&pdev->dev, "out of memory\n");
  122. ret = -ENOMEM;
  123. goto fail_pdev_add;
  124. }
  125. swr_ctrl_data = temp;
  126. swr_ctrl_data[ctrl_num].lpass_bt_swr_pdev = pdev;
  127. ctrl_num++;
  128. dev_dbg(&pdev->dev, "%s: Adding soundwire ctrl device(s)\n",
  129. __func__);
  130. priv->swr_ctrl_data = swr_ctrl_data;
  131. ret = platform_device_add(pdev);
  132. if (ret) {
  133. dev_err(&pdev->dev,
  134. "%s: Cannot add platform device\n",
  135. __func__);
  136. goto fail_pdev_add;
  137. }
  138. if (priv->child_count < LPASS_BT_SWR_CHILD_DEVICES_MAX)
  139. priv->pdev_child_devices[
  140. priv->child_count++] = pdev;
  141. else
  142. return;
  143. }
  144. return;
  145. fail_pdev_add:
  146. for (count = 0; count < priv->child_count; count++)
  147. platform_device_put(priv->pdev_child_devices[count]);
  148. }
  149. bool lpass_bt_swr_check_core_votes(struct lpass_bt_swr_priv *priv)
  150. {
  151. bool ret = true;
  152. mutex_lock(&priv->vote_lock);
  153. if (!priv->dev_up ||
  154. (priv->lpass_core_hw_vote && !priv->core_hw_vote_count) ||
  155. (priv->lpass_audio_hw_vote && !priv->core_audio_vote_count))
  156. ret = false;
  157. mutex_unlock(&priv->vote_lock);
  158. return ret;
  159. }
  160. static int lpass_bt_swr_core_vote(void *handle, bool enable)
  161. {
  162. int rc = 0;
  163. struct lpass_bt_swr_priv *priv = (struct lpass_bt_swr_priv *) handle;
  164. if (priv == NULL) {
  165. pr_err_ratelimited("%s: priv data is NULL\n", __func__);
  166. return -EINVAL;
  167. }
  168. if (!priv->dev_up && enable) {
  169. pr_err("%s: adsp is not up\n", __func__);
  170. return -EINVAL;
  171. }
  172. if (enable) {
  173. pm_runtime_get_sync(priv->dev);
  174. if (lpass_bt_swr_check_core_votes(priv))
  175. rc = 0;
  176. else
  177. rc = -ENOTSYNC;
  178. } else {
  179. pm_runtime_put_autosuspend(priv->dev);
  180. pm_runtime_mark_last_busy(priv->dev);
  181. }
  182. return rc;
  183. }
  184. static int lpass_bt_swr_mclk_enable(
  185. struct lpass_bt_swr_priv *priv,
  186. bool mclk_enable)
  187. {
  188. int ret = 0;
  189. dev_dbg(priv->dev, "%s: mclk_enable = %u\n",
  190. __func__, mclk_enable);
  191. ret = lpass_bt_swr_core_vote(priv, true);
  192. if (ret < 0) {
  193. dev_err_ratelimited(priv->dev,
  194. "%s: request core vote failed\n",
  195. __func__);
  196. goto exit;
  197. }
  198. if (mclk_enable) {
  199. ret = clk_prepare_enable(priv->clk_handle);
  200. if (ret < 0) {
  201. dev_err_ratelimited(priv->dev,
  202. "%s: bt_swr_clk enable failed\n", __func__);
  203. goto error;
  204. }
  205. if (priv->clk_handle_2x) {
  206. ret = clk_prepare_enable(priv->clk_handle_2x);
  207. if (ret < 0) {
  208. dev_err_ratelimited(priv->dev,
  209. "%s: bt_swr_2x_clk enable failed\n", __func__);
  210. clk_disable_unprepare(priv->clk_handle);
  211. }
  212. }
  213. } else {
  214. clk_disable_unprepare(priv->clk_handle);
  215. if (priv->clk_handle_2x)
  216. clk_disable_unprepare(priv->clk_handle_2x);
  217. }
  218. error:
  219. lpass_bt_swr_core_vote(priv, false);
  220. exit:
  221. return ret;
  222. }
  223. static int lpass_bt_swrm_clock(void *handle, bool enable)
  224. {
  225. struct lpass_bt_swr_priv *priv = (struct lpass_bt_swr_priv *) handle;
  226. int ret = 0;
  227. mutex_lock(&priv->swr_clk_lock);
  228. dev_dbg(priv->dev, "%s: swrm clock %s\n",
  229. __func__, (enable ? "enable" : "disable"));
  230. if (enable) {
  231. pm_runtime_get_sync(priv->dev);
  232. if (priv->swr_clk_users == 0) {
  233. ret = msm_cdc_pinctrl_select_active_state(
  234. priv->bt_swr_gpio_p);
  235. if (ret < 0) {
  236. dev_err_ratelimited(priv->dev,
  237. "%s: bt swr pinctrl enable failed\n",
  238. __func__);
  239. pm_runtime_mark_last_busy(priv->dev);
  240. pm_runtime_put_autosuspend(priv->dev);
  241. goto exit;
  242. }
  243. ret = lpass_bt_swr_mclk_enable(priv, true);
  244. if (ret < 0) {
  245. msm_cdc_pinctrl_select_sleep_state(
  246. priv->bt_swr_gpio_p);
  247. dev_err_ratelimited(priv->dev,
  248. "%s: lpass bt swr request clock enable failed\n",
  249. __func__);
  250. pm_runtime_mark_last_busy(priv->dev);
  251. pm_runtime_put_autosuspend(priv->dev);
  252. goto exit;
  253. }
  254. }
  255. priv->swr_clk_users++;
  256. pm_runtime_mark_last_busy(priv->dev);
  257. pm_runtime_put_autosuspend(priv->dev);
  258. } else {
  259. if (priv->swr_clk_users <= 0) {
  260. dev_err_ratelimited(priv->dev, "%s: clock already disabled\n",
  261. __func__);
  262. priv->swr_clk_users = 0;
  263. goto exit;
  264. }
  265. priv->swr_clk_users--;
  266. if (priv->swr_clk_users == 0) {
  267. lpass_bt_swr_mclk_enable(priv, false);
  268. ret = msm_cdc_pinctrl_select_sleep_state(
  269. priv->bt_swr_gpio_p);
  270. if (ret < 0) {
  271. dev_err_ratelimited(priv->dev,
  272. "%s: bt swr pinctrl disable failed\n",
  273. __func__);
  274. goto exit;
  275. }
  276. }
  277. }
  278. dev_dbg(priv->dev, "%s: swrm clock users %d\n",
  279. __func__, priv->swr_clk_users);
  280. exit:
  281. mutex_unlock(&priv->swr_clk_lock);
  282. return ret;
  283. }
  284. static void lpass_bt_swr_ssr_disable(struct device *dev, void *data)
  285. {
  286. struct lpass_bt_swr_priv *priv = data;
  287. if (!priv->dev_up) {
  288. dev_err_ratelimited(priv->dev,
  289. "%s: already disabled\n", __func__);
  290. return;
  291. }
  292. mutex_lock(&priv->ssr_lock);
  293. priv->dev_up = false;
  294. mutex_unlock(&priv->ssr_lock);
  295. swrm_wcd_notify(priv->swr_ctrl_data->lpass_bt_swr_pdev,
  296. SWR_DEVICE_SSR_DOWN, NULL);
  297. }
  298. static int lpass_bt_swr_ssr_enable(struct device *dev, void *data)
  299. {
  300. struct lpass_bt_swr_priv *priv = data;
  301. int ret;
  302. if (priv->initial_boot) {
  303. priv->initial_boot = false;
  304. return 0;
  305. }
  306. mutex_lock(&priv->ssr_lock);
  307. priv->dev_up = true;
  308. mutex_unlock(&priv->ssr_lock);
  309. mutex_lock(&priv->swr_clk_lock);
  310. dev_dbg(priv->dev, "%s: swrm clock users %d\n",
  311. __func__, priv->swr_clk_users);
  312. lpass_bt_swr_mclk_enable(priv, false);
  313. ret = msm_cdc_pinctrl_select_sleep_state(
  314. priv->bt_swr_gpio_p);
  315. if (ret < 0) {
  316. dev_err_ratelimited(priv->dev,
  317. "%s: bt swr pinctrl disable failed\n",
  318. __func__);
  319. }
  320. if (priv->swr_clk_users > 0) {
  321. lpass_bt_swr_mclk_enable(priv, true);
  322. ret = msm_cdc_pinctrl_select_active_state(
  323. priv->bt_swr_gpio_p);
  324. if (ret < 0) {
  325. dev_err_ratelimited(priv->dev,
  326. "%s: bt swr pinctrl enable failed\n",
  327. __func__);
  328. }
  329. }
  330. mutex_unlock(&priv->swr_clk_lock);
  331. swrm_wcd_notify(priv->swr_ctrl_data->lpass_bt_swr_pdev,
  332. SWR_DEVICE_SSR_UP, NULL);
  333. return 0;
  334. }
  335. static const struct snd_event_ops lpass_bt_swr_ssr_ops = {
  336. .enable = lpass_bt_swr_ssr_enable,
  337. .disable = lpass_bt_swr_ssr_disable,
  338. };
  339. static int lpass_bt_swr_probe(struct platform_device *pdev)
  340. {
  341. struct lpass_bt_swr_priv *priv;
  342. int ret;
  343. struct clk *lpass_core_hw_vote = NULL;
  344. struct clk *lpass_audio_hw_vote = NULL;
  345. struct clk *bt_swr_clk = NULL;
  346. struct clk *bt_swr_2x_clk = NULL;
  347. priv = devm_kzalloc(&pdev->dev, sizeof(struct lpass_bt_swr_priv),
  348. GFP_KERNEL);
  349. if (!priv)
  350. return -ENOMEM;
  351. BLOCKING_INIT_NOTIFIER_HEAD(&priv->notifier);
  352. priv->dev = &pdev->dev;
  353. priv->dev_up = true;
  354. priv->core_hw_vote_count = 0;
  355. priv->core_audio_vote_count = 0;
  356. dev_set_drvdata(&pdev->dev, priv);
  357. mutex_init(&priv->vote_lock);
  358. mutex_init(&priv->swr_clk_lock);
  359. mutex_init(&priv->ssr_lock);
  360. priv->bt_swr_gpio_p = of_parse_phandle(pdev->dev.of_node,
  361. "qcom,bt-swr-gpios", 0);
  362. if (!priv->bt_swr_gpio_p) {
  363. dev_err(&pdev->dev, "%s: swr_gpios handle not provided!\n",
  364. __func__);
  365. return -EINVAL;
  366. }
  367. if (msm_cdc_pinctrl_get_state(priv->bt_swr_gpio_p) < 0) {
  368. dev_info(&pdev->dev, "%s: failed to get swr pin state\n",
  369. __func__);
  370. return -EPROBE_DEFER;
  371. }
  372. /* Register LPASS core hw vote */
  373. lpass_core_hw_vote = devm_clk_get(&pdev->dev, "lpass_core_hw_vote");
  374. if (IS_ERR(lpass_core_hw_vote)) {
  375. ret = PTR_ERR(lpass_core_hw_vote);
  376. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  377. __func__, "lpass_core_hw_vote", ret);
  378. lpass_core_hw_vote = NULL;
  379. ret = 0;
  380. }
  381. priv->lpass_core_hw_vote = lpass_core_hw_vote;
  382. /* Register LPASS audio hw vote */
  383. lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
  384. if (IS_ERR(lpass_audio_hw_vote)) {
  385. ret = PTR_ERR(lpass_audio_hw_vote);
  386. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  387. __func__, "lpass_audio_hw_vote", ret);
  388. lpass_audio_hw_vote = NULL;
  389. ret = 0;
  390. }
  391. priv->lpass_audio_hw_vote = lpass_audio_hw_vote;
  392. /* Register bt swr clk vote */
  393. bt_swr_clk = devm_clk_get(&pdev->dev, "bt_swr_mclk_clk");
  394. if (IS_ERR(bt_swr_clk)) {
  395. ret = PTR_ERR(bt_swr_clk);
  396. dev_err(&pdev->dev, "%s: clk get %s failed %d\n",
  397. __func__, "bt_swr_clk", ret);
  398. return -EINVAL;
  399. }
  400. priv->clk_handle = bt_swr_clk;
  401. /* Register bt swr 2x clk vote */
  402. bt_swr_2x_clk = devm_clk_get(&pdev->dev, "bt_swr_mclk_clk_2x");
  403. if (IS_ERR(bt_swr_2x_clk)) {
  404. ret = PTR_ERR(bt_swr_2x_clk);
  405. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  406. __func__, "bt_swr_2x_clk", ret);
  407. bt_swr_2x_clk = NULL;
  408. ret = 0;
  409. }
  410. priv->clk_handle_2x = bt_swr_2x_clk;
  411. /* Add soundwire child devices. */
  412. INIT_WORK(&priv->lpass_bt_swr_add_child_devices_work,
  413. lpass_bt_swr_add_child_devices);
  414. priv->swr_plat_data.handle = (void *)priv;
  415. priv->swr_plat_data.read = NULL;
  416. priv->swr_plat_data.write = NULL;
  417. priv->swr_plat_data.bulk_write = NULL;
  418. priv->swr_plat_data.clk = lpass_bt_swrm_clock;
  419. priv->swr_plat_data.core_vote = lpass_bt_swr_core_vote;
  420. priv->swr_plat_data.handle_irq = NULL;
  421. lpass_bt_priv = priv;
  422. pm_runtime_set_autosuspend_delay(&pdev->dev, LPASS_BT_SWR_AUTO_SUSPEND_DELAY);
  423. pm_runtime_use_autosuspend(&pdev->dev);
  424. pm_runtime_set_suspended(&pdev->dev);
  425. pm_suspend_ignore_children(&pdev->dev, true);
  426. pm_runtime_enable(&pdev->dev);
  427. /* call scheduler to add child devices. */
  428. schedule_work(&priv->lpass_bt_swr_add_child_devices_work);
  429. priv->initial_boot = true;
  430. ret = snd_event_client_register(priv->dev, &lpass_bt_swr_ssr_ops, priv);
  431. if (!ret) {
  432. snd_event_notify(priv->dev, SND_EVENT_UP);
  433. dev_err(&pdev->dev, "%s: Registered SSR ops\n", __func__);
  434. } else {
  435. dev_err(&pdev->dev,
  436. "%s: Registration with SND event FWK failed ret = %d\n",
  437. __func__, ret);
  438. }
  439. return 0;
  440. }
  441. static int lpass_bt_swr_remove(struct platform_device *pdev)
  442. {
  443. struct lpass_bt_swr_priv *priv = dev_get_drvdata(&pdev->dev);
  444. if (!priv)
  445. return -EINVAL;
  446. pm_runtime_disable(&pdev->dev);
  447. pm_runtime_set_suspended(&pdev->dev);
  448. of_platform_depopulate(&pdev->dev);
  449. mutex_destroy(&priv->vote_lock);
  450. mutex_destroy(&priv->swr_clk_lock);
  451. mutex_destroy(&priv->ssr_lock);
  452. return 0;
  453. }
  454. #ifdef CONFIG_PM
  455. int lpass_bt_swr_runtime_resume(struct device *dev)
  456. {
  457. struct platform_device *pdev = to_platform_device(dev);
  458. struct lpass_bt_swr_priv *priv = platform_get_drvdata(pdev);
  459. int ret = 0;
  460. dev_dbg(dev, "%s, enter\n", __func__);
  461. mutex_lock(&priv->vote_lock);
  462. if (priv->lpass_core_hw_vote == NULL) {
  463. dev_dbg(dev, "%s: Invalid lpass core hw node\n", __func__);
  464. goto audio_vote;
  465. }
  466. if (priv->core_hw_vote_count == 0) {
  467. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_core_hw_vote, dev);
  468. if (ret < 0) {
  469. dev_err_ratelimited(dev, "%s:lpass core hw enable failed\n",
  470. __func__);
  471. goto audio_vote;
  472. }
  473. }
  474. priv->core_hw_vote_count++;
  475. audio_vote:
  476. if (priv->lpass_audio_hw_vote == NULL) {
  477. dev_dbg(dev, "%s: Invalid lpass audio hw node\n", __func__);
  478. goto done;
  479. }
  480. if (priv->core_audio_vote_count == 0) {
  481. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote, dev);
  482. if (ret < 0) {
  483. dev_err_ratelimited(dev, "%s:lpass audio hw enable failed\n",
  484. __func__);
  485. goto done;
  486. }
  487. }
  488. priv->core_audio_vote_count++;
  489. done:
  490. mutex_unlock(&priv->vote_lock);
  491. dev_dbg(dev, "%s, leave, hw_vote %d, audio_vote %d\n", __func__,
  492. priv->core_hw_vote_count, priv->core_audio_vote_count);
  493. pm_runtime_set_autosuspend_delay(priv->dev, LPASS_BT_SWR_AUTO_SUSPEND_DELAY);
  494. return 0;
  495. }
  496. int lpass_bt_swr_runtime_suspend(struct device *dev)
  497. {
  498. struct platform_device *pdev = to_platform_device(dev);
  499. struct lpass_bt_swr_priv *priv = platform_get_drvdata(pdev);
  500. dev_dbg(dev, "%s, enter\n", __func__);
  501. mutex_lock(&priv->vote_lock);
  502. if (priv->lpass_core_hw_vote != NULL) {
  503. if (--priv->core_hw_vote_count == 0)
  504. digital_cdc_rsc_mgr_hw_vote_disable(
  505. priv->lpass_core_hw_vote, dev);
  506. if (priv->core_hw_vote_count < 0)
  507. priv->core_hw_vote_count = 0;
  508. } else {
  509. dev_dbg(dev, "%s: Invalid lpass core hw node\n",
  510. __func__);
  511. }
  512. if (priv->lpass_audio_hw_vote != NULL) {
  513. if (--priv->core_audio_vote_count == 0)
  514. digital_cdc_rsc_mgr_hw_vote_disable(
  515. priv->lpass_audio_hw_vote, dev);
  516. if (priv->core_audio_vote_count < 0)
  517. priv->core_audio_vote_count = 0;
  518. } else {
  519. dev_dbg(dev, "%s: Invalid lpass audio hw node\n",
  520. __func__);
  521. }
  522. mutex_unlock(&priv->vote_lock);
  523. dev_dbg(dev, "%s, leave, hw_vote %d, audio_vote %d\n", __func__,
  524. priv->core_hw_vote_count, priv->core_audio_vote_count);
  525. return 0;
  526. }
  527. #endif /* CONFIG_PM */
  528. static const struct of_device_id lpass_bt_swr_dt_match[] = {
  529. {.compatible = "qcom,lpass-bt-swr"},
  530. {}
  531. };
  532. MODULE_DEVICE_TABLE(of, lpass_bt_swr_dt_match);
  533. static const struct dev_pm_ops lpass_bt_swr_pm_ops = {
  534. SET_SYSTEM_SLEEP_PM_OPS(
  535. pm_runtime_force_suspend,
  536. pm_runtime_force_resume
  537. )
  538. SET_RUNTIME_PM_OPS(
  539. lpass_bt_swr_runtime_suspend,
  540. lpass_bt_swr_runtime_resume,
  541. NULL
  542. )
  543. };
  544. static struct platform_driver lpass_bt_swr_drv = {
  545. .driver = {
  546. .name = "lpass-bt-swr",
  547. .pm = &lpass_bt_swr_pm_ops,
  548. .of_match_table = lpass_bt_swr_dt_match,
  549. .suppress_bind_attrs = true,
  550. },
  551. .probe = lpass_bt_swr_probe,
  552. .remove = lpass_bt_swr_remove,
  553. };
  554. static int lpass_bt_swr_drv_init(void)
  555. {
  556. return platform_driver_register(&lpass_bt_swr_drv);
  557. }
  558. static void lpass_bt_swr_drv_exit(void)
  559. {
  560. platform_driver_unregister(&lpass_bt_swr_drv);
  561. }
  562. static int __init lpass_bt_swr_init(void)
  563. {
  564. lpass_bt_swr_drv_init();
  565. return 0;
  566. }
  567. module_init(lpass_bt_swr_init);
  568. static void __exit lpass_bt_swr_exit(void)
  569. {
  570. lpass_bt_swr_drv_exit();
  571. }
  572. module_exit(lpass_bt_swr_exit);
  573. MODULE_SOFTDEP("pre: bt_fm_swr");
  574. MODULE_DESCRIPTION("LPASS BT SWR driver");
  575. MODULE_LICENSE("GPL");