aqt1000-internal.h 4.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /* Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. */
  4. #ifndef _AQT1000_INTERNAL_H
  5. #define _AQT1000_INTERNAL_H
  6. #include <linux/types.h>
  7. #include <linux/regmap.h>
  8. #include <sound/soc.h>
  9. #define AQT1000_RATES_MASK (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  10. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
  11. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\
  12. SNDRV_PCM_RATE_384000)
  13. /* Fractional Rates */
  14. #define AQT1000_FRAC_RATES_MASK (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\
  15. SNDRV_PCM_RATE_176400)
  16. #define AQT1000_FORMATS_S16_S24_LE (SNDRV_PCM_FMTBIT_S16_LE | \
  17. SNDRV_PCM_FMTBIT_S24_LE)
  18. #define AQT1000_FORMATS_S16_S24_S32_LE (SNDRV_PCM_FMTBIT_S16_LE | \
  19. SNDRV_PCM_FMTBIT_S24_LE | \
  20. SNDRV_PCM_FMTBIT_S32_LE)
  21. #define AQT1000_FORMATS_S16_LE (SNDRV_PCM_FMTBIT_S16_LE)
  22. /* Macros for packing register writes into a U32 */
  23. #define AQT1000_PACKED_REG_SIZE sizeof(u32)
  24. #define AQT1000_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
  25. do { \
  26. ((reg) = ((packed >> 16) & (0xffff))); \
  27. ((mask) = ((packed >> 8) & (0xff))); \
  28. ((val) = ((packed) & (0xff))); \
  29. } while (0)
  30. #define STRING(name) #name
  31. #define AQT_DAPM_ENUM(name, reg, offset, text) \
  32. static SOC_ENUM_SINGLE_DECL(name##_enum, reg, offset, text); \
  33. static const struct snd_kcontrol_new name##_mux = \
  34. SOC_DAPM_ENUM(STRING(name), name##_enum)
  35. #define AQT_DAPM_ENUM_EXT(name, reg, offset, text, getname, putname) \
  36. static SOC_ENUM_SINGLE_DECL(name##_enum, reg, offset, text); \
  37. static const struct snd_kcontrol_new name##_mux = \
  38. SOC_DAPM_ENUM_EXT(STRING(name), name##_enum, getname, putname)
  39. #define AQT_DAPM_MUX(name, shift, kctl) \
  40. SND_SOC_DAPM_MUX(name, SND_SOC_NOPM, shift, 0, &kctl##_mux)
  41. #define AQT1000_INTERP_MUX_NUM_INPUTS 3
  42. #define AQT1000_RX_PATH_CTL_OFFSET 20
  43. #define BYTE_BIT_MASK(nr) (1 << ((nr) % BITS_PER_BYTE))
  44. #define AQT1000_REG_BITS 8
  45. #define AQT1000_MAX_VALID_ADC_MUX 3
  46. #define AQT1000_AMIC_PWR_LEVEL_LP 0
  47. #define AQT1000_AMIC_PWR_LEVEL_DEFAULT 1
  48. #define AQT1000_AMIC_PWR_LEVEL_HP 2
  49. #define AQT1000_AMIC_PWR_LVL_MASK 0x60
  50. #define AQT1000_AMIC_PWR_LVL_SHIFT 0x5
  51. #define AQT1000_DEC_PWR_LVL_MASK 0x06
  52. #define AQT1000_DEC_PWR_LVL_DF 0x00
  53. #define AQT1000_DEC_PWR_LVL_LP 0x02
  54. #define AQT1000_DEC_PWR_LVL_HP 0x04
  55. #define AQT1000_STRING_LEN 100
  56. #define AQT1000_CDC_SIDETONE_IIR_COEFF_MAX 5
  57. #define AQT1000_MAX_MICBIAS 1
  58. #define DAPM_MICBIAS1_STANDALONE "MIC BIAS1 Standalone"
  59. #define TX_HPF_CUT_OFF_FREQ_MASK 0x60
  60. #define CF_MIN_3DB_4HZ 0x0
  61. #define CF_MIN_3DB_75HZ 0x1
  62. #define CF_MIN_3DB_150HZ 0x2
  63. enum {
  64. AUDIO_NOMINAL,
  65. HPH_PA_DELAY,
  66. CLSH_Z_CONFIG,
  67. ANC_MIC_AMIC1,
  68. ANC_MIC_AMIC2,
  69. ANC_MIC_AMIC3,
  70. };
  71. enum {
  72. INTn_1_INP_SEL_ZERO = 0,
  73. INTn_1_INP_SEL_DEC0,
  74. INTn_1_INP_SEL_DEC1,
  75. INTn_1_INP_SEL_IIR0,
  76. INTn_1_INP_SEL_IIR1,
  77. INTn_1_INP_SEL_RX0,
  78. INTn_1_INP_SEL_RX1,
  79. };
  80. enum {
  81. INTn_2_INP_SEL_ZERO = 0,
  82. INTn_2_INP_SEL_RX0,
  83. INTn_2_INP_SEL_RX1,
  84. INTn_2_INP_SEL_PROXIMITY,
  85. };
  86. /* Codec supports 2 IIR filters */
  87. enum {
  88. IIR0 = 0,
  89. IIR1,
  90. IIR_MAX,
  91. };
  92. enum {
  93. ASRC_IN_HPHL,
  94. ASRC_IN_HPHR,
  95. ASRC_INVALID,
  96. };
  97. enum {
  98. CONV_88P2K_TO_384K,
  99. CONV_96K_TO_352P8K,
  100. CONV_352P8K_TO_384K,
  101. CONV_384K_TO_352P8K,
  102. CONV_384K_TO_384K,
  103. CONV_96K_TO_384K,
  104. };
  105. enum aqt_notify_event {
  106. AQT_EVENT_INVALID,
  107. /* events for micbias ON and OFF */
  108. AQT_EVENT_PRE_MICBIAS_1_OFF,
  109. AQT_EVENT_POST_MICBIAS_1_OFF,
  110. AQT_EVENT_PRE_MICBIAS_1_ON,
  111. AQT_EVENT_POST_MICBIAS_1_ON,
  112. AQT_EVENT_PRE_DAPM_MICBIAS_1_OFF,
  113. AQT_EVENT_POST_DAPM_MICBIAS_1_OFF,
  114. AQT_EVENT_PRE_DAPM_MICBIAS_1_ON,
  115. AQT_EVENT_POST_DAPM_MICBIAS_1_ON,
  116. /* events for PA ON and OFF */
  117. AQT_EVENT_PRE_HPHL_PA_ON,
  118. AQT_EVENT_POST_HPHL_PA_OFF,
  119. AQT_EVENT_PRE_HPHR_PA_ON,
  120. AQT_EVENT_POST_HPHR_PA_OFF,
  121. AQT_EVENT_PRE_HPHL_PA_OFF,
  122. AQT_EVENT_PRE_HPHR_PA_OFF,
  123. AQT_EVENT_OCP_OFF,
  124. AQT_EVENT_OCP_ON,
  125. AQT_EVENT_LAST,
  126. };
  127. struct interp_sample_rate {
  128. int sample_rate;
  129. int rate_val;
  130. };
  131. extern struct regmap_config aqt1000_regmap_config;
  132. extern int aqt_register_codec(struct device *dev);
  133. #endif /* _AQT1000_INTERNAL_H */