tcl_entrance_from_ppe_ring.h 19 KB

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  1. /* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14. */
  15. #ifndef _TCL_ENTRANCE_FROM_PPE_RING_H_
  16. #define _TCL_ENTRANCE_FROM_PPE_RING_H_
  17. #if !defined(__ASSEMBLER__)
  18. #endif
  19. #define NUM_OF_DWORDS_TCL_ENTRANCE_FROM_PPE_RING 8
  20. struct tcl_entrance_from_ppe_ring {
  21. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  22. uint32_t buffer_addr_lo : 32;
  23. uint32_t buffer_addr_hi : 8,
  24. drop_prec : 2,
  25. fake_mac_header : 1,
  26. known_ind : 1,
  27. cpu_code_valid : 1,
  28. tunnel_term_ind : 1,
  29. tunnel_type : 1,
  30. wifi_qos_flag : 1,
  31. service_code : 9,
  32. reserved_1b : 1,
  33. int_pri : 4,
  34. more : 1,
  35. reserved_1a : 1;
  36. uint32_t opaque_lo : 32;
  37. uint32_t opaque_hi : 32;
  38. uint32_t src_info : 16,
  39. dst_info : 16;
  40. uint32_t data_length : 18,
  41. pool_id : 6,
  42. wifi_qos : 8;
  43. uint32_t data_offset : 12,
  44. l4_csum_status : 1,
  45. l3_csum_status : 1,
  46. hash_flag : 2,
  47. hash_value : 16;
  48. uint32_t dscp : 8,
  49. valid_toggle : 1,
  50. pppoe_flag : 1,
  51. svlan_flag : 1,
  52. cvlan_flag : 1,
  53. pid : 4,
  54. l3_offset : 8,
  55. l4_offset : 8;
  56. #else
  57. uint32_t buffer_addr_lo : 32;
  58. uint32_t reserved_1a : 1,
  59. more : 1,
  60. int_pri : 4,
  61. reserved_1b : 1,
  62. service_code : 9,
  63. wifi_qos_flag : 1,
  64. tunnel_type : 1,
  65. tunnel_term_ind : 1,
  66. cpu_code_valid : 1,
  67. known_ind : 1,
  68. fake_mac_header : 1,
  69. drop_prec : 2,
  70. buffer_addr_hi : 8;
  71. uint32_t opaque_lo : 32;
  72. uint32_t opaque_hi : 32;
  73. uint32_t dst_info : 16,
  74. src_info : 16;
  75. uint32_t wifi_qos : 8,
  76. pool_id : 6,
  77. data_length : 18;
  78. uint32_t hash_value : 16,
  79. hash_flag : 2,
  80. l3_csum_status : 1,
  81. l4_csum_status : 1,
  82. data_offset : 12;
  83. uint32_t l4_offset : 8,
  84. l3_offset : 8,
  85. pid : 4,
  86. cvlan_flag : 1,
  87. svlan_flag : 1,
  88. pppoe_flag : 1,
  89. valid_toggle : 1,
  90. dscp : 8;
  91. #endif
  92. };
  93. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_OFFSET 0x00000000
  94. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_LSB 0
  95. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_MSB 31
  96. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_LO_MASK 0xffffffff
  97. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_OFFSET 0x00000004
  98. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_LSB 0
  99. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_MSB 7
  100. #define TCL_ENTRANCE_FROM_PPE_RING_BUFFER_ADDR_HI_MASK 0x000000ff
  101. #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_OFFSET 0x00000004
  102. #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_LSB 8
  103. #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_MSB 9
  104. #define TCL_ENTRANCE_FROM_PPE_RING_DROP_PREC_MASK 0x00000300
  105. #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_OFFSET 0x00000004
  106. #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_LSB 10
  107. #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_MSB 10
  108. #define TCL_ENTRANCE_FROM_PPE_RING_FAKE_MAC_HEADER_MASK 0x00000400
  109. #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_OFFSET 0x00000004
  110. #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_LSB 11
  111. #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_MSB 11
  112. #define TCL_ENTRANCE_FROM_PPE_RING_KNOWN_IND_MASK 0x00000800
  113. #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_OFFSET 0x00000004
  114. #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_LSB 12
  115. #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_MSB 12
  116. #define TCL_ENTRANCE_FROM_PPE_RING_CPU_CODE_VALID_MASK 0x00001000
  117. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_OFFSET 0x00000004
  118. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_LSB 13
  119. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_MSB 13
  120. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TERM_IND_MASK 0x00002000
  121. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_OFFSET 0x00000004
  122. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_LSB 14
  123. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_MSB 14
  124. #define TCL_ENTRANCE_FROM_PPE_RING_TUNNEL_TYPE_MASK 0x00004000
  125. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_OFFSET 0x00000004
  126. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_LSB 15
  127. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_MSB 15
  128. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_FLAG_MASK 0x00008000
  129. #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_OFFSET 0x00000004
  130. #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_LSB 16
  131. #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_MSB 24
  132. #define TCL_ENTRANCE_FROM_PPE_RING_SERVICE_CODE_MASK 0x01ff0000
  133. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_OFFSET 0x00000004
  134. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_LSB 25
  135. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_MSB 25
  136. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1B_MASK 0x02000000
  137. #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_OFFSET 0x00000004
  138. #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_LSB 26
  139. #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_MSB 29
  140. #define TCL_ENTRANCE_FROM_PPE_RING_INT_PRI_MASK 0x3c000000
  141. #define TCL_ENTRANCE_FROM_PPE_RING_MORE_OFFSET 0x00000004
  142. #define TCL_ENTRANCE_FROM_PPE_RING_MORE_LSB 30
  143. #define TCL_ENTRANCE_FROM_PPE_RING_MORE_MSB 30
  144. #define TCL_ENTRANCE_FROM_PPE_RING_MORE_MASK 0x40000000
  145. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_OFFSET 0x00000004
  146. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_LSB 31
  147. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_MSB 31
  148. #define TCL_ENTRANCE_FROM_PPE_RING_RESERVED_1A_MASK 0x80000000
  149. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_OFFSET 0x00000008
  150. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_LSB 0
  151. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_MSB 31
  152. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_LO_MASK 0xffffffff
  153. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_OFFSET 0x0000000c
  154. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_LSB 0
  155. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_MSB 31
  156. #define TCL_ENTRANCE_FROM_PPE_RING_OPAQUE_HI_MASK 0xffffffff
  157. #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_OFFSET 0x00000010
  158. #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_LSB 0
  159. #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_MSB 15
  160. #define TCL_ENTRANCE_FROM_PPE_RING_SRC_INFO_MASK 0x0000ffff
  161. #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_OFFSET 0x00000010
  162. #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_LSB 16
  163. #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_MSB 31
  164. #define TCL_ENTRANCE_FROM_PPE_RING_DST_INFO_MASK 0xffff0000
  165. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_OFFSET 0x00000014
  166. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_LSB 0
  167. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_MSB 17
  168. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_LENGTH_MASK 0x0003ffff
  169. #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_OFFSET 0x00000014
  170. #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_LSB 18
  171. #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_MSB 23
  172. #define TCL_ENTRANCE_FROM_PPE_RING_POOL_ID_MASK 0x00fc0000
  173. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_OFFSET 0x00000014
  174. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_LSB 24
  175. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_MSB 31
  176. #define TCL_ENTRANCE_FROM_PPE_RING_WIFI_QOS_MASK 0xff000000
  177. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_OFFSET 0x00000018
  178. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_LSB 0
  179. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_MSB 11
  180. #define TCL_ENTRANCE_FROM_PPE_RING_DATA_OFFSET_MASK 0x00000fff
  181. #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_OFFSET 0x00000018
  182. #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_LSB 12
  183. #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_MSB 12
  184. #define TCL_ENTRANCE_FROM_PPE_RING_L4_CSUM_STATUS_MASK 0x00001000
  185. #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_OFFSET 0x00000018
  186. #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_LSB 13
  187. #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_MSB 13
  188. #define TCL_ENTRANCE_FROM_PPE_RING_L3_CSUM_STATUS_MASK 0x00002000
  189. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_OFFSET 0x00000018
  190. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_LSB 14
  191. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_MSB 15
  192. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_FLAG_MASK 0x0000c000
  193. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_OFFSET 0x00000018
  194. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_LSB 16
  195. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_MSB 31
  196. #define TCL_ENTRANCE_FROM_PPE_RING_HASH_VALUE_MASK 0xffff0000
  197. #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_OFFSET 0x0000001c
  198. #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_LSB 0
  199. #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_MSB 7
  200. #define TCL_ENTRANCE_FROM_PPE_RING_DSCP_MASK 0x000000ff
  201. #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_OFFSET 0x0000001c
  202. #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_LSB 8
  203. #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_MSB 8
  204. #define TCL_ENTRANCE_FROM_PPE_RING_VALID_TOGGLE_MASK 0x00000100
  205. #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_OFFSET 0x0000001c
  206. #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_LSB 9
  207. #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_MSB 9
  208. #define TCL_ENTRANCE_FROM_PPE_RING_PPPOE_FLAG_MASK 0x00000200
  209. #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_OFFSET 0x0000001c
  210. #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_LSB 10
  211. #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_MSB 10
  212. #define TCL_ENTRANCE_FROM_PPE_RING_SVLAN_FLAG_MASK 0x00000400
  213. #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_OFFSET 0x0000001c
  214. #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_LSB 11
  215. #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_MSB 11
  216. #define TCL_ENTRANCE_FROM_PPE_RING_CVLAN_FLAG_MASK 0x00000800
  217. #define TCL_ENTRANCE_FROM_PPE_RING_PID_OFFSET 0x0000001c
  218. #define TCL_ENTRANCE_FROM_PPE_RING_PID_LSB 12
  219. #define TCL_ENTRANCE_FROM_PPE_RING_PID_MSB 15
  220. #define TCL_ENTRANCE_FROM_PPE_RING_PID_MASK 0x0000f000
  221. #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_OFFSET 0x0000001c
  222. #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_LSB 16
  223. #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_MSB 23
  224. #define TCL_ENTRANCE_FROM_PPE_RING_L3_OFFSET_MASK 0x00ff0000
  225. #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_OFFSET 0x0000001c
  226. #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_LSB 24
  227. #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_MSB 31
  228. #define TCL_ENTRANCE_FROM_PPE_RING_L4_OFFSET_MASK 0xff000000
  229. #endif