sm6150.c 235 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wsa881x.h"
  39. #include "codecs/bolero/bolero-cdc.h"
  40. #include <dt-bindings/sound/audio-codec-port-types.h>
  41. #include "codecs/bolero/wsa-macro.h"
  42. #define DRV_NAME "sm6150-asoc-snd"
  43. #define __CHIPSET__ "SM6150 "
  44. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  45. #define SAMPLING_RATE_8KHZ 8000
  46. #define SAMPLING_RATE_11P025KHZ 11025
  47. #define SAMPLING_RATE_16KHZ 16000
  48. #define SAMPLING_RATE_22P05KHZ 22050
  49. #define SAMPLING_RATE_32KHZ 32000
  50. #define SAMPLING_RATE_44P1KHZ 44100
  51. #define SAMPLING_RATE_48KHZ 48000
  52. #define SAMPLING_RATE_88P2KHZ 88200
  53. #define SAMPLING_RATE_96KHZ 96000
  54. #define SAMPLING_RATE_176P4KHZ 176400
  55. #define SAMPLING_RATE_192KHZ 192000
  56. #define SAMPLING_RATE_352P8KHZ 352800
  57. #define SAMPLING_RATE_384KHZ 384000
  58. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  59. #define WCD9XXX_MBHC_DEF_RLOADS 5
  60. #define CODEC_EXT_CLK_RATE 9600000
  61. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  62. #define DEV_NAME_STR_LEN 32
  63. #define WSA8810_NAME_1 "wsa881x.20170211"
  64. #define WSA8810_NAME_2 "wsa881x.20170212"
  65. #define WCN_CDC_SLIM_RX_CH_MAX 2
  66. #define WCN_CDC_SLIM_TX_CH_MAX 3
  67. #define TDM_CHANNEL_MAX 8
  68. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  69. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  70. #define MSM_HIFI_ON 1
  71. enum {
  72. SLIM_RX_0 = 0,
  73. SLIM_RX_1,
  74. SLIM_RX_2,
  75. SLIM_RX_3,
  76. SLIM_RX_4,
  77. SLIM_RX_5,
  78. SLIM_RX_6,
  79. SLIM_RX_7,
  80. SLIM_RX_MAX,
  81. };
  82. enum {
  83. SLIM_TX_0 = 0,
  84. SLIM_TX_1,
  85. SLIM_TX_2,
  86. SLIM_TX_3,
  87. SLIM_TX_4,
  88. SLIM_TX_5,
  89. SLIM_TX_6,
  90. SLIM_TX_7,
  91. SLIM_TX_8,
  92. SLIM_TX_MAX,
  93. };
  94. enum {
  95. PRIM_MI2S = 0,
  96. SEC_MI2S,
  97. TERT_MI2S,
  98. QUAT_MI2S,
  99. QUIN_MI2S,
  100. MI2S_MAX,
  101. };
  102. enum {
  103. PRIM_AUX_PCM = 0,
  104. SEC_AUX_PCM,
  105. TERT_AUX_PCM,
  106. QUAT_AUX_PCM,
  107. QUIN_AUX_PCM,
  108. AUX_PCM_MAX,
  109. };
  110. enum {
  111. WSA_CDC_DMA_RX_0 = 0,
  112. WSA_CDC_DMA_RX_1,
  113. RX_CDC_DMA_RX_0,
  114. RX_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_2,
  116. RX_CDC_DMA_RX_3,
  117. RX_CDC_DMA_RX_5,
  118. CDC_DMA_RX_MAX,
  119. };
  120. enum {
  121. WSA_CDC_DMA_TX_0 = 0,
  122. WSA_CDC_DMA_TX_1,
  123. WSA_CDC_DMA_TX_2,
  124. TX_CDC_DMA_TX_0,
  125. TX_CDC_DMA_TX_3,
  126. TX_CDC_DMA_TX_4,
  127. CDC_DMA_TX_MAX,
  128. };
  129. struct mi2s_conf {
  130. struct mutex lock;
  131. u32 ref_cnt;
  132. u32 msm_is_mi2s_master;
  133. };
  134. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  135. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  136. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  137. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  140. };
  141. struct dev_config {
  142. u32 sample_rate;
  143. u32 bit_format;
  144. u32 channels;
  145. };
  146. enum {
  147. DP_RX_IDX = 0,
  148. EXT_DISP_RX_IDX_MAX,
  149. };
  150. struct msm_wsa881x_dev_info {
  151. struct device_node *of_node;
  152. u32 index;
  153. };
  154. struct aux_codec_dev_info {
  155. struct device_node *of_node;
  156. u32 index;
  157. };
  158. enum pinctrl_pin_state {
  159. STATE_DISABLE = 0, /* All pins are in sleep state */
  160. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  161. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  162. };
  163. struct msm_pinctrl_info {
  164. struct pinctrl *pinctrl;
  165. struct pinctrl_state *mi2s_disable;
  166. struct pinctrl_state *tdm_disable;
  167. struct pinctrl_state *mi2s_active;
  168. struct pinctrl_state *tdm_active;
  169. enum pinctrl_pin_state curr_state;
  170. };
  171. struct msm_asoc_mach_data {
  172. struct snd_info_entry *codec_root;
  173. struct msm_pinctrl_info pinctrl_info;
  174. int usbc_en2_gpio; /* used by gpio driver API */
  175. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  176. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  177. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  178. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  179. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  180. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  181. };
  182. struct msm_asoc_wcd93xx_codec {
  183. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  184. enum afe_config_type config_type);
  185. };
  186. static const char *const pin_states[] = {"sleep", "i2s-active",
  187. "tdm-active"};
  188. static struct snd_soc_card snd_soc_card_sm6150_msm;
  189. enum {
  190. TDM_0 = 0,
  191. TDM_1,
  192. TDM_2,
  193. TDM_3,
  194. TDM_4,
  195. TDM_5,
  196. TDM_6,
  197. TDM_7,
  198. TDM_PORT_MAX,
  199. };
  200. enum {
  201. TDM_PRI = 0,
  202. TDM_SEC,
  203. TDM_TERT,
  204. TDM_QUAT,
  205. TDM_QUIN,
  206. TDM_INTERFACE_MAX,
  207. };
  208. struct tdm_port {
  209. u32 mode;
  210. u32 channel;
  211. };
  212. /* TDM default config */
  213. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  214. { /* PRI TDM */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  223. },
  224. { /* SEC TDM */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  233. },
  234. { /* TERT TDM */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  243. },
  244. { /* QUAT TDM */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  253. },
  254. { /* QUIN TDM */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  263. }
  264. };
  265. /* TDM default config */
  266. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  267. { /* PRI TDM */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  276. },
  277. { /* SEC TDM */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  286. },
  287. { /* TERT TDM */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  296. },
  297. { /* QUAT TDM */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  306. },
  307. { /* QUIN TDM */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  316. }
  317. };
  318. /* Default configuration of slimbus channels */
  319. static struct dev_config slim_rx_cfg[] = {
  320. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. };
  329. static struct dev_config slim_tx_cfg[] = {
  330. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. };
  340. /* Default configuration of Codec DMA Interface Tx */
  341. static struct dev_config cdc_dma_rx_cfg[] = {
  342. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. };
  350. /* Default configuration of Codec DMA Interface Rx */
  351. static struct dev_config cdc_dma_tx_cfg[] = {
  352. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. };
  359. /* Default configuration of external display BE */
  360. static struct dev_config ext_disp_rx_cfg[] = {
  361. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. };
  363. static struct dev_config usb_rx_cfg = {
  364. .sample_rate = SAMPLING_RATE_48KHZ,
  365. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  366. .channels = 2,
  367. };
  368. static struct dev_config usb_tx_cfg = {
  369. .sample_rate = SAMPLING_RATE_48KHZ,
  370. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  371. .channels = 1,
  372. };
  373. static struct dev_config proxy_rx_cfg = {
  374. .sample_rate = SAMPLING_RATE_48KHZ,
  375. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  376. .channels = 2,
  377. };
  378. /* Default configuration of MI2S channels */
  379. static struct dev_config mi2s_rx_cfg[] = {
  380. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  381. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  382. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. };
  386. static struct dev_config mi2s_tx_cfg[] = {
  387. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. };
  393. static struct dev_config aux_pcm_rx_cfg[] = {
  394. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. };
  400. static struct dev_config aux_pcm_tx_cfg[] = {
  401. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. };
  407. static int msm_vi_feed_tx_ch = 2;
  408. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  409. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  410. "Five", "Six", "Seven",
  411. "Eight"};
  412. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  413. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  414. "S32_LE"};
  415. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  416. "S24_3LE"};
  417. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  418. "KHZ_32", "KHZ_44P1", "KHZ_48",
  419. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  420. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  421. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  422. "KHZ_44P1", "KHZ_48",
  423. "KHZ_88P2", "KHZ_96"};
  424. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  425. "Five", "Six", "Seven",
  426. "Eight"};
  427. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  428. "Six", "Seven", "Eight"};
  429. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  430. "KHZ_16", "KHZ_22P05",
  431. "KHZ_32", "KHZ_44P1", "KHZ_48",
  432. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  433. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  434. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  435. "KHZ_192", "KHZ_32", "KHZ_44P1",
  436. "KHZ_88P2", "KHZ_176P4" };
  437. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  438. "Five", "Six", "Seven", "Eight"};
  439. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  440. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  441. "KHZ_48", "KHZ_176P4",
  442. "KHZ_352P8"};
  443. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  444. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  445. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  446. "KHZ_48", "KHZ_96", "KHZ_192"};
  447. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  448. "Five", "Six", "Seven",
  449. "Eight"};
  450. static const char *const hifi_text[] = {"Off", "On"};
  451. static const char *const qos_text[] = {"Disable", "Enable"};
  452. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  453. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  454. "Five", "Six", "Seven",
  455. "Eight"};
  456. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  457. "KHZ_16", "KHZ_22P05",
  458. "KHZ_32", "KHZ_44P1", "KHZ_48",
  459. "KHZ_88P2", "KHZ_96",
  460. "KHZ_176P4", "KHZ_192",
  461. "KHZ_352P8", "KHZ_384"};
  462. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  489. ext_disp_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  557. cdc_dma_sample_rate_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  559. cdc_dma_sample_rate_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  561. cdc_dma_sample_rate_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  563. cdc_dma_sample_rate_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static struct platform_device *spdev;
  583. static int msm_hifi_control;
  584. static bool is_initial_boot;
  585. static bool codec_reg_done;
  586. static struct snd_soc_aux_dev *msm_aux_dev;
  587. static struct snd_soc_codec_conf *msm_codec_conf;
  588. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  589. static int dmic_0_1_gpio_cnt;
  590. static int dmic_2_3_gpio_cnt;
  591. static void *def_wcd_mbhc_cal(void);
  592. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  593. int enable, bool dapm);
  594. static int msm_wsa881x_init(struct snd_soc_component *component);
  595. static int msm_aux_codec_init(struct snd_soc_component *component);
  596. /*
  597. * Need to report LINEIN
  598. * if R/L channel impedance is larger than 5K ohm
  599. */
  600. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  601. .read_fw_bin = false,
  602. .calibration = NULL,
  603. .detect_extn_cable = true,
  604. .mono_stero_detection = false,
  605. .swap_gnd_mic = NULL,
  606. .hs_ext_micbias = true,
  607. .key_code[0] = KEY_MEDIA,
  608. .key_code[1] = KEY_VOICECOMMAND,
  609. .key_code[2] = KEY_VOLUMEUP,
  610. .key_code[3] = KEY_VOLUMEDOWN,
  611. .key_code[4] = 0,
  612. .key_code[5] = 0,
  613. .key_code[6] = 0,
  614. .key_code[7] = 0,
  615. .linein_th = 5000,
  616. .moisture_en = true,
  617. .mbhc_micbias = MIC_BIAS_2,
  618. .anc_micbias = MIC_BIAS_2,
  619. .enable_anc_mic_detect = false,
  620. };
  621. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  622. {"MIC BIAS1", NULL, "MCLK TX"},
  623. {"MIC BIAS2", NULL, "MCLK TX"},
  624. {"MIC BIAS3", NULL, "MCLK TX"},
  625. {"MIC BIAS4", NULL, "MCLK TX"},
  626. };
  627. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  628. {
  629. AFE_API_VERSION_I2S_CONFIG,
  630. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  631. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  632. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  633. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  634. 0,
  635. },
  636. {
  637. AFE_API_VERSION_I2S_CONFIG,
  638. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  639. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  640. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  641. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  642. 0,
  643. },
  644. {
  645. AFE_API_VERSION_I2S_CONFIG,
  646. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  647. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  648. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  649. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  650. 0,
  651. },
  652. {
  653. AFE_API_VERSION_I2S_CONFIG,
  654. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  655. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  656. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  657. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  658. 0,
  659. },
  660. {
  661. AFE_API_VERSION_I2S_CONFIG,
  662. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  663. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  664. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  665. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  666. 0,
  667. }
  668. };
  669. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  670. static int slim_get_sample_rate_val(int sample_rate)
  671. {
  672. int sample_rate_val = 0;
  673. switch (sample_rate) {
  674. case SAMPLING_RATE_8KHZ:
  675. sample_rate_val = 0;
  676. break;
  677. case SAMPLING_RATE_16KHZ:
  678. sample_rate_val = 1;
  679. break;
  680. case SAMPLING_RATE_32KHZ:
  681. sample_rate_val = 2;
  682. break;
  683. case SAMPLING_RATE_44P1KHZ:
  684. sample_rate_val = 3;
  685. break;
  686. case SAMPLING_RATE_48KHZ:
  687. sample_rate_val = 4;
  688. break;
  689. case SAMPLING_RATE_88P2KHZ:
  690. sample_rate_val = 5;
  691. break;
  692. case SAMPLING_RATE_96KHZ:
  693. sample_rate_val = 6;
  694. break;
  695. case SAMPLING_RATE_176P4KHZ:
  696. sample_rate_val = 7;
  697. break;
  698. case SAMPLING_RATE_192KHZ:
  699. sample_rate_val = 8;
  700. break;
  701. case SAMPLING_RATE_352P8KHZ:
  702. sample_rate_val = 9;
  703. break;
  704. case SAMPLING_RATE_384KHZ:
  705. sample_rate_val = 10;
  706. break;
  707. default:
  708. sample_rate_val = 4;
  709. break;
  710. }
  711. return sample_rate_val;
  712. }
  713. static int slim_get_sample_rate(int value)
  714. {
  715. int sample_rate = 0;
  716. switch (value) {
  717. case 0:
  718. sample_rate = SAMPLING_RATE_8KHZ;
  719. break;
  720. case 1:
  721. sample_rate = SAMPLING_RATE_16KHZ;
  722. break;
  723. case 2:
  724. sample_rate = SAMPLING_RATE_32KHZ;
  725. break;
  726. case 3:
  727. sample_rate = SAMPLING_RATE_44P1KHZ;
  728. break;
  729. case 4:
  730. sample_rate = SAMPLING_RATE_48KHZ;
  731. break;
  732. case 5:
  733. sample_rate = SAMPLING_RATE_88P2KHZ;
  734. break;
  735. case 6:
  736. sample_rate = SAMPLING_RATE_96KHZ;
  737. break;
  738. case 7:
  739. sample_rate = SAMPLING_RATE_176P4KHZ;
  740. break;
  741. case 8:
  742. sample_rate = SAMPLING_RATE_192KHZ;
  743. break;
  744. case 9:
  745. sample_rate = SAMPLING_RATE_352P8KHZ;
  746. break;
  747. case 10:
  748. sample_rate = SAMPLING_RATE_384KHZ;
  749. break;
  750. default:
  751. sample_rate = SAMPLING_RATE_48KHZ;
  752. break;
  753. }
  754. return sample_rate;
  755. }
  756. static int slim_get_bit_format_val(int bit_format)
  757. {
  758. int val = 0;
  759. switch (bit_format) {
  760. case SNDRV_PCM_FORMAT_S32_LE:
  761. val = 3;
  762. break;
  763. case SNDRV_PCM_FORMAT_S24_3LE:
  764. val = 2;
  765. break;
  766. case SNDRV_PCM_FORMAT_S24_LE:
  767. val = 1;
  768. break;
  769. case SNDRV_PCM_FORMAT_S16_LE:
  770. default:
  771. val = 0;
  772. break;
  773. }
  774. return val;
  775. }
  776. static int slim_get_bit_format(int val)
  777. {
  778. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  779. switch (val) {
  780. case 0:
  781. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  782. break;
  783. case 1:
  784. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  785. break;
  786. case 2:
  787. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  788. break;
  789. case 3:
  790. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  791. break;
  792. default:
  793. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  794. break;
  795. }
  796. return bit_fmt;
  797. }
  798. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  799. {
  800. int port_id = 0;
  801. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  802. port_id = SLIM_RX_0;
  803. } else if (strnstr(kcontrol->id.name,
  804. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  805. port_id = SLIM_RX_2;
  806. } else if (strnstr(kcontrol->id.name,
  807. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  808. port_id = SLIM_RX_5;
  809. } else if (strnstr(kcontrol->id.name,
  810. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  811. port_id = SLIM_RX_6;
  812. } else if (strnstr(kcontrol->id.name,
  813. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  814. port_id = SLIM_TX_0;
  815. } else if (strnstr(kcontrol->id.name,
  816. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  817. port_id = SLIM_TX_1;
  818. } else {
  819. pr_err("%s: unsupported channel: %s\n",
  820. __func__, kcontrol->id.name);
  821. return -EINVAL;
  822. }
  823. return port_id;
  824. }
  825. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  826. struct snd_ctl_elem_value *ucontrol)
  827. {
  828. int ch_num = slim_get_port_idx(kcontrol);
  829. if (ch_num < 0)
  830. return ch_num;
  831. ucontrol->value.enumerated.item[0] =
  832. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  833. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  834. ch_num, slim_rx_cfg[ch_num].sample_rate,
  835. ucontrol->value.enumerated.item[0]);
  836. return 0;
  837. }
  838. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  839. struct snd_ctl_elem_value *ucontrol)
  840. {
  841. int ch_num = slim_get_port_idx(kcontrol);
  842. if (ch_num < 0)
  843. return ch_num;
  844. slim_rx_cfg[ch_num].sample_rate =
  845. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  846. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  847. ch_num, slim_rx_cfg[ch_num].sample_rate,
  848. ucontrol->value.enumerated.item[0]);
  849. return 0;
  850. }
  851. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  852. struct snd_ctl_elem_value *ucontrol)
  853. {
  854. int ch_num = slim_get_port_idx(kcontrol);
  855. if (ch_num < 0)
  856. return ch_num;
  857. ucontrol->value.enumerated.item[0] =
  858. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  859. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  860. ch_num, slim_tx_cfg[ch_num].sample_rate,
  861. ucontrol->value.enumerated.item[0]);
  862. return 0;
  863. }
  864. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  865. struct snd_ctl_elem_value *ucontrol)
  866. {
  867. int sample_rate = 0;
  868. int ch_num = slim_get_port_idx(kcontrol);
  869. if (ch_num < 0)
  870. return ch_num;
  871. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  872. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  873. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  874. __func__, sample_rate);
  875. return -EINVAL;
  876. }
  877. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  878. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  879. ch_num, slim_tx_cfg[ch_num].sample_rate,
  880. ucontrol->value.enumerated.item[0]);
  881. return 0;
  882. }
  883. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  884. struct snd_ctl_elem_value *ucontrol)
  885. {
  886. int ch_num = slim_get_port_idx(kcontrol);
  887. if (ch_num < 0)
  888. return ch_num;
  889. ucontrol->value.enumerated.item[0] =
  890. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  891. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  892. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  893. ucontrol->value.enumerated.item[0]);
  894. return 0;
  895. }
  896. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  897. struct snd_ctl_elem_value *ucontrol)
  898. {
  899. int ch_num = slim_get_port_idx(kcontrol);
  900. if (ch_num < 0)
  901. return ch_num;
  902. slim_rx_cfg[ch_num].bit_format =
  903. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  904. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  905. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  906. ucontrol->value.enumerated.item[0]);
  907. return 0;
  908. }
  909. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  910. struct snd_ctl_elem_value *ucontrol)
  911. {
  912. int ch_num = slim_get_port_idx(kcontrol);
  913. if (ch_num < 0)
  914. return ch_num;
  915. ucontrol->value.enumerated.item[0] =
  916. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  917. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  918. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  919. ucontrol->value.enumerated.item[0]);
  920. return 0;
  921. }
  922. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  923. struct snd_ctl_elem_value *ucontrol)
  924. {
  925. int ch_num = slim_get_port_idx(kcontrol);
  926. if (ch_num < 0)
  927. return ch_num;
  928. slim_tx_cfg[ch_num].bit_format =
  929. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  930. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  931. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  932. ucontrol->value.enumerated.item[0]);
  933. return 0;
  934. }
  935. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  936. struct snd_ctl_elem_value *ucontrol)
  937. {
  938. int ch_num = slim_get_port_idx(kcontrol);
  939. if (ch_num < 0)
  940. return ch_num;
  941. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  942. ch_num, slim_rx_cfg[ch_num].channels);
  943. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  944. return 0;
  945. }
  946. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  947. struct snd_ctl_elem_value *ucontrol)
  948. {
  949. int ch_num = slim_get_port_idx(kcontrol);
  950. if (ch_num < 0)
  951. return ch_num;
  952. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  953. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  954. ch_num, slim_rx_cfg[ch_num].channels);
  955. return 1;
  956. }
  957. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  958. struct snd_ctl_elem_value *ucontrol)
  959. {
  960. int ch_num = slim_get_port_idx(kcontrol);
  961. if (ch_num < 0)
  962. return ch_num;
  963. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  964. ch_num, slim_tx_cfg[ch_num].channels);
  965. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  966. return 0;
  967. }
  968. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  969. struct snd_ctl_elem_value *ucontrol)
  970. {
  971. int ch_num = slim_get_port_idx(kcontrol);
  972. if (ch_num < 0)
  973. return ch_num;
  974. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  975. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  976. ch_num, slim_tx_cfg[ch_num].channels);
  977. return 1;
  978. }
  979. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  980. struct snd_ctl_elem_value *ucontrol)
  981. {
  982. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  983. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  984. ucontrol->value.integer.value[0]);
  985. return 0;
  986. }
  987. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  988. struct snd_ctl_elem_value *ucontrol)
  989. {
  990. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  991. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  992. return 1;
  993. }
  994. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. /*
  998. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  999. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1000. * value.
  1001. */
  1002. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1003. case SAMPLING_RATE_96KHZ:
  1004. ucontrol->value.integer.value[0] = 5;
  1005. break;
  1006. case SAMPLING_RATE_88P2KHZ:
  1007. ucontrol->value.integer.value[0] = 4;
  1008. break;
  1009. case SAMPLING_RATE_48KHZ:
  1010. ucontrol->value.integer.value[0] = 3;
  1011. break;
  1012. case SAMPLING_RATE_44P1KHZ:
  1013. ucontrol->value.integer.value[0] = 2;
  1014. break;
  1015. case SAMPLING_RATE_16KHZ:
  1016. ucontrol->value.integer.value[0] = 1;
  1017. break;
  1018. case SAMPLING_RATE_8KHZ:
  1019. default:
  1020. ucontrol->value.integer.value[0] = 0;
  1021. break;
  1022. }
  1023. pr_debug("%s: sample rate = %d\n", __func__,
  1024. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1025. return 0;
  1026. }
  1027. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1028. struct snd_ctl_elem_value *ucontrol)
  1029. {
  1030. switch (ucontrol->value.integer.value[0]) {
  1031. case 1:
  1032. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1033. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1034. break;
  1035. case 2:
  1036. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1037. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1038. break;
  1039. case 3:
  1040. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1041. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1042. break;
  1043. case 4:
  1044. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1045. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1046. break;
  1047. case 5:
  1048. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1049. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1050. break;
  1051. case 0:
  1052. default:
  1053. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1054. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1055. break;
  1056. }
  1057. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1058. __func__,
  1059. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1060. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1061. ucontrol->value.enumerated.item[0]);
  1062. return 0;
  1063. }
  1064. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1065. {
  1066. int idx = 0;
  1067. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1068. sizeof("WSA_CDC_DMA_RX_0")))
  1069. idx = WSA_CDC_DMA_RX_0;
  1070. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1071. sizeof("WSA_CDC_DMA_RX_0")))
  1072. idx = WSA_CDC_DMA_RX_1;
  1073. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1074. sizeof("RX_CDC_DMA_RX_0")))
  1075. idx = RX_CDC_DMA_RX_0;
  1076. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1077. sizeof("RX_CDC_DMA_RX_1")))
  1078. idx = RX_CDC_DMA_RX_1;
  1079. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1080. sizeof("RX_CDC_DMA_RX_2")))
  1081. idx = RX_CDC_DMA_RX_2;
  1082. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1083. sizeof("RX_CDC_DMA_RX_3")))
  1084. idx = RX_CDC_DMA_RX_3;
  1085. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1086. sizeof("RX_CDC_DMA_RX_5")))
  1087. idx = RX_CDC_DMA_RX_5;
  1088. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1089. sizeof("WSA_CDC_DMA_TX_0")))
  1090. idx = WSA_CDC_DMA_TX_0;
  1091. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1092. sizeof("WSA_CDC_DMA_TX_1")))
  1093. idx = WSA_CDC_DMA_TX_1;
  1094. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1095. sizeof("WSA_CDC_DMA_TX_2")))
  1096. idx = WSA_CDC_DMA_TX_2;
  1097. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1098. sizeof("TX_CDC_DMA_TX_0")))
  1099. idx = TX_CDC_DMA_TX_0;
  1100. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1101. sizeof("TX_CDC_DMA_TX_3")))
  1102. idx = TX_CDC_DMA_TX_3;
  1103. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1104. sizeof("TX_CDC_DMA_TX_4")))
  1105. idx = TX_CDC_DMA_TX_4;
  1106. else {
  1107. pr_err("%s: unsupported channel: %s\n",
  1108. __func__, kcontrol->id.name);
  1109. return -EINVAL;
  1110. }
  1111. return idx;
  1112. }
  1113. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1114. struct snd_ctl_elem_value *ucontrol)
  1115. {
  1116. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1117. if (ch_num < 0)
  1118. return ch_num;
  1119. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1120. cdc_dma_rx_cfg[ch_num].channels - 1);
  1121. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1122. return 0;
  1123. }
  1124. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1125. struct snd_ctl_elem_value *ucontrol)
  1126. {
  1127. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1128. if (ch_num < 0)
  1129. return ch_num;
  1130. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1131. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1132. cdc_dma_rx_cfg[ch_num].channels);
  1133. return 1;
  1134. }
  1135. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1136. struct snd_ctl_elem_value *ucontrol)
  1137. {
  1138. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1139. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1140. case SNDRV_PCM_FORMAT_S32_LE:
  1141. ucontrol->value.integer.value[0] = 3;
  1142. break;
  1143. case SNDRV_PCM_FORMAT_S24_3LE:
  1144. ucontrol->value.integer.value[0] = 2;
  1145. break;
  1146. case SNDRV_PCM_FORMAT_S24_LE:
  1147. ucontrol->value.integer.value[0] = 1;
  1148. break;
  1149. case SNDRV_PCM_FORMAT_S16_LE:
  1150. default:
  1151. ucontrol->value.integer.value[0] = 0;
  1152. break;
  1153. }
  1154. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1155. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1156. ucontrol->value.integer.value[0]);
  1157. return 0;
  1158. }
  1159. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1160. struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. int rc = 0;
  1163. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1164. switch (ucontrol->value.integer.value[0]) {
  1165. case 3:
  1166. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1167. break;
  1168. case 2:
  1169. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1170. break;
  1171. case 1:
  1172. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1173. break;
  1174. case 0:
  1175. default:
  1176. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1177. break;
  1178. }
  1179. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1180. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1181. ucontrol->value.integer.value[0]);
  1182. return rc;
  1183. }
  1184. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1185. {
  1186. int sample_rate_val = 0;
  1187. switch (sample_rate) {
  1188. case SAMPLING_RATE_8KHZ:
  1189. sample_rate_val = 0;
  1190. break;
  1191. case SAMPLING_RATE_11P025KHZ:
  1192. sample_rate_val = 1;
  1193. break;
  1194. case SAMPLING_RATE_16KHZ:
  1195. sample_rate_val = 2;
  1196. break;
  1197. case SAMPLING_RATE_22P05KHZ:
  1198. sample_rate_val = 3;
  1199. break;
  1200. case SAMPLING_RATE_32KHZ:
  1201. sample_rate_val = 4;
  1202. break;
  1203. case SAMPLING_RATE_44P1KHZ:
  1204. sample_rate_val = 5;
  1205. break;
  1206. case SAMPLING_RATE_48KHZ:
  1207. sample_rate_val = 6;
  1208. break;
  1209. case SAMPLING_RATE_88P2KHZ:
  1210. sample_rate_val = 7;
  1211. break;
  1212. case SAMPLING_RATE_96KHZ:
  1213. sample_rate_val = 8;
  1214. break;
  1215. case SAMPLING_RATE_176P4KHZ:
  1216. sample_rate_val = 9;
  1217. break;
  1218. case SAMPLING_RATE_192KHZ:
  1219. sample_rate_val = 10;
  1220. break;
  1221. case SAMPLING_RATE_352P8KHZ:
  1222. sample_rate_val = 11;
  1223. break;
  1224. case SAMPLING_RATE_384KHZ:
  1225. sample_rate_val = 12;
  1226. break;
  1227. default:
  1228. sample_rate_val = 6;
  1229. break;
  1230. }
  1231. return sample_rate_val;
  1232. }
  1233. static int cdc_dma_get_sample_rate(int value)
  1234. {
  1235. int sample_rate = 0;
  1236. switch (value) {
  1237. case 0:
  1238. sample_rate = SAMPLING_RATE_8KHZ;
  1239. break;
  1240. case 1:
  1241. sample_rate = SAMPLING_RATE_11P025KHZ;
  1242. break;
  1243. case 2:
  1244. sample_rate = SAMPLING_RATE_16KHZ;
  1245. break;
  1246. case 3:
  1247. sample_rate = SAMPLING_RATE_22P05KHZ;
  1248. break;
  1249. case 4:
  1250. sample_rate = SAMPLING_RATE_32KHZ;
  1251. break;
  1252. case 5:
  1253. sample_rate = SAMPLING_RATE_44P1KHZ;
  1254. break;
  1255. case 6:
  1256. sample_rate = SAMPLING_RATE_48KHZ;
  1257. break;
  1258. case 7:
  1259. sample_rate = SAMPLING_RATE_88P2KHZ;
  1260. break;
  1261. case 8:
  1262. sample_rate = SAMPLING_RATE_96KHZ;
  1263. break;
  1264. case 9:
  1265. sample_rate = SAMPLING_RATE_176P4KHZ;
  1266. break;
  1267. case 10:
  1268. sample_rate = SAMPLING_RATE_192KHZ;
  1269. break;
  1270. case 11:
  1271. sample_rate = SAMPLING_RATE_352P8KHZ;
  1272. break;
  1273. case 12:
  1274. sample_rate = SAMPLING_RATE_384KHZ;
  1275. break;
  1276. default:
  1277. sample_rate = SAMPLING_RATE_48KHZ;
  1278. break;
  1279. }
  1280. return sample_rate;
  1281. }
  1282. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1283. struct snd_ctl_elem_value *ucontrol)
  1284. {
  1285. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1286. if (ch_num < 0)
  1287. return ch_num;
  1288. ucontrol->value.enumerated.item[0] =
  1289. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1290. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1291. cdc_dma_rx_cfg[ch_num].sample_rate);
  1292. return 0;
  1293. }
  1294. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1295. struct snd_ctl_elem_value *ucontrol)
  1296. {
  1297. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1298. if (ch_num < 0)
  1299. return ch_num;
  1300. cdc_dma_rx_cfg[ch_num].sample_rate =
  1301. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1302. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1303. __func__, ucontrol->value.enumerated.item[0],
  1304. cdc_dma_rx_cfg[ch_num].sample_rate);
  1305. return 0;
  1306. }
  1307. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1308. struct snd_ctl_elem_value *ucontrol)
  1309. {
  1310. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1311. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1312. cdc_dma_tx_cfg[ch_num].channels);
  1313. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1314. return 0;
  1315. }
  1316. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1317. struct snd_ctl_elem_value *ucontrol)
  1318. {
  1319. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1320. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1321. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1322. cdc_dma_tx_cfg[ch_num].channels);
  1323. return 1;
  1324. }
  1325. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1326. struct snd_ctl_elem_value *ucontrol)
  1327. {
  1328. int sample_rate_val;
  1329. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1330. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1331. case SAMPLING_RATE_384KHZ:
  1332. sample_rate_val = 12;
  1333. break;
  1334. case SAMPLING_RATE_352P8KHZ:
  1335. sample_rate_val = 11;
  1336. break;
  1337. case SAMPLING_RATE_192KHZ:
  1338. sample_rate_val = 10;
  1339. break;
  1340. case SAMPLING_RATE_176P4KHZ:
  1341. sample_rate_val = 9;
  1342. break;
  1343. case SAMPLING_RATE_96KHZ:
  1344. sample_rate_val = 8;
  1345. break;
  1346. case SAMPLING_RATE_88P2KHZ:
  1347. sample_rate_val = 7;
  1348. break;
  1349. case SAMPLING_RATE_48KHZ:
  1350. sample_rate_val = 6;
  1351. break;
  1352. case SAMPLING_RATE_44P1KHZ:
  1353. sample_rate_val = 5;
  1354. break;
  1355. case SAMPLING_RATE_32KHZ:
  1356. sample_rate_val = 4;
  1357. break;
  1358. case SAMPLING_RATE_22P05KHZ:
  1359. sample_rate_val = 3;
  1360. break;
  1361. case SAMPLING_RATE_16KHZ:
  1362. sample_rate_val = 2;
  1363. break;
  1364. case SAMPLING_RATE_11P025KHZ:
  1365. sample_rate_val = 1;
  1366. break;
  1367. case SAMPLING_RATE_8KHZ:
  1368. sample_rate_val = 0;
  1369. break;
  1370. default:
  1371. sample_rate_val = 6;
  1372. break;
  1373. }
  1374. ucontrol->value.integer.value[0] = sample_rate_val;
  1375. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1376. cdc_dma_tx_cfg[ch_num].sample_rate);
  1377. return 0;
  1378. }
  1379. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1380. struct snd_ctl_elem_value *ucontrol)
  1381. {
  1382. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1383. switch (ucontrol->value.integer.value[0]) {
  1384. case 12:
  1385. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1386. break;
  1387. case 11:
  1388. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1389. break;
  1390. case 10:
  1391. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1392. break;
  1393. case 9:
  1394. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1395. break;
  1396. case 8:
  1397. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1398. break;
  1399. case 7:
  1400. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1401. break;
  1402. case 6:
  1403. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1404. break;
  1405. case 5:
  1406. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1407. break;
  1408. case 4:
  1409. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1410. break;
  1411. case 3:
  1412. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1413. break;
  1414. case 2:
  1415. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1416. break;
  1417. case 1:
  1418. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1419. break;
  1420. case 0:
  1421. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1422. break;
  1423. default:
  1424. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1425. break;
  1426. }
  1427. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1428. __func__, ucontrol->value.integer.value[0],
  1429. cdc_dma_tx_cfg[ch_num].sample_rate);
  1430. return 0;
  1431. }
  1432. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1433. struct snd_ctl_elem_value *ucontrol)
  1434. {
  1435. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1436. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1437. case SNDRV_PCM_FORMAT_S32_LE:
  1438. ucontrol->value.integer.value[0] = 3;
  1439. break;
  1440. case SNDRV_PCM_FORMAT_S24_3LE:
  1441. ucontrol->value.integer.value[0] = 2;
  1442. break;
  1443. case SNDRV_PCM_FORMAT_S24_LE:
  1444. ucontrol->value.integer.value[0] = 1;
  1445. break;
  1446. case SNDRV_PCM_FORMAT_S16_LE:
  1447. default:
  1448. ucontrol->value.integer.value[0] = 0;
  1449. break;
  1450. }
  1451. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1452. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1453. ucontrol->value.integer.value[0]);
  1454. return 0;
  1455. }
  1456. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1457. struct snd_ctl_elem_value *ucontrol)
  1458. {
  1459. int rc = 0;
  1460. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1461. switch (ucontrol->value.integer.value[0]) {
  1462. case 3:
  1463. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1464. break;
  1465. case 2:
  1466. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1467. break;
  1468. case 1:
  1469. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1470. break;
  1471. case 0:
  1472. default:
  1473. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1474. break;
  1475. }
  1476. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1477. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1478. ucontrol->value.integer.value[0]);
  1479. return rc;
  1480. }
  1481. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1482. struct snd_ctl_elem_value *ucontrol)
  1483. {
  1484. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1485. usb_rx_cfg.channels);
  1486. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1487. return 0;
  1488. }
  1489. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1490. struct snd_ctl_elem_value *ucontrol)
  1491. {
  1492. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1493. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1494. return 1;
  1495. }
  1496. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1497. struct snd_ctl_elem_value *ucontrol)
  1498. {
  1499. int sample_rate_val;
  1500. switch (usb_rx_cfg.sample_rate) {
  1501. case SAMPLING_RATE_384KHZ:
  1502. sample_rate_val = 12;
  1503. break;
  1504. case SAMPLING_RATE_352P8KHZ:
  1505. sample_rate_val = 11;
  1506. break;
  1507. case SAMPLING_RATE_192KHZ:
  1508. sample_rate_val = 10;
  1509. break;
  1510. case SAMPLING_RATE_176P4KHZ:
  1511. sample_rate_val = 9;
  1512. break;
  1513. case SAMPLING_RATE_96KHZ:
  1514. sample_rate_val = 8;
  1515. break;
  1516. case SAMPLING_RATE_88P2KHZ:
  1517. sample_rate_val = 7;
  1518. break;
  1519. case SAMPLING_RATE_48KHZ:
  1520. sample_rate_val = 6;
  1521. break;
  1522. case SAMPLING_RATE_44P1KHZ:
  1523. sample_rate_val = 5;
  1524. break;
  1525. case SAMPLING_RATE_32KHZ:
  1526. sample_rate_val = 4;
  1527. break;
  1528. case SAMPLING_RATE_22P05KHZ:
  1529. sample_rate_val = 3;
  1530. break;
  1531. case SAMPLING_RATE_16KHZ:
  1532. sample_rate_val = 2;
  1533. break;
  1534. case SAMPLING_RATE_11P025KHZ:
  1535. sample_rate_val = 1;
  1536. break;
  1537. case SAMPLING_RATE_8KHZ:
  1538. default:
  1539. sample_rate_val = 0;
  1540. break;
  1541. }
  1542. ucontrol->value.integer.value[0] = sample_rate_val;
  1543. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1544. usb_rx_cfg.sample_rate);
  1545. return 0;
  1546. }
  1547. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1548. struct snd_ctl_elem_value *ucontrol)
  1549. {
  1550. switch (ucontrol->value.integer.value[0]) {
  1551. case 12:
  1552. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1553. break;
  1554. case 11:
  1555. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1556. break;
  1557. case 10:
  1558. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1559. break;
  1560. case 9:
  1561. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1562. break;
  1563. case 8:
  1564. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1565. break;
  1566. case 7:
  1567. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1568. break;
  1569. case 6:
  1570. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1571. break;
  1572. case 5:
  1573. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1574. break;
  1575. case 4:
  1576. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1577. break;
  1578. case 3:
  1579. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1580. break;
  1581. case 2:
  1582. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1583. break;
  1584. case 1:
  1585. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1586. break;
  1587. case 0:
  1588. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1589. break;
  1590. default:
  1591. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1592. break;
  1593. }
  1594. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1595. __func__, ucontrol->value.integer.value[0],
  1596. usb_rx_cfg.sample_rate);
  1597. return 0;
  1598. }
  1599. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1600. struct snd_ctl_elem_value *ucontrol)
  1601. {
  1602. switch (usb_rx_cfg.bit_format) {
  1603. case SNDRV_PCM_FORMAT_S32_LE:
  1604. ucontrol->value.integer.value[0] = 3;
  1605. break;
  1606. case SNDRV_PCM_FORMAT_S24_3LE:
  1607. ucontrol->value.integer.value[0] = 2;
  1608. break;
  1609. case SNDRV_PCM_FORMAT_S24_LE:
  1610. ucontrol->value.integer.value[0] = 1;
  1611. break;
  1612. case SNDRV_PCM_FORMAT_S16_LE:
  1613. default:
  1614. ucontrol->value.integer.value[0] = 0;
  1615. break;
  1616. }
  1617. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1618. __func__, usb_rx_cfg.bit_format,
  1619. ucontrol->value.integer.value[0]);
  1620. return 0;
  1621. }
  1622. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1623. struct snd_ctl_elem_value *ucontrol)
  1624. {
  1625. int rc = 0;
  1626. switch (ucontrol->value.integer.value[0]) {
  1627. case 3:
  1628. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1629. break;
  1630. case 2:
  1631. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1632. break;
  1633. case 1:
  1634. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1635. break;
  1636. case 0:
  1637. default:
  1638. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1639. break;
  1640. }
  1641. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1642. __func__, usb_rx_cfg.bit_format,
  1643. ucontrol->value.integer.value[0]);
  1644. return rc;
  1645. }
  1646. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1650. usb_tx_cfg.channels);
  1651. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1652. return 0;
  1653. }
  1654. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1655. struct snd_ctl_elem_value *ucontrol)
  1656. {
  1657. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1658. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1659. return 1;
  1660. }
  1661. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1662. struct snd_ctl_elem_value *ucontrol)
  1663. {
  1664. int sample_rate_val;
  1665. switch (usb_tx_cfg.sample_rate) {
  1666. case SAMPLING_RATE_384KHZ:
  1667. sample_rate_val = 12;
  1668. break;
  1669. case SAMPLING_RATE_352P8KHZ:
  1670. sample_rate_val = 11;
  1671. break;
  1672. case SAMPLING_RATE_192KHZ:
  1673. sample_rate_val = 10;
  1674. break;
  1675. case SAMPLING_RATE_176P4KHZ:
  1676. sample_rate_val = 9;
  1677. break;
  1678. case SAMPLING_RATE_96KHZ:
  1679. sample_rate_val = 8;
  1680. break;
  1681. case SAMPLING_RATE_88P2KHZ:
  1682. sample_rate_val = 7;
  1683. break;
  1684. case SAMPLING_RATE_48KHZ:
  1685. sample_rate_val = 6;
  1686. break;
  1687. case SAMPLING_RATE_44P1KHZ:
  1688. sample_rate_val = 5;
  1689. break;
  1690. case SAMPLING_RATE_32KHZ:
  1691. sample_rate_val = 4;
  1692. break;
  1693. case SAMPLING_RATE_22P05KHZ:
  1694. sample_rate_val = 3;
  1695. break;
  1696. case SAMPLING_RATE_16KHZ:
  1697. sample_rate_val = 2;
  1698. break;
  1699. case SAMPLING_RATE_11P025KHZ:
  1700. sample_rate_val = 1;
  1701. break;
  1702. case SAMPLING_RATE_8KHZ:
  1703. sample_rate_val = 0;
  1704. break;
  1705. default:
  1706. sample_rate_val = 6;
  1707. break;
  1708. }
  1709. ucontrol->value.integer.value[0] = sample_rate_val;
  1710. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1711. usb_tx_cfg.sample_rate);
  1712. return 0;
  1713. }
  1714. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1715. struct snd_ctl_elem_value *ucontrol)
  1716. {
  1717. switch (ucontrol->value.integer.value[0]) {
  1718. case 12:
  1719. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1720. break;
  1721. case 11:
  1722. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1723. break;
  1724. case 10:
  1725. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1726. break;
  1727. case 9:
  1728. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1729. break;
  1730. case 8:
  1731. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1732. break;
  1733. case 7:
  1734. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1735. break;
  1736. case 6:
  1737. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1738. break;
  1739. case 5:
  1740. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1741. break;
  1742. case 4:
  1743. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1744. break;
  1745. case 3:
  1746. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1747. break;
  1748. case 2:
  1749. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1750. break;
  1751. case 1:
  1752. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1753. break;
  1754. case 0:
  1755. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1756. break;
  1757. default:
  1758. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1759. break;
  1760. }
  1761. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1762. __func__, ucontrol->value.integer.value[0],
  1763. usb_tx_cfg.sample_rate);
  1764. return 0;
  1765. }
  1766. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1767. struct snd_ctl_elem_value *ucontrol)
  1768. {
  1769. switch (usb_tx_cfg.bit_format) {
  1770. case SNDRV_PCM_FORMAT_S32_LE:
  1771. ucontrol->value.integer.value[0] = 3;
  1772. break;
  1773. case SNDRV_PCM_FORMAT_S24_3LE:
  1774. ucontrol->value.integer.value[0] = 2;
  1775. break;
  1776. case SNDRV_PCM_FORMAT_S24_LE:
  1777. ucontrol->value.integer.value[0] = 1;
  1778. break;
  1779. case SNDRV_PCM_FORMAT_S16_LE:
  1780. default:
  1781. ucontrol->value.integer.value[0] = 0;
  1782. break;
  1783. }
  1784. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1785. __func__, usb_tx_cfg.bit_format,
  1786. ucontrol->value.integer.value[0]);
  1787. return 0;
  1788. }
  1789. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1790. struct snd_ctl_elem_value *ucontrol)
  1791. {
  1792. int rc = 0;
  1793. switch (ucontrol->value.integer.value[0]) {
  1794. case 3:
  1795. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1796. break;
  1797. case 2:
  1798. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1799. break;
  1800. case 1:
  1801. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1802. break;
  1803. case 0:
  1804. default:
  1805. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1806. break;
  1807. }
  1808. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1809. __func__, usb_tx_cfg.bit_format,
  1810. ucontrol->value.integer.value[0]);
  1811. return rc;
  1812. }
  1813. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1814. {
  1815. int idx;
  1816. if (strnstr(kcontrol->id.name, "Display Port RX",
  1817. sizeof("Display Port RX"))) {
  1818. idx = DP_RX_IDX;
  1819. } else {
  1820. pr_err("%s: unsupported BE: %s\n",
  1821. __func__, kcontrol->id.name);
  1822. idx = -EINVAL;
  1823. }
  1824. return idx;
  1825. }
  1826. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1827. struct snd_ctl_elem_value *ucontrol)
  1828. {
  1829. int idx = ext_disp_get_port_idx(kcontrol);
  1830. if (idx < 0)
  1831. return idx;
  1832. switch (ext_disp_rx_cfg[idx].bit_format) {
  1833. case SNDRV_PCM_FORMAT_S24_3LE:
  1834. ucontrol->value.integer.value[0] = 2;
  1835. break;
  1836. case SNDRV_PCM_FORMAT_S24_LE:
  1837. ucontrol->value.integer.value[0] = 1;
  1838. break;
  1839. case SNDRV_PCM_FORMAT_S16_LE:
  1840. default:
  1841. ucontrol->value.integer.value[0] = 0;
  1842. break;
  1843. }
  1844. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1845. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1846. ucontrol->value.integer.value[0]);
  1847. return 0;
  1848. }
  1849. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1850. struct snd_ctl_elem_value *ucontrol)
  1851. {
  1852. int idx = ext_disp_get_port_idx(kcontrol);
  1853. if (idx < 0)
  1854. return idx;
  1855. switch (ucontrol->value.integer.value[0]) {
  1856. case 2:
  1857. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1858. break;
  1859. case 1:
  1860. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1861. break;
  1862. case 0:
  1863. default:
  1864. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1865. break;
  1866. }
  1867. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1868. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1869. ucontrol->value.integer.value[0]);
  1870. return 0;
  1871. }
  1872. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1873. struct snd_ctl_elem_value *ucontrol)
  1874. {
  1875. int idx = ext_disp_get_port_idx(kcontrol);
  1876. if (idx < 0)
  1877. return idx;
  1878. ucontrol->value.integer.value[0] =
  1879. ext_disp_rx_cfg[idx].channels - 2;
  1880. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1881. idx, ext_disp_rx_cfg[idx].channels);
  1882. return 0;
  1883. }
  1884. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1885. struct snd_ctl_elem_value *ucontrol)
  1886. {
  1887. int idx = ext_disp_get_port_idx(kcontrol);
  1888. if (idx < 0)
  1889. return idx;
  1890. ext_disp_rx_cfg[idx].channels =
  1891. ucontrol->value.integer.value[0] + 2;
  1892. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1893. idx, ext_disp_rx_cfg[idx].channels);
  1894. return 1;
  1895. }
  1896. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1897. struct snd_ctl_elem_value *ucontrol)
  1898. {
  1899. int sample_rate_val;
  1900. int idx = ext_disp_get_port_idx(kcontrol);
  1901. if (idx < 0)
  1902. return idx;
  1903. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1904. case SAMPLING_RATE_176P4KHZ:
  1905. sample_rate_val = 6;
  1906. break;
  1907. case SAMPLING_RATE_88P2KHZ:
  1908. sample_rate_val = 5;
  1909. break;
  1910. case SAMPLING_RATE_44P1KHZ:
  1911. sample_rate_val = 4;
  1912. break;
  1913. case SAMPLING_RATE_32KHZ:
  1914. sample_rate_val = 3;
  1915. break;
  1916. case SAMPLING_RATE_192KHZ:
  1917. sample_rate_val = 2;
  1918. break;
  1919. case SAMPLING_RATE_96KHZ:
  1920. sample_rate_val = 1;
  1921. break;
  1922. case SAMPLING_RATE_48KHZ:
  1923. default:
  1924. sample_rate_val = 0;
  1925. break;
  1926. }
  1927. ucontrol->value.integer.value[0] = sample_rate_val;
  1928. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1929. idx, ext_disp_rx_cfg[idx].sample_rate);
  1930. return 0;
  1931. }
  1932. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1933. struct snd_ctl_elem_value *ucontrol)
  1934. {
  1935. int idx = ext_disp_get_port_idx(kcontrol);
  1936. if (idx < 0)
  1937. return idx;
  1938. switch (ucontrol->value.integer.value[0]) {
  1939. case 6:
  1940. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1941. break;
  1942. case 5:
  1943. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1944. break;
  1945. case 4:
  1946. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1947. break;
  1948. case 3:
  1949. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1950. break;
  1951. case 2:
  1952. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1953. break;
  1954. case 1:
  1955. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1956. break;
  1957. case 0:
  1958. default:
  1959. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1960. break;
  1961. }
  1962. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1963. __func__, ucontrol->value.integer.value[0], idx,
  1964. ext_disp_rx_cfg[idx].sample_rate);
  1965. return 0;
  1966. }
  1967. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1968. struct snd_ctl_elem_value *ucontrol)
  1969. {
  1970. pr_debug("%s: proxy_rx channels = %d\n",
  1971. __func__, proxy_rx_cfg.channels);
  1972. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1973. return 0;
  1974. }
  1975. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1976. struct snd_ctl_elem_value *ucontrol)
  1977. {
  1978. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1979. pr_debug("%s: proxy_rx channels = %d\n",
  1980. __func__, proxy_rx_cfg.channels);
  1981. return 1;
  1982. }
  1983. static int tdm_get_sample_rate(int value)
  1984. {
  1985. int sample_rate = 0;
  1986. switch (value) {
  1987. case 0:
  1988. sample_rate = SAMPLING_RATE_8KHZ;
  1989. break;
  1990. case 1:
  1991. sample_rate = SAMPLING_RATE_16KHZ;
  1992. break;
  1993. case 2:
  1994. sample_rate = SAMPLING_RATE_32KHZ;
  1995. break;
  1996. case 3:
  1997. sample_rate = SAMPLING_RATE_48KHZ;
  1998. break;
  1999. case 4:
  2000. sample_rate = SAMPLING_RATE_176P4KHZ;
  2001. break;
  2002. case 5:
  2003. sample_rate = SAMPLING_RATE_352P8KHZ;
  2004. break;
  2005. default:
  2006. sample_rate = SAMPLING_RATE_48KHZ;
  2007. break;
  2008. }
  2009. return sample_rate;
  2010. }
  2011. static int aux_pcm_get_sample_rate(int value)
  2012. {
  2013. int sample_rate;
  2014. switch (value) {
  2015. case 1:
  2016. sample_rate = SAMPLING_RATE_16KHZ;
  2017. break;
  2018. case 0:
  2019. default:
  2020. sample_rate = SAMPLING_RATE_8KHZ;
  2021. break;
  2022. }
  2023. return sample_rate;
  2024. }
  2025. static int tdm_get_sample_rate_val(int sample_rate)
  2026. {
  2027. int sample_rate_val = 0;
  2028. switch (sample_rate) {
  2029. case SAMPLING_RATE_8KHZ:
  2030. sample_rate_val = 0;
  2031. break;
  2032. case SAMPLING_RATE_16KHZ:
  2033. sample_rate_val = 1;
  2034. break;
  2035. case SAMPLING_RATE_32KHZ:
  2036. sample_rate_val = 2;
  2037. break;
  2038. case SAMPLING_RATE_48KHZ:
  2039. sample_rate_val = 3;
  2040. break;
  2041. case SAMPLING_RATE_176P4KHZ:
  2042. sample_rate_val = 4;
  2043. break;
  2044. case SAMPLING_RATE_352P8KHZ:
  2045. sample_rate_val = 5;
  2046. break;
  2047. default:
  2048. sample_rate_val = 3;
  2049. break;
  2050. }
  2051. return sample_rate_val;
  2052. }
  2053. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2054. {
  2055. int sample_rate_val;
  2056. switch (sample_rate) {
  2057. case SAMPLING_RATE_16KHZ:
  2058. sample_rate_val = 1;
  2059. break;
  2060. case SAMPLING_RATE_8KHZ:
  2061. default:
  2062. sample_rate_val = 0;
  2063. break;
  2064. }
  2065. return sample_rate_val;
  2066. }
  2067. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2068. struct tdm_port *port)
  2069. {
  2070. if (port) {
  2071. if (strnstr(kcontrol->id.name, "PRI",
  2072. sizeof(kcontrol->id.name))) {
  2073. port->mode = TDM_PRI;
  2074. } else if (strnstr(kcontrol->id.name, "SEC",
  2075. sizeof(kcontrol->id.name))) {
  2076. port->mode = TDM_SEC;
  2077. } else if (strnstr(kcontrol->id.name, "TERT",
  2078. sizeof(kcontrol->id.name))) {
  2079. port->mode = TDM_TERT;
  2080. } else if (strnstr(kcontrol->id.name, "QUAT",
  2081. sizeof(kcontrol->id.name))) {
  2082. port->mode = TDM_QUAT;
  2083. } else if (strnstr(kcontrol->id.name, "QUIN",
  2084. sizeof(kcontrol->id.name))) {
  2085. port->mode = TDM_QUIN;
  2086. } else {
  2087. pr_err("%s: unsupported mode in: %s\n",
  2088. __func__, kcontrol->id.name);
  2089. return -EINVAL;
  2090. }
  2091. if (strnstr(kcontrol->id.name, "RX_0",
  2092. sizeof(kcontrol->id.name)) ||
  2093. strnstr(kcontrol->id.name, "TX_0",
  2094. sizeof(kcontrol->id.name))) {
  2095. port->channel = TDM_0;
  2096. } else if (strnstr(kcontrol->id.name, "RX_1",
  2097. sizeof(kcontrol->id.name)) ||
  2098. strnstr(kcontrol->id.name, "TX_1",
  2099. sizeof(kcontrol->id.name))) {
  2100. port->channel = TDM_1;
  2101. } else if (strnstr(kcontrol->id.name, "RX_2",
  2102. sizeof(kcontrol->id.name)) ||
  2103. strnstr(kcontrol->id.name, "TX_2",
  2104. sizeof(kcontrol->id.name))) {
  2105. port->channel = TDM_2;
  2106. } else if (strnstr(kcontrol->id.name, "RX_3",
  2107. sizeof(kcontrol->id.name)) ||
  2108. strnstr(kcontrol->id.name, "TX_3",
  2109. sizeof(kcontrol->id.name))) {
  2110. port->channel = TDM_3;
  2111. } else if (strnstr(kcontrol->id.name, "RX_4",
  2112. sizeof(kcontrol->id.name)) ||
  2113. strnstr(kcontrol->id.name, "TX_4",
  2114. sizeof(kcontrol->id.name))) {
  2115. port->channel = TDM_4;
  2116. } else if (strnstr(kcontrol->id.name, "RX_5",
  2117. sizeof(kcontrol->id.name)) ||
  2118. strnstr(kcontrol->id.name, "TX_5",
  2119. sizeof(kcontrol->id.name))) {
  2120. port->channel = TDM_5;
  2121. } else if (strnstr(kcontrol->id.name, "RX_6",
  2122. sizeof(kcontrol->id.name)) ||
  2123. strnstr(kcontrol->id.name, "TX_6",
  2124. sizeof(kcontrol->id.name))) {
  2125. port->channel = TDM_6;
  2126. } else if (strnstr(kcontrol->id.name, "RX_7",
  2127. sizeof(kcontrol->id.name)) ||
  2128. strnstr(kcontrol->id.name, "TX_7",
  2129. sizeof(kcontrol->id.name))) {
  2130. port->channel = TDM_7;
  2131. } else {
  2132. pr_err("%s: unsupported channel in: %s\n",
  2133. __func__, kcontrol->id.name);
  2134. return -EINVAL;
  2135. }
  2136. } else {
  2137. return -EINVAL;
  2138. }
  2139. return 0;
  2140. }
  2141. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2142. struct snd_ctl_elem_value *ucontrol)
  2143. {
  2144. struct tdm_port port;
  2145. int ret = tdm_get_port_idx(kcontrol, &port);
  2146. if (ret) {
  2147. pr_err("%s: unsupported control: %s\n",
  2148. __func__, kcontrol->id.name);
  2149. } else {
  2150. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2151. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2152. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2153. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2154. ucontrol->value.enumerated.item[0]);
  2155. }
  2156. return ret;
  2157. }
  2158. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2159. struct snd_ctl_elem_value *ucontrol)
  2160. {
  2161. struct tdm_port port;
  2162. int ret = tdm_get_port_idx(kcontrol, &port);
  2163. if (ret) {
  2164. pr_err("%s: unsupported control: %s\n",
  2165. __func__, kcontrol->id.name);
  2166. } else {
  2167. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2168. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2169. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2170. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2171. ucontrol->value.enumerated.item[0]);
  2172. }
  2173. return ret;
  2174. }
  2175. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2176. struct snd_ctl_elem_value *ucontrol)
  2177. {
  2178. struct tdm_port port;
  2179. int ret = tdm_get_port_idx(kcontrol, &port);
  2180. if (ret) {
  2181. pr_err("%s: unsupported control: %s\n",
  2182. __func__, kcontrol->id.name);
  2183. } else {
  2184. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2185. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2186. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2187. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2188. ucontrol->value.enumerated.item[0]);
  2189. }
  2190. return ret;
  2191. }
  2192. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2193. struct snd_ctl_elem_value *ucontrol)
  2194. {
  2195. struct tdm_port port;
  2196. int ret = tdm_get_port_idx(kcontrol, &port);
  2197. if (ret) {
  2198. pr_err("%s: unsupported control: %s\n",
  2199. __func__, kcontrol->id.name);
  2200. } else {
  2201. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2202. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2203. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2204. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2205. ucontrol->value.enumerated.item[0]);
  2206. }
  2207. return ret;
  2208. }
  2209. static int tdm_get_format(int value)
  2210. {
  2211. int format = 0;
  2212. switch (value) {
  2213. case 0:
  2214. format = SNDRV_PCM_FORMAT_S16_LE;
  2215. break;
  2216. case 1:
  2217. format = SNDRV_PCM_FORMAT_S24_LE;
  2218. break;
  2219. case 2:
  2220. format = SNDRV_PCM_FORMAT_S32_LE;
  2221. break;
  2222. default:
  2223. format = SNDRV_PCM_FORMAT_S16_LE;
  2224. break;
  2225. }
  2226. return format;
  2227. }
  2228. static int tdm_get_format_val(int format)
  2229. {
  2230. int value = 0;
  2231. switch (format) {
  2232. case SNDRV_PCM_FORMAT_S16_LE:
  2233. value = 0;
  2234. break;
  2235. case SNDRV_PCM_FORMAT_S24_LE:
  2236. value = 1;
  2237. break;
  2238. case SNDRV_PCM_FORMAT_S32_LE:
  2239. value = 2;
  2240. break;
  2241. default:
  2242. value = 0;
  2243. break;
  2244. }
  2245. return value;
  2246. }
  2247. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2248. struct snd_ctl_elem_value *ucontrol)
  2249. {
  2250. struct tdm_port port;
  2251. int ret = tdm_get_port_idx(kcontrol, &port);
  2252. if (ret) {
  2253. pr_err("%s: unsupported control: %s\n",
  2254. __func__, kcontrol->id.name);
  2255. } else {
  2256. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2257. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2258. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2259. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2260. ucontrol->value.enumerated.item[0]);
  2261. }
  2262. return ret;
  2263. }
  2264. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2265. struct snd_ctl_elem_value *ucontrol)
  2266. {
  2267. struct tdm_port port;
  2268. int ret = tdm_get_port_idx(kcontrol, &port);
  2269. if (ret) {
  2270. pr_err("%s: unsupported control: %s\n",
  2271. __func__, kcontrol->id.name);
  2272. } else {
  2273. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2274. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2275. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2276. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2277. ucontrol->value.enumerated.item[0]);
  2278. }
  2279. return ret;
  2280. }
  2281. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2282. struct snd_ctl_elem_value *ucontrol)
  2283. {
  2284. struct tdm_port port;
  2285. int ret = tdm_get_port_idx(kcontrol, &port);
  2286. if (ret) {
  2287. pr_err("%s: unsupported control: %s\n",
  2288. __func__, kcontrol->id.name);
  2289. } else {
  2290. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2291. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2292. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2293. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2294. ucontrol->value.enumerated.item[0]);
  2295. }
  2296. return ret;
  2297. }
  2298. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2299. struct snd_ctl_elem_value *ucontrol)
  2300. {
  2301. struct tdm_port port;
  2302. int ret = tdm_get_port_idx(kcontrol, &port);
  2303. if (ret) {
  2304. pr_err("%s: unsupported control: %s\n",
  2305. __func__, kcontrol->id.name);
  2306. } else {
  2307. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2308. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2309. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2310. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2311. ucontrol->value.enumerated.item[0]);
  2312. }
  2313. return ret;
  2314. }
  2315. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2316. struct snd_ctl_elem_value *ucontrol)
  2317. {
  2318. struct tdm_port port;
  2319. int ret = tdm_get_port_idx(kcontrol, &port);
  2320. if (ret) {
  2321. pr_err("%s: unsupported control: %s\n",
  2322. __func__, kcontrol->id.name);
  2323. } else {
  2324. ucontrol->value.enumerated.item[0] =
  2325. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2326. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2327. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2328. ucontrol->value.enumerated.item[0]);
  2329. }
  2330. return ret;
  2331. }
  2332. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2333. struct snd_ctl_elem_value *ucontrol)
  2334. {
  2335. struct tdm_port port;
  2336. int ret = tdm_get_port_idx(kcontrol, &port);
  2337. if (ret) {
  2338. pr_err("%s: unsupported control: %s\n",
  2339. __func__, kcontrol->id.name);
  2340. } else {
  2341. tdm_rx_cfg[port.mode][port.channel].channels =
  2342. ucontrol->value.enumerated.item[0] + 1;
  2343. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2344. tdm_rx_cfg[port.mode][port.channel].channels,
  2345. ucontrol->value.enumerated.item[0] + 1);
  2346. }
  2347. return ret;
  2348. }
  2349. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2350. struct snd_ctl_elem_value *ucontrol)
  2351. {
  2352. struct tdm_port port;
  2353. int ret = tdm_get_port_idx(kcontrol, &port);
  2354. if (ret) {
  2355. pr_err("%s: unsupported control: %s\n",
  2356. __func__, kcontrol->id.name);
  2357. } else {
  2358. ucontrol->value.enumerated.item[0] =
  2359. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2360. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2361. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2362. ucontrol->value.enumerated.item[0]);
  2363. }
  2364. return ret;
  2365. }
  2366. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2367. struct snd_ctl_elem_value *ucontrol)
  2368. {
  2369. struct tdm_port port;
  2370. int ret = tdm_get_port_idx(kcontrol, &port);
  2371. if (ret) {
  2372. pr_err("%s: unsupported control: %s\n",
  2373. __func__, kcontrol->id.name);
  2374. } else {
  2375. tdm_tx_cfg[port.mode][port.channel].channels =
  2376. ucontrol->value.enumerated.item[0] + 1;
  2377. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2378. tdm_tx_cfg[port.mode][port.channel].channels,
  2379. ucontrol->value.enumerated.item[0] + 1);
  2380. }
  2381. return ret;
  2382. }
  2383. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2384. {
  2385. int idx;
  2386. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2387. sizeof("PRIM_AUX_PCM"))) {
  2388. idx = PRIM_AUX_PCM;
  2389. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2390. sizeof("SEC_AUX_PCM"))) {
  2391. idx = SEC_AUX_PCM;
  2392. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2393. sizeof("TERT_AUX_PCM"))) {
  2394. idx = TERT_AUX_PCM;
  2395. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2396. sizeof("QUAT_AUX_PCM"))) {
  2397. idx = QUAT_AUX_PCM;
  2398. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2399. sizeof("QUIN_AUX_PCM"))) {
  2400. idx = QUIN_AUX_PCM;
  2401. } else {
  2402. pr_err("%s: unsupported port: %s\n",
  2403. __func__, kcontrol->id.name);
  2404. idx = -EINVAL;
  2405. }
  2406. return idx;
  2407. }
  2408. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2409. struct snd_ctl_elem_value *ucontrol)
  2410. {
  2411. int idx = aux_pcm_get_port_idx(kcontrol);
  2412. if (idx < 0)
  2413. return idx;
  2414. aux_pcm_rx_cfg[idx].sample_rate =
  2415. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2416. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2417. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2418. ucontrol->value.enumerated.item[0]);
  2419. return 0;
  2420. }
  2421. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2422. struct snd_ctl_elem_value *ucontrol)
  2423. {
  2424. int idx = aux_pcm_get_port_idx(kcontrol);
  2425. if (idx < 0)
  2426. return idx;
  2427. ucontrol->value.enumerated.item[0] =
  2428. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2429. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2430. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2431. ucontrol->value.enumerated.item[0]);
  2432. return 0;
  2433. }
  2434. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2435. struct snd_ctl_elem_value *ucontrol)
  2436. {
  2437. int idx = aux_pcm_get_port_idx(kcontrol);
  2438. if (idx < 0)
  2439. return idx;
  2440. aux_pcm_tx_cfg[idx].sample_rate =
  2441. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2442. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2443. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2444. ucontrol->value.enumerated.item[0]);
  2445. return 0;
  2446. }
  2447. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2448. struct snd_ctl_elem_value *ucontrol)
  2449. {
  2450. int idx = aux_pcm_get_port_idx(kcontrol);
  2451. if (idx < 0)
  2452. return idx;
  2453. ucontrol->value.enumerated.item[0] =
  2454. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2455. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2456. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2457. ucontrol->value.enumerated.item[0]);
  2458. return 0;
  2459. }
  2460. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2461. {
  2462. int idx;
  2463. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2464. sizeof("PRIM_MI2S_RX"))) {
  2465. idx = PRIM_MI2S;
  2466. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2467. sizeof("SEC_MI2S_RX"))) {
  2468. idx = SEC_MI2S;
  2469. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2470. sizeof("TERT_MI2S_RX"))) {
  2471. idx = TERT_MI2S;
  2472. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2473. sizeof("QUAT_MI2S_RX"))) {
  2474. idx = QUAT_MI2S;
  2475. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2476. sizeof("QUIN_MI2S_RX"))) {
  2477. idx = QUIN_MI2S;
  2478. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2479. sizeof("PRIM_MI2S_TX"))) {
  2480. idx = PRIM_MI2S;
  2481. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2482. sizeof("SEC_MI2S_TX"))) {
  2483. idx = SEC_MI2S;
  2484. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2485. sizeof("TERT_MI2S_TX"))) {
  2486. idx = TERT_MI2S;
  2487. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2488. sizeof("QUAT_MI2S_TX"))) {
  2489. idx = QUAT_MI2S;
  2490. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2491. sizeof("QUIN_MI2S_TX"))) {
  2492. idx = QUIN_MI2S;
  2493. } else {
  2494. pr_err("%s: unsupported channel: %s\n",
  2495. __func__, kcontrol->id.name);
  2496. idx = -EINVAL;
  2497. }
  2498. return idx;
  2499. }
  2500. static int mi2s_get_sample_rate_val(int sample_rate)
  2501. {
  2502. int sample_rate_val;
  2503. switch (sample_rate) {
  2504. case SAMPLING_RATE_8KHZ:
  2505. sample_rate_val = 0;
  2506. break;
  2507. case SAMPLING_RATE_11P025KHZ:
  2508. sample_rate_val = 1;
  2509. break;
  2510. case SAMPLING_RATE_16KHZ:
  2511. sample_rate_val = 2;
  2512. break;
  2513. case SAMPLING_RATE_22P05KHZ:
  2514. sample_rate_val = 3;
  2515. break;
  2516. case SAMPLING_RATE_32KHZ:
  2517. sample_rate_val = 4;
  2518. break;
  2519. case SAMPLING_RATE_44P1KHZ:
  2520. sample_rate_val = 5;
  2521. break;
  2522. case SAMPLING_RATE_48KHZ:
  2523. sample_rate_val = 6;
  2524. break;
  2525. case SAMPLING_RATE_96KHZ:
  2526. sample_rate_val = 7;
  2527. break;
  2528. case SAMPLING_RATE_192KHZ:
  2529. sample_rate_val = 8;
  2530. break;
  2531. default:
  2532. sample_rate_val = 6;
  2533. break;
  2534. }
  2535. return sample_rate_val;
  2536. }
  2537. static int mi2s_get_sample_rate(int value)
  2538. {
  2539. int sample_rate;
  2540. switch (value) {
  2541. case 0:
  2542. sample_rate = SAMPLING_RATE_8KHZ;
  2543. break;
  2544. case 1:
  2545. sample_rate = SAMPLING_RATE_11P025KHZ;
  2546. break;
  2547. case 2:
  2548. sample_rate = SAMPLING_RATE_16KHZ;
  2549. break;
  2550. case 3:
  2551. sample_rate = SAMPLING_RATE_22P05KHZ;
  2552. break;
  2553. case 4:
  2554. sample_rate = SAMPLING_RATE_32KHZ;
  2555. break;
  2556. case 5:
  2557. sample_rate = SAMPLING_RATE_44P1KHZ;
  2558. break;
  2559. case 6:
  2560. sample_rate = SAMPLING_RATE_48KHZ;
  2561. break;
  2562. case 7:
  2563. sample_rate = SAMPLING_RATE_96KHZ;
  2564. break;
  2565. case 8:
  2566. sample_rate = SAMPLING_RATE_192KHZ;
  2567. break;
  2568. default:
  2569. sample_rate = SAMPLING_RATE_48KHZ;
  2570. break;
  2571. }
  2572. return sample_rate;
  2573. }
  2574. static int mi2s_auxpcm_get_format(int value)
  2575. {
  2576. int format;
  2577. switch (value) {
  2578. case 0:
  2579. format = SNDRV_PCM_FORMAT_S16_LE;
  2580. break;
  2581. case 1:
  2582. format = SNDRV_PCM_FORMAT_S24_LE;
  2583. break;
  2584. case 2:
  2585. format = SNDRV_PCM_FORMAT_S24_3LE;
  2586. break;
  2587. case 3:
  2588. format = SNDRV_PCM_FORMAT_S32_LE;
  2589. break;
  2590. default:
  2591. format = SNDRV_PCM_FORMAT_S16_LE;
  2592. break;
  2593. }
  2594. return format;
  2595. }
  2596. static int mi2s_auxpcm_get_format_value(int format)
  2597. {
  2598. int value;
  2599. switch (format) {
  2600. case SNDRV_PCM_FORMAT_S16_LE:
  2601. value = 0;
  2602. break;
  2603. case SNDRV_PCM_FORMAT_S24_LE:
  2604. value = 1;
  2605. break;
  2606. case SNDRV_PCM_FORMAT_S24_3LE:
  2607. value = 2;
  2608. break;
  2609. case SNDRV_PCM_FORMAT_S32_LE:
  2610. value = 3;
  2611. break;
  2612. default:
  2613. value = 0;
  2614. break;
  2615. }
  2616. return value;
  2617. }
  2618. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2619. struct snd_ctl_elem_value *ucontrol)
  2620. {
  2621. int idx = mi2s_get_port_idx(kcontrol);
  2622. if (idx < 0)
  2623. return idx;
  2624. mi2s_rx_cfg[idx].sample_rate =
  2625. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2626. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2627. idx, mi2s_rx_cfg[idx].sample_rate,
  2628. ucontrol->value.enumerated.item[0]);
  2629. return 0;
  2630. }
  2631. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2632. struct snd_ctl_elem_value *ucontrol)
  2633. {
  2634. int idx = mi2s_get_port_idx(kcontrol);
  2635. if (idx < 0)
  2636. return idx;
  2637. ucontrol->value.enumerated.item[0] =
  2638. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2639. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2640. idx, mi2s_rx_cfg[idx].sample_rate,
  2641. ucontrol->value.enumerated.item[0]);
  2642. return 0;
  2643. }
  2644. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2645. struct snd_ctl_elem_value *ucontrol)
  2646. {
  2647. int idx = mi2s_get_port_idx(kcontrol);
  2648. if (idx < 0)
  2649. return idx;
  2650. mi2s_tx_cfg[idx].sample_rate =
  2651. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2652. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2653. idx, mi2s_tx_cfg[idx].sample_rate,
  2654. ucontrol->value.enumerated.item[0]);
  2655. return 0;
  2656. }
  2657. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2658. struct snd_ctl_elem_value *ucontrol)
  2659. {
  2660. int idx = mi2s_get_port_idx(kcontrol);
  2661. if (idx < 0)
  2662. return idx;
  2663. ucontrol->value.enumerated.item[0] =
  2664. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2665. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2666. idx, mi2s_tx_cfg[idx].sample_rate,
  2667. ucontrol->value.enumerated.item[0]);
  2668. return 0;
  2669. }
  2670. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2671. struct snd_ctl_elem_value *ucontrol)
  2672. {
  2673. int idx = mi2s_get_port_idx(kcontrol);
  2674. if (idx < 0)
  2675. return idx;
  2676. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2677. idx, mi2s_rx_cfg[idx].channels);
  2678. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2679. return 0;
  2680. }
  2681. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2682. struct snd_ctl_elem_value *ucontrol)
  2683. {
  2684. int idx = mi2s_get_port_idx(kcontrol);
  2685. if (idx < 0)
  2686. return idx;
  2687. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2688. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2689. idx, mi2s_rx_cfg[idx].channels);
  2690. return 1;
  2691. }
  2692. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2693. struct snd_ctl_elem_value *ucontrol)
  2694. {
  2695. int idx = mi2s_get_port_idx(kcontrol);
  2696. if (idx < 0)
  2697. return idx;
  2698. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2699. idx, mi2s_tx_cfg[idx].channels);
  2700. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2701. return 0;
  2702. }
  2703. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2704. struct snd_ctl_elem_value *ucontrol)
  2705. {
  2706. int idx = mi2s_get_port_idx(kcontrol);
  2707. if (idx < 0)
  2708. return idx;
  2709. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2710. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2711. idx, mi2s_tx_cfg[idx].channels);
  2712. return 1;
  2713. }
  2714. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2715. struct snd_ctl_elem_value *ucontrol)
  2716. {
  2717. int idx = mi2s_get_port_idx(kcontrol);
  2718. if (idx < 0)
  2719. return idx;
  2720. ucontrol->value.enumerated.item[0] =
  2721. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2722. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2723. idx, mi2s_rx_cfg[idx].bit_format,
  2724. ucontrol->value.enumerated.item[0]);
  2725. return 0;
  2726. }
  2727. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2728. struct snd_ctl_elem_value *ucontrol)
  2729. {
  2730. int idx = mi2s_get_port_idx(kcontrol);
  2731. if (idx < 0)
  2732. return idx;
  2733. mi2s_rx_cfg[idx].bit_format =
  2734. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2735. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2736. idx, mi2s_rx_cfg[idx].bit_format,
  2737. ucontrol->value.enumerated.item[0]);
  2738. return 0;
  2739. }
  2740. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2741. struct snd_ctl_elem_value *ucontrol)
  2742. {
  2743. int idx = mi2s_get_port_idx(kcontrol);
  2744. if (idx < 0)
  2745. return idx;
  2746. ucontrol->value.enumerated.item[0] =
  2747. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2748. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2749. idx, mi2s_tx_cfg[idx].bit_format,
  2750. ucontrol->value.enumerated.item[0]);
  2751. return 0;
  2752. }
  2753. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2754. struct snd_ctl_elem_value *ucontrol)
  2755. {
  2756. int idx = mi2s_get_port_idx(kcontrol);
  2757. if (idx < 0)
  2758. return idx;
  2759. mi2s_tx_cfg[idx].bit_format =
  2760. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2761. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2762. idx, mi2s_tx_cfg[idx].bit_format,
  2763. ucontrol->value.enumerated.item[0]);
  2764. return 0;
  2765. }
  2766. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2767. struct snd_ctl_elem_value *ucontrol)
  2768. {
  2769. int idx = aux_pcm_get_port_idx(kcontrol);
  2770. if (idx < 0)
  2771. return idx;
  2772. ucontrol->value.enumerated.item[0] =
  2773. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2774. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2775. idx, aux_pcm_rx_cfg[idx].bit_format,
  2776. ucontrol->value.enumerated.item[0]);
  2777. return 0;
  2778. }
  2779. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2780. struct snd_ctl_elem_value *ucontrol)
  2781. {
  2782. int idx = aux_pcm_get_port_idx(kcontrol);
  2783. if (idx < 0)
  2784. return idx;
  2785. aux_pcm_rx_cfg[idx].bit_format =
  2786. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2787. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2788. idx, aux_pcm_rx_cfg[idx].bit_format,
  2789. ucontrol->value.enumerated.item[0]);
  2790. return 0;
  2791. }
  2792. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2793. struct snd_ctl_elem_value *ucontrol)
  2794. {
  2795. int idx = aux_pcm_get_port_idx(kcontrol);
  2796. if (idx < 0)
  2797. return idx;
  2798. ucontrol->value.enumerated.item[0] =
  2799. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2800. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2801. idx, aux_pcm_tx_cfg[idx].bit_format,
  2802. ucontrol->value.enumerated.item[0]);
  2803. return 0;
  2804. }
  2805. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2806. struct snd_ctl_elem_value *ucontrol)
  2807. {
  2808. int idx = aux_pcm_get_port_idx(kcontrol);
  2809. if (idx < 0)
  2810. return idx;
  2811. aux_pcm_tx_cfg[idx].bit_format =
  2812. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2813. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2814. idx, aux_pcm_tx_cfg[idx].bit_format,
  2815. ucontrol->value.enumerated.item[0]);
  2816. return 0;
  2817. }
  2818. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2819. {
  2820. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2821. struct snd_soc_card *card = codec->component.card;
  2822. struct msm_asoc_mach_data *pdata =
  2823. snd_soc_card_get_drvdata(card);
  2824. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2825. msm_hifi_control);
  2826. if (!pdata || !pdata->hph_en1_gpio_p) {
  2827. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2828. return -EINVAL;
  2829. }
  2830. if (msm_hifi_control == MSM_HIFI_ON) {
  2831. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2832. /* 5msec delay needed as per HW requirement */
  2833. usleep_range(5000, 5010);
  2834. } else {
  2835. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2836. }
  2837. snd_soc_dapm_sync(dapm);
  2838. return 0;
  2839. }
  2840. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2841. struct snd_ctl_elem_value *ucontrol)
  2842. {
  2843. pr_debug("%s: msm_hifi_control = %d\n",
  2844. __func__, msm_hifi_control);
  2845. ucontrol->value.integer.value[0] = msm_hifi_control;
  2846. return 0;
  2847. }
  2848. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2849. struct snd_ctl_elem_value *ucontrol)
  2850. {
  2851. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2852. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2853. __func__, ucontrol->value.integer.value[0]);
  2854. msm_hifi_control = ucontrol->value.integer.value[0];
  2855. msm_hifi_ctrl(codec);
  2856. return 0;
  2857. }
  2858. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2859. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2860. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2861. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2862. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2863. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2864. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2865. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2866. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2867. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2868. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2869. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2870. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2871. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2872. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2873. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2874. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2875. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2876. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2877. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2878. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2879. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2880. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2881. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2882. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2883. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2884. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2885. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2886. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2887. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2888. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2889. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2890. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2891. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2892. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2893. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2894. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2895. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2896. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2897. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2898. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2899. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2900. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2901. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2902. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2903. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2904. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2905. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2906. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2907. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2908. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2909. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2910. wsa_cdc_dma_rx_0_sample_rate,
  2911. cdc_dma_rx_sample_rate_get,
  2912. cdc_dma_rx_sample_rate_put),
  2913. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2914. wsa_cdc_dma_rx_1_sample_rate,
  2915. cdc_dma_rx_sample_rate_get,
  2916. cdc_dma_rx_sample_rate_put),
  2917. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2918. rx_cdc_dma_rx_0_sample_rate,
  2919. cdc_dma_rx_sample_rate_get,
  2920. cdc_dma_rx_sample_rate_put),
  2921. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2922. rx_cdc_dma_rx_1_sample_rate,
  2923. cdc_dma_rx_sample_rate_get,
  2924. cdc_dma_rx_sample_rate_put),
  2925. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2926. rx_cdc_dma_rx_2_sample_rate,
  2927. cdc_dma_rx_sample_rate_get,
  2928. cdc_dma_rx_sample_rate_put),
  2929. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2930. rx_cdc_dma_rx_3_sample_rate,
  2931. cdc_dma_rx_sample_rate_get,
  2932. cdc_dma_rx_sample_rate_put),
  2933. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2934. rx_cdc_dma_rx_5_sample_rate,
  2935. cdc_dma_rx_sample_rate_get,
  2936. cdc_dma_rx_sample_rate_put),
  2937. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2938. wsa_cdc_dma_tx_0_sample_rate,
  2939. cdc_dma_tx_sample_rate_get,
  2940. cdc_dma_tx_sample_rate_put),
  2941. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2942. wsa_cdc_dma_tx_1_sample_rate,
  2943. cdc_dma_tx_sample_rate_get,
  2944. cdc_dma_tx_sample_rate_put),
  2945. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2946. wsa_cdc_dma_tx_2_sample_rate,
  2947. cdc_dma_tx_sample_rate_get,
  2948. cdc_dma_tx_sample_rate_put),
  2949. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2950. tx_cdc_dma_tx_0_sample_rate,
  2951. cdc_dma_tx_sample_rate_get,
  2952. cdc_dma_tx_sample_rate_put),
  2953. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2954. tx_cdc_dma_tx_3_sample_rate,
  2955. cdc_dma_tx_sample_rate_get,
  2956. cdc_dma_tx_sample_rate_put),
  2957. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2958. tx_cdc_dma_tx_4_sample_rate,
  2959. cdc_dma_tx_sample_rate_get,
  2960. cdc_dma_tx_sample_rate_put),
  2961. };
  2962. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2963. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2964. slim_rx_ch_get, slim_rx_ch_put),
  2965. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2966. slim_rx_ch_get, slim_rx_ch_put),
  2967. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2968. slim_tx_ch_get, slim_tx_ch_put),
  2969. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2970. slim_tx_ch_get, slim_tx_ch_put),
  2971. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2972. slim_rx_ch_get, slim_rx_ch_put),
  2973. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2974. slim_rx_ch_get, slim_rx_ch_put),
  2975. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2976. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2977. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2978. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2979. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2980. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2981. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2982. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2983. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2984. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2985. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2986. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2987. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2988. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2989. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2990. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2991. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2992. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2993. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2994. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2995. };
  2996. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2997. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2998. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2999. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3000. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3001. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3002. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3003. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3004. proxy_rx_ch_get, proxy_rx_ch_put),
  3005. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3006. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3007. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3008. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3009. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3010. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3011. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3012. usb_audio_rx_sample_rate_get,
  3013. usb_audio_rx_sample_rate_put),
  3014. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3015. usb_audio_tx_sample_rate_get,
  3016. usb_audio_tx_sample_rate_put),
  3017. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3018. ext_disp_rx_sample_rate_get,
  3019. ext_disp_rx_sample_rate_put),
  3020. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3021. tdm_rx_sample_rate_get,
  3022. tdm_rx_sample_rate_put),
  3023. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3024. tdm_tx_sample_rate_get,
  3025. tdm_tx_sample_rate_put),
  3026. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3027. tdm_rx_format_get,
  3028. tdm_rx_format_put),
  3029. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3030. tdm_tx_format_get,
  3031. tdm_tx_format_put),
  3032. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3033. tdm_rx_ch_get,
  3034. tdm_rx_ch_put),
  3035. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3036. tdm_tx_ch_get,
  3037. tdm_tx_ch_put),
  3038. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3039. tdm_rx_sample_rate_get,
  3040. tdm_rx_sample_rate_put),
  3041. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3042. tdm_tx_sample_rate_get,
  3043. tdm_tx_sample_rate_put),
  3044. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3045. tdm_rx_format_get,
  3046. tdm_rx_format_put),
  3047. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3048. tdm_tx_format_get,
  3049. tdm_tx_format_put),
  3050. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3051. tdm_rx_ch_get,
  3052. tdm_rx_ch_put),
  3053. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3054. tdm_tx_ch_get,
  3055. tdm_tx_ch_put),
  3056. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3057. tdm_rx_sample_rate_get,
  3058. tdm_rx_sample_rate_put),
  3059. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3060. tdm_tx_sample_rate_get,
  3061. tdm_tx_sample_rate_put),
  3062. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3063. tdm_rx_format_get,
  3064. tdm_rx_format_put),
  3065. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3066. tdm_tx_format_get,
  3067. tdm_tx_format_put),
  3068. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3069. tdm_rx_ch_get,
  3070. tdm_rx_ch_put),
  3071. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3072. tdm_tx_ch_get,
  3073. tdm_tx_ch_put),
  3074. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3075. tdm_rx_sample_rate_get,
  3076. tdm_rx_sample_rate_put),
  3077. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3078. tdm_tx_sample_rate_get,
  3079. tdm_tx_sample_rate_put),
  3080. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3081. tdm_rx_format_get,
  3082. tdm_rx_format_put),
  3083. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3084. tdm_tx_format_get,
  3085. tdm_tx_format_put),
  3086. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3087. tdm_rx_ch_get,
  3088. tdm_rx_ch_put),
  3089. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3090. tdm_tx_ch_get,
  3091. tdm_tx_ch_put),
  3092. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3093. tdm_rx_sample_rate_get,
  3094. tdm_rx_sample_rate_put),
  3095. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3096. tdm_tx_sample_rate_get,
  3097. tdm_tx_sample_rate_put),
  3098. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3099. tdm_rx_format_get,
  3100. tdm_rx_format_put),
  3101. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3102. tdm_tx_format_get,
  3103. tdm_tx_format_put),
  3104. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3105. tdm_rx_ch_get,
  3106. tdm_rx_ch_put),
  3107. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3108. tdm_tx_ch_get,
  3109. tdm_tx_ch_put),
  3110. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3111. aux_pcm_rx_sample_rate_get,
  3112. aux_pcm_rx_sample_rate_put),
  3113. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3114. aux_pcm_rx_sample_rate_get,
  3115. aux_pcm_rx_sample_rate_put),
  3116. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3117. aux_pcm_rx_sample_rate_get,
  3118. aux_pcm_rx_sample_rate_put),
  3119. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3120. aux_pcm_rx_sample_rate_get,
  3121. aux_pcm_rx_sample_rate_put),
  3122. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3123. aux_pcm_rx_sample_rate_get,
  3124. aux_pcm_rx_sample_rate_put),
  3125. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3126. aux_pcm_tx_sample_rate_get,
  3127. aux_pcm_tx_sample_rate_put),
  3128. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3129. aux_pcm_tx_sample_rate_get,
  3130. aux_pcm_tx_sample_rate_put),
  3131. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3132. aux_pcm_tx_sample_rate_get,
  3133. aux_pcm_tx_sample_rate_put),
  3134. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3135. aux_pcm_tx_sample_rate_get,
  3136. aux_pcm_tx_sample_rate_put),
  3137. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3138. aux_pcm_tx_sample_rate_get,
  3139. aux_pcm_tx_sample_rate_put),
  3140. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3141. mi2s_rx_sample_rate_get,
  3142. mi2s_rx_sample_rate_put),
  3143. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3144. mi2s_rx_sample_rate_get,
  3145. mi2s_rx_sample_rate_put),
  3146. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3147. mi2s_rx_sample_rate_get,
  3148. mi2s_rx_sample_rate_put),
  3149. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3150. mi2s_rx_sample_rate_get,
  3151. mi2s_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3153. mi2s_rx_sample_rate_get,
  3154. mi2s_rx_sample_rate_put),
  3155. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3156. mi2s_tx_sample_rate_get,
  3157. mi2s_tx_sample_rate_put),
  3158. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3159. mi2s_tx_sample_rate_get,
  3160. mi2s_tx_sample_rate_put),
  3161. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3162. mi2s_tx_sample_rate_get,
  3163. mi2s_tx_sample_rate_put),
  3164. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3165. mi2s_tx_sample_rate_get,
  3166. mi2s_tx_sample_rate_put),
  3167. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3168. mi2s_tx_sample_rate_get,
  3169. mi2s_tx_sample_rate_put),
  3170. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3171. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3172. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3173. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3174. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3175. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3176. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3177. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3178. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3179. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3180. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3181. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3182. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3183. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3184. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3185. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3186. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3187. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3188. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3189. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3190. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3191. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3192. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3193. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3194. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3195. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3196. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3197. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3198. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3199. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3200. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3201. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3202. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3203. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3204. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3205. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3206. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3207. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3208. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3209. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3210. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3211. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3212. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3213. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3214. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3215. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3216. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3217. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3218. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3219. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3220. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3221. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3222. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3223. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3224. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3225. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3226. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3227. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3228. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3229. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3230. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3231. msm_hifi_put),
  3232. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3233. msm_bt_sample_rate_get,
  3234. msm_bt_sample_rate_put),
  3235. };
  3236. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3237. int enable, bool dapm)
  3238. {
  3239. int ret = 0;
  3240. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3241. ret = tavil_cdc_mclk_enable(codec, enable);
  3242. } else {
  3243. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3244. __func__);
  3245. ret = -EINVAL;
  3246. }
  3247. return ret;
  3248. }
  3249. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3250. int enable, bool dapm)
  3251. {
  3252. int ret = 0;
  3253. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3254. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3255. } else {
  3256. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3257. __func__);
  3258. ret = -EINVAL;
  3259. }
  3260. return ret;
  3261. }
  3262. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3263. struct snd_kcontrol *kcontrol, int event)
  3264. {
  3265. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3266. pr_debug("%s: event = %d\n", __func__, event);
  3267. switch (event) {
  3268. case SND_SOC_DAPM_PRE_PMU:
  3269. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3270. case SND_SOC_DAPM_POST_PMD:
  3271. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3272. }
  3273. return 0;
  3274. }
  3275. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3276. struct snd_kcontrol *kcontrol, int event)
  3277. {
  3278. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3279. pr_debug("%s: event = %d\n", __func__, event);
  3280. switch (event) {
  3281. case SND_SOC_DAPM_PRE_PMU:
  3282. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3283. case SND_SOC_DAPM_POST_PMD:
  3284. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3285. }
  3286. return 0;
  3287. }
  3288. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3289. struct snd_kcontrol *k, int event)
  3290. {
  3291. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3292. struct snd_soc_card *card = codec->component.card;
  3293. struct msm_asoc_mach_data *pdata =
  3294. snd_soc_card_get_drvdata(card);
  3295. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3296. __func__, msm_hifi_control);
  3297. if (!pdata || !pdata->hph_en0_gpio_p) {
  3298. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3299. return -EINVAL;
  3300. }
  3301. if (msm_hifi_control != MSM_HIFI_ON) {
  3302. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3303. __func__);
  3304. return 0;
  3305. }
  3306. switch (event) {
  3307. case SND_SOC_DAPM_POST_PMU:
  3308. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3309. break;
  3310. case SND_SOC_DAPM_PRE_PMD:
  3311. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3312. break;
  3313. }
  3314. return 0;
  3315. }
  3316. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3317. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3318. msm_mclk_event,
  3319. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3320. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3321. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3322. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3323. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3324. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3325. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3326. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3327. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3328. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3329. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3330. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3331. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3332. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3333. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3334. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3335. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3336. };
  3337. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3338. struct snd_kcontrol *kcontrol, int event)
  3339. {
  3340. struct msm_asoc_mach_data *pdata = NULL;
  3341. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3342. int ret = 0;
  3343. u32 dmic_idx;
  3344. int *dmic_gpio_cnt;
  3345. struct device_node *dmic_gpio;
  3346. char *wname;
  3347. wname = strpbrk(w->name, "0123");
  3348. if (!wname) {
  3349. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3350. return -EINVAL;
  3351. }
  3352. ret = kstrtouint(wname, 10, &dmic_idx);
  3353. if (ret < 0) {
  3354. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3355. __func__);
  3356. return -EINVAL;
  3357. }
  3358. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3359. switch (dmic_idx) {
  3360. case 0:
  3361. case 1:
  3362. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3363. dmic_gpio = pdata->dmic01_gpio_p;
  3364. break;
  3365. case 2:
  3366. case 3:
  3367. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3368. dmic_gpio = pdata->dmic23_gpio_p;
  3369. break;
  3370. default:
  3371. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3372. __func__);
  3373. return -EINVAL;
  3374. }
  3375. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3376. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3377. switch (event) {
  3378. case SND_SOC_DAPM_PRE_PMU:
  3379. (*dmic_gpio_cnt)++;
  3380. if (*dmic_gpio_cnt == 1) {
  3381. ret = msm_cdc_pinctrl_select_active_state(
  3382. dmic_gpio);
  3383. if (ret < 0) {
  3384. pr_err("%s: gpio set cannot be activated %sd",
  3385. __func__, "dmic_gpio");
  3386. return ret;
  3387. }
  3388. }
  3389. break;
  3390. case SND_SOC_DAPM_POST_PMD:
  3391. (*dmic_gpio_cnt)--;
  3392. if (*dmic_gpio_cnt == 0) {
  3393. ret = msm_cdc_pinctrl_select_sleep_state(
  3394. dmic_gpio);
  3395. if (ret < 0) {
  3396. pr_err("%s: gpio set cannot be de-activated %sd",
  3397. __func__, "dmic_gpio");
  3398. return ret;
  3399. }
  3400. }
  3401. break;
  3402. default:
  3403. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3404. return -EINVAL;
  3405. }
  3406. return 0;
  3407. }
  3408. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3409. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3410. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3411. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3412. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3413. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3414. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3415. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3416. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3417. };
  3418. static inline int param_is_mask(int p)
  3419. {
  3420. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3421. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3422. }
  3423. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3424. int n)
  3425. {
  3426. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3427. }
  3428. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3429. unsigned int bit)
  3430. {
  3431. if (bit >= SNDRV_MASK_MAX)
  3432. return;
  3433. if (param_is_mask(n)) {
  3434. struct snd_mask *m = param_to_mask(p, n);
  3435. m->bits[0] = 0;
  3436. m->bits[1] = 0;
  3437. m->bits[bit >> 5] |= (1 << (bit & 31));
  3438. }
  3439. }
  3440. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3441. {
  3442. int ch_id = 0;
  3443. switch (be_id) {
  3444. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3445. ch_id = SLIM_RX_0;
  3446. break;
  3447. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3448. ch_id = SLIM_RX_1;
  3449. break;
  3450. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3451. ch_id = SLIM_RX_2;
  3452. break;
  3453. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3454. ch_id = SLIM_RX_3;
  3455. break;
  3456. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3457. ch_id = SLIM_RX_4;
  3458. break;
  3459. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3460. ch_id = SLIM_RX_6;
  3461. break;
  3462. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3463. ch_id = SLIM_TX_0;
  3464. break;
  3465. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3466. ch_id = SLIM_TX_3;
  3467. break;
  3468. default:
  3469. ch_id = SLIM_RX_0;
  3470. break;
  3471. }
  3472. return ch_id;
  3473. }
  3474. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3475. {
  3476. int idx = 0;
  3477. switch (be_id) {
  3478. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3479. idx = WSA_CDC_DMA_RX_0;
  3480. break;
  3481. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3482. idx = WSA_CDC_DMA_TX_0;
  3483. break;
  3484. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3485. idx = WSA_CDC_DMA_RX_1;
  3486. break;
  3487. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3488. idx = WSA_CDC_DMA_TX_1;
  3489. break;
  3490. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3491. idx = WSA_CDC_DMA_TX_2;
  3492. break;
  3493. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3494. idx = RX_CDC_DMA_RX_0;
  3495. break;
  3496. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3497. idx = RX_CDC_DMA_RX_1;
  3498. break;
  3499. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3500. idx = RX_CDC_DMA_RX_2;
  3501. break;
  3502. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3503. idx = RX_CDC_DMA_RX_3;
  3504. break;
  3505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3506. idx = RX_CDC_DMA_RX_5;
  3507. break;
  3508. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3509. idx = TX_CDC_DMA_TX_0;
  3510. break;
  3511. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3512. idx = TX_CDC_DMA_TX_3;
  3513. break;
  3514. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3515. idx = TX_CDC_DMA_TX_4;
  3516. break;
  3517. default:
  3518. idx = RX_CDC_DMA_RX_0;
  3519. break;
  3520. }
  3521. return idx;
  3522. }
  3523. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3524. {
  3525. int idx = -EINVAL;
  3526. switch (be_id) {
  3527. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3528. idx = DP_RX_IDX;
  3529. break;
  3530. default:
  3531. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3532. idx = -EINVAL;
  3533. break;
  3534. }
  3535. return idx;
  3536. }
  3537. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3538. struct snd_pcm_hw_params *params)
  3539. {
  3540. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3541. struct snd_interval *rate = hw_param_interval(params,
  3542. SNDRV_PCM_HW_PARAM_RATE);
  3543. struct snd_interval *channels = hw_param_interval(params,
  3544. SNDRV_PCM_HW_PARAM_CHANNELS);
  3545. int rc = 0;
  3546. int idx;
  3547. void *config = NULL;
  3548. struct snd_soc_codec *codec = NULL;
  3549. pr_debug("%s: format = %d, rate = %d\n",
  3550. __func__, params_format(params), params_rate(params));
  3551. switch (dai_link->id) {
  3552. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3553. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3554. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3555. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3556. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3557. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3558. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3559. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3560. slim_rx_cfg[idx].bit_format);
  3561. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3562. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3563. break;
  3564. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3565. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3566. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3567. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3568. slim_tx_cfg[idx].bit_format);
  3569. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3570. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3571. break;
  3572. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3573. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3574. slim_tx_cfg[1].bit_format);
  3575. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3576. channels->min = channels->max = slim_tx_cfg[1].channels;
  3577. break;
  3578. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3579. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3580. SNDRV_PCM_FORMAT_S32_LE);
  3581. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3582. channels->min = channels->max = msm_vi_feed_tx_ch;
  3583. break;
  3584. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3585. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3586. slim_rx_cfg[5].bit_format);
  3587. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3588. channels->min = channels->max = slim_rx_cfg[5].channels;
  3589. break;
  3590. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3591. codec = rtd->codec;
  3592. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3593. channels->min = channels->max = 1;
  3594. config = msm_codec_fn.get_afe_config_fn(codec,
  3595. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3596. if (config) {
  3597. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3598. config, SLIMBUS_5_TX);
  3599. if (rc)
  3600. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3601. __func__, rc);
  3602. }
  3603. break;
  3604. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3605. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3606. slim_rx_cfg[SLIM_RX_7].bit_format);
  3607. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3608. channels->min = channels->max =
  3609. slim_rx_cfg[SLIM_RX_7].channels;
  3610. break;
  3611. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3612. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3613. channels->min = channels->max =
  3614. slim_tx_cfg[SLIM_TX_7].channels;
  3615. break;
  3616. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3617. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3618. channels->min = channels->max =
  3619. slim_tx_cfg[SLIM_TX_8].channels;
  3620. break;
  3621. case MSM_BACKEND_DAI_USB_RX:
  3622. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3623. usb_rx_cfg.bit_format);
  3624. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3625. channels->min = channels->max = usb_rx_cfg.channels;
  3626. break;
  3627. case MSM_BACKEND_DAI_USB_TX:
  3628. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3629. usb_tx_cfg.bit_format);
  3630. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3631. channels->min = channels->max = usb_tx_cfg.channels;
  3632. break;
  3633. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3634. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3635. if (idx < 0) {
  3636. pr_err("%s: Incorrect ext disp idx %d\n",
  3637. __func__, idx);
  3638. rc = idx;
  3639. goto done;
  3640. }
  3641. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3642. ext_disp_rx_cfg[idx].bit_format);
  3643. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3644. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3645. break;
  3646. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3647. channels->min = channels->max = proxy_rx_cfg.channels;
  3648. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3649. break;
  3650. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3651. channels->min = channels->max =
  3652. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3653. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3654. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3655. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3656. break;
  3657. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3658. channels->min = channels->max =
  3659. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3660. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3661. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3662. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3663. break;
  3664. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3665. channels->min = channels->max =
  3666. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3667. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3668. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3669. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3670. break;
  3671. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3672. channels->min = channels->max =
  3673. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3674. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3675. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3676. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3677. break;
  3678. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3679. channels->min = channels->max =
  3680. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3681. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3682. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3683. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3684. break;
  3685. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3686. channels->min = channels->max =
  3687. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3688. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3689. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3690. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3691. break;
  3692. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3693. channels->min = channels->max =
  3694. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3695. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3696. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3697. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3698. break;
  3699. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3700. channels->min = channels->max =
  3701. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3702. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3703. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3704. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3705. break;
  3706. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3707. channels->min = channels->max =
  3708. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3709. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3710. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3711. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3712. break;
  3713. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3714. channels->min = channels->max =
  3715. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3716. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3717. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3718. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3719. break;
  3720. case MSM_BACKEND_DAI_AUXPCM_RX:
  3721. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3722. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3723. rate->min = rate->max =
  3724. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3725. channels->min = channels->max =
  3726. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3727. break;
  3728. case MSM_BACKEND_DAI_AUXPCM_TX:
  3729. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3730. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3731. rate->min = rate->max =
  3732. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3733. channels->min = channels->max =
  3734. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3735. break;
  3736. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3737. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3738. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3739. rate->min = rate->max =
  3740. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3741. channels->min = channels->max =
  3742. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3743. break;
  3744. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3745. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3746. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3747. rate->min = rate->max =
  3748. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3749. channels->min = channels->max =
  3750. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3751. break;
  3752. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3753. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3754. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3755. rate->min = rate->max =
  3756. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3757. channels->min = channels->max =
  3758. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3759. break;
  3760. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3761. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3762. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3763. rate->min = rate->max =
  3764. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3765. channels->min = channels->max =
  3766. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3767. break;
  3768. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3769. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3770. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3771. rate->min = rate->max =
  3772. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3773. channels->min = channels->max =
  3774. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3775. break;
  3776. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3777. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3778. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3779. rate->min = rate->max =
  3780. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3781. channels->min = channels->max =
  3782. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3783. break;
  3784. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3785. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3786. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3787. rate->min = rate->max =
  3788. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3789. channels->min = channels->max =
  3790. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3791. break;
  3792. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3793. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3794. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3795. rate->min = rate->max =
  3796. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3797. channels->min = channels->max =
  3798. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3799. break;
  3800. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3801. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3802. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3803. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3804. channels->min = channels->max =
  3805. mi2s_rx_cfg[PRIM_MI2S].channels;
  3806. break;
  3807. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3808. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3809. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3810. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3811. channels->min = channels->max =
  3812. mi2s_tx_cfg[PRIM_MI2S].channels;
  3813. break;
  3814. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3815. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3816. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3817. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3818. channels->min = channels->max =
  3819. mi2s_rx_cfg[SEC_MI2S].channels;
  3820. break;
  3821. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3822. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3823. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3824. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3825. channels->min = channels->max =
  3826. mi2s_tx_cfg[SEC_MI2S].channels;
  3827. break;
  3828. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3829. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3830. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3831. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3832. channels->min = channels->max =
  3833. mi2s_rx_cfg[TERT_MI2S].channels;
  3834. break;
  3835. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3836. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3837. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3838. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3839. channels->min = channels->max =
  3840. mi2s_tx_cfg[TERT_MI2S].channels;
  3841. break;
  3842. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3843. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3844. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3845. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3846. channels->min = channels->max =
  3847. mi2s_rx_cfg[QUAT_MI2S].channels;
  3848. break;
  3849. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3850. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3851. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3852. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3853. channels->min = channels->max =
  3854. mi2s_tx_cfg[QUAT_MI2S].channels;
  3855. break;
  3856. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3857. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3858. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3859. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3860. channels->min = channels->max =
  3861. mi2s_rx_cfg[QUIN_MI2S].channels;
  3862. break;
  3863. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3864. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3865. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3866. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3867. channels->min = channels->max =
  3868. mi2s_tx_cfg[QUIN_MI2S].channels;
  3869. break;
  3870. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3871. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3872. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3873. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3874. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3875. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3876. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3877. cdc_dma_rx_cfg[idx].bit_format);
  3878. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3879. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3880. break;
  3881. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3882. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3883. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3884. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  3885. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3886. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3887. cdc_dma_tx_cfg[idx].bit_format);
  3888. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3889. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3890. break;
  3891. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3892. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3893. SNDRV_PCM_FORMAT_S32_LE);
  3894. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3895. channels->min = channels->max = msm_vi_feed_tx_ch;
  3896. break;
  3897. default:
  3898. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3899. break;
  3900. }
  3901. done:
  3902. return rc;
  3903. }
  3904. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3905. {
  3906. int value = 0;
  3907. bool ret = 0;
  3908. struct snd_soc_card *card = codec->component.card;
  3909. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3910. struct pinctrl_state *en2_pinctrl_active;
  3911. struct pinctrl_state *en2_pinctrl_sleep;
  3912. if (!pdata->usbc_en2_gpio_p) {
  3913. if (active) {
  3914. /* if active and usbc_en2_gpio undefined, get pin */
  3915. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3916. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3917. dev_err(card->dev,
  3918. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3919. __func__,
  3920. PTR_ERR(pdata->usbc_en2_gpio_p));
  3921. pdata->usbc_en2_gpio_p = NULL;
  3922. return false;
  3923. }
  3924. } else {
  3925. /* if not active and usbc_en2_gpio undefined, return */
  3926. return false;
  3927. }
  3928. }
  3929. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3930. "qcom,usbc-analog-en2-gpio", 0);
  3931. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3932. dev_err(card->dev, "%s, property %s not in node %s",
  3933. __func__, "qcom,usbc-analog-en2-gpio",
  3934. card->dev->of_node->full_name);
  3935. return false;
  3936. }
  3937. en2_pinctrl_active = pinctrl_lookup_state(
  3938. pdata->usbc_en2_gpio_p, "aud_active");
  3939. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3940. dev_err(card->dev,
  3941. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3942. __func__, PTR_ERR(en2_pinctrl_active));
  3943. ret = false;
  3944. goto err_lookup_state;
  3945. }
  3946. en2_pinctrl_sleep = pinctrl_lookup_state(
  3947. pdata->usbc_en2_gpio_p, "aud_sleep");
  3948. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3949. dev_err(card->dev,
  3950. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3951. __func__, PTR_ERR(en2_pinctrl_sleep));
  3952. ret = false;
  3953. goto err_lookup_state;
  3954. }
  3955. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3956. if (active) {
  3957. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3958. if (pdata->usbc_en2_gpio_p) {
  3959. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3960. if (value)
  3961. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3962. en2_pinctrl_sleep);
  3963. else
  3964. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3965. en2_pinctrl_active);
  3966. } else if (pdata->usbc_en2_gpio >= 0) {
  3967. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3968. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3969. }
  3970. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3971. value, !value);
  3972. ret = true;
  3973. } else {
  3974. /* if not active, release usbc_en2_gpio_p pin */
  3975. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3976. en2_pinctrl_sleep);
  3977. }
  3978. err_lookup_state:
  3979. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3980. pdata->usbc_en2_gpio_p = NULL;
  3981. return ret;
  3982. }
  3983. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3984. {
  3985. int value = 0;
  3986. bool ret = false;
  3987. struct snd_soc_card *card;
  3988. struct msm_asoc_mach_data *pdata;
  3989. if (!codec) {
  3990. pr_err("%s codec is NULL\n", __func__);
  3991. return false;
  3992. }
  3993. card = codec->component.card;
  3994. pdata = snd_soc_card_get_drvdata(card);
  3995. if (!pdata)
  3996. return false;
  3997. if (wcd_mbhc_cfg.enable_usbc_analog)
  3998. return msm_usbc_swap_gnd_mic(codec, active);
  3999. /* if usbc is not defined, swap using us_euro_gpio_p */
  4000. if (pdata->us_euro_gpio_p) {
  4001. value = msm_cdc_pinctrl_get_state(
  4002. pdata->us_euro_gpio_p);
  4003. if (value)
  4004. msm_cdc_pinctrl_select_sleep_state(
  4005. pdata->us_euro_gpio_p);
  4006. else
  4007. msm_cdc_pinctrl_select_active_state(
  4008. pdata->us_euro_gpio_p);
  4009. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4010. __func__, value, !value);
  4011. ret = true;
  4012. }
  4013. return ret;
  4014. }
  4015. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4016. {
  4017. int ret = 0;
  4018. void *config_data = NULL;
  4019. if (!msm_codec_fn.get_afe_config_fn) {
  4020. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4021. __func__);
  4022. return -EINVAL;
  4023. }
  4024. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4025. AFE_CDC_REGISTERS_CONFIG);
  4026. if (config_data) {
  4027. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4028. if (ret) {
  4029. dev_err(codec->dev,
  4030. "%s: Failed to set codec registers config %d\n",
  4031. __func__, ret);
  4032. return ret;
  4033. }
  4034. }
  4035. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4036. AFE_CDC_REGISTER_PAGE_CONFIG);
  4037. if (config_data) {
  4038. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4039. 0);
  4040. if (ret)
  4041. dev_err(codec->dev,
  4042. "%s: Failed to set cdc register page config\n",
  4043. __func__);
  4044. }
  4045. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4046. AFE_SLIMBUS_SLAVE_CONFIG);
  4047. if (config_data) {
  4048. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4049. if (ret) {
  4050. dev_err(codec->dev,
  4051. "%s: Failed to set slimbus slave config %d\n",
  4052. __func__, ret);
  4053. return ret;
  4054. }
  4055. }
  4056. return 0;
  4057. }
  4058. static void msm_afe_clear_config(void)
  4059. {
  4060. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4061. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4062. }
  4063. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4064. struct snd_card *card)
  4065. {
  4066. int ret = 0;
  4067. unsigned long timeout;
  4068. int adsp_ready = 0;
  4069. bool snd_card_online = 0;
  4070. timeout = jiffies +
  4071. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4072. do {
  4073. if (!snd_card_online) {
  4074. snd_card_online = snd_card_is_online_state(card);
  4075. pr_debug("%s: Sound card is %s\n", __func__,
  4076. snd_card_online ? "Online" : "Offline");
  4077. }
  4078. if (!adsp_ready) {
  4079. adsp_ready = q6core_is_adsp_ready();
  4080. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4081. adsp_ready ? "ready" : "not ready");
  4082. }
  4083. if (snd_card_online && adsp_ready)
  4084. break;
  4085. /*
  4086. * Sound card/ADSP will be coming up after subsystem restart and
  4087. * it might not be fully up when the control reaches
  4088. * here. So, wait for 50msec before checking ADSP state
  4089. */
  4090. msleep(50);
  4091. } while (time_after(timeout, jiffies));
  4092. if (!snd_card_online || !adsp_ready) {
  4093. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4094. __func__,
  4095. snd_card_online ? "Online" : "Offline",
  4096. adsp_ready ? "ready" : "not ready");
  4097. ret = -ETIMEDOUT;
  4098. goto err;
  4099. }
  4100. ret = msm_afe_set_config(codec);
  4101. if (ret)
  4102. pr_err("%s: Failed to set AFE config. err %d\n",
  4103. __func__, ret);
  4104. return 0;
  4105. err:
  4106. return ret;
  4107. }
  4108. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4109. unsigned long opcode, void *ptr)
  4110. {
  4111. int ret;
  4112. struct snd_soc_card *card = NULL;
  4113. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4114. struct snd_soc_pcm_runtime *rtd;
  4115. struct snd_soc_codec *codec;
  4116. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4117. switch (opcode) {
  4118. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4119. /*
  4120. * Use flag to ignore initial boot notifications
  4121. * On initial boot msm_adsp_power_up_config is
  4122. * called on init. There is no need to clear
  4123. * and set the config again on initial boot.
  4124. */
  4125. if (is_initial_boot)
  4126. break;
  4127. msm_afe_clear_config();
  4128. break;
  4129. case AUDIO_NOTIFIER_SERVICE_UP:
  4130. if (is_initial_boot) {
  4131. is_initial_boot = false;
  4132. break;
  4133. }
  4134. if (!spdev)
  4135. return -EINVAL;
  4136. card = platform_get_drvdata(spdev);
  4137. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4138. if (!rtd) {
  4139. dev_err(card->dev,
  4140. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4141. __func__, be_dl_name);
  4142. ret = -EINVAL;
  4143. goto err;
  4144. }
  4145. codec = rtd->codec;
  4146. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4147. if (ret < 0) {
  4148. dev_err(card->dev,
  4149. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4150. __func__, ret);
  4151. goto err;
  4152. }
  4153. break;
  4154. default:
  4155. break;
  4156. }
  4157. err:
  4158. return NOTIFY_OK;
  4159. }
  4160. static struct notifier_block service_nb = {
  4161. .notifier_call = sm6150_notifier_service_cb,
  4162. .priority = -INT_MAX,
  4163. };
  4164. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4165. {
  4166. int ret = 0;
  4167. void *config_data;
  4168. struct snd_soc_codec *codec = rtd->codec;
  4169. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4170. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4171. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4172. struct snd_soc_component *aux_comp;
  4173. struct snd_card *card;
  4174. struct snd_info_entry *entry;
  4175. struct msm_asoc_mach_data *pdata =
  4176. snd_soc_card_get_drvdata(rtd->card);
  4177. /*
  4178. * Codec SLIMBUS configuration
  4179. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4180. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4181. * TX14, TX15, TX16
  4182. */
  4183. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4184. 150, 151};
  4185. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4186. 134, 135, 136, 137, 138, 139,
  4187. 140, 141, 142, 143};
  4188. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4189. rtd->pmdown_time = 0;
  4190. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4191. ARRAY_SIZE(msm_tavil_snd_controls));
  4192. if (ret < 0) {
  4193. pr_err("%s: add_codec_controls failed, err %d\n",
  4194. __func__, ret);
  4195. return ret;
  4196. }
  4197. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4198. ARRAY_SIZE(msm_common_snd_controls));
  4199. if (ret < 0) {
  4200. pr_err("%s: add_codec_controls failed, err %d\n",
  4201. __func__, ret);
  4202. return ret;
  4203. }
  4204. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4205. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4206. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4207. ARRAY_SIZE(wcd_audio_paths_tavil));
  4208. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4209. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4210. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4211. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4212. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4213. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4214. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4219. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4220. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4221. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4222. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4223. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4224. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4225. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4226. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4227. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4228. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4229. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4230. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4231. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4232. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4233. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4234. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4235. snd_soc_dapm_sync(dapm);
  4236. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4237. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4238. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4239. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4240. if (ret) {
  4241. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4242. goto err;
  4243. }
  4244. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4245. AFE_AANC_VERSION);
  4246. if (config_data) {
  4247. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4248. if (ret) {
  4249. pr_err("%s: Failed to set aanc version %d\n",
  4250. __func__, ret);
  4251. goto err;
  4252. }
  4253. }
  4254. /*
  4255. * Send speaker configuration only for WSA8810.
  4256. * Default configuration is for WSA8815.
  4257. */
  4258. pr_debug("%s: Number of aux devices: %d\n",
  4259. __func__, rtd->card->num_aux_devs);
  4260. if (rtd->card->num_aux_devs &&
  4261. !list_empty(&rtd->card->aux_comp_list)) {
  4262. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4263. struct snd_soc_component, card_aux_list);
  4264. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4265. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4266. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4267. tavil_set_spkr_gain_offset(rtd->codec,
  4268. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4269. }
  4270. }
  4271. card = rtd->card->snd_card;
  4272. entry = snd_info_create_subdir(card->module, "codecs",
  4273. card->proc_root);
  4274. if (!entry) {
  4275. pr_debug("%s: Cannot create codecs module entry\n",
  4276. __func__);
  4277. ret = 0;
  4278. goto err;
  4279. }
  4280. pdata->codec_root = entry;
  4281. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4282. codec_reg_done = true;
  4283. return 0;
  4284. err:
  4285. return ret;
  4286. }
  4287. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4288. {
  4289. int ret = 0;
  4290. struct snd_soc_codec *codec = rtd->codec;
  4291. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4292. struct snd_card *card;
  4293. struct snd_info_entry *entry;
  4294. struct snd_soc_component *aux_comp;
  4295. struct msm_asoc_mach_data *pdata =
  4296. snd_soc_card_get_drvdata(rtd->card);
  4297. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4298. ARRAY_SIZE(msm_int_snd_controls));
  4299. if (ret < 0) {
  4300. pr_err("%s: add_codec_controls failed: %d\n",
  4301. __func__, ret);
  4302. return ret;
  4303. }
  4304. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4305. ARRAY_SIZE(msm_common_snd_controls));
  4306. if (ret < 0) {
  4307. pr_err("%s: add common snd controls failed: %d\n",
  4308. __func__, ret);
  4309. return ret;
  4310. }
  4311. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4312. ARRAY_SIZE(msm_int_dapm_widgets));
  4313. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4314. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4315. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4316. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4317. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4320. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4321. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4322. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4323. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4324. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4325. snd_soc_dapm_sync(dapm);
  4326. /*
  4327. * Send speaker configuration only for WSA8810.
  4328. * Default configuration is for WSA8815.
  4329. */
  4330. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4331. __func__, rtd->card->num_aux_devs);
  4332. if (rtd->card->num_aux_devs &&
  4333. !list_empty(&rtd->card->component_dev_list)) {
  4334. aux_comp = list_first_entry(
  4335. &rtd->card->component_dev_list,
  4336. struct snd_soc_component,
  4337. card_aux_list);
  4338. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4339. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4340. wsa_macro_set_spkr_mode(rtd->codec,
  4341. WSA_MACRO_SPKR_MODE_1);
  4342. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4343. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4344. }
  4345. }
  4346. card = rtd->card->snd_card;
  4347. entry = snd_info_create_subdir(card->module, "codecs",
  4348. card->proc_root);
  4349. if (!entry) {
  4350. pr_debug("%s: Cannot create codecs module entry\n",
  4351. __func__);
  4352. ret = 0;
  4353. goto err;
  4354. }
  4355. pdata->codec_root = entry;
  4356. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4357. codec_reg_done = true;
  4358. return 0;
  4359. err:
  4360. return ret;
  4361. }
  4362. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4363. {
  4364. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4365. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4366. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4367. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4368. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4369. }
  4370. static void *def_wcd_mbhc_cal(void)
  4371. {
  4372. void *wcd_mbhc_cal;
  4373. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4374. u16 *btn_high;
  4375. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4376. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4377. if (!wcd_mbhc_cal)
  4378. return NULL;
  4379. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4380. S(v_hs_max, 1600);
  4381. #undef S
  4382. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4383. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4384. #undef S
  4385. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4386. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4387. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4388. btn_high[0] = 75;
  4389. btn_high[1] = 150;
  4390. btn_high[2] = 237;
  4391. btn_high[3] = 500;
  4392. btn_high[4] = 500;
  4393. btn_high[5] = 500;
  4394. btn_high[6] = 500;
  4395. btn_high[7] = 500;
  4396. return wcd_mbhc_cal;
  4397. }
  4398. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4399. struct snd_pcm_hw_params *params)
  4400. {
  4401. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4402. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4403. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4404. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4405. int ret = 0;
  4406. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4407. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4408. u32 user_set_tx_ch = 0;
  4409. u32 rx_ch_count;
  4410. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4411. ret = snd_soc_dai_get_channel_map(codec_dai,
  4412. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4413. if (ret < 0) {
  4414. pr_err("%s: failed to get codec chan map, err:%d\n",
  4415. __func__, ret);
  4416. goto err;
  4417. }
  4418. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4419. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4420. slim_rx_cfg[5].channels);
  4421. rx_ch_count = slim_rx_cfg[5].channels;
  4422. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4423. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4424. slim_rx_cfg[2].channels);
  4425. rx_ch_count = slim_rx_cfg[2].channels;
  4426. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4427. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4428. slim_rx_cfg[6].channels);
  4429. rx_ch_count = slim_rx_cfg[6].channels;
  4430. } else {
  4431. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4432. slim_rx_cfg[0].channels);
  4433. rx_ch_count = slim_rx_cfg[0].channels;
  4434. }
  4435. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4436. rx_ch_count, rx_ch);
  4437. if (ret < 0) {
  4438. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4439. __func__, ret);
  4440. goto err;
  4441. }
  4442. } else {
  4443. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4444. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4445. ret = snd_soc_dai_get_channel_map(codec_dai,
  4446. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4447. if (ret < 0) {
  4448. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4449. __func__, ret);
  4450. goto err;
  4451. }
  4452. /* For <codec>_tx1 case */
  4453. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4454. user_set_tx_ch = slim_tx_cfg[0].channels;
  4455. /* For <codec>_tx3 case */
  4456. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4457. user_set_tx_ch = slim_tx_cfg[1].channels;
  4458. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4459. user_set_tx_ch = msm_vi_feed_tx_ch;
  4460. else
  4461. user_set_tx_ch = tx_ch_cnt;
  4462. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4463. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4464. tx_ch_cnt, dai_link->id);
  4465. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4466. user_set_tx_ch, tx_ch, 0, 0);
  4467. if (ret < 0)
  4468. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4469. __func__, ret);
  4470. }
  4471. err:
  4472. return ret;
  4473. }
  4474. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4475. struct snd_pcm_hw_params *params)
  4476. {
  4477. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4478. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4479. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4480. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4481. int ret = 0;
  4482. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4483. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4484. u32 user_set_tx_ch = 0;
  4485. u32 user_set_rx_ch = 0;
  4486. u32 ch_id;
  4487. ret = snd_soc_dai_get_channel_map(codec_dai,
  4488. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4489. &rx_ch_cdc_dma);
  4490. if (ret < 0) {
  4491. pr_err("%s: failed to get codec chan map, err:%d\n",
  4492. __func__, ret);
  4493. goto err;
  4494. }
  4495. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4496. switch (dai_link->id) {
  4497. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4498. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4499. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4500. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4501. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4502. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4503. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4505. {
  4506. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4507. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4508. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4509. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4510. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4511. user_set_rx_ch, &rx_ch_cdc_dma);
  4512. if (ret < 0) {
  4513. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4514. __func__, ret);
  4515. goto err;
  4516. }
  4517. }
  4518. break;
  4519. }
  4520. } else {
  4521. switch (dai_link->id) {
  4522. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4523. {
  4524. user_set_tx_ch = msm_vi_feed_tx_ch;
  4525. }
  4526. break;
  4527. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4528. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4529. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4530. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  4531. {
  4532. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4533. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4534. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4535. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4536. }
  4537. break;
  4538. }
  4539. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4540. &tx_ch_cdc_dma, 0, 0);
  4541. if (ret < 0) {
  4542. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4543. __func__, ret);
  4544. goto err;
  4545. }
  4546. }
  4547. err:
  4548. return ret;
  4549. }
  4550. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4551. struct snd_pcm_hw_params *params)
  4552. {
  4553. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4554. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4555. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4556. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4557. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4558. unsigned int num_tx_ch = 0;
  4559. unsigned int num_rx_ch = 0;
  4560. int ret = 0;
  4561. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4562. num_rx_ch = params_channels(params);
  4563. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4564. codec_dai->name, codec_dai->id, num_rx_ch);
  4565. ret = snd_soc_dai_get_channel_map(codec_dai,
  4566. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4567. if (ret < 0) {
  4568. pr_err("%s: failed to get codec chan map, err:%d\n",
  4569. __func__, ret);
  4570. goto err;
  4571. }
  4572. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4573. num_rx_ch, rx_ch);
  4574. if (ret < 0) {
  4575. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4576. __func__, ret);
  4577. goto err;
  4578. }
  4579. } else {
  4580. num_tx_ch = params_channels(params);
  4581. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4582. codec_dai->name, codec_dai->id, num_tx_ch);
  4583. ret = snd_soc_dai_get_channel_map(codec_dai,
  4584. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4585. if (ret < 0) {
  4586. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4587. __func__, ret);
  4588. goto err;
  4589. }
  4590. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4591. num_tx_ch, tx_ch, 0, 0);
  4592. if (ret < 0) {
  4593. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4594. __func__, ret);
  4595. goto err;
  4596. }
  4597. }
  4598. err:
  4599. return ret;
  4600. }
  4601. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4602. struct snd_pcm_hw_params *params)
  4603. {
  4604. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4605. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4606. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4607. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4608. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4609. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4610. int ret;
  4611. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4612. codec_dai->name, codec_dai->id);
  4613. ret = snd_soc_dai_get_channel_map(codec_dai,
  4614. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4615. if (ret) {
  4616. dev_err(rtd->dev,
  4617. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4618. __func__, ret);
  4619. goto err;
  4620. }
  4621. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4622. __func__, tx_ch_cnt, dai_link->id);
  4623. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4624. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4625. if (ret)
  4626. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4627. __func__, ret);
  4628. err:
  4629. return ret;
  4630. }
  4631. static int msm_get_port_id(int be_id)
  4632. {
  4633. int afe_port_id;
  4634. switch (be_id) {
  4635. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4636. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4637. break;
  4638. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4639. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4640. break;
  4641. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4642. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4643. break;
  4644. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4645. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4646. break;
  4647. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4648. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4649. break;
  4650. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4651. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4652. break;
  4653. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4654. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4655. break;
  4656. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4657. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4658. break;
  4659. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4660. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4661. break;
  4662. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4663. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4664. break;
  4665. default:
  4666. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4667. afe_port_id = -EINVAL;
  4668. }
  4669. return afe_port_id;
  4670. }
  4671. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4672. {
  4673. u32 bit_per_sample;
  4674. switch (bit_format) {
  4675. case SNDRV_PCM_FORMAT_S32_LE:
  4676. case SNDRV_PCM_FORMAT_S24_3LE:
  4677. case SNDRV_PCM_FORMAT_S24_LE:
  4678. bit_per_sample = 32;
  4679. break;
  4680. case SNDRV_PCM_FORMAT_S16_LE:
  4681. default:
  4682. bit_per_sample = 16;
  4683. break;
  4684. }
  4685. return bit_per_sample;
  4686. }
  4687. static void update_mi2s_clk_val(int dai_id, int stream)
  4688. {
  4689. u32 bit_per_sample;
  4690. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4691. bit_per_sample =
  4692. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4693. mi2s_clk[dai_id].clk_freq_in_hz =
  4694. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4695. } else {
  4696. bit_per_sample =
  4697. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4698. mi2s_clk[dai_id].clk_freq_in_hz =
  4699. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4700. }
  4701. }
  4702. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4703. {
  4704. int ret = 0;
  4705. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4706. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4707. int port_id = 0;
  4708. int index = cpu_dai->id;
  4709. port_id = msm_get_port_id(rtd->dai_link->id);
  4710. if (port_id < 0) {
  4711. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4712. ret = port_id;
  4713. goto err;
  4714. }
  4715. if (enable) {
  4716. update_mi2s_clk_val(index, substream->stream);
  4717. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4718. mi2s_clk[index].clk_freq_in_hz);
  4719. }
  4720. mi2s_clk[index].enable = enable;
  4721. ret = afe_set_lpass_clock_v2(port_id,
  4722. &mi2s_clk[index]);
  4723. if (ret < 0) {
  4724. dev_err(rtd->card->dev,
  4725. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4726. __func__, port_id, ret);
  4727. goto err;
  4728. }
  4729. err:
  4730. return ret;
  4731. }
  4732. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4733. enum pinctrl_pin_state new_state)
  4734. {
  4735. int ret = 0;
  4736. int curr_state = 0;
  4737. if (pinctrl_info == NULL) {
  4738. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4739. ret = -EINVAL;
  4740. goto err;
  4741. }
  4742. if (pinctrl_info->pinctrl == NULL) {
  4743. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4744. ret = -EINVAL;
  4745. goto err;
  4746. }
  4747. curr_state = pinctrl_info->curr_state;
  4748. pinctrl_info->curr_state = new_state;
  4749. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4750. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4751. if (curr_state == pinctrl_info->curr_state) {
  4752. pr_debug("%s: Already in same state\n", __func__);
  4753. goto err;
  4754. }
  4755. if (curr_state != STATE_DISABLE &&
  4756. pinctrl_info->curr_state != STATE_DISABLE) {
  4757. pr_debug("%s: state already active cannot switch\n", __func__);
  4758. ret = -EIO;
  4759. goto err;
  4760. }
  4761. switch (pinctrl_info->curr_state) {
  4762. case STATE_MI2S_ACTIVE:
  4763. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4764. pinctrl_info->mi2s_active);
  4765. if (ret) {
  4766. pr_err("%s: MI2S state select failed with %d\n",
  4767. __func__, ret);
  4768. ret = -EIO;
  4769. goto err;
  4770. }
  4771. break;
  4772. case STATE_TDM_ACTIVE:
  4773. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4774. pinctrl_info->tdm_active);
  4775. if (ret) {
  4776. pr_err("%s: TDM state select failed with %d\n",
  4777. __func__, ret);
  4778. ret = -EIO;
  4779. goto err;
  4780. }
  4781. break;
  4782. case STATE_DISABLE:
  4783. if (curr_state == STATE_MI2S_ACTIVE) {
  4784. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4785. pinctrl_info->mi2s_disable);
  4786. } else {
  4787. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4788. pinctrl_info->tdm_disable);
  4789. }
  4790. if (ret) {
  4791. pr_err("%s: state disable failed with %d\n",
  4792. __func__, ret);
  4793. ret = -EIO;
  4794. goto err;
  4795. }
  4796. break;
  4797. default:
  4798. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4799. return -EINVAL;
  4800. }
  4801. err:
  4802. return ret;
  4803. }
  4804. static int msm_get_pinctrl(struct platform_device *pdev)
  4805. {
  4806. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4807. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4808. struct msm_pinctrl_info *pinctrl_info = NULL;
  4809. struct pinctrl *pinctrl;
  4810. int ret = 0;
  4811. pinctrl_info = &pdata->pinctrl_info;
  4812. if (pinctrl_info == NULL) {
  4813. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4814. return -EINVAL;
  4815. }
  4816. pinctrl = devm_pinctrl_get(&pdev->dev);
  4817. if (IS_ERR_OR_NULL(pinctrl)) {
  4818. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4819. return -EINVAL;
  4820. }
  4821. pinctrl_info->pinctrl = pinctrl;
  4822. /* get all the states handles from Device Tree */
  4823. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4824. "quat-mi2s-sleep");
  4825. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4826. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4827. goto err;
  4828. }
  4829. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4830. "quat-mi2s-active");
  4831. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4832. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4833. goto err;
  4834. }
  4835. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4836. "quat-tdm-sleep");
  4837. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4838. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4839. goto err;
  4840. }
  4841. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4842. "quat-tdm-active");
  4843. if (IS_ERR(pinctrl_info->tdm_active)) {
  4844. pr_err("%s: could not get tdm_active pinstate\n",
  4845. __func__);
  4846. goto err;
  4847. }
  4848. /* Reset the TLMM pins to a default state */
  4849. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4850. pinctrl_info->mi2s_disable);
  4851. if (ret != 0) {
  4852. pr_err("%s: Disable TLMM pins failed with %d\n",
  4853. __func__, ret);
  4854. ret = -EIO;
  4855. goto err;
  4856. }
  4857. pinctrl_info->curr_state = STATE_DISABLE;
  4858. return 0;
  4859. err:
  4860. devm_pinctrl_put(pinctrl);
  4861. pinctrl_info->pinctrl = NULL;
  4862. return -EINVAL;
  4863. }
  4864. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4865. struct snd_pcm_hw_params *params)
  4866. {
  4867. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4868. struct snd_interval *rate = hw_param_interval(params,
  4869. SNDRV_PCM_HW_PARAM_RATE);
  4870. struct snd_interval *channels = hw_param_interval(params,
  4871. SNDRV_PCM_HW_PARAM_CHANNELS);
  4872. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4873. channels->min = channels->max =
  4874. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4875. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4876. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4877. rate->min = rate->max =
  4878. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4879. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4880. channels->min = channels->max =
  4881. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4882. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4883. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4884. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4885. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4886. channels->min = channels->max =
  4887. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4888. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4889. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4890. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4891. } else {
  4892. pr_err("%s: dai id 0x%x not supported\n",
  4893. __func__, cpu_dai->id);
  4894. return -EINVAL;
  4895. }
  4896. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4897. __func__, cpu_dai->id, channels->max, rate->max,
  4898. params_format(params));
  4899. return 0;
  4900. }
  4901. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4902. struct snd_pcm_hw_params *params)
  4903. {
  4904. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4905. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4906. int ret = 0;
  4907. int slot_width = 32;
  4908. int channels, slots;
  4909. unsigned int slot_mask, rate, clk_freq;
  4910. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4911. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4912. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4913. switch (cpu_dai->id) {
  4914. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4915. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4916. break;
  4917. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4918. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4919. break;
  4920. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4921. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4922. break;
  4923. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4924. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4925. break;
  4926. case AFE_PORT_ID_QUINARY_TDM_RX:
  4927. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4928. break;
  4929. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4930. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4931. break;
  4932. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4933. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4934. break;
  4935. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4936. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4937. break;
  4938. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4939. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4940. break;
  4941. case AFE_PORT_ID_QUINARY_TDM_TX:
  4942. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4943. break;
  4944. default:
  4945. pr_err("%s: dai id 0x%x not supported\n",
  4946. __func__, cpu_dai->id);
  4947. return -EINVAL;
  4948. }
  4949. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4950. /*2 slot config - bits 0 and 1 set for the first two slots */
  4951. slot_mask = 0x0000FFFF >> (16-slots);
  4952. channels = slots;
  4953. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4954. __func__, slot_width, slots);
  4955. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4956. slots, slot_width);
  4957. if (ret < 0) {
  4958. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4959. __func__, ret);
  4960. goto end;
  4961. }
  4962. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4963. 0, NULL, channels, slot_offset);
  4964. if (ret < 0) {
  4965. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4966. __func__, ret);
  4967. goto end;
  4968. }
  4969. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4970. /*2 slot config - bits 0 and 1 set for the first two slots */
  4971. slot_mask = 0x0000FFFF >> (16-slots);
  4972. channels = slots;
  4973. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4974. __func__, slot_width, slots);
  4975. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4976. slots, slot_width);
  4977. if (ret < 0) {
  4978. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4979. __func__, ret);
  4980. goto end;
  4981. }
  4982. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4983. channels, slot_offset, 0, NULL);
  4984. if (ret < 0) {
  4985. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4986. __func__, ret);
  4987. goto end;
  4988. }
  4989. } else {
  4990. ret = -EINVAL;
  4991. pr_err("%s: invalid use case, err:%d\n",
  4992. __func__, ret);
  4993. goto end;
  4994. }
  4995. rate = params_rate(params);
  4996. clk_freq = rate * slot_width * slots;
  4997. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4998. if (ret < 0)
  4999. pr_err("%s: failed to set tdm clk, err:%d\n",
  5000. __func__, ret);
  5001. end:
  5002. return ret;
  5003. }
  5004. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5005. {
  5006. int ret = 0;
  5007. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5008. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5009. struct snd_soc_card *card = rtd->card;
  5010. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5011. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5012. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5013. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5014. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5015. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5016. if (ret)
  5017. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5018. __func__, ret);
  5019. }
  5020. return ret;
  5021. }
  5022. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5023. {
  5024. int ret = 0;
  5025. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5026. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5027. struct snd_soc_card *card = rtd->card;
  5028. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5029. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5030. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5031. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5032. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5033. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5034. if (ret)
  5035. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5036. __func__, ret);
  5037. }
  5038. }
  5039. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5040. .hw_params = sm6150_tdm_snd_hw_params,
  5041. .startup = sm6150_tdm_snd_startup,
  5042. .shutdown = sm6150_tdm_snd_shutdown
  5043. };
  5044. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5045. {
  5046. cpumask_t mask;
  5047. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5048. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5049. cpumask_clear(&mask);
  5050. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5051. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5052. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5053. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5054. pm_qos_add_request(&substream->latency_pm_qos_req,
  5055. PM_QOS_CPU_DMA_LATENCY,
  5056. MSM_LL_QOS_VALUE);
  5057. return 0;
  5058. }
  5059. static struct snd_soc_ops msm_fe_qos_ops = {
  5060. .prepare = msm_fe_qos_prepare,
  5061. };
  5062. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5063. {
  5064. int ret = 0;
  5065. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5066. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5067. int index = cpu_dai->id;
  5068. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5069. struct snd_soc_card *card = rtd->card;
  5070. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5071. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5072. int ret_pinctrl = 0;
  5073. dev_dbg(rtd->card->dev,
  5074. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5075. __func__, substream->name, substream->stream,
  5076. cpu_dai->name, cpu_dai->id);
  5077. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5078. ret = -EINVAL;
  5079. dev_err(rtd->card->dev,
  5080. "%s: CPU DAI id (%d) out of range\n",
  5081. __func__, cpu_dai->id);
  5082. goto err;
  5083. }
  5084. /*
  5085. * Mutex protection in case the same MI2S
  5086. * interface using for both TX and RX so
  5087. * that the same clock won't be enable twice.
  5088. */
  5089. mutex_lock(&mi2s_intf_conf[index].lock);
  5090. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5091. /* Check if msm needs to provide the clock to the interface */
  5092. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5093. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5094. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5095. }
  5096. ret = msm_mi2s_set_sclk(substream, true);
  5097. if (ret < 0) {
  5098. dev_err(rtd->card->dev,
  5099. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5100. __func__, ret);
  5101. goto clean_up;
  5102. }
  5103. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5104. if (ret < 0) {
  5105. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5106. __func__, index, ret);
  5107. goto clk_off;
  5108. }
  5109. if (index == QUAT_MI2S) {
  5110. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5111. STATE_MI2S_ACTIVE);
  5112. if (ret_pinctrl)
  5113. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5114. __func__, ret_pinctrl);
  5115. }
  5116. }
  5117. clk_off:
  5118. if (ret < 0)
  5119. msm_mi2s_set_sclk(substream, false);
  5120. clean_up:
  5121. if (ret < 0)
  5122. mi2s_intf_conf[index].ref_cnt--;
  5123. mutex_unlock(&mi2s_intf_conf[index].lock);
  5124. err:
  5125. return ret;
  5126. }
  5127. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5128. {
  5129. int ret;
  5130. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5131. int index = rtd->cpu_dai->id;
  5132. struct snd_soc_card *card = rtd->card;
  5133. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5134. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5135. int ret_pinctrl = 0;
  5136. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5137. substream->name, substream->stream);
  5138. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5139. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5140. return;
  5141. }
  5142. mutex_lock(&mi2s_intf_conf[index].lock);
  5143. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5144. ret = msm_mi2s_set_sclk(substream, false);
  5145. if (ret < 0)
  5146. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5147. __func__, index, ret);
  5148. if (index == QUAT_MI2S) {
  5149. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5150. STATE_DISABLE);
  5151. if (ret_pinctrl)
  5152. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5153. __func__, ret_pinctrl);
  5154. }
  5155. }
  5156. mutex_unlock(&mi2s_intf_conf[index].lock);
  5157. }
  5158. static struct snd_soc_ops msm_mi2s_be_ops = {
  5159. .startup = msm_mi2s_snd_startup,
  5160. .shutdown = msm_mi2s_snd_shutdown,
  5161. };
  5162. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5163. .hw_params = msm_snd_cdc_dma_hw_params,
  5164. };
  5165. static struct snd_soc_ops msm_be_ops = {
  5166. .hw_params = msm_snd_hw_params,
  5167. };
  5168. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5169. .hw_params = msm_slimbus_2_hw_params,
  5170. };
  5171. static struct snd_soc_ops msm_wcn_ops = {
  5172. .hw_params = msm_wcn_hw_params,
  5173. };
  5174. /* Digital audio interface glue - connects codec <---> CPU */
  5175. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5176. /* FrontEnd DAI Links */
  5177. {
  5178. .name = MSM_DAILINK_NAME(Media1),
  5179. .stream_name = "MultiMedia1",
  5180. .cpu_dai_name = "MultiMedia1",
  5181. .platform_name = "msm-pcm-dsp.0",
  5182. .dynamic = 1,
  5183. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5184. .dpcm_playback = 1,
  5185. .dpcm_capture = 1,
  5186. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5187. SND_SOC_DPCM_TRIGGER_POST},
  5188. .codec_dai_name = "snd-soc-dummy-dai",
  5189. .codec_name = "snd-soc-dummy",
  5190. .ignore_suspend = 1,
  5191. /* this dainlink has playback support */
  5192. .ignore_pmdown_time = 1,
  5193. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5194. },
  5195. {
  5196. .name = MSM_DAILINK_NAME(Media2),
  5197. .stream_name = "MultiMedia2",
  5198. .cpu_dai_name = "MultiMedia2",
  5199. .platform_name = "msm-pcm-dsp.0",
  5200. .dynamic = 1,
  5201. .dpcm_playback = 1,
  5202. .dpcm_capture = 1,
  5203. .codec_dai_name = "snd-soc-dummy-dai",
  5204. .codec_name = "snd-soc-dummy",
  5205. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5206. SND_SOC_DPCM_TRIGGER_POST},
  5207. .ignore_suspend = 1,
  5208. /* this dainlink has playback support */
  5209. .ignore_pmdown_time = 1,
  5210. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5211. },
  5212. {
  5213. .name = "VoiceMMode1",
  5214. .stream_name = "VoiceMMode1",
  5215. .cpu_dai_name = "VoiceMMode1",
  5216. .platform_name = "msm-pcm-voice",
  5217. .dynamic = 1,
  5218. .dpcm_playback = 1,
  5219. .dpcm_capture = 1,
  5220. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5221. SND_SOC_DPCM_TRIGGER_POST},
  5222. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5223. .ignore_suspend = 1,
  5224. .ignore_pmdown_time = 1,
  5225. .codec_dai_name = "snd-soc-dummy-dai",
  5226. .codec_name = "snd-soc-dummy",
  5227. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5228. },
  5229. {
  5230. .name = "MSM VoIP",
  5231. .stream_name = "VoIP",
  5232. .cpu_dai_name = "VoIP",
  5233. .platform_name = "msm-voip-dsp",
  5234. .dynamic = 1,
  5235. .dpcm_playback = 1,
  5236. .dpcm_capture = 1,
  5237. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5238. SND_SOC_DPCM_TRIGGER_POST},
  5239. .codec_dai_name = "snd-soc-dummy-dai",
  5240. .codec_name = "snd-soc-dummy",
  5241. .ignore_suspend = 1,
  5242. /* this dainlink has playback support */
  5243. .ignore_pmdown_time = 1,
  5244. .id = MSM_FRONTEND_DAI_VOIP,
  5245. },
  5246. {
  5247. .name = MSM_DAILINK_NAME(ULL),
  5248. .stream_name = "MultiMedia3",
  5249. .cpu_dai_name = "MultiMedia3",
  5250. .platform_name = "msm-pcm-dsp.2",
  5251. .dynamic = 1,
  5252. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5253. .dpcm_playback = 1,
  5254. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5255. SND_SOC_DPCM_TRIGGER_POST},
  5256. .codec_dai_name = "snd-soc-dummy-dai",
  5257. .codec_name = "snd-soc-dummy",
  5258. .ignore_suspend = 1,
  5259. /* this dainlink has playback support */
  5260. .ignore_pmdown_time = 1,
  5261. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5262. },
  5263. /* Hostless PCM purpose */
  5264. {
  5265. .name = "SLIMBUS_0 Hostless",
  5266. .stream_name = "SLIMBUS_0 Hostless",
  5267. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5268. .platform_name = "msm-pcm-hostless",
  5269. .dynamic = 1,
  5270. .dpcm_playback = 1,
  5271. .dpcm_capture = 1,
  5272. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5273. SND_SOC_DPCM_TRIGGER_POST},
  5274. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5275. .ignore_suspend = 1,
  5276. /* this dailink has playback support */
  5277. .ignore_pmdown_time = 1,
  5278. .codec_dai_name = "snd-soc-dummy-dai",
  5279. .codec_name = "snd-soc-dummy",
  5280. },
  5281. {
  5282. .name = "MSM AFE-PCM RX",
  5283. .stream_name = "AFE-PROXY RX",
  5284. .cpu_dai_name = "msm-dai-q6-dev.241",
  5285. .codec_name = "msm-stub-codec.1",
  5286. .codec_dai_name = "msm-stub-rx",
  5287. .platform_name = "msm-pcm-afe",
  5288. .dpcm_playback = 1,
  5289. .ignore_suspend = 1,
  5290. /* this dainlink has playback support */
  5291. .ignore_pmdown_time = 1,
  5292. },
  5293. {
  5294. .name = "MSM AFE-PCM TX",
  5295. .stream_name = "AFE-PROXY TX",
  5296. .cpu_dai_name = "msm-dai-q6-dev.240",
  5297. .codec_name = "msm-stub-codec.1",
  5298. .codec_dai_name = "msm-stub-tx",
  5299. .platform_name = "msm-pcm-afe",
  5300. .dpcm_capture = 1,
  5301. .ignore_suspend = 1,
  5302. },
  5303. {
  5304. .name = MSM_DAILINK_NAME(Compress1),
  5305. .stream_name = "Compress1",
  5306. .cpu_dai_name = "MultiMedia4",
  5307. .platform_name = "msm-compress-dsp",
  5308. .dynamic = 1,
  5309. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5310. .dpcm_playback = 1,
  5311. .dpcm_capture = 1,
  5312. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5313. SND_SOC_DPCM_TRIGGER_POST},
  5314. .codec_dai_name = "snd-soc-dummy-dai",
  5315. .codec_name = "snd-soc-dummy",
  5316. .ignore_suspend = 1,
  5317. .ignore_pmdown_time = 1,
  5318. /* this dainlink has playback support */
  5319. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5320. },
  5321. {
  5322. .name = "AUXPCM Hostless",
  5323. .stream_name = "AUXPCM Hostless",
  5324. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5325. .platform_name = "msm-pcm-hostless",
  5326. .dynamic = 1,
  5327. .dpcm_playback = 1,
  5328. .dpcm_capture = 1,
  5329. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5330. SND_SOC_DPCM_TRIGGER_POST},
  5331. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5332. .ignore_suspend = 1,
  5333. /* this dainlink has playback support */
  5334. .ignore_pmdown_time = 1,
  5335. .codec_dai_name = "snd-soc-dummy-dai",
  5336. .codec_name = "snd-soc-dummy",
  5337. },
  5338. {
  5339. .name = "SLIMBUS_1 Hostless",
  5340. .stream_name = "SLIMBUS_1 Hostless",
  5341. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5342. .platform_name = "msm-pcm-hostless",
  5343. .dynamic = 1,
  5344. .dpcm_playback = 1,
  5345. .dpcm_capture = 1,
  5346. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5347. SND_SOC_DPCM_TRIGGER_POST},
  5348. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5349. .ignore_suspend = 1,
  5350. /* this dailink has playback support */
  5351. .ignore_pmdown_time = 1,
  5352. .codec_dai_name = "snd-soc-dummy-dai",
  5353. .codec_name = "snd-soc-dummy",
  5354. },
  5355. {
  5356. .name = "SLIMBUS_3 Hostless",
  5357. .stream_name = "SLIMBUS_3 Hostless",
  5358. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5359. .platform_name = "msm-pcm-hostless",
  5360. .dynamic = 1,
  5361. .dpcm_playback = 1,
  5362. .dpcm_capture = 1,
  5363. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5364. SND_SOC_DPCM_TRIGGER_POST},
  5365. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5366. .ignore_suspend = 1,
  5367. /* this dailink has playback support */
  5368. .ignore_pmdown_time = 1,
  5369. .codec_dai_name = "snd-soc-dummy-dai",
  5370. .codec_name = "snd-soc-dummy",
  5371. },
  5372. {
  5373. .name = "SLIMBUS_4 Hostless",
  5374. .stream_name = "SLIMBUS_4 Hostless",
  5375. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  5376. .platform_name = "msm-pcm-hostless",
  5377. .dynamic = 1,
  5378. .dpcm_playback = 1,
  5379. .dpcm_capture = 1,
  5380. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5381. SND_SOC_DPCM_TRIGGER_POST},
  5382. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5383. .ignore_suspend = 1,
  5384. /* this dailink has playback support */
  5385. .ignore_pmdown_time = 1,
  5386. .codec_dai_name = "snd-soc-dummy-dai",
  5387. .codec_name = "snd-soc-dummy",
  5388. },
  5389. {
  5390. .name = MSM_DAILINK_NAME(LowLatency),
  5391. .stream_name = "MultiMedia5",
  5392. .cpu_dai_name = "MultiMedia5",
  5393. .platform_name = "msm-pcm-dsp.1",
  5394. .dynamic = 1,
  5395. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5396. .dpcm_playback = 1,
  5397. .dpcm_capture = 1,
  5398. .codec_dai_name = "snd-soc-dummy-dai",
  5399. .codec_name = "snd-soc-dummy",
  5400. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5401. SND_SOC_DPCM_TRIGGER_POST},
  5402. .ignore_suspend = 1,
  5403. /* this dainlink has playback support */
  5404. .ignore_pmdown_time = 1,
  5405. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5406. .ops = &msm_fe_qos_ops,
  5407. },
  5408. {
  5409. .name = "Listen 1 Audio Service",
  5410. .stream_name = "Listen 1 Audio Service",
  5411. .cpu_dai_name = "LSM1",
  5412. .platform_name = "msm-lsm-client",
  5413. .dynamic = 1,
  5414. .dpcm_capture = 1,
  5415. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5416. SND_SOC_DPCM_TRIGGER_POST },
  5417. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5418. .ignore_suspend = 1,
  5419. .codec_dai_name = "snd-soc-dummy-dai",
  5420. .codec_name = "snd-soc-dummy",
  5421. .id = MSM_FRONTEND_DAI_LSM1,
  5422. },
  5423. /* Multiple Tunnel instances */
  5424. {
  5425. .name = MSM_DAILINK_NAME(Compress2),
  5426. .stream_name = "Compress2",
  5427. .cpu_dai_name = "MultiMedia7",
  5428. .platform_name = "msm-compress-dsp",
  5429. .dynamic = 1,
  5430. .dpcm_playback = 1,
  5431. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5432. SND_SOC_DPCM_TRIGGER_POST},
  5433. .codec_dai_name = "snd-soc-dummy-dai",
  5434. .codec_name = "snd-soc-dummy",
  5435. .ignore_suspend = 1,
  5436. .ignore_pmdown_time = 1,
  5437. /* this dainlink has playback support */
  5438. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5439. },
  5440. {
  5441. .name = MSM_DAILINK_NAME(MultiMedia10),
  5442. .stream_name = "MultiMedia10",
  5443. .cpu_dai_name = "MultiMedia10",
  5444. .platform_name = "msm-pcm-dsp.1",
  5445. .dynamic = 1,
  5446. .dpcm_playback = 1,
  5447. .dpcm_capture = 1,
  5448. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5449. SND_SOC_DPCM_TRIGGER_POST},
  5450. .codec_dai_name = "snd-soc-dummy-dai",
  5451. .codec_name = "snd-soc-dummy",
  5452. .ignore_suspend = 1,
  5453. .ignore_pmdown_time = 1,
  5454. /* this dainlink has playback support */
  5455. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5456. },
  5457. {
  5458. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5459. .stream_name = "MM_NOIRQ",
  5460. .cpu_dai_name = "MultiMedia8",
  5461. .platform_name = "msm-pcm-dsp-noirq",
  5462. .dynamic = 1,
  5463. .dpcm_playback = 1,
  5464. .dpcm_capture = 1,
  5465. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5466. SND_SOC_DPCM_TRIGGER_POST},
  5467. .codec_dai_name = "snd-soc-dummy-dai",
  5468. .codec_name = "snd-soc-dummy",
  5469. .ignore_suspend = 1,
  5470. .ignore_pmdown_time = 1,
  5471. /* this dainlink has playback support */
  5472. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5473. .ops = &msm_fe_qos_ops,
  5474. },
  5475. /* HDMI Hostless */
  5476. {
  5477. .name = "HDMI_RX_HOSTLESS",
  5478. .stream_name = "HDMI_RX_HOSTLESS",
  5479. .cpu_dai_name = "HDMI_HOSTLESS",
  5480. .platform_name = "msm-pcm-hostless",
  5481. .dynamic = 1,
  5482. .dpcm_playback = 1,
  5483. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5484. SND_SOC_DPCM_TRIGGER_POST},
  5485. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5486. .ignore_suspend = 1,
  5487. .ignore_pmdown_time = 1,
  5488. .codec_dai_name = "snd-soc-dummy-dai",
  5489. .codec_name = "snd-soc-dummy",
  5490. },
  5491. {
  5492. .name = "VoiceMMode2",
  5493. .stream_name = "VoiceMMode2",
  5494. .cpu_dai_name = "VoiceMMode2",
  5495. .platform_name = "msm-pcm-voice",
  5496. .dynamic = 1,
  5497. .dpcm_playback = 1,
  5498. .dpcm_capture = 1,
  5499. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5500. SND_SOC_DPCM_TRIGGER_POST},
  5501. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5502. .ignore_suspend = 1,
  5503. .ignore_pmdown_time = 1,
  5504. .codec_dai_name = "snd-soc-dummy-dai",
  5505. .codec_name = "snd-soc-dummy",
  5506. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5507. },
  5508. /* LSM FE */
  5509. {
  5510. .name = "Listen 2 Audio Service",
  5511. .stream_name = "Listen 2 Audio Service",
  5512. .cpu_dai_name = "LSM2",
  5513. .platform_name = "msm-lsm-client",
  5514. .dynamic = 1,
  5515. .dpcm_capture = 1,
  5516. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5517. SND_SOC_DPCM_TRIGGER_POST },
  5518. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5519. .ignore_suspend = 1,
  5520. .codec_dai_name = "snd-soc-dummy-dai",
  5521. .codec_name = "snd-soc-dummy",
  5522. .id = MSM_FRONTEND_DAI_LSM2,
  5523. },
  5524. {
  5525. .name = "Listen 3 Audio Service",
  5526. .stream_name = "Listen 3 Audio Service",
  5527. .cpu_dai_name = "LSM3",
  5528. .platform_name = "msm-lsm-client",
  5529. .dynamic = 1,
  5530. .dpcm_capture = 1,
  5531. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5532. SND_SOC_DPCM_TRIGGER_POST },
  5533. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5534. .ignore_suspend = 1,
  5535. .codec_dai_name = "snd-soc-dummy-dai",
  5536. .codec_name = "snd-soc-dummy",
  5537. .id = MSM_FRONTEND_DAI_LSM3,
  5538. },
  5539. {
  5540. .name = "Listen 4 Audio Service",
  5541. .stream_name = "Listen 4 Audio Service",
  5542. .cpu_dai_name = "LSM4",
  5543. .platform_name = "msm-lsm-client",
  5544. .dynamic = 1,
  5545. .dpcm_capture = 1,
  5546. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5547. SND_SOC_DPCM_TRIGGER_POST },
  5548. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5549. .ignore_suspend = 1,
  5550. .codec_dai_name = "snd-soc-dummy-dai",
  5551. .codec_name = "snd-soc-dummy",
  5552. .id = MSM_FRONTEND_DAI_LSM4,
  5553. },
  5554. {
  5555. .name = "Listen 5 Audio Service",
  5556. .stream_name = "Listen 5 Audio Service",
  5557. .cpu_dai_name = "LSM5",
  5558. .platform_name = "msm-lsm-client",
  5559. .dynamic = 1,
  5560. .dpcm_capture = 1,
  5561. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5562. SND_SOC_DPCM_TRIGGER_POST },
  5563. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5564. .ignore_suspend = 1,
  5565. .codec_dai_name = "snd-soc-dummy-dai",
  5566. .codec_name = "snd-soc-dummy",
  5567. .id = MSM_FRONTEND_DAI_LSM5,
  5568. },
  5569. {
  5570. .name = "Listen 6 Audio Service",
  5571. .stream_name = "Listen 6 Audio Service",
  5572. .cpu_dai_name = "LSM6",
  5573. .platform_name = "msm-lsm-client",
  5574. .dynamic = 1,
  5575. .dpcm_capture = 1,
  5576. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5577. SND_SOC_DPCM_TRIGGER_POST },
  5578. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5579. .ignore_suspend = 1,
  5580. .codec_dai_name = "snd-soc-dummy-dai",
  5581. .codec_name = "snd-soc-dummy",
  5582. .id = MSM_FRONTEND_DAI_LSM6,
  5583. },
  5584. {
  5585. .name = "Listen 7 Audio Service",
  5586. .stream_name = "Listen 7 Audio Service",
  5587. .cpu_dai_name = "LSM7",
  5588. .platform_name = "msm-lsm-client",
  5589. .dynamic = 1,
  5590. .dpcm_capture = 1,
  5591. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5592. SND_SOC_DPCM_TRIGGER_POST },
  5593. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5594. .ignore_suspend = 1,
  5595. .codec_dai_name = "snd-soc-dummy-dai",
  5596. .codec_name = "snd-soc-dummy",
  5597. .id = MSM_FRONTEND_DAI_LSM7,
  5598. },
  5599. {
  5600. .name = "Listen 8 Audio Service",
  5601. .stream_name = "Listen 8 Audio Service",
  5602. .cpu_dai_name = "LSM8",
  5603. .platform_name = "msm-lsm-client",
  5604. .dynamic = 1,
  5605. .dpcm_capture = 1,
  5606. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5607. SND_SOC_DPCM_TRIGGER_POST },
  5608. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5609. .ignore_suspend = 1,
  5610. .codec_dai_name = "snd-soc-dummy-dai",
  5611. .codec_name = "snd-soc-dummy",
  5612. .id = MSM_FRONTEND_DAI_LSM8,
  5613. },
  5614. {
  5615. .name = MSM_DAILINK_NAME(Media9),
  5616. .stream_name = "MultiMedia9",
  5617. .cpu_dai_name = "MultiMedia9",
  5618. .platform_name = "msm-pcm-dsp.0",
  5619. .dynamic = 1,
  5620. .dpcm_playback = 1,
  5621. .dpcm_capture = 1,
  5622. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5623. SND_SOC_DPCM_TRIGGER_POST},
  5624. .codec_dai_name = "snd-soc-dummy-dai",
  5625. .codec_name = "snd-soc-dummy",
  5626. .ignore_suspend = 1,
  5627. /* this dainlink has playback support */
  5628. .ignore_pmdown_time = 1,
  5629. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5630. },
  5631. {
  5632. .name = MSM_DAILINK_NAME(Compress4),
  5633. .stream_name = "Compress4",
  5634. .cpu_dai_name = "MultiMedia11",
  5635. .platform_name = "msm-compress-dsp",
  5636. .dynamic = 1,
  5637. .dpcm_playback = 1,
  5638. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5639. SND_SOC_DPCM_TRIGGER_POST},
  5640. .codec_dai_name = "snd-soc-dummy-dai",
  5641. .codec_name = "snd-soc-dummy",
  5642. .ignore_suspend = 1,
  5643. .ignore_pmdown_time = 1,
  5644. /* this dainlink has playback support */
  5645. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5646. },
  5647. {
  5648. .name = MSM_DAILINK_NAME(Compress5),
  5649. .stream_name = "Compress5",
  5650. .cpu_dai_name = "MultiMedia12",
  5651. .platform_name = "msm-compress-dsp",
  5652. .dynamic = 1,
  5653. .dpcm_playback = 1,
  5654. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5655. SND_SOC_DPCM_TRIGGER_POST},
  5656. .codec_dai_name = "snd-soc-dummy-dai",
  5657. .codec_name = "snd-soc-dummy",
  5658. .ignore_suspend = 1,
  5659. .ignore_pmdown_time = 1,
  5660. /* this dainlink has playback support */
  5661. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5662. },
  5663. {
  5664. .name = MSM_DAILINK_NAME(Compress6),
  5665. .stream_name = "Compress6",
  5666. .cpu_dai_name = "MultiMedia13",
  5667. .platform_name = "msm-compress-dsp",
  5668. .dynamic = 1,
  5669. .dpcm_playback = 1,
  5670. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5671. SND_SOC_DPCM_TRIGGER_POST},
  5672. .codec_dai_name = "snd-soc-dummy-dai",
  5673. .codec_name = "snd-soc-dummy",
  5674. .ignore_suspend = 1,
  5675. .ignore_pmdown_time = 1,
  5676. /* this dainlink has playback support */
  5677. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5678. },
  5679. {
  5680. .name = MSM_DAILINK_NAME(Compress7),
  5681. .stream_name = "Compress7",
  5682. .cpu_dai_name = "MultiMedia14",
  5683. .platform_name = "msm-compress-dsp",
  5684. .dynamic = 1,
  5685. .dpcm_playback = 1,
  5686. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5687. SND_SOC_DPCM_TRIGGER_POST},
  5688. .codec_dai_name = "snd-soc-dummy-dai",
  5689. .codec_name = "snd-soc-dummy",
  5690. .ignore_suspend = 1,
  5691. .ignore_pmdown_time = 1,
  5692. /* this dainlink has playback support */
  5693. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5694. },
  5695. {
  5696. .name = MSM_DAILINK_NAME(Compress8),
  5697. .stream_name = "Compress8",
  5698. .cpu_dai_name = "MultiMedia15",
  5699. .platform_name = "msm-compress-dsp",
  5700. .dynamic = 1,
  5701. .dpcm_playback = 1,
  5702. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5703. SND_SOC_DPCM_TRIGGER_POST},
  5704. .codec_dai_name = "snd-soc-dummy-dai",
  5705. .codec_name = "snd-soc-dummy",
  5706. .ignore_suspend = 1,
  5707. .ignore_pmdown_time = 1,
  5708. /* this dainlink has playback support */
  5709. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5710. },
  5711. {
  5712. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5713. .stream_name = "MM_NOIRQ_2",
  5714. .cpu_dai_name = "MultiMedia16",
  5715. .platform_name = "msm-pcm-dsp-noirq",
  5716. .dynamic = 1,
  5717. .dpcm_playback = 1,
  5718. .dpcm_capture = 1,
  5719. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5720. SND_SOC_DPCM_TRIGGER_POST},
  5721. .codec_dai_name = "snd-soc-dummy-dai",
  5722. .codec_name = "snd-soc-dummy",
  5723. .ignore_suspend = 1,
  5724. .ignore_pmdown_time = 1,
  5725. /* this dainlink has playback support */
  5726. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5727. },
  5728. {
  5729. .name = "SLIMBUS_8 Hostless",
  5730. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5731. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5732. .platform_name = "msm-pcm-hostless",
  5733. .dynamic = 1,
  5734. .dpcm_capture = 1,
  5735. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5736. SND_SOC_DPCM_TRIGGER_POST},
  5737. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5738. .ignore_suspend = 1,
  5739. .codec_dai_name = "snd-soc-dummy-dai",
  5740. .codec_name = "snd-soc-dummy",
  5741. },
  5742. };
  5743. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5744. {
  5745. .name = LPASS_BE_SLIMBUS_4_TX,
  5746. .stream_name = "Slimbus4 Capture",
  5747. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5748. .platform_name = "msm-pcm-hostless",
  5749. .codec_name = "tavil_codec",
  5750. .codec_dai_name = "tavil_vifeedback",
  5751. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5752. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5753. .ops = &msm_be_ops,
  5754. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5755. .ignore_suspend = 1,
  5756. },
  5757. /* Ultrasound RX DAI Link */
  5758. {
  5759. .name = "SLIMBUS_2 Hostless Playback",
  5760. .stream_name = "SLIMBUS_2 Hostless Playback",
  5761. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5762. .platform_name = "msm-pcm-hostless",
  5763. .codec_name = "tavil_codec",
  5764. .codec_dai_name = "tavil_rx2",
  5765. .ignore_suspend = 1,
  5766. .ignore_pmdown_time = 1,
  5767. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5768. .ops = &msm_slimbus_2_be_ops,
  5769. },
  5770. /* Ultrasound TX DAI Link */
  5771. {
  5772. .name = "SLIMBUS_2 Hostless Capture",
  5773. .stream_name = "SLIMBUS_2 Hostless Capture",
  5774. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5775. .platform_name = "msm-pcm-hostless",
  5776. .codec_name = "tavil_codec",
  5777. .codec_dai_name = "tavil_tx2",
  5778. .ignore_suspend = 1,
  5779. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5780. .ops = &msm_slimbus_2_be_ops,
  5781. },
  5782. };
  5783. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5784. {
  5785. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5786. .stream_name = "WSA CDC DMA0 Capture",
  5787. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5788. .platform_name = "msm-pcm-hostless",
  5789. .codec_name = "bolero_codec",
  5790. .codec_dai_name = "wsa_macro_vifeedback",
  5791. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5792. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5793. .ignore_suspend = 1,
  5794. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5795. .ops = &msm_cdc_dma_be_ops,
  5796. },
  5797. };
  5798. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5799. {
  5800. .name = MSM_DAILINK_NAME(ASM Loopback),
  5801. .stream_name = "MultiMedia6",
  5802. .cpu_dai_name = "MultiMedia6",
  5803. .platform_name = "msm-pcm-loopback",
  5804. .dynamic = 1,
  5805. .dpcm_playback = 1,
  5806. .dpcm_capture = 1,
  5807. .codec_dai_name = "snd-soc-dummy-dai",
  5808. .codec_name = "snd-soc-dummy",
  5809. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5810. SND_SOC_DPCM_TRIGGER_POST},
  5811. .ignore_suspend = 1,
  5812. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5813. .ignore_pmdown_time = 1,
  5814. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5815. },
  5816. {
  5817. .name = "USB Audio Hostless",
  5818. .stream_name = "USB Audio Hostless",
  5819. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5820. .platform_name = "msm-pcm-hostless",
  5821. .dynamic = 1,
  5822. .dpcm_playback = 1,
  5823. .dpcm_capture = 1,
  5824. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5825. SND_SOC_DPCM_TRIGGER_POST},
  5826. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5827. .ignore_suspend = 1,
  5828. .ignore_pmdown_time = 1,
  5829. .codec_dai_name = "snd-soc-dummy-dai",
  5830. .codec_name = "snd-soc-dummy",
  5831. },
  5832. };
  5833. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5834. /* Backend AFE DAI Links */
  5835. {
  5836. .name = LPASS_BE_AFE_PCM_RX,
  5837. .stream_name = "AFE Playback",
  5838. .cpu_dai_name = "msm-dai-q6-dev.224",
  5839. .platform_name = "msm-pcm-routing",
  5840. .codec_name = "msm-stub-codec.1",
  5841. .codec_dai_name = "msm-stub-rx",
  5842. .no_pcm = 1,
  5843. .dpcm_playback = 1,
  5844. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5845. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5846. /* this dainlink has playback support */
  5847. .ignore_pmdown_time = 1,
  5848. .ignore_suspend = 1,
  5849. },
  5850. {
  5851. .name = LPASS_BE_AFE_PCM_TX,
  5852. .stream_name = "AFE Capture",
  5853. .cpu_dai_name = "msm-dai-q6-dev.225",
  5854. .platform_name = "msm-pcm-routing",
  5855. .codec_name = "msm-stub-codec.1",
  5856. .codec_dai_name = "msm-stub-tx",
  5857. .no_pcm = 1,
  5858. .dpcm_capture = 1,
  5859. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5860. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5861. .ignore_suspend = 1,
  5862. },
  5863. /* Incall Record Uplink BACK END DAI Link */
  5864. {
  5865. .name = LPASS_BE_INCALL_RECORD_TX,
  5866. .stream_name = "Voice Uplink Capture",
  5867. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5868. .platform_name = "msm-pcm-routing",
  5869. .codec_name = "msm-stub-codec.1",
  5870. .codec_dai_name = "msm-stub-tx",
  5871. .no_pcm = 1,
  5872. .dpcm_capture = 1,
  5873. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5874. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5875. .ignore_suspend = 1,
  5876. },
  5877. /* Incall Record Downlink BACK END DAI Link */
  5878. {
  5879. .name = LPASS_BE_INCALL_RECORD_RX,
  5880. .stream_name = "Voice Downlink Capture",
  5881. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5882. .platform_name = "msm-pcm-routing",
  5883. .codec_name = "msm-stub-codec.1",
  5884. .codec_dai_name = "msm-stub-tx",
  5885. .no_pcm = 1,
  5886. .dpcm_capture = 1,
  5887. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5888. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5889. .ignore_suspend = 1,
  5890. },
  5891. /* Incall Music BACK END DAI Link */
  5892. {
  5893. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5894. .stream_name = "Voice Farend Playback",
  5895. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5896. .platform_name = "msm-pcm-routing",
  5897. .codec_name = "msm-stub-codec.1",
  5898. .codec_dai_name = "msm-stub-rx",
  5899. .no_pcm = 1,
  5900. .dpcm_playback = 1,
  5901. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5902. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5903. .ignore_suspend = 1,
  5904. .ignore_pmdown_time = 1,
  5905. },
  5906. /* Incall Music 2 BACK END DAI Link */
  5907. {
  5908. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5909. .stream_name = "Voice2 Farend Playback",
  5910. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5911. .platform_name = "msm-pcm-routing",
  5912. .codec_name = "msm-stub-codec.1",
  5913. .codec_dai_name = "msm-stub-rx",
  5914. .no_pcm = 1,
  5915. .dpcm_playback = 1,
  5916. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5917. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5918. .ignore_suspend = 1,
  5919. .ignore_pmdown_time = 1,
  5920. },
  5921. {
  5922. .name = LPASS_BE_USB_AUDIO_RX,
  5923. .stream_name = "USB Audio Playback",
  5924. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5925. .platform_name = "msm-pcm-routing",
  5926. .codec_name = "msm-stub-codec.1",
  5927. .codec_dai_name = "msm-stub-rx",
  5928. .no_pcm = 1,
  5929. .dpcm_playback = 1,
  5930. .id = MSM_BACKEND_DAI_USB_RX,
  5931. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5932. .ignore_pmdown_time = 1,
  5933. .ignore_suspend = 1,
  5934. },
  5935. {
  5936. .name = LPASS_BE_USB_AUDIO_TX,
  5937. .stream_name = "USB Audio Capture",
  5938. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5939. .platform_name = "msm-pcm-routing",
  5940. .codec_name = "msm-stub-codec.1",
  5941. .codec_dai_name = "msm-stub-tx",
  5942. .no_pcm = 1,
  5943. .dpcm_capture = 1,
  5944. .id = MSM_BACKEND_DAI_USB_TX,
  5945. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5946. .ignore_suspend = 1,
  5947. },
  5948. {
  5949. .name = LPASS_BE_PRI_TDM_RX_0,
  5950. .stream_name = "Primary TDM0 Playback",
  5951. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5952. .platform_name = "msm-pcm-routing",
  5953. .codec_name = "msm-stub-codec.1",
  5954. .codec_dai_name = "msm-stub-rx",
  5955. .no_pcm = 1,
  5956. .dpcm_playback = 1,
  5957. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5958. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5959. .ops = &sm6150_tdm_be_ops,
  5960. .ignore_suspend = 1,
  5961. .ignore_pmdown_time = 1,
  5962. },
  5963. {
  5964. .name = LPASS_BE_PRI_TDM_TX_0,
  5965. .stream_name = "Primary TDM0 Capture",
  5966. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5967. .platform_name = "msm-pcm-routing",
  5968. .codec_name = "msm-stub-codec.1",
  5969. .codec_dai_name = "msm-stub-tx",
  5970. .no_pcm = 1,
  5971. .dpcm_capture = 1,
  5972. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5973. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5974. .ops = &sm6150_tdm_be_ops,
  5975. .ignore_suspend = 1,
  5976. },
  5977. {
  5978. .name = LPASS_BE_SEC_TDM_RX_0,
  5979. .stream_name = "Secondary TDM0 Playback",
  5980. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5981. .platform_name = "msm-pcm-routing",
  5982. .codec_name = "msm-stub-codec.1",
  5983. .codec_dai_name = "msm-stub-rx",
  5984. .no_pcm = 1,
  5985. .dpcm_playback = 1,
  5986. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5987. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5988. .ops = &sm6150_tdm_be_ops,
  5989. .ignore_suspend = 1,
  5990. .ignore_pmdown_time = 1,
  5991. },
  5992. {
  5993. .name = LPASS_BE_SEC_TDM_TX_0,
  5994. .stream_name = "Secondary TDM0 Capture",
  5995. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5996. .platform_name = "msm-pcm-routing",
  5997. .codec_name = "msm-stub-codec.1",
  5998. .codec_dai_name = "msm-stub-tx",
  5999. .no_pcm = 1,
  6000. .dpcm_capture = 1,
  6001. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6002. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6003. .ops = &sm6150_tdm_be_ops,
  6004. .ignore_suspend = 1,
  6005. },
  6006. {
  6007. .name = LPASS_BE_TERT_TDM_RX_0,
  6008. .stream_name = "Tertiary TDM0 Playback",
  6009. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6010. .platform_name = "msm-pcm-routing",
  6011. .codec_name = "msm-stub-codec.1",
  6012. .codec_dai_name = "msm-stub-rx",
  6013. .no_pcm = 1,
  6014. .dpcm_playback = 1,
  6015. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6016. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6017. .ops = &sm6150_tdm_be_ops,
  6018. .ignore_suspend = 1,
  6019. .ignore_pmdown_time = 1,
  6020. },
  6021. {
  6022. .name = LPASS_BE_TERT_TDM_TX_0,
  6023. .stream_name = "Tertiary TDM0 Capture",
  6024. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6025. .platform_name = "msm-pcm-routing",
  6026. .codec_name = "msm-stub-codec.1",
  6027. .codec_dai_name = "msm-stub-tx",
  6028. .no_pcm = 1,
  6029. .dpcm_capture = 1,
  6030. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6031. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6032. .ops = &sm6150_tdm_be_ops,
  6033. .ignore_suspend = 1,
  6034. },
  6035. {
  6036. .name = LPASS_BE_QUAT_TDM_RX_0,
  6037. .stream_name = "Quaternary TDM0 Playback",
  6038. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6039. .platform_name = "msm-pcm-routing",
  6040. .codec_name = "msm-stub-codec.1",
  6041. .codec_dai_name = "msm-stub-rx",
  6042. .no_pcm = 1,
  6043. .dpcm_playback = 1,
  6044. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6045. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6046. .ops = &sm6150_tdm_be_ops,
  6047. .ignore_suspend = 1,
  6048. .ignore_pmdown_time = 1,
  6049. },
  6050. {
  6051. .name = LPASS_BE_QUAT_TDM_TX_0,
  6052. .stream_name = "Quaternary TDM0 Capture",
  6053. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6054. .platform_name = "msm-pcm-routing",
  6055. .codec_name = "msm-stub-codec.1",
  6056. .codec_dai_name = "msm-stub-tx",
  6057. .no_pcm = 1,
  6058. .dpcm_capture = 1,
  6059. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6060. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6061. .ops = &sm6150_tdm_be_ops,
  6062. .ignore_suspend = 1,
  6063. },
  6064. };
  6065. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6066. {
  6067. .name = LPASS_BE_SLIMBUS_0_RX,
  6068. .stream_name = "Slimbus Playback",
  6069. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6070. .platform_name = "msm-pcm-routing",
  6071. .codec_name = "tavil_codec",
  6072. .codec_dai_name = "tavil_rx1",
  6073. .no_pcm = 1,
  6074. .dpcm_playback = 1,
  6075. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6076. .init = &msm_audrx_tavil_init,
  6077. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6078. /* this dainlink has playback support */
  6079. .ignore_pmdown_time = 1,
  6080. .ignore_suspend = 1,
  6081. .ops = &msm_be_ops,
  6082. },
  6083. {
  6084. .name = LPASS_BE_SLIMBUS_0_TX,
  6085. .stream_name = "Slimbus Capture",
  6086. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6087. .platform_name = "msm-pcm-routing",
  6088. .codec_name = "tavil_codec",
  6089. .codec_dai_name = "tavil_tx1",
  6090. .no_pcm = 1,
  6091. .dpcm_capture = 1,
  6092. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6093. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6094. .ignore_suspend = 1,
  6095. .ops = &msm_be_ops,
  6096. },
  6097. {
  6098. .name = LPASS_BE_SLIMBUS_1_RX,
  6099. .stream_name = "Slimbus1 Playback",
  6100. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6101. .platform_name = "msm-pcm-routing",
  6102. .codec_name = "tavil_codec",
  6103. .codec_dai_name = "tavil_rx1",
  6104. .no_pcm = 1,
  6105. .dpcm_playback = 1,
  6106. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6107. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6108. .ops = &msm_be_ops,
  6109. /* dai link has playback support */
  6110. .ignore_pmdown_time = 1,
  6111. .ignore_suspend = 1,
  6112. },
  6113. {
  6114. .name = LPASS_BE_SLIMBUS_1_TX,
  6115. .stream_name = "Slimbus1 Capture",
  6116. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6117. .platform_name = "msm-pcm-routing",
  6118. .codec_name = "tavil_codec",
  6119. .codec_dai_name = "tavil_tx3",
  6120. .no_pcm = 1,
  6121. .dpcm_capture = 1,
  6122. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6123. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6124. .ops = &msm_be_ops,
  6125. .ignore_suspend = 1,
  6126. },
  6127. {
  6128. .name = LPASS_BE_SLIMBUS_2_RX,
  6129. .stream_name = "Slimbus2 Playback",
  6130. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6131. .platform_name = "msm-pcm-routing",
  6132. .codec_name = "tavil_codec",
  6133. .codec_dai_name = "tavil_rx2",
  6134. .no_pcm = 1,
  6135. .dpcm_playback = 1,
  6136. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6137. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6138. .ops = &msm_be_ops,
  6139. .ignore_pmdown_time = 1,
  6140. .ignore_suspend = 1,
  6141. },
  6142. {
  6143. .name = LPASS_BE_SLIMBUS_3_RX,
  6144. .stream_name = "Slimbus3 Playback",
  6145. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6146. .platform_name = "msm-pcm-routing",
  6147. .codec_name = "tavil_codec",
  6148. .codec_dai_name = "tavil_rx1",
  6149. .no_pcm = 1,
  6150. .dpcm_playback = 1,
  6151. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6152. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6153. .ops = &msm_be_ops,
  6154. /* dai link has playback support */
  6155. .ignore_pmdown_time = 1,
  6156. .ignore_suspend = 1,
  6157. },
  6158. {
  6159. .name = LPASS_BE_SLIMBUS_3_TX,
  6160. .stream_name = "Slimbus3 Capture",
  6161. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6162. .platform_name = "msm-pcm-routing",
  6163. .codec_name = "tavil_codec",
  6164. .codec_dai_name = "tavil_tx1",
  6165. .no_pcm = 1,
  6166. .dpcm_capture = 1,
  6167. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6168. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6169. .ops = &msm_be_ops,
  6170. .ignore_suspend = 1,
  6171. },
  6172. {
  6173. .name = LPASS_BE_SLIMBUS_4_RX,
  6174. .stream_name = "Slimbus4 Playback",
  6175. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6176. .platform_name = "msm-pcm-routing",
  6177. .codec_name = "tavil_codec",
  6178. .codec_dai_name = "tavil_rx1",
  6179. .no_pcm = 1,
  6180. .dpcm_playback = 1,
  6181. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6182. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6183. .ops = &msm_be_ops,
  6184. /* dai link has playback support */
  6185. .ignore_pmdown_time = 1,
  6186. .ignore_suspend = 1,
  6187. },
  6188. {
  6189. .name = LPASS_BE_SLIMBUS_5_RX,
  6190. .stream_name = "Slimbus5 Playback",
  6191. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6192. .platform_name = "msm-pcm-routing",
  6193. .codec_name = "tavil_codec",
  6194. .codec_dai_name = "tavil_rx3",
  6195. .no_pcm = 1,
  6196. .dpcm_playback = 1,
  6197. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6198. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6199. .ops = &msm_be_ops,
  6200. /* dai link has playback support */
  6201. .ignore_pmdown_time = 1,
  6202. .ignore_suspend = 1,
  6203. },
  6204. /* MAD BE */
  6205. {
  6206. .name = LPASS_BE_SLIMBUS_5_TX,
  6207. .stream_name = "Slimbus5 Capture",
  6208. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6209. .platform_name = "msm-pcm-routing",
  6210. .codec_name = "tavil_codec",
  6211. .codec_dai_name = "tavil_mad1",
  6212. .no_pcm = 1,
  6213. .dpcm_capture = 1,
  6214. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6215. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6216. .ops = &msm_be_ops,
  6217. .ignore_suspend = 1,
  6218. },
  6219. {
  6220. .name = LPASS_BE_SLIMBUS_6_RX,
  6221. .stream_name = "Slimbus6 Playback",
  6222. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6223. .platform_name = "msm-pcm-routing",
  6224. .codec_name = "tavil_codec",
  6225. .codec_dai_name = "tavil_rx4",
  6226. .no_pcm = 1,
  6227. .dpcm_playback = 1,
  6228. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6229. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6230. .ops = &msm_be_ops,
  6231. /* dai link has playback support */
  6232. .ignore_pmdown_time = 1,
  6233. .ignore_suspend = 1,
  6234. },
  6235. /* Slimbus VI Recording */
  6236. {
  6237. .name = LPASS_BE_SLIMBUS_TX_VI,
  6238. .stream_name = "Slimbus4 Capture",
  6239. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6240. .platform_name = "msm-pcm-routing",
  6241. .codec_name = "tavil_codec",
  6242. .codec_dai_name = "tavil_vifeedback",
  6243. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6244. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6245. .ops = &msm_be_ops,
  6246. .ignore_suspend = 1,
  6247. .no_pcm = 1,
  6248. .dpcm_capture = 1,
  6249. },
  6250. };
  6251. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6252. {
  6253. .name = LPASS_BE_SLIMBUS_7_RX,
  6254. .stream_name = "Slimbus7 Playback",
  6255. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6256. .platform_name = "msm-pcm-routing",
  6257. .codec_name = "btfmslim_slave",
  6258. /* BT codec driver determines capabilities based on
  6259. * dai name, bt codecdai name should always contains
  6260. * supported usecase information
  6261. */
  6262. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6263. .no_pcm = 1,
  6264. .dpcm_playback = 1,
  6265. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6266. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6267. .ops = &msm_wcn_ops,
  6268. /* dai link has playback support */
  6269. .ignore_pmdown_time = 1,
  6270. .ignore_suspend = 1,
  6271. },
  6272. {
  6273. .name = LPASS_BE_SLIMBUS_7_TX,
  6274. .stream_name = "Slimbus7 Capture",
  6275. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6276. .platform_name = "msm-pcm-routing",
  6277. .codec_name = "btfmslim_slave",
  6278. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6279. .no_pcm = 1,
  6280. .dpcm_capture = 1,
  6281. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6282. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6283. .ops = &msm_wcn_ops,
  6284. .ignore_suspend = 1,
  6285. },
  6286. {
  6287. .name = LPASS_BE_SLIMBUS_8_TX,
  6288. .stream_name = "Slimbus8 Capture",
  6289. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6290. .platform_name = "msm-pcm-routing",
  6291. .codec_name = "btfmslim_slave",
  6292. .codec_dai_name = "btfm_fm_slim_tx",
  6293. .no_pcm = 1,
  6294. .dpcm_capture = 1,
  6295. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6296. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6297. .init = &msm_wcn_init,
  6298. .ops = &msm_wcn_ops,
  6299. .ignore_suspend = 1,
  6300. },
  6301. };
  6302. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6303. /* DISP PORT BACK END DAI Link */
  6304. {
  6305. .name = LPASS_BE_DISPLAY_PORT,
  6306. .stream_name = "Display Port Playback",
  6307. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6308. .platform_name = "msm-pcm-routing",
  6309. .codec_name = "msm-ext-disp-audio-codec-rx",
  6310. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6311. .no_pcm = 1,
  6312. .dpcm_playback = 1,
  6313. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6314. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6315. .ignore_pmdown_time = 1,
  6316. .ignore_suspend = 1,
  6317. },
  6318. };
  6319. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6320. {
  6321. .name = LPASS_BE_PRI_MI2S_RX,
  6322. .stream_name = "Primary MI2S Playback",
  6323. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6324. .platform_name = "msm-pcm-routing",
  6325. .codec_name = "msm-stub-codec.1",
  6326. .codec_dai_name = "msm-stub-rx",
  6327. .no_pcm = 1,
  6328. .dpcm_playback = 1,
  6329. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6330. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6331. .ops = &msm_mi2s_be_ops,
  6332. .ignore_suspend = 1,
  6333. .ignore_pmdown_time = 1,
  6334. },
  6335. {
  6336. .name = LPASS_BE_PRI_MI2S_TX,
  6337. .stream_name = "Primary MI2S Capture",
  6338. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6339. .platform_name = "msm-pcm-routing",
  6340. .codec_name = "msm-stub-codec.1",
  6341. .codec_dai_name = "msm-stub-tx",
  6342. .no_pcm = 1,
  6343. .dpcm_capture = 1,
  6344. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6345. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6346. .ops = &msm_mi2s_be_ops,
  6347. .ignore_suspend = 1,
  6348. },
  6349. {
  6350. .name = LPASS_BE_SEC_MI2S_RX,
  6351. .stream_name = "Secondary MI2S Playback",
  6352. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6353. .platform_name = "msm-pcm-routing",
  6354. .codec_name = "msm-stub-codec.1",
  6355. .codec_dai_name = "msm-stub-rx",
  6356. .no_pcm = 1,
  6357. .dpcm_playback = 1,
  6358. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6359. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6360. .ops = &msm_mi2s_be_ops,
  6361. .ignore_suspend = 1,
  6362. .ignore_pmdown_time = 1,
  6363. },
  6364. {
  6365. .name = LPASS_BE_SEC_MI2S_TX,
  6366. .stream_name = "Secondary MI2S Capture",
  6367. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6368. .platform_name = "msm-pcm-routing",
  6369. .codec_name = "msm-stub-codec.1",
  6370. .codec_dai_name = "msm-stub-tx",
  6371. .no_pcm = 1,
  6372. .dpcm_capture = 1,
  6373. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6374. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6375. .ops = &msm_mi2s_be_ops,
  6376. .ignore_suspend = 1,
  6377. },
  6378. {
  6379. .name = LPASS_BE_TERT_MI2S_RX,
  6380. .stream_name = "Tertiary MI2S Playback",
  6381. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6382. .platform_name = "msm-pcm-routing",
  6383. .codec_name = "msm-stub-codec.1",
  6384. .codec_dai_name = "msm-stub-rx",
  6385. .no_pcm = 1,
  6386. .dpcm_playback = 1,
  6387. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6388. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6389. .ops = &msm_mi2s_be_ops,
  6390. .ignore_suspend = 1,
  6391. .ignore_pmdown_time = 1,
  6392. },
  6393. {
  6394. .name = LPASS_BE_TERT_MI2S_TX,
  6395. .stream_name = "Tertiary MI2S Capture",
  6396. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6397. .platform_name = "msm-pcm-routing",
  6398. .codec_name = "msm-stub-codec.1",
  6399. .codec_dai_name = "msm-stub-tx",
  6400. .no_pcm = 1,
  6401. .dpcm_capture = 1,
  6402. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6403. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6404. .ops = &msm_mi2s_be_ops,
  6405. .ignore_suspend = 1,
  6406. },
  6407. {
  6408. .name = LPASS_BE_QUAT_MI2S_RX,
  6409. .stream_name = "Quaternary MI2S Playback",
  6410. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6411. .platform_name = "msm-pcm-routing",
  6412. .codec_name = "msm-stub-codec.1",
  6413. .codec_dai_name = "msm-stub-rx",
  6414. .no_pcm = 1,
  6415. .dpcm_playback = 1,
  6416. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6417. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6418. .ops = &msm_mi2s_be_ops,
  6419. .ignore_suspend = 1,
  6420. .ignore_pmdown_time = 1,
  6421. },
  6422. {
  6423. .name = LPASS_BE_QUAT_MI2S_TX,
  6424. .stream_name = "Quaternary MI2S Capture",
  6425. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6426. .platform_name = "msm-pcm-routing",
  6427. .codec_name = "msm-stub-codec.1",
  6428. .codec_dai_name = "msm-stub-tx",
  6429. .no_pcm = 1,
  6430. .dpcm_capture = 1,
  6431. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6432. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6433. .ops = &msm_mi2s_be_ops,
  6434. .ignore_suspend = 1,
  6435. },
  6436. {
  6437. .name = LPASS_BE_QUIN_MI2S_RX,
  6438. .stream_name = "Quinary MI2S Playback",
  6439. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6440. .platform_name = "msm-pcm-routing",
  6441. .codec_name = "msm-stub-codec.1",
  6442. .codec_dai_name = "msm-stub-rx",
  6443. .no_pcm = 1,
  6444. .dpcm_playback = 1,
  6445. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6446. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6447. .ops = &msm_mi2s_be_ops,
  6448. .ignore_suspend = 1,
  6449. .ignore_pmdown_time = 1,
  6450. },
  6451. {
  6452. .name = LPASS_BE_QUIN_MI2S_TX,
  6453. .stream_name = "Quinary MI2S Capture",
  6454. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6455. .platform_name = "msm-pcm-routing",
  6456. .codec_name = "msm-stub-codec.1",
  6457. .codec_dai_name = "msm-stub-tx",
  6458. .no_pcm = 1,
  6459. .dpcm_capture = 1,
  6460. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6461. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6462. .ops = &msm_mi2s_be_ops,
  6463. .ignore_suspend = 1,
  6464. },
  6465. };
  6466. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6467. /* Primary AUX PCM Backend DAI Links */
  6468. {
  6469. .name = LPASS_BE_AUXPCM_RX,
  6470. .stream_name = "AUX PCM Playback",
  6471. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6472. .platform_name = "msm-pcm-routing",
  6473. .codec_name = "msm-stub-codec.1",
  6474. .codec_dai_name = "msm-stub-rx",
  6475. .no_pcm = 1,
  6476. .dpcm_playback = 1,
  6477. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6478. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6479. .ignore_pmdown_time = 1,
  6480. .ignore_suspend = 1,
  6481. },
  6482. {
  6483. .name = LPASS_BE_AUXPCM_TX,
  6484. .stream_name = "AUX PCM Capture",
  6485. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6486. .platform_name = "msm-pcm-routing",
  6487. .codec_name = "msm-stub-codec.1",
  6488. .codec_dai_name = "msm-stub-tx",
  6489. .no_pcm = 1,
  6490. .dpcm_capture = 1,
  6491. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6492. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6493. .ignore_suspend = 1,
  6494. },
  6495. /* Secondary AUX PCM Backend DAI Links */
  6496. {
  6497. .name = LPASS_BE_SEC_AUXPCM_RX,
  6498. .stream_name = "Sec AUX PCM Playback",
  6499. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6500. .platform_name = "msm-pcm-routing",
  6501. .codec_name = "msm-stub-codec.1",
  6502. .codec_dai_name = "msm-stub-rx",
  6503. .no_pcm = 1,
  6504. .dpcm_playback = 1,
  6505. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6506. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6507. .ignore_pmdown_time = 1,
  6508. .ignore_suspend = 1,
  6509. },
  6510. {
  6511. .name = LPASS_BE_SEC_AUXPCM_TX,
  6512. .stream_name = "Sec AUX PCM Capture",
  6513. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6514. .platform_name = "msm-pcm-routing",
  6515. .codec_name = "msm-stub-codec.1",
  6516. .codec_dai_name = "msm-stub-tx",
  6517. .no_pcm = 1,
  6518. .dpcm_capture = 1,
  6519. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6520. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6521. .ignore_suspend = 1,
  6522. },
  6523. /* Tertiary AUX PCM Backend DAI Links */
  6524. {
  6525. .name = LPASS_BE_TERT_AUXPCM_RX,
  6526. .stream_name = "Tert AUX PCM Playback",
  6527. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6528. .platform_name = "msm-pcm-routing",
  6529. .codec_name = "msm-stub-codec.1",
  6530. .codec_dai_name = "msm-stub-rx",
  6531. .no_pcm = 1,
  6532. .dpcm_playback = 1,
  6533. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6534. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6535. .ignore_suspend = 1,
  6536. },
  6537. {
  6538. .name = LPASS_BE_TERT_AUXPCM_TX,
  6539. .stream_name = "Tert AUX PCM Capture",
  6540. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6541. .platform_name = "msm-pcm-routing",
  6542. .codec_name = "msm-stub-codec.1",
  6543. .codec_dai_name = "msm-stub-tx",
  6544. .no_pcm = 1,
  6545. .dpcm_capture = 1,
  6546. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6547. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6548. .ignore_suspend = 1,
  6549. },
  6550. /* Quaternary AUX PCM Backend DAI Links */
  6551. {
  6552. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6553. .stream_name = "Quat AUX PCM Playback",
  6554. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6555. .platform_name = "msm-pcm-routing",
  6556. .codec_name = "msm-stub-codec.1",
  6557. .codec_dai_name = "msm-stub-rx",
  6558. .no_pcm = 1,
  6559. .dpcm_playback = 1,
  6560. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6561. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6562. .ignore_pmdown_time = 1,
  6563. .ignore_suspend = 1,
  6564. },
  6565. {
  6566. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6567. .stream_name = "Quat AUX PCM Capture",
  6568. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6569. .platform_name = "msm-pcm-routing",
  6570. .codec_name = "msm-stub-codec.1",
  6571. .codec_dai_name = "msm-stub-tx",
  6572. .no_pcm = 1,
  6573. .dpcm_capture = 1,
  6574. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6575. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6576. .ignore_suspend = 1,
  6577. },
  6578. /* Quinary AUX PCM Backend DAI Links */
  6579. {
  6580. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6581. .stream_name = "Quin AUX PCM Playback",
  6582. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6583. .platform_name = "msm-pcm-routing",
  6584. .codec_name = "msm-stub-codec.1",
  6585. .codec_dai_name = "msm-stub-rx",
  6586. .no_pcm = 1,
  6587. .dpcm_playback = 1,
  6588. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6589. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6590. .ignore_pmdown_time = 1,
  6591. .ignore_suspend = 1,
  6592. },
  6593. {
  6594. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6595. .stream_name = "Quin AUX PCM Capture",
  6596. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6597. .platform_name = "msm-pcm-routing",
  6598. .codec_name = "msm-stub-codec.1",
  6599. .codec_dai_name = "msm-stub-tx",
  6600. .no_pcm = 1,
  6601. .dpcm_capture = 1,
  6602. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6603. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6604. .ignore_suspend = 1,
  6605. },
  6606. };
  6607. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6608. /* WSA CDC DMA Backend DAI Links */
  6609. {
  6610. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6611. .stream_name = "WSA CDC DMA0 Playback",
  6612. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6613. .platform_name = "msm-pcm-routing",
  6614. .codec_name = "bolero_codec",
  6615. .codec_dai_name = "wsa_macro_rx1",
  6616. .no_pcm = 1,
  6617. .dpcm_playback = 1,
  6618. .init = &msm_int_audrx_init,
  6619. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6620. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6621. .ignore_pmdown_time = 1,
  6622. .ignore_suspend = 1,
  6623. .ops = &msm_cdc_dma_be_ops,
  6624. },
  6625. {
  6626. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6627. .stream_name = "WSA CDC DMA1 Playback",
  6628. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6629. .platform_name = "msm-pcm-routing",
  6630. .codec_name = "bolero_codec",
  6631. .codec_dai_name = "wsa_macro_rx_mix",
  6632. .no_pcm = 1,
  6633. .dpcm_playback = 1,
  6634. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6635. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6636. .ignore_pmdown_time = 1,
  6637. .ignore_suspend = 1,
  6638. .ops = &msm_cdc_dma_be_ops,
  6639. },
  6640. {
  6641. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6642. .stream_name = "WSA CDC DMA1 Capture",
  6643. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6644. .platform_name = "msm-pcm-routing",
  6645. .codec_name = "bolero_codec",
  6646. .codec_dai_name = "wsa_macro_echo",
  6647. .no_pcm = 1,
  6648. .dpcm_capture = 1,
  6649. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6650. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6651. .ignore_suspend = 1,
  6652. .ops = &msm_cdc_dma_be_ops,
  6653. },
  6654. };
  6655. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6656. /* RX CDC DMA Backend DAI Links */
  6657. {
  6658. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6659. .stream_name = "RX CDC DMA0 Playback",
  6660. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6661. .platform_name = "msm-pcm-routing",
  6662. .codec_name = "bolero_codec",
  6663. .codec_dai_name = "rx_macro_rx1",
  6664. .no_pcm = 1,
  6665. .dpcm_playback = 1,
  6666. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6667. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6668. .ignore_pmdown_time = 1,
  6669. .ignore_suspend = 1,
  6670. .ops = &msm_cdc_dma_be_ops,
  6671. },
  6672. {
  6673. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6674. .stream_name = "RX CDC DMA1 Playback",
  6675. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6676. .platform_name = "msm-pcm-routing",
  6677. .codec_name = "bolero_codec",
  6678. .codec_dai_name = "rx_macro_rx2",
  6679. .no_pcm = 1,
  6680. .dpcm_playback = 1,
  6681. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6682. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6683. .ignore_pmdown_time = 1,
  6684. .ignore_suspend = 1,
  6685. .ops = &msm_cdc_dma_be_ops,
  6686. },
  6687. {
  6688. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6689. .stream_name = "RX CDC DMA2 Playback",
  6690. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6691. .platform_name = "msm-pcm-routing",
  6692. .codec_name = "bolero_codec",
  6693. .codec_dai_name = "rx_macro_rx3",
  6694. .no_pcm = 1,
  6695. .dpcm_playback = 1,
  6696. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6697. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6698. .ignore_pmdown_time = 1,
  6699. .ignore_suspend = 1,
  6700. .ops = &msm_cdc_dma_be_ops,
  6701. },
  6702. {
  6703. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6704. .stream_name = "RX CDC DMA3 Playback",
  6705. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6706. .platform_name = "msm-pcm-routing",
  6707. .codec_name = "bolero_codec",
  6708. .codec_dai_name = "rx_macro_rx4",
  6709. .no_pcm = 1,
  6710. .dpcm_playback = 1,
  6711. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6712. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6713. .ignore_pmdown_time = 1,
  6714. .ignore_suspend = 1,
  6715. .ops = &msm_cdc_dma_be_ops,
  6716. },
  6717. /* TX CDC DMA Backend DAI Links */
  6718. {
  6719. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6720. .stream_name = "TX CDC DMA3 Capture",
  6721. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6722. .platform_name = "msm-pcm-routing",
  6723. .codec_name = "bolero_codec",
  6724. .codec_dai_name = "tx_macro_tx1",
  6725. .no_pcm = 1,
  6726. .dpcm_capture = 1,
  6727. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6728. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6729. .ignore_suspend = 1,
  6730. .ops = &msm_cdc_dma_be_ops,
  6731. },
  6732. {
  6733. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6734. .stream_name = "TX CDC DMA4 Capture",
  6735. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6736. .platform_name = "msm-pcm-routing",
  6737. .codec_name = "bolero_codec",
  6738. .codec_dai_name = "tx_macro_tx2",
  6739. .no_pcm = 1,
  6740. .dpcm_capture = 1,
  6741. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6742. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6743. .ignore_suspend = 1,
  6744. .ops = &msm_cdc_dma_be_ops,
  6745. },
  6746. };
  6747. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6748. ARRAY_SIZE(msm_common_dai_links) +
  6749. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6750. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6751. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6752. ARRAY_SIZE(msm_common_be_dai_links) +
  6753. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6754. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6755. ARRAY_SIZE(ext_disp_be_dai_link) +
  6756. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6757. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6758. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6759. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6760. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6761. {
  6762. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6763. struct snd_soc_pcm_runtime *rtd;
  6764. int ret = 0;
  6765. void *mbhc_calibration;
  6766. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6767. if (!rtd) {
  6768. dev_err(card->dev,
  6769. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6770. __func__, be_dl_name);
  6771. ret = -EINVAL;
  6772. goto err_pcm_runtime;
  6773. }
  6774. mbhc_calibration = def_wcd_mbhc_cal();
  6775. if (!mbhc_calibration) {
  6776. ret = -ENOMEM;
  6777. goto err_mbhc_cal;
  6778. }
  6779. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6780. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6781. if (ret) {
  6782. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6783. __func__, ret);
  6784. goto err_hs_detect;
  6785. }
  6786. return 0;
  6787. err_hs_detect:
  6788. kfree(mbhc_calibration);
  6789. err_mbhc_cal:
  6790. err_pcm_runtime:
  6791. return ret;
  6792. }
  6793. static int msm_populate_dai_link_component_of_node(
  6794. struct snd_soc_card *card)
  6795. {
  6796. int i, index, ret = 0;
  6797. struct device *cdev = card->dev;
  6798. struct snd_soc_dai_link *dai_link = card->dai_link;
  6799. struct device_node *np;
  6800. if (!cdev) {
  6801. pr_err("%s: Sound card device memory NULL\n", __func__);
  6802. return -ENODEV;
  6803. }
  6804. for (i = 0; i < card->num_links; i++) {
  6805. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6806. continue;
  6807. /* populate platform_of_node for snd card dai links */
  6808. if (dai_link[i].platform_name &&
  6809. !dai_link[i].platform_of_node) {
  6810. index = of_property_match_string(cdev->of_node,
  6811. "asoc-platform-names",
  6812. dai_link[i].platform_name);
  6813. if (index < 0) {
  6814. pr_err("%s: No match found for platform name: %s\n",
  6815. __func__, dai_link[i].platform_name);
  6816. ret = index;
  6817. goto err;
  6818. }
  6819. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6820. index);
  6821. if (!np) {
  6822. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6823. __func__, dai_link[i].platform_name,
  6824. index);
  6825. ret = -ENODEV;
  6826. goto err;
  6827. }
  6828. dai_link[i].platform_of_node = np;
  6829. dai_link[i].platform_name = NULL;
  6830. }
  6831. /* populate cpu_of_node for snd card dai links */
  6832. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6833. index = of_property_match_string(cdev->of_node,
  6834. "asoc-cpu-names",
  6835. dai_link[i].cpu_dai_name);
  6836. if (index >= 0) {
  6837. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6838. index);
  6839. if (!np) {
  6840. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6841. __func__,
  6842. dai_link[i].cpu_dai_name);
  6843. ret = -ENODEV;
  6844. goto err;
  6845. }
  6846. dai_link[i].cpu_of_node = np;
  6847. dai_link[i].cpu_dai_name = NULL;
  6848. }
  6849. }
  6850. /* populate codec_of_node for snd card dai links */
  6851. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6852. index = of_property_match_string(cdev->of_node,
  6853. "asoc-codec-names",
  6854. dai_link[i].codec_name);
  6855. if (index < 0)
  6856. continue;
  6857. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6858. index);
  6859. if (!np) {
  6860. pr_err("%s: retrieving phandle for codec %s failed\n",
  6861. __func__, dai_link[i].codec_name);
  6862. ret = -ENODEV;
  6863. goto err;
  6864. }
  6865. dai_link[i].codec_of_node = np;
  6866. dai_link[i].codec_name = NULL;
  6867. }
  6868. }
  6869. err:
  6870. return ret;
  6871. }
  6872. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6873. {
  6874. int ret = 0;
  6875. struct snd_soc_codec *codec = rtd->codec;
  6876. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6877. ARRAY_SIZE(msm_tavil_snd_controls));
  6878. if (ret < 0) {
  6879. dev_err(codec->dev,
  6880. "%s: add_codec_controls failed, err = %d\n",
  6881. __func__, ret);
  6882. return ret;
  6883. }
  6884. return 0;
  6885. }
  6886. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6887. struct snd_pcm_hw_params *params)
  6888. {
  6889. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6890. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6891. int ret = 0;
  6892. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6893. 151};
  6894. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6895. 134, 135, 136, 137, 138, 139,
  6896. 140, 141, 142, 143};
  6897. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6898. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6899. slim_rx_cfg[SLIM_RX_0].channels,
  6900. rx_ch);
  6901. if (ret < 0)
  6902. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6903. __func__, ret);
  6904. } else {
  6905. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6906. slim_tx_cfg[SLIM_TX_0].channels,
  6907. tx_ch, 0, 0);
  6908. if (ret < 0)
  6909. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6910. __func__, ret);
  6911. }
  6912. return ret;
  6913. }
  6914. static struct snd_soc_ops msm_stub_be_ops = {
  6915. .hw_params = msm_snd_stub_hw_params,
  6916. };
  6917. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6918. /* FrontEnd DAI Links */
  6919. {
  6920. .name = "MSMSTUB Media1",
  6921. .stream_name = "MultiMedia1",
  6922. .cpu_dai_name = "MultiMedia1",
  6923. .platform_name = "msm-pcm-dsp.0",
  6924. .dynamic = 1,
  6925. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6926. .dpcm_playback = 1,
  6927. .dpcm_capture = 1,
  6928. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6929. SND_SOC_DPCM_TRIGGER_POST},
  6930. .codec_dai_name = "snd-soc-dummy-dai",
  6931. .codec_name = "snd-soc-dummy",
  6932. .ignore_suspend = 1,
  6933. /* this dainlink has playback support */
  6934. .ignore_pmdown_time = 1,
  6935. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6936. },
  6937. };
  6938. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6939. /* Backend DAI Links */
  6940. {
  6941. .name = LPASS_BE_SLIMBUS_0_RX,
  6942. .stream_name = "Slimbus Playback",
  6943. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6944. .platform_name = "msm-pcm-routing",
  6945. .codec_name = "msm-stub-codec.1",
  6946. .codec_dai_name = "msm-stub-rx",
  6947. .no_pcm = 1,
  6948. .dpcm_playback = 1,
  6949. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6950. .init = &msm_audrx_stub_init,
  6951. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6952. .ignore_pmdown_time = 1, /* dai link has playback support */
  6953. .ignore_suspend = 1,
  6954. .ops = &msm_stub_be_ops,
  6955. },
  6956. {
  6957. .name = LPASS_BE_SLIMBUS_0_TX,
  6958. .stream_name = "Slimbus Capture",
  6959. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6960. .platform_name = "msm-pcm-routing",
  6961. .codec_name = "msm-stub-codec.1",
  6962. .codec_dai_name = "msm-stub-tx",
  6963. .no_pcm = 1,
  6964. .dpcm_capture = 1,
  6965. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6966. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6967. .ignore_suspend = 1,
  6968. .ops = &msm_stub_be_ops,
  6969. },
  6970. };
  6971. static struct snd_soc_dai_link msm_stub_dai_links[
  6972. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6973. ARRAY_SIZE(msm_stub_be_dai_links)];
  6974. struct snd_soc_card snd_soc_card_stub_msm = {
  6975. .name = "sm6150-stub-snd-card",
  6976. };
  6977. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  6978. { .compatible = "qcom,sm6150-asoc-snd",
  6979. .data = "codec"},
  6980. { .compatible = "qcom,sm6150-asoc-snd-stub",
  6981. .data = "stub_codec"},
  6982. {},
  6983. };
  6984. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6985. {
  6986. struct snd_soc_card *card = NULL;
  6987. struct snd_soc_dai_link *dailink;
  6988. int total_links = 0, rc = 0;
  6989. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  6990. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  6991. u32 wcn_btfm_intf = 0;
  6992. const struct of_device_id *match;
  6993. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  6994. if (!match) {
  6995. dev_err(dev, "%s: No DT match found for sound card\n",
  6996. __func__);
  6997. return NULL;
  6998. }
  6999. if (!strcmp(match->data, "codec")) {
  7000. card = &snd_soc_card_sm6150_msm;
  7001. memcpy(msm_sm6150_dai_links + total_links,
  7002. msm_common_dai_links,
  7003. sizeof(msm_common_dai_links));
  7004. total_links += ARRAY_SIZE(msm_common_dai_links);
  7005. memcpy(msm_sm6150_dai_links + total_links,
  7006. msm_common_misc_fe_dai_links,
  7007. sizeof(msm_common_misc_fe_dai_links));
  7008. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7009. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7010. &tavil_codec);
  7011. if (rc) {
  7012. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7013. __func__);
  7014. } else {
  7015. if (tavil_codec) {
  7016. card->late_probe =
  7017. msm_snd_card_tavil_late_probe;
  7018. memcpy(msm_sm6150_dai_links + total_links,
  7019. msm_tavil_fe_dai_links,
  7020. sizeof(msm_tavil_fe_dai_links));
  7021. total_links +=
  7022. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7023. }
  7024. }
  7025. if (!tavil_codec) {
  7026. memcpy(msm_sm6150_dai_links + total_links,
  7027. msm_bolero_fe_dai_links,
  7028. sizeof(msm_bolero_fe_dai_links));
  7029. total_links +=
  7030. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7031. }
  7032. memcpy(msm_sm6150_dai_links + total_links,
  7033. msm_common_be_dai_links,
  7034. sizeof(msm_common_be_dai_links));
  7035. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7036. if (tavil_codec) {
  7037. memcpy(msm_sm6150_dai_links + total_links,
  7038. msm_tavil_be_dai_links,
  7039. sizeof(msm_tavil_be_dai_links));
  7040. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7041. } else {
  7042. memcpy(msm_sm6150_dai_links + total_links,
  7043. msm_wsa_cdc_dma_be_dai_links,
  7044. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7045. total_links +=
  7046. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7047. memcpy(msm_sm6150_dai_links + total_links,
  7048. msm_rx_tx_cdc_dma_be_dai_links,
  7049. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7050. total_links +=
  7051. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7052. }
  7053. rc = of_property_read_u32(dev->of_node,
  7054. "qcom,ext-disp-audio-rx",
  7055. &ext_disp_audio_intf);
  7056. if (rc) {
  7057. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7058. __func__);
  7059. } else {
  7060. if (auxpcm_audio_intf) {
  7061. memcpy(msm_sm6150_dai_links + total_links,
  7062. ext_disp_be_dai_link,
  7063. sizeof(ext_disp_be_dai_link));
  7064. total_links +=
  7065. ARRAY_SIZE(ext_disp_be_dai_link);
  7066. }
  7067. }
  7068. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7069. &mi2s_audio_intf);
  7070. if (rc) {
  7071. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7072. __func__);
  7073. } else {
  7074. if (mi2s_audio_intf) {
  7075. memcpy(msm_sm6150_dai_links + total_links,
  7076. msm_mi2s_be_dai_links,
  7077. sizeof(msm_mi2s_be_dai_links));
  7078. total_links +=
  7079. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7080. }
  7081. }
  7082. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7083. &wcn_btfm_intf);
  7084. if (rc) {
  7085. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7086. __func__);
  7087. } else {
  7088. if (wcn_btfm_intf) {
  7089. memcpy(msm_sm6150_dai_links + total_links,
  7090. msm_wcn_be_dai_links,
  7091. sizeof(msm_wcn_be_dai_links));
  7092. total_links +=
  7093. ARRAY_SIZE(msm_wcn_be_dai_links);
  7094. }
  7095. }
  7096. rc = of_property_read_u32(dev->of_node,
  7097. "qcom,auxpcm-audio-intf",
  7098. &auxpcm_audio_intf);
  7099. if (rc) {
  7100. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7101. __func__);
  7102. } else {
  7103. if (auxpcm_audio_intf) {
  7104. memcpy(msm_sm6150_dai_links + total_links,
  7105. msm_auxpcm_be_dai_links,
  7106. sizeof(msm_auxpcm_be_dai_links));
  7107. total_links +=
  7108. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7109. }
  7110. }
  7111. dailink = msm_sm6150_dai_links;
  7112. } else if (!strcmp(match->data, "stub_codec")) {
  7113. card = &snd_soc_card_stub_msm;
  7114. memcpy(msm_stub_dai_links + total_links,
  7115. msm_stub_fe_dai_links,
  7116. sizeof(msm_stub_fe_dai_links));
  7117. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7118. memcpy(msm_stub_dai_links + total_links,
  7119. msm_stub_be_dai_links,
  7120. sizeof(msm_stub_be_dai_links));
  7121. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7122. dailink = msm_stub_dai_links;
  7123. }
  7124. if (card) {
  7125. card->dai_link = dailink;
  7126. card->num_links = total_links;
  7127. }
  7128. return card;
  7129. }
  7130. static int msm_wsa881x_init(struct snd_soc_component *component)
  7131. {
  7132. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7133. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7134. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7135. SPKR_L_BOOST, SPKR_L_VI};
  7136. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7137. SPKR_R_BOOST, SPKR_R_VI};
  7138. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7139. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7140. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7141. struct msm_asoc_mach_data *pdata;
  7142. struct snd_soc_dapm_context *dapm;
  7143. int ret = 0;
  7144. if (!codec) {
  7145. pr_err("%s codec is NULL\n", __func__);
  7146. return -EINVAL;
  7147. }
  7148. dapm = snd_soc_codec_get_dapm(codec);
  7149. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7150. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7151. __func__, codec->component.name);
  7152. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7153. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7154. &ch_rate[0], &spkleft_port_types[0]);
  7155. if (dapm->component) {
  7156. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7157. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7158. }
  7159. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7160. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7161. __func__, codec->component.name);
  7162. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7163. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7164. &ch_rate[0], &spkright_port_types[0]);
  7165. if (dapm->component) {
  7166. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7167. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7168. }
  7169. } else {
  7170. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7171. codec->component.name);
  7172. ret = -EINVAL;
  7173. goto err;
  7174. }
  7175. pdata = snd_soc_card_get_drvdata(component->card);
  7176. if (pdata && pdata->codec_root)
  7177. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7178. codec);
  7179. err:
  7180. return ret;
  7181. }
  7182. static int msm_aux_codec_init(struct snd_soc_component *component)
  7183. {
  7184. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7185. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7186. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7187. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7188. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7189. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7190. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7191. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7192. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7193. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7194. snd_soc_dapm_sync(dapm);
  7195. return 0;
  7196. }
  7197. static int msm_init_aux_dev(struct platform_device *pdev,
  7198. struct snd_soc_card *card)
  7199. {
  7200. struct device_node *wsa_of_node;
  7201. struct device_node *aux_codec_of_node;
  7202. u32 wsa_max_devs;
  7203. u32 wsa_dev_cnt;
  7204. u32 codec_aux_dev_cnt = 0;
  7205. int i;
  7206. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7207. struct aux_codec_dev_info *aux_cdc_dev_info;
  7208. const char *auxdev_name_prefix[1];
  7209. char *dev_name_str = NULL;
  7210. int found = 0;
  7211. int codecs_found = 0;
  7212. int ret = 0;
  7213. /* Get maximum WSA device count for this platform */
  7214. ret = of_property_read_u32(pdev->dev.of_node,
  7215. "qcom,wsa-max-devs", &wsa_max_devs);
  7216. if (ret) {
  7217. dev_info(&pdev->dev,
  7218. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7219. __func__, pdev->dev.of_node->full_name, ret);
  7220. wsa_max_devs = 0;
  7221. goto codec_aux_dev;
  7222. }
  7223. if (wsa_max_devs == 0) {
  7224. dev_warn(&pdev->dev,
  7225. "%s: Max WSA devices is 0 for this target?\n",
  7226. __func__);
  7227. goto codec_aux_dev;
  7228. }
  7229. /* Get count of WSA device phandles for this platform */
  7230. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7231. "qcom,wsa-devs", NULL);
  7232. if (wsa_dev_cnt == -ENOENT) {
  7233. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7234. __func__);
  7235. goto err;
  7236. } else if (wsa_dev_cnt <= 0) {
  7237. dev_err(&pdev->dev,
  7238. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7239. __func__, wsa_dev_cnt);
  7240. ret = -EINVAL;
  7241. goto err;
  7242. }
  7243. /*
  7244. * Expect total phandles count to be NOT less than maximum possible
  7245. * WSA count. However, if it is less, then assign same value to
  7246. * max count as well.
  7247. */
  7248. if (wsa_dev_cnt < wsa_max_devs) {
  7249. dev_dbg(&pdev->dev,
  7250. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7251. __func__, wsa_max_devs, wsa_dev_cnt);
  7252. wsa_max_devs = wsa_dev_cnt;
  7253. }
  7254. /* Make sure prefix string passed for each WSA device */
  7255. ret = of_property_count_strings(pdev->dev.of_node,
  7256. "qcom,wsa-aux-dev-prefix");
  7257. if (ret != wsa_dev_cnt) {
  7258. dev_err(&pdev->dev,
  7259. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7260. __func__, wsa_dev_cnt, ret);
  7261. ret = -EINVAL;
  7262. goto err;
  7263. }
  7264. /*
  7265. * Alloc mem to store phandle and index info of WSA device, if already
  7266. * registered with ALSA core
  7267. */
  7268. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7269. sizeof(struct msm_wsa881x_dev_info),
  7270. GFP_KERNEL);
  7271. if (!wsa881x_dev_info) {
  7272. ret = -ENOMEM;
  7273. goto err;
  7274. }
  7275. /*
  7276. * search and check whether all WSA devices are already
  7277. * registered with ALSA core or not. If found a node, store
  7278. * the node and the index in a local array of struct for later
  7279. * use.
  7280. */
  7281. for (i = 0; i < wsa_dev_cnt; i++) {
  7282. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7283. "qcom,wsa-devs", i);
  7284. if (unlikely(!wsa_of_node)) {
  7285. /* we should not be here */
  7286. dev_err(&pdev->dev,
  7287. "%s: wsa dev node is not present\n",
  7288. __func__);
  7289. ret = -EINVAL;
  7290. goto err;
  7291. }
  7292. if (soc_find_component(wsa_of_node, NULL)) {
  7293. /* WSA device registered with ALSA core */
  7294. wsa881x_dev_info[found].of_node = wsa_of_node;
  7295. wsa881x_dev_info[found].index = i;
  7296. found++;
  7297. if (found == wsa_max_devs)
  7298. break;
  7299. }
  7300. }
  7301. if (found < wsa_max_devs) {
  7302. dev_dbg(&pdev->dev,
  7303. "%s: failed to find %d components. Found only %d\n",
  7304. __func__, wsa_max_devs, found);
  7305. return -EPROBE_DEFER;
  7306. }
  7307. dev_info(&pdev->dev,
  7308. "%s: found %d wsa881x devices registered with ALSA core\n",
  7309. __func__, found);
  7310. codec_aux_dev:
  7311. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7312. /* Get count of aux codec device phandles for this platform */
  7313. codec_aux_dev_cnt = of_count_phandle_with_args(
  7314. pdev->dev.of_node,
  7315. "qcom,codec-aux-devs", NULL);
  7316. if (codec_aux_dev_cnt == -ENOENT) {
  7317. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7318. __func__);
  7319. goto err;
  7320. } else if (codec_aux_dev_cnt <= 0) {
  7321. dev_err(&pdev->dev,
  7322. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7323. __func__, codec_aux_dev_cnt);
  7324. ret = -EINVAL;
  7325. goto err;
  7326. }
  7327. /*
  7328. * Alloc mem to store phandle and index info of aux codec
  7329. * if already registered with ALSA core
  7330. */
  7331. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7332. sizeof(struct aux_codec_dev_info),
  7333. GFP_KERNEL);
  7334. if (!aux_cdc_dev_info) {
  7335. ret = -ENOMEM;
  7336. goto err;
  7337. }
  7338. /*
  7339. * search and check whether all aux codecs are already
  7340. * registered with ALSA core or not. If found a node, store
  7341. * the node and the index in a local array of struct for later
  7342. * use.
  7343. */
  7344. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7345. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7346. "qcom,codec-aux-devs", i);
  7347. if (unlikely(!aux_codec_of_node)) {
  7348. /* we should not be here */
  7349. dev_err(&pdev->dev,
  7350. "%s: aux codec dev node is not present\n",
  7351. __func__);
  7352. ret = -EINVAL;
  7353. goto err;
  7354. }
  7355. if (soc_find_component(aux_codec_of_node, NULL)) {
  7356. /* AUX codec registered with ALSA core */
  7357. aux_cdc_dev_info[codecs_found].of_node =
  7358. aux_codec_of_node;
  7359. aux_cdc_dev_info[codecs_found].index = i;
  7360. codecs_found++;
  7361. }
  7362. }
  7363. if (codecs_found < codec_aux_dev_cnt) {
  7364. dev_dbg(&pdev->dev,
  7365. "%s: failed to find %d components. Found only %d\n",
  7366. __func__, codec_aux_dev_cnt, codecs_found);
  7367. return -EPROBE_DEFER;
  7368. }
  7369. dev_info(&pdev->dev,
  7370. "%s: found %d AUX codecs registered with ALSA core\n",
  7371. __func__, codecs_found);
  7372. }
  7373. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7374. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7375. /* Alloc array of AUX devs struct */
  7376. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7377. sizeof(struct snd_soc_aux_dev),
  7378. GFP_KERNEL);
  7379. if (!msm_aux_dev) {
  7380. ret = -ENOMEM;
  7381. goto err;
  7382. }
  7383. /* Alloc array of codec conf struct */
  7384. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7385. sizeof(struct snd_soc_codec_conf),
  7386. GFP_KERNEL);
  7387. if (!msm_codec_conf) {
  7388. ret = -ENOMEM;
  7389. goto err;
  7390. }
  7391. for (i = 0; i < wsa_max_devs; i++) {
  7392. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7393. GFP_KERNEL);
  7394. if (!dev_name_str) {
  7395. ret = -ENOMEM;
  7396. goto err;
  7397. }
  7398. ret = of_property_read_string_index(pdev->dev.of_node,
  7399. "qcom,wsa-aux-dev-prefix",
  7400. wsa881x_dev_info[i].index,
  7401. auxdev_name_prefix);
  7402. if (ret) {
  7403. dev_err(&pdev->dev,
  7404. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7405. __func__, ret);
  7406. ret = -EINVAL;
  7407. goto err;
  7408. }
  7409. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7410. msm_aux_dev[i].name = dev_name_str;
  7411. msm_aux_dev[i].codec_name = NULL;
  7412. msm_aux_dev[i].codec_of_node =
  7413. wsa881x_dev_info[i].of_node;
  7414. msm_aux_dev[i].init = msm_wsa881x_init;
  7415. msm_codec_conf[i].dev_name = NULL;
  7416. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7417. msm_codec_conf[i].of_node =
  7418. wsa881x_dev_info[i].of_node;
  7419. }
  7420. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7421. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7422. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7423. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7424. aux_cdc_dev_info[i].of_node;
  7425. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7426. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7427. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7428. NULL;
  7429. msm_codec_conf[wsa_max_devs + i].of_node =
  7430. aux_cdc_dev_info[i].of_node;
  7431. }
  7432. card->codec_conf = msm_codec_conf;
  7433. card->aux_dev = msm_aux_dev;
  7434. err:
  7435. return ret;
  7436. }
  7437. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7438. {
  7439. int count;
  7440. u32 mi2s_master_slave[MI2S_MAX];
  7441. int ret;
  7442. for (count = 0; count < MI2S_MAX; count++) {
  7443. mutex_init(&mi2s_intf_conf[count].lock);
  7444. mi2s_intf_conf[count].ref_cnt = 0;
  7445. }
  7446. ret = of_property_read_u32_array(pdev->dev.of_node,
  7447. "qcom,msm-mi2s-master",
  7448. mi2s_master_slave, MI2S_MAX);
  7449. if (ret) {
  7450. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7451. __func__);
  7452. } else {
  7453. for (count = 0; count < MI2S_MAX; count++) {
  7454. mi2s_intf_conf[count].msm_is_mi2s_master =
  7455. mi2s_master_slave[count];
  7456. }
  7457. }
  7458. }
  7459. static void msm_i2s_auxpcm_deinit(void)
  7460. {
  7461. int count;
  7462. for (count = 0; count < MI2S_MAX; count++) {
  7463. mutex_destroy(&mi2s_intf_conf[count].lock);
  7464. mi2s_intf_conf[count].ref_cnt = 0;
  7465. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7466. }
  7467. }
  7468. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7469. {
  7470. struct snd_soc_card *card;
  7471. struct msm_asoc_mach_data *pdata;
  7472. const char *mbhc_audio_jack_type = NULL;
  7473. int ret;
  7474. if (!pdev->dev.of_node) {
  7475. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7476. return -EINVAL;
  7477. }
  7478. pdata = devm_kzalloc(&pdev->dev,
  7479. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7480. if (!pdata)
  7481. return -ENOMEM;
  7482. card = populate_snd_card_dailinks(&pdev->dev);
  7483. if (!card) {
  7484. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7485. ret = -EINVAL;
  7486. goto err;
  7487. }
  7488. card->dev = &pdev->dev;
  7489. platform_set_drvdata(pdev, card);
  7490. snd_soc_card_set_drvdata(card, pdata);
  7491. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7492. if (ret) {
  7493. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7494. ret);
  7495. goto err;
  7496. }
  7497. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7498. if (ret) {
  7499. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7500. ret);
  7501. goto err;
  7502. }
  7503. ret = msm_populate_dai_link_component_of_node(card);
  7504. if (ret) {
  7505. ret = -EPROBE_DEFER;
  7506. goto err;
  7507. }
  7508. ret = msm_init_aux_dev(pdev, card);
  7509. if (ret)
  7510. goto err;
  7511. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7512. if (ret == -EPROBE_DEFER) {
  7513. if (codec_reg_done)
  7514. ret = -EINVAL;
  7515. goto err;
  7516. } else if (ret) {
  7517. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7518. ret);
  7519. goto err;
  7520. }
  7521. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7522. spdev = pdev;
  7523. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7524. "qcom,hph-en1-gpio", 0);
  7525. if (!pdata->hph_en1_gpio_p) {
  7526. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7527. "qcom,hph-en1-gpio",
  7528. pdev->dev.of_node->full_name);
  7529. }
  7530. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7531. "qcom,hph-en0-gpio", 0);
  7532. if (!pdata->hph_en0_gpio_p) {
  7533. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7534. "qcom,hph-en0-gpio",
  7535. pdev->dev.of_node->full_name);
  7536. }
  7537. ret = of_property_read_string(pdev->dev.of_node,
  7538. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7539. if (ret) {
  7540. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7541. "qcom,mbhc-audio-jack-type",
  7542. pdev->dev.of_node->full_name);
  7543. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7544. } else {
  7545. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7546. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7547. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7548. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7549. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7550. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7551. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7552. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7553. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7554. } else {
  7555. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7556. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7557. }
  7558. }
  7559. /*
  7560. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7561. * entry is not found in DT file as some targets do not support
  7562. * US-Euro detection
  7563. */
  7564. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7565. "qcom,us-euro-gpios", 0);
  7566. if (!pdata->us_euro_gpio_p) {
  7567. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7568. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7569. } else {
  7570. dev_dbg(&pdev->dev, "%s detected\n",
  7571. "qcom,us-euro-gpios");
  7572. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7573. }
  7574. /* Parse pinctrl info from devicetree */
  7575. ret = msm_get_pinctrl(pdev);
  7576. if (!ret) {
  7577. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7578. } else {
  7579. dev_dbg(&pdev->dev,
  7580. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7581. __func__, ret);
  7582. ret = 0;
  7583. }
  7584. msm_i2s_auxpcm_init(pdev);
  7585. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7586. is_initial_boot = true;
  7587. ret = audio_notifier_register("sm6150",
  7588. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7589. &service_nb);
  7590. if (ret < 0)
  7591. pr_err("%s: Audio notifier register failed ret = %d\n",
  7592. __func__, ret);
  7593. } else {
  7594. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7595. "qcom,cdc-dmic01-gpios",
  7596. 0);
  7597. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7598. "qcom,cdc-dmic23-gpios",
  7599. 0);
  7600. }
  7601. err:
  7602. return ret;
  7603. }
  7604. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7605. {
  7606. audio_notifier_deregister("sm6150");
  7607. msm_i2s_auxpcm_deinit();
  7608. return 0;
  7609. }
  7610. static struct platform_driver sm6150_asoc_machine_driver = {
  7611. .driver = {
  7612. .name = DRV_NAME,
  7613. .owner = THIS_MODULE,
  7614. .pm = &snd_soc_pm_ops,
  7615. .of_match_table = sm6150_asoc_machine_of_match,
  7616. },
  7617. .probe = msm_asoc_machine_probe,
  7618. .remove = msm_asoc_machine_remove,
  7619. };
  7620. module_platform_driver(sm6150_asoc_machine_driver);
  7621. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7622. MODULE_LICENSE("GPL v2");
  7623. MODULE_ALIAS("platform:" DRV_NAME);
  7624. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);