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android_kernel_...
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codecs
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wsa884x
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wsa884x-reg-shifts.h

wsa884x-reg-shifts.h 12 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef WSA884X_REG_SHIFTS_H
    7. 

  7. #define WSA884X_REG_SHIFTS_H
    8. 

  8. #include <linux/regmap.h>
    9. 

  9. #include <linux/device.h>
    10. 

  10. #include "wsa884x-registers.h"
    11. 

  11. 

  12. /*
    13. 

  13.  * Use in conjunction with wsa884x-reg-masks.c for field values.
    14. 

  14.  * field_value = (register_value & field_mask) >> field_shift
    15. 

  15.  */
    16. 

  16. 

  17. #define FIELD_SHIFT(register_name, field_name) \
    18. 

  18. 	WSA884X_##register_name##_##field_name##_SHIFT
    19. 

  19. 

  20. /* WSA884X_VSENSE1 Fields: */
    21. 

  21. #define WSA884X_VSENSE1_GAIN_VSENSE_FE_SHIFT                              0x05
    22. 

  22. #define WSA884X_VSENSE1_VSENSE_AMP_IQ_CTL_1_SHIFT                         0x04
    23. 

  23. #define WSA884X_VSENSE1_IDLE_MODE_CTL_SHIFT                               0x02
    24. 

  24. #define WSA884X_VSENSE1_VOCM_AMP_CTL_SHIFT                                0x00
    25. 

  25. /* WSA884X_ISENSE2 Fields: */
    26. 

  26. #define WSA884X_ISENSE2_ISENSE_GAIN_CTL_SHIFT                             0x05
    27. 

  27. #define WSA884X_ISENSE2_SUMAMP_IQ_CTL_SHIFT                               0x04
    28. 

  28. #define WSA884X_ISENSE2_SPARE_BITS_3_0_SHIFT                              0x00
    29. 

  29. /* WSA884X_ADC_2 Fields: */
    30. 

  30. #define WSA884X_ADC_2_ATEST_SEL_CAL_REF_SHIFT                             0x07
    31. 

  31. #define WSA884X_ADC_2_ISNS_LOAD_STORED_SHIFT                              0x06
    32. 

  32. #define WSA884X_ADC_2_EN_DET_SHIFT                                        0x05
    33. 

  33. #define WSA884X_ADC_2_EN_ATEST_REF_SHIFT                                  0x04
    34. 

  34. #define WSA884X_ADC_2_EN_ATEST_INT_SHIFT                                  0x01
    35. 

  35. #define WSA884X_ADC_2_D_ADC_REG_EN_SHIFT                                  0x00
    36. 

  36. /* WSA884X_ADC_7 Fields: */
    37. 

  37. #define WSA884X_ADC_7_CLAMPON_SHIFT                                       0x07
    38. 

  38. #define WSA884X_ADC_7_CAL_LOOP_TRIM_SHIFT                                 0x04
    39. 

  39. #define WSA884X_ADC_7_REG_TRIM_EN_SHIFT                                   0x03
    40. 

  40. #define WSA884X_ADC_7_EN_AZ_REG_SHIFT                                     0x02
    41. 

  41. #define WSA884X_ADC_7_EN_SAR_REG_SHIFT                                    0x01
    42. 

  42. #define WSA884X_ADC_7_EN_SW_CURRENT_REG_SHIFT                             0x00
    43. 

  43. /* WSA884X_BOP_DEGLITCH_CTL Fields: */
    44. 

  44. #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_SETTING_SHIFT               0x01
    45. 

  45. #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_EN_SHIFT                    0x00
    46. 

  46. /* WSA884X_CDC_SPK_DSM_A2_0 Fields: */
    47. 

  47. #define WSA884X_CDC_SPK_DSM_A2_0_COEF_A2_SHIFT                            0x00
    48. 

  48. /* WSA884X_CDC_SPK_DSM_A2_1 Fields: */
    49. 

  49. #define WSA884X_CDC_SPK_DSM_A2_1_COEF_A2_SHIFT                            0x00
    50. 

  50. /* WSA884X_CDC_SPK_DSM_A3_0 Fields: */
    51. 

  51. #define WSA884X_CDC_SPK_DSM_A3_0_COEF_A3_SHIFT                            0x00
    52. 

  52. /* WSA884X_CDC_SPK_DSM_A3_1 Fields: */
    53. 

  53. #define WSA884X_CDC_SPK_DSM_A3_1_COEF_A3_SHIFT                            0x00
    54. 

  54. /* WSA884X_CDC_SPK_DSM_A4_0 Fields: */
    55. 

  55. #define WSA884X_CDC_SPK_DSM_A4_0_COEF_A4_SHIFT                            0x00
    56. 

  56. /* WSA884X_CDC_SPK_DSM_A5_0 Fields: */
    57. 

  57. #define WSA884X_CDC_SPK_DSM_A5_0_COEF_A5_SHIFT                            0x00
    58. 

  58. /* WSA884X_CDC_SPK_DSM_A6_0 Fields: */
    59. 

  59. #define WSA884X_CDC_SPK_DSM_A6_0_COEF_A6_SHIFT                            0x00
    60. 

  60. /* WSA884X_CDC_SPK_DSM_A7_0 Fields: */
    61. 

  61. #define WSA884X_CDC_SPK_DSM_A7_0_COEF_A7_SHIFT                            0x00
    62. 

  62. /* WSA884X_CDC_SPK_DSM_C_0 Fields: */
    63. 

  63. #define WSA884X_CDC_SPK_DSM_C_0_COEF_C3_SHIFT                             0x04
    64. 

  64. #define WSA884X_CDC_SPK_DSM_C_0_COEF_C2_SHIFT                             0x00
    65. 

  65. /* WSA884X_CDC_SPK_DSM_C_2 Fields: */
    66. 

  66. #define WSA884X_CDC_SPK_DSM_C_2_COEF_C7_SHIFT                             0x04
    67. 

  67. #define WSA884X_CDC_SPK_DSM_C_2_COEF_C6_SHIFT                             0x00
    68. 

  68. /* WSA884X_CDC_SPK_DSM_C_3 Fields: */
    69. 

  69. #define WSA884X_CDC_SPK_DSM_C_3_COEF_C7_SHIFT                             0x00
    70. 

  70. /* WSA884X_CDC_SPK_DSM_R1 Fields: */
    71. 

  71. #define WSA884X_CDC_SPK_DSM_R1_SAT_LIMIT_R1_SHIFT                         0x00
    72. 

  72. /* WSA884X_CDC_SPK_DSM_R2 Fields: */
    73. 

  73. #define WSA884X_CDC_SPK_DSM_R2_SAT_LIMIT_R2_SHIFT                         0x00
    74. 

  74. /* WSA884X_CDC_SPK_DSM_R3 Fields: */
    75. 

  75. #define WSA884X_CDC_SPK_DSM_R3_SAT_LIMIT_R3_SHIFT                         0x00
    76. 

  76. /* WSA884X_CDC_SPK_DSM_R4 Fields: */
    77. 

  77. #define WSA884X_CDC_SPK_DSM_R4_SAT_LIMIT_R4_SHIFT                         0x00
    78. 

  78. /* WSA884X_CDC_SPK_DSM_R5 Fields: */
    79. 

  79. #define WSA884X_CDC_SPK_DSM_R5_SAT_LIMIT_R5_SHIFT                         0x00
    80. 

  80. /* WSA884X_CDC_SPK_DSM_R6 Fields: */
    81. 

  81. #define WSA884X_CDC_SPK_DSM_R6_SAT_LIMIT_R6_SHIFT                         0x00
    82. 

  82. /* WSA884X_CDC_SPK_DSM_R7 Fields: */
    83. 

  83. #define WSA884X_CDC_SPK_DSM_R7_SAT_LIMIT_R7_SHIFT                         0x00
    84. 

  84. /* WSA884X_DRE_CTL_0 Fields: */
    85. 

  85. #define WSA884X_DRE_CTL_0_PROG_DELAY_SHIFT                                0x04
    86. 

  86. #define WSA884X_DRE_CTL_0_OFFSET_SHIFT                                    0x00
    87. 

  87. /* WSA884X_GAIN_RAMPING_MIN Fields: */
    88. 

  88. #define WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_SHIFT                           0x00
    89. 

  89. /* WSA884X_CLSH_SOFT_MAX Fields: */
    90. 

  90. #define WSA884X_CLSH_SOFT_MAX_SOFT_MAX_SHIFT                              0x00
    91. 

  91. /* WSA884X_CLSH_VTH1 Fields: */
    92. 

  92. #define WSA884X_CLSH_VTH1_CLSH_VTH1_SHIFT                                 0x00
    93. 

  93. /* WSA884X_CLSH_VTH10 Fields: */
    94. 

  94. #define WSA884X_CLSH_VTH10_CLSH_VTH10_SHIFT                               0x00
    95. 

  95. /* WSA884X_CLSH_VTH11 Fields: */
    96. 

  96. #define WSA884X_CLSH_VTH11_CLSH_VTH11_SHIFT                               0x00
    97. 

  97. /* WSA884X_CLSH_VTH12 Fields: */
    98. 

  98. #define WSA884X_CLSH_VTH12_CLSH_VTH12_SHIFT                               0x00
    99. 

  99. /* WSA884X_CLSH_VTH13 Fields: */
    100. 

  100. #define WSA884X_CLSH_VTH13_CLSH_VTH13_SHIFT                               0x00
    101. 

  101. /* WSA884X_CLSH_VTH14 Fields: */
    102. 

  102. #define WSA884X_CLSH_VTH14_CLSH_VTH14_SHIFT                               0x00
    103. 

  103. /* WSA884X_CLSH_VTH15 Fields: */
    104. 

  104. #define WSA884X_CLSH_VTH15_CLSH_VTH15_SHIFT                               0x00
    105. 

  105. /* WSA884X_ANA_WO_CTL_0 Fields: */
    106. 

  106. #define WSA884X_ANA_WO_CTL_0_VPHX_SYS_EN_SHIFT                            0x06
    107. 

  107. #define WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_SHIFT                            0x02
    108. 

  108. #define WSA884X_ANA_WO_CTL_0_PA_MIN_GAIN_BYP_SHIFT                        0x01
    109. 

  109. #define WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_SHIFT                        0x00
    110. 

  110. /* WSA884X_ANA_WO_CTL_1 Fields: */
    111. 

  111. #define WSA884X_ANA_WO_CTL_1_BOOST_SHARE_EN_SHIFT                         0x03
    112. 

  112. #define WSA884X_ANA_WO_CTL_1_EXT_VDDSPK_EN_SHIFT                          0x00
    113. 

  113. /* WSA884X_DRE_CTL_1 Fields: */
    114. 

  114. #define WSA884X_DRE_CTL_1_CSR_GAIN_SHIFT                                  0x01
    115. 

  115. #define WSA884X_DRE_CTL_1_CSR_GAIN_EN_SHIFT                               0x00
    116. 

  116. /* WSA884X_VBAT_THRM_FLT_CTL Fields: */
    117. 

  117. #define WSA884X_VBAT_THRM_FLT_CTL_THRM_COEF_SEL_SHIFT                     0x05
    118. 

  118. #define WSA884X_VBAT_THRM_FLT_CTL_THRM_FLT_EN_SHIFT                       0x04
    119. 

  119. #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_SHIFT                     0x01
    120. 

  120. #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_FLT_EN_SHIFT                       0x00
    121. 

  121. /* WSA884X_PDM_WD_CTL Fields: */
    122. 

  122. #define WSA884X_PDM_WD_CTL_HOLD_OFF_SHIFT                                 0x02
    123. 

  123. #define WSA884X_PDM_WD_CTL_TIME_OUT_SEL_SHIFT                             0x01
    124. 

  124. #define WSA884X_PDM_WD_CTL_PDM_WD_EN_SHIFT                                0x00
    125. 

  125. /* WSA884X_PA_FSM_BYP_CTL Fields: */
    126. 

  126. #define WSA884X_PA_FSM_BYP_CTL_PA_FSM_BYP_SHIFT                           0x00
    127. 

  127. /* WSA884X_TADC_VALUE_CTL Fields: */
    128. 

  128. #define WSA884X_TADC_VALUE_CTL_VBAT_VALUE_RD_EN_SHIFT                     0x01
    129. 

  129. #define WSA884X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_SHIFT                     0x00
    130. 

  130. /* WSA884X_CDC_PATH_MODE Fields: */
    131. 

  131. #define WSA884X_CDC_PATH_MODE_RXD_MODE_SHIFT                              0x01
    132. 

  132. #define WSA884X_CDC_PATH_MODE_TXD_MODE_SHIFT                              0x00
    133. 

  133. /* WSA884X_PA_FSM_BYP0 Fields: */
    134. 

  134. #define WSA884X_PA_FSM_BYP0_TSADC_EN_SHIFT                                0x07
    135. 

  135. #define WSA884X_PA_FSM_BYP0_SPKR_PROT_EN_SHIFT                            0x06
    136. 

  136. #define WSA884X_PA_FSM_BYP0_D_UNMUTE_SHIFT                                0x05
    137. 

  137. #define WSA884X_PA_FSM_BYP0_PA_EN_SHIFT                                   0x04
    138. 

  138. #define WSA884X_PA_FSM_BYP0_BOOST_EN_SHIFT                                0x03
    139. 

  139. #define WSA884X_PA_FSM_BYP0_BG_EN_SHIFT                                   0x02
    140. 

  140. #define WSA884X_PA_FSM_BYP0_CLK_WD_EN_SHIFT                               0x01
    141. 

  141. #define WSA884X_PA_FSM_BYP0_DC_CAL_EN_SHIFT                               0x00
    142. 

  142. /* WSA884X_PA_FSM_BYP1 Fields: */
    143. 

  143. #define WSA884X_PA_FSM_BYP1_NG_MODE_SHIFT                                 0x06
    144. 

  144. #define WSA884X_PA_FSM_BYP1_PWRSAV_CTL_SHIFT                              0x05
    145. 

  145. #define WSA884X_PA_FSM_BYP1_RAMP_DOWN_SHIFT                               0x04
    146. 

  146. #define WSA884X_PA_FSM_BYP1_RAMP_UP_SHIFT                                 0x03
    147. 

  147. #define WSA884X_PA_FSM_BYP1_BLEEDER_EN_SHIFT                              0x02
    148. 

  148. #define WSA884X_PA_FSM_BYP1_PA_MAIN_EN_SHIFT                              0x01
    149. 

  149. #define WSA884X_PA_FSM_BYP1_PA_AUX_EN_SHIFT                               0x00
    150. 

  150. /* WSA884X_PA_FSM_EN Fields: */
    151. 

  151. #define WSA884X_PA_FSM_EN_GLOBAL_PA_EN_SHIFT                              0x00
    152. 

  152. /* WSA884X_OCP_CTL Fields: */
    153. 

  153. #define WSA884X_OCP_CTL_OCP_EN_SHIFT                                      0x07
    154. 

  154. #define WSA884X_OCP_CTL_OCP_CURR_LIMIT_SHIFT                              0x04
    155. 

  155. #define WSA884X_OCP_CTL_GLITCH_FILTER_SHIFT                               0x02
    156. 

  156. #define WSA884X_OCP_CTL_OCP_P_HS_DLY_CTL_SHIFT                            0x00
    157. 

  157. /* WSA884X_ILIM_CTRL1 Fields: */
    158. 

  158. #define WSA884X_ILIM_CTRL1_EN_AUTO_MAXD_SEL_SHIFT                         0x07
    159. 

  159. #define WSA884X_ILIM_CTRL1_EN_ILIM_SW_CLH_SHIFT                           0x06
    160. 

  160. #define WSA884X_ILIM_CTRL1_ILIM_OFFSET_CLH_SHIFT                          0x03
    161. 

  161. #define WSA884X_ILIM_CTRL1_ILIM_OFFSET_PB_SHIFT                           0x00
    162. 

  162. /* WSA884X_CLSH_CTL_0 Fields: */
    163. 

  163. #define WSA884X_CLSH_CTL_0_CSR_GAIN_EN_SHIFT                              0x07
    164. 

  164. #define WSA884X_CLSH_CTL_0_DLY_CODE_SHIFT                                 0x04
    165. 

  165. #define WSA884X_CLSH_CTL_0_DLY_RST_SHIFT                                  0x03
    166. 

  166. #define WSA884X_CLSH_CTL_0_DLY_EN_SHIFT                                   0x02
    167. 

  167. #define WSA884X_CLSH_CTL_0_INPUT_EN_SHIFT                                 0x01
    168. 

  168. #define WSA884X_CLSH_CTL_0_CLSH_EN_SHIFT                                  0x00
    169. 

  169. /* WSA884X_STB_CTRL1 Fields: */
    170. 

  170. #define WSA884X_STB_CTRL1_SLOPE_COMP_CURRENT_SHIFT                        0x03
    171. 

  171. #define WSA884X_STB_CTRL1_VOUT_FS_SHIFT                                   0x00
    172. 

  172. /* WSA884X_OTP_REG_38 Fields: */
    173. 

  173. #define WSA884X_OTP_REG_38_RESERVER_SHIFT                                 0x04
    174. 

  174. #define WSA884X_OTP_REG_38_BST_CFG_SEL_SHIFT                              0x03
    175. 

  175. #define WSA884X_OTP_REG_38_BOOST_ILIM_TUNE_SHIFT                          0x00
    176. 

  176. /* WSA884X_OTP_REG_40 Fields: */
    177. 

  177. #define WSA884X_OTP_REG_40_SPARE_TYPE2_SHIFT                              0x06
    178. 

  178. #define WSA884X_OTP_REG_40_ISENSE_RESCAL_SHIFT                            0x02
    179. 

  179. #define WSA884X_OTP_REG_40_ATE_BOOST_RDSON_TEST_SHIFT                     0x01
    180. 

  180. #define WSA884X_OTP_REG_40_ATE_CLASSD_RDSON_TEST_SHIFT                    0x00
    181. 

  181. /* WSA884X_CURRENT_LIMIT Fields: */
    182. 

  182. #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_OVRD_EN_SHIFT                 0x07
    183. 

  183. #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_SHIFT                         0x02
    184. 

  184. #define WSA884X_CURRENT_LIMIT_CLK_PHASE_SHIFT                             0x00
    185. 

  185. /* WSA884X_PWM_CLK_CTL Fields: */
    186. 

  186. #define WSA884X_PWM_CLK_CTL_VCMO_INT1_IDLE_MODE_OVRT_SHIFT                0x07
    187. 

  187. #define WSA884X_PWM_CLK_CTL_REG_MCLK_DIV_RATIO_SHIFT                      0x06
    188. 

  188. #define WSA884X_PWM_CLK_CTL_PWM_DEGLITCH_CLK_DELAY_CTRL_SHIFT             0x04
    189. 

  189. #define WSA884X_PWM_CLK_CTL_PWM_CLK_FREQ_SEL_SHIFT                        0x03
    190. 

  190. #define WSA884X_PWM_CLK_CTL_PWM_CLK_DIV_RATIO_SHIFT                       0x01
    191. 

  191. #define WSA884X_PWM_CLK_CTL_PWM_CLK_DIV_BYPASS_SHIFT                      0x00
    192. 

  192. /* WSA884X_CKWD_CTL_1 Fields: */
    193. 

  193. #define WSA884X_CKWD_CTL_1_SPARE_BITS_7_6_SHIFT                           0x06
    194. 

  194. #define WSA884X_CKWD_CTL_1_VPP_SW_CTL_SHIFT                               0x05
    195. 

  195. #define WSA884X_CKWD_CTL_1_CKWD_VCOMP_VREF_SEL_SHIFT                      0x00
    196. 

  196. #endif /* WSA884X_REG_SHIFTS_H */
    197.