dp_rx.c 68 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef ATH_RX_PRI_SAVE
  32. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  33. (qdf_nbuf_set_priority(_nbuf, _tid))
  34. #else
  35. #define DP_RX_TID_SAVE(_nbuf, _tid)
  36. #endif
  37. #ifdef CONFIG_MCL
  38. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  39. {
  40. if (vdev->opmode != wlan_op_mode_sta)
  41. return true;
  42. else
  43. return false;
  44. }
  45. #else
  46. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  47. {
  48. return vdev->ap_bridge_enabled;
  49. }
  50. #endif
  51. /*
  52. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  53. *
  54. * @soc: core txrx main context
  55. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  56. * @ring_desc: opaque pointer to the RX ring descriptor
  57. * @rx_desc: host rs descriptor
  58. *
  59. * Return: void
  60. */
  61. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  62. void *ring_desc, struct dp_rx_desc *rx_desc)
  63. {
  64. void *hal_soc = soc->hal_soc;
  65. dp_rx_desc_dump(rx_desc);
  66. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  67. hal_srng_dump_ring(hal_soc, hal_ring);
  68. qdf_assert_always(0);
  69. }
  70. /*
  71. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  72. * called during dp rx initialization
  73. * and at the end of dp_rx_process.
  74. *
  75. * @soc: core txrx main context
  76. * @mac_id: mac_id which is one of 3 mac_ids
  77. * @dp_rxdma_srng: dp rxdma circular ring
  78. * @rx_desc_pool: Pointer to free Rx descriptor pool
  79. * @num_req_buffers: number of buffer to be replenished
  80. * @desc_list: list of descs if called from dp_rx_process
  81. * or NULL during dp rx initialization or out of buffer
  82. * interrupt.
  83. * @tail: tail of descs list
  84. * Return: return success or failure
  85. */
  86. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  87. struct dp_srng *dp_rxdma_srng,
  88. struct rx_desc_pool *rx_desc_pool,
  89. uint32_t num_req_buffers,
  90. union dp_rx_desc_list_elem_t **desc_list,
  91. union dp_rx_desc_list_elem_t **tail)
  92. {
  93. uint32_t num_alloc_desc;
  94. uint16_t num_desc_to_free = 0;
  95. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  96. uint32_t num_entries_avail;
  97. uint32_t count;
  98. int sync_hw_ptr = 1;
  99. qdf_dma_addr_t paddr;
  100. qdf_nbuf_t rx_netbuf;
  101. void *rxdma_ring_entry;
  102. union dp_rx_desc_list_elem_t *next;
  103. QDF_STATUS ret;
  104. void *rxdma_srng;
  105. rxdma_srng = dp_rxdma_srng->hal_srng;
  106. if (!rxdma_srng) {
  107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  108. "rxdma srng not initialized");
  109. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  110. return QDF_STATUS_E_FAILURE;
  111. }
  112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  113. "requested %d buffers for replenish", num_req_buffers);
  114. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  115. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  116. rxdma_srng,
  117. sync_hw_ptr);
  118. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  119. "no of available entries in rxdma ring: %d",
  120. num_entries_avail);
  121. if (!(*desc_list) && (num_entries_avail >
  122. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  123. num_req_buffers = num_entries_avail;
  124. } else if (num_entries_avail < num_req_buffers) {
  125. num_desc_to_free = num_req_buffers - num_entries_avail;
  126. num_req_buffers = num_entries_avail;
  127. }
  128. if (qdf_unlikely(!num_req_buffers)) {
  129. num_desc_to_free = num_req_buffers;
  130. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  131. goto free_descs;
  132. }
  133. /*
  134. * if desc_list is NULL, allocate the descs from freelist
  135. */
  136. if (!(*desc_list)) {
  137. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  138. rx_desc_pool,
  139. num_req_buffers,
  140. desc_list,
  141. tail);
  142. if (!num_alloc_desc) {
  143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  144. "no free rx_descs in freelist");
  145. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  146. num_req_buffers);
  147. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  148. return QDF_STATUS_E_NOMEM;
  149. }
  150. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  151. "%d rx desc allocated", num_alloc_desc);
  152. num_req_buffers = num_alloc_desc;
  153. }
  154. count = 0;
  155. while (count < num_req_buffers) {
  156. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  157. RX_BUFFER_SIZE,
  158. RX_BUFFER_RESERVATION,
  159. RX_BUFFER_ALIGNMENT,
  160. FALSE);
  161. if (qdf_unlikely(!rx_netbuf)) {
  162. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  163. continue;
  164. }
  165. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  166. QDF_DMA_FROM_DEVICE);
  167. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  168. qdf_nbuf_free(rx_netbuf);
  169. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  170. continue;
  171. }
  172. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  173. /*
  174. * check if the physical address of nbuf->data is
  175. * less then 0x50000000 then free the nbuf and try
  176. * allocating new nbuf. We can try for 100 times.
  177. * this is a temp WAR till we fix it properly.
  178. */
  179. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  180. if (ret == QDF_STATUS_E_FAILURE) {
  181. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  182. break;
  183. }
  184. count++;
  185. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  186. rxdma_srng);
  187. qdf_assert_always(rxdma_ring_entry);
  188. next = (*desc_list)->next;
  189. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  190. /* rx_desc.in_use should be zero at this time*/
  191. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  192. (*desc_list)->rx_desc.in_use = 1;
  193. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  194. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  195. (unsigned long long)paddr,
  196. (*desc_list)->rx_desc.cookie);
  197. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  198. (*desc_list)->rx_desc.cookie,
  199. rx_desc_pool->owner);
  200. *desc_list = next;
  201. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  202. }
  203. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  204. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  205. num_req_buffers, num_desc_to_free);
  206. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  207. (RX_BUFFER_SIZE * num_req_buffers));
  208. free_descs:
  209. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  210. /*
  211. * add any available free desc back to the free list
  212. */
  213. if (*desc_list)
  214. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  215. mac_id, rx_desc_pool);
  216. return QDF_STATUS_SUCCESS;
  217. }
  218. /*
  219. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  220. * pkts to RAW mode simulation to
  221. * decapsulate the pkt.
  222. *
  223. * @vdev: vdev on which RAW mode is enabled
  224. * @nbuf_list: list of RAW pkts to process
  225. * @peer: peer object from which the pkt is rx
  226. *
  227. * Return: void
  228. */
  229. void
  230. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  231. struct dp_peer *peer)
  232. {
  233. qdf_nbuf_t deliver_list_head = NULL;
  234. qdf_nbuf_t deliver_list_tail = NULL;
  235. qdf_nbuf_t nbuf;
  236. nbuf = nbuf_list;
  237. while (nbuf) {
  238. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  239. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  240. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  241. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  242. /*
  243. * reset the chfrag_start and chfrag_end bits in nbuf cb
  244. * as this is a non-amsdu pkt and RAW mode simulation expects
  245. * these bit s to be 0 for non-amsdu pkt.
  246. */
  247. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  248. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  249. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  250. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  251. }
  252. nbuf = next;
  253. }
  254. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  255. &deliver_list_tail, (struct cdp_peer*) peer);
  256. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  257. }
  258. #ifdef DP_LFR
  259. /*
  260. * In case of LFR, data of a new peer might be sent up
  261. * even before peer is added.
  262. */
  263. static inline struct dp_vdev *
  264. dp_get_vdev_from_peer(struct dp_soc *soc,
  265. uint16_t peer_id,
  266. struct dp_peer *peer,
  267. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  268. {
  269. struct dp_vdev *vdev;
  270. uint8_t vdev_id;
  271. if (unlikely(!peer)) {
  272. if (peer_id != HTT_INVALID_PEER) {
  273. vdev_id = DP_PEER_METADATA_ID_GET(
  274. mpdu_desc_info.peer_meta_data);
  275. QDF_TRACE(QDF_MODULE_ID_DP,
  276. QDF_TRACE_LEVEL_DEBUG,
  277. FL("PeerID %d not found use vdevID %d"),
  278. peer_id, vdev_id);
  279. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  280. vdev_id);
  281. } else {
  282. QDF_TRACE(QDF_MODULE_ID_DP,
  283. QDF_TRACE_LEVEL_DEBUG,
  284. FL("Invalid PeerID %d"),
  285. peer_id);
  286. return NULL;
  287. }
  288. } else {
  289. vdev = peer->vdev;
  290. }
  291. return vdev;
  292. }
  293. #else
  294. static inline struct dp_vdev *
  295. dp_get_vdev_from_peer(struct dp_soc *soc,
  296. uint16_t peer_id,
  297. struct dp_peer *peer,
  298. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  299. {
  300. if (unlikely(!peer)) {
  301. QDF_TRACE(QDF_MODULE_ID_DP,
  302. QDF_TRACE_LEVEL_DEBUG,
  303. FL("Peer not found for peerID %d"),
  304. peer_id);
  305. return NULL;
  306. } else {
  307. return peer->vdev;
  308. }
  309. }
  310. #endif
  311. /**
  312. * dp_rx_da_learn() - Add AST entry based on DA lookup
  313. * This is a WAR for HK 1.0 and will
  314. * be removed in HK 2.0
  315. *
  316. * @soc: core txrx main context
  317. * @rx_tlv_hdr : start address of rx tlvs
  318. * @ta_peer : Transmitter peer entry
  319. * @nbuf : nbuf to retrieve destination mac for which AST will be added
  320. *
  321. */
  322. #ifdef FEATURE_WDS
  323. static void
  324. dp_rx_da_learn(struct dp_soc *soc,
  325. uint8_t *rx_tlv_hdr,
  326. struct dp_peer *ta_peer,
  327. qdf_nbuf_t nbuf)
  328. {
  329. /* For HKv2 DA port learing is not needed */
  330. if (qdf_likely(soc->ast_override_support))
  331. return;
  332. if (qdf_unlikely(!ta_peer))
  333. return;
  334. if (qdf_unlikely(ta_peer->vdev->opmode != wlan_op_mode_ap))
  335. return;
  336. if (!soc->da_war_enabled)
  337. return;
  338. if (qdf_unlikely(!qdf_nbuf_is_da_valid(nbuf) &&
  339. !qdf_nbuf_is_da_mcbc(nbuf))) {
  340. dp_peer_add_ast(soc,
  341. ta_peer,
  342. qdf_nbuf_data(nbuf),
  343. CDP_TXRX_AST_TYPE_DA,
  344. IEEE80211_NODE_F_WDS_HM);
  345. }
  346. }
  347. #else
  348. static void
  349. dp_rx_da_learn(struct dp_soc *soc,
  350. uint8_t *rx_tlv_hdr,
  351. struct dp_peer *ta_peer,
  352. qdf_nbuf_t nbuf)
  353. {
  354. }
  355. #endif
  356. /**
  357. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  358. *
  359. * @soc: core txrx main context
  360. * @ta_peer : source peer entry
  361. * @rx_tlv_hdr : start address of rx tlvs
  362. * @nbuf : nbuf that has to be intrabss forwarded
  363. *
  364. * Return: bool: true if it is forwarded else false
  365. */
  366. static bool
  367. dp_rx_intrabss_fwd(struct dp_soc *soc,
  368. struct dp_peer *ta_peer,
  369. uint8_t *rx_tlv_hdr,
  370. qdf_nbuf_t nbuf)
  371. {
  372. uint16_t da_idx;
  373. uint16_t len;
  374. uint8_t is_frag;
  375. struct dp_peer *da_peer;
  376. struct dp_ast_entry *ast_entry;
  377. qdf_nbuf_t nbuf_copy;
  378. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  379. struct cdp_tid_rx_stats *tid_stats =
  380. &ta_peer->vdev->pdev->stats.tid_stats.tid_rx_stats[tid];
  381. /* check if the destination peer is available in peer table
  382. * and also check if the source peer and destination peer
  383. * belong to the same vap and destination peer is not bss peer.
  384. */
  385. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  386. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  387. ast_entry = soc->ast_table[da_idx];
  388. if (!ast_entry)
  389. return false;
  390. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  391. ast_entry->is_active = TRUE;
  392. return false;
  393. }
  394. da_peer = ast_entry->peer;
  395. if (!da_peer)
  396. return false;
  397. /* TA peer cannot be same as peer(DA) on which AST is present
  398. * this indicates a change in topology and that AST entries
  399. * are yet to be updated.
  400. */
  401. if (da_peer == ta_peer)
  402. return false;
  403. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  404. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  405. is_frag = qdf_nbuf_is_frag(nbuf);
  406. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  407. /* linearize the nbuf just before we send to
  408. * dp_tx_send()
  409. */
  410. if (qdf_unlikely(is_frag)) {
  411. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  412. return false;
  413. nbuf = qdf_nbuf_unshare(nbuf);
  414. if (!nbuf) {
  415. DP_STATS_INC_PKT(ta_peer,
  416. rx.intra_bss.fail,
  417. 1,
  418. len);
  419. /* return true even though the pkt is
  420. * not forwarded. Basically skb_unshare
  421. * failed and we want to continue with
  422. * next nbuf.
  423. */
  424. tid_stats->fail_cnt[INTRABSS_DROP]++;
  425. return true;
  426. }
  427. }
  428. if (!dp_tx_send(ta_peer->vdev, nbuf)) {
  429. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  430. len);
  431. return true;
  432. } else {
  433. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  434. len);
  435. tid_stats->fail_cnt[INTRABSS_DROP]++;
  436. return false;
  437. }
  438. }
  439. }
  440. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  441. * source, then clone the pkt and send the cloned pkt for
  442. * intra BSS forwarding and original pkt up the network stack
  443. * Note: how do we handle multicast pkts. do we forward
  444. * all multicast pkts as is or let a higher layer module
  445. * like igmpsnoop decide whether to forward or not with
  446. * Mcast enhancement.
  447. */
  448. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  449. !ta_peer->bss_peer))) {
  450. nbuf_copy = qdf_nbuf_copy(nbuf);
  451. if (!nbuf_copy)
  452. return false;
  453. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  454. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  455. if (dp_tx_send(ta_peer->vdev, nbuf_copy)) {
  456. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  457. tid_stats->fail_cnt[INTRABSS_DROP]++;
  458. qdf_nbuf_free(nbuf_copy);
  459. } else {
  460. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  461. tid_stats->intrabss_cnt++;
  462. }
  463. }
  464. /* return false as we have to still send the original pkt
  465. * up the stack
  466. */
  467. return false;
  468. }
  469. #ifdef MESH_MODE_SUPPORT
  470. /**
  471. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  472. *
  473. * @vdev: DP Virtual device handle
  474. * @nbuf: Buffer pointer
  475. * @rx_tlv_hdr: start of rx tlv header
  476. * @peer: pointer to peer
  477. *
  478. * This function allocated memory for mesh receive stats and fill the
  479. * required stats. Stores the memory address in skb cb.
  480. *
  481. * Return: void
  482. */
  483. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  484. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  485. {
  486. struct mesh_recv_hdr_s *rx_info = NULL;
  487. uint32_t pkt_type;
  488. uint32_t nss;
  489. uint32_t rate_mcs;
  490. uint32_t bw;
  491. /* fill recv mesh stats */
  492. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  493. /* upper layers are resposible to free this memory */
  494. if (!rx_info) {
  495. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  496. "Memory allocation failed for mesh rx stats");
  497. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  498. return;
  499. }
  500. rx_info->rs_flags = MESH_RXHDR_VER1;
  501. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  502. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  503. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  504. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  505. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  506. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  507. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  508. if (vdev->osif_get_key)
  509. vdev->osif_get_key(vdev->osif_vdev,
  510. &rx_info->rs_decryptkey[0],
  511. &peer->mac_addr.raw[0],
  512. rx_info->rs_keyix);
  513. }
  514. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  515. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  516. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  517. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  518. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  519. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  520. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  521. (bw << 24);
  522. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  523. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  524. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  525. rx_info->rs_flags,
  526. rx_info->rs_rssi,
  527. rx_info->rs_channel,
  528. rx_info->rs_ratephy1,
  529. rx_info->rs_keyix);
  530. }
  531. /**
  532. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  533. *
  534. * @vdev: DP Virtual device handle
  535. * @nbuf: Buffer pointer
  536. * @rx_tlv_hdr: start of rx tlv header
  537. *
  538. * This checks if the received packet is matching any filter out
  539. * catogery and and drop the packet if it matches.
  540. *
  541. * Return: status(0 indicates drop, 1 indicate to no drop)
  542. */
  543. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  544. uint8_t *rx_tlv_hdr)
  545. {
  546. union dp_align_mac_addr mac_addr;
  547. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  548. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  549. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  550. return QDF_STATUS_SUCCESS;
  551. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  552. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  553. return QDF_STATUS_SUCCESS;
  554. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  555. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  556. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  557. return QDF_STATUS_SUCCESS;
  558. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  559. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  560. &mac_addr.raw[0]))
  561. return QDF_STATUS_E_FAILURE;
  562. if (!qdf_mem_cmp(&mac_addr.raw[0],
  563. &vdev->mac_addr.raw[0],
  564. QDF_MAC_ADDR_SIZE))
  565. return QDF_STATUS_SUCCESS;
  566. }
  567. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  568. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  569. &mac_addr.raw[0]))
  570. return QDF_STATUS_E_FAILURE;
  571. if (!qdf_mem_cmp(&mac_addr.raw[0],
  572. &vdev->mac_addr.raw[0],
  573. QDF_MAC_ADDR_SIZE))
  574. return QDF_STATUS_SUCCESS;
  575. }
  576. }
  577. return QDF_STATUS_E_FAILURE;
  578. }
  579. #else
  580. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  581. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  582. {
  583. }
  584. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  585. uint8_t *rx_tlv_hdr)
  586. {
  587. return QDF_STATUS_E_FAILURE;
  588. }
  589. #endif
  590. #ifdef FEATURE_NAC_RSSI
  591. /**
  592. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  593. * clients
  594. * @pdev: DP pdev handle
  595. * @rx_pkt_hdr: Rx packet Header
  596. *
  597. * return: dp_vdev*
  598. */
  599. static
  600. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  601. uint8_t *rx_pkt_hdr)
  602. {
  603. struct ieee80211_frame *wh;
  604. struct dp_neighbour_peer *peer = NULL;
  605. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  606. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  607. return NULL;
  608. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  609. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  610. neighbour_peer_list_elem) {
  611. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  612. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  613. QDF_TRACE(
  614. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  615. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  616. peer->neighbour_peers_macaddr.raw[0],
  617. peer->neighbour_peers_macaddr.raw[1],
  618. peer->neighbour_peers_macaddr.raw[2],
  619. peer->neighbour_peers_macaddr.raw[3],
  620. peer->neighbour_peers_macaddr.raw[4],
  621. peer->neighbour_peers_macaddr.raw[5]);
  622. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  623. return pdev->monitor_vdev;
  624. }
  625. }
  626. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  627. return NULL;
  628. }
  629. /**
  630. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  631. * @soc: DP SOC handle
  632. * @mpdu: mpdu for which peer is invalid
  633. *
  634. * return: integer type
  635. */
  636. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  637. {
  638. struct dp_invalid_peer_msg msg;
  639. struct dp_vdev *vdev = NULL;
  640. struct dp_pdev *pdev = NULL;
  641. struct ieee80211_frame *wh;
  642. uint8_t i;
  643. qdf_nbuf_t curr_nbuf, next_nbuf;
  644. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  645. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  646. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  648. "Drop decapped frames");
  649. goto free;
  650. }
  651. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  652. if (!DP_FRAME_IS_DATA(wh)) {
  653. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  654. "NAWDS valid only for data frames");
  655. goto free;
  656. }
  657. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  658. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  659. "Invalid nbuf length");
  660. goto free;
  661. }
  662. for (i = 0; i < MAX_PDEV_CNT; i++) {
  663. pdev = soc->pdev_list[i];
  664. if (!pdev) {
  665. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  666. "PDEV not found");
  667. continue;
  668. }
  669. if (pdev->filter_neighbour_peers) {
  670. /* Next Hop scenario not yet handle */
  671. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  672. if (vdev) {
  673. dp_rx_mon_deliver(soc, i,
  674. pdev->invalid_peer_head_msdu,
  675. pdev->invalid_peer_tail_msdu);
  676. pdev->invalid_peer_head_msdu = NULL;
  677. pdev->invalid_peer_tail_msdu = NULL;
  678. return 0;
  679. }
  680. }
  681. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  682. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  683. QDF_MAC_ADDR_SIZE) == 0) {
  684. goto out;
  685. }
  686. }
  687. }
  688. if (!vdev) {
  689. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  690. "VDEV not found");
  691. goto free;
  692. }
  693. out:
  694. msg.wh = wh;
  695. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  696. msg.nbuf = mpdu;
  697. msg.vdev_id = vdev->vdev_id;
  698. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  699. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  700. &msg);
  701. free:
  702. /* Drop and free packet */
  703. curr_nbuf = mpdu;
  704. while (curr_nbuf) {
  705. next_nbuf = qdf_nbuf_next(curr_nbuf);
  706. qdf_nbuf_free(curr_nbuf);
  707. curr_nbuf = next_nbuf;
  708. }
  709. return 0;
  710. }
  711. /**
  712. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  713. * @soc: DP SOC handle
  714. * @mpdu: mpdu for which peer is invalid
  715. * @mpdu_done: if an mpdu is completed
  716. *
  717. * return: integer type
  718. */
  719. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  720. qdf_nbuf_t mpdu, bool mpdu_done)
  721. {
  722. /* Only trigger the process when mpdu is completed */
  723. if (mpdu_done)
  724. dp_rx_process_invalid_peer(soc, mpdu);
  725. }
  726. #else
  727. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  728. {
  729. qdf_nbuf_t curr_nbuf, next_nbuf;
  730. struct dp_pdev *pdev;
  731. uint8_t i;
  732. struct dp_vdev *vdev = NULL;
  733. struct ieee80211_frame *wh;
  734. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  735. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  736. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  737. if (!DP_FRAME_IS_DATA(wh)) {
  738. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  739. "only for data frames");
  740. goto free;
  741. }
  742. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  744. "Invalid nbuf length");
  745. goto free;
  746. }
  747. for (i = 0; i < MAX_PDEV_CNT; i++) {
  748. pdev = soc->pdev_list[i];
  749. if (!pdev) {
  750. QDF_TRACE(QDF_MODULE_ID_DP,
  751. QDF_TRACE_LEVEL_ERROR,
  752. "PDEV not found");
  753. continue;
  754. }
  755. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  756. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  757. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  758. QDF_MAC_ADDR_SIZE) == 0) {
  759. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  760. goto out;
  761. }
  762. }
  763. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  764. }
  765. if (!vdev) {
  766. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  767. "VDEV not found");
  768. goto free;
  769. }
  770. out:
  771. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  772. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  773. free:
  774. /* reset the head and tail pointers */
  775. for (i = 0; i < MAX_PDEV_CNT; i++) {
  776. pdev = soc->pdev_list[i];
  777. if (!pdev) {
  778. QDF_TRACE(QDF_MODULE_ID_DP,
  779. QDF_TRACE_LEVEL_ERROR,
  780. "PDEV not found");
  781. continue;
  782. }
  783. pdev->invalid_peer_head_msdu = NULL;
  784. pdev->invalid_peer_tail_msdu = NULL;
  785. }
  786. /* Drop and free packet */
  787. curr_nbuf = mpdu;
  788. while (curr_nbuf) {
  789. next_nbuf = qdf_nbuf_next(curr_nbuf);
  790. qdf_nbuf_free(curr_nbuf);
  791. curr_nbuf = next_nbuf;
  792. }
  793. return 0;
  794. }
  795. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  796. qdf_nbuf_t mpdu, bool mpdu_done)
  797. {
  798. /* Process the nbuf */
  799. dp_rx_process_invalid_peer(soc, mpdu);
  800. }
  801. #endif
  802. #ifdef RECEIVE_OFFLOAD
  803. /**
  804. * dp_rx_print_offload_info() - Print offload info from RX TLV
  805. * @rx_tlv: RX TLV for which offload information is to be printed
  806. *
  807. * Return: None
  808. */
  809. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  810. {
  811. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  812. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  813. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  814. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  815. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  816. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  817. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  818. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  819. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  820. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  821. dp_verbose_debug("---------------------------------------------------------");
  822. }
  823. /**
  824. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  825. * @soc: DP SOC handle
  826. * @rx_tlv: RX TLV received for the msdu
  827. * @msdu: msdu for which GRO info needs to be filled
  828. *
  829. * Return: None
  830. */
  831. static
  832. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  833. qdf_nbuf_t msdu)
  834. {
  835. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  836. return;
  837. /* Filling up RX offload info only for TCP packets */
  838. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  839. return;
  840. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  841. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  842. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  843. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  844. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  845. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  846. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  847. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  848. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  849. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  850. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  851. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  852. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  853. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  854. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  855. HAL_RX_TLV_GET_IPV6(rx_tlv);
  856. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  857. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  858. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  859. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  860. dp_rx_print_offload_info(rx_tlv);
  861. }
  862. #else
  863. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  864. qdf_nbuf_t msdu)
  865. {
  866. }
  867. #endif /* RECEIVE_OFFLOAD */
  868. /**
  869. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  870. *
  871. * @nbuf: pointer to msdu.
  872. * @mpdu_len: mpdu length
  873. *
  874. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  875. */
  876. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  877. {
  878. bool last_nbuf;
  879. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  880. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  881. last_nbuf = false;
  882. } else {
  883. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  884. last_nbuf = true;
  885. }
  886. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  887. return last_nbuf;
  888. }
  889. /**
  890. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  891. * multiple nbufs.
  892. * @nbuf: pointer to the first msdu of an amsdu.
  893. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  894. *
  895. *
  896. * This function implements the creation of RX frag_list for cases
  897. * where an MSDU is spread across multiple nbufs.
  898. *
  899. * Return: returns the head nbuf which contains complete frag_list.
  900. */
  901. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  902. {
  903. qdf_nbuf_t parent, next, frag_list;
  904. uint16_t frag_list_len = 0;
  905. uint16_t mpdu_len;
  906. bool last_nbuf;
  907. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  908. /*
  909. * this is a case where the complete msdu fits in one single nbuf.
  910. * in this case HW sets both start and end bit and we only need to
  911. * reset these bits for RAW mode simulator to decap the pkt
  912. */
  913. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  914. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  915. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  916. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  917. return nbuf;
  918. }
  919. /*
  920. * This is a case where we have multiple msdus (A-MSDU) spread across
  921. * multiple nbufs. here we create a fraglist out of these nbufs.
  922. *
  923. * the moment we encounter a nbuf with continuation bit set we
  924. * know for sure we have an MSDU which is spread across multiple
  925. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  926. */
  927. parent = nbuf;
  928. frag_list = nbuf->next;
  929. nbuf = nbuf->next;
  930. /*
  931. * set the start bit in the first nbuf we encounter with continuation
  932. * bit set. This has the proper mpdu length set as it is the first
  933. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  934. * nbufs will form the frag_list of the parent nbuf.
  935. */
  936. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  937. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  938. /*
  939. * this is where we set the length of the fragments which are
  940. * associated to the parent nbuf. We iterate through the frag_list
  941. * till we hit the last_nbuf of the list.
  942. */
  943. do {
  944. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  945. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  946. frag_list_len += qdf_nbuf_len(nbuf);
  947. if (last_nbuf) {
  948. next = nbuf->next;
  949. nbuf->next = NULL;
  950. break;
  951. }
  952. nbuf = nbuf->next;
  953. } while (!last_nbuf);
  954. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  955. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  956. parent->next = next;
  957. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  958. return parent;
  959. }
  960. /**
  961. * dp_rx_compute_delay() - Compute and fill in all timestamps
  962. * to pass in correct fields
  963. *
  964. * @vdev: pdev handle
  965. * @tx_desc: tx descriptor
  966. * @tid: tid value
  967. * Return: none
  968. */
  969. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  970. {
  971. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  972. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  973. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  974. uint32_t interframe_delay =
  975. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  976. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  977. CDP_DELAY_STATS_REAP_STACK);
  978. /*
  979. * Update interframe delay stats calculated at deliver_data_ol point.
  980. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  981. * interframe delay will not be calculate correctly for 1st frame.
  982. * On the other side, this will help in avoiding extra per packet check
  983. * of vdev->prev_rx_deliver_tstamp.
  984. */
  985. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  986. CDP_DELAY_STATS_RX_INTERFRAME);
  987. vdev->prev_rx_deliver_tstamp = current_ts;
  988. }
  989. /**
  990. * dp_rx_drop_nbuf_list() - drop an nbuf list
  991. * @pdev: dp pdev reference
  992. * @buf_list: buffer list to be dropepd
  993. *
  994. * Return: int (number of bufs dropped)
  995. */
  996. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  997. qdf_nbuf_t buf_list)
  998. {
  999. struct cdp_tid_rx_stats *stats = NULL;
  1000. uint8_t tid = 0;
  1001. int num_dropped = 0;
  1002. qdf_nbuf_t buf, next_buf;
  1003. buf = buf_list;
  1004. while (buf) {
  1005. next_buf = qdf_nbuf_queue_next(buf);
  1006. tid = qdf_nbuf_get_tid_val(buf);
  1007. stats = &pdev->stats.tid_stats.tid_rx_stats[tid];
  1008. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1009. stats->delivered_to_stack--;
  1010. qdf_nbuf_free(buf);
  1011. buf = next_buf;
  1012. num_dropped++;
  1013. }
  1014. return num_dropped;
  1015. }
  1016. #ifdef PEER_CACHE_RX_PKTS
  1017. /**
  1018. * dp_rx_flush_rx_cached() - flush cached rx frames
  1019. * @peer: peer
  1020. * @drop: flag to drop frames or forward to net stack
  1021. *
  1022. * Return: None
  1023. */
  1024. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1025. {
  1026. struct dp_peer_cached_bufq *bufqi;
  1027. struct dp_rx_cached_buf *cache_buf = NULL;
  1028. ol_txrx_rx_fp data_rx = NULL;
  1029. int num_buff_elem;
  1030. QDF_STATUS status;
  1031. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1032. qdf_atomic_dec(&peer->flush_in_progress);
  1033. return;
  1034. }
  1035. qdf_spin_lock_bh(&peer->peer_info_lock);
  1036. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1037. data_rx = peer->vdev->osif_rx;
  1038. else
  1039. drop = true;
  1040. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1041. bufqi = &peer->bufq_info;
  1042. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1043. if (qdf_list_empty(&bufqi->cached_bufq)) {
  1044. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1045. return;
  1046. }
  1047. qdf_list_remove_front(&bufqi->cached_bufq,
  1048. (qdf_list_node_t **)&cache_buf);
  1049. while (cache_buf) {
  1050. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1051. cache_buf->buf);
  1052. bufqi->entries -= num_buff_elem;
  1053. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1054. if (drop) {
  1055. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1056. cache_buf->buf);
  1057. } else {
  1058. /* Flush the cached frames to OSIF DEV */
  1059. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1060. if (status != QDF_STATUS_SUCCESS)
  1061. bufqi->dropped = dp_rx_drop_nbuf_list(
  1062. peer->vdev->pdev,
  1063. cache_buf->buf);
  1064. }
  1065. qdf_mem_free(cache_buf);
  1066. cache_buf = NULL;
  1067. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1068. qdf_list_remove_front(&bufqi->cached_bufq,
  1069. (qdf_list_node_t **)&cache_buf);
  1070. }
  1071. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1072. qdf_atomic_dec(&peer->flush_in_progress);
  1073. }
  1074. /**
  1075. * dp_rx_enqueue_rx() - cache rx frames
  1076. * @peer: peer
  1077. * @rx_buf_list: cache buffer list
  1078. *
  1079. * Return: None
  1080. */
  1081. static QDF_STATUS
  1082. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1083. {
  1084. struct dp_rx_cached_buf *cache_buf;
  1085. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1086. int num_buff_elem;
  1087. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1088. bufqi->entries, bufqi->dropped);
  1089. if (!peer->valid) {
  1090. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1091. rx_buf_list);
  1092. return QDF_STATUS_E_INVAL;
  1093. }
  1094. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1095. if (bufqi->entries >= bufqi->thresh) {
  1096. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1097. rx_buf_list);
  1098. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1099. return QDF_STATUS_E_RESOURCES;
  1100. }
  1101. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1102. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1103. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1104. if (!cache_buf) {
  1105. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1106. "Failed to allocate buf to cache rx frames");
  1107. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1108. rx_buf_list);
  1109. return QDF_STATUS_E_NOMEM;
  1110. }
  1111. cache_buf->buf = rx_buf_list;
  1112. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1113. qdf_list_insert_back(&bufqi->cached_bufq,
  1114. &cache_buf->node);
  1115. bufqi->entries += num_buff_elem;
  1116. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1117. return QDF_STATUS_SUCCESS;
  1118. }
  1119. static inline
  1120. bool dp_rx_is_peer_cache_bufq_supported(void)
  1121. {
  1122. return true;
  1123. }
  1124. #else
  1125. static inline
  1126. bool dp_rx_is_peer_cache_bufq_supported(void)
  1127. {
  1128. return false;
  1129. }
  1130. static inline QDF_STATUS
  1131. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1132. {
  1133. return QDF_STATUS_SUCCESS;
  1134. }
  1135. #endif
  1136. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1137. struct dp_peer *peer,
  1138. qdf_nbuf_t nbuf_head,
  1139. qdf_nbuf_t nbuf_tail)
  1140. {
  1141. /*
  1142. * highly unlikely to have a vdev without a registered rx
  1143. * callback function. if so let us free the nbuf_list.
  1144. */
  1145. if (qdf_unlikely(!vdev->osif_rx)) {
  1146. if (dp_rx_is_peer_cache_bufq_supported())
  1147. dp_rx_enqueue_rx(peer, nbuf_head);
  1148. else
  1149. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1150. return;
  1151. }
  1152. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1153. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1154. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1155. &nbuf_tail, (struct cdp_peer *) peer);
  1156. }
  1157. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1158. }
  1159. /**
  1160. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1161. * @nbuf: pointer to the first msdu of an amsdu.
  1162. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1163. *
  1164. * The ipsumed field of the skb is set based on whether HW validated the
  1165. * IP/TCP/UDP checksum.
  1166. *
  1167. * Return: void
  1168. */
  1169. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1170. qdf_nbuf_t nbuf,
  1171. uint8_t *rx_tlv_hdr)
  1172. {
  1173. qdf_nbuf_rx_cksum_t cksum = {0};
  1174. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1175. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1176. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1177. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1178. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1179. } else {
  1180. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1181. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1182. }
  1183. }
  1184. /**
  1185. * dp_rx_msdu_stats_update() - update per msdu stats.
  1186. * @soc: core txrx main context
  1187. * @nbuf: pointer to the first msdu of an amsdu.
  1188. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1189. * @peer: pointer to the peer object.
  1190. * @ring_id: reo dest ring number on which pkt is reaped.
  1191. * @tid_stats: per tid rx stats.
  1192. *
  1193. * update all the per msdu stats for that nbuf.
  1194. * Return: void
  1195. */
  1196. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1197. qdf_nbuf_t nbuf,
  1198. uint8_t *rx_tlv_hdr,
  1199. struct dp_peer *peer,
  1200. uint8_t ring_id,
  1201. struct cdp_tid_rx_stats *tid_stats)
  1202. {
  1203. bool is_ampdu, is_not_amsdu;
  1204. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1205. struct dp_vdev *vdev = peer->vdev;
  1206. qdf_ether_header_t *eh;
  1207. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1208. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1209. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1210. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1211. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1212. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1213. tid_stats->msdu_cnt++;
  1214. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1215. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1216. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1217. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1218. tid_stats->mcast_msdu_cnt++;
  1219. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1220. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1221. tid_stats->bcast_msdu_cnt++;
  1222. }
  1223. }
  1224. /*
  1225. * currently we can return from here as we have similar stats
  1226. * updated at per ppdu level instead of msdu level
  1227. */
  1228. if (!soc->process_rx_status)
  1229. return;
  1230. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1231. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1232. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1233. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1234. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1235. tid = qdf_nbuf_get_tid_val(nbuf);
  1236. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1237. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1238. rx_tlv_hdr);
  1239. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1240. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1241. DP_STATS_INC(peer, rx.bw[bw], 1);
  1242. /*
  1243. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1244. * then increase index [nss - 1] in array counter.
  1245. */
  1246. if (nss > 0 && (pkt_type == DOT11_N ||
  1247. pkt_type == DOT11_AC ||
  1248. pkt_type == DOT11_AX))
  1249. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1250. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1251. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1252. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1253. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1254. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1255. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1256. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1257. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1258. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1259. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1260. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1261. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1262. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1263. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1264. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1265. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1266. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1267. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1268. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1269. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1270. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1271. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1272. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1273. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1274. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1275. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1276. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1277. if ((soc->process_rx_status) &&
  1278. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1279. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1280. if (!vdev->pdev)
  1281. return;
  1282. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1283. &peer->stats, peer->peer_ids[0],
  1284. UPDATE_PEER_STATS,
  1285. vdev->pdev->pdev_id);
  1286. #endif
  1287. }
  1288. }
  1289. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1290. void *rx_tlv_hdr,
  1291. qdf_nbuf_t nbuf)
  1292. {
  1293. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1294. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1295. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1296. (qdf_nbuf_is_da_valid(nbuf) &&
  1297. (hal_rx_msdu_end_da_idx_get(soc->hal_soc,
  1298. rx_tlv_hdr) >
  1299. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1300. return false;
  1301. return true;
  1302. }
  1303. #ifdef WDS_VENDOR_EXTENSION
  1304. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1305. struct dp_vdev *vdev,
  1306. struct dp_peer *peer)
  1307. {
  1308. struct dp_peer *bss_peer;
  1309. int fr_ds, to_ds, rx_3addr, rx_4addr;
  1310. int rx_policy_ucast, rx_policy_mcast;
  1311. int rx_mcast = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1312. if (vdev->opmode == wlan_op_mode_ap) {
  1313. TAILQ_FOREACH(bss_peer, &vdev->peer_list, peer_list_elem) {
  1314. if (bss_peer->bss_peer) {
  1315. /* if wds policy check is not enabled on this vdev, accept all frames */
  1316. if (!bss_peer->wds_ecm.wds_rx_filter) {
  1317. return 1;
  1318. }
  1319. break;
  1320. }
  1321. }
  1322. rx_policy_ucast = bss_peer->wds_ecm.wds_rx_ucast_4addr;
  1323. rx_policy_mcast = bss_peer->wds_ecm.wds_rx_mcast_4addr;
  1324. } else { /* sta mode */
  1325. if (!peer->wds_ecm.wds_rx_filter) {
  1326. return 1;
  1327. }
  1328. rx_policy_ucast = peer->wds_ecm.wds_rx_ucast_4addr;
  1329. rx_policy_mcast = peer->wds_ecm.wds_rx_mcast_4addr;
  1330. }
  1331. /* ------------------------------------------------
  1332. * self
  1333. * peer- rx rx-
  1334. * wds ucast mcast dir policy accept note
  1335. * ------------------------------------------------
  1336. * 1 1 0 11 x1 1 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint met; so, accept
  1337. * 1 1 0 01 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1338. * 1 1 0 10 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1339. * 1 1 0 00 x1 0 bad frame, won't see it
  1340. * 1 0 1 11 1x 1 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint met; so, accept
  1341. * 1 0 1 01 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1342. * 1 0 1 10 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1343. * 1 0 1 00 1x 0 bad frame, won't see it
  1344. * 1 1 0 11 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1345. * 1 1 0 01 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1346. * 1 1 0 10 x0 1 AP configured to accept from-ds Rx ucast from wds peers, constraint met; so, accept
  1347. * 1 1 0 00 x0 0 bad frame, won't see it
  1348. * 1 0 1 11 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1349. * 1 0 1 01 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1350. * 1 0 1 10 0x 1 AP configured to accept from-ds Rx mcast from wds peers, constraint met; so, accept
  1351. * 1 0 1 00 0x 0 bad frame, won't see it
  1352. *
  1353. * 0 x x 11 xx 0 we only accept td-ds Rx frames from non-wds peers in mode.
  1354. * 0 x x 01 xx 1
  1355. * 0 x x 10 xx 0
  1356. * 0 x x 00 xx 0 bad frame, won't see it
  1357. * ------------------------------------------------
  1358. */
  1359. fr_ds = hal_rx_mpdu_get_fr_ds(rx_tlv_hdr);
  1360. to_ds = hal_rx_mpdu_get_to_ds(rx_tlv_hdr);
  1361. rx_3addr = fr_ds ^ to_ds;
  1362. rx_4addr = fr_ds & to_ds;
  1363. if (vdev->opmode == wlan_op_mode_ap) {
  1364. if ((!peer->wds_enabled && rx_3addr && to_ds) ||
  1365. (peer->wds_enabled && !rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1366. (peer->wds_enabled && rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1367. return 1;
  1368. }
  1369. } else { /* sta mode */
  1370. if ((!rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1371. (rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1372. return 1;
  1373. }
  1374. }
  1375. return 0;
  1376. }
  1377. #else
  1378. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1379. struct dp_vdev *vdev,
  1380. struct dp_peer *peer)
  1381. {
  1382. return 1;
  1383. }
  1384. #endif
  1385. #ifdef RX_DESC_DEBUG_CHECK
  1386. /**
  1387. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1388. * corruption
  1389. *
  1390. * @ring_desc: REO ring descriptor
  1391. * @rx_desc: Rx descriptor
  1392. *
  1393. * Return: NONE
  1394. */
  1395. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1396. struct dp_rx_desc *rx_desc)
  1397. {
  1398. struct hal_buf_info hbi;
  1399. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1400. /* Sanity check for possible buffer paddr corruption */
  1401. qdf_assert_always((&hbi)->paddr ==
  1402. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1403. }
  1404. #else
  1405. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1406. struct dp_rx_desc *rx_desc)
  1407. {
  1408. }
  1409. #endif
  1410. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1411. static inline
  1412. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1413. {
  1414. bool limit_hit = false;
  1415. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1416. limit_hit =
  1417. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1418. if (limit_hit)
  1419. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1420. return limit_hit;
  1421. }
  1422. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1423. {
  1424. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1425. }
  1426. #else
  1427. static inline
  1428. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1429. {
  1430. return false;
  1431. }
  1432. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1433. {
  1434. return false;
  1435. }
  1436. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1437. /**
  1438. * dp_rx_process() - Brain of the Rx processing functionality
  1439. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1440. * @soc: core txrx main context
  1441. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1442. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1443. * @quota: No. of units (packets) that can be serviced in one shot.
  1444. *
  1445. * This function implements the core of Rx functionality. This is
  1446. * expected to handle only non-error frames.
  1447. *
  1448. * Return: uint32_t: No. of elements processed
  1449. */
  1450. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1451. uint8_t reo_ring_num, uint32_t quota)
  1452. {
  1453. void *hal_soc;
  1454. void *ring_desc;
  1455. struct dp_rx_desc *rx_desc = NULL;
  1456. qdf_nbuf_t nbuf, next;
  1457. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1458. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1459. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1460. uint32_t l2_hdr_offset = 0;
  1461. uint16_t msdu_len = 0;
  1462. uint16_t peer_id;
  1463. struct dp_peer *peer;
  1464. struct dp_vdev *vdev;
  1465. uint32_t pkt_len = 0;
  1466. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1467. struct hal_rx_msdu_desc_info msdu_desc_info;
  1468. enum hal_reo_error_status error;
  1469. uint32_t peer_mdata;
  1470. uint8_t *rx_tlv_hdr;
  1471. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1472. uint8_t mac_id = 0;
  1473. struct dp_pdev *pdev;
  1474. struct dp_pdev *rx_pdev;
  1475. struct dp_srng *dp_rxdma_srng;
  1476. struct rx_desc_pool *rx_desc_pool;
  1477. struct dp_soc *soc = int_ctx->soc;
  1478. uint8_t ring_id = 0;
  1479. uint8_t core_id = 0;
  1480. struct cdp_tid_rx_stats *tid_stats;
  1481. qdf_nbuf_t nbuf_head;
  1482. qdf_nbuf_t nbuf_tail;
  1483. qdf_nbuf_t deliver_list_head;
  1484. qdf_nbuf_t deliver_list_tail;
  1485. uint32_t num_rx_bufs_reaped = 0;
  1486. uint32_t intr_id;
  1487. struct hif_opaque_softc *scn;
  1488. int32_t tid = 0;
  1489. bool is_prev_msdu_last = true;
  1490. uint32_t num_entries_avail = 0;
  1491. DP_HIST_INIT();
  1492. qdf_assert_always(soc && hal_ring);
  1493. hal_soc = soc->hal_soc;
  1494. qdf_assert_always(hal_soc);
  1495. hif_pm_runtime_mark_last_busy(soc->osdev->dev);
  1496. scn = soc->hif_handle;
  1497. intr_id = int_ctx->dp_intr_id;
  1498. more_data:
  1499. /* reset local variables here to be re-used in the function */
  1500. nbuf_head = NULL;
  1501. nbuf_tail = NULL;
  1502. deliver_list_head = NULL;
  1503. deliver_list_tail = NULL;
  1504. peer = NULL;
  1505. vdev = NULL;
  1506. num_rx_bufs_reaped = 0;
  1507. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1508. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1509. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1510. qdf_mem_zero(head, sizeof(head));
  1511. qdf_mem_zero(tail, sizeof(tail));
  1512. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  1513. /*
  1514. * Need API to convert from hal_ring pointer to
  1515. * Ring Type / Ring Id combo
  1516. */
  1517. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1518. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1519. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1520. hal_srng_access_end(hal_soc, hal_ring);
  1521. goto done;
  1522. }
  1523. /*
  1524. * start reaping the buffers from reo ring and queue
  1525. * them in per vdev queue.
  1526. * Process the received pkts in a different per vdev loop.
  1527. */
  1528. while (qdf_likely(quota &&
  1529. (ring_desc = hal_srng_dst_peek(hal_soc, hal_ring)))) {
  1530. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1531. ring_id = hal_srng_ring_id_get(hal_ring);
  1532. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1533. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1534. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1535. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1536. /* Don't know how to deal with this -- assert */
  1537. qdf_assert(0);
  1538. }
  1539. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1540. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1541. qdf_assert(rx_desc);
  1542. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1543. /*
  1544. * this is a unlikely scenario where the host is reaping
  1545. * a descriptor which it already reaped just a while ago
  1546. * but is yet to replenish it back to HW.
  1547. * In this case host will dump the last 128 descriptors
  1548. * including the software descriptor rx_desc and assert.
  1549. */
  1550. if (qdf_unlikely(!rx_desc->in_use)) {
  1551. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1552. dp_err("Reaping rx_desc not in use!");
  1553. dp_rx_dump_info_and_assert(soc, hal_ring,
  1554. ring_desc, rx_desc);
  1555. }
  1556. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1557. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1558. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1559. dp_rx_dump_info_and_assert(soc, hal_ring,
  1560. ring_desc, rx_desc);
  1561. }
  1562. /* TODO */
  1563. /*
  1564. * Need a separate API for unmapping based on
  1565. * phyiscal address
  1566. */
  1567. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1568. QDF_DMA_FROM_DEVICE);
  1569. rx_desc->unmapped = 1;
  1570. core_id = smp_processor_id();
  1571. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1572. /* Get MPDU DESC info */
  1573. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1574. /* Get MSDU DESC info */
  1575. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1576. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1577. HAL_MPDU_F_RAW_AMPDU)) {
  1578. /* previous msdu has end bit set, so current one is
  1579. * the new MPDU
  1580. */
  1581. if (is_prev_msdu_last) {
  1582. is_prev_msdu_last = false;
  1583. /* Get number of entries available in HW ring */
  1584. num_entries_avail =
  1585. hal_srng_dst_num_valid(hal_soc, hal_ring, 1);
  1586. /* For new MPDU check if we can read complete
  1587. * MPDU by comparing the number of buffers
  1588. * available and number of buffers needed to
  1589. * reap this MPDU
  1590. */
  1591. if (((msdu_desc_info.msdu_len /
  1592. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1593. num_entries_avail)
  1594. break;
  1595. } else {
  1596. if (msdu_desc_info.msdu_flags &
  1597. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1598. is_prev_msdu_last = true;
  1599. }
  1600. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1601. }
  1602. /* Pop out the descriptor*/
  1603. hal_srng_dst_get_next(hal_soc, hal_ring);
  1604. rx_bufs_reaped[rx_desc->pool_id]++;
  1605. peer_mdata = mpdu_desc_info.peer_meta_data;
  1606. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1607. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1608. /*
  1609. * save msdu flags first, last and continuation msdu in
  1610. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1611. * length to nbuf->cb. This ensures the info required for
  1612. * per pkt processing is always in the same cache line.
  1613. * This helps in improving throughput for smaller pkt
  1614. * sizes.
  1615. */
  1616. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1617. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1618. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1619. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1620. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1621. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1622. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1623. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1624. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1625. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1626. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1627. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1628. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1629. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1630. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1631. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1632. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1633. /*
  1634. * if continuation bit is set then we have MSDU spread
  1635. * across multiple buffers, let us not decrement quota
  1636. * till we reap all buffers of that MSDU.
  1637. */
  1638. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1639. quota -= 1;
  1640. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1641. &tail[rx_desc->pool_id],
  1642. rx_desc);
  1643. num_rx_bufs_reaped++;
  1644. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1645. break;
  1646. }
  1647. done:
  1648. hal_srng_access_end(hal_soc, hal_ring);
  1649. if (nbuf_tail)
  1650. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1651. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1652. /*
  1653. * continue with next mac_id if no pkts were reaped
  1654. * from that pool
  1655. */
  1656. if (!rx_bufs_reaped[mac_id])
  1657. continue;
  1658. pdev = soc->pdev_list[mac_id];
  1659. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1660. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1661. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1662. rx_desc_pool, rx_bufs_reaped[mac_id],
  1663. &head[mac_id], &tail[mac_id]);
  1664. }
  1665. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1666. /* Peer can be NULL is case of LFR */
  1667. if (qdf_likely(peer))
  1668. vdev = NULL;
  1669. /*
  1670. * BIG loop where each nbuf is dequeued from global queue,
  1671. * processed and queued back on a per vdev basis. These nbufs
  1672. * are sent to stack as and when we run out of nbufs
  1673. * or a new nbuf dequeued from global queue has a different
  1674. * vdev when compared to previous nbuf.
  1675. */
  1676. nbuf = nbuf_head;
  1677. while (nbuf) {
  1678. next = nbuf->next;
  1679. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1680. /* Get TID from struct cb->tid_val, save to tid */
  1681. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1682. tid = qdf_nbuf_get_tid_val(nbuf);
  1683. /*
  1684. * Check if DMA completed -- msdu_done is the last bit
  1685. * to be written
  1686. */
  1687. rx_pdev = soc->pdev_list[rx_desc->pool_id];
  1688. DP_RX_TID_SAVE(nbuf, tid);
  1689. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1690. qdf_nbuf_set_timestamp(nbuf);
  1691. tid_stats = &rx_pdev->stats.tid_stats.tid_rx_stats[tid];
  1692. if (qdf_unlikely(!hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1693. dp_err("MSDU DONE failure");
  1694. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1695. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1696. QDF_TRACE_LEVEL_INFO);
  1697. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1698. qdf_nbuf_free(nbuf);
  1699. qdf_assert(0);
  1700. nbuf = next;
  1701. continue;
  1702. }
  1703. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1704. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1705. peer = dp_peer_find_by_id(soc, peer_id);
  1706. if (peer) {
  1707. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1708. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1709. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1710. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1711. QDF_NBUF_RX_PKT_DATA_TRACK;
  1712. }
  1713. rx_bufs_used++;
  1714. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1715. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1716. deliver_list_tail);
  1717. deliver_list_head = NULL;
  1718. deliver_list_tail = NULL;
  1719. }
  1720. if (qdf_likely(peer)) {
  1721. vdev = peer->vdev;
  1722. } else {
  1723. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1724. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1725. tid_stats->fail_cnt[INVALID_PEER_VDEV]++;
  1726. qdf_nbuf_free(nbuf);
  1727. nbuf = next;
  1728. continue;
  1729. }
  1730. if (qdf_unlikely(!vdev)) {
  1731. tid_stats->fail_cnt[INVALID_PEER_VDEV]++;
  1732. qdf_nbuf_free(nbuf);
  1733. nbuf = next;
  1734. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1735. dp_peer_unref_del_find_by_id(peer);
  1736. continue;
  1737. }
  1738. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1739. /*
  1740. * First IF condition:
  1741. * 802.11 Fragmented pkts are reinjected to REO
  1742. * HW block as SG pkts and for these pkts we only
  1743. * need to pull the RX TLVS header length.
  1744. * Second IF condition:
  1745. * The below condition happens when an MSDU is spread
  1746. * across multiple buffers. This can happen in two cases
  1747. * 1. The nbuf size is smaller then the received msdu.
  1748. * ex: we have set the nbuf size to 2048 during
  1749. * nbuf_alloc. but we received an msdu which is
  1750. * 2304 bytes in size then this msdu is spread
  1751. * across 2 nbufs.
  1752. *
  1753. * 2. AMSDUs when RAW mode is enabled.
  1754. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1755. * across 1st nbuf and 2nd nbuf and last MSDU is
  1756. * spread across 2nd nbuf and 3rd nbuf.
  1757. *
  1758. * for these scenarios let us create a skb frag_list and
  1759. * append these buffers till the last MSDU of the AMSDU
  1760. * Third condition:
  1761. * This is the most likely case, we receive 802.3 pkts
  1762. * decapsulated by HW, here we need to set the pkt length.
  1763. */
  1764. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1765. bool is_mcbc, is_sa_vld, is_da_vld;
  1766. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1767. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1768. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1769. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1770. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1771. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1772. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1773. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1774. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1775. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1776. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1777. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1778. next = nbuf->next;
  1779. } else {
  1780. l2_hdr_offset =
  1781. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1782. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1783. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1784. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1785. qdf_nbuf_pull_head(nbuf,
  1786. RX_PKT_TLVS_LEN +
  1787. l2_hdr_offset);
  1788. }
  1789. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1790. QDF_TRACE(QDF_MODULE_ID_DP,
  1791. QDF_TRACE_LEVEL_ERROR,
  1792. FL("Policy Check Drop pkt"));
  1793. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1794. /* Drop & free packet */
  1795. qdf_nbuf_free(nbuf);
  1796. /* Statistics */
  1797. nbuf = next;
  1798. dp_peer_unref_del_find_by_id(peer);
  1799. continue;
  1800. }
  1801. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1802. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1803. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1804. false))) {
  1805. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1806. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1807. qdf_nbuf_free(nbuf);
  1808. nbuf = next;
  1809. dp_peer_unref_del_find_by_id(peer);
  1810. continue;
  1811. }
  1812. if (soc->process_rx_status)
  1813. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1814. /* Update the protocol tag in SKB based on CCE metadata */
  1815. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1816. reo_ring_num, false, true);
  1817. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1818. ring_id, tid_stats);
  1819. if (qdf_unlikely(vdev->mesh_vdev)) {
  1820. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1821. == QDF_STATUS_SUCCESS) {
  1822. QDF_TRACE(QDF_MODULE_ID_DP,
  1823. QDF_TRACE_LEVEL_INFO_MED,
  1824. FL("mesh pkt filtered"));
  1825. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1826. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1827. 1);
  1828. qdf_nbuf_free(nbuf);
  1829. nbuf = next;
  1830. dp_peer_unref_del_find_by_id(peer);
  1831. continue;
  1832. }
  1833. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1834. }
  1835. if (qdf_likely(vdev->rx_decap_type ==
  1836. htt_cmn_pkt_type_ethernet) &&
  1837. qdf_likely(!vdev->mesh_vdev)) {
  1838. /* WDS Destination Address Learning */
  1839. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1840. /* Due to HW issue, sometimes we see that the sa_idx
  1841. * and da_idx are invalid with sa_valid and da_valid
  1842. * bits set
  1843. *
  1844. * in this case we also see that value of
  1845. * sa_sw_peer_id is set as 0
  1846. *
  1847. * Drop the packet if sa_idx and da_idx OOB or
  1848. * sa_sw_peerid is 0
  1849. */
  1850. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1851. qdf_nbuf_free(nbuf);
  1852. nbuf = next;
  1853. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1854. dp_peer_unref_del_find_by_id(peer);
  1855. continue;
  1856. }
  1857. /* WDS Source Port Learning */
  1858. if (qdf_likely(vdev->wds_enabled))
  1859. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1860. peer, nbuf);
  1861. /* Intrabss-fwd */
  1862. if (dp_rx_check_ap_bridge(vdev))
  1863. if (dp_rx_intrabss_fwd(soc,
  1864. peer,
  1865. rx_tlv_hdr,
  1866. nbuf)) {
  1867. nbuf = next;
  1868. dp_peer_unref_del_find_by_id(peer);
  1869. tid_stats->intrabss_cnt++;
  1870. continue; /* Get next desc */
  1871. }
  1872. }
  1873. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1874. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1875. DP_RX_LIST_APPEND(deliver_list_head,
  1876. deliver_list_tail,
  1877. nbuf);
  1878. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1879. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1880. tid_stats->delivered_to_stack++;
  1881. nbuf = next;
  1882. dp_peer_unref_del_find_by_id(peer);
  1883. }
  1884. if (deliver_list_head)
  1885. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1886. deliver_list_tail);
  1887. if (dp_rx_enable_eol_data_check(soc)) {
  1888. if (quota &&
  1889. hal_srng_dst_peek_sync_locked(soc, hal_ring)) {
  1890. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1891. if (!hif_exec_should_yield(scn, intr_id))
  1892. goto more_data;
  1893. }
  1894. }
  1895. /* Update histogram statistics by looping through pdev's */
  1896. DP_RX_HIST_STATS_PER_PDEV();
  1897. return rx_bufs_used; /* Assume no scale factor for now */
  1898. }
  1899. /**
  1900. * dp_rx_detach() - detach dp rx
  1901. * @pdev: core txrx pdev context
  1902. *
  1903. * This function will detach DP RX into main device context
  1904. * will free DP Rx resources.
  1905. *
  1906. * Return: void
  1907. */
  1908. void
  1909. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1910. {
  1911. uint8_t pdev_id = pdev->pdev_id;
  1912. struct dp_soc *soc = pdev->soc;
  1913. struct rx_desc_pool *rx_desc_pool;
  1914. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1915. if (rx_desc_pool->pool_size != 0) {
  1916. if (!dp_is_soc_reinit(soc))
  1917. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1918. else
  1919. dp_rx_desc_nbuf_pool_free(soc, rx_desc_pool);
  1920. }
  1921. return;
  1922. }
  1923. static QDF_STATUS
  1924. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1925. struct dp_srng *dp_rxdma_srng,
  1926. struct rx_desc_pool *rx_desc_pool,
  1927. uint32_t num_req_buffers,
  1928. union dp_rx_desc_list_elem_t **desc_list,
  1929. union dp_rx_desc_list_elem_t **tail)
  1930. {
  1931. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1932. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1933. union dp_rx_desc_list_elem_t *next;
  1934. void *rxdma_ring_entry;
  1935. qdf_dma_addr_t paddr;
  1936. void **rx_nbuf_arr;
  1937. uint32_t nr_descs;
  1938. uint32_t nr_nbuf;
  1939. qdf_nbuf_t nbuf;
  1940. QDF_STATUS ret;
  1941. int i;
  1942. if (qdf_unlikely(!rxdma_srng)) {
  1943. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1944. return QDF_STATUS_E_FAILURE;
  1945. }
  1946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1947. "requested %u RX buffers for driver attach", num_req_buffers);
  1948. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1949. num_req_buffers, desc_list, tail);
  1950. if (!nr_descs) {
  1951. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1952. "no free rx_descs in freelist");
  1953. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1954. return QDF_STATUS_E_NOMEM;
  1955. }
  1956. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1957. "got %u RX descs for driver attach", nr_descs);
  1958. rx_nbuf_arr = qdf_mem_malloc(nr_descs * sizeof(*rx_nbuf_arr));
  1959. if (!rx_nbuf_arr) {
  1960. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1961. "failed to allocate nbuf array");
  1962. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1963. return QDF_STATUS_E_NOMEM;
  1964. }
  1965. for (nr_nbuf = 0; nr_nbuf < nr_descs; nr_nbuf++) {
  1966. nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1967. RX_BUFFER_RESERVATION,
  1968. RX_BUFFER_ALIGNMENT,
  1969. FALSE);
  1970. if (!nbuf) {
  1971. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1972. "nbuf alloc failed");
  1973. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1974. break;
  1975. }
  1976. ret = qdf_nbuf_map_single(dp_soc->osdev, nbuf,
  1977. QDF_DMA_FROM_DEVICE);
  1978. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1979. qdf_nbuf_free(nbuf);
  1980. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1981. "nbuf map failed");
  1982. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1983. break;
  1984. }
  1985. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1986. ret = check_x86_paddr(dp_soc, &nbuf, &paddr, dp_pdev);
  1987. if (ret == QDF_STATUS_E_FAILURE) {
  1988. qdf_nbuf_unmap_single(dp_soc->osdev, nbuf,
  1989. QDF_DMA_FROM_DEVICE);
  1990. qdf_nbuf_free(nbuf);
  1991. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1992. "nbuf check x86 failed");
  1993. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1994. break;
  1995. }
  1996. rx_nbuf_arr[nr_nbuf] = (void *)nbuf;
  1997. }
  1998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1999. "allocated %u nbuf for driver attach", nr_nbuf);
  2000. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2001. for (i = 0; i < nr_nbuf; i++) {
  2002. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  2003. rxdma_srng);
  2004. qdf_assert_always(rxdma_ring_entry);
  2005. next = (*desc_list)->next;
  2006. nbuf = rx_nbuf_arr[i];
  2007. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2008. dp_rx_desc_prep(&((*desc_list)->rx_desc), nbuf);
  2009. (*desc_list)->rx_desc.in_use = 1;
  2010. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2011. (*desc_list)->rx_desc.cookie,
  2012. rx_desc_pool->owner);
  2013. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2014. *desc_list = next;
  2015. }
  2016. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2018. "filled %u RX buffers for driver attach", nr_nbuf);
  2019. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, RX_BUFFER_SIZE *
  2020. nr_nbuf);
  2021. qdf_mem_free(rx_nbuf_arr);
  2022. return QDF_STATUS_SUCCESS;
  2023. }
  2024. /**
  2025. * dp_rx_attach() - attach DP RX
  2026. * @pdev: core txrx pdev context
  2027. *
  2028. * This function will attach a DP RX instance into the main
  2029. * device (SOC) context. Will allocate dp rx resource and
  2030. * initialize resources.
  2031. *
  2032. * Return: QDF_STATUS_SUCCESS: success
  2033. * QDF_STATUS_E_RESOURCES: Error return
  2034. */
  2035. QDF_STATUS
  2036. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2037. {
  2038. uint8_t pdev_id = pdev->pdev_id;
  2039. struct dp_soc *soc = pdev->soc;
  2040. uint32_t rxdma_entries;
  2041. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2042. union dp_rx_desc_list_elem_t *tail = NULL;
  2043. struct dp_srng *dp_rxdma_srng;
  2044. struct rx_desc_pool *rx_desc_pool;
  2045. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2046. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2047. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2048. return QDF_STATUS_SUCCESS;
  2049. }
  2050. pdev = soc->pdev_list[pdev_id];
  2051. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2052. rxdma_entries = dp_rxdma_srng->num_entries;
  2053. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2054. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2055. dp_rx_desc_pool_alloc(soc, pdev_id,
  2056. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  2057. rx_desc_pool);
  2058. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2059. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2060. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2061. rx_desc_pool, rxdma_entries - 1,
  2062. &desc_list, &tail);
  2063. }
  2064. /*
  2065. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2066. * @soc: core txrx main context
  2067. * @pdev: core txrx pdev context
  2068. *
  2069. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2070. * until retry times reaches max threshold or succeeded.
  2071. *
  2072. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2073. */
  2074. qdf_nbuf_t
  2075. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2076. {
  2077. uint8_t *buf;
  2078. int32_t nbuf_retry_count;
  2079. QDF_STATUS ret;
  2080. qdf_nbuf_t nbuf = NULL;
  2081. for (nbuf_retry_count = 0; nbuf_retry_count <
  2082. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2083. nbuf_retry_count++) {
  2084. /* Allocate a new skb */
  2085. nbuf = qdf_nbuf_alloc(soc->osdev,
  2086. RX_BUFFER_SIZE,
  2087. RX_BUFFER_RESERVATION,
  2088. RX_BUFFER_ALIGNMENT,
  2089. FALSE);
  2090. if (!nbuf) {
  2091. DP_STATS_INC(pdev,
  2092. replenish.nbuf_alloc_fail, 1);
  2093. continue;
  2094. }
  2095. buf = qdf_nbuf_data(nbuf);
  2096. memset(buf, 0, RX_BUFFER_SIZE);
  2097. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2098. QDF_DMA_FROM_DEVICE);
  2099. /* nbuf map failed */
  2100. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2101. qdf_nbuf_free(nbuf);
  2102. DP_STATS_INC(pdev, replenish.map_err, 1);
  2103. continue;
  2104. }
  2105. /* qdf_nbuf alloc and map succeeded */
  2106. break;
  2107. }
  2108. /* qdf_nbuf still alloc or map failed */
  2109. if (qdf_unlikely(nbuf_retry_count >=
  2110. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2111. return NULL;
  2112. return nbuf;
  2113. }