main.c 111 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/adc-tm-clients.h>
  29. #include <linux/iio/consumer.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/of.h>
  32. #include <linux/of_irq.h>
  33. #include <linux/pm_runtime.h>
  34. #include <linux/soc/qcom/qmi.h>
  35. #include <linux/sysfs.h>
  36. #include <linux/thermal.h>
  37. #include <soc/qcom/memory_dump.h>
  38. #include <soc/qcom/secure_buffer.h>
  39. #include <soc/qcom/socinfo.h>
  40. #include <soc/qcom/qcom_ramdump.h>
  41. #include <linux/soc/qcom/smem.h>
  42. #include <linux/soc/qcom/smem_state.h>
  43. #include <linux/remoteproc.h>
  44. #include <linux/remoteproc/qcom_rproc.h>
  45. #include <linux/soc/qcom/pdr.h>
  46. #include <linux/remoteproc.h>
  47. #include <trace/hooks/remoteproc.h>
  48. #include "main.h"
  49. #include "qmi.h"
  50. #include "debug.h"
  51. #include "power.h"
  52. #include "genl.h"
  53. #define MAX_PROP_SIZE 32
  54. #define NUM_LOG_PAGES 10
  55. #define NUM_LOG_LONG_PAGES 4
  56. #define ICNSS_MAGIC 0x5abc5abc
  57. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  58. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  59. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  60. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  61. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  62. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  63. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  64. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  65. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  66. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  67. #define ICNSS_MAX_PROBE_CNT 2
  68. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  69. #define PROBE_TIMEOUT 15000
  70. #define SMP2P_SOC_WAKE_TIMEOUT 500
  71. #ifdef CONFIG_ICNSS2_DEBUG
  72. static unsigned long qmi_timeout = 3000;
  73. module_param(qmi_timeout, ulong, 0600);
  74. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  75. #else
  76. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  77. #endif
  78. static struct icnss_priv *penv;
  79. static struct work_struct wpss_loader;
  80. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  81. #define ICNSS_EVENT_PENDING 2989
  82. #define ICNSS_EVENT_SYNC BIT(0)
  83. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  84. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  85. ICNSS_EVENT_SYNC)
  86. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  87. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  88. #define SMP2P_GET_MAX_RETRY 4
  89. #define SMP2P_GET_RETRY_DELAY_MS 500
  90. #define RAMDUMP_NUM_DEVICES 256
  91. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv()
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. bool icnss_is_rejuvenate(void)
  341. {
  342. if (!penv)
  343. return false;
  344. else
  345. return test_bit(ICNSS_REJUVENATE, &penv->state);
  346. }
  347. EXPORT_SYMBOL(icnss_is_rejuvenate);
  348. bool icnss_is_pdr(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_PDR, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_pdr);
  356. static int icnss_send_smp2p(struct icnss_priv *priv,
  357. enum icnss_smp2p_msg_id msg_id,
  358. enum smp2p_out_entry smp2p_entry)
  359. {
  360. unsigned int value = 0;
  361. int ret;
  362. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  363. return -EINVAL;
  364. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  365. if (msg_id == ICNSS_RESET_MSG) {
  366. priv->smp2p_info[smp2p_entry].seq = 0;
  367. ret = qcom_smem_state_update_bits(
  368. priv->smp2p_info[smp2p_entry].smem_state,
  369. ICNSS_SMEM_VALUE_MASK,
  370. 0);
  371. if (ret)
  372. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  373. ret, icnss_smp2p_str[smp2p_entry]);
  374. return ret;
  375. }
  376. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  377. return -ENODEV;
  378. value |= priv->smp2p_info[smp2p_entry].seq++;
  379. value <<= ICNSS_SMEM_SEQ_NO_POS;
  380. value |= msg_id;
  381. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  382. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  383. reinit_completion(&penv->smp2p_soc_wake_wait);
  384. ret = qcom_smem_state_update_bits(
  385. priv->smp2p_info[smp2p_entry].smem_state,
  386. ICNSS_SMEM_VALUE_MASK,
  387. value);
  388. if (ret) {
  389. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  390. icnss_smp2p_str[smp2p_entry]);
  391. } else {
  392. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  393. msg_id == ICNSS_SOC_WAKE_REL) {
  394. if (!wait_for_completion_timeout(
  395. &priv->smp2p_soc_wake_wait,
  396. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  397. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  398. icnss_smp2p_str[smp2p_entry]);
  399. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  400. ICNSS_ASSERT(0);
  401. }
  402. }
  403. }
  404. return ret;
  405. }
  406. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  407. {
  408. struct icnss_priv *priv = ctx;
  409. if (priv)
  410. priv->force_err_fatal = true;
  411. icnss_pr_err("Received force error fatal request from FW\n");
  412. return IRQ_HANDLED;
  413. }
  414. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. struct icnss_uevent_fw_down_data fw_down_data = {0};
  418. icnss_pr_err("Received early crash indication from FW\n");
  419. if (priv) {
  420. set_bit(ICNSS_FW_DOWN, &priv->state);
  421. icnss_ignore_fw_timeout(true);
  422. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  423. clear_bit(ICNSS_FW_READY, &priv->state);
  424. fw_down_data.crashed = true;
  425. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  426. &fw_down_data);
  427. }
  428. }
  429. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  430. 0, NULL);
  431. return IRQ_HANDLED;
  432. }
  433. static void register_fw_error_notifications(struct device *dev)
  434. {
  435. struct icnss_priv *priv = dev_get_drvdata(dev);
  436. struct device_node *dev_node;
  437. int irq = 0, ret = 0;
  438. if (!priv)
  439. return;
  440. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  441. if (!dev_node) {
  442. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  443. return;
  444. }
  445. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  446. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  447. ret = irq = of_irq_get_byname(dev_node,
  448. "qcom,smp2p-force-fatal-error");
  449. if (ret < 0) {
  450. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  451. irq);
  452. return;
  453. }
  454. }
  455. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  456. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  457. "wlanfw-err", priv);
  458. if (ret < 0) {
  459. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  460. irq, ret);
  461. return;
  462. }
  463. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  464. priv->fw_error_fatal_irq = irq;
  465. }
  466. static void register_early_crash_notifications(struct device *dev)
  467. {
  468. struct icnss_priv *priv = dev_get_drvdata(dev);
  469. struct device_node *dev_node;
  470. int irq = 0, ret = 0;
  471. if (!priv)
  472. return;
  473. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  474. if (!dev_node) {
  475. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  476. return;
  477. }
  478. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  479. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  480. ret = irq = of_irq_get_byname(dev_node,
  481. "qcom,smp2p-early-crash-ind");
  482. if (ret < 0) {
  483. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  484. irq);
  485. return;
  486. }
  487. }
  488. ret = devm_request_threaded_irq(dev, irq, NULL,
  489. fw_crash_indication_handler,
  490. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  491. "wlanfw-early-crash-ind", priv);
  492. if (ret < 0) {
  493. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  494. irq, ret);
  495. return;
  496. }
  497. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  498. priv->fw_early_crash_irq = irq;
  499. }
  500. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  501. {
  502. struct icnss_priv *priv = ctx;
  503. if (priv)
  504. complete(&priv->smp2p_soc_wake_wait);
  505. return IRQ_HANDLED;
  506. }
  507. static void register_soc_wake_notif(struct device *dev)
  508. {
  509. struct icnss_priv *priv = dev_get_drvdata(dev);
  510. struct device_node *dev_node;
  511. int irq = 0, ret = 0;
  512. if (!priv)
  513. return;
  514. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  515. if (!dev_node) {
  516. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  517. return;
  518. }
  519. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  520. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  521. ret = irq = of_irq_get_byname(dev_node,
  522. "qcom,smp2p-soc-wake-ack");
  523. if (ret < 0) {
  524. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  525. irq);
  526. return;
  527. }
  528. }
  529. ret = devm_request_threaded_irq(dev, irq, NULL,
  530. fw_soc_wake_ack_handler,
  531. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  532. IRQF_TRIGGER_FALLING,
  533. "wlanfw-soc-wake-ack", priv);
  534. if (ret < 0) {
  535. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  536. irq, ret);
  537. return;
  538. }
  539. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  540. priv->fw_soc_wake_ack_irq = irq;
  541. }
  542. int icnss_call_driver_uevent(struct icnss_priv *priv,
  543. enum icnss_uevent uevent, void *data)
  544. {
  545. struct icnss_uevent_data uevent_data;
  546. if (!priv->ops || !priv->ops->uevent)
  547. return 0;
  548. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  549. priv->state, uevent);
  550. uevent_data.uevent = uevent;
  551. uevent_data.data = data;
  552. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  553. }
  554. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  555. {
  556. int i;
  557. int ret = 0;
  558. ret = icnss_qmi_get_dms_mac(priv);
  559. if (ret == 0 && priv->dms.mac_valid)
  560. goto qmi_send;
  561. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  562. * Thus assert on failure to get MAC from DMS even after retries
  563. */
  564. if (priv->use_nv_mac) {
  565. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  566. if (priv->dms.mac_valid)
  567. break;
  568. ret = icnss_qmi_get_dms_mac(priv);
  569. if (ret != -EAGAIN)
  570. break;
  571. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  572. }
  573. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  574. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  575. ICNSS_ASSERT(0);
  576. return -EINVAL;
  577. }
  578. }
  579. qmi_send:
  580. if (priv->dms.mac_valid)
  581. ret =
  582. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  583. ARRAY_SIZE(priv->dms.mac));
  584. return ret;
  585. }
  586. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  587. enum smp2p_out_entry smp2p_entry)
  588. {
  589. int retry = 0;
  590. int error;
  591. if (priv->smp2p_info[smp2p_entry].smem_state)
  592. return;
  593. retry:
  594. priv->smp2p_info[smp2p_entry].smem_state =
  595. qcom_smem_state_get(&priv->pdev->dev,
  596. icnss_smp2p_str[smp2p_entry],
  597. &priv->smp2p_info[smp2p_entry].smem_bit);
  598. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  599. if (retry++ < SMP2P_GET_MAX_RETRY) {
  600. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  601. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  602. error, icnss_smp2p_str[smp2p_entry]);
  603. msleep(SMP2P_GET_RETRY_DELAY_MS);
  604. goto retry;
  605. }
  606. ICNSS_ASSERT(0);
  607. return;
  608. }
  609. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  610. }
  611. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  612. void *data)
  613. {
  614. int ret = 0;
  615. bool ignore_assert = false;
  616. if (!priv)
  617. return -ENODEV;
  618. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  619. clear_bit(ICNSS_FW_DOWN, &priv->state);
  620. clear_bit(ICNSS_FW_READY, &priv->state);
  621. icnss_ignore_fw_timeout(false);
  622. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  623. icnss_pr_err("QMI Server already in Connected State\n");
  624. ICNSS_ASSERT(0);
  625. }
  626. ret = icnss_connect_to_fw_server(priv, data);
  627. if (ret)
  628. goto fail;
  629. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  630. ret = wlfw_ind_register_send_sync_msg(priv);
  631. if (ret < 0) {
  632. if (ret == -EALREADY) {
  633. ret = 0;
  634. goto qmi_registered;
  635. }
  636. ignore_assert = true;
  637. goto fail;
  638. }
  639. if (priv->device_id == WCN6750_DEVICE_ID) {
  640. ret = wlfw_host_cap_send_sync(priv);
  641. if (ret < 0)
  642. goto fail;
  643. }
  644. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  645. if (!priv->msa_va) {
  646. icnss_pr_err("Invalid MSA address\n");
  647. ret = -EINVAL;
  648. goto fail;
  649. }
  650. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  651. if (ret < 0) {
  652. ignore_assert = true;
  653. goto fail;
  654. }
  655. ret = wlfw_msa_ready_send_sync_msg(priv);
  656. if (ret < 0) {
  657. ignore_assert = true;
  658. goto fail;
  659. }
  660. }
  661. ret = wlfw_cap_send_sync_msg(priv);
  662. if (ret < 0) {
  663. ignore_assert = true;
  664. goto fail;
  665. }
  666. ret = icnss_hw_power_on(priv);
  667. if (ret)
  668. goto fail;
  669. if (priv->device_id == WCN6750_DEVICE_ID) {
  670. ret = wlfw_device_info_send_msg(priv);
  671. if (ret < 0) {
  672. ignore_assert = true;
  673. goto device_info_failure;
  674. }
  675. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  676. priv->mem_base_pa,
  677. priv->mem_base_size);
  678. if (!priv->mem_base_va) {
  679. icnss_pr_err("Ioremap failed for bar address\n");
  680. goto device_info_failure;
  681. }
  682. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  683. &priv->mem_base_pa,
  684. priv->mem_base_va);
  685. if (priv->mhi_state_info_pa)
  686. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  687. priv->mhi_state_info_pa,
  688. PAGE_SIZE);
  689. if (!priv->mhi_state_info_va)
  690. icnss_pr_err("Ioremap failed for MHI info address\n");
  691. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  692. &priv->mhi_state_info_pa,
  693. priv->mhi_state_info_va);
  694. }
  695. if (priv->bdf_download_support) {
  696. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  697. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  698. priv->ctrl_params.bdf_type);
  699. if (ret < 0)
  700. goto device_info_failure;
  701. }
  702. if (priv->device_id == WCN6750_DEVICE_ID) {
  703. if (!priv->fw_soc_wake_ack_irq)
  704. register_soc_wake_notif(&priv->pdev->dev);
  705. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  706. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  707. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  708. }
  709. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  710. if (priv->bdf_download_support) {
  711. ret = wlfw_cal_report_req(priv);
  712. if (ret < 0)
  713. goto device_info_failure;
  714. }
  715. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  716. dynamic_feature_mask);
  717. }
  718. if (!priv->fw_error_fatal_irq)
  719. register_fw_error_notifications(&priv->pdev->dev);
  720. if (!priv->fw_early_crash_irq)
  721. register_early_crash_notifications(&priv->pdev->dev);
  722. if (priv->vbatt_supported)
  723. icnss_init_vph_monitor(priv);
  724. return ret;
  725. device_info_failure:
  726. icnss_hw_power_off(priv);
  727. fail:
  728. ICNSS_ASSERT(ignore_assert);
  729. qmi_registered:
  730. return ret;
  731. }
  732. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  733. {
  734. if (!priv)
  735. return -ENODEV;
  736. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  737. icnss_clear_server(priv);
  738. if (priv->adc_tm_dev && priv->vbatt_supported)
  739. adc_tm_disable_chan_meas(priv->adc_tm_dev,
  740. &priv->vph_monitor_params);
  741. return 0;
  742. }
  743. static int icnss_call_driver_probe(struct icnss_priv *priv)
  744. {
  745. int ret = 0;
  746. int probe_cnt = 0;
  747. if (!priv->ops || !priv->ops->probe)
  748. return 0;
  749. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  750. return -EINVAL;
  751. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  752. icnss_hw_power_on(priv);
  753. icnss_block_shutdown(true);
  754. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  755. ret = priv->ops->probe(&priv->pdev->dev);
  756. probe_cnt++;
  757. if (ret != -EPROBE_DEFER)
  758. break;
  759. }
  760. if (ret < 0) {
  761. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  762. ret, priv->state, probe_cnt);
  763. icnss_block_shutdown(false);
  764. goto out;
  765. }
  766. icnss_block_shutdown(false);
  767. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  768. return 0;
  769. out:
  770. icnss_hw_power_off(priv);
  771. return ret;
  772. }
  773. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  774. {
  775. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  776. goto out;
  777. if (!priv->ops || !priv->ops->shutdown)
  778. goto out;
  779. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  780. goto out;
  781. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  782. priv->ops->shutdown(&priv->pdev->dev);
  783. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  784. out:
  785. return 0;
  786. }
  787. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  788. {
  789. int ret = 0;
  790. icnss_pm_relax(priv);
  791. icnss_call_driver_shutdown(priv);
  792. clear_bit(ICNSS_PDR, &priv->state);
  793. clear_bit(ICNSS_REJUVENATE, &priv->state);
  794. clear_bit(ICNSS_PD_RESTART, &priv->state);
  795. priv->early_crash_ind = false;
  796. priv->is_ssr = false;
  797. if (!priv->ops || !priv->ops->reinit)
  798. goto out;
  799. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  800. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  801. priv->state);
  802. goto out;
  803. }
  804. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  805. goto call_probe;
  806. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  807. icnss_hw_power_on(priv);
  808. icnss_block_shutdown(true);
  809. ret = priv->ops->reinit(&priv->pdev->dev);
  810. if (ret < 0) {
  811. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  812. ret, priv->state);
  813. if (!priv->allow_recursive_recovery)
  814. ICNSS_ASSERT(false);
  815. icnss_block_shutdown(false);
  816. goto out_power_off;
  817. }
  818. icnss_block_shutdown(false);
  819. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  820. return 0;
  821. call_probe:
  822. return icnss_call_driver_probe(priv);
  823. out_power_off:
  824. icnss_hw_power_off(priv);
  825. out:
  826. return ret;
  827. }
  828. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  829. {
  830. int ret = 0;
  831. if (!priv)
  832. return -ENODEV;
  833. set_bit(ICNSS_FW_READY, &priv->state);
  834. clear_bit(ICNSS_MODE_ON, &priv->state);
  835. atomic_set(&priv->soc_wake_ref_count, 0);
  836. if (priv->device_id == WCN6750_DEVICE_ID)
  837. icnss_free_qdss_mem(priv);
  838. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  839. icnss_hw_power_off(priv);
  840. if (!priv->pdev) {
  841. icnss_pr_err("Device is not ready\n");
  842. ret = -ENODEV;
  843. goto out;
  844. }
  845. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  846. ret = icnss_pd_restart_complete(priv);
  847. } else {
  848. if (priv->device_id == WCN6750_DEVICE_ID)
  849. icnss_setup_dms_mac(priv);
  850. ret = icnss_call_driver_probe(priv);
  851. }
  852. icnss_vreg_unvote(priv);
  853. out:
  854. return ret;
  855. }
  856. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  857. {
  858. int ret = 0;
  859. if (!priv)
  860. return -ENODEV;
  861. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  862. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  863. icnss_pr_info("Failed to download qdss configuration file");
  864. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  865. ret = wlfw_wlan_mode_send_sync_msg(priv,
  866. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  867. else
  868. icnss_driver_event_fw_ready_ind(priv, NULL);
  869. return ret;
  870. }
  871. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  872. {
  873. struct platform_device *pdev = priv->pdev;
  874. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  875. int i, j;
  876. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  877. if (!qdss_mem[i].va && qdss_mem[i].size) {
  878. qdss_mem[i].va =
  879. dma_alloc_coherent(&pdev->dev,
  880. qdss_mem[i].size,
  881. &qdss_mem[i].pa,
  882. GFP_KERNEL);
  883. if (!qdss_mem[i].va) {
  884. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  885. qdss_mem[i].size,
  886. qdss_mem[i].type, i);
  887. break;
  888. }
  889. }
  890. }
  891. /* Best-effort allocation for QDSS trace */
  892. if (i < priv->qdss_mem_seg_len) {
  893. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  894. qdss_mem[j].type = 0;
  895. qdss_mem[j].size = 0;
  896. }
  897. priv->qdss_mem_seg_len = i;
  898. }
  899. return 0;
  900. }
  901. void icnss_free_qdss_mem(struct icnss_priv *priv)
  902. {
  903. struct platform_device *pdev = priv->pdev;
  904. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  905. int i;
  906. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  907. if (qdss_mem[i].va && qdss_mem[i].size) {
  908. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  909. &qdss_mem[i].pa, qdss_mem[i].size,
  910. qdss_mem[i].type);
  911. dma_free_coherent(&pdev->dev,
  912. qdss_mem[i].size, qdss_mem[i].va,
  913. qdss_mem[i].pa);
  914. qdss_mem[i].va = NULL;
  915. qdss_mem[i].pa = 0;
  916. qdss_mem[i].size = 0;
  917. qdss_mem[i].type = 0;
  918. }
  919. }
  920. priv->qdss_mem_seg_len = 0;
  921. }
  922. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  923. {
  924. int ret = 0;
  925. ret = icnss_alloc_qdss_mem(priv);
  926. if (ret < 0)
  927. return ret;
  928. return wlfw_qdss_trace_mem_info_send_sync(priv);
  929. }
  930. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  931. u64 pa, u32 size, int *seg_id)
  932. {
  933. int i = 0;
  934. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  935. u64 offset = 0;
  936. void *va = NULL;
  937. u64 local_pa;
  938. u32 local_size;
  939. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  940. local_pa = (u64)qdss_mem[i].pa;
  941. local_size = (u32)qdss_mem[i].size;
  942. if (pa == local_pa && size <= local_size) {
  943. va = qdss_mem[i].va;
  944. break;
  945. }
  946. if (pa > local_pa &&
  947. pa < local_pa + local_size &&
  948. pa + size <= local_pa + local_size) {
  949. offset = pa - local_pa;
  950. va = qdss_mem[i].va + offset;
  951. break;
  952. }
  953. }
  954. *seg_id = i;
  955. return va;
  956. }
  957. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  958. void *data)
  959. {
  960. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  961. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  962. int ret = 0;
  963. int i;
  964. void *va = NULL;
  965. u64 pa;
  966. u32 size;
  967. int seg_id = 0;
  968. if (!priv->qdss_mem_seg_len) {
  969. icnss_pr_err("Memory for QDSS trace is not available\n");
  970. return -ENOMEM;
  971. }
  972. if (event_data->mem_seg_len == 0) {
  973. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  974. ret = icnss_genl_send_msg(qdss_mem[i].va,
  975. ICNSS_GENL_MSG_TYPE_QDSS,
  976. event_data->file_name,
  977. qdss_mem[i].size);
  978. if (ret < 0) {
  979. icnss_pr_err("Fail to save QDSS data: %d\n",
  980. ret);
  981. break;
  982. }
  983. }
  984. } else {
  985. for (i = 0; i < event_data->mem_seg_len; i++) {
  986. pa = event_data->mem_seg[i].addr;
  987. size = event_data->mem_seg[i].size;
  988. va = icnss_qdss_trace_pa_to_va(priv, pa,
  989. size, &seg_id);
  990. if (!va) {
  991. icnss_pr_err("Fail to find matching va for pa %pa\n",
  992. &pa);
  993. ret = -EINVAL;
  994. break;
  995. }
  996. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  997. event_data->file_name, size);
  998. if (ret < 0) {
  999. icnss_pr_err("Fail to save QDSS data: %d\n",
  1000. ret);
  1001. break;
  1002. }
  1003. }
  1004. }
  1005. kfree(data);
  1006. return ret;
  1007. }
  1008. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1009. {
  1010. int dec, c = atomic_read(v);
  1011. do {
  1012. dec = c - 1;
  1013. if (unlikely(dec < 1))
  1014. break;
  1015. } while (!atomic_try_cmpxchg(v, &c, dec));
  1016. return dec;
  1017. }
  1018. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1019. void *data)
  1020. {
  1021. int ret = 0;
  1022. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1023. if (!priv)
  1024. return -ENODEV;
  1025. if (!data)
  1026. return -EINVAL;
  1027. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1028. event_data->total_size);
  1029. kfree(data);
  1030. return ret;
  1031. }
  1032. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1033. {
  1034. int ret = 0;
  1035. if (!priv)
  1036. return -ENODEV;
  1037. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1038. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1039. atomic_read(&priv->soc_wake_ref_count));
  1040. return 0;
  1041. }
  1042. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1043. ICNSS_SMP2P_OUT_SOC_WAKE);
  1044. if (!ret)
  1045. atomic_inc(&priv->soc_wake_ref_count);
  1046. return ret;
  1047. }
  1048. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1049. {
  1050. int ret = 0;
  1051. if (!priv)
  1052. return -ENODEV;
  1053. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1054. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1055. priv->soc_wake_ref_count);
  1056. return 0;
  1057. }
  1058. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1059. ICNSS_SMP2P_OUT_SOC_WAKE);
  1060. return ret;
  1061. }
  1062. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1063. void *data)
  1064. {
  1065. int ret = 0;
  1066. int probe_cnt = 0;
  1067. if (priv->ops)
  1068. return -EEXIST;
  1069. priv->ops = data;
  1070. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1071. set_bit(ICNSS_FW_READY, &priv->state);
  1072. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1073. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1074. priv->state);
  1075. return -ENODEV;
  1076. }
  1077. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1078. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1079. priv->state);
  1080. goto out;
  1081. }
  1082. ret = icnss_hw_power_on(priv);
  1083. if (ret)
  1084. goto out;
  1085. icnss_block_shutdown(true);
  1086. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1087. ret = priv->ops->probe(&priv->pdev->dev);
  1088. probe_cnt++;
  1089. if (ret != -EPROBE_DEFER)
  1090. break;
  1091. }
  1092. if (ret) {
  1093. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1094. ret, priv->state, probe_cnt);
  1095. icnss_block_shutdown(false);
  1096. goto power_off;
  1097. }
  1098. icnss_block_shutdown(false);
  1099. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1100. return 0;
  1101. power_off:
  1102. icnss_hw_power_off(priv);
  1103. out:
  1104. return ret;
  1105. }
  1106. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1107. void *data)
  1108. {
  1109. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1110. priv->ops = NULL;
  1111. goto out;
  1112. }
  1113. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1114. icnss_block_shutdown(true);
  1115. if (priv->ops)
  1116. priv->ops->remove(&priv->pdev->dev);
  1117. icnss_block_shutdown(false);
  1118. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1119. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1120. priv->ops = NULL;
  1121. icnss_hw_power_off(priv);
  1122. out:
  1123. return 0;
  1124. }
  1125. static int icnss_fw_crashed(struct icnss_priv *priv,
  1126. struct icnss_event_pd_service_down_data *event_data)
  1127. {
  1128. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1129. set_bit(ICNSS_PD_RESTART, &priv->state);
  1130. clear_bit(ICNSS_FW_READY, &priv->state);
  1131. icnss_pm_stay_awake(priv);
  1132. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1133. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1134. if (event_data && event_data->fw_rejuvenate)
  1135. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1136. return 0;
  1137. }
  1138. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1139. struct icnss_uevent_hang_data *hang_data)
  1140. {
  1141. if (!priv->hang_event_data_va)
  1142. return -EINVAL;
  1143. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1144. priv->hang_event_data_len,
  1145. GFP_ATOMIC);
  1146. if (!priv->hang_event_data)
  1147. return -ENOMEM;
  1148. // Update the hang event params
  1149. hang_data->hang_event_data = priv->hang_event_data;
  1150. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1151. return 0;
  1152. }
  1153. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1154. {
  1155. struct icnss_uevent_hang_data hang_data = {0};
  1156. int ret = 0xFF;
  1157. if (priv->early_crash_ind) {
  1158. ret = icnss_update_hang_event_data(priv, &hang_data);
  1159. if (ret)
  1160. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1161. }
  1162. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1163. &hang_data);
  1164. if (!ret) {
  1165. kfree(priv->hang_event_data);
  1166. priv->hang_event_data = NULL;
  1167. }
  1168. return 0;
  1169. }
  1170. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1171. void *data)
  1172. {
  1173. struct icnss_event_pd_service_down_data *event_data = data;
  1174. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1175. icnss_ignore_fw_timeout(false);
  1176. goto out;
  1177. }
  1178. if (priv->force_err_fatal)
  1179. ICNSS_ASSERT(0);
  1180. if (priv->device_id == WCN6750_DEVICE_ID) {
  1181. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1182. ICNSS_SMP2P_OUT_POWER_SAVE);
  1183. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1184. ICNSS_SMP2P_OUT_SOC_WAKE);
  1185. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1186. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1187. }
  1188. icnss_send_hang_event_data(priv);
  1189. if (priv->early_crash_ind) {
  1190. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1191. event_data->crashed, priv->state);
  1192. goto out;
  1193. }
  1194. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1195. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1196. event_data->crashed, priv->state);
  1197. if (!priv->allow_recursive_recovery)
  1198. ICNSS_ASSERT(0);
  1199. goto out;
  1200. }
  1201. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1202. icnss_fw_crashed(priv, event_data);
  1203. out:
  1204. kfree(data);
  1205. return 0;
  1206. }
  1207. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1208. void *data)
  1209. {
  1210. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1211. icnss_ignore_fw_timeout(false);
  1212. goto out;
  1213. }
  1214. priv->early_crash_ind = true;
  1215. icnss_fw_crashed(priv, NULL);
  1216. out:
  1217. kfree(data);
  1218. return 0;
  1219. }
  1220. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1221. void *data)
  1222. {
  1223. int ret = 0;
  1224. if (!priv->ops || !priv->ops->idle_shutdown)
  1225. return 0;
  1226. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1227. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1228. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1229. ret = -EBUSY;
  1230. } else {
  1231. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1232. priv->state);
  1233. icnss_block_shutdown(true);
  1234. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1235. icnss_block_shutdown(false);
  1236. }
  1237. return ret;
  1238. }
  1239. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1240. void *data)
  1241. {
  1242. int ret = 0;
  1243. if (!priv->ops || !priv->ops->idle_restart)
  1244. return 0;
  1245. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1246. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1247. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1248. ret = -EBUSY;
  1249. } else {
  1250. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1251. priv->state);
  1252. icnss_block_shutdown(true);
  1253. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1254. icnss_block_shutdown(false);
  1255. }
  1256. return ret;
  1257. }
  1258. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1259. {
  1260. icnss_free_qdss_mem(priv);
  1261. return 0;
  1262. }
  1263. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1264. void *data)
  1265. {
  1266. struct icnss_m3_upload_segments_req_data *event_data = data;
  1267. struct qcom_dump_segment segment;
  1268. int i, status = 0, ret = 0;
  1269. struct list_head head;
  1270. if (!dump_enabled()) {
  1271. icnss_pr_info("Dump collection is not enabled\n");
  1272. return ret;
  1273. }
  1274. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1275. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1276. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1277. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1278. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1279. return ret;
  1280. INIT_LIST_HEAD(&head);
  1281. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1282. memset(&segment, 0, sizeof(segment));
  1283. segment.va = devm_ioremap(&priv->pdev->dev,
  1284. event_data->m3_segment[i].addr,
  1285. event_data->m3_segment[i].size);
  1286. if (!segment.va) {
  1287. icnss_pr_err("Failed to ioremap M3 Dump region");
  1288. ret = -ENOMEM;
  1289. goto send_resp;
  1290. }
  1291. segment.size = event_data->m3_segment[i].size;
  1292. list_add(&segment.node, &head);
  1293. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1294. event_data->m3_segment[i].name);
  1295. switch (event_data->m3_segment[i].type) {
  1296. case QMI_M3_SEGMENT_PHYAREG_V01:
  1297. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1298. break;
  1299. case QMI_M3_SEGMENT_PHYDBG_V01:
  1300. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1301. break;
  1302. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1303. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1304. break;
  1305. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1306. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1307. break;
  1308. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1309. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1310. break;
  1311. default:
  1312. icnss_pr_err("Invalid Segment type: %d",
  1313. event_data->m3_segment[i].type);
  1314. }
  1315. if (ret) {
  1316. status = ret;
  1317. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1318. event_data->m3_segment[i].name, ret);
  1319. }
  1320. list_del(&segment.node);
  1321. }
  1322. send_resp:
  1323. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1324. status);
  1325. return ret;
  1326. }
  1327. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1328. {
  1329. int ret = 0;
  1330. struct icnss_subsys_restart_level_data *event_data = data;
  1331. if (!priv)
  1332. return -ENODEV;
  1333. if (!data)
  1334. return -EINVAL;
  1335. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1336. kfree(data);
  1337. return ret;
  1338. }
  1339. static void icnss_driver_event_work(struct work_struct *work)
  1340. {
  1341. struct icnss_priv *priv =
  1342. container_of(work, struct icnss_priv, event_work);
  1343. struct icnss_driver_event *event;
  1344. unsigned long flags;
  1345. int ret;
  1346. icnss_pm_stay_awake(priv);
  1347. spin_lock_irqsave(&priv->event_lock, flags);
  1348. while (!list_empty(&priv->event_list)) {
  1349. event = list_first_entry(&priv->event_list,
  1350. struct icnss_driver_event, list);
  1351. list_del(&event->list);
  1352. spin_unlock_irqrestore(&priv->event_lock, flags);
  1353. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1354. icnss_driver_event_to_str(event->type),
  1355. event->sync ? "-sync" : "", event->type,
  1356. priv->state);
  1357. switch (event->type) {
  1358. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1359. ret = icnss_driver_event_server_arrive(priv,
  1360. event->data);
  1361. break;
  1362. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1363. ret = icnss_driver_event_server_exit(priv);
  1364. break;
  1365. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1366. ret = icnss_driver_event_fw_ready_ind(priv,
  1367. event->data);
  1368. break;
  1369. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1370. ret = icnss_driver_event_register_driver(priv,
  1371. event->data);
  1372. break;
  1373. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1374. ret = icnss_driver_event_unregister_driver(priv,
  1375. event->data);
  1376. break;
  1377. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1378. ret = icnss_driver_event_pd_service_down(priv,
  1379. event->data);
  1380. break;
  1381. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1382. ret = icnss_driver_event_early_crash_ind(priv,
  1383. event->data);
  1384. break;
  1385. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1386. ret = icnss_driver_event_idle_shutdown(priv,
  1387. event->data);
  1388. break;
  1389. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1390. ret = icnss_driver_event_idle_restart(priv,
  1391. event->data);
  1392. break;
  1393. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1394. ret = icnss_driver_event_fw_init_done(priv,
  1395. event->data);
  1396. break;
  1397. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1398. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1399. break;
  1400. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1401. ret = icnss_qdss_trace_save_hdlr(priv,
  1402. event->data);
  1403. break;
  1404. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1405. ret = icnss_qdss_trace_free_hdlr(priv);
  1406. break;
  1407. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1408. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1409. break;
  1410. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1411. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1412. event->data);
  1413. break;
  1414. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1415. ret = icnss_subsys_restart_level(priv, event->data);
  1416. break;
  1417. default:
  1418. icnss_pr_err("Invalid Event type: %d", event->type);
  1419. kfree(event);
  1420. continue;
  1421. }
  1422. priv->stats.events[event->type].processed++;
  1423. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1424. icnss_driver_event_to_str(event->type),
  1425. event->sync ? "-sync" : "", event->type, ret,
  1426. priv->state);
  1427. spin_lock_irqsave(&priv->event_lock, flags);
  1428. if (event->sync) {
  1429. event->ret = ret;
  1430. complete(&event->complete);
  1431. continue;
  1432. }
  1433. spin_unlock_irqrestore(&priv->event_lock, flags);
  1434. kfree(event);
  1435. spin_lock_irqsave(&priv->event_lock, flags);
  1436. }
  1437. spin_unlock_irqrestore(&priv->event_lock, flags);
  1438. icnss_pm_relax(priv);
  1439. }
  1440. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1441. {
  1442. struct icnss_priv *priv =
  1443. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1444. struct icnss_soc_wake_event *event;
  1445. unsigned long flags;
  1446. int ret;
  1447. icnss_pm_stay_awake(priv);
  1448. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1449. while (!list_empty(&priv->soc_wake_msg_list)) {
  1450. event = list_first_entry(&priv->soc_wake_msg_list,
  1451. struct icnss_soc_wake_event, list);
  1452. list_del(&event->list);
  1453. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1454. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1455. icnss_soc_wake_event_to_str(event->type),
  1456. event->sync ? "-sync" : "", event->type,
  1457. priv->state);
  1458. switch (event->type) {
  1459. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1460. ret = icnss_event_soc_wake_request(priv,
  1461. event->data);
  1462. break;
  1463. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1464. ret = icnss_event_soc_wake_release(priv,
  1465. event->data);
  1466. break;
  1467. default:
  1468. icnss_pr_err("Invalid Event type: %d", event->type);
  1469. kfree(event);
  1470. continue;
  1471. }
  1472. priv->stats.soc_wake_events[event->type].processed++;
  1473. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1474. icnss_soc_wake_event_to_str(event->type),
  1475. event->sync ? "-sync" : "", event->type, ret,
  1476. priv->state);
  1477. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1478. if (event->sync) {
  1479. event->ret = ret;
  1480. complete(&event->complete);
  1481. continue;
  1482. }
  1483. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1484. kfree(event);
  1485. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1486. }
  1487. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1488. icnss_pm_relax(priv);
  1489. }
  1490. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1491. {
  1492. int ret = 0;
  1493. struct qcom_dump_segment segment;
  1494. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1495. struct list_head head;
  1496. if (!dump_enabled()) {
  1497. icnss_pr_info("Dump collection is not enabled\n");
  1498. return ret;
  1499. }
  1500. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1501. return ret;
  1502. INIT_LIST_HEAD(&head);
  1503. memset(&segment, 0, sizeof(segment));
  1504. segment.va = priv->msa_va;
  1505. segment.size = priv->msa_mem_size;
  1506. list_add(&segment.node, &head);
  1507. if (!msa0_dump_dev->dev) {
  1508. icnss_pr_err("Created Dump Device not found\n");
  1509. return 0;
  1510. }
  1511. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1512. if (ret) {
  1513. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1514. return ret;
  1515. }
  1516. list_del(&segment.node);
  1517. return ret;
  1518. }
  1519. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1520. void *data)
  1521. {
  1522. struct qcom_ssr_notify_data *notif = data;
  1523. int ret = 0;
  1524. if (!notif->crashed) {
  1525. if (atomic_read(&priv->is_shutdown)) {
  1526. atomic_set(&priv->is_shutdown, false);
  1527. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1528. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1529. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1530. clear_bit(ICNSS_FW_READY, &priv->state);
  1531. icnss_driver_event_post(priv,
  1532. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1533. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1534. NULL);
  1535. }
  1536. }
  1537. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1538. if (!wait_for_completion_timeout(
  1539. &priv->unblock_shutdown,
  1540. msecs_to_jiffies(PROBE_TIMEOUT)))
  1541. icnss_pr_err("modem block shutdown timeout\n");
  1542. }
  1543. ret = wlfw_send_modem_shutdown_msg(priv);
  1544. if (ret < 0)
  1545. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1546. ret);
  1547. }
  1548. }
  1549. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1550. {
  1551. switch (code) {
  1552. case QCOM_SSR_BEFORE_POWERUP:
  1553. return "BEFORE_POWERUP";
  1554. case QCOM_SSR_AFTER_POWERUP:
  1555. return "AFTER_POWERUP";
  1556. case QCOM_SSR_BEFORE_SHUTDOWN:
  1557. return "BEFORE_SHUTDOWN";
  1558. case QCOM_SSR_AFTER_SHUTDOWN:
  1559. return "AFTER_SHUTDOWN";
  1560. default:
  1561. return "UNKNOWN";
  1562. }
  1563. };
  1564. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1565. unsigned long code,
  1566. void *data)
  1567. {
  1568. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1569. wpss_early_ssr_nb);
  1570. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1571. icnss_qcom_ssr_notify_state_to_str(code), code);
  1572. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1573. set_bit(ICNSS_FW_DOWN, &priv->state);
  1574. icnss_ignore_fw_timeout(true);
  1575. }
  1576. return NOTIFY_DONE;
  1577. }
  1578. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1579. unsigned long code,
  1580. void *data)
  1581. {
  1582. struct icnss_event_pd_service_down_data *event_data;
  1583. struct qcom_ssr_notify_data *notif = data;
  1584. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1585. wpss_ssr_nb);
  1586. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1587. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1588. icnss_qcom_ssr_notify_state_to_str(code), code);
  1589. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1590. icnss_pr_info("Collecting msa0 segment dump\n");
  1591. icnss_msa0_ramdump(priv);
  1592. goto out;
  1593. }
  1594. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1595. goto out;
  1596. priv->is_ssr = true;
  1597. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1598. priv->state, notif->crashed);
  1599. set_bit(ICNSS_FW_DOWN, &priv->state);
  1600. if (notif->crashed)
  1601. priv->stats.recovery.root_pd_crash++;
  1602. else
  1603. priv->stats.recovery.root_pd_shutdown++;
  1604. icnss_ignore_fw_timeout(true);
  1605. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1606. if (event_data == NULL)
  1607. return notifier_from_errno(-ENOMEM);
  1608. event_data->crashed = notif->crashed;
  1609. fw_down_data.crashed = !!notif->crashed;
  1610. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1611. clear_bit(ICNSS_FW_READY, &priv->state);
  1612. fw_down_data.crashed = !!notif->crashed;
  1613. icnss_call_driver_uevent(priv,
  1614. ICNSS_UEVENT_FW_DOWN,
  1615. &fw_down_data);
  1616. }
  1617. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1618. ICNSS_EVENT_SYNC, event_data);
  1619. out:
  1620. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1621. return NOTIFY_OK;
  1622. }
  1623. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1624. unsigned long code,
  1625. void *data)
  1626. {
  1627. struct icnss_event_pd_service_down_data *event_data;
  1628. struct qcom_ssr_notify_data *notif = data;
  1629. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1630. modem_ssr_nb);
  1631. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1632. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1633. icnss_qcom_ssr_notify_state_to_str(code), code);
  1634. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1635. icnss_pr_info("Collecting msa0 segment dump\n");
  1636. icnss_msa0_ramdump(priv);
  1637. goto out;
  1638. }
  1639. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1640. goto out;
  1641. priv->is_ssr = true;
  1642. if (notif->crashed) {
  1643. priv->stats.recovery.root_pd_crash++;
  1644. priv->root_pd_shutdown = false;
  1645. } else {
  1646. priv->stats.recovery.root_pd_shutdown++;
  1647. priv->root_pd_shutdown = true;
  1648. }
  1649. icnss_update_state_send_modem_shutdown(priv, data);
  1650. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1651. set_bit(ICNSS_FW_DOWN, &priv->state);
  1652. icnss_ignore_fw_timeout(true);
  1653. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1654. clear_bit(ICNSS_FW_READY, &priv->state);
  1655. fw_down_data.crashed = !!notif->crashed;
  1656. icnss_call_driver_uevent(priv,
  1657. ICNSS_UEVENT_FW_DOWN,
  1658. &fw_down_data);
  1659. }
  1660. goto out;
  1661. }
  1662. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1663. priv->state, notif->crashed);
  1664. set_bit(ICNSS_FW_DOWN, &priv->state);
  1665. icnss_ignore_fw_timeout(true);
  1666. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1667. if (event_data == NULL)
  1668. return notifier_from_errno(-ENOMEM);
  1669. event_data->crashed = notif->crashed;
  1670. fw_down_data.crashed = !!notif->crashed;
  1671. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1672. clear_bit(ICNSS_FW_READY, &priv->state);
  1673. fw_down_data.crashed = !!notif->crashed;
  1674. icnss_call_driver_uevent(priv,
  1675. ICNSS_UEVENT_FW_DOWN,
  1676. &fw_down_data);
  1677. }
  1678. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1679. ICNSS_EVENT_SYNC, event_data);
  1680. out:
  1681. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1682. return NOTIFY_OK;
  1683. }
  1684. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1685. {
  1686. int ret = 0;
  1687. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1688. priv->wpss_early_notify_handler =
  1689. qcom_register_early_ssr_notifier("wpss",
  1690. &priv->wpss_early_ssr_nb);
  1691. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1692. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1693. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1694. }
  1695. return ret;
  1696. }
  1697. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1698. {
  1699. int ret = 0;
  1700. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1701. /*
  1702. * Assign priority of icnss wpss notifier callback over IPA
  1703. * modem notifier callback which is 0
  1704. */
  1705. priv->wpss_ssr_nb.priority = 1;
  1706. priv->wpss_notify_handler =
  1707. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1708. if (IS_ERR(priv->wpss_notify_handler)) {
  1709. ret = PTR_ERR(priv->wpss_notify_handler);
  1710. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1711. }
  1712. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1713. return ret;
  1714. }
  1715. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1716. {
  1717. int ret = 0;
  1718. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1719. /*
  1720. * Assign priority of icnss modem notifier callback over IPA
  1721. * modem notifier callback which is 0
  1722. */
  1723. priv->modem_ssr_nb.priority = 1;
  1724. priv->modem_notify_handler =
  1725. qcom_register_ssr_notifier("modem", &priv->modem_ssr_nb);
  1726. if (IS_ERR(priv->modem_notify_handler)) {
  1727. ret = PTR_ERR(priv->modem_notify_handler);
  1728. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1729. }
  1730. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1731. return ret;
  1732. }
  1733. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1734. {
  1735. if (IS_ERR(priv->wpss_early_notify_handler))
  1736. return;
  1737. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1738. &priv->wpss_early_ssr_nb);
  1739. priv->wpss_early_notify_handler = NULL;
  1740. }
  1741. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1742. {
  1743. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1744. return 0;
  1745. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1746. &priv->wpss_ssr_nb);
  1747. priv->wpss_notify_handler = NULL;
  1748. return 0;
  1749. }
  1750. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1751. {
  1752. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1753. return 0;
  1754. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1755. &priv->modem_ssr_nb);
  1756. priv->modem_notify_handler = NULL;
  1757. return 0;
  1758. }
  1759. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1760. {
  1761. struct icnss_priv *priv = priv_cb;
  1762. struct icnss_event_pd_service_down_data *event_data;
  1763. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1764. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1765. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1766. state, priv->state);
  1767. switch (state) {
  1768. case SERVREG_SERVICE_STATE_DOWN:
  1769. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1770. if (!event_data)
  1771. return;
  1772. event_data->crashed = true;
  1773. if (!priv->is_ssr) {
  1774. set_bit(ICNSS_PDR, &penv->state);
  1775. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1776. cause = ICNSS_HOST_ERROR;
  1777. priv->stats.recovery.pdr_host_error++;
  1778. } else {
  1779. cause = ICNSS_FW_CRASH;
  1780. priv->stats.recovery.pdr_fw_crash++;
  1781. }
  1782. } else if (priv->root_pd_shutdown) {
  1783. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1784. event_data->crashed = false;
  1785. }
  1786. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1787. priv->state, icnss_pdr_cause[cause]);
  1788. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1789. set_bit(ICNSS_FW_DOWN, &priv->state);
  1790. icnss_ignore_fw_timeout(true);
  1791. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1792. clear_bit(ICNSS_FW_READY, &priv->state);
  1793. fw_down_data.crashed = event_data->crashed;
  1794. icnss_call_driver_uevent(priv,
  1795. ICNSS_UEVENT_FW_DOWN,
  1796. &fw_down_data);
  1797. }
  1798. }
  1799. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1800. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1801. ICNSS_EVENT_SYNC, event_data);
  1802. break;
  1803. case SERVREG_SERVICE_STATE_UP:
  1804. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1805. break;
  1806. default:
  1807. break;
  1808. }
  1809. return;
  1810. }
  1811. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1812. {
  1813. struct pdr_handle *handle = NULL;
  1814. struct pdr_service *service = NULL;
  1815. int err = 0;
  1816. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1817. if (IS_ERR_OR_NULL(handle)) {
  1818. err = PTR_ERR(handle);
  1819. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1820. goto out;
  1821. }
  1822. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1823. if (IS_ERR_OR_NULL(service)) {
  1824. err = PTR_ERR(service);
  1825. icnss_pr_err("Failed to add lookup, err %d", err);
  1826. goto out;
  1827. }
  1828. priv->pdr_handle = handle;
  1829. priv->pdr_service = service;
  1830. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1831. icnss_pr_info("PDR registration happened");
  1832. out:
  1833. return err;
  1834. }
  1835. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1836. {
  1837. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1838. return;
  1839. pdr_handle_release(priv->pdr_handle);
  1840. }
  1841. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1842. {
  1843. int ret = 0;
  1844. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1845. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1846. ret = PTR_ERR(priv->icnss_ramdump_class);
  1847. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1848. return ret;
  1849. }
  1850. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1851. ICNSS_RAMDUMP_NAME);
  1852. if (ret < 0) {
  1853. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1854. goto fail_alloc_major;
  1855. }
  1856. return 0;
  1857. fail_alloc_major:
  1858. class_destroy(priv->icnss_ramdump_class);
  1859. return ret;
  1860. }
  1861. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1862. {
  1863. int ret = 0;
  1864. struct icnss_ramdump_info *ramdump_info;
  1865. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1866. if (!ramdump_info)
  1867. return ERR_PTR(-ENOMEM);
  1868. if (!dev_name) {
  1869. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1870. return NULL;
  1871. }
  1872. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1873. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1874. if (ramdump_info->minor < 0) {
  1875. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1876. ramdump_info->minor);
  1877. ret = -ENODEV;
  1878. goto fail_out_of_minors;
  1879. }
  1880. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1881. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1882. ramdump_info->minor),
  1883. ramdump_info, ramdump_info->name);
  1884. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1885. ret = PTR_ERR(ramdump_info->dev);
  1886. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1887. ramdump_info->name, ret);
  1888. goto fail_device_create;
  1889. }
  1890. return (void *)ramdump_info;
  1891. fail_device_create:
  1892. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1893. fail_out_of_minors:
  1894. kfree(ramdump_info);
  1895. return ERR_PTR(ret);
  1896. }
  1897. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1898. {
  1899. int ret = 0;
  1900. if (!priv || !priv->pdev) {
  1901. icnss_pr_err("Platform priv or pdev is NULL\n");
  1902. return -EINVAL;
  1903. }
  1904. ret = icnss_ramdump_devnode_init(priv);
  1905. if (ret)
  1906. return ret;
  1907. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1908. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  1909. icnss_pr_err("Failed to create msa0 dump device!");
  1910. return -ENOMEM;
  1911. }
  1912. if (priv->device_id == WCN6750_DEVICE_ID) {
  1913. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1914. ICNSS_M3_SEGMENT(
  1915. ICNSS_M3_SEGMENT_PHYAREG));
  1916. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1917. !priv->m3_dump_phyareg->dev) {
  1918. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1919. return -ENOMEM;
  1920. }
  1921. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1922. ICNSS_M3_SEGMENT(
  1923. ICNSS_M3_SEGMENT_PHYA));
  1924. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1925. !priv->m3_dump_phydbg->dev) {
  1926. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1927. return -ENOMEM;
  1928. }
  1929. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1930. ICNSS_M3_SEGMENT(
  1931. ICNSS_M3_SEGMENT_WMACREG));
  1932. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1933. !priv->m3_dump_wmac0reg->dev) {
  1934. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1935. return -ENOMEM;
  1936. }
  1937. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1938. ICNSS_M3_SEGMENT(
  1939. ICNSS_M3_SEGMENT_WCSSDBG));
  1940. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1941. !priv->m3_dump_wcssdbg->dev) {
  1942. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1943. return -ENOMEM;
  1944. }
  1945. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1946. ICNSS_M3_SEGMENT(
  1947. ICNSS_M3_SEGMENT_PHYAM3));
  1948. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  1949. !priv->m3_dump_phyapdmem->dev) {
  1950. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1951. return -ENOMEM;
  1952. }
  1953. }
  1954. return 0;
  1955. }
  1956. static int icnss_enable_recovery(struct icnss_priv *priv)
  1957. {
  1958. int ret;
  1959. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  1960. icnss_pr_dbg("Recovery disabled through module parameter\n");
  1961. return 0;
  1962. }
  1963. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  1964. icnss_pr_dbg("SSR disabled through module parameter\n");
  1965. goto enable_pdr;
  1966. }
  1967. ret = icnss_register_ramdump_devices(priv);
  1968. if (ret)
  1969. return ret;
  1970. if (priv->device_id == WCN6750_DEVICE_ID) {
  1971. icnss_wpss_early_ssr_register_notifier(priv);
  1972. icnss_wpss_ssr_register_notifier(priv);
  1973. return 0;
  1974. }
  1975. icnss_modem_ssr_register_notifier(priv);
  1976. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  1977. icnss_pr_dbg("PDR disabled through module parameter\n");
  1978. return 0;
  1979. }
  1980. enable_pdr:
  1981. ret = icnss_pd_restart_enable(priv);
  1982. if (ret)
  1983. return ret;
  1984. return 0;
  1985. }
  1986. static int icnss_dev_id_match(struct icnss_priv *priv,
  1987. struct device_info *dev_info)
  1988. {
  1989. if (!dev_info) {
  1990. icnss_pr_info("WLAN driver devinfo is null, Continue driver loading");
  1991. return 1;
  1992. }
  1993. while (dev_info->device_id) {
  1994. if (priv->device_id == dev_info->device_id)
  1995. return 1;
  1996. dev_info++;
  1997. }
  1998. return 0;
  1999. }
  2000. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2001. unsigned long *thermal_state)
  2002. {
  2003. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2004. *thermal_state = icnss_tcdev->max_thermal_state;
  2005. return 0;
  2006. }
  2007. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2008. unsigned long *thermal_state)
  2009. {
  2010. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2011. *thermal_state = icnss_tcdev->curr_thermal_state;
  2012. return 0;
  2013. }
  2014. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2015. unsigned long thermal_state)
  2016. {
  2017. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2018. struct device *dev = &penv->pdev->dev;
  2019. int ret = 0;
  2020. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2021. return 0;
  2022. if (thermal_state > icnss_tcdev->max_thermal_state)
  2023. return -EINVAL;
  2024. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2025. thermal_state, icnss_tcdev->tcdev_id);
  2026. mutex_lock(&penv->tcdev_lock);
  2027. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2028. icnss_tcdev->tcdev_id);
  2029. if (!ret)
  2030. icnss_tcdev->curr_thermal_state = thermal_state;
  2031. mutex_unlock(&penv->tcdev_lock);
  2032. if (ret) {
  2033. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2034. ret, icnss_tcdev->tcdev_id);
  2035. return ret;
  2036. }
  2037. return 0;
  2038. }
  2039. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2040. .get_max_state = icnss_tcdev_get_max_state,
  2041. .get_cur_state = icnss_tcdev_get_cur_state,
  2042. .set_cur_state = icnss_tcdev_set_cur_state,
  2043. };
  2044. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2045. int tcdev_id)
  2046. {
  2047. struct icnss_priv *priv = dev_get_drvdata(dev);
  2048. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2049. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2050. struct device_node *dev_node;
  2051. int ret = 0;
  2052. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2053. if (!icnss_tcdev)
  2054. return -ENOMEM;
  2055. icnss_tcdev->tcdev_id = tcdev_id;
  2056. icnss_tcdev->max_thermal_state = max_state;
  2057. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2058. "qcom,icnss_cdev%d", tcdev_id);
  2059. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2060. if (!dev_node) {
  2061. icnss_pr_err("Failed to get cooling device node\n");
  2062. return -EINVAL;
  2063. }
  2064. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2065. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2066. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2067. dev_node,
  2068. cdev_node_name, icnss_tcdev,
  2069. &icnss_cooling_ops);
  2070. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2071. ret = PTR_ERR(icnss_tcdev->tcdev);
  2072. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2073. ret, icnss_tcdev->tcdev_id);
  2074. } else {
  2075. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2076. icnss_tcdev->tcdev_id);
  2077. list_add(&icnss_tcdev->tcdev_list,
  2078. &priv->icnss_tcdev_list);
  2079. }
  2080. } else {
  2081. icnss_pr_dbg("Cooling device registration not supported");
  2082. ret = -EOPNOTSUPP;
  2083. }
  2084. return ret;
  2085. }
  2086. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2087. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2088. {
  2089. struct icnss_priv *priv = dev_get_drvdata(dev);
  2090. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2091. while (!list_empty(&priv->icnss_tcdev_list)) {
  2092. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2093. struct icnss_thermal_cdev,
  2094. tcdev_list);
  2095. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2096. list_del(&icnss_tcdev->tcdev_list);
  2097. kfree(icnss_tcdev);
  2098. }
  2099. }
  2100. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2101. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2102. unsigned long *thermal_state,
  2103. int tcdev_id)
  2104. {
  2105. struct icnss_priv *priv = dev_get_drvdata(dev);
  2106. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2107. mutex_lock(&priv->tcdev_lock);
  2108. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2109. if (icnss_tcdev->tcdev_id != tcdev_id)
  2110. continue;
  2111. *thermal_state = icnss_tcdev->curr_thermal_state;
  2112. mutex_unlock(&priv->tcdev_lock);
  2113. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2114. icnss_tcdev->curr_thermal_state, tcdev_id);
  2115. return 0;
  2116. }
  2117. mutex_unlock(&priv->tcdev_lock);
  2118. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2119. return -EINVAL;
  2120. }
  2121. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2122. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2123. int cmd_len, void *cb_ctx,
  2124. int (*cb)(void *ctx, void *event, int event_len))
  2125. {
  2126. struct icnss_priv *priv = icnss_get_plat_priv();
  2127. int ret;
  2128. if (!priv)
  2129. return -ENODEV;
  2130. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2131. return -EINVAL;
  2132. priv->get_info_cb = cb;
  2133. priv->get_info_cb_ctx = cb_ctx;
  2134. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2135. if (ret) {
  2136. priv->get_info_cb = NULL;
  2137. priv->get_info_cb_ctx = NULL;
  2138. }
  2139. return ret;
  2140. }
  2141. EXPORT_SYMBOL(icnss_qmi_send);
  2142. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2143. struct module *owner, const char *mod_name)
  2144. {
  2145. int ret = 0;
  2146. struct icnss_priv *priv = icnss_get_plat_priv();
  2147. if (!priv || !priv->pdev) {
  2148. ret = -ENODEV;
  2149. goto out;
  2150. }
  2151. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2152. if (priv->ops) {
  2153. icnss_pr_err("Driver already registered\n");
  2154. ret = -EEXIST;
  2155. goto out;
  2156. }
  2157. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2158. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2159. ops->dev_info->name);
  2160. return -ENODEV;
  2161. }
  2162. if (!ops->probe || !ops->remove) {
  2163. ret = -EINVAL;
  2164. goto out;
  2165. }
  2166. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2167. 0, ops);
  2168. if (ret == -EINTR)
  2169. ret = 0;
  2170. out:
  2171. return ret;
  2172. }
  2173. EXPORT_SYMBOL(__icnss_register_driver);
  2174. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2175. {
  2176. int ret;
  2177. struct icnss_priv *priv = icnss_get_plat_priv();
  2178. if (!priv || !priv->pdev) {
  2179. ret = -ENODEV;
  2180. goto out;
  2181. }
  2182. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2183. if (!priv->ops) {
  2184. icnss_pr_err("Driver not registered\n");
  2185. ret = -ENOENT;
  2186. goto out;
  2187. }
  2188. ret = icnss_driver_event_post(priv,
  2189. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2190. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2191. out:
  2192. return ret;
  2193. }
  2194. EXPORT_SYMBOL(icnss_unregister_driver);
  2195. static struct icnss_msi_config msi_config = {
  2196. .total_vectors = 28,
  2197. .total_users = 2,
  2198. .users = (struct icnss_msi_user[]) {
  2199. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2200. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2201. },
  2202. };
  2203. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2204. {
  2205. priv->msi_config = &msi_config;
  2206. return 0;
  2207. }
  2208. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2209. int *num_vectors, u32 *user_base_data,
  2210. u32 *base_vector)
  2211. {
  2212. struct icnss_priv *priv = dev_get_drvdata(dev);
  2213. struct icnss_msi_config *msi_config;
  2214. int idx;
  2215. if (!priv)
  2216. return -ENODEV;
  2217. msi_config = priv->msi_config;
  2218. if (!msi_config) {
  2219. icnss_pr_err("MSI is not supported.\n");
  2220. return -EINVAL;
  2221. }
  2222. for (idx = 0; idx < msi_config->total_users; idx++) {
  2223. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2224. *num_vectors = msi_config->users[idx].num_vectors;
  2225. *user_base_data = msi_config->users[idx].base_vector
  2226. + priv->msi_base_data;
  2227. *base_vector = msi_config->users[idx].base_vector;
  2228. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2229. user_name, *num_vectors, *user_base_data,
  2230. *base_vector);
  2231. return 0;
  2232. }
  2233. }
  2234. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2235. return -EINVAL;
  2236. }
  2237. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2238. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2239. {
  2240. struct icnss_priv *priv = dev_get_drvdata(dev);
  2241. int irq_num;
  2242. irq_num = priv->srng_irqs[vector];
  2243. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2244. irq_num, vector);
  2245. return irq_num;
  2246. }
  2247. EXPORT_SYMBOL(icnss_get_msi_irq);
  2248. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2249. u32 *msi_addr_high)
  2250. {
  2251. struct icnss_priv *priv = dev_get_drvdata(dev);
  2252. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2253. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2254. }
  2255. EXPORT_SYMBOL(icnss_get_msi_address);
  2256. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2257. irqreturn_t (*handler)(int, void *),
  2258. unsigned long flags, const char *name, void *ctx)
  2259. {
  2260. int ret = 0;
  2261. unsigned int irq;
  2262. struct ce_irq_list *irq_entry;
  2263. struct icnss_priv *priv = dev_get_drvdata(dev);
  2264. if (!priv || !priv->pdev) {
  2265. ret = -ENODEV;
  2266. goto out;
  2267. }
  2268. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2269. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2270. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2271. ret = -EINVAL;
  2272. goto out;
  2273. }
  2274. irq = priv->ce_irqs[ce_id];
  2275. irq_entry = &priv->ce_irq_list[ce_id];
  2276. if (irq_entry->handler || irq_entry->irq) {
  2277. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2278. irq, ce_id);
  2279. ret = -EEXIST;
  2280. goto out;
  2281. }
  2282. ret = request_irq(irq, handler, flags, name, ctx);
  2283. if (ret) {
  2284. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2285. irq, ce_id, ret);
  2286. goto out;
  2287. }
  2288. irq_entry->irq = irq;
  2289. irq_entry->handler = handler;
  2290. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2291. penv->stats.ce_irqs[ce_id].request++;
  2292. out:
  2293. return ret;
  2294. }
  2295. EXPORT_SYMBOL(icnss_ce_request_irq);
  2296. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2297. {
  2298. int ret = 0;
  2299. unsigned int irq;
  2300. struct ce_irq_list *irq_entry;
  2301. if (!penv || !penv->pdev || !dev) {
  2302. ret = -ENODEV;
  2303. goto out;
  2304. }
  2305. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2306. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2307. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2308. ret = -EINVAL;
  2309. goto out;
  2310. }
  2311. irq = penv->ce_irqs[ce_id];
  2312. irq_entry = &penv->ce_irq_list[ce_id];
  2313. if (!irq_entry->handler || !irq_entry->irq) {
  2314. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2315. ret = -EEXIST;
  2316. goto out;
  2317. }
  2318. free_irq(irq, ctx);
  2319. irq_entry->irq = 0;
  2320. irq_entry->handler = NULL;
  2321. penv->stats.ce_irqs[ce_id].free++;
  2322. out:
  2323. return ret;
  2324. }
  2325. EXPORT_SYMBOL(icnss_ce_free_irq);
  2326. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2327. {
  2328. unsigned int irq;
  2329. if (!penv || !penv->pdev || !dev) {
  2330. icnss_pr_err("Platform driver not initialized\n");
  2331. return;
  2332. }
  2333. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2334. penv->state);
  2335. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2336. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2337. return;
  2338. }
  2339. penv->stats.ce_irqs[ce_id].enable++;
  2340. irq = penv->ce_irqs[ce_id];
  2341. enable_irq(irq);
  2342. }
  2343. EXPORT_SYMBOL(icnss_enable_irq);
  2344. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2345. {
  2346. unsigned int irq;
  2347. if (!penv || !penv->pdev || !dev) {
  2348. icnss_pr_err("Platform driver not initialized\n");
  2349. return;
  2350. }
  2351. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2352. penv->state);
  2353. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2354. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2355. ce_id);
  2356. return;
  2357. }
  2358. irq = penv->ce_irqs[ce_id];
  2359. disable_irq(irq);
  2360. penv->stats.ce_irqs[ce_id].disable++;
  2361. }
  2362. EXPORT_SYMBOL(icnss_disable_irq);
  2363. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2364. {
  2365. char *fw_build_timestamp = NULL;
  2366. struct icnss_priv *priv = dev_get_drvdata(dev);
  2367. if (!priv) {
  2368. icnss_pr_err("Platform driver not initialized\n");
  2369. return -EINVAL;
  2370. }
  2371. info->v_addr = priv->mem_base_va;
  2372. info->p_addr = priv->mem_base_pa;
  2373. info->chip_id = priv->chip_info.chip_id;
  2374. info->chip_family = priv->chip_info.chip_family;
  2375. info->board_id = priv->board_id;
  2376. info->soc_id = priv->soc_id;
  2377. info->fw_version = priv->fw_version_info.fw_version;
  2378. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2379. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2380. strlcpy(info->fw_build_timestamp,
  2381. priv->fw_version_info.fw_build_timestamp,
  2382. WLFW_MAX_TIMESTAMP_LEN + 1);
  2383. return 0;
  2384. }
  2385. EXPORT_SYMBOL(icnss_get_soc_info);
  2386. int icnss_get_mhi_state(struct device *dev)
  2387. {
  2388. struct icnss_priv *priv = dev_get_drvdata(dev);
  2389. if (!priv) {
  2390. icnss_pr_err("Platform driver not initialized\n");
  2391. return -EINVAL;
  2392. }
  2393. if (!priv->mhi_state_info_va)
  2394. return -ENOMEM;
  2395. return ioread32(priv->mhi_state_info_va);
  2396. }
  2397. EXPORT_SYMBOL(icnss_get_mhi_state);
  2398. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2399. {
  2400. int ret;
  2401. struct icnss_priv *priv;
  2402. if (!dev)
  2403. return -ENODEV;
  2404. priv = dev_get_drvdata(dev);
  2405. if (!priv) {
  2406. icnss_pr_err("Platform driver not initialized\n");
  2407. return -EINVAL;
  2408. }
  2409. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2410. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2411. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2412. priv->state);
  2413. return -EINVAL;
  2414. }
  2415. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2416. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2417. if (ret)
  2418. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2419. ret, fw_log_mode);
  2420. return ret;
  2421. }
  2422. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2423. int icnss_force_wake_request(struct device *dev)
  2424. {
  2425. struct icnss_priv *priv;
  2426. if (!dev)
  2427. return -ENODEV;
  2428. priv = dev_get_drvdata(dev);
  2429. if (!priv) {
  2430. icnss_pr_err("Platform driver not initialized\n");
  2431. return -EINVAL;
  2432. }
  2433. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2434. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2435. atomic_read(&priv->soc_wake_ref_count));
  2436. return 0;
  2437. }
  2438. icnss_pr_soc_wake("Calling SOC Wake request");
  2439. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2440. 0, NULL);
  2441. return 0;
  2442. }
  2443. EXPORT_SYMBOL(icnss_force_wake_request);
  2444. int icnss_force_wake_release(struct device *dev)
  2445. {
  2446. struct icnss_priv *priv;
  2447. if (!dev)
  2448. return -ENODEV;
  2449. priv = dev_get_drvdata(dev);
  2450. if (!priv) {
  2451. icnss_pr_err("Platform driver not initialized\n");
  2452. return -EINVAL;
  2453. }
  2454. icnss_pr_soc_wake("Calling SOC Wake response");
  2455. if (atomic_read(&priv->soc_wake_ref_count) &&
  2456. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2457. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2458. atomic_read(&priv->soc_wake_ref_count));
  2459. return 0;
  2460. }
  2461. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2462. 0, NULL);
  2463. return 0;
  2464. }
  2465. EXPORT_SYMBOL(icnss_force_wake_release);
  2466. int icnss_is_device_awake(struct device *dev)
  2467. {
  2468. struct icnss_priv *priv = dev_get_drvdata(dev);
  2469. if (!priv) {
  2470. icnss_pr_err("Platform driver not initialized\n");
  2471. return -EINVAL;
  2472. }
  2473. return atomic_read(&priv->soc_wake_ref_count);
  2474. }
  2475. EXPORT_SYMBOL(icnss_is_device_awake);
  2476. int icnss_is_pci_ep_awake(struct device *dev)
  2477. {
  2478. struct icnss_priv *priv = dev_get_drvdata(dev);
  2479. if (!priv) {
  2480. icnss_pr_err("Platform driver not initialized\n");
  2481. return -EINVAL;
  2482. }
  2483. if (!priv->mhi_state_info_va)
  2484. return -ENOMEM;
  2485. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2486. }
  2487. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2488. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2489. uint32_t mem_type, uint32_t data_len,
  2490. uint8_t *output)
  2491. {
  2492. int ret = 0;
  2493. struct icnss_priv *priv = dev_get_drvdata(dev);
  2494. if (priv->magic != ICNSS_MAGIC) {
  2495. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2496. dev, priv, priv->magic);
  2497. return -EINVAL;
  2498. }
  2499. if (!output || data_len == 0
  2500. || data_len > WLFW_MAX_DATA_SIZE) {
  2501. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2502. output, data_len);
  2503. ret = -EINVAL;
  2504. goto out;
  2505. }
  2506. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2507. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2508. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2509. priv->state);
  2510. ret = -EINVAL;
  2511. goto out;
  2512. }
  2513. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2514. data_len, output);
  2515. out:
  2516. return ret;
  2517. }
  2518. EXPORT_SYMBOL(icnss_athdiag_read);
  2519. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2520. uint32_t mem_type, uint32_t data_len,
  2521. uint8_t *input)
  2522. {
  2523. int ret = 0;
  2524. struct icnss_priv *priv = dev_get_drvdata(dev);
  2525. if (priv->magic != ICNSS_MAGIC) {
  2526. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2527. dev, priv, priv->magic);
  2528. return -EINVAL;
  2529. }
  2530. if (!input || data_len == 0
  2531. || data_len > WLFW_MAX_DATA_SIZE) {
  2532. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2533. input, data_len);
  2534. ret = -EINVAL;
  2535. goto out;
  2536. }
  2537. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2538. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2539. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2540. priv->state);
  2541. ret = -EINVAL;
  2542. goto out;
  2543. }
  2544. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2545. data_len, input);
  2546. out:
  2547. return ret;
  2548. }
  2549. EXPORT_SYMBOL(icnss_athdiag_write);
  2550. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2551. enum icnss_driver_mode mode,
  2552. const char *host_version)
  2553. {
  2554. struct icnss_priv *priv = dev_get_drvdata(dev);
  2555. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2556. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2557. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2558. priv->state);
  2559. return -EINVAL;
  2560. }
  2561. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2562. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2563. priv->state);
  2564. return -EINVAL;
  2565. }
  2566. if (priv->device_id == WCN6750_DEVICE_ID &&
  2567. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2568. icnss_setup_dms_mac(priv);
  2569. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2570. }
  2571. EXPORT_SYMBOL(icnss_wlan_enable);
  2572. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2573. {
  2574. struct icnss_priv *priv = dev_get_drvdata(dev);
  2575. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2576. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2577. priv->state);
  2578. return 0;
  2579. }
  2580. return icnss_send_wlan_disable_to_fw(priv);
  2581. }
  2582. EXPORT_SYMBOL(icnss_wlan_disable);
  2583. bool icnss_is_qmi_disable(struct device *dev)
  2584. {
  2585. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2586. }
  2587. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2588. int icnss_get_ce_id(struct device *dev, int irq)
  2589. {
  2590. int i;
  2591. if (!penv || !penv->pdev || !dev)
  2592. return -ENODEV;
  2593. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2594. if (penv->ce_irqs[i] == irq)
  2595. return i;
  2596. }
  2597. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2598. return -EINVAL;
  2599. }
  2600. EXPORT_SYMBOL(icnss_get_ce_id);
  2601. int icnss_get_irq(struct device *dev, int ce_id)
  2602. {
  2603. int irq;
  2604. if (!penv || !penv->pdev || !dev)
  2605. return -ENODEV;
  2606. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2607. return -EINVAL;
  2608. irq = penv->ce_irqs[ce_id];
  2609. return irq;
  2610. }
  2611. EXPORT_SYMBOL(icnss_get_irq);
  2612. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2613. {
  2614. struct icnss_priv *priv = dev_get_drvdata(dev);
  2615. if (!priv) {
  2616. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2617. return NULL;
  2618. }
  2619. return priv->iommu_domain;
  2620. }
  2621. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2622. int icnss_smmu_map(struct device *dev,
  2623. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2624. {
  2625. struct icnss_priv *priv = dev_get_drvdata(dev);
  2626. int flag = IOMMU_READ | IOMMU_WRITE;
  2627. bool dma_coherent = false;
  2628. unsigned long iova;
  2629. int prop_len = 0;
  2630. size_t len;
  2631. int ret = 0;
  2632. if (!priv) {
  2633. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2634. dev, priv);
  2635. return -EINVAL;
  2636. }
  2637. if (!iova_addr) {
  2638. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2639. &paddr, size);
  2640. return -EINVAL;
  2641. }
  2642. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2643. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2644. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2645. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2646. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2647. iova,
  2648. &priv->smmu_iova_ipa_start,
  2649. priv->smmu_iova_ipa_len);
  2650. return -ENOMEM;
  2651. }
  2652. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2653. icnss_pr_dbg("dma-coherent is %s\n",
  2654. dma_coherent ? "enabled" : "disabled");
  2655. if (dma_coherent)
  2656. flag |= IOMMU_CACHE;
  2657. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2658. ret = iommu_map(priv->iommu_domain, iova,
  2659. rounddown(paddr, PAGE_SIZE), len,
  2660. flag);
  2661. if (ret) {
  2662. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2663. return ret;
  2664. }
  2665. priv->smmu_iova_ipa_current = iova + len;
  2666. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2667. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2668. return 0;
  2669. }
  2670. EXPORT_SYMBOL(icnss_smmu_map);
  2671. int icnss_smmu_unmap(struct device *dev,
  2672. uint32_t iova_addr, size_t size)
  2673. {
  2674. struct icnss_priv *priv = dev_get_drvdata(dev);
  2675. unsigned long iova;
  2676. size_t len, unmapped_len;
  2677. if (!priv) {
  2678. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2679. dev, priv);
  2680. return -EINVAL;
  2681. }
  2682. if (!iova_addr) {
  2683. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2684. size);
  2685. return -EINVAL;
  2686. }
  2687. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2688. PAGE_SIZE);
  2689. iova = rounddown(iova_addr, PAGE_SIZE);
  2690. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2691. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2692. iova,
  2693. &priv->smmu_iova_ipa_start,
  2694. priv->smmu_iova_ipa_len);
  2695. return -ENOMEM;
  2696. }
  2697. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2698. iova, len);
  2699. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2700. if (unmapped_len != len) {
  2701. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2702. return -EINVAL;
  2703. }
  2704. priv->smmu_iova_ipa_current = iova;
  2705. return 0;
  2706. }
  2707. EXPORT_SYMBOL(icnss_smmu_unmap);
  2708. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2709. {
  2710. return socinfo_get_serial_number();
  2711. }
  2712. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2713. int icnss_trigger_recovery(struct device *dev)
  2714. {
  2715. int ret = 0;
  2716. struct icnss_priv *priv = dev_get_drvdata(dev);
  2717. if (priv->magic != ICNSS_MAGIC) {
  2718. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2719. ret = -EINVAL;
  2720. goto out;
  2721. }
  2722. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2723. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2724. priv->state);
  2725. ret = -EPERM;
  2726. goto out;
  2727. }
  2728. if (priv->device_id == WCN6750_DEVICE_ID) {
  2729. icnss_pr_vdbg("Initiate Root PD restart");
  2730. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2731. ICNSS_SMP2P_OUT_POWER_SAVE);
  2732. if (!ret)
  2733. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2734. return ret;
  2735. }
  2736. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2737. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2738. priv->state);
  2739. ret = -EOPNOTSUPP;
  2740. goto out;
  2741. }
  2742. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2743. priv->state);
  2744. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2745. if (!ret)
  2746. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2747. out:
  2748. return ret;
  2749. }
  2750. EXPORT_SYMBOL(icnss_trigger_recovery);
  2751. int icnss_idle_shutdown(struct device *dev)
  2752. {
  2753. struct icnss_priv *priv = dev_get_drvdata(dev);
  2754. if (!priv) {
  2755. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2756. return -EINVAL;
  2757. }
  2758. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2759. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2760. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2761. return -EBUSY;
  2762. }
  2763. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2764. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2765. }
  2766. EXPORT_SYMBOL(icnss_idle_shutdown);
  2767. int icnss_idle_restart(struct device *dev)
  2768. {
  2769. struct icnss_priv *priv = dev_get_drvdata(dev);
  2770. if (!priv) {
  2771. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2772. return -EINVAL;
  2773. }
  2774. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2775. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2776. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2777. return -EBUSY;
  2778. }
  2779. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2780. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2781. }
  2782. EXPORT_SYMBOL(icnss_idle_restart);
  2783. int icnss_exit_power_save(struct device *dev)
  2784. {
  2785. struct icnss_priv *priv = dev_get_drvdata(dev);
  2786. icnss_pr_vdbg("Calling Exit Power Save\n");
  2787. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2788. !test_bit(ICNSS_MODE_ON, &priv->state))
  2789. return 0;
  2790. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2791. ICNSS_SMP2P_OUT_POWER_SAVE);
  2792. }
  2793. EXPORT_SYMBOL(icnss_exit_power_save);
  2794. int icnss_prevent_l1(struct device *dev)
  2795. {
  2796. struct icnss_priv *priv = dev_get_drvdata(dev);
  2797. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2798. !test_bit(ICNSS_MODE_ON, &priv->state))
  2799. return 0;
  2800. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2801. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2802. }
  2803. EXPORT_SYMBOL(icnss_prevent_l1);
  2804. void icnss_allow_l1(struct device *dev)
  2805. {
  2806. struct icnss_priv *priv = dev_get_drvdata(dev);
  2807. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2808. !test_bit(ICNSS_MODE_ON, &priv->state))
  2809. return;
  2810. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2811. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2812. }
  2813. EXPORT_SYMBOL(icnss_allow_l1);
  2814. void icnss_allow_recursive_recovery(struct device *dev)
  2815. {
  2816. struct icnss_priv *priv = dev_get_drvdata(dev);
  2817. priv->allow_recursive_recovery = true;
  2818. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2819. }
  2820. void icnss_disallow_recursive_recovery(struct device *dev)
  2821. {
  2822. struct icnss_priv *priv = dev_get_drvdata(dev);
  2823. priv->allow_recursive_recovery = false;
  2824. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2825. }
  2826. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2827. {
  2828. struct kobject *icnss_kobject;
  2829. int ret = 0;
  2830. atomic_set(&priv->is_shutdown, false);
  2831. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2832. if (!icnss_kobject) {
  2833. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2834. return -EINVAL;
  2835. }
  2836. priv->icnss_kobject = icnss_kobject;
  2837. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2838. if (ret) {
  2839. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2840. return ret;
  2841. }
  2842. return ret;
  2843. }
  2844. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2845. {
  2846. struct kobject *icnss_kobject;
  2847. icnss_kobject = priv->icnss_kobject;
  2848. if (icnss_kobject)
  2849. kobject_put(icnss_kobject);
  2850. }
  2851. static ssize_t qdss_tr_start_store(struct device *dev,
  2852. struct device_attribute *attr,
  2853. const char *buf, size_t count)
  2854. {
  2855. struct icnss_priv *priv = dev_get_drvdata(dev);
  2856. wlfw_qdss_trace_start(priv);
  2857. icnss_pr_dbg("Received QDSS start command\n");
  2858. return count;
  2859. }
  2860. static ssize_t qdss_tr_stop_store(struct device *dev,
  2861. struct device_attribute *attr,
  2862. const char *user_buf, size_t count)
  2863. {
  2864. struct icnss_priv *priv = dev_get_drvdata(dev);
  2865. u32 option = 0;
  2866. if (sscanf(user_buf, "%du", &option) != 1)
  2867. return -EINVAL;
  2868. wlfw_qdss_trace_stop(priv, option);
  2869. icnss_pr_dbg("Received QDSS stop command\n");
  2870. return count;
  2871. }
  2872. static ssize_t qdss_conf_download_store(struct device *dev,
  2873. struct device_attribute *attr,
  2874. const char *buf, size_t count)
  2875. {
  2876. struct icnss_priv *priv = dev_get_drvdata(dev);
  2877. icnss_wlfw_qdss_dnld_send_sync(priv);
  2878. icnss_pr_dbg("Received QDSS download config command\n");
  2879. return count;
  2880. }
  2881. static ssize_t hw_trc_override_store(struct device *dev,
  2882. struct device_attribute *attr,
  2883. const char *buf, size_t count)
  2884. {
  2885. struct icnss_priv *priv = dev_get_drvdata(dev);
  2886. int tmp = 0;
  2887. if (sscanf(buf, "%du", &tmp) != 1)
  2888. return -EINVAL;
  2889. priv->hw_trc_override = tmp;
  2890. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2891. return count;
  2892. }
  2893. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2894. {
  2895. struct icnss_priv *priv = icnss_get_plat_priv();
  2896. phandle rproc_phandle;
  2897. int ret;
  2898. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2899. &rproc_phandle)) {
  2900. icnss_pr_err("error reading rproc phandle\n");
  2901. return;
  2902. }
  2903. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2904. if (IS_ERR_OR_NULL(priv->rproc)) {
  2905. icnss_pr_err("rproc not found");
  2906. return;
  2907. }
  2908. ret = rproc_boot(priv->rproc);
  2909. if (ret) {
  2910. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2911. rproc_put(priv->rproc);
  2912. }
  2913. }
  2914. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2915. {
  2916. if (priv && priv->rproc) {
  2917. rproc_shutdown(priv->rproc);
  2918. rproc_put(priv->rproc);
  2919. priv->rproc = NULL;
  2920. }
  2921. }
  2922. static ssize_t wpss_boot_store(struct device *dev,
  2923. struct device_attribute *attr,
  2924. const char *buf, size_t count)
  2925. {
  2926. struct icnss_priv *priv = dev_get_drvdata(dev);
  2927. int wpss_rproc = 0;
  2928. if (priv->device_id != WCN6750_DEVICE_ID)
  2929. return count;
  2930. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2931. icnss_pr_err("Failed to read wpss rproc info");
  2932. return -EINVAL;
  2933. }
  2934. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2935. if (wpss_rproc == 1)
  2936. schedule_work(&wpss_loader);
  2937. else if (wpss_rproc == 0)
  2938. icnss_wpss_unload(priv);
  2939. return count;
  2940. }
  2941. static ssize_t wlan_en_delay_store(struct device *dev,
  2942. struct device_attribute *attr,
  2943. const char *buf, size_t count)
  2944. {
  2945. struct icnss_priv *priv = dev_get_drvdata(dev);
  2946. uint32_t wlan_en_delay = 0;
  2947. if (priv->device_id != WCN6750_DEVICE_ID)
  2948. return count;
  2949. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  2950. icnss_pr_err("Failed to read wlan_en_delay");
  2951. return -EINVAL;
  2952. }
  2953. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  2954. priv->wlan_en_delay_ms = wlan_en_delay;
  2955. return count;
  2956. }
  2957. static DEVICE_ATTR_WO(qdss_tr_start);
  2958. static DEVICE_ATTR_WO(qdss_tr_stop);
  2959. static DEVICE_ATTR_WO(qdss_conf_download);
  2960. static DEVICE_ATTR_WO(hw_trc_override);
  2961. static DEVICE_ATTR_WO(wpss_boot);
  2962. static DEVICE_ATTR_WO(wlan_en_delay);
  2963. static struct attribute *icnss_attrs[] = {
  2964. &dev_attr_qdss_tr_start.attr,
  2965. &dev_attr_qdss_tr_stop.attr,
  2966. &dev_attr_qdss_conf_download.attr,
  2967. &dev_attr_hw_trc_override.attr,
  2968. &dev_attr_wpss_boot.attr,
  2969. &dev_attr_wlan_en_delay.attr,
  2970. NULL,
  2971. };
  2972. static struct attribute_group icnss_attr_group = {
  2973. .attrs = icnss_attrs,
  2974. };
  2975. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  2976. {
  2977. struct device *dev = &priv->pdev->dev;
  2978. int ret;
  2979. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  2980. if (ret) {
  2981. icnss_pr_err("Failed to create icnss link, err = %d\n",
  2982. ret);
  2983. goto out;
  2984. }
  2985. return 0;
  2986. out:
  2987. return ret;
  2988. }
  2989. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  2990. {
  2991. sysfs_remove_link(kernel_kobj, "icnss");
  2992. }
  2993. static int icnss_sysfs_create(struct icnss_priv *priv)
  2994. {
  2995. int ret = 0;
  2996. ret = devm_device_add_group(&priv->pdev->dev,
  2997. &icnss_attr_group);
  2998. if (ret) {
  2999. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3000. ret);
  3001. goto out;
  3002. }
  3003. icnss_create_sysfs_link(priv);
  3004. ret = icnss_create_shutdown_sysfs(priv);
  3005. if (ret)
  3006. goto remove_icnss_group;
  3007. return 0;
  3008. remove_icnss_group:
  3009. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3010. out:
  3011. return ret;
  3012. }
  3013. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3014. {
  3015. icnss_destroy_shutdown_sysfs(priv);
  3016. icnss_remove_sysfs_link(priv);
  3017. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3018. }
  3019. static int icnss_get_vbatt_info(struct icnss_priv *priv)
  3020. {
  3021. struct adc_tm_chip *adc_tm_dev = NULL;
  3022. struct iio_channel *channel = NULL;
  3023. int ret = 0;
  3024. adc_tm_dev = get_adc_tm(&priv->pdev->dev, "icnss");
  3025. if (PTR_ERR(adc_tm_dev) == -EPROBE_DEFER) {
  3026. icnss_pr_err("adc_tm_dev probe defer\n");
  3027. return -EPROBE_DEFER;
  3028. }
  3029. if (IS_ERR(adc_tm_dev)) {
  3030. ret = PTR_ERR(adc_tm_dev);
  3031. icnss_pr_err("Not able to get ADC dev, VBATT monitoring is disabled: %d\n",
  3032. ret);
  3033. return ret;
  3034. }
  3035. channel = devm_iio_channel_get(&priv->pdev->dev, "icnss");
  3036. if (PTR_ERR(channel) == -EPROBE_DEFER) {
  3037. icnss_pr_err("channel probe defer\n");
  3038. return -EPROBE_DEFER;
  3039. }
  3040. if (IS_ERR(channel)) {
  3041. ret = PTR_ERR(channel);
  3042. icnss_pr_err("Not able to get VADC dev, VBATT monitoring is disabled: %d\n",
  3043. ret);
  3044. return ret;
  3045. }
  3046. priv->adc_tm_dev = adc_tm_dev;
  3047. priv->channel = channel;
  3048. return 0;
  3049. }
  3050. static int icnss_resource_parse(struct icnss_priv *priv)
  3051. {
  3052. int ret = 0, i = 0;
  3053. struct platform_device *pdev = priv->pdev;
  3054. struct device *dev = &pdev->dev;
  3055. struct resource *res;
  3056. u32 int_prop;
  3057. if (of_property_read_bool(pdev->dev.of_node, "qcom,icnss-adc_tm")) {
  3058. ret = icnss_get_vbatt_info(priv);
  3059. if (ret == -EPROBE_DEFER)
  3060. goto out;
  3061. priv->vbatt_supported = true;
  3062. }
  3063. ret = icnss_get_vreg(priv);
  3064. if (ret) {
  3065. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3066. goto out;
  3067. }
  3068. ret = icnss_get_clk(priv);
  3069. if (ret) {
  3070. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3071. goto put_vreg;
  3072. }
  3073. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3074. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3075. "membase");
  3076. if (!res) {
  3077. icnss_pr_err("Memory base not found in DT\n");
  3078. ret = -EINVAL;
  3079. goto put_clk;
  3080. }
  3081. priv->mem_base_pa = res->start;
  3082. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3083. resource_size(res));
  3084. if (!priv->mem_base_va) {
  3085. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3086. &priv->mem_base_pa);
  3087. ret = -EINVAL;
  3088. goto put_clk;
  3089. }
  3090. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3091. &priv->mem_base_pa,
  3092. priv->mem_base_va);
  3093. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3094. res = platform_get_resource(priv->pdev,
  3095. IORESOURCE_IRQ, i);
  3096. if (!res) {
  3097. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3098. ret = -ENODEV;
  3099. goto put_clk;
  3100. } else {
  3101. priv->ce_irqs[i] = res->start;
  3102. }
  3103. }
  3104. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3105. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3106. "msi_addr");
  3107. if (!res) {
  3108. icnss_pr_err("MSI address not found in DT\n");
  3109. ret = -EINVAL;
  3110. goto put_clk;
  3111. }
  3112. priv->msi_addr_pa = res->start;
  3113. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3114. PAGE_SIZE,
  3115. DMA_FROM_DEVICE, 0);
  3116. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3117. icnss_pr_err("MSI: failed to map msi address\n");
  3118. priv->msi_addr_iova = 0;
  3119. ret = -ENOMEM;
  3120. goto put_clk;
  3121. }
  3122. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3123. &priv->msi_addr_pa,
  3124. priv->msi_addr_iova);
  3125. ret = of_property_read_u32_index(dev->of_node,
  3126. "interrupts",
  3127. 1,
  3128. &int_prop);
  3129. if (ret) {
  3130. icnss_pr_dbg("Read interrupt prop failed");
  3131. goto put_clk;
  3132. }
  3133. priv->msi_base_data = int_prop + 32;
  3134. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3135. priv->msi_base_data, int_prop);
  3136. icnss_get_msi_assignment(priv);
  3137. for (i = 0; i < msi_config.total_vectors; i++) {
  3138. res = platform_get_resource(priv->pdev,
  3139. IORESOURCE_IRQ, i);
  3140. if (!res) {
  3141. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3142. ret = -ENODEV;
  3143. goto put_clk;
  3144. } else {
  3145. priv->srng_irqs[i] = res->start;
  3146. }
  3147. }
  3148. }
  3149. return 0;
  3150. put_clk:
  3151. icnss_put_clk(priv);
  3152. put_vreg:
  3153. icnss_put_vreg(priv);
  3154. out:
  3155. return ret;
  3156. }
  3157. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3158. {
  3159. int ret = 0;
  3160. struct platform_device *pdev = priv->pdev;
  3161. struct device *dev = &pdev->dev;
  3162. struct device_node *np = NULL;
  3163. u64 prop_size = 0;
  3164. const __be32 *addrp = NULL;
  3165. np = of_parse_phandle(dev->of_node,
  3166. "qcom,wlan-msa-fixed-region", 0);
  3167. if (np) {
  3168. addrp = of_get_address(np, 0, &prop_size, NULL);
  3169. if (!addrp) {
  3170. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3171. ret = -EINVAL;
  3172. of_node_put(np);
  3173. goto out;
  3174. }
  3175. priv->msa_pa = of_translate_address(np, addrp);
  3176. if (priv->msa_pa == OF_BAD_ADDR) {
  3177. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3178. ret = -EINVAL;
  3179. of_node_put(np);
  3180. goto out;
  3181. }
  3182. of_node_put(np);
  3183. priv->msa_va = memremap(priv->msa_pa,
  3184. (unsigned long)prop_size, MEMREMAP_WT);
  3185. if (!priv->msa_va) {
  3186. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3187. &priv->msa_pa);
  3188. ret = -EINVAL;
  3189. goto out;
  3190. }
  3191. priv->msa_mem_size = prop_size;
  3192. } else {
  3193. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3194. &priv->msa_mem_size);
  3195. if (ret || priv->msa_mem_size == 0) {
  3196. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3197. priv->msa_mem_size, ret);
  3198. goto out;
  3199. }
  3200. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3201. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3202. if (!priv->msa_va) {
  3203. icnss_pr_err("DMA alloc failed for MSA\n");
  3204. ret = -ENOMEM;
  3205. goto out;
  3206. }
  3207. }
  3208. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3209. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3210. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3211. "qcom,fw-prefix");
  3212. return 0;
  3213. out:
  3214. return ret;
  3215. }
  3216. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3217. struct device *dev, unsigned long iova,
  3218. int flags, void *handler_token)
  3219. {
  3220. struct icnss_priv *priv = handler_token;
  3221. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3222. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3223. if (!priv) {
  3224. icnss_pr_err("priv is NULL\n");
  3225. return -ENODEV;
  3226. }
  3227. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3228. fw_down_data.crashed = true;
  3229. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3230. &fw_down_data);
  3231. }
  3232. icnss_trigger_recovery(&priv->pdev->dev);
  3233. /* IOMMU driver requires non-zero return value to print debug info. */
  3234. return -EINVAL;
  3235. }
  3236. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3237. {
  3238. int ret = 0;
  3239. struct platform_device *pdev = priv->pdev;
  3240. struct device *dev = &pdev->dev;
  3241. const char *iommu_dma_type;
  3242. struct resource *res;
  3243. u32 addr_win[2];
  3244. ret = of_property_read_u32_array(dev->of_node,
  3245. "qcom,iommu-dma-addr-pool",
  3246. addr_win,
  3247. ARRAY_SIZE(addr_win));
  3248. if (ret) {
  3249. icnss_pr_err("SMMU IOVA base not found\n");
  3250. } else {
  3251. priv->smmu_iova_start = addr_win[0];
  3252. priv->smmu_iova_len = addr_win[1];
  3253. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3254. &priv->smmu_iova_start,
  3255. priv->smmu_iova_len);
  3256. priv->iommu_domain =
  3257. iommu_get_domain_for_dev(&pdev->dev);
  3258. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3259. &iommu_dma_type);
  3260. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3261. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3262. priv->smmu_s1_enable = true;
  3263. if (priv->device_id == WCN6750_DEVICE_ID)
  3264. iommu_set_fault_handler(priv->iommu_domain,
  3265. icnss_smmu_fault_handler,
  3266. priv);
  3267. }
  3268. res = platform_get_resource_byname(pdev,
  3269. IORESOURCE_MEM,
  3270. "smmu_iova_ipa");
  3271. if (!res) {
  3272. icnss_pr_err("SMMU IOVA IPA not found\n");
  3273. } else {
  3274. priv->smmu_iova_ipa_start = res->start;
  3275. priv->smmu_iova_ipa_current = res->start;
  3276. priv->smmu_iova_ipa_len = resource_size(res);
  3277. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3278. &priv->smmu_iova_ipa_start,
  3279. priv->smmu_iova_ipa_len);
  3280. }
  3281. }
  3282. return 0;
  3283. }
  3284. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3285. {
  3286. if (!priv)
  3287. return -ENODEV;
  3288. if (!priv->smmu_iova_len)
  3289. return -EINVAL;
  3290. *addr = priv->smmu_iova_start;
  3291. *size = priv->smmu_iova_len;
  3292. return 0;
  3293. }
  3294. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3295. {
  3296. if (!priv)
  3297. return -ENODEV;
  3298. if (!priv->smmu_iova_ipa_len)
  3299. return -EINVAL;
  3300. *addr = priv->smmu_iova_ipa_start;
  3301. *size = priv->smmu_iova_ipa_len;
  3302. return 0;
  3303. }
  3304. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3305. char *name)
  3306. {
  3307. if (!priv)
  3308. return;
  3309. if (!priv->use_prefix_path) {
  3310. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3311. return;
  3312. }
  3313. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3314. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3315. ADRASTEA_PATH_PREFIX "%s", name);
  3316. else
  3317. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3318. QCA6750_PATH_PREFIX "%s", name);
  3319. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3320. }
  3321. static const struct platform_device_id icnss_platform_id_table[] = {
  3322. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3323. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3324. { },
  3325. };
  3326. static const struct of_device_id icnss_dt_match[] = {
  3327. {
  3328. .compatible = "qcom,wcn6750",
  3329. .data = (void *)&icnss_platform_id_table[0]},
  3330. {
  3331. .compatible = "qcom,icnss",
  3332. .data = (void *)&icnss_platform_id_table[1]},
  3333. { },
  3334. };
  3335. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3336. static void icnss_init_control_params(struct icnss_priv *priv)
  3337. {
  3338. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3339. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3340. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3341. if (of_property_read_bool(priv->pdev->dev.of_node,
  3342. "bdf-download-support"))
  3343. priv->bdf_download_support = true;
  3344. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3345. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3346. }
  3347. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3348. {
  3349. pm_runtime_get_sync(&priv->pdev->dev);
  3350. pm_runtime_forbid(&priv->pdev->dev);
  3351. pm_runtime_set_active(&priv->pdev->dev);
  3352. pm_runtime_enable(&priv->pdev->dev);
  3353. }
  3354. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3355. {
  3356. pm_runtime_disable(&priv->pdev->dev);
  3357. pm_runtime_allow(&priv->pdev->dev);
  3358. pm_runtime_put_sync(&priv->pdev->dev);
  3359. }
  3360. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3361. {
  3362. return of_property_read_bool(priv->pdev->dev.of_node,
  3363. "use-nv-mac");
  3364. }
  3365. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3366. {
  3367. struct icnss_subsys_restart_level_data *restart_level_data;
  3368. icnss_pr_info("rproc name: %s recovery disable: %d",
  3369. rproc->name, rproc->recovery_disabled);
  3370. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3371. if (!restart_level_data)
  3372. return;
  3373. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3374. if (rproc->recovery_disabled)
  3375. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3376. else
  3377. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3378. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3379. 0, restart_level_data);
  3380. }
  3381. }
  3382. static int icnss_probe(struct platform_device *pdev)
  3383. {
  3384. int ret = 0;
  3385. struct device *dev = &pdev->dev;
  3386. struct icnss_priv *priv;
  3387. const struct of_device_id *of_id;
  3388. const struct platform_device_id *device_id;
  3389. if (dev_get_drvdata(dev)) {
  3390. icnss_pr_err("Driver is already initialized\n");
  3391. return -EEXIST;
  3392. }
  3393. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3394. if (!of_id || !of_id->data) {
  3395. icnss_pr_err("Failed to find of match device!\n");
  3396. ret = -ENODEV;
  3397. goto out_reset_drvdata;
  3398. }
  3399. device_id = of_id->data;
  3400. icnss_pr_dbg("Platform driver probe\n");
  3401. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3402. if (!priv)
  3403. return -ENOMEM;
  3404. priv->magic = ICNSS_MAGIC;
  3405. dev_set_drvdata(dev, priv);
  3406. priv->pdev = pdev;
  3407. priv->device_id = device_id->driver_data;
  3408. priv->is_chain1_supported = true;
  3409. INIT_LIST_HEAD(&priv->vreg_list);
  3410. INIT_LIST_HEAD(&priv->clk_list);
  3411. icnss_allow_recursive_recovery(dev);
  3412. icnss_init_control_params(priv);
  3413. ret = icnss_resource_parse(priv);
  3414. if (ret)
  3415. goto out_reset_drvdata;
  3416. ret = icnss_msa_dt_parse(priv);
  3417. if (ret)
  3418. goto out_free_resources;
  3419. ret = icnss_smmu_dt_parse(priv);
  3420. if (ret)
  3421. goto out_free_resources;
  3422. spin_lock_init(&priv->event_lock);
  3423. spin_lock_init(&priv->on_off_lock);
  3424. spin_lock_init(&priv->soc_wake_msg_lock);
  3425. mutex_init(&priv->dev_lock);
  3426. mutex_init(&priv->tcdev_lock);
  3427. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3428. if (!priv->event_wq) {
  3429. icnss_pr_err("Workqueue creation failed\n");
  3430. ret = -EFAULT;
  3431. goto smmu_cleanup;
  3432. }
  3433. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3434. INIT_LIST_HEAD(&priv->event_list);
  3435. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3436. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3437. if (!priv->soc_wake_wq) {
  3438. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3439. ret = -EFAULT;
  3440. goto out_destroy_wq;
  3441. }
  3442. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3443. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3444. ret = icnss_register_fw_service(priv);
  3445. if (ret < 0) {
  3446. icnss_pr_err("fw service registration failed: %d\n", ret);
  3447. goto out_destroy_soc_wq;
  3448. }
  3449. icnss_enable_recovery(priv);
  3450. icnss_debugfs_create(priv);
  3451. icnss_sysfs_create(priv);
  3452. ret = device_init_wakeup(&priv->pdev->dev, true);
  3453. if (ret)
  3454. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3455. ret);
  3456. icnss_set_plat_priv(priv);
  3457. init_completion(&priv->unblock_shutdown);
  3458. if (priv->device_id == WCN6750_DEVICE_ID) {
  3459. ret = icnss_dms_init(priv);
  3460. if (ret)
  3461. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3462. ret = icnss_genl_init();
  3463. if (ret < 0)
  3464. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3465. init_completion(&priv->smp2p_soc_wake_wait);
  3466. icnss_runtime_pm_init(priv);
  3467. icnss_aop_mbox_init(priv);
  3468. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3469. priv->bdf_download_support = true;
  3470. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3471. icnss_pr_dbg("NV MAC feature is %s\n",
  3472. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3473. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3474. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3475. }
  3476. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3477. icnss_pr_info("Platform driver probed successfully\n");
  3478. return 0;
  3479. out_destroy_soc_wq:
  3480. destroy_workqueue(priv->soc_wake_wq);
  3481. out_destroy_wq:
  3482. destroy_workqueue(priv->event_wq);
  3483. smmu_cleanup:
  3484. priv->iommu_domain = NULL;
  3485. out_free_resources:
  3486. icnss_put_resources(priv);
  3487. out_reset_drvdata:
  3488. dev_set_drvdata(dev, NULL);
  3489. return ret;
  3490. }
  3491. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3492. {
  3493. if (IS_ERR_OR_NULL(ramdump_info))
  3494. return;
  3495. device_unregister(ramdump_info->dev);
  3496. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3497. kfree(ramdump_info);
  3498. }
  3499. static int icnss_remove(struct platform_device *pdev)
  3500. {
  3501. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3502. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3503. if (priv->device_id == WCN6750_DEVICE_ID) {
  3504. icnss_dms_deinit(priv);
  3505. icnss_genl_exit();
  3506. icnss_runtime_pm_deinit(priv);
  3507. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3508. mbox_free_channel(priv->mbox_chan);
  3509. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3510. complete_all(&priv->smp2p_soc_wake_wait);
  3511. }
  3512. device_init_wakeup(&priv->pdev->dev, false);
  3513. icnss_debugfs_destroy(priv);
  3514. icnss_sysfs_destroy(priv);
  3515. complete_all(&priv->unblock_shutdown);
  3516. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3517. if (priv->device_id == WCN6750_DEVICE_ID) {
  3518. icnss_wpss_early_ssr_unregister_notifier(priv);
  3519. icnss_wpss_ssr_unregister_notifier(priv);
  3520. rproc_put(priv->rproc);
  3521. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3522. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3523. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3524. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3525. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3526. } else {
  3527. icnss_modem_ssr_unregister_notifier(priv);
  3528. icnss_pdr_unregister_notifier(priv);
  3529. }
  3530. class_destroy(priv->icnss_ramdump_class);
  3531. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3532. icnss_unregister_fw_service(priv);
  3533. if (priv->event_wq)
  3534. destroy_workqueue(priv->event_wq);
  3535. if (priv->soc_wake_wq)
  3536. destroy_workqueue(priv->soc_wake_wq);
  3537. priv->iommu_domain = NULL;
  3538. icnss_hw_power_off(priv);
  3539. icnss_put_resources(priv);
  3540. dev_set_drvdata(&pdev->dev, NULL);
  3541. return 0;
  3542. }
  3543. #ifdef CONFIG_PM_SLEEP
  3544. static int icnss_pm_suspend(struct device *dev)
  3545. {
  3546. struct icnss_priv *priv = dev_get_drvdata(dev);
  3547. int ret = 0;
  3548. if (priv->magic != ICNSS_MAGIC) {
  3549. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3550. dev, priv, priv->magic);
  3551. return -EINVAL;
  3552. }
  3553. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3554. if (!priv->ops || !priv->ops->pm_suspend ||
  3555. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3556. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3557. return 0;
  3558. ret = priv->ops->pm_suspend(dev);
  3559. if (ret == 0) {
  3560. if (priv->device_id == WCN6750_DEVICE_ID) {
  3561. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3562. !test_bit(ICNSS_MODE_ON, &priv->state))
  3563. return 0;
  3564. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3565. ICNSS_SMP2P_OUT_POWER_SAVE);
  3566. }
  3567. priv->stats.pm_suspend++;
  3568. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3569. } else {
  3570. priv->stats.pm_suspend_err++;
  3571. }
  3572. return ret;
  3573. }
  3574. static int icnss_pm_resume(struct device *dev)
  3575. {
  3576. struct icnss_priv *priv = dev_get_drvdata(dev);
  3577. int ret = 0;
  3578. if (priv->magic != ICNSS_MAGIC) {
  3579. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3580. dev, priv, priv->magic);
  3581. return -EINVAL;
  3582. }
  3583. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3584. if (!priv->ops || !priv->ops->pm_resume ||
  3585. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3586. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3587. goto out;
  3588. ret = priv->ops->pm_resume(dev);
  3589. out:
  3590. if (ret == 0) {
  3591. priv->stats.pm_resume++;
  3592. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3593. } else {
  3594. priv->stats.pm_resume_err++;
  3595. }
  3596. return ret;
  3597. }
  3598. static int icnss_pm_suspend_noirq(struct device *dev)
  3599. {
  3600. struct icnss_priv *priv = dev_get_drvdata(dev);
  3601. int ret = 0;
  3602. if (priv->magic != ICNSS_MAGIC) {
  3603. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3604. dev, priv, priv->magic);
  3605. return -EINVAL;
  3606. }
  3607. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3608. if (!priv->ops || !priv->ops->suspend_noirq ||
  3609. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3610. goto out;
  3611. ret = priv->ops->suspend_noirq(dev);
  3612. out:
  3613. if (ret == 0) {
  3614. priv->stats.pm_suspend_noirq++;
  3615. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3616. } else {
  3617. priv->stats.pm_suspend_noirq_err++;
  3618. }
  3619. return ret;
  3620. }
  3621. static int icnss_pm_resume_noirq(struct device *dev)
  3622. {
  3623. struct icnss_priv *priv = dev_get_drvdata(dev);
  3624. int ret = 0;
  3625. if (priv->magic != ICNSS_MAGIC) {
  3626. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3627. dev, priv, priv->magic);
  3628. return -EINVAL;
  3629. }
  3630. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3631. if (!priv->ops || !priv->ops->resume_noirq ||
  3632. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3633. goto out;
  3634. ret = priv->ops->resume_noirq(dev);
  3635. out:
  3636. if (ret == 0) {
  3637. priv->stats.pm_resume_noirq++;
  3638. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3639. } else {
  3640. priv->stats.pm_resume_noirq_err++;
  3641. }
  3642. return ret;
  3643. }
  3644. static int icnss_pm_runtime_suspend(struct device *dev)
  3645. {
  3646. struct icnss_priv *priv = dev_get_drvdata(dev);
  3647. int ret = 0;
  3648. if (priv->device_id != WCN6750_DEVICE_ID) {
  3649. icnss_pr_err("Ignore runtime suspend:\n");
  3650. goto out;
  3651. }
  3652. if (priv->magic != ICNSS_MAGIC) {
  3653. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3654. dev, priv, priv->magic);
  3655. return -EINVAL;
  3656. }
  3657. if (!priv->ops || !priv->ops->runtime_suspend ||
  3658. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3659. goto out;
  3660. icnss_pr_vdbg("Runtime suspend\n");
  3661. ret = priv->ops->runtime_suspend(dev);
  3662. if (!ret) {
  3663. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3664. !test_bit(ICNSS_MODE_ON, &priv->state))
  3665. return 0;
  3666. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3667. ICNSS_SMP2P_OUT_POWER_SAVE);
  3668. }
  3669. out:
  3670. return ret;
  3671. }
  3672. static int icnss_pm_runtime_resume(struct device *dev)
  3673. {
  3674. struct icnss_priv *priv = dev_get_drvdata(dev);
  3675. int ret = 0;
  3676. if (priv->device_id != WCN6750_DEVICE_ID) {
  3677. icnss_pr_err("Ignore runtime resume:\n");
  3678. goto out;
  3679. }
  3680. if (priv->magic != ICNSS_MAGIC) {
  3681. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3682. dev, priv, priv->magic);
  3683. return -EINVAL;
  3684. }
  3685. if (!priv->ops || !priv->ops->runtime_resume ||
  3686. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3687. goto out;
  3688. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3689. ret = priv->ops->runtime_resume(dev);
  3690. out:
  3691. return ret;
  3692. }
  3693. static int icnss_pm_runtime_idle(struct device *dev)
  3694. {
  3695. struct icnss_priv *priv = dev_get_drvdata(dev);
  3696. if (priv->device_id != WCN6750_DEVICE_ID) {
  3697. icnss_pr_err("Ignore runtime idle:\n");
  3698. goto out;
  3699. }
  3700. icnss_pr_vdbg("Runtime idle\n");
  3701. pm_request_autosuspend(dev);
  3702. out:
  3703. return -EBUSY;
  3704. }
  3705. #endif
  3706. static const struct dev_pm_ops icnss_pm_ops = {
  3707. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3708. icnss_pm_resume)
  3709. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3710. icnss_pm_resume_noirq)
  3711. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3712. icnss_pm_runtime_idle)
  3713. };
  3714. static struct platform_driver icnss_driver = {
  3715. .probe = icnss_probe,
  3716. .remove = icnss_remove,
  3717. .driver = {
  3718. .name = "icnss2",
  3719. .pm = &icnss_pm_ops,
  3720. .of_match_table = icnss_dt_match,
  3721. },
  3722. };
  3723. static int __init icnss_initialize(void)
  3724. {
  3725. icnss_debug_init();
  3726. return platform_driver_register(&icnss_driver);
  3727. }
  3728. static void __exit icnss_exit(void)
  3729. {
  3730. platform_driver_unregister(&icnss_driver);
  3731. icnss_debug_deinit();
  3732. }
  3733. module_init(icnss_initialize);
  3734. module_exit(icnss_exit);
  3735. MODULE_LICENSE("GPL v2");
  3736. MODULE_DESCRIPTION("iWCN CORE platform driver");