main.c 128 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #include <trace/hooks/remoteproc.h>
  47. #ifdef CONFIG_SLATE_MODULE_ENABLED
  48. #include <linux/soc/qcom/slatecom_interface.h>
  49. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  50. #include <uapi/linux/slatecom_interface.h>
  51. #endif
  52. #include "main.h"
  53. #include "qmi.h"
  54. #include "debug.h"
  55. #include "power.h"
  56. #include "genl.h"
  57. #define MAX_PROP_SIZE 32
  58. #define NUM_LOG_PAGES 10
  59. #define NUM_LOG_LONG_PAGES 4
  60. #define ICNSS_MAGIC 0x5abc5abc
  61. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  62. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  63. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  64. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  65. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  66. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  67. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  68. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  69. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  70. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  71. #define ICNSS_MAX_PROBE_CNT 2
  72. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  73. #define PROBE_TIMEOUT 15000
  74. #define SMP2P_SOC_WAKE_TIMEOUT 500
  75. #ifdef CONFIG_ICNSS2_DEBUG
  76. static unsigned long qmi_timeout = 3000;
  77. module_param(qmi_timeout, ulong, 0600);
  78. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  79. #else
  80. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  81. #endif
  82. #define ICNSS_RECOVERY_TIMEOUT 60000
  83. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  84. #define ICNSS_CAL_TIMEOUT 40000
  85. static struct icnss_priv *penv;
  86. static struct work_struct wpss_loader;
  87. static struct work_struct wpss_ssr_work;
  88. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  89. #define ICNSS_EVENT_PENDING 2989
  90. #define ICNSS_EVENT_SYNC BIT(0)
  91. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  92. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  93. ICNSS_EVENT_SYNC)
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  95. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  96. #define SMP2P_GET_MAX_RETRY 4
  97. #define SMP2P_GET_RETRY_DELAY_MS 500
  98. #define RAMDUMP_NUM_DEVICES 256
  99. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  100. #define WLAN_EN_TEMP_THRESHOLD 5000
  101. #define WLAN_EN_DELAY 500
  102. #define ICNSS_RPROC_LEN 10
  103. static DEFINE_IDA(rd_minor_id);
  104. enum icnss_pdr_cause_index {
  105. ICNSS_FW_CRASH,
  106. ICNSS_ROOT_PD_CRASH,
  107. ICNSS_ROOT_PD_SHUTDOWN,
  108. ICNSS_HOST_ERROR,
  109. };
  110. static const char * const icnss_pdr_cause[] = {
  111. [ICNSS_FW_CRASH] = "FW crash",
  112. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  113. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  114. [ICNSS_HOST_ERROR] = "Host error",
  115. };
  116. static void icnss_set_plat_priv(struct icnss_priv *priv)
  117. {
  118. penv = priv;
  119. }
  120. static struct icnss_priv *icnss_get_plat_priv(void)
  121. {
  122. return penv;
  123. }
  124. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  125. {
  126. if (priv && priv->rproc) {
  127. rproc_shutdown(priv->rproc);
  128. rproc_put(priv->rproc);
  129. priv->rproc = NULL;
  130. }
  131. }
  132. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  133. struct kobj_attribute *attr,
  134. const char *buf, size_t count)
  135. {
  136. struct icnss_priv *priv = icnss_get_plat_priv();
  137. if (!priv)
  138. return count;
  139. icnss_pr_dbg("Received shutdown indication");
  140. atomic_set(&priv->is_shutdown, true);
  141. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  142. priv->device_id == ADRASTEA_DEVICE_ID)
  143. icnss_wpss_unload(priv);
  144. return count;
  145. }
  146. static struct kobj_attribute icnss_sysfs_attribute =
  147. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  148. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  149. {
  150. if (atomic_inc_return(&priv->pm_count) != 1)
  151. return;
  152. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  153. atomic_read(&priv->pm_count));
  154. pm_stay_awake(&priv->pdev->dev);
  155. priv->stats.pm_stay_awake++;
  156. }
  157. static void icnss_pm_relax(struct icnss_priv *priv)
  158. {
  159. int r = atomic_dec_return(&priv->pm_count);
  160. WARN_ON(r < 0);
  161. if (r != 0)
  162. return;
  163. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  164. atomic_read(&priv->pm_count));
  165. pm_relax(&priv->pdev->dev);
  166. priv->stats.pm_relax++;
  167. }
  168. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  169. {
  170. switch (type) {
  171. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  172. return "SERVER_ARRIVE";
  173. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  174. return "SERVER_EXIT";
  175. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  176. return "FW_READY";
  177. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  178. return "REGISTER_DRIVER";
  179. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  180. return "UNREGISTER_DRIVER";
  181. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  182. return "PD_SERVICE_DOWN";
  183. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  184. return "FW_EARLY_CRASH_IND";
  185. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  186. return "IDLE_SHUTDOWN";
  187. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  188. return "IDLE_RESTART";
  189. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  190. return "FW_INIT_DONE";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  192. return "QDSS_TRACE_REQ_MEM";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  194. return "QDSS_TRACE_SAVE";
  195. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  196. return "QDSS_TRACE_FREE";
  197. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  198. return "M3_DUMP_UPLOAD";
  199. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  200. return "IMS_WFC_CALL_IND";
  201. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  202. return "WLFW_TWC_CFG_IND";
  203. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  204. return "QDSS_TRACE_REQ_DATA";
  205. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  206. return "SUBSYS_RESTART_LEVEL";
  207. case ICNSS_DRIVER_EVENT_MAX:
  208. return "EVENT_MAX";
  209. }
  210. return "UNKNOWN";
  211. };
  212. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  213. {
  214. switch (type) {
  215. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  216. return "SOC_WAKE_REQUEST";
  217. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  218. return "SOC_WAKE_RELEASE";
  219. case ICNSS_SOC_WAKE_EVENT_MAX:
  220. return "SOC_EVENT_MAX";
  221. }
  222. return "UNKNOWN";
  223. };
  224. int icnss_driver_event_post(struct icnss_priv *priv,
  225. enum icnss_driver_event_type type,
  226. u32 flags, void *data)
  227. {
  228. struct icnss_driver_event *event;
  229. unsigned long irq_flags;
  230. int gfp = GFP_KERNEL;
  231. int ret = 0;
  232. if (!priv)
  233. return -ENODEV;
  234. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  235. icnss_driver_event_to_str(type), type, current->comm,
  236. flags, priv->state);
  237. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  238. icnss_pr_err("Invalid Event type: %d, can't post", type);
  239. return -EINVAL;
  240. }
  241. if (in_interrupt() || irqs_disabled())
  242. gfp = GFP_ATOMIC;
  243. event = kzalloc(sizeof(*event), gfp);
  244. if (event == NULL)
  245. return -ENOMEM;
  246. icnss_pm_stay_awake(priv);
  247. event->type = type;
  248. event->data = data;
  249. init_completion(&event->complete);
  250. event->ret = ICNSS_EVENT_PENDING;
  251. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  252. spin_lock_irqsave(&priv->event_lock, irq_flags);
  253. list_add_tail(&event->list, &priv->event_list);
  254. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  255. priv->stats.events[type].posted++;
  256. queue_work(priv->event_wq, &priv->event_work);
  257. if (!(flags & ICNSS_EVENT_SYNC))
  258. goto out;
  259. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  260. wait_for_completion(&event->complete);
  261. else
  262. ret = wait_for_completion_interruptible(&event->complete);
  263. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  264. icnss_driver_event_to_str(type), type, priv->state, ret,
  265. event->ret);
  266. spin_lock_irqsave(&priv->event_lock, irq_flags);
  267. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  268. event->sync = false;
  269. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  270. ret = -EINTR;
  271. goto out;
  272. }
  273. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  274. ret = event->ret;
  275. kfree(event);
  276. out:
  277. icnss_pm_relax(priv);
  278. return ret;
  279. }
  280. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  281. enum icnss_soc_wake_event_type type,
  282. u32 flags, void *data)
  283. {
  284. struct icnss_soc_wake_event *event;
  285. unsigned long irq_flags;
  286. int gfp = GFP_KERNEL;
  287. int ret = 0;
  288. if (!priv)
  289. return -ENODEV;
  290. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  291. icnss_soc_wake_event_to_str(type),
  292. type, current->comm, flags, priv->state);
  293. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  294. icnss_pr_err("Invalid Event type: %d, can't post", type);
  295. return -EINVAL;
  296. }
  297. if (in_interrupt() || irqs_disabled())
  298. gfp = GFP_ATOMIC;
  299. event = kzalloc(sizeof(*event), gfp);
  300. if (!event)
  301. return -ENOMEM;
  302. icnss_pm_stay_awake(priv);
  303. event->type = type;
  304. event->data = data;
  305. init_completion(&event->complete);
  306. event->ret = ICNSS_EVENT_PENDING;
  307. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  308. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  309. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  310. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  311. priv->stats.soc_wake_events[type].posted++;
  312. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  313. if (!(flags & ICNSS_EVENT_SYNC))
  314. goto out;
  315. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  316. wait_for_completion(&event->complete);
  317. else
  318. ret = wait_for_completion_interruptible(&event->complete);
  319. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  320. icnss_soc_wake_event_to_str(type),
  321. type, priv->state, ret, event->ret);
  322. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  323. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  324. event->sync = false;
  325. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  326. ret = -EINTR;
  327. goto out;
  328. }
  329. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  330. ret = event->ret;
  331. kfree(event);
  332. out:
  333. icnss_pm_relax(priv);
  334. return ret;
  335. }
  336. bool icnss_is_fw_ready(void)
  337. {
  338. if (!penv)
  339. return false;
  340. else
  341. return test_bit(ICNSS_FW_READY, &penv->state);
  342. }
  343. EXPORT_SYMBOL(icnss_is_fw_ready);
  344. void icnss_block_shutdown(bool status)
  345. {
  346. if (!penv)
  347. return;
  348. if (status) {
  349. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  350. reinit_completion(&penv->unblock_shutdown);
  351. } else {
  352. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  353. complete(&penv->unblock_shutdown);
  354. }
  355. }
  356. EXPORT_SYMBOL(icnss_block_shutdown);
  357. bool icnss_is_fw_down(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return false;
  362. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  363. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  364. test_bit(ICNSS_REJUVENATE, &priv->state);
  365. }
  366. EXPORT_SYMBOL(icnss_is_fw_down);
  367. unsigned long icnss_get_device_config(void)
  368. {
  369. struct icnss_priv *priv = icnss_get_plat_priv();
  370. if (!priv)
  371. return 0;
  372. return priv->device_config;
  373. }
  374. EXPORT_SYMBOL(icnss_get_device_config);
  375. bool icnss_is_rejuvenate(void)
  376. {
  377. if (!penv)
  378. return false;
  379. else
  380. return test_bit(ICNSS_REJUVENATE, &penv->state);
  381. }
  382. EXPORT_SYMBOL(icnss_is_rejuvenate);
  383. bool icnss_is_pdr(void)
  384. {
  385. if (!penv)
  386. return false;
  387. else
  388. return test_bit(ICNSS_PDR, &penv->state);
  389. }
  390. EXPORT_SYMBOL(icnss_is_pdr);
  391. static int icnss_send_smp2p(struct icnss_priv *priv,
  392. enum icnss_smp2p_msg_id msg_id,
  393. enum smp2p_out_entry smp2p_entry)
  394. {
  395. unsigned int value = 0;
  396. int ret;
  397. if (!priv || IS_ERR_OR_NULL(priv->smp2p_info[smp2p_entry].smem_state))
  398. return -EINVAL;
  399. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  400. if (msg_id == ICNSS_RESET_MSG) {
  401. priv->smp2p_info[smp2p_entry].seq = 0;
  402. ret = qcom_smem_state_update_bits(
  403. priv->smp2p_info[smp2p_entry].smem_state,
  404. ICNSS_SMEM_VALUE_MASK,
  405. 0);
  406. if (ret)
  407. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  408. ret, icnss_smp2p_str[smp2p_entry]);
  409. return ret;
  410. }
  411. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  412. !test_bit(ICNSS_FW_READY, &priv->state)) {
  413. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  414. priv->state);
  415. return -EINVAL;
  416. }
  417. value |= priv->smp2p_info[smp2p_entry].seq++;
  418. value <<= ICNSS_SMEM_SEQ_NO_POS;
  419. value |= msg_id;
  420. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  421. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  422. reinit_completion(&penv->smp2p_soc_wake_wait);
  423. ret = qcom_smem_state_update_bits(
  424. priv->smp2p_info[smp2p_entry].smem_state,
  425. ICNSS_SMEM_VALUE_MASK,
  426. value);
  427. if (ret) {
  428. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  429. icnss_smp2p_str[smp2p_entry]);
  430. } else {
  431. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  432. msg_id == ICNSS_SOC_WAKE_REL) {
  433. if (!wait_for_completion_timeout(
  434. &priv->smp2p_soc_wake_wait,
  435. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  436. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  437. icnss_smp2p_str[smp2p_entry]);
  438. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  439. ICNSS_ASSERT(0);
  440. }
  441. }
  442. }
  443. return ret;
  444. }
  445. bool icnss_is_low_power(void)
  446. {
  447. if (!penv)
  448. return false;
  449. else
  450. return test_bit(ICNSS_LOW_POWER, &penv->state);
  451. }
  452. EXPORT_SYMBOL(icnss_is_low_power);
  453. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  454. {
  455. struct icnss_priv *priv = ctx;
  456. if (priv)
  457. priv->force_err_fatal = true;
  458. icnss_pr_err("Received force error fatal request from FW\n");
  459. return IRQ_HANDLED;
  460. }
  461. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  462. {
  463. struct icnss_priv *priv = ctx;
  464. struct icnss_uevent_fw_down_data fw_down_data = {0};
  465. icnss_pr_err("Received early crash indication from FW\n");
  466. if (priv) {
  467. if (priv->wpss_self_recovery_enabled)
  468. mod_timer(&priv->wpss_ssr_timer,
  469. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  470. set_bit(ICNSS_FW_DOWN, &priv->state);
  471. icnss_ignore_fw_timeout(true);
  472. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  473. clear_bit(ICNSS_FW_READY, &priv->state);
  474. fw_down_data.crashed = true;
  475. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  476. &fw_down_data);
  477. }
  478. }
  479. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  480. 0, NULL);
  481. return IRQ_HANDLED;
  482. }
  483. static void register_fw_error_notifications(struct device *dev)
  484. {
  485. struct icnss_priv *priv = dev_get_drvdata(dev);
  486. struct device_node *dev_node;
  487. int irq = 0, ret = 0;
  488. if (!priv)
  489. return;
  490. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  491. if (!dev_node) {
  492. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  493. return;
  494. }
  495. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  496. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  497. ret = irq = of_irq_get_byname(dev_node,
  498. "qcom,smp2p-force-fatal-error");
  499. if (ret < 0) {
  500. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  501. irq);
  502. return;
  503. }
  504. }
  505. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  506. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  507. "wlanfw-err", priv);
  508. if (ret < 0) {
  509. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  510. irq, ret);
  511. return;
  512. }
  513. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  514. priv->fw_error_fatal_irq = irq;
  515. }
  516. static void register_early_crash_notifications(struct device *dev)
  517. {
  518. struct icnss_priv *priv = dev_get_drvdata(dev);
  519. struct device_node *dev_node;
  520. int irq = 0, ret = 0;
  521. if (!priv)
  522. return;
  523. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  524. if (!dev_node) {
  525. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  526. return;
  527. }
  528. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  529. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  530. ret = irq = of_irq_get_byname(dev_node,
  531. "qcom,smp2p-early-crash-ind");
  532. if (ret < 0) {
  533. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  534. irq);
  535. return;
  536. }
  537. }
  538. ret = devm_request_threaded_irq(dev, irq, NULL,
  539. fw_crash_indication_handler,
  540. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  541. "wlanfw-early-crash-ind", priv);
  542. if (ret < 0) {
  543. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  544. irq, ret);
  545. return;
  546. }
  547. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  548. priv->fw_early_crash_irq = irq;
  549. }
  550. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  551. {
  552. struct thermal_zone_device *thermal_dev;
  553. const char *tsens;
  554. int ret;
  555. ret = of_property_read_string(priv->pdev->dev.of_node,
  556. "tsens",
  557. &tsens);
  558. if (ret)
  559. return ret;
  560. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  561. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  562. if (IS_ERR_OR_NULL(thermal_dev)) {
  563. icnss_pr_err("Fail to get thermal zone. ret: %d",
  564. PTR_ERR(thermal_dev));
  565. return PTR_ERR(thermal_dev);
  566. }
  567. ret = thermal_zone_get_temp(thermal_dev, temp);
  568. if (ret)
  569. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  570. return ret;
  571. }
  572. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  573. {
  574. struct icnss_priv *priv = ctx;
  575. if (priv)
  576. complete(&priv->smp2p_soc_wake_wait);
  577. return IRQ_HANDLED;
  578. }
  579. static void register_soc_wake_notif(struct device *dev)
  580. {
  581. struct icnss_priv *priv = dev_get_drvdata(dev);
  582. struct device_node *dev_node;
  583. int irq = 0, ret = 0;
  584. if (!priv)
  585. return;
  586. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  587. if (!dev_node) {
  588. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  589. return;
  590. }
  591. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  592. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  593. ret = irq = of_irq_get_byname(dev_node,
  594. "qcom,smp2p-soc-wake-ack");
  595. if (ret < 0) {
  596. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  597. irq);
  598. return;
  599. }
  600. }
  601. ret = devm_request_threaded_irq(dev, irq, NULL,
  602. fw_soc_wake_ack_handler,
  603. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  604. IRQF_TRIGGER_FALLING,
  605. "wlanfw-soc-wake-ack", priv);
  606. if (ret < 0) {
  607. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  608. irq, ret);
  609. return;
  610. }
  611. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  612. priv->fw_soc_wake_ack_irq = irq;
  613. }
  614. int icnss_call_driver_uevent(struct icnss_priv *priv,
  615. enum icnss_uevent uevent, void *data)
  616. {
  617. struct icnss_uevent_data uevent_data;
  618. if (!priv->ops || !priv->ops->uevent)
  619. return 0;
  620. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  621. priv->state, uevent);
  622. uevent_data.uevent = uevent;
  623. uevent_data.data = data;
  624. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  625. }
  626. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  627. {
  628. int i;
  629. int ret = 0;
  630. ret = icnss_qmi_get_dms_mac(priv);
  631. if (ret == 0 && priv->dms.mac_valid)
  632. goto qmi_send;
  633. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  634. * Thus assert on failure to get MAC from DMS even after retries
  635. */
  636. if (priv->use_nv_mac) {
  637. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  638. if (priv->dms.mac_valid)
  639. break;
  640. ret = icnss_qmi_get_dms_mac(priv);
  641. if (ret != -EAGAIN)
  642. break;
  643. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  644. }
  645. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  646. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  647. ICNSS_ASSERT(0);
  648. return -EINVAL;
  649. }
  650. }
  651. qmi_send:
  652. if (priv->dms.mac_valid)
  653. ret =
  654. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  655. ARRAY_SIZE(priv->dms.mac));
  656. return ret;
  657. }
  658. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  659. enum smp2p_out_entry smp2p_entry)
  660. {
  661. int retry = 0;
  662. int error;
  663. if (priv->smp2p_info[smp2p_entry].smem_state)
  664. return;
  665. retry:
  666. priv->smp2p_info[smp2p_entry].smem_state =
  667. qcom_smem_state_get(&priv->pdev->dev,
  668. icnss_smp2p_str[smp2p_entry],
  669. &priv->smp2p_info[smp2p_entry].smem_bit);
  670. if (IS_ERR_OR_NULL(priv->smp2p_info[smp2p_entry].smem_state)) {
  671. if (retry++ < SMP2P_GET_MAX_RETRY) {
  672. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  673. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  674. error, icnss_smp2p_str[smp2p_entry]);
  675. msleep(SMP2P_GET_RETRY_DELAY_MS);
  676. goto retry;
  677. }
  678. ICNSS_ASSERT(0);
  679. return;
  680. }
  681. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  682. }
  683. static inline
  684. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  685. {
  686. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  687. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  688. } else {
  689. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  690. }
  691. }
  692. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  693. {
  694. switch (val) {
  695. case WLAN_RF_SLATE:
  696. return WLFW_WLAN_RF_SLATE_V01;
  697. case WLAN_RF_APACHE:
  698. return WLFW_WLAN_RF_APACHE_V01;
  699. default:
  700. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  701. }
  702. }
  703. #ifdef CONFIG_SLATE_MODULE_ENABLED
  704. static void icnss_send_wlan_boot_init(void)
  705. {
  706. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  707. icnss_pr_info("sent wlan boot init command\n");
  708. }
  709. static void icnss_send_wlan_boot_complete(void)
  710. {
  711. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  712. icnss_pr_info("sent wlan boot complete command\n");
  713. }
  714. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  715. {
  716. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  717. reinit_completion(&priv->slate_boot_complete);
  718. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  719. priv->state);
  720. wait_for_completion(&priv->slate_boot_complete);
  721. }
  722. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  723. return -EINVAL;
  724. icnss_send_wlan_boot_init();
  725. return 0;
  726. }
  727. #else
  728. static void icnss_send_wlan_boot_complete(void)
  729. {
  730. }
  731. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  732. {
  733. return 0;
  734. }
  735. #endif
  736. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  737. void *data)
  738. {
  739. int ret = 0;
  740. int temp = 0;
  741. bool ignore_assert = false;
  742. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  743. if (!priv)
  744. return -ENODEV;
  745. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  746. clear_bit(ICNSS_FW_DOWN, &priv->state);
  747. clear_bit(ICNSS_FW_READY, &priv->state);
  748. if (priv->is_slate_rfa) {
  749. ret = icnss_wait_for_slate_complete(priv);
  750. if (ret == -EINVAL) {
  751. icnss_pr_err("Slate complete failed\n");
  752. return ret;
  753. }
  754. }
  755. icnss_ignore_fw_timeout(false);
  756. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  757. icnss_pr_err("QMI Server already in Connected State\n");
  758. ICNSS_ASSERT(0);
  759. }
  760. ret = icnss_connect_to_fw_server(priv, data);
  761. if (ret)
  762. goto fail;
  763. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  764. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  765. ret = icnss_hw_power_on(priv);
  766. if (ret)
  767. goto fail;
  768. }
  769. ret = wlfw_ind_register_send_sync_msg(priv);
  770. if (ret < 0) {
  771. if (ret == -EALREADY) {
  772. ret = 0;
  773. goto qmi_registered;
  774. }
  775. ignore_assert = true;
  776. goto fail;
  777. }
  778. if (priv->is_rf_subtype_valid) {
  779. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  780. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  781. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  782. if (ret < 0)
  783. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  784. ret);
  785. } else {
  786. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  787. priv->rf_subtype);
  788. }
  789. }
  790. if (priv->device_id == WCN6750_DEVICE_ID ||
  791. priv->device_id == WCN6450_DEVICE_ID) {
  792. if (!icnss_get_temperature(priv, &temp)) {
  793. icnss_pr_dbg("Temperature: %d\n", temp);
  794. if (temp < WLAN_EN_TEMP_THRESHOLD)
  795. icnss_set_wlan_en_delay(priv);
  796. }
  797. ret = wlfw_host_cap_send_sync(priv);
  798. if (ret < 0)
  799. goto fail;
  800. }
  801. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  802. if (!priv->msa_va) {
  803. icnss_pr_err("Invalid MSA address\n");
  804. ret = -EINVAL;
  805. goto fail;
  806. }
  807. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  808. if (ret < 0) {
  809. ignore_assert = true;
  810. goto fail;
  811. }
  812. ret = wlfw_msa_ready_send_sync_msg(priv);
  813. if (ret < 0) {
  814. ignore_assert = true;
  815. goto fail;
  816. }
  817. }
  818. if (priv->device_id == WCN6450_DEVICE_ID)
  819. icnss_hw_power_off(priv);
  820. ret = wlfw_cap_send_sync_msg(priv);
  821. if (ret < 0) {
  822. ignore_assert = true;
  823. goto fail;
  824. }
  825. if (priv->device_id == ADRASTEA_DEVICE_ID && priv->is_chain1_supported) {
  826. ret = icnss_power_on_chain1_reg(priv);
  827. if (ret) {
  828. ignore_assert = true;
  829. goto fail;
  830. }
  831. }
  832. if (priv->device_id == WCN6750_DEVICE_ID ||
  833. priv->device_id == WCN6450_DEVICE_ID) {
  834. ret = icnss_hw_power_on(priv);
  835. if (ret)
  836. goto fail;
  837. ret = wlfw_device_info_send_msg(priv);
  838. if (ret < 0) {
  839. ignore_assert = true;
  840. goto device_info_failure;
  841. }
  842. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  843. priv->mem_base_pa,
  844. priv->mem_base_size);
  845. if (!priv->mem_base_va) {
  846. icnss_pr_err("Ioremap failed for bar address\n");
  847. goto device_info_failure;
  848. }
  849. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  850. &priv->mem_base_pa,
  851. priv->mem_base_va);
  852. if (priv->mhi_state_info_pa)
  853. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  854. priv->mhi_state_info_pa,
  855. PAGE_SIZE);
  856. if (!priv->mhi_state_info_va)
  857. icnss_pr_err("Ioremap failed for MHI info address\n");
  858. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  859. &priv->mhi_state_info_pa,
  860. priv->mhi_state_info_va);
  861. }
  862. if (priv->bdf_download_support) {
  863. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  864. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  865. priv->ctrl_params.bdf_type);
  866. if (ret < 0)
  867. goto device_info_failure;
  868. }
  869. if (priv->device_id == WCN6450_DEVICE_ID) {
  870. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  871. if (ret < 0)
  872. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  873. ret);
  874. }
  875. if (priv->device_id == WCN6750_DEVICE_ID ||
  876. priv->device_id == WCN6450_DEVICE_ID) {
  877. if (!priv->fw_soc_wake_ack_irq)
  878. register_soc_wake_notif(&priv->pdev->dev);
  879. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  880. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  881. }
  882. if (priv->wpss_supported)
  883. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  884. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  885. if (priv->bdf_download_support) {
  886. ret = wlfw_cal_report_req(priv);
  887. if (ret < 0)
  888. goto device_info_failure;
  889. }
  890. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  891. dynamic_feature_mask);
  892. }
  893. if (!priv->fw_error_fatal_irq)
  894. register_fw_error_notifications(&priv->pdev->dev);
  895. if (!priv->fw_early_crash_irq)
  896. register_early_crash_notifications(&priv->pdev->dev);
  897. if (priv->psf_supported)
  898. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  899. return ret;
  900. device_info_failure:
  901. icnss_hw_power_off(priv);
  902. fail:
  903. ICNSS_ASSERT(ignore_assert);
  904. qmi_registered:
  905. return ret;
  906. }
  907. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  908. {
  909. if (!priv)
  910. return -ENODEV;
  911. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  912. icnss_clear_server(priv);
  913. if (priv->psf_supported)
  914. priv->last_updated_voltage = 0;
  915. return 0;
  916. }
  917. static int icnss_call_driver_probe(struct icnss_priv *priv)
  918. {
  919. int ret = 0;
  920. int probe_cnt = 0;
  921. if (!priv->ops || !priv->ops->probe)
  922. return 0;
  923. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  924. return -EINVAL;
  925. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  926. icnss_hw_power_on(priv);
  927. icnss_block_shutdown(true);
  928. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  929. ret = priv->ops->probe(&priv->pdev->dev);
  930. probe_cnt++;
  931. if (ret != -EPROBE_DEFER)
  932. break;
  933. }
  934. if (ret < 0) {
  935. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  936. ret, priv->state, probe_cnt);
  937. icnss_block_shutdown(false);
  938. goto out;
  939. }
  940. icnss_block_shutdown(false);
  941. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  942. return 0;
  943. out:
  944. icnss_hw_power_off(priv);
  945. return ret;
  946. }
  947. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  948. {
  949. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  950. goto out;
  951. if (!priv->ops || !priv->ops->shutdown)
  952. goto out;
  953. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  954. goto out;
  955. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  956. priv->ops->shutdown(&priv->pdev->dev);
  957. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  958. out:
  959. return 0;
  960. }
  961. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  962. {
  963. int ret = 0;
  964. icnss_pm_relax(priv);
  965. icnss_call_driver_shutdown(priv);
  966. clear_bit(ICNSS_PDR, &priv->state);
  967. clear_bit(ICNSS_REJUVENATE, &priv->state);
  968. clear_bit(ICNSS_PD_RESTART, &priv->state);
  969. clear_bit(ICNSS_LOW_POWER, &priv->state);
  970. priv->early_crash_ind = false;
  971. priv->is_ssr = false;
  972. if (!priv->ops || !priv->ops->reinit)
  973. goto out;
  974. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  975. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  976. priv->state);
  977. goto out;
  978. }
  979. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  980. goto call_probe;
  981. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  982. icnss_hw_power_on(priv);
  983. icnss_block_shutdown(true);
  984. ret = priv->ops->reinit(&priv->pdev->dev);
  985. if (ret < 0) {
  986. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  987. ret, priv->state);
  988. if (!priv->allow_recursive_recovery)
  989. ICNSS_ASSERT(false);
  990. icnss_block_shutdown(false);
  991. goto out_power_off;
  992. }
  993. icnss_block_shutdown(false);
  994. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  995. return 0;
  996. call_probe:
  997. return icnss_call_driver_probe(priv);
  998. out_power_off:
  999. icnss_hw_power_off(priv);
  1000. out:
  1001. return ret;
  1002. }
  1003. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  1004. {
  1005. int ret = 0;
  1006. if (!priv)
  1007. return -ENODEV;
  1008. del_timer(&priv->recovery_timer);
  1009. set_bit(ICNSS_FW_READY, &priv->state);
  1010. clear_bit(ICNSS_MODE_ON, &priv->state);
  1011. atomic_set(&priv->soc_wake_ref_count, 0);
  1012. if (priv->device_id == WCN6750_DEVICE_ID ||
  1013. priv->device_id == WCN6450_DEVICE_ID)
  1014. icnss_free_qdss_mem(priv);
  1015. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1016. icnss_hw_power_off(priv);
  1017. if (!priv->pdev) {
  1018. icnss_pr_err("Device is not ready\n");
  1019. ret = -ENODEV;
  1020. goto out;
  1021. }
  1022. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1023. icnss_send_wlan_boot_complete();
  1024. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1025. ret = icnss_pd_restart_complete(priv);
  1026. } else {
  1027. if (priv->wpss_supported)
  1028. icnss_setup_dms_mac(priv);
  1029. ret = icnss_call_driver_probe(priv);
  1030. }
  1031. icnss_vreg_unvote(priv);
  1032. out:
  1033. return ret;
  1034. }
  1035. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1036. {
  1037. int ret = 0;
  1038. if (!priv)
  1039. return -ENODEV;
  1040. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1041. if (priv->device_id == WCN6750_DEVICE_ID) {
  1042. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1043. if (ret < 0)
  1044. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1045. ret);
  1046. }
  1047. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1048. mod_timer(&priv->recovery_timer,
  1049. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1050. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1051. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1052. } else {
  1053. icnss_driver_event_fw_ready_ind(priv, NULL);
  1054. }
  1055. return ret;
  1056. }
  1057. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1058. {
  1059. struct platform_device *pdev = priv->pdev;
  1060. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1061. int i, j;
  1062. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1063. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1064. qdss_mem[i].va =
  1065. dma_alloc_coherent(&pdev->dev,
  1066. qdss_mem[i].size,
  1067. &qdss_mem[i].pa,
  1068. GFP_KERNEL);
  1069. if (!qdss_mem[i].va) {
  1070. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1071. qdss_mem[i].size,
  1072. qdss_mem[i].type, i);
  1073. break;
  1074. }
  1075. }
  1076. }
  1077. /* Best-effort allocation for QDSS trace */
  1078. if (i < priv->qdss_mem_seg_len) {
  1079. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1080. qdss_mem[j].type = 0;
  1081. qdss_mem[j].size = 0;
  1082. }
  1083. priv->qdss_mem_seg_len = i;
  1084. }
  1085. return 0;
  1086. }
  1087. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1088. {
  1089. struct platform_device *pdev = priv->pdev;
  1090. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1091. int i;
  1092. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1093. if (qdss_mem[i].va && qdss_mem[i].size) {
  1094. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1095. &qdss_mem[i].pa, qdss_mem[i].size,
  1096. qdss_mem[i].type);
  1097. dma_free_coherent(&pdev->dev,
  1098. qdss_mem[i].size, qdss_mem[i].va,
  1099. qdss_mem[i].pa);
  1100. qdss_mem[i].va = NULL;
  1101. qdss_mem[i].pa = 0;
  1102. qdss_mem[i].size = 0;
  1103. qdss_mem[i].type = 0;
  1104. }
  1105. }
  1106. priv->qdss_mem_seg_len = 0;
  1107. }
  1108. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1109. {
  1110. int ret = 0;
  1111. ret = icnss_alloc_qdss_mem(priv);
  1112. if (ret < 0)
  1113. return ret;
  1114. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1115. }
  1116. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1117. u64 pa, u32 size, int *seg_id)
  1118. {
  1119. int i = 0;
  1120. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1121. u64 offset = 0;
  1122. void *va = NULL;
  1123. u64 local_pa;
  1124. u32 local_size;
  1125. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1126. local_pa = (u64)qdss_mem[i].pa;
  1127. local_size = (u32)qdss_mem[i].size;
  1128. if (pa == local_pa && size <= local_size) {
  1129. va = qdss_mem[i].va;
  1130. break;
  1131. }
  1132. if (pa > local_pa &&
  1133. pa < local_pa + local_size &&
  1134. pa + size <= local_pa + local_size) {
  1135. offset = pa - local_pa;
  1136. va = qdss_mem[i].va + offset;
  1137. break;
  1138. }
  1139. }
  1140. *seg_id = i;
  1141. return va;
  1142. }
  1143. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1144. void *data)
  1145. {
  1146. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1147. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1148. int ret = 0;
  1149. int i;
  1150. void *va = NULL;
  1151. u64 pa;
  1152. u32 size;
  1153. int seg_id = 0;
  1154. if (!priv->qdss_mem_seg_len) {
  1155. icnss_pr_err("Memory for QDSS trace is not available\n");
  1156. return -ENOMEM;
  1157. }
  1158. if (event_data->mem_seg_len == 0) {
  1159. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1160. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1161. ICNSS_GENL_MSG_TYPE_QDSS,
  1162. event_data->file_name,
  1163. qdss_mem[i].size);
  1164. if (ret < 0) {
  1165. icnss_pr_err("Fail to save QDSS data: %d\n",
  1166. ret);
  1167. break;
  1168. }
  1169. }
  1170. } else {
  1171. for (i = 0; i < event_data->mem_seg_len; i++) {
  1172. pa = event_data->mem_seg[i].addr;
  1173. size = event_data->mem_seg[i].size;
  1174. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1175. size, &seg_id);
  1176. if (!va) {
  1177. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1178. &pa);
  1179. ret = -EINVAL;
  1180. break;
  1181. }
  1182. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1183. event_data->file_name, size);
  1184. if (ret < 0) {
  1185. icnss_pr_err("Fail to save QDSS data: %d\n",
  1186. ret);
  1187. break;
  1188. }
  1189. }
  1190. }
  1191. kfree(data);
  1192. return ret;
  1193. }
  1194. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1195. {
  1196. int dec, c = atomic_read(v);
  1197. do {
  1198. dec = c - 1;
  1199. if (unlikely(dec < 1))
  1200. break;
  1201. } while (!atomic_try_cmpxchg(v, &c, dec));
  1202. return dec;
  1203. }
  1204. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1205. void *data)
  1206. {
  1207. int ret = 0;
  1208. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1209. if (!priv)
  1210. return -ENODEV;
  1211. if (!data)
  1212. return -EINVAL;
  1213. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1214. event_data->total_size);
  1215. kfree(data);
  1216. return ret;
  1217. }
  1218. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1219. {
  1220. int ret = 0;
  1221. if (!priv)
  1222. return -ENODEV;
  1223. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1224. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1225. atomic_read(&priv->soc_wake_ref_count));
  1226. return 0;
  1227. }
  1228. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1229. ICNSS_SMP2P_OUT_SOC_WAKE);
  1230. if (!ret)
  1231. atomic_inc(&priv->soc_wake_ref_count);
  1232. return ret;
  1233. }
  1234. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1235. {
  1236. int ret = 0;
  1237. if (!priv)
  1238. return -ENODEV;
  1239. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1240. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1241. priv->soc_wake_ref_count);
  1242. return 0;
  1243. }
  1244. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1245. ICNSS_SMP2P_OUT_SOC_WAKE);
  1246. return ret;
  1247. }
  1248. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1249. void *data)
  1250. {
  1251. int ret = 0;
  1252. int probe_cnt = 0;
  1253. if (priv->ops)
  1254. return -EEXIST;
  1255. priv->ops = data;
  1256. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1257. set_bit(ICNSS_FW_READY, &priv->state);
  1258. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1259. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1260. priv->state);
  1261. return -ENODEV;
  1262. }
  1263. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1264. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1265. priv->state);
  1266. goto out;
  1267. }
  1268. ret = icnss_hw_power_on(priv);
  1269. if (ret)
  1270. goto out;
  1271. icnss_block_shutdown(true);
  1272. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1273. ret = priv->ops->probe(&priv->pdev->dev);
  1274. probe_cnt++;
  1275. if (ret != -EPROBE_DEFER)
  1276. break;
  1277. }
  1278. if (ret) {
  1279. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1280. ret, priv->state, probe_cnt);
  1281. icnss_block_shutdown(false);
  1282. goto power_off;
  1283. }
  1284. icnss_block_shutdown(false);
  1285. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1286. return 0;
  1287. power_off:
  1288. icnss_hw_power_off(priv);
  1289. out:
  1290. return ret;
  1291. }
  1292. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1293. void *data)
  1294. {
  1295. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1296. priv->ops = NULL;
  1297. goto out;
  1298. }
  1299. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1300. icnss_block_shutdown(true);
  1301. if (priv->ops)
  1302. priv->ops->remove(&priv->pdev->dev);
  1303. icnss_block_shutdown(false);
  1304. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1305. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1306. priv->ops = NULL;
  1307. icnss_hw_power_off(priv);
  1308. out:
  1309. return 0;
  1310. }
  1311. static int icnss_fw_crashed(struct icnss_priv *priv,
  1312. struct icnss_event_pd_service_down_data *event_data)
  1313. {
  1314. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1315. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1316. set_bit(ICNSS_PD_RESTART, &priv->state);
  1317. icnss_pm_stay_awake(priv);
  1318. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1319. test_bit(ICNSS_FW_READY, &priv->state)) {
  1320. clear_bit(ICNSS_FW_READY, &priv->state);
  1321. fw_down_data.crashed = true;
  1322. icnss_call_driver_uevent(priv,
  1323. ICNSS_UEVENT_FW_DOWN,
  1324. &fw_down_data);
  1325. }
  1326. if (event_data && event_data->fw_rejuvenate)
  1327. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1328. return 0;
  1329. }
  1330. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1331. struct icnss_uevent_hang_data *hang_data)
  1332. {
  1333. if (!priv->hang_event_data_va)
  1334. return -EINVAL;
  1335. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1336. priv->hang_event_data_len,
  1337. GFP_ATOMIC);
  1338. if (!priv->hang_event_data)
  1339. return -ENOMEM;
  1340. // Update the hang event params
  1341. hang_data->hang_event_data = priv->hang_event_data;
  1342. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1343. return 0;
  1344. }
  1345. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1346. {
  1347. struct icnss_uevent_hang_data hang_data = {0};
  1348. int ret = 0xFF;
  1349. if (priv->early_crash_ind) {
  1350. ret = icnss_update_hang_event_data(priv, &hang_data);
  1351. if (ret)
  1352. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1353. }
  1354. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1355. &hang_data);
  1356. if (!ret) {
  1357. kfree(priv->hang_event_data);
  1358. priv->hang_event_data = NULL;
  1359. }
  1360. return 0;
  1361. }
  1362. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1363. void *data)
  1364. {
  1365. struct icnss_event_pd_service_down_data *event_data = data;
  1366. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1367. icnss_ignore_fw_timeout(false);
  1368. goto out;
  1369. }
  1370. if (priv->force_err_fatal)
  1371. ICNSS_ASSERT(0);
  1372. if (priv->device_id == WCN6750_DEVICE_ID ||
  1373. priv->device_id == WCN6450_DEVICE_ID) {
  1374. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1375. ICNSS_SMP2P_OUT_SOC_WAKE);
  1376. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1377. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1378. }
  1379. if (priv->wpss_supported)
  1380. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1381. ICNSS_SMP2P_OUT_POWER_SAVE);
  1382. icnss_send_hang_event_data(priv);
  1383. if (priv->early_crash_ind) {
  1384. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1385. event_data->crashed, priv->state);
  1386. goto out;
  1387. }
  1388. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1389. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1390. event_data->crashed, priv->state);
  1391. if (!priv->allow_recursive_recovery)
  1392. ICNSS_ASSERT(0);
  1393. goto out;
  1394. }
  1395. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1396. icnss_fw_crashed(priv, event_data);
  1397. out:
  1398. kfree(data);
  1399. return 0;
  1400. }
  1401. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1402. void *data)
  1403. {
  1404. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1405. icnss_ignore_fw_timeout(false);
  1406. goto out;
  1407. }
  1408. priv->early_crash_ind = true;
  1409. icnss_fw_crashed(priv, NULL);
  1410. out:
  1411. kfree(data);
  1412. return 0;
  1413. }
  1414. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1415. void *data)
  1416. {
  1417. int ret = 0;
  1418. if (!priv->ops || !priv->ops->idle_shutdown)
  1419. return 0;
  1420. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1421. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1422. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1423. ret = -EBUSY;
  1424. } else {
  1425. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1426. priv->state);
  1427. icnss_block_shutdown(true);
  1428. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1429. icnss_block_shutdown(false);
  1430. }
  1431. return ret;
  1432. }
  1433. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1434. void *data)
  1435. {
  1436. int ret = 0;
  1437. if (!priv->ops || !priv->ops->idle_restart)
  1438. return 0;
  1439. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1440. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1441. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1442. ret = -EBUSY;
  1443. } else {
  1444. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1445. priv->state);
  1446. icnss_block_shutdown(true);
  1447. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1448. icnss_block_shutdown(false);
  1449. }
  1450. return ret;
  1451. }
  1452. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1453. {
  1454. icnss_free_qdss_mem(priv);
  1455. return 0;
  1456. }
  1457. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1458. void *data)
  1459. {
  1460. struct icnss_m3_upload_segments_req_data *event_data = data;
  1461. struct qcom_dump_segment segment;
  1462. int i, status = 0, ret = 0;
  1463. struct list_head head;
  1464. if (!dump_enabled()) {
  1465. icnss_pr_info("Dump collection is not enabled\n");
  1466. return ret;
  1467. }
  1468. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1469. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1470. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1471. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1472. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1473. return ret;
  1474. INIT_LIST_HEAD(&head);
  1475. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1476. memset(&segment, 0, sizeof(segment));
  1477. segment.va = devm_ioremap(&priv->pdev->dev,
  1478. event_data->m3_segment[i].addr,
  1479. event_data->m3_segment[i].size);
  1480. if (!segment.va) {
  1481. icnss_pr_err("Failed to ioremap M3 Dump region");
  1482. ret = -ENOMEM;
  1483. goto send_resp;
  1484. }
  1485. segment.size = event_data->m3_segment[i].size;
  1486. list_add(&segment.node, &head);
  1487. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1488. event_data->m3_segment[i].name);
  1489. switch (event_data->m3_segment[i].type) {
  1490. case QMI_M3_SEGMENT_PHYAREG_V01:
  1491. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1492. break;
  1493. case QMI_M3_SEGMENT_PHYDBG_V01:
  1494. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1495. break;
  1496. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1497. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1498. break;
  1499. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1500. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1501. break;
  1502. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1503. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1504. break;
  1505. default:
  1506. icnss_pr_err("Invalid Segment type: %d",
  1507. event_data->m3_segment[i].type);
  1508. }
  1509. if (ret) {
  1510. status = ret;
  1511. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1512. event_data->m3_segment[i].name, ret);
  1513. }
  1514. list_del(&segment.node);
  1515. }
  1516. send_resp:
  1517. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1518. status);
  1519. return ret;
  1520. }
  1521. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1522. {
  1523. int ret = 0;
  1524. struct icnss_subsys_restart_level_data *event_data = data;
  1525. if (!priv)
  1526. return -ENODEV;
  1527. if (!data)
  1528. return -EINVAL;
  1529. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1530. kfree(data);
  1531. return ret;
  1532. }
  1533. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1534. {
  1535. int ret;
  1536. struct icnss_priv *priv = icnss_get_plat_priv();
  1537. rproc_shutdown(priv->rproc);
  1538. ret = rproc_boot(priv->rproc);
  1539. if (ret) {
  1540. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1541. rproc_put(priv->rproc);
  1542. }
  1543. }
  1544. static void icnss_driver_event_work(struct work_struct *work)
  1545. {
  1546. struct icnss_priv *priv =
  1547. container_of(work, struct icnss_priv, event_work);
  1548. struct icnss_driver_event *event;
  1549. unsigned long flags;
  1550. int ret;
  1551. icnss_pm_stay_awake(priv);
  1552. spin_lock_irqsave(&priv->event_lock, flags);
  1553. while (!list_empty(&priv->event_list)) {
  1554. event = list_first_entry(&priv->event_list,
  1555. struct icnss_driver_event, list);
  1556. list_del(&event->list);
  1557. spin_unlock_irqrestore(&priv->event_lock, flags);
  1558. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1559. icnss_driver_event_to_str(event->type),
  1560. event->sync ? "-sync" : "", event->type,
  1561. priv->state);
  1562. switch (event->type) {
  1563. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1564. ret = icnss_driver_event_server_arrive(priv,
  1565. event->data);
  1566. break;
  1567. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1568. ret = icnss_driver_event_server_exit(priv);
  1569. break;
  1570. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1571. ret = icnss_driver_event_fw_ready_ind(priv,
  1572. event->data);
  1573. break;
  1574. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1575. ret = icnss_driver_event_register_driver(priv,
  1576. event->data);
  1577. break;
  1578. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1579. ret = icnss_driver_event_unregister_driver(priv,
  1580. event->data);
  1581. break;
  1582. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1583. ret = icnss_driver_event_pd_service_down(priv,
  1584. event->data);
  1585. break;
  1586. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1587. ret = icnss_driver_event_early_crash_ind(priv,
  1588. event->data);
  1589. break;
  1590. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1591. ret = icnss_driver_event_idle_shutdown(priv,
  1592. event->data);
  1593. break;
  1594. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1595. ret = icnss_driver_event_idle_restart(priv,
  1596. event->data);
  1597. break;
  1598. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1599. ret = icnss_driver_event_fw_init_done(priv,
  1600. event->data);
  1601. break;
  1602. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1603. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1604. break;
  1605. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1606. ret = icnss_qdss_trace_save_hdlr(priv,
  1607. event->data);
  1608. break;
  1609. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1610. ret = icnss_qdss_trace_free_hdlr(priv);
  1611. break;
  1612. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1613. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1614. break;
  1615. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1616. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1617. event->data);
  1618. break;
  1619. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1620. ret = icnss_subsys_restart_level(priv, event->data);
  1621. break;
  1622. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1623. ret = icnss_process_wfc_call_ind_event(priv,
  1624. event->data);
  1625. break;
  1626. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1627. ret = icnss_process_twt_cfg_ind_event(priv,
  1628. event->data);
  1629. break;
  1630. default:
  1631. icnss_pr_err("Invalid Event type: %d", event->type);
  1632. kfree(event);
  1633. continue;
  1634. }
  1635. priv->stats.events[event->type].processed++;
  1636. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1637. icnss_driver_event_to_str(event->type),
  1638. event->sync ? "-sync" : "", event->type, ret,
  1639. priv->state);
  1640. spin_lock_irqsave(&priv->event_lock, flags);
  1641. if (event->sync) {
  1642. event->ret = ret;
  1643. complete(&event->complete);
  1644. continue;
  1645. }
  1646. spin_unlock_irqrestore(&priv->event_lock, flags);
  1647. kfree(event);
  1648. spin_lock_irqsave(&priv->event_lock, flags);
  1649. }
  1650. spin_unlock_irqrestore(&priv->event_lock, flags);
  1651. icnss_pm_relax(priv);
  1652. }
  1653. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1654. {
  1655. struct icnss_priv *priv =
  1656. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1657. struct icnss_soc_wake_event *event;
  1658. unsigned long flags;
  1659. int ret;
  1660. icnss_pm_stay_awake(priv);
  1661. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1662. while (!list_empty(&priv->soc_wake_msg_list)) {
  1663. event = list_first_entry(&priv->soc_wake_msg_list,
  1664. struct icnss_soc_wake_event, list);
  1665. list_del(&event->list);
  1666. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1667. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1668. icnss_soc_wake_event_to_str(event->type),
  1669. event->sync ? "-sync" : "", event->type,
  1670. priv->state);
  1671. switch (event->type) {
  1672. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1673. ret = icnss_event_soc_wake_request(priv,
  1674. event->data);
  1675. break;
  1676. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1677. ret = icnss_event_soc_wake_release(priv,
  1678. event->data);
  1679. break;
  1680. default:
  1681. icnss_pr_err("Invalid Event type: %d", event->type);
  1682. kfree(event);
  1683. continue;
  1684. }
  1685. priv->stats.soc_wake_events[event->type].processed++;
  1686. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1687. icnss_soc_wake_event_to_str(event->type),
  1688. event->sync ? "-sync" : "", event->type, ret,
  1689. priv->state);
  1690. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1691. if (event->sync) {
  1692. event->ret = ret;
  1693. complete(&event->complete);
  1694. continue;
  1695. }
  1696. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1697. kfree(event);
  1698. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1699. }
  1700. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1701. icnss_pm_relax(priv);
  1702. }
  1703. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1704. {
  1705. int ret = 0;
  1706. struct qcom_dump_segment segment;
  1707. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1708. struct list_head head;
  1709. if (!dump_enabled()) {
  1710. icnss_pr_info("Dump collection is not enabled\n");
  1711. return ret;
  1712. }
  1713. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1714. return ret;
  1715. INIT_LIST_HEAD(&head);
  1716. memset(&segment, 0, sizeof(segment));
  1717. segment.va = priv->msa_va;
  1718. segment.size = priv->msa_mem_size;
  1719. list_add(&segment.node, &head);
  1720. if (!msa0_dump_dev->dev) {
  1721. icnss_pr_err("Created Dump Device not found\n");
  1722. return 0;
  1723. }
  1724. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1725. if (ret) {
  1726. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1727. return ret;
  1728. }
  1729. list_del(&segment.node);
  1730. return ret;
  1731. }
  1732. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1733. void *data)
  1734. {
  1735. struct qcom_ssr_notify_data *notif = data;
  1736. int ret = 0;
  1737. if (!notif->crashed) {
  1738. if (atomic_read(&priv->is_shutdown)) {
  1739. atomic_set(&priv->is_shutdown, false);
  1740. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1741. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1742. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1743. clear_bit(ICNSS_FW_READY, &priv->state);
  1744. icnss_driver_event_post(priv,
  1745. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1746. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1747. NULL);
  1748. }
  1749. }
  1750. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1751. if (!wait_for_completion_timeout(
  1752. &priv->unblock_shutdown,
  1753. msecs_to_jiffies(PROBE_TIMEOUT)))
  1754. icnss_pr_err("modem block shutdown timeout\n");
  1755. }
  1756. ret = wlfw_send_modem_shutdown_msg(priv);
  1757. if (ret < 0)
  1758. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1759. ret);
  1760. }
  1761. }
  1762. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1763. {
  1764. switch (code) {
  1765. case QCOM_SSR_BEFORE_POWERUP:
  1766. return "BEFORE_POWERUP";
  1767. case QCOM_SSR_AFTER_POWERUP:
  1768. return "AFTER_POWERUP";
  1769. case QCOM_SSR_BEFORE_SHUTDOWN:
  1770. return "BEFORE_SHUTDOWN";
  1771. case QCOM_SSR_AFTER_SHUTDOWN:
  1772. return "AFTER_SHUTDOWN";
  1773. default:
  1774. return "UNKNOWN";
  1775. }
  1776. };
  1777. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1778. unsigned long code,
  1779. void *data)
  1780. {
  1781. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1782. wpss_early_ssr_nb);
  1783. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1784. icnss_qcom_ssr_notify_state_to_str(code), code);
  1785. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1786. set_bit(ICNSS_FW_DOWN, &priv->state);
  1787. icnss_ignore_fw_timeout(true);
  1788. }
  1789. return NOTIFY_DONE;
  1790. }
  1791. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1792. unsigned long code,
  1793. void *data)
  1794. {
  1795. struct icnss_event_pd_service_down_data *event_data;
  1796. struct qcom_ssr_notify_data *notif = data;
  1797. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1798. wpss_ssr_nb);
  1799. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1800. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1801. icnss_qcom_ssr_notify_state_to_str(code), code);
  1802. switch (code) {
  1803. case QCOM_SSR_BEFORE_SHUTDOWN:
  1804. break;
  1805. case QCOM_SSR_AFTER_SHUTDOWN:
  1806. /* Collect ramdump only when there was a crash. */
  1807. if (notif->crashed) {
  1808. icnss_pr_info("Collecting msa0 segment dump\n");
  1809. icnss_msa0_ramdump(priv);
  1810. }
  1811. goto out;
  1812. default:
  1813. goto out;
  1814. }
  1815. if (priv->wpss_self_recovery_enabled)
  1816. del_timer(&priv->wpss_ssr_timer);
  1817. priv->is_ssr = true;
  1818. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1819. priv->state, notif->crashed);
  1820. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1821. icnss_update_state_send_modem_shutdown(priv, data);
  1822. set_bit(ICNSS_FW_DOWN, &priv->state);
  1823. icnss_ignore_fw_timeout(true);
  1824. if (notif->crashed)
  1825. priv->stats.recovery.root_pd_crash++;
  1826. else
  1827. priv->stats.recovery.root_pd_shutdown++;
  1828. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1829. if (event_data == NULL)
  1830. return notifier_from_errno(-ENOMEM);
  1831. event_data->crashed = notif->crashed;
  1832. fw_down_data.crashed = !!notif->crashed;
  1833. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1834. clear_bit(ICNSS_FW_READY, &priv->state);
  1835. fw_down_data.crashed = !!notif->crashed;
  1836. icnss_call_driver_uevent(priv,
  1837. ICNSS_UEVENT_FW_DOWN,
  1838. &fw_down_data);
  1839. }
  1840. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1841. ICNSS_EVENT_SYNC, event_data);
  1842. if (notif->crashed)
  1843. mod_timer(&priv->recovery_timer,
  1844. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1845. out:
  1846. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1847. return NOTIFY_OK;
  1848. }
  1849. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1850. unsigned long code,
  1851. void *data)
  1852. {
  1853. struct icnss_event_pd_service_down_data *event_data;
  1854. struct qcom_ssr_notify_data *notif = data;
  1855. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1856. modem_ssr_nb);
  1857. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1858. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1859. icnss_qcom_ssr_notify_state_to_str(code), code);
  1860. switch (code) {
  1861. case QCOM_SSR_BEFORE_SHUTDOWN:
  1862. if (priv->is_slate_rfa)
  1863. complete(&priv->slate_boot_complete);
  1864. if (!notif->crashed &&
  1865. priv->low_power_support) { /* Hibernate */
  1866. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1867. icnss_driver_event_post(
  1868. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1869. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1870. set_bit(ICNSS_LOW_POWER, &priv->state);
  1871. }
  1872. break;
  1873. case QCOM_SSR_AFTER_SHUTDOWN:
  1874. /* Collect ramdump only when there was a crash. */
  1875. if (notif->crashed) {
  1876. icnss_pr_info("Collecting msa0 segment dump\n");
  1877. icnss_msa0_ramdump(priv);
  1878. }
  1879. goto out;
  1880. default:
  1881. goto out;
  1882. }
  1883. priv->is_ssr = true;
  1884. if (notif->crashed) {
  1885. priv->stats.recovery.root_pd_crash++;
  1886. priv->root_pd_shutdown = false;
  1887. } else {
  1888. priv->stats.recovery.root_pd_shutdown++;
  1889. priv->root_pd_shutdown = true;
  1890. }
  1891. icnss_update_state_send_modem_shutdown(priv, data);
  1892. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1893. set_bit(ICNSS_FW_DOWN, &priv->state);
  1894. icnss_ignore_fw_timeout(true);
  1895. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1896. clear_bit(ICNSS_FW_READY, &priv->state);
  1897. fw_down_data.crashed = !!notif->crashed;
  1898. icnss_call_driver_uevent(priv,
  1899. ICNSS_UEVENT_FW_DOWN,
  1900. &fw_down_data);
  1901. }
  1902. goto out;
  1903. }
  1904. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1905. priv->state, notif->crashed);
  1906. set_bit(ICNSS_FW_DOWN, &priv->state);
  1907. icnss_ignore_fw_timeout(true);
  1908. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1909. if (event_data == NULL)
  1910. return notifier_from_errno(-ENOMEM);
  1911. event_data->crashed = notif->crashed;
  1912. fw_down_data.crashed = !!notif->crashed;
  1913. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1914. clear_bit(ICNSS_FW_READY, &priv->state);
  1915. fw_down_data.crashed = !!notif->crashed;
  1916. icnss_call_driver_uevent(priv,
  1917. ICNSS_UEVENT_FW_DOWN,
  1918. &fw_down_data);
  1919. }
  1920. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1921. ICNSS_EVENT_SYNC, event_data);
  1922. if (notif->crashed)
  1923. mod_timer(&priv->recovery_timer,
  1924. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1925. out:
  1926. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1927. return NOTIFY_OK;
  1928. }
  1929. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1930. {
  1931. int ret = 0;
  1932. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1933. priv->wpss_early_notify_handler =
  1934. qcom_register_early_ssr_notifier("wpss",
  1935. &priv->wpss_early_ssr_nb);
  1936. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler)) {
  1937. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1938. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1939. }
  1940. return ret;
  1941. }
  1942. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1943. {
  1944. int ret = 0;
  1945. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1946. /*
  1947. * Assign priority of icnss wpss notifier callback over IPA
  1948. * modem notifier callback which is 0
  1949. */
  1950. priv->wpss_ssr_nb.priority = 1;
  1951. priv->wpss_notify_handler =
  1952. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1953. if (IS_ERR_OR_NULL(priv->wpss_notify_handler)) {
  1954. ret = PTR_ERR(priv->wpss_notify_handler);
  1955. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1956. }
  1957. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1958. return ret;
  1959. }
  1960. #ifdef CONFIG_SLATE_MODULE_ENABLED
  1961. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1962. unsigned long event, void *data)
  1963. {
  1964. icnss_pr_info("Received slate event 0x%x\n", event);
  1965. if (event == SLATE_STATUS) {
  1966. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1967. seb_nb);
  1968. enum boot_status status = *(enum boot_status *)data;
  1969. if (status == SLATE_READY) {
  1970. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1971. priv->state);
  1972. set_bit(ICNSS_SLATE_READY, &priv->state);
  1973. set_bit(ICNSS_SLATE_UP, &priv->state);
  1974. complete(&priv->slate_boot_complete);
  1975. }
  1976. }
  1977. return NOTIFY_OK;
  1978. }
  1979. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1980. {
  1981. int ret = 0;
  1982. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1983. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1984. &priv->seb_nb);
  1985. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1986. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1987. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1988. ret);
  1989. }
  1990. return ret;
  1991. }
  1992. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1993. {
  1994. int ret = 0;
  1995. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1996. if (ret < 0)
  1997. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1998. return ret;
  1999. }
  2000. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  2001. unsigned long code,
  2002. void *data)
  2003. {
  2004. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2005. slate_ssr_nb);
  2006. int ret = 0;
  2007. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  2008. if (code == QCOM_SSR_AFTER_POWERUP &&
  2009. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  2010. set_bit(ICNSS_SLATE_UP, &priv->state);
  2011. complete(&priv->slate_boot_complete);
  2012. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  2013. priv->state);
  2014. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  2015. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2016. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2017. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2018. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2019. priv->state);
  2020. goto skip_pdr;
  2021. }
  2022. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2023. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2024. if (ret < 0) {
  2025. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2026. ret, priv->state);
  2027. goto skip_pdr;
  2028. }
  2029. }
  2030. skip_pdr:
  2031. return NOTIFY_OK;
  2032. }
  2033. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2034. {
  2035. int ret = 0;
  2036. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2037. priv->slate_notify_handler =
  2038. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2039. if (IS_ERR_OR_NULL(priv->slate_notify_handler)) {
  2040. ret = PTR_ERR(priv->slate_notify_handler);
  2041. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2042. }
  2043. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2044. return ret;
  2045. }
  2046. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2047. {
  2048. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2049. return 0;
  2050. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2051. &priv->slate_ssr_nb);
  2052. priv->slate_notify_handler = NULL;
  2053. return 0;
  2054. }
  2055. #else
  2056. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2057. {
  2058. return 0;
  2059. }
  2060. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2061. {
  2062. return 0;
  2063. }
  2064. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2065. {
  2066. return 0;
  2067. }
  2068. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2069. {
  2070. return 0;
  2071. }
  2072. #endif
  2073. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2074. {
  2075. int ret = 0;
  2076. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2077. /*
  2078. * Assign priority of icnss modem notifier callback over IPA
  2079. * modem notifier callback which is 0
  2080. */
  2081. priv->modem_ssr_nb.priority = 1;
  2082. priv->modem_notify_handler =
  2083. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2084. if (IS_ERR_OR_NULL(priv->modem_notify_handler)) {
  2085. ret = PTR_ERR(priv->modem_notify_handler);
  2086. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2087. }
  2088. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2089. return ret;
  2090. }
  2091. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2092. {
  2093. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler))
  2094. return;
  2095. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2096. &priv->wpss_early_ssr_nb);
  2097. priv->wpss_early_notify_handler = NULL;
  2098. }
  2099. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2100. {
  2101. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2102. return 0;
  2103. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2104. &priv->wpss_ssr_nb);
  2105. priv->wpss_notify_handler = NULL;
  2106. return 0;
  2107. }
  2108. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2109. {
  2110. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2111. return 0;
  2112. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2113. &priv->modem_ssr_nb);
  2114. priv->modem_notify_handler = NULL;
  2115. return 0;
  2116. }
  2117. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2118. {
  2119. struct icnss_priv *priv = priv_cb;
  2120. struct icnss_event_pd_service_down_data *event_data;
  2121. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2122. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2123. if (!priv)
  2124. return;
  2125. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2126. state, priv->state);
  2127. switch (state) {
  2128. case SERVREG_SERVICE_STATE_DOWN:
  2129. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2130. if (!event_data)
  2131. return;
  2132. event_data->crashed = true;
  2133. if (!priv->is_ssr) {
  2134. set_bit(ICNSS_PDR, &penv->state);
  2135. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2136. cause = ICNSS_HOST_ERROR;
  2137. priv->stats.recovery.pdr_host_error++;
  2138. } else {
  2139. cause = ICNSS_FW_CRASH;
  2140. priv->stats.recovery.pdr_fw_crash++;
  2141. }
  2142. } else if (priv->root_pd_shutdown) {
  2143. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2144. event_data->crashed = false;
  2145. }
  2146. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2147. priv->state, icnss_pdr_cause[cause]);
  2148. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2149. set_bit(ICNSS_FW_DOWN, &priv->state);
  2150. icnss_ignore_fw_timeout(true);
  2151. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2152. clear_bit(ICNSS_FW_READY, &priv->state);
  2153. fw_down_data.crashed = event_data->crashed;
  2154. icnss_call_driver_uevent(priv,
  2155. ICNSS_UEVENT_FW_DOWN,
  2156. &fw_down_data);
  2157. }
  2158. }
  2159. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2160. if (event_data->crashed)
  2161. mod_timer(&priv->recovery_timer,
  2162. jiffies +
  2163. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2164. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2165. ICNSS_EVENT_SYNC, event_data);
  2166. break;
  2167. case SERVREG_SERVICE_STATE_UP:
  2168. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2169. break;
  2170. default:
  2171. break;
  2172. }
  2173. return;
  2174. }
  2175. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2176. {
  2177. struct pdr_handle *handle = NULL;
  2178. struct pdr_service *service = NULL;
  2179. int err = 0;
  2180. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2181. if (IS_ERR_OR_NULL(handle)) {
  2182. err = PTR_ERR(handle);
  2183. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2184. goto out;
  2185. }
  2186. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2187. if (IS_ERR_OR_NULL(service)) {
  2188. err = PTR_ERR(service);
  2189. icnss_pr_err("Failed to add lookup, err %d", err);
  2190. goto out;
  2191. }
  2192. priv->pdr_handle = handle;
  2193. priv->pdr_service = service;
  2194. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2195. icnss_pr_info("PDR registration happened");
  2196. out:
  2197. return err;
  2198. }
  2199. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2200. {
  2201. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2202. return;
  2203. pdr_handle_release(priv->pdr_handle);
  2204. }
  2205. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2206. {
  2207. int ret = 0;
  2208. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2209. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2210. #else
  2211. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2212. #endif
  2213. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2214. ret = PTR_ERR(priv->icnss_ramdump_class);
  2215. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2216. return ret;
  2217. }
  2218. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2219. ICNSS_RAMDUMP_NAME);
  2220. if (ret < 0) {
  2221. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2222. goto fail_alloc_major;
  2223. }
  2224. return 0;
  2225. fail_alloc_major:
  2226. class_destroy(priv->icnss_ramdump_class);
  2227. return ret;
  2228. }
  2229. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2230. {
  2231. int ret = 0;
  2232. struct icnss_ramdump_info *ramdump_info;
  2233. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2234. if (!ramdump_info)
  2235. return ERR_PTR(-ENOMEM);
  2236. if (!dev_name) {
  2237. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2238. return NULL;
  2239. }
  2240. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2241. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2242. if (ramdump_info->minor < 0) {
  2243. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2244. ramdump_info->minor);
  2245. ret = -ENODEV;
  2246. goto fail_out_of_minors;
  2247. }
  2248. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2249. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2250. ramdump_info->minor),
  2251. ramdump_info, ramdump_info->name);
  2252. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2253. ret = PTR_ERR(ramdump_info->dev);
  2254. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2255. ramdump_info->name, ret);
  2256. goto fail_device_create;
  2257. }
  2258. return (void *)ramdump_info;
  2259. fail_device_create:
  2260. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2261. fail_out_of_minors:
  2262. kfree(ramdump_info);
  2263. return ERR_PTR(ret);
  2264. }
  2265. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2266. {
  2267. int ret = 0;
  2268. if (!priv || !priv->pdev) {
  2269. icnss_pr_err("Platform priv or pdev is NULL\n");
  2270. return -EINVAL;
  2271. }
  2272. ret = icnss_ramdump_devnode_init(priv);
  2273. if (ret)
  2274. return ret;
  2275. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2276. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2277. icnss_pr_err("Failed to create msa0 dump device!");
  2278. return -ENOMEM;
  2279. }
  2280. if (priv->device_id == WCN6750_DEVICE_ID ||
  2281. priv->device_id == WCN6450_DEVICE_ID) {
  2282. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2283. ICNSS_M3_SEGMENT(
  2284. ICNSS_M3_SEGMENT_PHYAREG));
  2285. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2286. !priv->m3_dump_phyareg->dev) {
  2287. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2288. return -ENOMEM;
  2289. }
  2290. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2291. ICNSS_M3_SEGMENT(
  2292. ICNSS_M3_SEGMENT_PHYA));
  2293. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2294. !priv->m3_dump_phydbg->dev) {
  2295. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2296. return -ENOMEM;
  2297. }
  2298. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2299. ICNSS_M3_SEGMENT(
  2300. ICNSS_M3_SEGMENT_WMACREG));
  2301. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2302. !priv->m3_dump_wmac0reg->dev) {
  2303. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2304. return -ENOMEM;
  2305. }
  2306. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2307. ICNSS_M3_SEGMENT(
  2308. ICNSS_M3_SEGMENT_WCSSDBG));
  2309. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2310. !priv->m3_dump_wcssdbg->dev) {
  2311. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2312. return -ENOMEM;
  2313. }
  2314. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2315. ICNSS_M3_SEGMENT(
  2316. ICNSS_M3_SEGMENT_PHYAM3));
  2317. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2318. !priv->m3_dump_phyapdmem->dev) {
  2319. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2320. return -ENOMEM;
  2321. }
  2322. }
  2323. return 0;
  2324. }
  2325. static int icnss_enable_recovery(struct icnss_priv *priv)
  2326. {
  2327. int ret;
  2328. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2329. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2330. return 0;
  2331. }
  2332. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2333. icnss_pr_dbg("SSR disabled through module parameter\n");
  2334. goto enable_pdr;
  2335. }
  2336. ret = icnss_register_ramdump_devices(priv);
  2337. if (ret)
  2338. return ret;
  2339. if (priv->wpss_supported) {
  2340. icnss_wpss_early_ssr_register_notifier(priv);
  2341. icnss_wpss_ssr_register_notifier(priv);
  2342. return 0;
  2343. }
  2344. if (!(priv->rproc_fw_download))
  2345. icnss_modem_ssr_register_notifier(priv);
  2346. if (priv->is_slate_rfa) {
  2347. icnss_slate_ssr_register_notifier(priv);
  2348. icnss_register_slate_event_notifier(priv);
  2349. }
  2350. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2351. icnss_pr_dbg("PDR disabled through module parameter\n");
  2352. return 0;
  2353. }
  2354. enable_pdr:
  2355. ret = icnss_pd_restart_enable(priv);
  2356. if (ret)
  2357. return ret;
  2358. return 0;
  2359. }
  2360. static int icnss_dev_id_match(struct icnss_priv *priv,
  2361. struct device_info *dev_info)
  2362. {
  2363. while (dev_info->device_id) {
  2364. if (priv->device_id == dev_info->device_id)
  2365. return 1;
  2366. dev_info++;
  2367. }
  2368. return 0;
  2369. }
  2370. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2371. unsigned long *thermal_state)
  2372. {
  2373. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2374. *thermal_state = icnss_tcdev->max_thermal_state;
  2375. return 0;
  2376. }
  2377. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2378. unsigned long *thermal_state)
  2379. {
  2380. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2381. *thermal_state = icnss_tcdev->curr_thermal_state;
  2382. return 0;
  2383. }
  2384. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2385. unsigned long thermal_state)
  2386. {
  2387. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2388. struct device *dev = &penv->pdev->dev;
  2389. int ret = 0;
  2390. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2391. return 0;
  2392. if (thermal_state > icnss_tcdev->max_thermal_state)
  2393. return -EINVAL;
  2394. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2395. thermal_state, icnss_tcdev->tcdev_id);
  2396. mutex_lock(&penv->tcdev_lock);
  2397. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2398. icnss_tcdev->tcdev_id);
  2399. if (!ret)
  2400. icnss_tcdev->curr_thermal_state = thermal_state;
  2401. mutex_unlock(&penv->tcdev_lock);
  2402. if (ret) {
  2403. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2404. ret, icnss_tcdev->tcdev_id);
  2405. return ret;
  2406. }
  2407. return 0;
  2408. }
  2409. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2410. .get_max_state = icnss_tcdev_get_max_state,
  2411. .get_cur_state = icnss_tcdev_get_cur_state,
  2412. .set_cur_state = icnss_tcdev_set_cur_state,
  2413. };
  2414. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2415. int tcdev_id)
  2416. {
  2417. struct icnss_priv *priv = dev_get_drvdata(dev);
  2418. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2419. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2420. struct device_node *dev_node;
  2421. int ret = 0;
  2422. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2423. if (!icnss_tcdev)
  2424. return -ENOMEM;
  2425. icnss_tcdev->tcdev_id = tcdev_id;
  2426. icnss_tcdev->max_thermal_state = max_state;
  2427. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2428. "qcom,icnss_cdev%d", tcdev_id);
  2429. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2430. if (!dev_node) {
  2431. icnss_pr_err("Failed to get cooling device node\n");
  2432. return -EINVAL;
  2433. }
  2434. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2435. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2436. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2437. dev_node,
  2438. cdev_node_name, icnss_tcdev,
  2439. &icnss_cooling_ops);
  2440. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2441. ret = PTR_ERR(icnss_tcdev->tcdev);
  2442. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2443. ret, icnss_tcdev->tcdev_id);
  2444. } else {
  2445. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2446. icnss_tcdev->tcdev_id);
  2447. list_add(&icnss_tcdev->tcdev_list,
  2448. &priv->icnss_tcdev_list);
  2449. }
  2450. } else {
  2451. icnss_pr_dbg("Cooling device registration not supported");
  2452. ret = -EOPNOTSUPP;
  2453. }
  2454. return ret;
  2455. }
  2456. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2457. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2458. {
  2459. struct icnss_priv *priv = dev_get_drvdata(dev);
  2460. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2461. while (!list_empty(&priv->icnss_tcdev_list)) {
  2462. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2463. struct icnss_thermal_cdev,
  2464. tcdev_list);
  2465. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2466. list_del(&icnss_tcdev->tcdev_list);
  2467. kfree(icnss_tcdev);
  2468. }
  2469. }
  2470. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2471. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2472. unsigned long *thermal_state,
  2473. int tcdev_id)
  2474. {
  2475. struct icnss_priv *priv = dev_get_drvdata(dev);
  2476. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2477. mutex_lock(&priv->tcdev_lock);
  2478. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2479. if (icnss_tcdev->tcdev_id != tcdev_id)
  2480. continue;
  2481. *thermal_state = icnss_tcdev->curr_thermal_state;
  2482. mutex_unlock(&priv->tcdev_lock);
  2483. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2484. icnss_tcdev->curr_thermal_state, tcdev_id);
  2485. return 0;
  2486. }
  2487. mutex_unlock(&priv->tcdev_lock);
  2488. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2489. return -EINVAL;
  2490. }
  2491. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2492. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2493. int cmd_len, void *cb_ctx,
  2494. int (*cb)(void *ctx, void *event, int event_len))
  2495. {
  2496. struct icnss_priv *priv = icnss_get_plat_priv();
  2497. int ret;
  2498. if (!priv)
  2499. return -ENODEV;
  2500. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2501. return -EINVAL;
  2502. priv->get_info_cb = cb;
  2503. priv->get_info_cb_ctx = cb_ctx;
  2504. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2505. if (ret) {
  2506. priv->get_info_cb = NULL;
  2507. priv->get_info_cb_ctx = NULL;
  2508. }
  2509. return ret;
  2510. }
  2511. EXPORT_SYMBOL(icnss_qmi_send);
  2512. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2513. struct module *owner, const char *mod_name)
  2514. {
  2515. int ret = 0;
  2516. struct icnss_priv *priv = icnss_get_plat_priv();
  2517. if (!priv || !priv->pdev) {
  2518. ret = -ENODEV;
  2519. goto out;
  2520. }
  2521. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2522. if (priv->ops) {
  2523. icnss_pr_err("Driver already registered\n");
  2524. ret = -EEXIST;
  2525. goto out;
  2526. }
  2527. if (!ops->dev_info) {
  2528. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2529. return -EINVAL;
  2530. }
  2531. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2532. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2533. ops->dev_info->name);
  2534. return -ENODEV;
  2535. }
  2536. if (!ops->probe || !ops->remove) {
  2537. ret = -EINVAL;
  2538. goto out;
  2539. }
  2540. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2541. 0, ops);
  2542. if (ret == -EINTR)
  2543. ret = 0;
  2544. out:
  2545. return ret;
  2546. }
  2547. EXPORT_SYMBOL(__icnss_register_driver);
  2548. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2549. {
  2550. int ret;
  2551. struct icnss_priv *priv = icnss_get_plat_priv();
  2552. if (!priv || !priv->pdev) {
  2553. ret = -ENODEV;
  2554. goto out;
  2555. }
  2556. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2557. if (!priv->ops) {
  2558. icnss_pr_err("Driver not registered\n");
  2559. ret = -ENOENT;
  2560. goto out;
  2561. }
  2562. ret = icnss_driver_event_post(priv,
  2563. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2564. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2565. out:
  2566. return ret;
  2567. }
  2568. EXPORT_SYMBOL(icnss_unregister_driver);
  2569. static struct icnss_msi_config msi_config_wcn6750 = {
  2570. .total_vectors = 28,
  2571. .total_users = 2,
  2572. .users = (struct icnss_msi_user[]) {
  2573. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2574. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2575. },
  2576. };
  2577. static struct icnss_msi_config msi_config_wcn6450 = {
  2578. .total_vectors = 14,
  2579. .total_users = 2,
  2580. .users = (struct icnss_msi_user[]) {
  2581. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2582. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2583. },
  2584. };
  2585. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2586. {
  2587. if (priv->device_id == WCN6750_DEVICE_ID)
  2588. priv->msi_config = &msi_config_wcn6750;
  2589. else
  2590. priv->msi_config = &msi_config_wcn6450;
  2591. return 0;
  2592. }
  2593. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2594. int *num_vectors, u32 *user_base_data,
  2595. u32 *base_vector)
  2596. {
  2597. struct icnss_priv *priv = dev_get_drvdata(dev);
  2598. struct icnss_msi_config *msi_config;
  2599. int idx;
  2600. if (!priv)
  2601. return -ENODEV;
  2602. msi_config = priv->msi_config;
  2603. if (!msi_config) {
  2604. icnss_pr_err("MSI is not supported.\n");
  2605. return -EINVAL;
  2606. }
  2607. for (idx = 0; idx < msi_config->total_users; idx++) {
  2608. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2609. *num_vectors = msi_config->users[idx].num_vectors;
  2610. *user_base_data = msi_config->users[idx].base_vector
  2611. + priv->msi_base_data;
  2612. *base_vector = msi_config->users[idx].base_vector;
  2613. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2614. user_name, *num_vectors, *user_base_data,
  2615. *base_vector);
  2616. return 0;
  2617. }
  2618. }
  2619. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2620. return -EINVAL;
  2621. }
  2622. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2623. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2624. {
  2625. struct icnss_priv *priv = dev_get_drvdata(dev);
  2626. int irq_num;
  2627. irq_num = priv->srng_irqs[vector];
  2628. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2629. irq_num, vector);
  2630. return irq_num;
  2631. }
  2632. EXPORT_SYMBOL(icnss_get_msi_irq);
  2633. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2634. u32 *msi_addr_high)
  2635. {
  2636. struct icnss_priv *priv = dev_get_drvdata(dev);
  2637. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2638. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2639. }
  2640. EXPORT_SYMBOL(icnss_get_msi_address);
  2641. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2642. irqreturn_t (*handler)(int, void *),
  2643. unsigned long flags, const char *name, void *ctx)
  2644. {
  2645. int ret = 0;
  2646. unsigned int irq;
  2647. struct ce_irq_list *irq_entry;
  2648. struct icnss_priv *priv = dev_get_drvdata(dev);
  2649. if (!priv || !priv->pdev) {
  2650. ret = -ENODEV;
  2651. goto out;
  2652. }
  2653. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2654. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2655. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2656. ret = -EINVAL;
  2657. goto out;
  2658. }
  2659. irq = priv->ce_irqs[ce_id];
  2660. irq_entry = &priv->ce_irq_list[ce_id];
  2661. if (irq_entry->handler || irq_entry->irq) {
  2662. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2663. irq, ce_id);
  2664. ret = -EEXIST;
  2665. goto out;
  2666. }
  2667. ret = request_irq(irq, handler, flags, name, ctx);
  2668. if (ret) {
  2669. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2670. irq, ce_id, ret);
  2671. goto out;
  2672. }
  2673. irq_entry->irq = irq;
  2674. irq_entry->handler = handler;
  2675. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2676. penv->stats.ce_irqs[ce_id].request++;
  2677. out:
  2678. return ret;
  2679. }
  2680. EXPORT_SYMBOL(icnss_ce_request_irq);
  2681. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2682. {
  2683. int ret = 0;
  2684. unsigned int irq;
  2685. struct ce_irq_list *irq_entry;
  2686. if (!penv || !penv->pdev || !dev) {
  2687. ret = -ENODEV;
  2688. goto out;
  2689. }
  2690. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2691. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2692. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2693. ret = -EINVAL;
  2694. goto out;
  2695. }
  2696. irq = penv->ce_irqs[ce_id];
  2697. irq_entry = &penv->ce_irq_list[ce_id];
  2698. if (!irq_entry->handler || !irq_entry->irq) {
  2699. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2700. ret = -EEXIST;
  2701. goto out;
  2702. }
  2703. free_irq(irq, ctx);
  2704. irq_entry->irq = 0;
  2705. irq_entry->handler = NULL;
  2706. penv->stats.ce_irqs[ce_id].free++;
  2707. out:
  2708. return ret;
  2709. }
  2710. EXPORT_SYMBOL(icnss_ce_free_irq);
  2711. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2712. {
  2713. unsigned int irq;
  2714. if (!penv || !penv->pdev || !dev) {
  2715. icnss_pr_err("Platform driver not initialized\n");
  2716. return;
  2717. }
  2718. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2719. penv->state);
  2720. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2721. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2722. return;
  2723. }
  2724. penv->stats.ce_irqs[ce_id].enable++;
  2725. irq = penv->ce_irqs[ce_id];
  2726. enable_irq(irq);
  2727. }
  2728. EXPORT_SYMBOL(icnss_enable_irq);
  2729. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2730. {
  2731. unsigned int irq;
  2732. if (!penv || !penv->pdev || !dev) {
  2733. icnss_pr_err("Platform driver not initialized\n");
  2734. return;
  2735. }
  2736. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2737. penv->state);
  2738. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2739. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2740. ce_id);
  2741. return;
  2742. }
  2743. irq = penv->ce_irqs[ce_id];
  2744. disable_irq(irq);
  2745. penv->stats.ce_irqs[ce_id].disable++;
  2746. }
  2747. EXPORT_SYMBOL(icnss_disable_irq);
  2748. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2749. {
  2750. char *fw_build_timestamp = NULL;
  2751. struct icnss_priv *priv = dev_get_drvdata(dev);
  2752. if (!priv) {
  2753. icnss_pr_err("Platform driver not initialized\n");
  2754. return -EINVAL;
  2755. }
  2756. info->v_addr = priv->mem_base_va;
  2757. info->p_addr = priv->mem_base_pa;
  2758. info->chip_id = priv->chip_info.chip_id;
  2759. info->chip_family = priv->chip_info.chip_family;
  2760. info->board_id = priv->board_id;
  2761. info->soc_id = priv->soc_id;
  2762. info->fw_version = priv->fw_version_info.fw_version;
  2763. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2764. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2765. strlcpy(info->fw_build_timestamp,
  2766. priv->fw_version_info.fw_build_timestamp,
  2767. WLFW_MAX_TIMESTAMP_LEN + 1);
  2768. strlcpy(info->fw_build_id, priv->fw_build_id,
  2769. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2770. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2771. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2772. info->phy_qam_cap = priv->phy_qam_cap;
  2773. memcpy(&info->dev_mem_info, &priv->dev_mem_info,
  2774. sizeof(info->dev_mem_info));
  2775. return 0;
  2776. }
  2777. EXPORT_SYMBOL(icnss_get_soc_info);
  2778. int icnss_get_mhi_state(struct device *dev)
  2779. {
  2780. struct icnss_priv *priv = dev_get_drvdata(dev);
  2781. if (!priv) {
  2782. icnss_pr_err("Platform driver not initialized\n");
  2783. return -EINVAL;
  2784. }
  2785. if (!priv->mhi_state_info_va)
  2786. return -ENOMEM;
  2787. return ioread32(priv->mhi_state_info_va);
  2788. }
  2789. EXPORT_SYMBOL(icnss_get_mhi_state);
  2790. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2791. {
  2792. int ret;
  2793. struct icnss_priv *priv;
  2794. if (!dev)
  2795. return -ENODEV;
  2796. priv = dev_get_drvdata(dev);
  2797. if (!priv) {
  2798. icnss_pr_err("Platform driver not initialized\n");
  2799. return -EINVAL;
  2800. }
  2801. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2802. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2803. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2804. priv->state);
  2805. return -EINVAL;
  2806. }
  2807. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2808. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2809. if (ret)
  2810. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2811. ret, fw_log_mode);
  2812. return ret;
  2813. }
  2814. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2815. int icnss_force_wake_request(struct device *dev)
  2816. {
  2817. struct icnss_priv *priv;
  2818. if (!dev)
  2819. return -ENODEV;
  2820. priv = dev_get_drvdata(dev);
  2821. if (!priv) {
  2822. icnss_pr_err("Platform driver not initialized\n");
  2823. return -EINVAL;
  2824. }
  2825. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2826. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2827. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2828. priv->state);
  2829. return -EINVAL;
  2830. }
  2831. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2832. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2833. atomic_read(&priv->soc_wake_ref_count));
  2834. return 0;
  2835. }
  2836. icnss_pr_soc_wake("Calling SOC Wake request");
  2837. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2838. 0, NULL);
  2839. return 0;
  2840. }
  2841. EXPORT_SYMBOL(icnss_force_wake_request);
  2842. int icnss_force_wake_release(struct device *dev)
  2843. {
  2844. struct icnss_priv *priv;
  2845. if (!dev)
  2846. return -ENODEV;
  2847. priv = dev_get_drvdata(dev);
  2848. if (!priv) {
  2849. icnss_pr_err("Platform driver not initialized\n");
  2850. return -EINVAL;
  2851. }
  2852. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2853. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2854. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2855. priv->state);
  2856. return -EINVAL;
  2857. }
  2858. icnss_pr_soc_wake("Calling SOC Wake response");
  2859. if (atomic_read(&priv->soc_wake_ref_count) &&
  2860. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2861. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2862. atomic_read(&priv->soc_wake_ref_count));
  2863. return 0;
  2864. }
  2865. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2866. 0, NULL);
  2867. return 0;
  2868. }
  2869. EXPORT_SYMBOL(icnss_force_wake_release);
  2870. int icnss_is_device_awake(struct device *dev)
  2871. {
  2872. struct icnss_priv *priv = dev_get_drvdata(dev);
  2873. if (!priv) {
  2874. icnss_pr_err("Platform driver not initialized\n");
  2875. return -EINVAL;
  2876. }
  2877. return atomic_read(&priv->soc_wake_ref_count);
  2878. }
  2879. EXPORT_SYMBOL(icnss_is_device_awake);
  2880. int icnss_is_pci_ep_awake(struct device *dev)
  2881. {
  2882. struct icnss_priv *priv = dev_get_drvdata(dev);
  2883. if (!priv) {
  2884. icnss_pr_err("Platform driver not initialized\n");
  2885. return -EINVAL;
  2886. }
  2887. if (!priv->mhi_state_info_va)
  2888. return -ENOMEM;
  2889. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2890. }
  2891. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2892. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2893. uint32_t mem_type, uint32_t data_len,
  2894. uint8_t *output)
  2895. {
  2896. int ret = 0;
  2897. struct icnss_priv *priv = dev_get_drvdata(dev);
  2898. if (priv->magic != ICNSS_MAGIC) {
  2899. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2900. dev, priv, priv->magic);
  2901. return -EINVAL;
  2902. }
  2903. if (!output || data_len == 0
  2904. || data_len > WLFW_MAX_DATA_SIZE) {
  2905. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2906. output, data_len);
  2907. ret = -EINVAL;
  2908. goto out;
  2909. }
  2910. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2911. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2912. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2913. priv->state);
  2914. ret = -EINVAL;
  2915. goto out;
  2916. }
  2917. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2918. data_len, output);
  2919. out:
  2920. return ret;
  2921. }
  2922. EXPORT_SYMBOL(icnss_athdiag_read);
  2923. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2924. uint32_t mem_type, uint32_t data_len,
  2925. uint8_t *input)
  2926. {
  2927. int ret = 0;
  2928. struct icnss_priv *priv = dev_get_drvdata(dev);
  2929. if (priv->magic != ICNSS_MAGIC) {
  2930. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2931. dev, priv, priv->magic);
  2932. return -EINVAL;
  2933. }
  2934. if (!input || data_len == 0
  2935. || data_len > WLFW_MAX_DATA_SIZE) {
  2936. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2937. input, data_len);
  2938. ret = -EINVAL;
  2939. goto out;
  2940. }
  2941. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2942. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2943. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2944. priv->state);
  2945. ret = -EINVAL;
  2946. goto out;
  2947. }
  2948. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2949. data_len, input);
  2950. out:
  2951. return ret;
  2952. }
  2953. EXPORT_SYMBOL(icnss_athdiag_write);
  2954. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2955. enum icnss_driver_mode mode,
  2956. const char *host_version)
  2957. {
  2958. struct icnss_priv *priv = dev_get_drvdata(dev);
  2959. int temp = 0, ret = 0;
  2960. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2961. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2962. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2963. priv->state);
  2964. return -EINVAL;
  2965. }
  2966. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2967. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2968. priv->state);
  2969. return -EINVAL;
  2970. }
  2971. if (priv->wpss_supported &&
  2972. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2973. icnss_setup_dms_mac(priv);
  2974. if (priv->device_id == WCN6750_DEVICE_ID) {
  2975. if (!icnss_get_temperature(priv, &temp)) {
  2976. icnss_pr_dbg("Temperature: %d\n", temp);
  2977. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2978. icnss_set_wlan_en_delay(priv);
  2979. }
  2980. }
  2981. if (priv->device_id == WCN6450_DEVICE_ID)
  2982. icnss_hw_power_off(priv);
  2983. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2984. if (priv->device_id == WCN6450_DEVICE_ID)
  2985. icnss_hw_power_on(priv);
  2986. return ret;
  2987. }
  2988. EXPORT_SYMBOL(icnss_wlan_enable);
  2989. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2990. {
  2991. struct icnss_priv *priv = dev_get_drvdata(dev);
  2992. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2993. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2994. priv->state);
  2995. return 0;
  2996. }
  2997. return icnss_send_wlan_disable_to_fw(priv);
  2998. }
  2999. EXPORT_SYMBOL(icnss_wlan_disable);
  3000. bool icnss_is_qmi_disable(struct device *dev)
  3001. {
  3002. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  3003. }
  3004. EXPORT_SYMBOL(icnss_is_qmi_disable);
  3005. int icnss_get_ce_id(struct device *dev, int irq)
  3006. {
  3007. int i;
  3008. if (!penv || !penv->pdev || !dev)
  3009. return -ENODEV;
  3010. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3011. if (penv->ce_irqs[i] == irq)
  3012. return i;
  3013. }
  3014. icnss_pr_err("No matching CE id for irq %d\n", irq);
  3015. return -EINVAL;
  3016. }
  3017. EXPORT_SYMBOL(icnss_get_ce_id);
  3018. int icnss_get_irq(struct device *dev, int ce_id)
  3019. {
  3020. int irq;
  3021. if (!penv || !penv->pdev || !dev)
  3022. return -ENODEV;
  3023. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3024. return -EINVAL;
  3025. irq = penv->ce_irqs[ce_id];
  3026. return irq;
  3027. }
  3028. EXPORT_SYMBOL(icnss_get_irq);
  3029. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3030. {
  3031. struct icnss_priv *priv = dev_get_drvdata(dev);
  3032. if (!priv) {
  3033. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3034. return NULL;
  3035. }
  3036. return priv->iommu_domain;
  3037. }
  3038. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3039. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3040. int icnss_iommu_map(struct iommu_domain *domain,
  3041. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3042. {
  3043. return iommu_map(domain, iova, paddr, size, prot);
  3044. }
  3045. #else
  3046. int icnss_iommu_map(struct iommu_domain *domain,
  3047. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3048. {
  3049. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3050. }
  3051. #endif
  3052. int icnss_smmu_map(struct device *dev,
  3053. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3054. {
  3055. struct icnss_priv *priv = dev_get_drvdata(dev);
  3056. int flag = IOMMU_READ | IOMMU_WRITE;
  3057. bool dma_coherent = false;
  3058. unsigned long iova;
  3059. int prop_len = 0;
  3060. size_t len;
  3061. int ret = 0;
  3062. if (!priv) {
  3063. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3064. dev, priv);
  3065. return -EINVAL;
  3066. }
  3067. if (!iova_addr) {
  3068. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3069. &paddr, size);
  3070. return -EINVAL;
  3071. }
  3072. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3073. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3074. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3075. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3076. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3077. iova,
  3078. &priv->smmu_iova_ipa_start,
  3079. priv->smmu_iova_ipa_len);
  3080. return -ENOMEM;
  3081. }
  3082. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3083. icnss_pr_dbg("dma-coherent is %s\n",
  3084. dma_coherent ? "enabled" : "disabled");
  3085. if (dma_coherent)
  3086. flag |= IOMMU_CACHE;
  3087. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3088. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3089. rounddown(paddr, PAGE_SIZE), len,
  3090. flag);
  3091. if (ret) {
  3092. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3093. return ret;
  3094. }
  3095. priv->smmu_iova_ipa_current = iova + len;
  3096. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3097. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3098. return 0;
  3099. }
  3100. EXPORT_SYMBOL(icnss_smmu_map);
  3101. int icnss_smmu_unmap(struct device *dev,
  3102. uint32_t iova_addr, size_t size)
  3103. {
  3104. struct icnss_priv *priv = dev_get_drvdata(dev);
  3105. unsigned long iova;
  3106. size_t len, unmapped_len;
  3107. if (!priv) {
  3108. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3109. dev, priv);
  3110. return -EINVAL;
  3111. }
  3112. if (!iova_addr) {
  3113. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3114. size);
  3115. return -EINVAL;
  3116. }
  3117. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3118. PAGE_SIZE);
  3119. iova = rounddown(iova_addr, PAGE_SIZE);
  3120. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3121. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3122. iova,
  3123. &priv->smmu_iova_ipa_start,
  3124. priv->smmu_iova_ipa_len);
  3125. return -ENOMEM;
  3126. }
  3127. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3128. iova, len);
  3129. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3130. if (unmapped_len != len) {
  3131. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3132. return -EINVAL;
  3133. }
  3134. priv->smmu_iova_ipa_current = iova;
  3135. return 0;
  3136. }
  3137. EXPORT_SYMBOL(icnss_smmu_unmap);
  3138. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3139. {
  3140. return socinfo_get_serial_number();
  3141. }
  3142. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3143. int icnss_trigger_recovery(struct device *dev)
  3144. {
  3145. int ret = 0;
  3146. struct icnss_priv *priv = dev_get_drvdata(dev);
  3147. if (priv->magic != ICNSS_MAGIC) {
  3148. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3149. ret = -EINVAL;
  3150. goto out;
  3151. }
  3152. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3153. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3154. priv->state);
  3155. ret = -EPERM;
  3156. goto out;
  3157. }
  3158. if (priv->wpss_supported) {
  3159. icnss_pr_vdbg("Initiate Root PD restart");
  3160. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3161. ICNSS_SMP2P_OUT_POWER_SAVE);
  3162. if (!ret)
  3163. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3164. return ret;
  3165. }
  3166. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3167. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3168. priv->state);
  3169. ret = -EOPNOTSUPP;
  3170. goto out;
  3171. }
  3172. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3173. priv->state);
  3174. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3175. if (!ret)
  3176. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3177. out:
  3178. return ret;
  3179. }
  3180. EXPORT_SYMBOL(icnss_trigger_recovery);
  3181. int icnss_idle_shutdown(struct device *dev)
  3182. {
  3183. struct icnss_priv *priv = dev_get_drvdata(dev);
  3184. if (!priv) {
  3185. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3186. return -EINVAL;
  3187. }
  3188. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3189. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3190. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3191. return -EBUSY;
  3192. }
  3193. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3194. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3195. }
  3196. EXPORT_SYMBOL(icnss_idle_shutdown);
  3197. int icnss_idle_restart(struct device *dev)
  3198. {
  3199. struct icnss_priv *priv = dev_get_drvdata(dev);
  3200. if (!priv) {
  3201. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3202. return -EINVAL;
  3203. }
  3204. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3205. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3206. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3207. return -EBUSY;
  3208. }
  3209. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3210. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3211. }
  3212. EXPORT_SYMBOL(icnss_idle_restart);
  3213. int icnss_exit_power_save(struct device *dev)
  3214. {
  3215. struct icnss_priv *priv = dev_get_drvdata(dev);
  3216. icnss_pr_vdbg("Calling Exit Power Save\n");
  3217. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3218. !test_bit(ICNSS_MODE_ON, &priv->state))
  3219. return 0;
  3220. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3221. ICNSS_SMP2P_OUT_POWER_SAVE);
  3222. }
  3223. EXPORT_SYMBOL(icnss_exit_power_save);
  3224. int icnss_prevent_l1(struct device *dev)
  3225. {
  3226. struct icnss_priv *priv = dev_get_drvdata(dev);
  3227. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3228. !test_bit(ICNSS_MODE_ON, &priv->state))
  3229. return 0;
  3230. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3231. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3232. }
  3233. EXPORT_SYMBOL(icnss_prevent_l1);
  3234. void icnss_allow_l1(struct device *dev)
  3235. {
  3236. struct icnss_priv *priv = dev_get_drvdata(dev);
  3237. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3238. !test_bit(ICNSS_MODE_ON, &priv->state))
  3239. return;
  3240. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3241. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3242. }
  3243. EXPORT_SYMBOL(icnss_allow_l1);
  3244. void icnss_allow_recursive_recovery(struct device *dev)
  3245. {
  3246. struct icnss_priv *priv = dev_get_drvdata(dev);
  3247. priv->allow_recursive_recovery = true;
  3248. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3249. }
  3250. void icnss_disallow_recursive_recovery(struct device *dev)
  3251. {
  3252. struct icnss_priv *priv = dev_get_drvdata(dev);
  3253. priv->allow_recursive_recovery = false;
  3254. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3255. }
  3256. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3257. {
  3258. struct kobject *icnss_kobject;
  3259. int ret = 0;
  3260. atomic_set(&priv->is_shutdown, false);
  3261. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3262. if (!icnss_kobject) {
  3263. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3264. return -EINVAL;
  3265. }
  3266. priv->icnss_kobject = icnss_kobject;
  3267. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3268. if (ret) {
  3269. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3270. return ret;
  3271. }
  3272. return ret;
  3273. }
  3274. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3275. {
  3276. struct kobject *icnss_kobject;
  3277. icnss_kobject = priv->icnss_kobject;
  3278. if (icnss_kobject)
  3279. kobject_put(icnss_kobject);
  3280. }
  3281. static ssize_t qdss_tr_start_store(struct device *dev,
  3282. struct device_attribute *attr,
  3283. const char *buf, size_t count)
  3284. {
  3285. struct icnss_priv *priv = dev_get_drvdata(dev);
  3286. wlfw_qdss_trace_start(priv);
  3287. icnss_pr_dbg("Received QDSS start command\n");
  3288. return count;
  3289. }
  3290. static ssize_t qdss_tr_stop_store(struct device *dev,
  3291. struct device_attribute *attr,
  3292. const char *user_buf, size_t count)
  3293. {
  3294. struct icnss_priv *priv = dev_get_drvdata(dev);
  3295. u32 option = 0;
  3296. if (sscanf(user_buf, "%du", &option) != 1)
  3297. return -EINVAL;
  3298. wlfw_qdss_trace_stop(priv, option);
  3299. icnss_pr_dbg("Received QDSS stop command\n");
  3300. return count;
  3301. }
  3302. static ssize_t qdss_conf_download_store(struct device *dev,
  3303. struct device_attribute *attr,
  3304. const char *buf, size_t count)
  3305. {
  3306. struct icnss_priv *priv = dev_get_drvdata(dev);
  3307. icnss_wlfw_qdss_dnld_send_sync(priv);
  3308. icnss_pr_dbg("Received QDSS download config command\n");
  3309. return count;
  3310. }
  3311. static ssize_t hw_trc_override_store(struct device *dev,
  3312. struct device_attribute *attr,
  3313. const char *buf, size_t count)
  3314. {
  3315. struct icnss_priv *priv = dev_get_drvdata(dev);
  3316. int tmp = 0;
  3317. if (sscanf(buf, "%du", &tmp) != 1)
  3318. return -EINVAL;
  3319. priv->hw_trc_override = tmp;
  3320. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3321. return count;
  3322. }
  3323. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3324. {
  3325. struct icnss_priv *priv = icnss_get_plat_priv();
  3326. phandle rproc_phandle;
  3327. int ret;
  3328. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3329. &rproc_phandle)) {
  3330. icnss_pr_err("error reading rproc phandle\n");
  3331. return;
  3332. }
  3333. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3334. if (IS_ERR_OR_NULL(priv->rproc)) {
  3335. icnss_pr_err("rproc not found");
  3336. return;
  3337. }
  3338. ret = rproc_boot(priv->rproc);
  3339. if (ret) {
  3340. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3341. rproc_put(priv->rproc);
  3342. }
  3343. }
  3344. static ssize_t wpss_boot_store(struct device *dev,
  3345. struct device_attribute *attr,
  3346. const char *buf, size_t count)
  3347. {
  3348. struct icnss_priv *priv = dev_get_drvdata(dev);
  3349. int wpss_rproc = 0;
  3350. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3351. return count;
  3352. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3353. icnss_pr_err("Failed to read wpss rproc info");
  3354. return -EINVAL;
  3355. }
  3356. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3357. if (wpss_rproc == 1)
  3358. schedule_work(&wpss_loader);
  3359. else if (wpss_rproc == 0)
  3360. icnss_wpss_unload(priv);
  3361. return count;
  3362. }
  3363. static ssize_t wlan_en_delay_store(struct device *dev,
  3364. struct device_attribute *attr,
  3365. const char *buf, size_t count)
  3366. {
  3367. struct icnss_priv *priv = dev_get_drvdata(dev);
  3368. uint32_t wlan_en_delay = 0;
  3369. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3370. return count;
  3371. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3372. icnss_pr_err("Failed to read wlan_en_delay");
  3373. return -EINVAL;
  3374. }
  3375. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3376. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3377. return count;
  3378. }
  3379. static DEVICE_ATTR_WO(qdss_tr_start);
  3380. static DEVICE_ATTR_WO(qdss_tr_stop);
  3381. static DEVICE_ATTR_WO(qdss_conf_download);
  3382. static DEVICE_ATTR_WO(hw_trc_override);
  3383. static DEVICE_ATTR_WO(wpss_boot);
  3384. static DEVICE_ATTR_WO(wlan_en_delay);
  3385. static struct attribute *icnss_attrs[] = {
  3386. &dev_attr_qdss_tr_start.attr,
  3387. &dev_attr_qdss_tr_stop.attr,
  3388. &dev_attr_qdss_conf_download.attr,
  3389. &dev_attr_hw_trc_override.attr,
  3390. &dev_attr_wpss_boot.attr,
  3391. &dev_attr_wlan_en_delay.attr,
  3392. NULL,
  3393. };
  3394. static struct attribute_group icnss_attr_group = {
  3395. .attrs = icnss_attrs,
  3396. };
  3397. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3398. {
  3399. struct device *dev = &priv->pdev->dev;
  3400. int ret;
  3401. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3402. if (ret) {
  3403. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3404. ret);
  3405. goto out;
  3406. }
  3407. return 0;
  3408. out:
  3409. return ret;
  3410. }
  3411. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3412. {
  3413. sysfs_remove_link(kernel_kobj, "icnss");
  3414. }
  3415. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3416. union icnss_device_group_devres {
  3417. const struct attribute_group *group;
  3418. };
  3419. static void devm_icnss_group_remove(struct device *dev, void *res)
  3420. {
  3421. union icnss_device_group_devres *devres = res;
  3422. const struct attribute_group *group = devres->group;
  3423. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3424. sysfs_remove_group(&dev->kobj, group);
  3425. }
  3426. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3427. {
  3428. return ((union icnss_device_group_devres *)res) == data;
  3429. }
  3430. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3431. {
  3432. WARN_ON(devres_release(&priv->pdev->dev,
  3433. devm_icnss_group_remove, devm_icnss_group_match,
  3434. (void *)&icnss_attr_group));
  3435. }
  3436. #else
  3437. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3438. {
  3439. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3440. }
  3441. #endif
  3442. static int icnss_sysfs_create(struct icnss_priv *priv)
  3443. {
  3444. int ret = 0;
  3445. ret = devm_device_add_group(&priv->pdev->dev,
  3446. &icnss_attr_group);
  3447. if (ret) {
  3448. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3449. ret);
  3450. goto out;
  3451. }
  3452. icnss_create_sysfs_link(priv);
  3453. ret = icnss_create_shutdown_sysfs(priv);
  3454. if (ret)
  3455. goto remove_icnss_group;
  3456. return 0;
  3457. remove_icnss_group:
  3458. icnss_devm_device_remove_group(priv);
  3459. out:
  3460. return ret;
  3461. }
  3462. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3463. {
  3464. icnss_destroy_shutdown_sysfs(priv);
  3465. icnss_remove_sysfs_link(priv);
  3466. icnss_devm_device_remove_group(priv);
  3467. }
  3468. static int icnss_resource_parse(struct icnss_priv *priv)
  3469. {
  3470. int ret = 0, i = 0, irq = 0;
  3471. struct platform_device *pdev = priv->pdev;
  3472. struct device *dev = &pdev->dev;
  3473. struct resource *res;
  3474. u32 int_prop;
  3475. ret = icnss_get_vreg(priv);
  3476. if (ret) {
  3477. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3478. goto out;
  3479. }
  3480. ret = icnss_get_clk(priv);
  3481. if (ret) {
  3482. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3483. goto put_vreg;
  3484. }
  3485. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3486. ret = icnss_get_psf_info(priv);
  3487. if (ret < 0)
  3488. goto out;
  3489. priv->psf_supported = true;
  3490. }
  3491. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3492. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3493. "membase");
  3494. if (!res) {
  3495. icnss_pr_err("Memory base not found in DT\n");
  3496. ret = -EINVAL;
  3497. goto put_clk;
  3498. }
  3499. priv->mem_base_pa = res->start;
  3500. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3501. resource_size(res));
  3502. if (!priv->mem_base_va) {
  3503. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3504. &priv->mem_base_pa);
  3505. ret = -EINVAL;
  3506. goto put_clk;
  3507. }
  3508. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3509. &priv->mem_base_pa,
  3510. priv->mem_base_va);
  3511. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3512. irq = platform_get_irq(pdev, i);
  3513. if (irq < 0) {
  3514. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3515. ret = -ENODEV;
  3516. goto put_clk;
  3517. } else {
  3518. priv->ce_irqs[i] = irq;
  3519. }
  3520. }
  3521. if (of_property_read_bool(pdev->dev.of_node,
  3522. "qcom,is_low_power")) {
  3523. priv->low_power_support = true;
  3524. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3525. }
  3526. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3527. &priv->rf_subtype) == 0) {
  3528. priv->is_rf_subtype_valid = true;
  3529. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3530. }
  3531. if (of_property_read_bool(pdev->dev.of_node,
  3532. "qcom,is_slate_rfa")) {
  3533. priv->is_slate_rfa = true;
  3534. icnss_pr_err("SLATE rfa is enabled\n");
  3535. }
  3536. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3537. priv->device_id == WCN6450_DEVICE_ID) {
  3538. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3539. "msi_addr");
  3540. if (!res) {
  3541. icnss_pr_err("MSI address not found in DT\n");
  3542. ret = -EINVAL;
  3543. goto put_clk;
  3544. }
  3545. priv->msi_addr_pa = res->start;
  3546. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3547. PAGE_SIZE,
  3548. DMA_FROM_DEVICE, 0);
  3549. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3550. icnss_pr_err("MSI: failed to map msi address\n");
  3551. priv->msi_addr_iova = 0;
  3552. ret = -ENOMEM;
  3553. goto put_clk;
  3554. }
  3555. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3556. &priv->msi_addr_pa,
  3557. priv->msi_addr_iova);
  3558. ret = of_property_read_u32_index(dev->of_node,
  3559. "interrupts",
  3560. 1,
  3561. &int_prop);
  3562. if (ret) {
  3563. icnss_pr_dbg("Read interrupt prop failed");
  3564. goto put_clk;
  3565. }
  3566. priv->msi_base_data = int_prop + 32;
  3567. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3568. priv->msi_base_data, int_prop);
  3569. icnss_get_msi_assignment(priv);
  3570. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3571. irq = platform_get_irq(priv->pdev, i);
  3572. if (irq < 0) {
  3573. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3574. ret = -ENODEV;
  3575. goto put_clk;
  3576. } else {
  3577. priv->srng_irqs[i] = irq;
  3578. }
  3579. }
  3580. }
  3581. return 0;
  3582. put_clk:
  3583. icnss_put_clk(priv);
  3584. put_vreg:
  3585. icnss_put_vreg(priv);
  3586. out:
  3587. return ret;
  3588. }
  3589. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3590. {
  3591. int ret = 0;
  3592. struct platform_device *pdev = priv->pdev;
  3593. struct device *dev = &pdev->dev;
  3594. struct device_node *np = NULL;
  3595. u64 prop_size = 0;
  3596. const __be32 *addrp = NULL;
  3597. np = of_parse_phandle(dev->of_node,
  3598. "qcom,wlan-msa-fixed-region", 0);
  3599. if (np) {
  3600. addrp = of_get_address(np, 0, &prop_size, NULL);
  3601. if (!addrp) {
  3602. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3603. ret = -EINVAL;
  3604. of_node_put(np);
  3605. goto out;
  3606. }
  3607. priv->msa_pa = of_translate_address(np, addrp);
  3608. if (priv->msa_pa == OF_BAD_ADDR) {
  3609. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3610. ret = -EINVAL;
  3611. of_node_put(np);
  3612. goto out;
  3613. }
  3614. of_node_put(np);
  3615. priv->msa_va = memremap(priv->msa_pa,
  3616. (unsigned long)prop_size, MEMREMAP_WT);
  3617. if (!priv->msa_va) {
  3618. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3619. &priv->msa_pa);
  3620. ret = -EINVAL;
  3621. goto out;
  3622. }
  3623. priv->msa_mem_size = prop_size;
  3624. } else {
  3625. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3626. &priv->msa_mem_size);
  3627. if (ret || priv->msa_mem_size == 0) {
  3628. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3629. priv->msa_mem_size, ret);
  3630. goto out;
  3631. }
  3632. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3633. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3634. if (!priv->msa_va) {
  3635. icnss_pr_err("DMA alloc failed for MSA\n");
  3636. ret = -ENOMEM;
  3637. goto out;
  3638. }
  3639. }
  3640. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3641. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3642. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3643. "qcom,fw-prefix");
  3644. return 0;
  3645. out:
  3646. return ret;
  3647. }
  3648. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3649. struct device *dev, unsigned long iova,
  3650. int flags, void *handler_token)
  3651. {
  3652. struct icnss_priv *priv = handler_token;
  3653. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3654. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3655. if (!priv) {
  3656. icnss_pr_err("priv is NULL\n");
  3657. return -ENODEV;
  3658. }
  3659. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3660. fw_down_data.crashed = true;
  3661. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3662. &fw_down_data);
  3663. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3664. &fw_down_data);
  3665. }
  3666. icnss_trigger_recovery(&priv->pdev->dev);
  3667. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3668. return -ENOSYS;
  3669. }
  3670. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3671. {
  3672. int ret = 0;
  3673. struct platform_device *pdev = priv->pdev;
  3674. struct device *dev = &pdev->dev;
  3675. const char *iommu_dma_type;
  3676. struct resource *res;
  3677. u32 addr_win[2];
  3678. ret = of_property_read_u32_array(dev->of_node,
  3679. "qcom,iommu-dma-addr-pool",
  3680. addr_win,
  3681. ARRAY_SIZE(addr_win));
  3682. if (ret) {
  3683. icnss_pr_err("SMMU IOVA base not found\n");
  3684. } else {
  3685. priv->smmu_iova_start = addr_win[0];
  3686. priv->smmu_iova_len = addr_win[1];
  3687. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3688. &priv->smmu_iova_start,
  3689. priv->smmu_iova_len);
  3690. priv->iommu_domain =
  3691. iommu_get_domain_for_dev(&pdev->dev);
  3692. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3693. &iommu_dma_type);
  3694. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3695. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3696. priv->smmu_s1_enable = true;
  3697. if (priv->device_id == WCN6750_DEVICE_ID ||
  3698. priv->device_id == WCN6450_DEVICE_ID)
  3699. iommu_set_fault_handler(priv->iommu_domain,
  3700. icnss_smmu_fault_handler,
  3701. priv);
  3702. }
  3703. res = platform_get_resource_byname(pdev,
  3704. IORESOURCE_MEM,
  3705. "smmu_iova_ipa");
  3706. if (!res) {
  3707. icnss_pr_err("SMMU IOVA IPA not found\n");
  3708. } else {
  3709. priv->smmu_iova_ipa_start = res->start;
  3710. priv->smmu_iova_ipa_current = res->start;
  3711. priv->smmu_iova_ipa_len = resource_size(res);
  3712. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3713. &priv->smmu_iova_ipa_start,
  3714. priv->smmu_iova_ipa_len);
  3715. }
  3716. }
  3717. return 0;
  3718. }
  3719. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3720. {
  3721. if (!priv)
  3722. return -ENODEV;
  3723. if (!priv->smmu_iova_len)
  3724. return -EINVAL;
  3725. *addr = priv->smmu_iova_start;
  3726. *size = priv->smmu_iova_len;
  3727. return 0;
  3728. }
  3729. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3730. {
  3731. if (!priv)
  3732. return -ENODEV;
  3733. if (!priv->smmu_iova_ipa_len)
  3734. return -EINVAL;
  3735. *addr = priv->smmu_iova_ipa_start;
  3736. *size = priv->smmu_iova_ipa_len;
  3737. return 0;
  3738. }
  3739. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3740. char *name)
  3741. {
  3742. if (!priv)
  3743. return;
  3744. if (!priv->use_prefix_path) {
  3745. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3746. return;
  3747. }
  3748. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3749. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3750. ADRASTEA_PATH_PREFIX "%s", name);
  3751. else if (priv->device_id == WCN6750_DEVICE_ID)
  3752. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3753. QCA6750_PATH_PREFIX "%s", name);
  3754. else if (priv->device_id == WCN6450_DEVICE_ID)
  3755. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3756. WCN6450_PATH_PREFIX "%s", name);
  3757. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3758. }
  3759. static const struct platform_device_id icnss_platform_id_table[] = {
  3760. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3761. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3762. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3763. { },
  3764. };
  3765. static const struct of_device_id icnss_dt_match[] = {
  3766. {
  3767. .compatible = "qcom,wcn6750",
  3768. .data = (void *)&icnss_platform_id_table[0]},
  3769. {
  3770. .compatible = "qcom,icnss",
  3771. .data = (void *)&icnss_platform_id_table[1]},
  3772. {
  3773. .compatible = "qcom,wcn6450",
  3774. .data = (void *)&icnss_platform_id_table[2]},
  3775. { },
  3776. };
  3777. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3778. static void icnss_init_control_params(struct icnss_priv *priv)
  3779. {
  3780. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3781. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3782. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3783. if (priv->device_id == WCN6750_DEVICE_ID ||
  3784. priv->device_id == WCN6450_DEVICE_ID ||
  3785. of_property_read_bool(priv->pdev->dev.of_node,
  3786. "wpss-support-enable"))
  3787. priv->wpss_supported = true;
  3788. if (of_property_read_bool(priv->pdev->dev.of_node,
  3789. "bdf-download-support"))
  3790. priv->bdf_download_support = true;
  3791. if (of_property_read_bool(priv->pdev->dev.of_node,
  3792. "rproc-fw-download"))
  3793. priv->rproc_fw_download = true;
  3794. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3795. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3796. }
  3797. static void icnss_read_device_configs(struct icnss_priv *priv)
  3798. {
  3799. if (of_property_read_bool(priv->pdev->dev.of_node,
  3800. "wlan-ipa-disabled")) {
  3801. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3802. }
  3803. if (of_property_read_bool(priv->pdev->dev.of_node,
  3804. "qcom,wpss-self-recovery"))
  3805. priv->wpss_self_recovery_enabled = true;
  3806. }
  3807. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3808. {
  3809. pm_runtime_get_sync(&priv->pdev->dev);
  3810. pm_runtime_forbid(&priv->pdev->dev);
  3811. pm_runtime_set_active(&priv->pdev->dev);
  3812. pm_runtime_enable(&priv->pdev->dev);
  3813. }
  3814. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3815. {
  3816. pm_runtime_disable(&priv->pdev->dev);
  3817. pm_runtime_allow(&priv->pdev->dev);
  3818. pm_runtime_put_sync(&priv->pdev->dev);
  3819. }
  3820. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3821. {
  3822. return of_property_read_bool(priv->pdev->dev.of_node,
  3823. "use-nv-mac");
  3824. }
  3825. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3826. {
  3827. struct icnss_subsys_restart_level_data *restart_level_data;
  3828. icnss_pr_info("rproc name: %s recovery disable: %d",
  3829. rproc->name, rproc->recovery_disabled);
  3830. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3831. if (!restart_level_data)
  3832. return;
  3833. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3834. if (rproc->recovery_disabled)
  3835. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3836. else
  3837. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3838. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3839. 0, restart_level_data);
  3840. }
  3841. }
  3842. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3843. static void icnss_initialize_mem_pool(unsigned long device_id)
  3844. {
  3845. cnss_initialize_prealloc_pool(device_id);
  3846. }
  3847. static void icnss_deinitialize_mem_pool(void)
  3848. {
  3849. cnss_deinitialize_prealloc_pool();
  3850. }
  3851. #else
  3852. static void icnss_initialize_mem_pool(unsigned long device_id)
  3853. {
  3854. }
  3855. static void icnss_deinitialize_mem_pool(void)
  3856. {
  3857. }
  3858. #endif
  3859. static void register_rproc_restart_level_notifier(void)
  3860. {
  3861. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3862. }
  3863. static void unregister_rproc_restart_level_notifier(void)
  3864. {
  3865. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3866. }
  3867. static int icnss_probe(struct platform_device *pdev)
  3868. {
  3869. int ret = 0;
  3870. struct device *dev = &pdev->dev;
  3871. struct icnss_priv *priv;
  3872. const struct of_device_id *of_id;
  3873. const struct platform_device_id *device_id;
  3874. if (dev_get_drvdata(dev)) {
  3875. icnss_pr_err("Driver is already initialized\n");
  3876. return -EEXIST;
  3877. }
  3878. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3879. if (!of_id || !of_id->data) {
  3880. icnss_pr_err("Failed to find of match device!\n");
  3881. ret = -ENODEV;
  3882. goto out_reset_drvdata;
  3883. }
  3884. device_id = of_id->data;
  3885. icnss_pr_dbg("Platform driver probe\n");
  3886. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3887. if (!priv)
  3888. return -ENOMEM;
  3889. priv->magic = ICNSS_MAGIC;
  3890. dev_set_drvdata(dev, priv);
  3891. priv->pdev = pdev;
  3892. priv->device_id = device_id->driver_data;
  3893. priv->is_chain1_supported = true;
  3894. INIT_LIST_HEAD(&priv->vreg_list);
  3895. INIT_LIST_HEAD(&priv->clk_list);
  3896. icnss_allow_recursive_recovery(dev);
  3897. icnss_initialize_mem_pool(priv->device_id);
  3898. icnss_init_control_params(priv);
  3899. icnss_read_device_configs(priv);
  3900. ret = icnss_resource_parse(priv);
  3901. if (ret)
  3902. goto out_reset_drvdata;
  3903. ret = icnss_msa_dt_parse(priv);
  3904. if (ret)
  3905. goto out_free_resources;
  3906. ret = icnss_smmu_dt_parse(priv);
  3907. if (ret)
  3908. goto out_free_resources;
  3909. spin_lock_init(&priv->event_lock);
  3910. spin_lock_init(&priv->on_off_lock);
  3911. spin_lock_init(&priv->soc_wake_msg_lock);
  3912. mutex_init(&priv->dev_lock);
  3913. mutex_init(&priv->tcdev_lock);
  3914. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3915. if (!priv->event_wq) {
  3916. icnss_pr_err("Workqueue creation failed\n");
  3917. ret = -EFAULT;
  3918. goto smmu_cleanup;
  3919. }
  3920. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3921. INIT_LIST_HEAD(&priv->event_list);
  3922. if (priv->is_slate_rfa)
  3923. init_completion(&priv->slate_boot_complete);
  3924. ret = icnss_register_fw_service(priv);
  3925. if (ret < 0) {
  3926. icnss_pr_err("fw service registration failed: %d\n", ret);
  3927. goto out_destroy_wq;
  3928. }
  3929. icnss_power_misc_params_init(priv);
  3930. icnss_enable_recovery(priv);
  3931. icnss_debugfs_create(priv);
  3932. icnss_sysfs_create(priv);
  3933. ret = device_init_wakeup(&priv->pdev->dev, true);
  3934. if (ret)
  3935. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3936. ret);
  3937. icnss_set_plat_priv(priv);
  3938. init_completion(&priv->unblock_shutdown);
  3939. if (priv->device_id == WCN6750_DEVICE_ID ||
  3940. priv->device_id == WCN6450_DEVICE_ID) {
  3941. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3942. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3943. if (!priv->soc_wake_wq) {
  3944. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3945. ret = -EFAULT;
  3946. goto out_unregister_fw_service;
  3947. }
  3948. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3949. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3950. ret = icnss_genl_init();
  3951. if (ret < 0)
  3952. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3953. init_completion(&priv->smp2p_soc_wake_wait);
  3954. icnss_runtime_pm_init(priv);
  3955. icnss_aop_interface_init(priv);
  3956. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3957. priv->bdf_download_support = true;
  3958. register_rproc_restart_level_notifier();
  3959. }
  3960. if (priv->wpss_supported) {
  3961. ret = icnss_dms_init(priv);
  3962. if (ret)
  3963. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3964. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3965. icnss_pr_dbg("NV MAC feature is %s\n",
  3966. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3967. }
  3968. if (priv->wpss_supported || priv->rproc_fw_download)
  3969. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3970. timer_setup(&priv->recovery_timer,
  3971. icnss_recovery_timeout_hdlr, 0);
  3972. if (priv->wpss_self_recovery_enabled) {
  3973. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3974. timer_setup(&priv->wpss_ssr_timer,
  3975. icnss_wpss_ssr_timeout_hdlr, 0);
  3976. }
  3977. icnss_register_ims_service(priv);
  3978. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3979. icnss_pr_info("Platform driver probed successfully\n");
  3980. return 0;
  3981. out_unregister_fw_service:
  3982. icnss_unregister_fw_service(priv);
  3983. out_destroy_wq:
  3984. destroy_workqueue(priv->event_wq);
  3985. smmu_cleanup:
  3986. priv->iommu_domain = NULL;
  3987. out_free_resources:
  3988. icnss_put_resources(priv);
  3989. out_reset_drvdata:
  3990. icnss_deinitialize_mem_pool();
  3991. dev_set_drvdata(dev, NULL);
  3992. return ret;
  3993. }
  3994. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3995. {
  3996. if (IS_ERR_OR_NULL(ramdump_info))
  3997. return;
  3998. device_unregister(ramdump_info->dev);
  3999. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  4000. kfree(ramdump_info);
  4001. }
  4002. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4003. {
  4004. if (priv->batt_psy)
  4005. power_supply_put(penv->batt_psy);
  4006. if (priv->psf_supported) {
  4007. flush_workqueue(priv->soc_update_wq);
  4008. destroy_workqueue(priv->soc_update_wq);
  4009. power_supply_unreg_notifier(&priv->psf_nb);
  4010. }
  4011. }
  4012. static int icnss_remove(struct platform_device *pdev)
  4013. {
  4014. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4015. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4016. del_timer(&priv->recovery_timer);
  4017. if (priv->wpss_self_recovery_enabled)
  4018. del_timer(&priv->wpss_ssr_timer);
  4019. device_init_wakeup(&priv->pdev->dev, false);
  4020. icnss_unregister_ims_service(priv);
  4021. icnss_debugfs_destroy(priv);
  4022. icnss_unregister_power_supply_notifier(penv);
  4023. icnss_sysfs_destroy(priv);
  4024. complete_all(&priv->unblock_shutdown);
  4025. if (priv->is_slate_rfa) {
  4026. complete(&priv->slate_boot_complete);
  4027. icnss_slate_ssr_unregister_notifier(priv);
  4028. icnss_unregister_slate_event_notifier(priv);
  4029. }
  4030. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4031. if (priv->wpss_supported) {
  4032. icnss_dms_deinit(priv);
  4033. icnss_wpss_early_ssr_unregister_notifier(priv);
  4034. icnss_wpss_ssr_unregister_notifier(priv);
  4035. } else {
  4036. icnss_modem_ssr_unregister_notifier(priv);
  4037. icnss_pdr_unregister_notifier(priv);
  4038. }
  4039. if (priv->device_id == WCN6750_DEVICE_ID ||
  4040. priv->device_id == WCN6450_DEVICE_ID) {
  4041. icnss_genl_exit();
  4042. icnss_runtime_pm_deinit(priv);
  4043. unregister_rproc_restart_level_notifier();
  4044. complete_all(&priv->smp2p_soc_wake_wait);
  4045. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4046. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4047. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4048. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4049. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4050. if (priv->soc_wake_wq)
  4051. destroy_workqueue(priv->soc_wake_wq);
  4052. icnss_aop_interface_deinit(priv);
  4053. }
  4054. class_destroy(priv->icnss_ramdump_class);
  4055. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4056. icnss_unregister_fw_service(priv);
  4057. if (priv->event_wq)
  4058. destroy_workqueue(priv->event_wq);
  4059. priv->iommu_domain = NULL;
  4060. icnss_hw_power_off(priv);
  4061. icnss_put_resources(priv);
  4062. icnss_deinitialize_mem_pool();
  4063. dev_set_drvdata(&pdev->dev, NULL);
  4064. return 0;
  4065. }
  4066. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4067. {
  4068. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4069. /* This is to handle if slate is not up and modem SSR is triggered */
  4070. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4071. return;
  4072. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4073. ICNSS_ASSERT(0);
  4074. }
  4075. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4076. {
  4077. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4078. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4079. priv->state);
  4080. schedule_work(&wpss_ssr_work);
  4081. }
  4082. #ifdef CONFIG_PM_SLEEP
  4083. static int icnss_pm_suspend(struct device *dev)
  4084. {
  4085. struct icnss_priv *priv = dev_get_drvdata(dev);
  4086. int ret = 0;
  4087. if (priv->magic != ICNSS_MAGIC) {
  4088. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4089. dev, priv, priv->magic);
  4090. return -EINVAL;
  4091. }
  4092. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4093. if (!priv->ops || !priv->ops->pm_suspend ||
  4094. IS_ERR_OR_NULL(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4095. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4096. return 0;
  4097. ret = priv->ops->pm_suspend(dev);
  4098. if (ret == 0) {
  4099. if (priv->device_id == WCN6750_DEVICE_ID ||
  4100. priv->device_id == WCN6450_DEVICE_ID) {
  4101. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4102. !test_bit(ICNSS_MODE_ON, &priv->state))
  4103. return 0;
  4104. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4105. ICNSS_SMP2P_OUT_POWER_SAVE);
  4106. }
  4107. priv->stats.pm_suspend++;
  4108. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4109. } else {
  4110. priv->stats.pm_suspend_err++;
  4111. }
  4112. return ret;
  4113. }
  4114. static int icnss_pm_resume(struct device *dev)
  4115. {
  4116. struct icnss_priv *priv = dev_get_drvdata(dev);
  4117. int ret = 0;
  4118. if (priv->magic != ICNSS_MAGIC) {
  4119. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4120. dev, priv, priv->magic);
  4121. return -EINVAL;
  4122. }
  4123. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4124. if (!priv->ops || !priv->ops->pm_resume ||
  4125. IS_ERR_OR_NULL(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4126. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4127. goto out;
  4128. ret = priv->ops->pm_resume(dev);
  4129. out:
  4130. if (ret == 0) {
  4131. priv->stats.pm_resume++;
  4132. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4133. } else {
  4134. priv->stats.pm_resume_err++;
  4135. }
  4136. return ret;
  4137. }
  4138. static int icnss_pm_suspend_noirq(struct device *dev)
  4139. {
  4140. struct icnss_priv *priv = dev_get_drvdata(dev);
  4141. int ret = 0;
  4142. if (priv->magic != ICNSS_MAGIC) {
  4143. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4144. dev, priv, priv->magic);
  4145. return -EINVAL;
  4146. }
  4147. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4148. if (!priv->ops || !priv->ops->suspend_noirq ||
  4149. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4150. goto out;
  4151. ret = priv->ops->suspend_noirq(dev);
  4152. out:
  4153. if (ret == 0) {
  4154. priv->stats.pm_suspend_noirq++;
  4155. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4156. } else {
  4157. priv->stats.pm_suspend_noirq_err++;
  4158. }
  4159. return ret;
  4160. }
  4161. static int icnss_pm_resume_noirq(struct device *dev)
  4162. {
  4163. struct icnss_priv *priv = dev_get_drvdata(dev);
  4164. int ret = 0;
  4165. if (priv->magic != ICNSS_MAGIC) {
  4166. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4167. dev, priv, priv->magic);
  4168. return -EINVAL;
  4169. }
  4170. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4171. if (!priv->ops || !priv->ops->resume_noirq ||
  4172. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4173. goto out;
  4174. ret = priv->ops->resume_noirq(dev);
  4175. out:
  4176. if (ret == 0) {
  4177. priv->stats.pm_resume_noirq++;
  4178. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4179. } else {
  4180. priv->stats.pm_resume_noirq_err++;
  4181. }
  4182. return ret;
  4183. }
  4184. static int icnss_pm_runtime_suspend(struct device *dev)
  4185. {
  4186. struct icnss_priv *priv = dev_get_drvdata(dev);
  4187. int ret = 0;
  4188. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4189. icnss_pr_err("Ignore runtime suspend:\n");
  4190. goto out;
  4191. }
  4192. if (priv->magic != ICNSS_MAGIC) {
  4193. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4194. dev, priv, priv->magic);
  4195. return -EINVAL;
  4196. }
  4197. if (!priv->ops || !priv->ops->runtime_suspend ||
  4198. IS_ERR_OR_NULL(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4199. goto out;
  4200. icnss_pr_vdbg("Runtime suspend\n");
  4201. ret = priv->ops->runtime_suspend(dev);
  4202. if (!ret) {
  4203. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4204. !test_bit(ICNSS_MODE_ON, &priv->state))
  4205. return 0;
  4206. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4207. ICNSS_SMP2P_OUT_POWER_SAVE);
  4208. }
  4209. out:
  4210. return ret;
  4211. }
  4212. static int icnss_pm_runtime_resume(struct device *dev)
  4213. {
  4214. struct icnss_priv *priv = dev_get_drvdata(dev);
  4215. int ret = 0;
  4216. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4217. icnss_pr_err("Ignore runtime resume\n");
  4218. goto out;
  4219. }
  4220. if (priv->magic != ICNSS_MAGIC) {
  4221. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4222. dev, priv, priv->magic);
  4223. return -EINVAL;
  4224. }
  4225. if (!priv->ops || !priv->ops->runtime_resume ||
  4226. IS_ERR_OR_NULL(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4227. goto out;
  4228. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4229. ret = priv->ops->runtime_resume(dev);
  4230. out:
  4231. return ret;
  4232. }
  4233. static int icnss_pm_runtime_idle(struct device *dev)
  4234. {
  4235. struct icnss_priv *priv = dev_get_drvdata(dev);
  4236. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4237. icnss_pr_err("Ignore runtime idle\n");
  4238. goto out;
  4239. }
  4240. icnss_pr_vdbg("Runtime idle\n");
  4241. pm_request_autosuspend(dev);
  4242. out:
  4243. return -EBUSY;
  4244. }
  4245. #endif
  4246. static const struct dev_pm_ops icnss_pm_ops = {
  4247. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4248. icnss_pm_resume)
  4249. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4250. icnss_pm_resume_noirq)
  4251. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4252. icnss_pm_runtime_idle)
  4253. };
  4254. static struct platform_driver icnss_driver = {
  4255. .probe = icnss_probe,
  4256. .remove = icnss_remove,
  4257. .driver = {
  4258. .name = "icnss2",
  4259. .pm = &icnss_pm_ops,
  4260. .of_match_table = icnss_dt_match,
  4261. },
  4262. };
  4263. static int __init icnss_initialize(void)
  4264. {
  4265. icnss_debug_init();
  4266. return platform_driver_register(&icnss_driver);
  4267. }
  4268. static void __exit icnss_exit(void)
  4269. {
  4270. platform_driver_unregister(&icnss_driver);
  4271. icnss_debug_deinit();
  4272. }
  4273. module_init(icnss_initialize);
  4274. module_exit(icnss_exit);
  4275. MODULE_LICENSE("GPL v2");
  4276. MODULE_DESCRIPTION("iWCN CORE platform driver");