main.c 129 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #include <trace/hooks/remoteproc.h>
  47. #ifdef CONFIG_SLATE_MODULE_ENABLED
  48. #include <linux/soc/qcom/slatecom_interface.h>
  49. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  50. #include <uapi/linux/slatecom_interface.h>
  51. #endif
  52. #include "main.h"
  53. #include "qmi.h"
  54. #include "debug.h"
  55. #include "power.h"
  56. #include "genl.h"
  57. #define MAX_PROP_SIZE 32
  58. #define NUM_LOG_PAGES 10
  59. #define NUM_LOG_LONG_PAGES 4
  60. #define ICNSS_MAGIC 0x5abc5abc
  61. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  62. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  63. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  64. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  65. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  66. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  67. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  68. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  69. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  70. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  71. #define ICNSS_MAX_PROBE_CNT 2
  72. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  73. #define PROBE_TIMEOUT 15000
  74. #define SMP2P_SOC_WAKE_TIMEOUT 500
  75. #ifdef CONFIG_ICNSS2_DEBUG
  76. static unsigned long qmi_timeout = 3000;
  77. module_param(qmi_timeout, ulong, 0600);
  78. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  79. #else
  80. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  81. #endif
  82. #define ICNSS_RECOVERY_TIMEOUT 60000
  83. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  84. #define ICNSS_CAL_TIMEOUT 40000
  85. static struct icnss_priv *penv;
  86. static struct work_struct wpss_loader;
  87. static struct work_struct wpss_ssr_work;
  88. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  89. #define ICNSS_EVENT_PENDING 2989
  90. #define ICNSS_EVENT_SYNC BIT(0)
  91. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  92. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  93. ICNSS_EVENT_SYNC)
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  95. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  96. #define SMP2P_GET_MAX_RETRY 4
  97. #define SMP2P_GET_RETRY_DELAY_MS 500
  98. #define RAMDUMP_NUM_DEVICES 256
  99. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  100. #define WLAN_EN_TEMP_THRESHOLD 5000
  101. #define WLAN_EN_DELAY 500
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  141. priv->device_id == ADRASTEA_DEVICE_ID)
  142. icnss_wpss_unload(priv);
  143. return count;
  144. }
  145. static struct kobj_attribute icnss_sysfs_attribute =
  146. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  147. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  148. {
  149. if (atomic_inc_return(&priv->pm_count) != 1)
  150. return;
  151. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  152. atomic_read(&priv->pm_count));
  153. pm_stay_awake(&priv->pdev->dev);
  154. priv->stats.pm_stay_awake++;
  155. }
  156. static void icnss_pm_relax(struct icnss_priv *priv)
  157. {
  158. int r = atomic_dec_return(&priv->pm_count);
  159. WARN_ON(r < 0);
  160. if (r != 0)
  161. return;
  162. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  163. atomic_read(&priv->pm_count));
  164. pm_relax(&priv->pdev->dev);
  165. priv->stats.pm_relax++;
  166. }
  167. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  168. {
  169. switch (type) {
  170. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  171. return "SERVER_ARRIVE";
  172. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  173. return "SERVER_EXIT";
  174. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  175. return "FW_READY";
  176. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  177. return "REGISTER_DRIVER";
  178. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  179. return "UNREGISTER_DRIVER";
  180. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  181. return "PD_SERVICE_DOWN";
  182. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  183. return "FW_EARLY_CRASH_IND";
  184. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  185. return "IDLE_SHUTDOWN";
  186. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  187. return "IDLE_RESTART";
  188. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  189. return "FW_INIT_DONE";
  190. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  191. return "QDSS_TRACE_REQ_MEM";
  192. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  193. return "QDSS_TRACE_SAVE";
  194. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  195. return "QDSS_TRACE_FREE";
  196. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  197. return "M3_DUMP_UPLOAD";
  198. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  199. return "IMS_WFC_CALL_IND";
  200. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  201. return "WLFW_TWC_CFG_IND";
  202. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  203. return "QDSS_TRACE_REQ_DATA";
  204. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  205. return "SUBSYS_RESTART_LEVEL";
  206. case ICNSS_DRIVER_EVENT_MAX:
  207. return "EVENT_MAX";
  208. }
  209. return "UNKNOWN";
  210. };
  211. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  212. {
  213. switch (type) {
  214. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  215. return "SOC_WAKE_REQUEST";
  216. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  217. return "SOC_WAKE_RELEASE";
  218. case ICNSS_SOC_WAKE_EVENT_MAX:
  219. return "SOC_EVENT_MAX";
  220. }
  221. return "UNKNOWN";
  222. };
  223. int icnss_driver_event_post(struct icnss_priv *priv,
  224. enum icnss_driver_event_type type,
  225. u32 flags, void *data)
  226. {
  227. struct icnss_driver_event *event;
  228. unsigned long irq_flags;
  229. int gfp = GFP_KERNEL;
  230. int ret = 0;
  231. if (!priv)
  232. return -ENODEV;
  233. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  234. icnss_driver_event_to_str(type), type, current->comm,
  235. flags, priv->state);
  236. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  237. icnss_pr_err("Invalid Event type: %d, can't post", type);
  238. return -EINVAL;
  239. }
  240. if (in_interrupt() || !preemptible() || rcu_preempt_depth())
  241. gfp = GFP_ATOMIC;
  242. event = kzalloc(sizeof(*event), gfp);
  243. if (event == NULL)
  244. return -ENOMEM;
  245. icnss_pm_stay_awake(priv);
  246. event->type = type;
  247. event->data = data;
  248. init_completion(&event->complete);
  249. event->ret = ICNSS_EVENT_PENDING;
  250. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  251. spin_lock_irqsave(&priv->event_lock, irq_flags);
  252. list_add_tail(&event->list, &priv->event_list);
  253. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  254. priv->stats.events[type].posted++;
  255. queue_work(priv->event_wq, &priv->event_work);
  256. if (!(flags & ICNSS_EVENT_SYNC))
  257. goto out;
  258. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  259. wait_for_completion(&event->complete);
  260. else
  261. ret = wait_for_completion_interruptible(&event->complete);
  262. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  263. icnss_driver_event_to_str(type), type, priv->state, ret,
  264. event->ret);
  265. spin_lock_irqsave(&priv->event_lock, irq_flags);
  266. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  267. event->sync = false;
  268. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  269. ret = -EINTR;
  270. goto out;
  271. }
  272. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  273. ret = event->ret;
  274. kfree(event);
  275. out:
  276. icnss_pm_relax(priv);
  277. return ret;
  278. }
  279. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  280. enum icnss_soc_wake_event_type type,
  281. u32 flags, void *data)
  282. {
  283. struct icnss_soc_wake_event *event;
  284. unsigned long irq_flags;
  285. int gfp = GFP_KERNEL;
  286. int ret = 0;
  287. if (!priv)
  288. return -ENODEV;
  289. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  290. icnss_soc_wake_event_to_str(type),
  291. type, current->comm, flags, priv->state);
  292. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  293. icnss_pr_err("Invalid Event type: %d, can't post", type);
  294. return -EINVAL;
  295. }
  296. if (in_interrupt() || irqs_disabled())
  297. gfp = GFP_ATOMIC;
  298. event = kzalloc(sizeof(*event), gfp);
  299. if (!event)
  300. return -ENOMEM;
  301. icnss_pm_stay_awake(priv);
  302. event->type = type;
  303. event->data = data;
  304. init_completion(&event->complete);
  305. event->ret = ICNSS_EVENT_PENDING;
  306. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  307. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  308. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  309. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  310. priv->stats.soc_wake_events[type].posted++;
  311. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  312. if (!(flags & ICNSS_EVENT_SYNC))
  313. goto out;
  314. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  315. wait_for_completion(&event->complete);
  316. else
  317. ret = wait_for_completion_interruptible(&event->complete);
  318. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  319. icnss_soc_wake_event_to_str(type),
  320. type, priv->state, ret, event->ret);
  321. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  322. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  323. event->sync = false;
  324. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  325. ret = -EINTR;
  326. goto out;
  327. }
  328. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  329. ret = event->ret;
  330. kfree(event);
  331. out:
  332. icnss_pm_relax(priv);
  333. return ret;
  334. }
  335. bool icnss_is_fw_ready(void)
  336. {
  337. if (!penv)
  338. return false;
  339. else
  340. return test_bit(ICNSS_FW_READY, &penv->state);
  341. }
  342. EXPORT_SYMBOL(icnss_is_fw_ready);
  343. void icnss_block_shutdown(bool status)
  344. {
  345. if (!penv)
  346. return;
  347. if (status) {
  348. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  349. reinit_completion(&penv->unblock_shutdown);
  350. } else {
  351. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  352. complete(&penv->unblock_shutdown);
  353. }
  354. }
  355. EXPORT_SYMBOL(icnss_block_shutdown);
  356. bool icnss_is_fw_down(void)
  357. {
  358. struct icnss_priv *priv = icnss_get_plat_priv();
  359. if (!priv)
  360. return false;
  361. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  362. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  363. test_bit(ICNSS_REJUVENATE, &priv->state);
  364. }
  365. EXPORT_SYMBOL(icnss_is_fw_down);
  366. unsigned long icnss_get_device_config(void)
  367. {
  368. struct icnss_priv *priv = icnss_get_plat_priv();
  369. if (!priv)
  370. return 0;
  371. return priv->device_config;
  372. }
  373. EXPORT_SYMBOL(icnss_get_device_config);
  374. bool icnss_is_rejuvenate(void)
  375. {
  376. if (!penv)
  377. return false;
  378. else
  379. return test_bit(ICNSS_REJUVENATE, &penv->state);
  380. }
  381. EXPORT_SYMBOL(icnss_is_rejuvenate);
  382. bool icnss_is_pdr(void)
  383. {
  384. if (!penv)
  385. return false;
  386. else
  387. return test_bit(ICNSS_PDR, &penv->state);
  388. }
  389. EXPORT_SYMBOL(icnss_is_pdr);
  390. static bool icnss_is_smp2p_valid(struct icnss_priv *priv,
  391. enum smp2p_out_entry smp2p_entry)
  392. {
  393. if (priv->device_id == WCN6750_DEVICE_ID ||
  394. priv->device_id == WCN6450_DEVICE_ID ||
  395. priv->wpss_supported)
  396. return IS_ERR_OR_NULL(priv->smp2p_info[smp2p_entry].smem_state);
  397. else
  398. return 0;
  399. }
  400. static int icnss_send_smp2p(struct icnss_priv *priv,
  401. enum icnss_smp2p_msg_id msg_id,
  402. enum smp2p_out_entry smp2p_entry)
  403. {
  404. unsigned int value = 0;
  405. int ret;
  406. if (!priv || icnss_is_smp2p_valid(priv, smp2p_entry))
  407. return -EINVAL;
  408. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  409. if (msg_id == ICNSS_RESET_MSG) {
  410. priv->smp2p_info[smp2p_entry].seq = 0;
  411. ret = qcom_smem_state_update_bits(
  412. priv->smp2p_info[smp2p_entry].smem_state,
  413. ICNSS_SMEM_VALUE_MASK,
  414. 0);
  415. if (ret)
  416. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  417. ret, icnss_smp2p_str[smp2p_entry]);
  418. return ret;
  419. }
  420. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  421. !test_bit(ICNSS_FW_READY, &priv->state)) {
  422. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  423. priv->state);
  424. return -EINVAL;
  425. }
  426. value |= priv->smp2p_info[smp2p_entry].seq++;
  427. value <<= ICNSS_SMEM_SEQ_NO_POS;
  428. value |= msg_id;
  429. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  430. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  431. reinit_completion(&penv->smp2p_soc_wake_wait);
  432. ret = qcom_smem_state_update_bits(
  433. priv->smp2p_info[smp2p_entry].smem_state,
  434. ICNSS_SMEM_VALUE_MASK,
  435. value);
  436. if (ret) {
  437. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  438. icnss_smp2p_str[smp2p_entry]);
  439. } else {
  440. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  441. msg_id == ICNSS_SOC_WAKE_REL) {
  442. if (!wait_for_completion_timeout(
  443. &priv->smp2p_soc_wake_wait,
  444. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  445. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  446. icnss_smp2p_str[smp2p_entry]);
  447. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  448. ICNSS_ASSERT(0);
  449. }
  450. }
  451. }
  452. return ret;
  453. }
  454. bool icnss_is_low_power(void)
  455. {
  456. if (!penv)
  457. return false;
  458. else
  459. return test_bit(ICNSS_LOW_POWER, &penv->state);
  460. }
  461. EXPORT_SYMBOL(icnss_is_low_power);
  462. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  463. {
  464. struct icnss_priv *priv = ctx;
  465. if (priv)
  466. priv->force_err_fatal = true;
  467. icnss_pr_err("Received force error fatal request from FW\n");
  468. return IRQ_HANDLED;
  469. }
  470. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  471. {
  472. struct icnss_priv *priv = ctx;
  473. struct icnss_uevent_fw_down_data fw_down_data = {0};
  474. icnss_pr_err("Received early crash indication from FW\n");
  475. if (priv) {
  476. if (priv->wpss_self_recovery_enabled)
  477. mod_timer(&priv->wpss_ssr_timer,
  478. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  479. set_bit(ICNSS_FW_DOWN, &priv->state);
  480. icnss_ignore_fw_timeout(true);
  481. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  482. clear_bit(ICNSS_FW_READY, &priv->state);
  483. fw_down_data.crashed = true;
  484. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  485. &fw_down_data);
  486. }
  487. }
  488. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  489. 0, NULL);
  490. return IRQ_HANDLED;
  491. }
  492. static void register_fw_error_notifications(struct device *dev)
  493. {
  494. struct icnss_priv *priv = dev_get_drvdata(dev);
  495. struct device_node *dev_node;
  496. int irq = 0, ret = 0;
  497. if (!priv)
  498. return;
  499. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  500. if (!dev_node) {
  501. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  502. return;
  503. }
  504. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  505. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  506. ret = irq = of_irq_get_byname(dev_node,
  507. "qcom,smp2p-force-fatal-error");
  508. if (ret < 0) {
  509. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  510. irq);
  511. return;
  512. }
  513. }
  514. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  515. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  516. "wlanfw-err", priv);
  517. if (ret < 0) {
  518. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  519. irq, ret);
  520. return;
  521. }
  522. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  523. priv->fw_error_fatal_irq = irq;
  524. }
  525. static void register_early_crash_notifications(struct device *dev)
  526. {
  527. struct icnss_priv *priv = dev_get_drvdata(dev);
  528. struct device_node *dev_node;
  529. int irq = 0, ret = 0;
  530. if (!priv)
  531. return;
  532. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  533. if (!dev_node) {
  534. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  535. return;
  536. }
  537. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  538. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  539. ret = irq = of_irq_get_byname(dev_node,
  540. "qcom,smp2p-early-crash-ind");
  541. if (ret < 0) {
  542. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  543. irq);
  544. return;
  545. }
  546. }
  547. ret = devm_request_threaded_irq(dev, irq, NULL,
  548. fw_crash_indication_handler,
  549. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  550. "wlanfw-early-crash-ind", priv);
  551. if (ret < 0) {
  552. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  553. irq, ret);
  554. return;
  555. }
  556. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  557. priv->fw_early_crash_irq = irq;
  558. }
  559. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  560. {
  561. struct thermal_zone_device *thermal_dev;
  562. const char *tsens;
  563. int ret;
  564. ret = of_property_read_string(priv->pdev->dev.of_node,
  565. "tsens",
  566. &tsens);
  567. if (ret)
  568. return ret;
  569. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  570. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  571. if (IS_ERR_OR_NULL(thermal_dev)) {
  572. icnss_pr_err("Fail to get thermal zone. ret: %d",
  573. PTR_ERR(thermal_dev));
  574. return PTR_ERR(thermal_dev);
  575. }
  576. ret = thermal_zone_get_temp(thermal_dev, temp);
  577. if (ret)
  578. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  579. return ret;
  580. }
  581. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  582. {
  583. struct icnss_priv *priv = ctx;
  584. if (priv)
  585. complete(&priv->smp2p_soc_wake_wait);
  586. return IRQ_HANDLED;
  587. }
  588. static void register_soc_wake_notif(struct device *dev)
  589. {
  590. struct icnss_priv *priv = dev_get_drvdata(dev);
  591. struct device_node *dev_node;
  592. int irq = 0, ret = 0;
  593. if (!priv)
  594. return;
  595. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  596. if (!dev_node) {
  597. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  598. return;
  599. }
  600. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  601. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  602. ret = irq = of_irq_get_byname(dev_node,
  603. "qcom,smp2p-soc-wake-ack");
  604. if (ret < 0) {
  605. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  606. irq);
  607. return;
  608. }
  609. }
  610. ret = devm_request_threaded_irq(dev, irq, NULL,
  611. fw_soc_wake_ack_handler,
  612. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  613. IRQF_TRIGGER_FALLING,
  614. "wlanfw-soc-wake-ack", priv);
  615. if (ret < 0) {
  616. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  617. irq, ret);
  618. return;
  619. }
  620. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  621. priv->fw_soc_wake_ack_irq = irq;
  622. }
  623. int icnss_call_driver_uevent(struct icnss_priv *priv,
  624. enum icnss_uevent uevent, void *data)
  625. {
  626. struct icnss_uevent_data uevent_data;
  627. if (!priv->ops || !priv->ops->uevent)
  628. return 0;
  629. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  630. priv->state, uevent);
  631. uevent_data.uevent = uevent;
  632. uevent_data.data = data;
  633. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  634. }
  635. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  636. {
  637. int i;
  638. int ret = 0;
  639. ret = icnss_qmi_get_dms_mac(priv);
  640. if (ret == 0 && priv->dms.mac_valid)
  641. goto qmi_send;
  642. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  643. * Thus assert on failure to get MAC from DMS even after retries
  644. */
  645. if (priv->use_nv_mac) {
  646. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  647. if (priv->dms.mac_valid)
  648. break;
  649. ret = icnss_qmi_get_dms_mac(priv);
  650. if (ret != -EAGAIN)
  651. break;
  652. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  653. }
  654. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  655. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  656. ICNSS_ASSERT(0);
  657. return -EINVAL;
  658. }
  659. }
  660. qmi_send:
  661. if (priv->dms.mac_valid)
  662. ret =
  663. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  664. ARRAY_SIZE(priv->dms.mac));
  665. return ret;
  666. }
  667. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  668. enum smp2p_out_entry smp2p_entry)
  669. {
  670. int retry = 0;
  671. int error;
  672. if (priv->smp2p_info[smp2p_entry].smem_state)
  673. return;
  674. retry:
  675. priv->smp2p_info[smp2p_entry].smem_state =
  676. qcom_smem_state_get(&priv->pdev->dev,
  677. icnss_smp2p_str[smp2p_entry],
  678. &priv->smp2p_info[smp2p_entry].smem_bit);
  679. if (icnss_is_smp2p_valid(priv, smp2p_entry)) {
  680. if (retry++ < SMP2P_GET_MAX_RETRY) {
  681. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  682. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  683. error, icnss_smp2p_str[smp2p_entry]);
  684. msleep(SMP2P_GET_RETRY_DELAY_MS);
  685. goto retry;
  686. }
  687. ICNSS_ASSERT(0);
  688. return;
  689. }
  690. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  691. }
  692. static inline
  693. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  694. {
  695. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  696. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  697. } else {
  698. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  699. }
  700. }
  701. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  702. {
  703. switch (val) {
  704. case WLAN_RF_SLATE:
  705. return WLFW_WLAN_RF_SLATE_V01;
  706. case WLAN_RF_APACHE:
  707. return WLFW_WLAN_RF_APACHE_V01;
  708. default:
  709. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  710. }
  711. }
  712. #ifdef CONFIG_SLATE_MODULE_ENABLED
  713. static void icnss_send_wlan_boot_init(void)
  714. {
  715. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  716. icnss_pr_info("sent wlan boot init command\n");
  717. }
  718. static void icnss_send_wlan_boot_complete(void)
  719. {
  720. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  721. icnss_pr_info("sent wlan boot complete command\n");
  722. }
  723. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  724. {
  725. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  726. reinit_completion(&priv->slate_boot_complete);
  727. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  728. priv->state);
  729. wait_for_completion(&priv->slate_boot_complete);
  730. }
  731. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  732. return -EINVAL;
  733. icnss_send_wlan_boot_init();
  734. return 0;
  735. }
  736. #else
  737. static void icnss_send_wlan_boot_complete(void)
  738. {
  739. }
  740. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  741. {
  742. return 0;
  743. }
  744. #endif
  745. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  746. void *data)
  747. {
  748. int ret = 0;
  749. int temp = 0;
  750. bool ignore_assert = false;
  751. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  752. if (!priv)
  753. return -ENODEV;
  754. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  755. clear_bit(ICNSS_FW_DOWN, &priv->state);
  756. clear_bit(ICNSS_FW_READY, &priv->state);
  757. if (priv->is_slate_rfa) {
  758. ret = icnss_wait_for_slate_complete(priv);
  759. if (ret == -EINVAL) {
  760. icnss_pr_err("Slate complete failed\n");
  761. return ret;
  762. }
  763. }
  764. icnss_ignore_fw_timeout(false);
  765. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  766. icnss_pr_err("QMI Server already in Connected State\n");
  767. ICNSS_ASSERT(0);
  768. }
  769. ret = icnss_connect_to_fw_server(priv, data);
  770. if (ret)
  771. goto fail;
  772. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  773. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  774. ret = icnss_hw_power_on(priv);
  775. if (ret)
  776. goto fail;
  777. }
  778. ret = wlfw_ind_register_send_sync_msg(priv);
  779. if (ret < 0) {
  780. if (ret == -EALREADY) {
  781. ret = 0;
  782. goto qmi_registered;
  783. }
  784. ignore_assert = true;
  785. goto fail;
  786. }
  787. if (priv->is_rf_subtype_valid) {
  788. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  789. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  790. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  791. if (ret < 0)
  792. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  793. ret);
  794. } else {
  795. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  796. priv->rf_subtype);
  797. }
  798. }
  799. if (priv->device_id == WCN6750_DEVICE_ID ||
  800. priv->device_id == WCN6450_DEVICE_ID) {
  801. if (!icnss_get_temperature(priv, &temp)) {
  802. icnss_pr_dbg("Temperature: %d\n", temp);
  803. if (temp < WLAN_EN_TEMP_THRESHOLD)
  804. icnss_set_wlan_en_delay(priv);
  805. }
  806. ret = wlfw_host_cap_send_sync(priv);
  807. if (ret < 0)
  808. goto fail;
  809. }
  810. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  811. if (!priv->msa_va) {
  812. icnss_pr_err("Invalid MSA address\n");
  813. ret = -EINVAL;
  814. goto fail;
  815. }
  816. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  817. if (ret < 0) {
  818. ignore_assert = true;
  819. goto fail;
  820. }
  821. ret = wlfw_msa_ready_send_sync_msg(priv);
  822. if (ret < 0) {
  823. ignore_assert = true;
  824. goto fail;
  825. }
  826. }
  827. if (priv->device_id == WCN6450_DEVICE_ID)
  828. icnss_hw_power_off(priv);
  829. ret = wlfw_cap_send_sync_msg(priv);
  830. if (ret < 0) {
  831. ignore_assert = true;
  832. goto fail;
  833. }
  834. if (priv->device_id == ADRASTEA_DEVICE_ID && priv->is_chain1_supported) {
  835. ret = icnss_power_on_chain1_reg(priv);
  836. if (ret) {
  837. ignore_assert = true;
  838. goto fail;
  839. }
  840. }
  841. if (priv->device_id == WCN6750_DEVICE_ID ||
  842. priv->device_id == WCN6450_DEVICE_ID) {
  843. ret = icnss_hw_power_on(priv);
  844. if (ret)
  845. goto fail;
  846. ret = wlfw_device_info_send_msg(priv);
  847. if (ret < 0) {
  848. ignore_assert = true;
  849. goto device_info_failure;
  850. }
  851. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  852. priv->mem_base_pa,
  853. priv->mem_base_size);
  854. if (!priv->mem_base_va) {
  855. icnss_pr_err("Ioremap failed for bar address\n");
  856. goto device_info_failure;
  857. }
  858. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  859. &priv->mem_base_pa,
  860. priv->mem_base_va);
  861. if (priv->mhi_state_info_pa)
  862. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  863. priv->mhi_state_info_pa,
  864. PAGE_SIZE);
  865. if (!priv->mhi_state_info_va)
  866. icnss_pr_err("Ioremap failed for MHI info address\n");
  867. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  868. &priv->mhi_state_info_pa,
  869. priv->mhi_state_info_va);
  870. }
  871. if (priv->bdf_download_support) {
  872. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  873. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  874. priv->ctrl_params.bdf_type);
  875. if (ret < 0)
  876. goto device_info_failure;
  877. }
  878. if (priv->device_id == WCN6450_DEVICE_ID) {
  879. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  880. if (ret < 0)
  881. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  882. ret);
  883. }
  884. if (priv->device_id == WCN6750_DEVICE_ID ||
  885. priv->device_id == WCN6450_DEVICE_ID) {
  886. if (!priv->fw_soc_wake_ack_irq)
  887. register_soc_wake_notif(&priv->pdev->dev);
  888. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  889. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  890. }
  891. if (priv->wpss_supported)
  892. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  893. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  894. if (priv->bdf_download_support) {
  895. ret = wlfw_cal_report_req(priv);
  896. if (ret < 0)
  897. goto device_info_failure;
  898. }
  899. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  900. dynamic_feature_mask);
  901. }
  902. if (!priv->fw_error_fatal_irq)
  903. register_fw_error_notifications(&priv->pdev->dev);
  904. if (!priv->fw_early_crash_irq)
  905. register_early_crash_notifications(&priv->pdev->dev);
  906. if (priv->psf_supported)
  907. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  908. return ret;
  909. device_info_failure:
  910. icnss_hw_power_off(priv);
  911. fail:
  912. ICNSS_ASSERT(ignore_assert);
  913. qmi_registered:
  914. return ret;
  915. }
  916. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  917. {
  918. if (!priv)
  919. return -ENODEV;
  920. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  921. icnss_clear_server(priv);
  922. if (priv->psf_supported)
  923. priv->last_updated_voltage = 0;
  924. return 0;
  925. }
  926. static int icnss_call_driver_probe(struct icnss_priv *priv)
  927. {
  928. int ret = 0;
  929. int probe_cnt = 0;
  930. if (!priv->ops || !priv->ops->probe)
  931. return 0;
  932. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  933. return -EINVAL;
  934. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  935. icnss_hw_power_on(priv);
  936. icnss_block_shutdown(true);
  937. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  938. ret = priv->ops->probe(&priv->pdev->dev);
  939. probe_cnt++;
  940. if (ret != -EPROBE_DEFER)
  941. break;
  942. }
  943. if (ret < 0) {
  944. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  945. ret, priv->state, probe_cnt);
  946. icnss_block_shutdown(false);
  947. goto out;
  948. }
  949. icnss_block_shutdown(false);
  950. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  951. return 0;
  952. out:
  953. icnss_hw_power_off(priv);
  954. return ret;
  955. }
  956. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  957. {
  958. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  959. goto out;
  960. if (!priv->ops || !priv->ops->shutdown)
  961. goto out;
  962. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  963. goto out;
  964. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  965. priv->ops->shutdown(&priv->pdev->dev);
  966. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  967. out:
  968. return 0;
  969. }
  970. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  971. {
  972. int ret = 0;
  973. icnss_pm_relax(priv);
  974. icnss_call_driver_shutdown(priv);
  975. clear_bit(ICNSS_PDR, &priv->state);
  976. clear_bit(ICNSS_REJUVENATE, &priv->state);
  977. clear_bit(ICNSS_PD_RESTART, &priv->state);
  978. clear_bit(ICNSS_LOW_POWER, &priv->state);
  979. priv->early_crash_ind = false;
  980. priv->is_ssr = false;
  981. if (!priv->ops || !priv->ops->reinit)
  982. goto out;
  983. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  984. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  985. priv->state);
  986. goto out;
  987. }
  988. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  989. goto call_probe;
  990. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  991. icnss_hw_power_on(priv);
  992. icnss_block_shutdown(true);
  993. ret = priv->ops->reinit(&priv->pdev->dev);
  994. if (ret < 0) {
  995. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  996. ret, priv->state);
  997. if (!priv->allow_recursive_recovery)
  998. ICNSS_ASSERT(false);
  999. icnss_block_shutdown(false);
  1000. goto out_power_off;
  1001. }
  1002. icnss_block_shutdown(false);
  1003. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  1004. return 0;
  1005. call_probe:
  1006. return icnss_call_driver_probe(priv);
  1007. out_power_off:
  1008. icnss_hw_power_off(priv);
  1009. out:
  1010. return ret;
  1011. }
  1012. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  1013. {
  1014. int ret = 0;
  1015. if (!priv)
  1016. return -ENODEV;
  1017. del_timer(&priv->recovery_timer);
  1018. set_bit(ICNSS_FW_READY, &priv->state);
  1019. clear_bit(ICNSS_MODE_ON, &priv->state);
  1020. atomic_set(&priv->soc_wake_ref_count, 0);
  1021. if (priv->device_id == WCN6750_DEVICE_ID ||
  1022. priv->device_id == WCN6450_DEVICE_ID)
  1023. icnss_free_qdss_mem(priv);
  1024. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1025. icnss_hw_power_off(priv);
  1026. if (!priv->pdev) {
  1027. icnss_pr_err("Device is not ready\n");
  1028. ret = -ENODEV;
  1029. goto out;
  1030. }
  1031. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1032. icnss_send_wlan_boot_complete();
  1033. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1034. ret = icnss_pd_restart_complete(priv);
  1035. } else {
  1036. if (priv->wpss_supported)
  1037. icnss_setup_dms_mac(priv);
  1038. ret = icnss_call_driver_probe(priv);
  1039. }
  1040. icnss_vreg_unvote(priv);
  1041. out:
  1042. return ret;
  1043. }
  1044. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1045. {
  1046. int ret = 0;
  1047. if (!priv)
  1048. return -ENODEV;
  1049. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1050. if (priv->device_id == WCN6750_DEVICE_ID) {
  1051. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1052. if (ret < 0)
  1053. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1054. ret);
  1055. }
  1056. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1057. mod_timer(&priv->recovery_timer,
  1058. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1059. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1060. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1061. } else {
  1062. icnss_driver_event_fw_ready_ind(priv, NULL);
  1063. }
  1064. return ret;
  1065. }
  1066. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1067. {
  1068. struct platform_device *pdev = priv->pdev;
  1069. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1070. int i, j;
  1071. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1072. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1073. qdss_mem[i].va =
  1074. dma_alloc_coherent(&pdev->dev,
  1075. qdss_mem[i].size,
  1076. &qdss_mem[i].pa,
  1077. GFP_KERNEL);
  1078. if (!qdss_mem[i].va) {
  1079. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1080. qdss_mem[i].size,
  1081. qdss_mem[i].type, i);
  1082. break;
  1083. }
  1084. }
  1085. }
  1086. /* Best-effort allocation for QDSS trace */
  1087. if (i < priv->qdss_mem_seg_len) {
  1088. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1089. qdss_mem[j].type = 0;
  1090. qdss_mem[j].size = 0;
  1091. }
  1092. priv->qdss_mem_seg_len = i;
  1093. }
  1094. return 0;
  1095. }
  1096. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1097. {
  1098. struct platform_device *pdev = priv->pdev;
  1099. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1100. int i;
  1101. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1102. if (qdss_mem[i].va && qdss_mem[i].size) {
  1103. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1104. &qdss_mem[i].pa, qdss_mem[i].size,
  1105. qdss_mem[i].type);
  1106. dma_free_coherent(&pdev->dev,
  1107. qdss_mem[i].size, qdss_mem[i].va,
  1108. qdss_mem[i].pa);
  1109. qdss_mem[i].va = NULL;
  1110. qdss_mem[i].pa = 0;
  1111. qdss_mem[i].size = 0;
  1112. qdss_mem[i].type = 0;
  1113. }
  1114. }
  1115. priv->qdss_mem_seg_len = 0;
  1116. }
  1117. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1118. {
  1119. int ret = 0;
  1120. ret = icnss_alloc_qdss_mem(priv);
  1121. if (ret < 0)
  1122. return ret;
  1123. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1124. }
  1125. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1126. u64 pa, u32 size, int *seg_id)
  1127. {
  1128. int i = 0;
  1129. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1130. u64 offset = 0;
  1131. void *va = NULL;
  1132. u64 local_pa;
  1133. u32 local_size;
  1134. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1135. local_pa = (u64)qdss_mem[i].pa;
  1136. local_size = (u32)qdss_mem[i].size;
  1137. if (pa == local_pa && size <= local_size) {
  1138. va = qdss_mem[i].va;
  1139. break;
  1140. }
  1141. if (pa > local_pa &&
  1142. pa < local_pa + local_size &&
  1143. pa + size <= local_pa + local_size) {
  1144. offset = pa - local_pa;
  1145. va = qdss_mem[i].va + offset;
  1146. break;
  1147. }
  1148. }
  1149. *seg_id = i;
  1150. return va;
  1151. }
  1152. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1153. void *data)
  1154. {
  1155. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1156. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1157. int ret = 0;
  1158. int i;
  1159. void *va = NULL;
  1160. u64 pa;
  1161. u32 size;
  1162. int seg_id = 0;
  1163. if (!priv->qdss_mem_seg_len) {
  1164. icnss_pr_err("Memory for QDSS trace is not available\n");
  1165. return -ENOMEM;
  1166. }
  1167. if (event_data->mem_seg_len == 0) {
  1168. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1169. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1170. ICNSS_GENL_MSG_TYPE_QDSS,
  1171. event_data->file_name,
  1172. qdss_mem[i].size);
  1173. if (ret < 0) {
  1174. icnss_pr_err("Fail to save QDSS data: %d\n",
  1175. ret);
  1176. break;
  1177. }
  1178. }
  1179. } else {
  1180. for (i = 0; i < event_data->mem_seg_len; i++) {
  1181. pa = event_data->mem_seg[i].addr;
  1182. size = event_data->mem_seg[i].size;
  1183. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1184. size, &seg_id);
  1185. if (!va) {
  1186. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1187. &pa);
  1188. ret = -EINVAL;
  1189. break;
  1190. }
  1191. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1192. event_data->file_name, size);
  1193. if (ret < 0) {
  1194. icnss_pr_err("Fail to save QDSS data: %d\n",
  1195. ret);
  1196. break;
  1197. }
  1198. }
  1199. }
  1200. kfree(data);
  1201. return ret;
  1202. }
  1203. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1204. {
  1205. int dec, c = atomic_read(v);
  1206. do {
  1207. dec = c - 1;
  1208. if (unlikely(dec < 1))
  1209. break;
  1210. } while (!atomic_try_cmpxchg(v, &c, dec));
  1211. return dec;
  1212. }
  1213. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1214. void *data)
  1215. {
  1216. int ret = 0;
  1217. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1218. if (!priv)
  1219. return -ENODEV;
  1220. if (!data)
  1221. return -EINVAL;
  1222. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1223. event_data->total_size);
  1224. kfree(data);
  1225. return ret;
  1226. }
  1227. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1228. {
  1229. int ret = 0;
  1230. if (!priv)
  1231. return -ENODEV;
  1232. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1233. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1234. atomic_read(&priv->soc_wake_ref_count));
  1235. return 0;
  1236. }
  1237. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1238. ICNSS_SMP2P_OUT_SOC_WAKE);
  1239. if (!ret)
  1240. atomic_inc(&priv->soc_wake_ref_count);
  1241. return ret;
  1242. }
  1243. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1244. {
  1245. int ret = 0;
  1246. if (!priv)
  1247. return -ENODEV;
  1248. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1249. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1250. priv->soc_wake_ref_count);
  1251. return 0;
  1252. }
  1253. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1254. ICNSS_SMP2P_OUT_SOC_WAKE);
  1255. return ret;
  1256. }
  1257. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1258. void *data)
  1259. {
  1260. int ret = 0;
  1261. int probe_cnt = 0;
  1262. if (priv->ops)
  1263. return -EEXIST;
  1264. priv->ops = data;
  1265. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1266. set_bit(ICNSS_FW_READY, &priv->state);
  1267. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1268. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1269. priv->state);
  1270. return -ENODEV;
  1271. }
  1272. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1273. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1274. priv->state);
  1275. goto out;
  1276. }
  1277. ret = icnss_hw_power_on(priv);
  1278. if (ret)
  1279. goto out;
  1280. icnss_block_shutdown(true);
  1281. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1282. ret = priv->ops->probe(&priv->pdev->dev);
  1283. probe_cnt++;
  1284. if (ret != -EPROBE_DEFER)
  1285. break;
  1286. }
  1287. if (ret) {
  1288. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1289. ret, priv->state, probe_cnt);
  1290. icnss_block_shutdown(false);
  1291. goto power_off;
  1292. }
  1293. icnss_block_shutdown(false);
  1294. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1295. return 0;
  1296. power_off:
  1297. icnss_hw_power_off(priv);
  1298. out:
  1299. return ret;
  1300. }
  1301. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1302. void *data)
  1303. {
  1304. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1305. priv->ops = NULL;
  1306. goto out;
  1307. }
  1308. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1309. icnss_block_shutdown(true);
  1310. if (priv->ops)
  1311. priv->ops->remove(&priv->pdev->dev);
  1312. icnss_block_shutdown(false);
  1313. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1314. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1315. priv->ops = NULL;
  1316. icnss_hw_power_off(priv);
  1317. out:
  1318. return 0;
  1319. }
  1320. static int icnss_fw_crashed(struct icnss_priv *priv,
  1321. struct icnss_event_pd_service_down_data *event_data)
  1322. {
  1323. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1324. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1325. set_bit(ICNSS_PD_RESTART, &priv->state);
  1326. icnss_pm_stay_awake(priv);
  1327. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1328. test_bit(ICNSS_FW_READY, &priv->state)) {
  1329. clear_bit(ICNSS_FW_READY, &priv->state);
  1330. fw_down_data.crashed = true;
  1331. icnss_call_driver_uevent(priv,
  1332. ICNSS_UEVENT_FW_DOWN,
  1333. &fw_down_data);
  1334. }
  1335. if (event_data && event_data->fw_rejuvenate)
  1336. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1337. return 0;
  1338. }
  1339. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1340. struct icnss_uevent_hang_data *hang_data)
  1341. {
  1342. if (!priv->hang_event_data_va)
  1343. return -EINVAL;
  1344. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1345. priv->hang_event_data_len,
  1346. GFP_ATOMIC);
  1347. if (!priv->hang_event_data)
  1348. return -ENOMEM;
  1349. // Update the hang event params
  1350. hang_data->hang_event_data = priv->hang_event_data;
  1351. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1352. return 0;
  1353. }
  1354. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1355. {
  1356. struct icnss_uevent_hang_data hang_data = {0};
  1357. int ret = 0xFF;
  1358. if (priv->early_crash_ind) {
  1359. ret = icnss_update_hang_event_data(priv, &hang_data);
  1360. if (ret)
  1361. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1362. }
  1363. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1364. &hang_data);
  1365. if (!ret) {
  1366. kfree(priv->hang_event_data);
  1367. priv->hang_event_data = NULL;
  1368. }
  1369. return 0;
  1370. }
  1371. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1372. void *data)
  1373. {
  1374. struct icnss_event_pd_service_down_data *event_data = data;
  1375. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1376. icnss_ignore_fw_timeout(false);
  1377. goto out;
  1378. }
  1379. if (priv->force_err_fatal)
  1380. ICNSS_ASSERT(0);
  1381. if (priv->device_id == WCN6750_DEVICE_ID ||
  1382. priv->device_id == WCN6450_DEVICE_ID) {
  1383. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1384. ICNSS_SMP2P_OUT_SOC_WAKE);
  1385. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1386. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1387. }
  1388. if (priv->wpss_supported)
  1389. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1390. ICNSS_SMP2P_OUT_POWER_SAVE);
  1391. icnss_send_hang_event_data(priv);
  1392. if (priv->early_crash_ind) {
  1393. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1394. event_data->crashed, priv->state);
  1395. goto out;
  1396. }
  1397. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1398. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1399. event_data->crashed, priv->state);
  1400. if (!priv->allow_recursive_recovery)
  1401. ICNSS_ASSERT(0);
  1402. goto out;
  1403. }
  1404. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1405. icnss_fw_crashed(priv, event_data);
  1406. out:
  1407. kfree(data);
  1408. return 0;
  1409. }
  1410. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1411. void *data)
  1412. {
  1413. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1414. icnss_ignore_fw_timeout(false);
  1415. goto out;
  1416. }
  1417. priv->early_crash_ind = true;
  1418. icnss_fw_crashed(priv, NULL);
  1419. out:
  1420. kfree(data);
  1421. return 0;
  1422. }
  1423. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1424. void *data)
  1425. {
  1426. int ret = 0;
  1427. if (!priv->ops || !priv->ops->idle_shutdown)
  1428. return 0;
  1429. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1430. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1431. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1432. ret = -EBUSY;
  1433. } else {
  1434. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1435. priv->state);
  1436. icnss_block_shutdown(true);
  1437. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1438. icnss_block_shutdown(false);
  1439. }
  1440. return ret;
  1441. }
  1442. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1443. void *data)
  1444. {
  1445. int ret = 0;
  1446. if (!priv->ops || !priv->ops->idle_restart)
  1447. return 0;
  1448. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1449. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1450. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1451. ret = -EBUSY;
  1452. } else {
  1453. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1454. priv->state);
  1455. icnss_block_shutdown(true);
  1456. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1457. icnss_block_shutdown(false);
  1458. }
  1459. return ret;
  1460. }
  1461. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1462. {
  1463. icnss_free_qdss_mem(priv);
  1464. return 0;
  1465. }
  1466. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1467. void *data)
  1468. {
  1469. struct icnss_m3_upload_segments_req_data *event_data = data;
  1470. struct qcom_dump_segment segment;
  1471. int i, status = 0, ret = 0;
  1472. struct list_head head;
  1473. if (!dump_enabled()) {
  1474. icnss_pr_info("Dump collection is not enabled\n");
  1475. return ret;
  1476. }
  1477. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1478. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1479. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1480. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1481. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1482. return ret;
  1483. INIT_LIST_HEAD(&head);
  1484. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1485. memset(&segment, 0, sizeof(segment));
  1486. segment.va = devm_ioremap(&priv->pdev->dev,
  1487. event_data->m3_segment[i].addr,
  1488. event_data->m3_segment[i].size);
  1489. if (!segment.va) {
  1490. icnss_pr_err("Failed to ioremap M3 Dump region");
  1491. ret = -ENOMEM;
  1492. goto send_resp;
  1493. }
  1494. segment.size = event_data->m3_segment[i].size;
  1495. list_add(&segment.node, &head);
  1496. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1497. event_data->m3_segment[i].name);
  1498. switch (event_data->m3_segment[i].type) {
  1499. case QMI_M3_SEGMENT_PHYAREG_V01:
  1500. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1501. break;
  1502. case QMI_M3_SEGMENT_PHYDBG_V01:
  1503. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1504. break;
  1505. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1506. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1507. break;
  1508. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1509. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1510. break;
  1511. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1512. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1513. break;
  1514. default:
  1515. icnss_pr_err("Invalid Segment type: %d",
  1516. event_data->m3_segment[i].type);
  1517. }
  1518. if (ret) {
  1519. status = ret;
  1520. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1521. event_data->m3_segment[i].name, ret);
  1522. }
  1523. list_del(&segment.node);
  1524. }
  1525. send_resp:
  1526. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1527. status);
  1528. return ret;
  1529. }
  1530. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1531. {
  1532. int ret = 0;
  1533. struct icnss_subsys_restart_level_data *event_data = data;
  1534. if (!data)
  1535. return -EINVAL;
  1536. if (!priv) {
  1537. ret = -ENODEV;
  1538. goto out;
  1539. }
  1540. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1541. out:
  1542. kfree(data);
  1543. return ret;
  1544. }
  1545. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1546. {
  1547. int ret;
  1548. struct icnss_priv *priv = icnss_get_plat_priv();
  1549. rproc_shutdown(priv->rproc);
  1550. ret = rproc_boot(priv->rproc);
  1551. if (ret) {
  1552. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1553. rproc_put(priv->rproc);
  1554. }
  1555. }
  1556. static void icnss_driver_event_work(struct work_struct *work)
  1557. {
  1558. struct icnss_priv *priv =
  1559. container_of(work, struct icnss_priv, event_work);
  1560. struct icnss_driver_event *event;
  1561. unsigned long flags;
  1562. int ret;
  1563. icnss_pm_stay_awake(priv);
  1564. spin_lock_irqsave(&priv->event_lock, flags);
  1565. while (!list_empty(&priv->event_list)) {
  1566. event = list_first_entry(&priv->event_list,
  1567. struct icnss_driver_event, list);
  1568. list_del(&event->list);
  1569. spin_unlock_irqrestore(&priv->event_lock, flags);
  1570. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1571. icnss_driver_event_to_str(event->type),
  1572. event->sync ? "-sync" : "", event->type,
  1573. priv->state);
  1574. switch (event->type) {
  1575. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1576. ret = icnss_driver_event_server_arrive(priv,
  1577. event->data);
  1578. break;
  1579. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1580. ret = icnss_driver_event_server_exit(priv);
  1581. break;
  1582. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1583. ret = icnss_driver_event_fw_ready_ind(priv,
  1584. event->data);
  1585. break;
  1586. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1587. ret = icnss_driver_event_register_driver(priv,
  1588. event->data);
  1589. break;
  1590. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1591. ret = icnss_driver_event_unregister_driver(priv,
  1592. event->data);
  1593. break;
  1594. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1595. ret = icnss_driver_event_pd_service_down(priv,
  1596. event->data);
  1597. break;
  1598. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1599. ret = icnss_driver_event_early_crash_ind(priv,
  1600. event->data);
  1601. break;
  1602. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1603. ret = icnss_driver_event_idle_shutdown(priv,
  1604. event->data);
  1605. break;
  1606. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1607. ret = icnss_driver_event_idle_restart(priv,
  1608. event->data);
  1609. break;
  1610. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1611. ret = icnss_driver_event_fw_init_done(priv,
  1612. event->data);
  1613. break;
  1614. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1615. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1616. break;
  1617. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1618. ret = icnss_qdss_trace_save_hdlr(priv,
  1619. event->data);
  1620. break;
  1621. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1622. ret = icnss_qdss_trace_free_hdlr(priv);
  1623. break;
  1624. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1625. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1626. break;
  1627. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1628. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1629. event->data);
  1630. break;
  1631. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1632. ret = icnss_subsys_restart_level(priv, event->data);
  1633. break;
  1634. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1635. ret = icnss_process_wfc_call_ind_event(priv,
  1636. event->data);
  1637. break;
  1638. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1639. ret = icnss_process_twt_cfg_ind_event(priv,
  1640. event->data);
  1641. break;
  1642. default:
  1643. icnss_pr_err("Invalid Event type: %d", event->type);
  1644. kfree(event);
  1645. continue;
  1646. }
  1647. priv->stats.events[event->type].processed++;
  1648. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1649. icnss_driver_event_to_str(event->type),
  1650. event->sync ? "-sync" : "", event->type, ret,
  1651. priv->state);
  1652. spin_lock_irqsave(&priv->event_lock, flags);
  1653. if (event->sync) {
  1654. event->ret = ret;
  1655. complete(&event->complete);
  1656. continue;
  1657. }
  1658. spin_unlock_irqrestore(&priv->event_lock, flags);
  1659. kfree(event);
  1660. spin_lock_irqsave(&priv->event_lock, flags);
  1661. }
  1662. spin_unlock_irqrestore(&priv->event_lock, flags);
  1663. icnss_pm_relax(priv);
  1664. }
  1665. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1666. {
  1667. struct icnss_priv *priv =
  1668. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1669. struct icnss_soc_wake_event *event;
  1670. unsigned long flags;
  1671. int ret;
  1672. icnss_pm_stay_awake(priv);
  1673. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1674. while (!list_empty(&priv->soc_wake_msg_list)) {
  1675. event = list_first_entry(&priv->soc_wake_msg_list,
  1676. struct icnss_soc_wake_event, list);
  1677. list_del(&event->list);
  1678. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1679. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1680. icnss_soc_wake_event_to_str(event->type),
  1681. event->sync ? "-sync" : "", event->type,
  1682. priv->state);
  1683. switch (event->type) {
  1684. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1685. ret = icnss_event_soc_wake_request(priv,
  1686. event->data);
  1687. break;
  1688. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1689. ret = icnss_event_soc_wake_release(priv,
  1690. event->data);
  1691. break;
  1692. default:
  1693. icnss_pr_err("Invalid Event type: %d", event->type);
  1694. kfree(event);
  1695. continue;
  1696. }
  1697. priv->stats.soc_wake_events[event->type].processed++;
  1698. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1699. icnss_soc_wake_event_to_str(event->type),
  1700. event->sync ? "-sync" : "", event->type, ret,
  1701. priv->state);
  1702. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1703. if (event->sync) {
  1704. event->ret = ret;
  1705. complete(&event->complete);
  1706. continue;
  1707. }
  1708. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1709. kfree(event);
  1710. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1711. }
  1712. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1713. icnss_pm_relax(priv);
  1714. }
  1715. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1716. {
  1717. int ret = 0;
  1718. struct qcom_dump_segment segment;
  1719. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1720. struct list_head head;
  1721. if (!dump_enabled()) {
  1722. icnss_pr_info("Dump collection is not enabled\n");
  1723. return ret;
  1724. }
  1725. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1726. return ret;
  1727. INIT_LIST_HEAD(&head);
  1728. memset(&segment, 0, sizeof(segment));
  1729. segment.va = priv->msa_va;
  1730. segment.size = priv->msa_mem_size;
  1731. list_add(&segment.node, &head);
  1732. if (!msa0_dump_dev->dev) {
  1733. icnss_pr_err("Created Dump Device not found\n");
  1734. return 0;
  1735. }
  1736. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1737. if (ret) {
  1738. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1739. return ret;
  1740. }
  1741. list_del(&segment.node);
  1742. return ret;
  1743. }
  1744. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1745. void *data)
  1746. {
  1747. struct qcom_ssr_notify_data *notif = data;
  1748. int ret = 0;
  1749. if (!notif->crashed) {
  1750. if (atomic_read(&priv->is_shutdown)) {
  1751. atomic_set(&priv->is_shutdown, false);
  1752. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1753. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1754. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1755. clear_bit(ICNSS_FW_READY, &priv->state);
  1756. icnss_driver_event_post(priv,
  1757. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1758. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1759. NULL);
  1760. }
  1761. }
  1762. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1763. if (!wait_for_completion_timeout(
  1764. &priv->unblock_shutdown,
  1765. msecs_to_jiffies(PROBE_TIMEOUT)))
  1766. icnss_pr_err("modem block shutdown timeout\n");
  1767. }
  1768. ret = wlfw_send_modem_shutdown_msg(priv);
  1769. if (ret < 0)
  1770. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1771. ret);
  1772. }
  1773. }
  1774. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1775. {
  1776. switch (code) {
  1777. case QCOM_SSR_BEFORE_POWERUP:
  1778. return "BEFORE_POWERUP";
  1779. case QCOM_SSR_AFTER_POWERUP:
  1780. return "AFTER_POWERUP";
  1781. case QCOM_SSR_BEFORE_SHUTDOWN:
  1782. return "BEFORE_SHUTDOWN";
  1783. case QCOM_SSR_AFTER_SHUTDOWN:
  1784. return "AFTER_SHUTDOWN";
  1785. default:
  1786. return "UNKNOWN";
  1787. }
  1788. };
  1789. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1790. unsigned long code,
  1791. void *data)
  1792. {
  1793. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1794. wpss_early_ssr_nb);
  1795. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1796. icnss_qcom_ssr_notify_state_to_str(code), code);
  1797. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1798. set_bit(ICNSS_FW_DOWN, &priv->state);
  1799. icnss_ignore_fw_timeout(true);
  1800. }
  1801. return NOTIFY_DONE;
  1802. }
  1803. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1804. unsigned long code,
  1805. void *data)
  1806. {
  1807. struct icnss_event_pd_service_down_data *event_data;
  1808. struct qcom_ssr_notify_data *notif = data;
  1809. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1810. wpss_ssr_nb);
  1811. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1812. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1813. icnss_qcom_ssr_notify_state_to_str(code), code);
  1814. switch (code) {
  1815. case QCOM_SSR_BEFORE_SHUTDOWN:
  1816. break;
  1817. case QCOM_SSR_AFTER_SHUTDOWN:
  1818. /* Collect ramdump only when there was a crash. */
  1819. if (notif->crashed) {
  1820. icnss_pr_info("Collecting msa0 segment dump\n");
  1821. icnss_msa0_ramdump(priv);
  1822. }
  1823. goto out;
  1824. default:
  1825. goto out;
  1826. }
  1827. if (priv->wpss_self_recovery_enabled)
  1828. del_timer(&priv->wpss_ssr_timer);
  1829. priv->is_ssr = true;
  1830. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1831. priv->state, notif->crashed);
  1832. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1833. icnss_update_state_send_modem_shutdown(priv, data);
  1834. set_bit(ICNSS_FW_DOWN, &priv->state);
  1835. icnss_ignore_fw_timeout(true);
  1836. if (notif->crashed)
  1837. priv->stats.recovery.root_pd_crash++;
  1838. else
  1839. priv->stats.recovery.root_pd_shutdown++;
  1840. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1841. if (event_data == NULL)
  1842. return notifier_from_errno(-ENOMEM);
  1843. event_data->crashed = notif->crashed;
  1844. fw_down_data.crashed = !!notif->crashed;
  1845. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1846. clear_bit(ICNSS_FW_READY, &priv->state);
  1847. fw_down_data.crashed = !!notif->crashed;
  1848. icnss_call_driver_uevent(priv,
  1849. ICNSS_UEVENT_FW_DOWN,
  1850. &fw_down_data);
  1851. }
  1852. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1853. ICNSS_EVENT_SYNC, event_data);
  1854. if (notif->crashed)
  1855. mod_timer(&priv->recovery_timer,
  1856. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1857. out:
  1858. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1859. return NOTIFY_OK;
  1860. }
  1861. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1862. unsigned long code,
  1863. void *data)
  1864. {
  1865. struct icnss_event_pd_service_down_data *event_data;
  1866. struct qcom_ssr_notify_data *notif = data;
  1867. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1868. modem_ssr_nb);
  1869. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1870. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1871. icnss_qcom_ssr_notify_state_to_str(code), code);
  1872. switch (code) {
  1873. case QCOM_SSR_BEFORE_SHUTDOWN:
  1874. if (priv->is_slate_rfa)
  1875. complete(&priv->slate_boot_complete);
  1876. if (!notif->crashed &&
  1877. priv->low_power_support) { /* Hibernate */
  1878. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1879. icnss_driver_event_post(
  1880. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1881. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1882. set_bit(ICNSS_LOW_POWER, &priv->state);
  1883. }
  1884. break;
  1885. case QCOM_SSR_AFTER_SHUTDOWN:
  1886. /* Collect ramdump only when there was a crash. */
  1887. if (notif->crashed) {
  1888. icnss_pr_info("Collecting msa0 segment dump\n");
  1889. icnss_msa0_ramdump(priv);
  1890. }
  1891. goto out;
  1892. default:
  1893. goto out;
  1894. }
  1895. priv->is_ssr = true;
  1896. if (notif->crashed) {
  1897. priv->stats.recovery.root_pd_crash++;
  1898. priv->root_pd_shutdown = false;
  1899. } else {
  1900. priv->stats.recovery.root_pd_shutdown++;
  1901. priv->root_pd_shutdown = true;
  1902. }
  1903. icnss_update_state_send_modem_shutdown(priv, data);
  1904. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1905. set_bit(ICNSS_FW_DOWN, &priv->state);
  1906. icnss_ignore_fw_timeout(true);
  1907. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1908. clear_bit(ICNSS_FW_READY, &priv->state);
  1909. fw_down_data.crashed = !!notif->crashed;
  1910. icnss_call_driver_uevent(priv,
  1911. ICNSS_UEVENT_FW_DOWN,
  1912. &fw_down_data);
  1913. }
  1914. goto out;
  1915. }
  1916. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1917. priv->state, notif->crashed);
  1918. set_bit(ICNSS_FW_DOWN, &priv->state);
  1919. icnss_ignore_fw_timeout(true);
  1920. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1921. if (event_data == NULL)
  1922. return notifier_from_errno(-ENOMEM);
  1923. event_data->crashed = notif->crashed;
  1924. fw_down_data.crashed = !!notif->crashed;
  1925. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1926. clear_bit(ICNSS_FW_READY, &priv->state);
  1927. fw_down_data.crashed = !!notif->crashed;
  1928. icnss_call_driver_uevent(priv,
  1929. ICNSS_UEVENT_FW_DOWN,
  1930. &fw_down_data);
  1931. }
  1932. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1933. ICNSS_EVENT_SYNC, event_data);
  1934. if (notif->crashed)
  1935. mod_timer(&priv->recovery_timer,
  1936. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1937. out:
  1938. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1939. return NOTIFY_OK;
  1940. }
  1941. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1942. {
  1943. int ret = 0;
  1944. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1945. priv->wpss_early_notify_handler =
  1946. qcom_register_early_ssr_notifier("wpss",
  1947. &priv->wpss_early_ssr_nb);
  1948. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler)) {
  1949. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1950. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1951. }
  1952. return ret;
  1953. }
  1954. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1955. {
  1956. int ret = 0;
  1957. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1958. /*
  1959. * Assign priority of icnss wpss notifier callback over IPA
  1960. * modem notifier callback which is 0
  1961. */
  1962. priv->wpss_ssr_nb.priority = 1;
  1963. priv->wpss_notify_handler =
  1964. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1965. if (IS_ERR_OR_NULL(priv->wpss_notify_handler)) {
  1966. ret = PTR_ERR(priv->wpss_notify_handler);
  1967. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1968. }
  1969. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1970. return ret;
  1971. }
  1972. #ifdef CONFIG_SLATE_MODULE_ENABLED
  1973. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1974. unsigned long event, void *data)
  1975. {
  1976. icnss_pr_info("Received slate event 0x%x\n", event);
  1977. if (event == SLATE_STATUS) {
  1978. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1979. seb_nb);
  1980. enum boot_status status = *(enum boot_status *)data;
  1981. if (status == SLATE_READY) {
  1982. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1983. priv->state);
  1984. set_bit(ICNSS_SLATE_READY, &priv->state);
  1985. set_bit(ICNSS_SLATE_UP, &priv->state);
  1986. complete(&priv->slate_boot_complete);
  1987. }
  1988. }
  1989. return NOTIFY_OK;
  1990. }
  1991. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1992. {
  1993. int ret = 0;
  1994. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1995. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1996. &priv->seb_nb);
  1997. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1998. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1999. icnss_pr_err("SLATE event register notifier failed: %d\n",
  2000. ret);
  2001. }
  2002. return ret;
  2003. }
  2004. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2005. {
  2006. int ret = 0;
  2007. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  2008. if (ret < 0)
  2009. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  2010. return ret;
  2011. }
  2012. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  2013. unsigned long code,
  2014. void *data)
  2015. {
  2016. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2017. slate_ssr_nb);
  2018. int ret = 0;
  2019. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  2020. if (code == QCOM_SSR_AFTER_POWERUP &&
  2021. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  2022. set_bit(ICNSS_SLATE_UP, &priv->state);
  2023. complete(&priv->slate_boot_complete);
  2024. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  2025. priv->state);
  2026. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  2027. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2028. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2029. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2030. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2031. priv->state);
  2032. goto skip_pdr;
  2033. }
  2034. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2035. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2036. if (ret < 0) {
  2037. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2038. ret, priv->state);
  2039. goto skip_pdr;
  2040. }
  2041. }
  2042. skip_pdr:
  2043. return NOTIFY_OK;
  2044. }
  2045. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2046. {
  2047. int ret = 0;
  2048. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2049. priv->slate_notify_handler =
  2050. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2051. if (IS_ERR_OR_NULL(priv->slate_notify_handler)) {
  2052. ret = PTR_ERR(priv->slate_notify_handler);
  2053. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2054. }
  2055. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2056. return ret;
  2057. }
  2058. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2059. {
  2060. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2061. return 0;
  2062. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2063. &priv->slate_ssr_nb);
  2064. priv->slate_notify_handler = NULL;
  2065. return 0;
  2066. }
  2067. #else
  2068. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2069. {
  2070. return 0;
  2071. }
  2072. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2073. {
  2074. return 0;
  2075. }
  2076. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2077. {
  2078. return 0;
  2079. }
  2080. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2081. {
  2082. return 0;
  2083. }
  2084. #endif
  2085. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2086. {
  2087. int ret = 0;
  2088. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2089. /*
  2090. * Assign priority of icnss modem notifier callback over IPA
  2091. * modem notifier callback which is 0
  2092. */
  2093. priv->modem_ssr_nb.priority = 1;
  2094. priv->modem_notify_handler =
  2095. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2096. if (IS_ERR_OR_NULL(priv->modem_notify_handler)) {
  2097. ret = PTR_ERR(priv->modem_notify_handler);
  2098. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2099. }
  2100. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2101. return ret;
  2102. }
  2103. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2104. {
  2105. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler))
  2106. return;
  2107. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2108. &priv->wpss_early_ssr_nb);
  2109. priv->wpss_early_notify_handler = NULL;
  2110. }
  2111. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2112. {
  2113. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2114. return 0;
  2115. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2116. &priv->wpss_ssr_nb);
  2117. priv->wpss_notify_handler = NULL;
  2118. return 0;
  2119. }
  2120. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2121. {
  2122. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2123. return 0;
  2124. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2125. &priv->modem_ssr_nb);
  2126. priv->modem_notify_handler = NULL;
  2127. return 0;
  2128. }
  2129. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2130. {
  2131. struct icnss_priv *priv = priv_cb;
  2132. struct icnss_event_pd_service_down_data *event_data;
  2133. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2134. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2135. if (!priv)
  2136. return;
  2137. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2138. state, priv->state);
  2139. switch (state) {
  2140. case SERVREG_SERVICE_STATE_DOWN:
  2141. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2142. if (!event_data)
  2143. return;
  2144. event_data->crashed = true;
  2145. if (!priv->is_ssr) {
  2146. set_bit(ICNSS_PDR, &penv->state);
  2147. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2148. cause = ICNSS_HOST_ERROR;
  2149. priv->stats.recovery.pdr_host_error++;
  2150. } else {
  2151. cause = ICNSS_FW_CRASH;
  2152. priv->stats.recovery.pdr_fw_crash++;
  2153. }
  2154. } else if (priv->root_pd_shutdown) {
  2155. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2156. event_data->crashed = false;
  2157. }
  2158. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2159. priv->state, icnss_pdr_cause[cause]);
  2160. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2161. set_bit(ICNSS_FW_DOWN, &priv->state);
  2162. icnss_ignore_fw_timeout(true);
  2163. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2164. clear_bit(ICNSS_FW_READY, &priv->state);
  2165. fw_down_data.crashed = event_data->crashed;
  2166. icnss_call_driver_uevent(priv,
  2167. ICNSS_UEVENT_FW_DOWN,
  2168. &fw_down_data);
  2169. }
  2170. }
  2171. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2172. if (event_data->crashed)
  2173. mod_timer(&priv->recovery_timer,
  2174. jiffies +
  2175. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2176. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2177. ICNSS_EVENT_SYNC, event_data);
  2178. break;
  2179. case SERVREG_SERVICE_STATE_UP:
  2180. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2181. break;
  2182. default:
  2183. break;
  2184. }
  2185. return;
  2186. }
  2187. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2188. {
  2189. struct pdr_handle *handle = NULL;
  2190. struct pdr_service *service = NULL;
  2191. int err = 0;
  2192. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2193. if (IS_ERR_OR_NULL(handle)) {
  2194. err = PTR_ERR(handle);
  2195. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2196. goto out;
  2197. }
  2198. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2199. if (IS_ERR_OR_NULL(service)) {
  2200. err = PTR_ERR(service);
  2201. icnss_pr_err("Failed to add lookup, err %d", err);
  2202. goto out;
  2203. }
  2204. priv->pdr_handle = handle;
  2205. priv->pdr_service = service;
  2206. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2207. icnss_pr_info("PDR registration happened");
  2208. out:
  2209. return err;
  2210. }
  2211. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2212. {
  2213. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2214. return;
  2215. pdr_handle_release(priv->pdr_handle);
  2216. }
  2217. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2218. {
  2219. int ret = 0;
  2220. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2221. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2222. #else
  2223. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2224. #endif
  2225. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2226. ret = PTR_ERR(priv->icnss_ramdump_class);
  2227. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2228. return ret;
  2229. }
  2230. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2231. ICNSS_RAMDUMP_NAME);
  2232. if (ret < 0) {
  2233. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2234. goto fail_alloc_major;
  2235. }
  2236. return 0;
  2237. fail_alloc_major:
  2238. class_destroy(priv->icnss_ramdump_class);
  2239. return ret;
  2240. }
  2241. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2242. {
  2243. int ret = 0;
  2244. struct icnss_ramdump_info *ramdump_info;
  2245. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2246. if (!ramdump_info)
  2247. return ERR_PTR(-ENOMEM);
  2248. if (!dev_name) {
  2249. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2250. return NULL;
  2251. }
  2252. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2253. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2254. if (ramdump_info->minor < 0) {
  2255. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2256. ramdump_info->minor);
  2257. ret = -ENODEV;
  2258. goto fail_out_of_minors;
  2259. }
  2260. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2261. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2262. ramdump_info->minor),
  2263. ramdump_info, ramdump_info->name);
  2264. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2265. ret = PTR_ERR(ramdump_info->dev);
  2266. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2267. ramdump_info->name, ret);
  2268. goto fail_device_create;
  2269. }
  2270. return (void *)ramdump_info;
  2271. fail_device_create:
  2272. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2273. fail_out_of_minors:
  2274. kfree(ramdump_info);
  2275. return ERR_PTR(ret);
  2276. }
  2277. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2278. {
  2279. int ret = 0;
  2280. if (!priv || !priv->pdev) {
  2281. icnss_pr_err("Platform priv or pdev is NULL\n");
  2282. return -EINVAL;
  2283. }
  2284. ret = icnss_ramdump_devnode_init(priv);
  2285. if (ret)
  2286. return ret;
  2287. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2288. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2289. icnss_pr_err("Failed to create msa0 dump device!");
  2290. return -ENOMEM;
  2291. }
  2292. if (priv->device_id == WCN6750_DEVICE_ID ||
  2293. priv->device_id == WCN6450_DEVICE_ID) {
  2294. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2295. ICNSS_M3_SEGMENT(
  2296. ICNSS_M3_SEGMENT_PHYAREG));
  2297. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2298. !priv->m3_dump_phyareg->dev) {
  2299. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2300. return -ENOMEM;
  2301. }
  2302. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2303. ICNSS_M3_SEGMENT(
  2304. ICNSS_M3_SEGMENT_PHYA));
  2305. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2306. !priv->m3_dump_phydbg->dev) {
  2307. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2308. return -ENOMEM;
  2309. }
  2310. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2311. ICNSS_M3_SEGMENT(
  2312. ICNSS_M3_SEGMENT_WMACREG));
  2313. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2314. !priv->m3_dump_wmac0reg->dev) {
  2315. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2316. return -ENOMEM;
  2317. }
  2318. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2319. ICNSS_M3_SEGMENT(
  2320. ICNSS_M3_SEGMENT_WCSSDBG));
  2321. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2322. !priv->m3_dump_wcssdbg->dev) {
  2323. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2324. return -ENOMEM;
  2325. }
  2326. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2327. ICNSS_M3_SEGMENT(
  2328. ICNSS_M3_SEGMENT_PHYAM3));
  2329. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2330. !priv->m3_dump_phyapdmem->dev) {
  2331. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2332. return -ENOMEM;
  2333. }
  2334. }
  2335. return 0;
  2336. }
  2337. static int icnss_enable_recovery(struct icnss_priv *priv)
  2338. {
  2339. int ret;
  2340. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2341. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2342. return 0;
  2343. }
  2344. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2345. icnss_pr_dbg("SSR disabled through module parameter\n");
  2346. goto enable_pdr;
  2347. }
  2348. ret = icnss_register_ramdump_devices(priv);
  2349. if (ret)
  2350. return ret;
  2351. if (priv->wpss_supported) {
  2352. icnss_wpss_early_ssr_register_notifier(priv);
  2353. icnss_wpss_ssr_register_notifier(priv);
  2354. return 0;
  2355. }
  2356. if (!(priv->rproc_fw_download))
  2357. icnss_modem_ssr_register_notifier(priv);
  2358. if (priv->is_slate_rfa) {
  2359. icnss_slate_ssr_register_notifier(priv);
  2360. icnss_register_slate_event_notifier(priv);
  2361. }
  2362. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2363. icnss_pr_dbg("PDR disabled through module parameter\n");
  2364. return 0;
  2365. }
  2366. enable_pdr:
  2367. ret = icnss_pd_restart_enable(priv);
  2368. if (ret)
  2369. return ret;
  2370. return 0;
  2371. }
  2372. static int icnss_dev_id_match(struct icnss_priv *priv,
  2373. struct device_info *dev_info)
  2374. {
  2375. while (dev_info->device_id) {
  2376. if (priv->device_id == dev_info->device_id)
  2377. return 1;
  2378. dev_info++;
  2379. }
  2380. return 0;
  2381. }
  2382. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2383. unsigned long *thermal_state)
  2384. {
  2385. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2386. *thermal_state = icnss_tcdev->max_thermal_state;
  2387. return 0;
  2388. }
  2389. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2390. unsigned long *thermal_state)
  2391. {
  2392. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2393. *thermal_state = icnss_tcdev->curr_thermal_state;
  2394. return 0;
  2395. }
  2396. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2397. unsigned long thermal_state)
  2398. {
  2399. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2400. struct device *dev = &penv->pdev->dev;
  2401. int ret = 0;
  2402. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2403. return 0;
  2404. if (thermal_state > icnss_tcdev->max_thermal_state)
  2405. return -EINVAL;
  2406. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2407. thermal_state, icnss_tcdev->tcdev_id);
  2408. mutex_lock(&penv->tcdev_lock);
  2409. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2410. icnss_tcdev->tcdev_id);
  2411. if (!ret)
  2412. icnss_tcdev->curr_thermal_state = thermal_state;
  2413. mutex_unlock(&penv->tcdev_lock);
  2414. if (ret) {
  2415. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2416. ret, icnss_tcdev->tcdev_id);
  2417. return ret;
  2418. }
  2419. return 0;
  2420. }
  2421. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2422. .get_max_state = icnss_tcdev_get_max_state,
  2423. .get_cur_state = icnss_tcdev_get_cur_state,
  2424. .set_cur_state = icnss_tcdev_set_cur_state,
  2425. };
  2426. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2427. int tcdev_id)
  2428. {
  2429. struct icnss_priv *priv = dev_get_drvdata(dev);
  2430. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2431. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2432. struct device_node *dev_node;
  2433. int ret = 0;
  2434. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2435. if (!icnss_tcdev)
  2436. return -ENOMEM;
  2437. icnss_tcdev->tcdev_id = tcdev_id;
  2438. icnss_tcdev->max_thermal_state = max_state;
  2439. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2440. "qcom,icnss_cdev%d", tcdev_id);
  2441. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2442. if (!dev_node) {
  2443. icnss_pr_err("Failed to get cooling device node\n");
  2444. return -EINVAL;
  2445. }
  2446. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2447. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2448. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2449. dev_node,
  2450. cdev_node_name, icnss_tcdev,
  2451. &icnss_cooling_ops);
  2452. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2453. ret = PTR_ERR(icnss_tcdev->tcdev);
  2454. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2455. ret, icnss_tcdev->tcdev_id);
  2456. } else {
  2457. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2458. icnss_tcdev->tcdev_id);
  2459. list_add(&icnss_tcdev->tcdev_list,
  2460. &priv->icnss_tcdev_list);
  2461. }
  2462. } else {
  2463. icnss_pr_dbg("Cooling device registration not supported");
  2464. ret = -EOPNOTSUPP;
  2465. }
  2466. return ret;
  2467. }
  2468. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2469. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2470. {
  2471. struct icnss_priv *priv = dev_get_drvdata(dev);
  2472. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2473. while (!list_empty(&priv->icnss_tcdev_list)) {
  2474. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2475. struct icnss_thermal_cdev,
  2476. tcdev_list);
  2477. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2478. list_del(&icnss_tcdev->tcdev_list);
  2479. kfree(icnss_tcdev);
  2480. }
  2481. }
  2482. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2483. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2484. unsigned long *thermal_state,
  2485. int tcdev_id)
  2486. {
  2487. struct icnss_priv *priv = dev_get_drvdata(dev);
  2488. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2489. mutex_lock(&priv->tcdev_lock);
  2490. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2491. if (icnss_tcdev->tcdev_id != tcdev_id)
  2492. continue;
  2493. *thermal_state = icnss_tcdev->curr_thermal_state;
  2494. mutex_unlock(&priv->tcdev_lock);
  2495. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2496. icnss_tcdev->curr_thermal_state, tcdev_id);
  2497. return 0;
  2498. }
  2499. mutex_unlock(&priv->tcdev_lock);
  2500. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2501. return -EINVAL;
  2502. }
  2503. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2504. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2505. int cmd_len, void *cb_ctx,
  2506. int (*cb)(void *ctx, void *event, int event_len))
  2507. {
  2508. struct icnss_priv *priv = icnss_get_plat_priv();
  2509. int ret;
  2510. if (!priv)
  2511. return -ENODEV;
  2512. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2513. return -EINVAL;
  2514. priv->get_info_cb = cb;
  2515. priv->get_info_cb_ctx = cb_ctx;
  2516. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2517. if (ret) {
  2518. priv->get_info_cb = NULL;
  2519. priv->get_info_cb_ctx = NULL;
  2520. }
  2521. return ret;
  2522. }
  2523. EXPORT_SYMBOL(icnss_qmi_send);
  2524. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2525. struct module *owner, const char *mod_name)
  2526. {
  2527. int ret = 0;
  2528. struct icnss_priv *priv = icnss_get_plat_priv();
  2529. if (!priv || !priv->pdev) {
  2530. icnss_pr_vdbg("icnss2 is not ready for register driver\n");
  2531. ret = -EAGAIN;
  2532. goto out;
  2533. }
  2534. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2535. if (priv->ops) {
  2536. icnss_pr_err("Driver already registered\n");
  2537. ret = -EEXIST;
  2538. goto out;
  2539. }
  2540. if (!ops->dev_info) {
  2541. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2542. return -EINVAL;
  2543. }
  2544. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2545. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2546. ops->dev_info->name);
  2547. return -ENODEV;
  2548. }
  2549. if (!ops->probe || !ops->remove) {
  2550. ret = -EINVAL;
  2551. goto out;
  2552. }
  2553. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2554. 0, ops);
  2555. if (ret == -EINTR)
  2556. ret = 0;
  2557. out:
  2558. return ret;
  2559. }
  2560. EXPORT_SYMBOL(__icnss_register_driver);
  2561. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2562. {
  2563. int ret;
  2564. struct icnss_priv *priv = icnss_get_plat_priv();
  2565. if (!priv || !priv->pdev) {
  2566. ret = -ENODEV;
  2567. goto out;
  2568. }
  2569. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2570. if (!priv->ops) {
  2571. icnss_pr_err("Driver not registered\n");
  2572. ret = -ENOENT;
  2573. goto out;
  2574. }
  2575. ret = icnss_driver_event_post(priv,
  2576. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2577. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2578. out:
  2579. return ret;
  2580. }
  2581. EXPORT_SYMBOL(icnss_unregister_driver);
  2582. static struct icnss_msi_config msi_config_wcn6750 = {
  2583. .total_vectors = 28,
  2584. .total_users = 2,
  2585. .users = (struct icnss_msi_user[]) {
  2586. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2587. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2588. },
  2589. };
  2590. static struct icnss_msi_config msi_config_wcn6450 = {
  2591. .total_vectors = 14,
  2592. .total_users = 2,
  2593. .users = (struct icnss_msi_user[]) {
  2594. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2595. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2596. },
  2597. };
  2598. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2599. {
  2600. if (priv->device_id == WCN6750_DEVICE_ID)
  2601. priv->msi_config = &msi_config_wcn6750;
  2602. else
  2603. priv->msi_config = &msi_config_wcn6450;
  2604. return 0;
  2605. }
  2606. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2607. int *num_vectors, u32 *user_base_data,
  2608. u32 *base_vector)
  2609. {
  2610. struct icnss_priv *priv = dev_get_drvdata(dev);
  2611. struct icnss_msi_config *msi_config;
  2612. int idx;
  2613. if (!priv)
  2614. return -ENODEV;
  2615. msi_config = priv->msi_config;
  2616. if (!msi_config) {
  2617. icnss_pr_err("MSI is not supported.\n");
  2618. return -EINVAL;
  2619. }
  2620. for (idx = 0; idx < msi_config->total_users; idx++) {
  2621. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2622. *num_vectors = msi_config->users[idx].num_vectors;
  2623. *user_base_data = msi_config->users[idx].base_vector
  2624. + priv->msi_base_data;
  2625. *base_vector = msi_config->users[idx].base_vector;
  2626. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2627. user_name, *num_vectors, *user_base_data,
  2628. *base_vector);
  2629. return 0;
  2630. }
  2631. }
  2632. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2633. return -EINVAL;
  2634. }
  2635. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2636. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2637. {
  2638. struct icnss_priv *priv = dev_get_drvdata(dev);
  2639. int irq_num;
  2640. irq_num = priv->srng_irqs[vector];
  2641. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2642. irq_num, vector);
  2643. return irq_num;
  2644. }
  2645. EXPORT_SYMBOL(icnss_get_msi_irq);
  2646. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2647. u32 *msi_addr_high)
  2648. {
  2649. struct icnss_priv *priv = dev_get_drvdata(dev);
  2650. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2651. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2652. }
  2653. EXPORT_SYMBOL(icnss_get_msi_address);
  2654. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2655. irqreturn_t (*handler)(int, void *),
  2656. unsigned long flags, const char *name, void *ctx)
  2657. {
  2658. int ret = 0;
  2659. unsigned int irq;
  2660. struct ce_irq_list *irq_entry;
  2661. struct icnss_priv *priv = dev_get_drvdata(dev);
  2662. if (!priv || !priv->pdev) {
  2663. ret = -ENODEV;
  2664. goto out;
  2665. }
  2666. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2667. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2668. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2669. ret = -EINVAL;
  2670. goto out;
  2671. }
  2672. irq = priv->ce_irqs[ce_id];
  2673. irq_entry = &priv->ce_irq_list[ce_id];
  2674. if (irq_entry->handler || irq_entry->irq) {
  2675. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2676. irq, ce_id);
  2677. ret = -EEXIST;
  2678. goto out;
  2679. }
  2680. ret = request_irq(irq, handler, flags, name, ctx);
  2681. if (ret) {
  2682. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2683. irq, ce_id, ret);
  2684. goto out;
  2685. }
  2686. irq_entry->irq = irq;
  2687. irq_entry->handler = handler;
  2688. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2689. penv->stats.ce_irqs[ce_id].request++;
  2690. out:
  2691. return ret;
  2692. }
  2693. EXPORT_SYMBOL(icnss_ce_request_irq);
  2694. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2695. {
  2696. int ret = 0;
  2697. unsigned int irq;
  2698. struct ce_irq_list *irq_entry;
  2699. if (!penv || !penv->pdev || !dev) {
  2700. ret = -ENODEV;
  2701. goto out;
  2702. }
  2703. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2704. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2705. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2706. ret = -EINVAL;
  2707. goto out;
  2708. }
  2709. irq = penv->ce_irqs[ce_id];
  2710. irq_entry = &penv->ce_irq_list[ce_id];
  2711. if (!irq_entry->handler || !irq_entry->irq) {
  2712. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2713. ret = -EEXIST;
  2714. goto out;
  2715. }
  2716. free_irq(irq, ctx);
  2717. irq_entry->irq = 0;
  2718. irq_entry->handler = NULL;
  2719. penv->stats.ce_irqs[ce_id].free++;
  2720. out:
  2721. return ret;
  2722. }
  2723. EXPORT_SYMBOL(icnss_ce_free_irq);
  2724. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2725. {
  2726. unsigned int irq;
  2727. if (!penv || !penv->pdev || !dev) {
  2728. icnss_pr_err("Platform driver not initialized\n");
  2729. return;
  2730. }
  2731. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2732. penv->state);
  2733. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2734. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2735. return;
  2736. }
  2737. penv->stats.ce_irqs[ce_id].enable++;
  2738. irq = penv->ce_irqs[ce_id];
  2739. enable_irq(irq);
  2740. }
  2741. EXPORT_SYMBOL(icnss_enable_irq);
  2742. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2743. {
  2744. unsigned int irq;
  2745. if (!penv || !penv->pdev || !dev) {
  2746. icnss_pr_err("Platform driver not initialized\n");
  2747. return;
  2748. }
  2749. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2750. penv->state);
  2751. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2752. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2753. ce_id);
  2754. return;
  2755. }
  2756. irq = penv->ce_irqs[ce_id];
  2757. disable_irq(irq);
  2758. penv->stats.ce_irqs[ce_id].disable++;
  2759. }
  2760. EXPORT_SYMBOL(icnss_disable_irq);
  2761. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2762. {
  2763. char *fw_build_timestamp = NULL;
  2764. struct icnss_priv *priv = dev_get_drvdata(dev);
  2765. if (!priv) {
  2766. icnss_pr_err("Platform driver not initialized\n");
  2767. return -EINVAL;
  2768. }
  2769. info->v_addr = priv->mem_base_va;
  2770. info->p_addr = priv->mem_base_pa;
  2771. info->chip_id = priv->chip_info.chip_id;
  2772. info->chip_family = priv->chip_info.chip_family;
  2773. info->board_id = priv->board_id;
  2774. info->soc_id = priv->soc_id;
  2775. info->fw_version = priv->fw_version_info.fw_version;
  2776. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2777. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2778. strlcpy(info->fw_build_timestamp,
  2779. priv->fw_version_info.fw_build_timestamp,
  2780. WLFW_MAX_TIMESTAMP_LEN + 1);
  2781. strlcpy(info->fw_build_id, priv->fw_build_id,
  2782. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2783. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2784. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2785. info->phy_qam_cap = priv->phy_qam_cap;
  2786. memcpy(&info->dev_mem_info, &priv->dev_mem_info,
  2787. sizeof(info->dev_mem_info));
  2788. return 0;
  2789. }
  2790. EXPORT_SYMBOL(icnss_get_soc_info);
  2791. int icnss_get_mhi_state(struct device *dev)
  2792. {
  2793. struct icnss_priv *priv = dev_get_drvdata(dev);
  2794. if (!priv) {
  2795. icnss_pr_err("Platform driver not initialized\n");
  2796. return -EINVAL;
  2797. }
  2798. if (!priv->mhi_state_info_va)
  2799. return -ENOMEM;
  2800. return ioread32(priv->mhi_state_info_va);
  2801. }
  2802. EXPORT_SYMBOL(icnss_get_mhi_state);
  2803. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2804. {
  2805. int ret;
  2806. struct icnss_priv *priv;
  2807. if (!dev)
  2808. return -ENODEV;
  2809. priv = dev_get_drvdata(dev);
  2810. if (!priv) {
  2811. icnss_pr_err("Platform driver not initialized\n");
  2812. return -EINVAL;
  2813. }
  2814. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2815. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2816. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2817. priv->state);
  2818. return -EINVAL;
  2819. }
  2820. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2821. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2822. if (ret)
  2823. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2824. ret, fw_log_mode);
  2825. return ret;
  2826. }
  2827. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2828. int icnss_force_wake_request(struct device *dev)
  2829. {
  2830. struct icnss_priv *priv;
  2831. if (!dev)
  2832. return -ENODEV;
  2833. priv = dev_get_drvdata(dev);
  2834. if (!priv) {
  2835. icnss_pr_err("Platform driver not initialized\n");
  2836. return -EINVAL;
  2837. }
  2838. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2839. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2840. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2841. priv->state);
  2842. return -EINVAL;
  2843. }
  2844. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2845. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2846. atomic_read(&priv->soc_wake_ref_count));
  2847. return 0;
  2848. }
  2849. icnss_pr_soc_wake("Calling SOC Wake request");
  2850. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2851. 0, NULL);
  2852. return 0;
  2853. }
  2854. EXPORT_SYMBOL(icnss_force_wake_request);
  2855. int icnss_force_wake_release(struct device *dev)
  2856. {
  2857. struct icnss_priv *priv;
  2858. if (!dev)
  2859. return -ENODEV;
  2860. priv = dev_get_drvdata(dev);
  2861. if (!priv) {
  2862. icnss_pr_err("Platform driver not initialized\n");
  2863. return -EINVAL;
  2864. }
  2865. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2866. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2867. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2868. priv->state);
  2869. return -EINVAL;
  2870. }
  2871. icnss_pr_soc_wake("Calling SOC Wake response");
  2872. if (atomic_read(&priv->soc_wake_ref_count) &&
  2873. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2874. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2875. atomic_read(&priv->soc_wake_ref_count));
  2876. return 0;
  2877. }
  2878. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2879. 0, NULL);
  2880. return 0;
  2881. }
  2882. EXPORT_SYMBOL(icnss_force_wake_release);
  2883. int icnss_is_device_awake(struct device *dev)
  2884. {
  2885. struct icnss_priv *priv = dev_get_drvdata(dev);
  2886. if (!priv) {
  2887. icnss_pr_err("Platform driver not initialized\n");
  2888. return -EINVAL;
  2889. }
  2890. return atomic_read(&priv->soc_wake_ref_count);
  2891. }
  2892. EXPORT_SYMBOL(icnss_is_device_awake);
  2893. int icnss_is_pci_ep_awake(struct device *dev)
  2894. {
  2895. struct icnss_priv *priv = dev_get_drvdata(dev);
  2896. if (!priv) {
  2897. icnss_pr_err("Platform driver not initialized\n");
  2898. return -EINVAL;
  2899. }
  2900. if (!priv->mhi_state_info_va)
  2901. return -ENOMEM;
  2902. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2903. }
  2904. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2905. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2906. uint32_t mem_type, uint32_t data_len,
  2907. uint8_t *output)
  2908. {
  2909. int ret = 0;
  2910. struct icnss_priv *priv = dev_get_drvdata(dev);
  2911. if (priv->magic != ICNSS_MAGIC) {
  2912. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2913. dev, priv, priv->magic);
  2914. return -EINVAL;
  2915. }
  2916. if (!output || data_len == 0
  2917. || data_len > WLFW_MAX_DATA_SIZE) {
  2918. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2919. output, data_len);
  2920. ret = -EINVAL;
  2921. goto out;
  2922. }
  2923. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2924. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2925. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2926. priv->state);
  2927. ret = -EINVAL;
  2928. goto out;
  2929. }
  2930. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2931. data_len, output);
  2932. out:
  2933. return ret;
  2934. }
  2935. EXPORT_SYMBOL(icnss_athdiag_read);
  2936. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2937. uint32_t mem_type, uint32_t data_len,
  2938. uint8_t *input)
  2939. {
  2940. int ret = 0;
  2941. struct icnss_priv *priv = dev_get_drvdata(dev);
  2942. if (priv->magic != ICNSS_MAGIC) {
  2943. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2944. dev, priv, priv->magic);
  2945. return -EINVAL;
  2946. }
  2947. if (!input || data_len == 0
  2948. || data_len > WLFW_MAX_DATA_SIZE) {
  2949. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2950. input, data_len);
  2951. ret = -EINVAL;
  2952. goto out;
  2953. }
  2954. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2955. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2956. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2957. priv->state);
  2958. ret = -EINVAL;
  2959. goto out;
  2960. }
  2961. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2962. data_len, input);
  2963. out:
  2964. return ret;
  2965. }
  2966. EXPORT_SYMBOL(icnss_athdiag_write);
  2967. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2968. enum icnss_driver_mode mode,
  2969. const char *host_version)
  2970. {
  2971. struct icnss_priv *priv = dev_get_drvdata(dev);
  2972. int temp = 0, ret = 0;
  2973. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2974. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2975. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2976. priv->state);
  2977. return -EINVAL;
  2978. }
  2979. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2980. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2981. priv->state);
  2982. return -EINVAL;
  2983. }
  2984. if (priv->wpss_supported &&
  2985. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2986. icnss_setup_dms_mac(priv);
  2987. if (priv->device_id == WCN6750_DEVICE_ID) {
  2988. if (!icnss_get_temperature(priv, &temp)) {
  2989. icnss_pr_dbg("Temperature: %d\n", temp);
  2990. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2991. icnss_set_wlan_en_delay(priv);
  2992. }
  2993. }
  2994. if (priv->device_id == WCN6450_DEVICE_ID)
  2995. icnss_hw_power_off(priv);
  2996. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2997. if (priv->device_id == WCN6450_DEVICE_ID)
  2998. icnss_hw_power_on(priv);
  2999. return ret;
  3000. }
  3001. EXPORT_SYMBOL(icnss_wlan_enable);
  3002. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  3003. {
  3004. struct icnss_priv *priv = dev_get_drvdata(dev);
  3005. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  3006. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  3007. priv->state);
  3008. return 0;
  3009. }
  3010. return icnss_send_wlan_disable_to_fw(priv);
  3011. }
  3012. EXPORT_SYMBOL(icnss_wlan_disable);
  3013. bool icnss_is_qmi_disable(struct device *dev)
  3014. {
  3015. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  3016. }
  3017. EXPORT_SYMBOL(icnss_is_qmi_disable);
  3018. int icnss_get_ce_id(struct device *dev, int irq)
  3019. {
  3020. int i;
  3021. if (!penv || !penv->pdev || !dev)
  3022. return -ENODEV;
  3023. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3024. if (penv->ce_irqs[i] == irq)
  3025. return i;
  3026. }
  3027. icnss_pr_err("No matching CE id for irq %d\n", irq);
  3028. return -EINVAL;
  3029. }
  3030. EXPORT_SYMBOL(icnss_get_ce_id);
  3031. int icnss_get_irq(struct device *dev, int ce_id)
  3032. {
  3033. int irq;
  3034. if (!penv || !penv->pdev || !dev)
  3035. return -ENODEV;
  3036. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3037. return -EINVAL;
  3038. irq = penv->ce_irqs[ce_id];
  3039. return irq;
  3040. }
  3041. EXPORT_SYMBOL(icnss_get_irq);
  3042. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3043. {
  3044. struct icnss_priv *priv = dev_get_drvdata(dev);
  3045. if (!priv) {
  3046. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3047. return NULL;
  3048. }
  3049. return priv->iommu_domain;
  3050. }
  3051. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3052. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3053. int icnss_iommu_map(struct iommu_domain *domain,
  3054. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3055. {
  3056. return iommu_map(domain, iova, paddr, size, prot);
  3057. }
  3058. #else
  3059. int icnss_iommu_map(struct iommu_domain *domain,
  3060. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3061. {
  3062. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3063. }
  3064. #endif
  3065. int icnss_smmu_map(struct device *dev,
  3066. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3067. {
  3068. struct icnss_priv *priv = dev_get_drvdata(dev);
  3069. int flag = IOMMU_READ | IOMMU_WRITE;
  3070. bool dma_coherent = false;
  3071. unsigned long iova;
  3072. int prop_len = 0;
  3073. size_t len;
  3074. int ret = 0;
  3075. if (!priv) {
  3076. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3077. dev, priv);
  3078. return -EINVAL;
  3079. }
  3080. if (!iova_addr) {
  3081. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3082. &paddr, size);
  3083. return -EINVAL;
  3084. }
  3085. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3086. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3087. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3088. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3089. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3090. iova,
  3091. &priv->smmu_iova_ipa_start,
  3092. priv->smmu_iova_ipa_len);
  3093. return -ENOMEM;
  3094. }
  3095. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3096. icnss_pr_dbg("dma-coherent is %s\n",
  3097. dma_coherent ? "enabled" : "disabled");
  3098. if (dma_coherent)
  3099. flag |= IOMMU_CACHE;
  3100. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3101. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3102. rounddown(paddr, PAGE_SIZE), len,
  3103. flag);
  3104. if (ret) {
  3105. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3106. return ret;
  3107. }
  3108. priv->smmu_iova_ipa_current = iova + len;
  3109. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3110. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3111. return 0;
  3112. }
  3113. EXPORT_SYMBOL(icnss_smmu_map);
  3114. int icnss_smmu_unmap(struct device *dev,
  3115. uint32_t iova_addr, size_t size)
  3116. {
  3117. struct icnss_priv *priv = dev_get_drvdata(dev);
  3118. unsigned long iova;
  3119. size_t len, unmapped_len;
  3120. if (!priv) {
  3121. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3122. dev, priv);
  3123. return -EINVAL;
  3124. }
  3125. if (!iova_addr) {
  3126. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3127. size);
  3128. return -EINVAL;
  3129. }
  3130. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3131. PAGE_SIZE);
  3132. iova = rounddown(iova_addr, PAGE_SIZE);
  3133. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3134. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3135. iova,
  3136. &priv->smmu_iova_ipa_start,
  3137. priv->smmu_iova_ipa_len);
  3138. return -ENOMEM;
  3139. }
  3140. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3141. iova, len);
  3142. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3143. if (unmapped_len != len) {
  3144. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3145. return -EINVAL;
  3146. }
  3147. priv->smmu_iova_ipa_current = iova;
  3148. return 0;
  3149. }
  3150. EXPORT_SYMBOL(icnss_smmu_unmap);
  3151. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3152. {
  3153. return socinfo_get_serial_number();
  3154. }
  3155. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3156. int icnss_trigger_recovery(struct device *dev)
  3157. {
  3158. int ret = 0;
  3159. struct icnss_priv *priv = dev_get_drvdata(dev);
  3160. if (priv->magic != ICNSS_MAGIC) {
  3161. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3162. ret = -EINVAL;
  3163. goto out;
  3164. }
  3165. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3166. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3167. priv->state);
  3168. ret = -EPERM;
  3169. goto out;
  3170. }
  3171. if (priv->wpss_supported) {
  3172. icnss_pr_vdbg("Initiate Root PD restart");
  3173. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3174. ICNSS_SMP2P_OUT_POWER_SAVE);
  3175. if (!ret)
  3176. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3177. return ret;
  3178. }
  3179. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3180. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3181. priv->state);
  3182. ret = -EOPNOTSUPP;
  3183. goto out;
  3184. }
  3185. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3186. priv->state);
  3187. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3188. if (!ret)
  3189. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3190. out:
  3191. return ret;
  3192. }
  3193. EXPORT_SYMBOL(icnss_trigger_recovery);
  3194. int icnss_idle_shutdown(struct device *dev)
  3195. {
  3196. struct icnss_priv *priv = dev_get_drvdata(dev);
  3197. if (!priv) {
  3198. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3199. return -EINVAL;
  3200. }
  3201. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3202. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3203. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3204. return -EBUSY;
  3205. }
  3206. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3207. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3208. }
  3209. EXPORT_SYMBOL(icnss_idle_shutdown);
  3210. int icnss_idle_restart(struct device *dev)
  3211. {
  3212. struct icnss_priv *priv = dev_get_drvdata(dev);
  3213. if (!priv) {
  3214. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3215. return -EINVAL;
  3216. }
  3217. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3218. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3219. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3220. return -EBUSY;
  3221. }
  3222. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3223. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3224. }
  3225. EXPORT_SYMBOL(icnss_idle_restart);
  3226. int icnss_exit_power_save(struct device *dev)
  3227. {
  3228. struct icnss_priv *priv = dev_get_drvdata(dev);
  3229. icnss_pr_vdbg("Calling Exit Power Save\n");
  3230. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3231. !test_bit(ICNSS_MODE_ON, &priv->state))
  3232. return 0;
  3233. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3234. ICNSS_SMP2P_OUT_POWER_SAVE);
  3235. }
  3236. EXPORT_SYMBOL(icnss_exit_power_save);
  3237. int icnss_prevent_l1(struct device *dev)
  3238. {
  3239. struct icnss_priv *priv = dev_get_drvdata(dev);
  3240. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3241. !test_bit(ICNSS_MODE_ON, &priv->state))
  3242. return 0;
  3243. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3244. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3245. }
  3246. EXPORT_SYMBOL(icnss_prevent_l1);
  3247. void icnss_allow_l1(struct device *dev)
  3248. {
  3249. struct icnss_priv *priv = dev_get_drvdata(dev);
  3250. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3251. !test_bit(ICNSS_MODE_ON, &priv->state))
  3252. return;
  3253. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3254. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3255. }
  3256. EXPORT_SYMBOL(icnss_allow_l1);
  3257. void icnss_allow_recursive_recovery(struct device *dev)
  3258. {
  3259. struct icnss_priv *priv = dev_get_drvdata(dev);
  3260. priv->allow_recursive_recovery = true;
  3261. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3262. }
  3263. void icnss_disallow_recursive_recovery(struct device *dev)
  3264. {
  3265. struct icnss_priv *priv = dev_get_drvdata(dev);
  3266. priv->allow_recursive_recovery = false;
  3267. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3268. }
  3269. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3270. {
  3271. struct kobject *icnss_kobject;
  3272. int ret = 0;
  3273. atomic_set(&priv->is_shutdown, false);
  3274. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3275. if (!icnss_kobject) {
  3276. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3277. return -EINVAL;
  3278. }
  3279. priv->icnss_kobject = icnss_kobject;
  3280. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3281. if (ret) {
  3282. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3283. return ret;
  3284. }
  3285. return ret;
  3286. }
  3287. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3288. {
  3289. struct kobject *icnss_kobject;
  3290. icnss_kobject = priv->icnss_kobject;
  3291. if (icnss_kobject)
  3292. kobject_put(icnss_kobject);
  3293. }
  3294. static ssize_t qdss_tr_start_store(struct device *dev,
  3295. struct device_attribute *attr,
  3296. const char *buf, size_t count)
  3297. {
  3298. struct icnss_priv *priv = dev_get_drvdata(dev);
  3299. wlfw_qdss_trace_start(priv);
  3300. icnss_pr_dbg("Received QDSS start command\n");
  3301. return count;
  3302. }
  3303. static ssize_t qdss_tr_stop_store(struct device *dev,
  3304. struct device_attribute *attr,
  3305. const char *user_buf, size_t count)
  3306. {
  3307. struct icnss_priv *priv = dev_get_drvdata(dev);
  3308. u32 option = 0;
  3309. if (sscanf(user_buf, "%du", &option) != 1)
  3310. return -EINVAL;
  3311. wlfw_qdss_trace_stop(priv, option);
  3312. icnss_pr_dbg("Received QDSS stop command\n");
  3313. return count;
  3314. }
  3315. static ssize_t qdss_conf_download_store(struct device *dev,
  3316. struct device_attribute *attr,
  3317. const char *buf, size_t count)
  3318. {
  3319. struct icnss_priv *priv = dev_get_drvdata(dev);
  3320. icnss_wlfw_qdss_dnld_send_sync(priv);
  3321. icnss_pr_dbg("Received QDSS download config command\n");
  3322. return count;
  3323. }
  3324. static ssize_t hw_trc_override_store(struct device *dev,
  3325. struct device_attribute *attr,
  3326. const char *buf, size_t count)
  3327. {
  3328. struct icnss_priv *priv = dev_get_drvdata(dev);
  3329. int tmp = 0;
  3330. if (sscanf(buf, "%du", &tmp) != 1)
  3331. return -EINVAL;
  3332. priv->hw_trc_override = tmp;
  3333. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3334. return count;
  3335. }
  3336. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3337. {
  3338. struct icnss_priv *priv = icnss_get_plat_priv();
  3339. phandle rproc_phandle;
  3340. int ret;
  3341. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3342. &rproc_phandle)) {
  3343. icnss_pr_err("error reading rproc phandle\n");
  3344. return;
  3345. }
  3346. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3347. if (IS_ERR_OR_NULL(priv->rproc)) {
  3348. icnss_pr_err("rproc not found");
  3349. return;
  3350. }
  3351. ret = rproc_boot(priv->rproc);
  3352. if (ret) {
  3353. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3354. rproc_put(priv->rproc);
  3355. }
  3356. }
  3357. static ssize_t wpss_boot_store(struct device *dev,
  3358. struct device_attribute *attr,
  3359. const char *buf, size_t count)
  3360. {
  3361. struct icnss_priv *priv = dev_get_drvdata(dev);
  3362. int wpss_rproc = 0;
  3363. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3364. return count;
  3365. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3366. icnss_pr_err("Failed to read wpss rproc info");
  3367. return -EINVAL;
  3368. }
  3369. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3370. if (wpss_rproc == 1)
  3371. schedule_work(&wpss_loader);
  3372. else if (wpss_rproc == 0)
  3373. icnss_wpss_unload(priv);
  3374. return count;
  3375. }
  3376. static ssize_t wlan_en_delay_store(struct device *dev,
  3377. struct device_attribute *attr,
  3378. const char *buf, size_t count)
  3379. {
  3380. struct icnss_priv *priv = dev_get_drvdata(dev);
  3381. uint32_t wlan_en_delay = 0;
  3382. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3383. return count;
  3384. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3385. icnss_pr_err("Failed to read wlan_en_delay");
  3386. return -EINVAL;
  3387. }
  3388. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3389. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3390. return count;
  3391. }
  3392. static DEVICE_ATTR_WO(qdss_tr_start);
  3393. static DEVICE_ATTR_WO(qdss_tr_stop);
  3394. static DEVICE_ATTR_WO(qdss_conf_download);
  3395. static DEVICE_ATTR_WO(hw_trc_override);
  3396. static DEVICE_ATTR_WO(wpss_boot);
  3397. static DEVICE_ATTR_WO(wlan_en_delay);
  3398. static struct attribute *icnss_attrs[] = {
  3399. &dev_attr_qdss_tr_start.attr,
  3400. &dev_attr_qdss_tr_stop.attr,
  3401. &dev_attr_qdss_conf_download.attr,
  3402. &dev_attr_hw_trc_override.attr,
  3403. &dev_attr_wpss_boot.attr,
  3404. &dev_attr_wlan_en_delay.attr,
  3405. NULL,
  3406. };
  3407. static struct attribute_group icnss_attr_group = {
  3408. .attrs = icnss_attrs,
  3409. };
  3410. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3411. {
  3412. struct device *dev = &priv->pdev->dev;
  3413. int ret;
  3414. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3415. if (ret) {
  3416. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3417. ret);
  3418. goto out;
  3419. }
  3420. return 0;
  3421. out:
  3422. return ret;
  3423. }
  3424. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3425. {
  3426. sysfs_remove_link(kernel_kobj, "icnss");
  3427. }
  3428. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3429. union icnss_device_group_devres {
  3430. const struct attribute_group *group;
  3431. };
  3432. static void devm_icnss_group_remove(struct device *dev, void *res)
  3433. {
  3434. union icnss_device_group_devres *devres = res;
  3435. const struct attribute_group *group = devres->group;
  3436. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3437. sysfs_remove_group(&dev->kobj, group);
  3438. }
  3439. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3440. {
  3441. return ((union icnss_device_group_devres *)res) == data;
  3442. }
  3443. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3444. {
  3445. WARN_ON(devres_release(&priv->pdev->dev,
  3446. devm_icnss_group_remove, devm_icnss_group_match,
  3447. (void *)&icnss_attr_group));
  3448. }
  3449. #else
  3450. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3451. {
  3452. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3453. }
  3454. #endif
  3455. static int icnss_sysfs_create(struct icnss_priv *priv)
  3456. {
  3457. int ret = 0;
  3458. ret = devm_device_add_group(&priv->pdev->dev,
  3459. &icnss_attr_group);
  3460. if (ret) {
  3461. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3462. ret);
  3463. goto out;
  3464. }
  3465. icnss_create_sysfs_link(priv);
  3466. ret = icnss_create_shutdown_sysfs(priv);
  3467. if (ret)
  3468. goto remove_icnss_group;
  3469. return 0;
  3470. remove_icnss_group:
  3471. icnss_devm_device_remove_group(priv);
  3472. out:
  3473. return ret;
  3474. }
  3475. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3476. {
  3477. icnss_destroy_shutdown_sysfs(priv);
  3478. icnss_remove_sysfs_link(priv);
  3479. icnss_devm_device_remove_group(priv);
  3480. }
  3481. static int icnss_resource_parse(struct icnss_priv *priv)
  3482. {
  3483. int ret = 0, i = 0, irq = 0;
  3484. struct platform_device *pdev = priv->pdev;
  3485. struct device *dev = &pdev->dev;
  3486. struct resource *res;
  3487. u32 int_prop;
  3488. ret = icnss_get_vreg(priv);
  3489. if (ret) {
  3490. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3491. goto out;
  3492. }
  3493. ret = icnss_get_clk(priv);
  3494. if (ret) {
  3495. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3496. goto put_vreg;
  3497. }
  3498. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3499. ret = icnss_get_psf_info(priv);
  3500. if (ret < 0)
  3501. goto out;
  3502. priv->psf_supported = true;
  3503. }
  3504. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3505. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3506. "membase");
  3507. if (!res) {
  3508. icnss_pr_err("Memory base not found in DT\n");
  3509. ret = -EINVAL;
  3510. goto put_clk;
  3511. }
  3512. priv->mem_base_pa = res->start;
  3513. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3514. resource_size(res));
  3515. if (!priv->mem_base_va) {
  3516. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3517. &priv->mem_base_pa);
  3518. ret = -EINVAL;
  3519. goto put_clk;
  3520. }
  3521. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3522. &priv->mem_base_pa,
  3523. priv->mem_base_va);
  3524. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3525. irq = platform_get_irq(pdev, i);
  3526. if (irq < 0) {
  3527. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3528. ret = -ENODEV;
  3529. goto put_clk;
  3530. } else {
  3531. priv->ce_irqs[i] = irq;
  3532. }
  3533. }
  3534. if (of_property_read_bool(pdev->dev.of_node,
  3535. "qcom,is_low_power")) {
  3536. priv->low_power_support = true;
  3537. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3538. }
  3539. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3540. &priv->rf_subtype) == 0) {
  3541. priv->is_rf_subtype_valid = true;
  3542. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3543. }
  3544. if (of_property_read_bool(pdev->dev.of_node,
  3545. "qcom,is_slate_rfa")) {
  3546. priv->is_slate_rfa = true;
  3547. icnss_pr_err("SLATE rfa is enabled\n");
  3548. }
  3549. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3550. priv->device_id == WCN6450_DEVICE_ID) {
  3551. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3552. "msi_addr");
  3553. if (!res) {
  3554. icnss_pr_err("MSI address not found in DT\n");
  3555. ret = -EINVAL;
  3556. goto put_clk;
  3557. }
  3558. priv->msi_addr_pa = res->start;
  3559. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3560. PAGE_SIZE,
  3561. DMA_FROM_DEVICE, 0);
  3562. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3563. icnss_pr_err("MSI: failed to map msi address\n");
  3564. priv->msi_addr_iova = 0;
  3565. ret = -ENOMEM;
  3566. goto put_clk;
  3567. }
  3568. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3569. &priv->msi_addr_pa,
  3570. priv->msi_addr_iova);
  3571. ret = of_property_read_u32_index(dev->of_node,
  3572. "interrupts",
  3573. 1,
  3574. &int_prop);
  3575. if (ret) {
  3576. icnss_pr_dbg("Read interrupt prop failed");
  3577. goto put_clk;
  3578. }
  3579. priv->msi_base_data = int_prop + 32;
  3580. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3581. priv->msi_base_data, int_prop);
  3582. icnss_get_msi_assignment(priv);
  3583. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3584. irq = platform_get_irq(priv->pdev, i);
  3585. if (irq < 0) {
  3586. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3587. ret = -ENODEV;
  3588. goto put_clk;
  3589. } else {
  3590. priv->srng_irqs[i] = irq;
  3591. }
  3592. }
  3593. }
  3594. return 0;
  3595. put_clk:
  3596. icnss_put_clk(priv);
  3597. put_vreg:
  3598. icnss_put_vreg(priv);
  3599. out:
  3600. return ret;
  3601. }
  3602. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3603. {
  3604. int ret = 0;
  3605. struct platform_device *pdev = priv->pdev;
  3606. struct device *dev = &pdev->dev;
  3607. struct device_node *np = NULL;
  3608. u64 prop_size = 0;
  3609. const __be32 *addrp = NULL;
  3610. np = of_parse_phandle(dev->of_node,
  3611. "qcom,wlan-msa-fixed-region", 0);
  3612. if (np) {
  3613. addrp = of_get_address(np, 0, &prop_size, NULL);
  3614. if (!addrp) {
  3615. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3616. ret = -EINVAL;
  3617. of_node_put(np);
  3618. goto out;
  3619. }
  3620. priv->msa_pa = of_translate_address(np, addrp);
  3621. if (priv->msa_pa == OF_BAD_ADDR) {
  3622. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3623. ret = -EINVAL;
  3624. of_node_put(np);
  3625. goto out;
  3626. }
  3627. of_node_put(np);
  3628. priv->msa_va = memremap(priv->msa_pa,
  3629. (unsigned long)prop_size, MEMREMAP_WT);
  3630. if (!priv->msa_va) {
  3631. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3632. &priv->msa_pa);
  3633. ret = -EINVAL;
  3634. goto out;
  3635. }
  3636. priv->msa_mem_size = prop_size;
  3637. } else {
  3638. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3639. &priv->msa_mem_size);
  3640. if (ret || priv->msa_mem_size == 0) {
  3641. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3642. priv->msa_mem_size, ret);
  3643. goto out;
  3644. }
  3645. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3646. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3647. if (!priv->msa_va) {
  3648. icnss_pr_err("DMA alloc failed for MSA\n");
  3649. ret = -ENOMEM;
  3650. goto out;
  3651. }
  3652. }
  3653. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3654. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3655. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3656. "qcom,fw-prefix");
  3657. return 0;
  3658. out:
  3659. return ret;
  3660. }
  3661. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3662. struct device *dev, unsigned long iova,
  3663. int flags, void *handler_token)
  3664. {
  3665. struct icnss_priv *priv = handler_token;
  3666. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3667. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3668. if (!priv) {
  3669. icnss_pr_err("priv is NULL\n");
  3670. return -ENODEV;
  3671. }
  3672. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3673. fw_down_data.crashed = true;
  3674. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3675. &fw_down_data);
  3676. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3677. &fw_down_data);
  3678. }
  3679. icnss_trigger_recovery(&priv->pdev->dev);
  3680. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3681. return -ENOSYS;
  3682. }
  3683. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3684. {
  3685. int ret = 0;
  3686. struct platform_device *pdev = priv->pdev;
  3687. struct device *dev = &pdev->dev;
  3688. const char *iommu_dma_type;
  3689. struct resource *res;
  3690. u32 addr_win[2];
  3691. ret = of_property_read_u32_array(dev->of_node,
  3692. "qcom,iommu-dma-addr-pool",
  3693. addr_win,
  3694. ARRAY_SIZE(addr_win));
  3695. if (ret) {
  3696. icnss_pr_err("SMMU IOVA base not found\n");
  3697. } else {
  3698. priv->smmu_iova_start = addr_win[0];
  3699. priv->smmu_iova_len = addr_win[1];
  3700. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3701. &priv->smmu_iova_start,
  3702. priv->smmu_iova_len);
  3703. priv->iommu_domain =
  3704. iommu_get_domain_for_dev(&pdev->dev);
  3705. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3706. &iommu_dma_type);
  3707. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3708. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3709. priv->smmu_s1_enable = true;
  3710. if (priv->device_id == WCN6750_DEVICE_ID ||
  3711. priv->device_id == WCN6450_DEVICE_ID)
  3712. iommu_set_fault_handler(priv->iommu_domain,
  3713. icnss_smmu_fault_handler,
  3714. priv);
  3715. }
  3716. res = platform_get_resource_byname(pdev,
  3717. IORESOURCE_MEM,
  3718. "smmu_iova_ipa");
  3719. if (!res) {
  3720. icnss_pr_err("SMMU IOVA IPA not found\n");
  3721. } else {
  3722. priv->smmu_iova_ipa_start = res->start;
  3723. priv->smmu_iova_ipa_current = res->start;
  3724. priv->smmu_iova_ipa_len = resource_size(res);
  3725. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3726. &priv->smmu_iova_ipa_start,
  3727. priv->smmu_iova_ipa_len);
  3728. }
  3729. }
  3730. return 0;
  3731. }
  3732. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3733. {
  3734. if (!priv)
  3735. return -ENODEV;
  3736. if (!priv->smmu_iova_len)
  3737. return -EINVAL;
  3738. *addr = priv->smmu_iova_start;
  3739. *size = priv->smmu_iova_len;
  3740. return 0;
  3741. }
  3742. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3743. {
  3744. if (!priv)
  3745. return -ENODEV;
  3746. if (!priv->smmu_iova_ipa_len)
  3747. return -EINVAL;
  3748. *addr = priv->smmu_iova_ipa_start;
  3749. *size = priv->smmu_iova_ipa_len;
  3750. return 0;
  3751. }
  3752. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3753. char *name)
  3754. {
  3755. if (!priv)
  3756. return;
  3757. if (!priv->use_prefix_path) {
  3758. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3759. return;
  3760. }
  3761. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3762. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3763. ADRASTEA_PATH_PREFIX "%s", name);
  3764. else if (priv->device_id == WCN6750_DEVICE_ID)
  3765. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3766. QCA6750_PATH_PREFIX "%s", name);
  3767. else if (priv->device_id == WCN6450_DEVICE_ID)
  3768. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3769. WCN6450_PATH_PREFIX "%s", name);
  3770. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3771. }
  3772. static const struct platform_device_id icnss_platform_id_table[] = {
  3773. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3774. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3775. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3776. { },
  3777. };
  3778. static const struct of_device_id icnss_dt_match[] = {
  3779. {
  3780. .compatible = "qcom,wcn6750",
  3781. .data = (void *)&icnss_platform_id_table[0]},
  3782. {
  3783. .compatible = "qcom,icnss",
  3784. .data = (void *)&icnss_platform_id_table[1]},
  3785. {
  3786. .compatible = "qcom,wcn6450",
  3787. .data = (void *)&icnss_platform_id_table[2]},
  3788. { },
  3789. };
  3790. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3791. static void icnss_init_control_params(struct icnss_priv *priv)
  3792. {
  3793. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3794. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3795. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3796. if (priv->device_id == WCN6750_DEVICE_ID ||
  3797. priv->device_id == WCN6450_DEVICE_ID ||
  3798. of_property_read_bool(priv->pdev->dev.of_node,
  3799. "wpss-support-enable"))
  3800. priv->wpss_supported = true;
  3801. if (of_property_read_bool(priv->pdev->dev.of_node,
  3802. "bdf-download-support"))
  3803. priv->bdf_download_support = true;
  3804. if (of_property_read_bool(priv->pdev->dev.of_node,
  3805. "rproc-fw-download"))
  3806. priv->rproc_fw_download = true;
  3807. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3808. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3809. }
  3810. static void icnss_read_device_configs(struct icnss_priv *priv)
  3811. {
  3812. if (of_property_read_bool(priv->pdev->dev.of_node,
  3813. "wlan-ipa-disabled")) {
  3814. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3815. }
  3816. if (of_property_read_bool(priv->pdev->dev.of_node,
  3817. "qcom,wpss-self-recovery"))
  3818. priv->wpss_self_recovery_enabled = true;
  3819. }
  3820. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3821. {
  3822. pm_runtime_get_sync(&priv->pdev->dev);
  3823. pm_runtime_forbid(&priv->pdev->dev);
  3824. pm_runtime_set_active(&priv->pdev->dev);
  3825. pm_runtime_enable(&priv->pdev->dev);
  3826. }
  3827. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3828. {
  3829. pm_runtime_disable(&priv->pdev->dev);
  3830. pm_runtime_allow(&priv->pdev->dev);
  3831. pm_runtime_put_sync(&priv->pdev->dev);
  3832. }
  3833. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3834. {
  3835. return of_property_read_bool(priv->pdev->dev.of_node,
  3836. "use-nv-mac");
  3837. }
  3838. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3839. {
  3840. struct icnss_subsys_restart_level_data *restart_level_data;
  3841. icnss_pr_info("rproc name: %s(%zu) recovery disable: %d",
  3842. rproc->name, strlen(rproc->name),
  3843. rproc->recovery_disabled);
  3844. if (strnstr(rproc->name, "wpss", strlen(rproc->name))) {
  3845. restart_level_data = kzalloc(sizeof(*restart_level_data),
  3846. GFP_ATOMIC);
  3847. if (!restart_level_data)
  3848. return;
  3849. if (rproc->recovery_disabled)
  3850. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3851. else
  3852. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3853. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3854. 0, restart_level_data);
  3855. }
  3856. }
  3857. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3858. static void icnss_initialize_mem_pool(unsigned long device_id)
  3859. {
  3860. cnss_initialize_prealloc_pool(device_id);
  3861. }
  3862. static void icnss_deinitialize_mem_pool(void)
  3863. {
  3864. cnss_deinitialize_prealloc_pool();
  3865. }
  3866. #else
  3867. static void icnss_initialize_mem_pool(unsigned long device_id)
  3868. {
  3869. }
  3870. static void icnss_deinitialize_mem_pool(void)
  3871. {
  3872. }
  3873. #endif
  3874. static void register_rproc_restart_level_notifier(void)
  3875. {
  3876. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3877. }
  3878. static void unregister_rproc_restart_level_notifier(void)
  3879. {
  3880. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3881. }
  3882. static int icnss_probe(struct platform_device *pdev)
  3883. {
  3884. int ret = 0;
  3885. struct device *dev = &pdev->dev;
  3886. struct icnss_priv *priv;
  3887. const struct of_device_id *of_id;
  3888. const struct platform_device_id *device_id;
  3889. if (dev_get_drvdata(dev)) {
  3890. icnss_pr_err("Driver is already initialized\n");
  3891. return -EEXIST;
  3892. }
  3893. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3894. if (!of_id || !of_id->data) {
  3895. icnss_pr_err("Failed to find of match device!\n");
  3896. ret = -ENODEV;
  3897. goto out_reset_drvdata;
  3898. }
  3899. device_id = of_id->data;
  3900. icnss_pr_dbg("Platform driver probe\n");
  3901. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3902. if (!priv)
  3903. return -ENOMEM;
  3904. priv->magic = ICNSS_MAGIC;
  3905. dev_set_drvdata(dev, priv);
  3906. priv->pdev = pdev;
  3907. priv->device_id = device_id->driver_data;
  3908. priv->is_chain1_supported = true;
  3909. INIT_LIST_HEAD(&priv->vreg_list);
  3910. INIT_LIST_HEAD(&priv->clk_list);
  3911. icnss_allow_recursive_recovery(dev);
  3912. icnss_initialize_mem_pool(priv->device_id);
  3913. icnss_init_control_params(priv);
  3914. icnss_read_device_configs(priv);
  3915. ret = icnss_resource_parse(priv);
  3916. if (ret)
  3917. goto out_reset_drvdata;
  3918. ret = icnss_msa_dt_parse(priv);
  3919. if (ret)
  3920. goto out_free_resources;
  3921. ret = icnss_smmu_dt_parse(priv);
  3922. if (ret)
  3923. goto out_free_resources;
  3924. spin_lock_init(&priv->event_lock);
  3925. spin_lock_init(&priv->on_off_lock);
  3926. spin_lock_init(&priv->soc_wake_msg_lock);
  3927. mutex_init(&priv->dev_lock);
  3928. mutex_init(&priv->tcdev_lock);
  3929. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3930. if (!priv->event_wq) {
  3931. icnss_pr_err("Workqueue creation failed\n");
  3932. ret = -EFAULT;
  3933. goto smmu_cleanup;
  3934. }
  3935. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3936. INIT_LIST_HEAD(&priv->event_list);
  3937. if (priv->is_slate_rfa)
  3938. init_completion(&priv->slate_boot_complete);
  3939. ret = icnss_register_fw_service(priv);
  3940. if (ret < 0) {
  3941. icnss_pr_err("fw service registration failed: %d\n", ret);
  3942. goto out_destroy_wq;
  3943. }
  3944. icnss_power_misc_params_init(priv);
  3945. icnss_enable_recovery(priv);
  3946. icnss_debugfs_create(priv);
  3947. icnss_sysfs_create(priv);
  3948. ret = device_init_wakeup(&priv->pdev->dev, true);
  3949. if (ret)
  3950. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3951. ret);
  3952. icnss_set_plat_priv(priv);
  3953. init_completion(&priv->unblock_shutdown);
  3954. if (priv->device_id == WCN6750_DEVICE_ID ||
  3955. priv->device_id == WCN6450_DEVICE_ID) {
  3956. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3957. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3958. if (!priv->soc_wake_wq) {
  3959. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3960. ret = -EFAULT;
  3961. goto out_unregister_fw_service;
  3962. }
  3963. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3964. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3965. ret = icnss_genl_init();
  3966. if (ret < 0)
  3967. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3968. init_completion(&priv->smp2p_soc_wake_wait);
  3969. icnss_runtime_pm_init(priv);
  3970. icnss_aop_interface_init(priv);
  3971. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3972. priv->bdf_download_support = true;
  3973. register_rproc_restart_level_notifier();
  3974. }
  3975. if (priv->wpss_supported) {
  3976. ret = icnss_dms_init(priv);
  3977. if (ret)
  3978. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3979. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3980. icnss_pr_dbg("NV MAC feature is %s\n",
  3981. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3982. }
  3983. if (priv->wpss_supported || priv->rproc_fw_download)
  3984. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3985. timer_setup(&priv->recovery_timer,
  3986. icnss_recovery_timeout_hdlr, 0);
  3987. if (priv->wpss_self_recovery_enabled) {
  3988. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3989. timer_setup(&priv->wpss_ssr_timer,
  3990. icnss_wpss_ssr_timeout_hdlr, 0);
  3991. }
  3992. icnss_register_ims_service(priv);
  3993. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3994. icnss_pr_info("Platform driver probed successfully\n");
  3995. return 0;
  3996. out_unregister_fw_service:
  3997. icnss_unregister_fw_service(priv);
  3998. out_destroy_wq:
  3999. destroy_workqueue(priv->event_wq);
  4000. smmu_cleanup:
  4001. priv->iommu_domain = NULL;
  4002. out_free_resources:
  4003. icnss_put_resources(priv);
  4004. out_reset_drvdata:
  4005. icnss_deinitialize_mem_pool();
  4006. dev_set_drvdata(dev, NULL);
  4007. return ret;
  4008. }
  4009. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  4010. {
  4011. if (IS_ERR_OR_NULL(ramdump_info))
  4012. return;
  4013. device_unregister(ramdump_info->dev);
  4014. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  4015. kfree(ramdump_info);
  4016. }
  4017. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4018. {
  4019. if (priv->batt_psy)
  4020. power_supply_put(penv->batt_psy);
  4021. if (priv->psf_supported) {
  4022. flush_workqueue(priv->soc_update_wq);
  4023. destroy_workqueue(priv->soc_update_wq);
  4024. power_supply_unreg_notifier(&priv->psf_nb);
  4025. }
  4026. }
  4027. static int icnss_remove(struct platform_device *pdev)
  4028. {
  4029. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4030. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4031. del_timer(&priv->recovery_timer);
  4032. if (priv->wpss_self_recovery_enabled)
  4033. del_timer(&priv->wpss_ssr_timer);
  4034. device_init_wakeup(&priv->pdev->dev, false);
  4035. icnss_unregister_ims_service(priv);
  4036. icnss_debugfs_destroy(priv);
  4037. icnss_unregister_power_supply_notifier(penv);
  4038. icnss_sysfs_destroy(priv);
  4039. complete_all(&priv->unblock_shutdown);
  4040. if (priv->is_slate_rfa) {
  4041. complete(&priv->slate_boot_complete);
  4042. icnss_slate_ssr_unregister_notifier(priv);
  4043. icnss_unregister_slate_event_notifier(priv);
  4044. }
  4045. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4046. if (priv->wpss_supported) {
  4047. icnss_dms_deinit(priv);
  4048. icnss_wpss_early_ssr_unregister_notifier(priv);
  4049. icnss_wpss_ssr_unregister_notifier(priv);
  4050. } else {
  4051. icnss_modem_ssr_unregister_notifier(priv);
  4052. icnss_pdr_unregister_notifier(priv);
  4053. }
  4054. if (priv->device_id == WCN6750_DEVICE_ID ||
  4055. priv->device_id == WCN6450_DEVICE_ID) {
  4056. icnss_genl_exit();
  4057. icnss_runtime_pm_deinit(priv);
  4058. unregister_rproc_restart_level_notifier();
  4059. complete_all(&priv->smp2p_soc_wake_wait);
  4060. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4061. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4062. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4063. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4064. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4065. if (priv->soc_wake_wq)
  4066. destroy_workqueue(priv->soc_wake_wq);
  4067. icnss_aop_interface_deinit(priv);
  4068. }
  4069. class_destroy(priv->icnss_ramdump_class);
  4070. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4071. icnss_unregister_fw_service(priv);
  4072. if (priv->event_wq)
  4073. destroy_workqueue(priv->event_wq);
  4074. priv->iommu_domain = NULL;
  4075. icnss_hw_power_off(priv);
  4076. icnss_put_resources(priv);
  4077. icnss_deinitialize_mem_pool();
  4078. dev_set_drvdata(&pdev->dev, NULL);
  4079. return 0;
  4080. }
  4081. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4082. {
  4083. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4084. /* This is to handle if slate is not up and modem SSR is triggered */
  4085. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4086. return;
  4087. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4088. ICNSS_ASSERT(0);
  4089. }
  4090. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4091. {
  4092. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4093. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4094. priv->state);
  4095. schedule_work(&wpss_ssr_work);
  4096. }
  4097. #ifdef CONFIG_PM_SLEEP
  4098. static int icnss_pm_suspend(struct device *dev)
  4099. {
  4100. struct icnss_priv *priv = dev_get_drvdata(dev);
  4101. int ret = 0;
  4102. if (priv->magic != ICNSS_MAGIC) {
  4103. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4104. dev, priv, priv->magic);
  4105. return -EINVAL;
  4106. }
  4107. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4108. if (!priv->ops || !priv->ops->pm_suspend ||
  4109. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4110. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4111. return 0;
  4112. ret = priv->ops->pm_suspend(dev);
  4113. if (ret == 0) {
  4114. if (priv->device_id == WCN6750_DEVICE_ID ||
  4115. priv->device_id == WCN6450_DEVICE_ID) {
  4116. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4117. !test_bit(ICNSS_MODE_ON, &priv->state))
  4118. return 0;
  4119. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4120. ICNSS_SMP2P_OUT_POWER_SAVE);
  4121. }
  4122. priv->stats.pm_suspend++;
  4123. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4124. } else {
  4125. priv->stats.pm_suspend_err++;
  4126. }
  4127. return ret;
  4128. }
  4129. static int icnss_pm_resume(struct device *dev)
  4130. {
  4131. struct icnss_priv *priv = dev_get_drvdata(dev);
  4132. int ret = 0;
  4133. if (priv->magic != ICNSS_MAGIC) {
  4134. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4135. dev, priv, priv->magic);
  4136. return -EINVAL;
  4137. }
  4138. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4139. if (!priv->ops || !priv->ops->pm_resume ||
  4140. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4141. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4142. goto out;
  4143. ret = priv->ops->pm_resume(dev);
  4144. out:
  4145. if (ret == 0) {
  4146. priv->stats.pm_resume++;
  4147. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4148. } else {
  4149. priv->stats.pm_resume_err++;
  4150. }
  4151. return ret;
  4152. }
  4153. static int icnss_pm_suspend_noirq(struct device *dev)
  4154. {
  4155. struct icnss_priv *priv = dev_get_drvdata(dev);
  4156. int ret = 0;
  4157. if (priv->magic != ICNSS_MAGIC) {
  4158. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4159. dev, priv, priv->magic);
  4160. return -EINVAL;
  4161. }
  4162. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4163. if (!priv->ops || !priv->ops->suspend_noirq ||
  4164. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4165. goto out;
  4166. ret = priv->ops->suspend_noirq(dev);
  4167. out:
  4168. if (ret == 0) {
  4169. priv->stats.pm_suspend_noirq++;
  4170. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4171. } else {
  4172. priv->stats.pm_suspend_noirq_err++;
  4173. }
  4174. return ret;
  4175. }
  4176. static int icnss_pm_resume_noirq(struct device *dev)
  4177. {
  4178. struct icnss_priv *priv = dev_get_drvdata(dev);
  4179. int ret = 0;
  4180. if (priv->magic != ICNSS_MAGIC) {
  4181. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4182. dev, priv, priv->magic);
  4183. return -EINVAL;
  4184. }
  4185. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4186. if (!priv->ops || !priv->ops->resume_noirq ||
  4187. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4188. goto out;
  4189. ret = priv->ops->resume_noirq(dev);
  4190. out:
  4191. if (ret == 0) {
  4192. priv->stats.pm_resume_noirq++;
  4193. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4194. } else {
  4195. priv->stats.pm_resume_noirq_err++;
  4196. }
  4197. return ret;
  4198. }
  4199. static int icnss_pm_runtime_suspend(struct device *dev)
  4200. {
  4201. struct icnss_priv *priv = dev_get_drvdata(dev);
  4202. int ret = 0;
  4203. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4204. icnss_pr_err("Ignore runtime suspend:\n");
  4205. goto out;
  4206. }
  4207. if (priv->magic != ICNSS_MAGIC) {
  4208. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4209. dev, priv, priv->magic);
  4210. return -EINVAL;
  4211. }
  4212. if (!priv->ops || !priv->ops->runtime_suspend ||
  4213. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4214. goto out;
  4215. icnss_pr_vdbg("Runtime suspend\n");
  4216. ret = priv->ops->runtime_suspend(dev);
  4217. if (!ret) {
  4218. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4219. !test_bit(ICNSS_MODE_ON, &priv->state))
  4220. return 0;
  4221. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4222. ICNSS_SMP2P_OUT_POWER_SAVE);
  4223. }
  4224. out:
  4225. return ret;
  4226. }
  4227. static int icnss_pm_runtime_resume(struct device *dev)
  4228. {
  4229. struct icnss_priv *priv = dev_get_drvdata(dev);
  4230. int ret = 0;
  4231. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4232. icnss_pr_err("Ignore runtime resume\n");
  4233. goto out;
  4234. }
  4235. if (priv->magic != ICNSS_MAGIC) {
  4236. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4237. dev, priv, priv->magic);
  4238. return -EINVAL;
  4239. }
  4240. if (!priv->ops || !priv->ops->runtime_resume ||
  4241. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4242. goto out;
  4243. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4244. ret = priv->ops->runtime_resume(dev);
  4245. out:
  4246. return ret;
  4247. }
  4248. static int icnss_pm_runtime_idle(struct device *dev)
  4249. {
  4250. struct icnss_priv *priv = dev_get_drvdata(dev);
  4251. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4252. icnss_pr_err("Ignore runtime idle\n");
  4253. goto out;
  4254. }
  4255. icnss_pr_vdbg("Runtime idle\n");
  4256. pm_request_autosuspend(dev);
  4257. out:
  4258. return -EBUSY;
  4259. }
  4260. #endif
  4261. static const struct dev_pm_ops icnss_pm_ops = {
  4262. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4263. icnss_pm_resume)
  4264. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4265. icnss_pm_resume_noirq)
  4266. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4267. icnss_pm_runtime_idle)
  4268. };
  4269. static struct platform_driver icnss_driver = {
  4270. .probe = icnss_probe,
  4271. .remove = icnss_remove,
  4272. .driver = {
  4273. .name = "icnss2",
  4274. .pm = &icnss_pm_ops,
  4275. .of_match_table = icnss_dt_match,
  4276. },
  4277. };
  4278. /**
  4279. * icnss_has_valid_dt_node() - Check if valid device tree node present
  4280. *
  4281. * Valid device tree node means a node with "compatible" property from the
  4282. * device match table and "status" property is not disabled.
  4283. *
  4284. * Return: true if valid device tree node found, false if not found
  4285. */
  4286. static bool icnss_has_valid_dt_node(void)
  4287. {
  4288. struct device_node *dn = NULL;
  4289. for_each_matching_node(dn, icnss_dt_match) {
  4290. if (of_device_is_available(dn))
  4291. return true;
  4292. }
  4293. icnss_pr_info("No valid icnss2 dtsi entry\n");
  4294. return false;
  4295. }
  4296. static int __init icnss_initialize(void)
  4297. {
  4298. if (!icnss_has_valid_dt_node())
  4299. return -ENODEV;
  4300. icnss_debug_init();
  4301. return platform_driver_register(&icnss_driver);
  4302. }
  4303. static void __exit icnss_exit(void)
  4304. {
  4305. platform_driver_unregister(&icnss_driver);
  4306. icnss_debug_deinit();
  4307. }
  4308. module_init(icnss_initialize);
  4309. module_exit(icnss_exit);
  4310. MODULE_LICENSE("GPL v2");
  4311. MODULE_DESCRIPTION("iWCN CORE platform driver");