dp_li_rx.c 46 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_li_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_li_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_li_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef WIFI_MONITOR_SUPPORT
  37. #include <dp_mon.h>
  38. #endif
  39. #ifdef FEATURE_WDS
  40. #include "dp_txrx_wds.h"
  41. #endif
  42. #include "dp_hist.h"
  43. #include "dp_rx_buffer_pool.h"
  44. #include "dp_li.h"
  45. static inline
  46. bool is_sa_da_idx_valid(uint32_t max_ast,
  47. qdf_nbuf_t nbuf, struct hal_rx_msdu_metadata msdu_info)
  48. {
  49. if ((qdf_nbuf_is_sa_valid(nbuf) && (msdu_info.sa_idx > max_ast)) ||
  50. (!qdf_nbuf_is_da_mcbc(nbuf) && qdf_nbuf_is_da_valid(nbuf) &&
  51. (msdu_info.da_idx > max_ast)))
  52. return false;
  53. return true;
  54. }
  55. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  56. #if defined(FEATURE_MCL_REPEATER) && defined(FEATURE_MEC)
  57. /**
  58. * dp_rx_mec_check_wrapper() - wrapper to dp_rx_mcast_echo_check
  59. * @soc: core DP main context
  60. * @txrx_peer: dp peer handler
  61. * @rx_tlv_hdr: start of the rx TLV header
  62. * @nbuf: pkt buffer
  63. *
  64. * Return: bool (true if it is a looped back pkt else false)
  65. */
  66. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  67. struct dp_txrx_peer *txrx_peer,
  68. uint8_t *rx_tlv_hdr,
  69. qdf_nbuf_t nbuf)
  70. {
  71. return dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf);
  72. }
  73. #else
  74. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  75. struct dp_txrx_peer *txrx_peer,
  76. uint8_t *rx_tlv_hdr,
  77. qdf_nbuf_t nbuf)
  78. {
  79. return false;
  80. }
  81. #endif
  82. #endif
  83. #ifndef QCA_HOST_MODE_WIFI_DISABLE
  84. static bool
  85. dp_rx_intrabss_ucast_check_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  86. struct dp_txrx_peer *ta_txrx_peer,
  87. struct hal_rx_msdu_metadata *msdu_metadata,
  88. uint8_t *p_tx_vdev_id)
  89. {
  90. uint16_t da_peer_id;
  91. struct dp_txrx_peer *da_peer;
  92. struct dp_ast_entry *ast_entry;
  93. dp_txrx_ref_handle txrx_ref_handle = NULL;
  94. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  95. return false;
  96. ast_entry = soc->ast_table[msdu_metadata->da_idx];
  97. if (!ast_entry)
  98. return false;
  99. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  100. ast_entry->is_active = TRUE;
  101. return false;
  102. }
  103. da_peer_id = ast_entry->peer_id;
  104. /* TA peer cannot be same as peer(DA) on which AST is present
  105. * this indicates a change in topology and that AST entries
  106. * are yet to be updated.
  107. */
  108. if (da_peer_id == ta_txrx_peer->peer_id ||
  109. da_peer_id == HTT_INVALID_PEER)
  110. return false;
  111. da_peer = dp_txrx_peer_get_ref_by_id(soc, da_peer_id,
  112. &txrx_ref_handle, DP_MOD_ID_RX);
  113. if (!da_peer)
  114. return false;
  115. *p_tx_vdev_id = da_peer->vdev->vdev_id;
  116. /* If the source or destination peer in the isolation
  117. * list then dont forward instead push to bridge stack.
  118. */
  119. if (dp_get_peer_isolation(ta_txrx_peer) ||
  120. dp_get_peer_isolation(da_peer) ||
  121. da_peer->vdev->vdev_id != ta_txrx_peer->vdev->vdev_id) {
  122. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  123. return false;
  124. }
  125. if (da_peer->bss_peer) {
  126. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  127. return false;
  128. }
  129. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  130. return true;
  131. }
  132. /*
  133. * dp_rx_intrabss_fwd_li() - Implements the Intra-BSS forwarding logic
  134. *
  135. * @soc: core txrx main context
  136. * @ta_txrx_peer : source peer entry
  137. * @rx_tlv_hdr : start address of rx tlvs
  138. * @nbuf : nbuf that has to be intrabss forwarded
  139. *
  140. * Return: bool: true if it is forwarded else false
  141. */
  142. static bool
  143. dp_rx_intrabss_fwd_li(struct dp_soc *soc,
  144. struct dp_txrx_peer *ta_txrx_peer,
  145. uint8_t *rx_tlv_hdr,
  146. qdf_nbuf_t nbuf,
  147. struct hal_rx_msdu_metadata msdu_metadata,
  148. struct cdp_tid_rx_stats *tid_stats)
  149. {
  150. uint8_t tx_vdev_id;
  151. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  152. * source, then clone the pkt and send the cloned pkt for
  153. * intra BSS forwarding and original pkt up the network stack
  154. * Note: how do we handle multicast pkts. do we forward
  155. * all multicast pkts as is or let a higher layer module
  156. * like igmpsnoop decide whether to forward or not with
  157. * Mcast enhancement.
  158. */
  159. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_txrx_peer->bss_peer)
  160. return dp_rx_intrabss_mcbc_fwd(soc, ta_txrx_peer, rx_tlv_hdr,
  161. nbuf, tid_stats, 0);
  162. if (dp_rx_intrabss_eapol_drop_check(soc, ta_txrx_peer, rx_tlv_hdr,
  163. nbuf))
  164. return true;
  165. if (dp_rx_intrabss_ucast_check_li(soc, nbuf, ta_txrx_peer,
  166. &msdu_metadata, &tx_vdev_id))
  167. return dp_rx_intrabss_ucast_fwd(soc, ta_txrx_peer, tx_vdev_id,
  168. rx_tlv_hdr, nbuf, tid_stats,
  169. 0);
  170. return false;
  171. }
  172. #endif
  173. uint32_t dp_rx_process_li(struct dp_intr *int_ctx,
  174. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  175. uint32_t quota)
  176. {
  177. hal_ring_desc_t ring_desc;
  178. hal_ring_desc_t last_prefetched_hw_desc;
  179. hal_soc_handle_t hal_soc;
  180. struct dp_rx_desc *rx_desc = NULL;
  181. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  182. qdf_nbuf_t nbuf, next;
  183. bool near_full;
  184. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  185. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  186. uint32_t num_pending = 0;
  187. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  188. uint16_t msdu_len = 0;
  189. uint16_t peer_id;
  190. uint8_t vdev_id;
  191. struct dp_txrx_peer *txrx_peer;
  192. dp_txrx_ref_handle txrx_ref_handle = NULL;
  193. struct dp_vdev *vdev;
  194. uint32_t pkt_len = 0;
  195. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  196. struct hal_rx_msdu_desc_info msdu_desc_info;
  197. enum hal_reo_error_status error;
  198. uint32_t peer_mdata;
  199. uint8_t *rx_tlv_hdr;
  200. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  201. uint8_t mac_id = 0;
  202. struct dp_pdev *rx_pdev;
  203. struct dp_srng *dp_rxdma_srng;
  204. struct rx_desc_pool *rx_desc_pool;
  205. struct dp_soc *soc = int_ctx->soc;
  206. struct cdp_tid_rx_stats *tid_stats;
  207. qdf_nbuf_t nbuf_head;
  208. qdf_nbuf_t nbuf_tail;
  209. qdf_nbuf_t deliver_list_head;
  210. qdf_nbuf_t deliver_list_tail;
  211. uint32_t num_rx_bufs_reaped = 0;
  212. uint32_t intr_id;
  213. struct hif_opaque_softc *scn;
  214. int32_t tid = 0;
  215. bool is_prev_msdu_last = true;
  216. uint32_t rx_ol_pkt_cnt = 0;
  217. uint32_t num_entries = 0;
  218. struct hal_rx_msdu_metadata msdu_metadata;
  219. QDF_STATUS status;
  220. qdf_nbuf_t ebuf_head;
  221. qdf_nbuf_t ebuf_tail;
  222. uint8_t pkt_capture_offload = 0;
  223. int max_reap_limit;
  224. uint32_t old_tid;
  225. uint32_t peer_ext_stats;
  226. uint32_t dsf;
  227. uint32_t max_ast;
  228. uint64_t current_time = 0;
  229. DP_HIST_INIT();
  230. qdf_assert_always(soc && hal_ring_hdl);
  231. hal_soc = soc->hal_soc;
  232. qdf_assert_always(hal_soc);
  233. scn = soc->hif_handle;
  234. intr_id = int_ctx->dp_intr_id;
  235. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  236. dp_runtime_pm_mark_last_busy(soc);
  237. more_data:
  238. /* reset local variables here to be re-used in the function */
  239. nbuf_head = NULL;
  240. nbuf_tail = NULL;
  241. deliver_list_head = NULL;
  242. deliver_list_tail = NULL;
  243. txrx_peer = NULL;
  244. vdev = NULL;
  245. num_rx_bufs_reaped = 0;
  246. ebuf_head = NULL;
  247. ebuf_tail = NULL;
  248. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  249. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  250. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  251. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  252. qdf_mem_zero(head, sizeof(head));
  253. qdf_mem_zero(tail, sizeof(tail));
  254. old_tid = 0xff;
  255. dsf = 0;
  256. peer_ext_stats = 0;
  257. max_ast = 0;
  258. rx_pdev = NULL;
  259. tid_stats = NULL;
  260. dp_pkt_get_timestamp(&current_time);
  261. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  262. /*
  263. * Need API to convert from hal_ring pointer to
  264. * Ring Type / Ring Id combo
  265. */
  266. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  267. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  268. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  269. goto done;
  270. }
  271. if (!num_pending)
  272. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  273. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  274. if (num_pending > quota)
  275. num_pending = quota;
  276. last_prefetched_hw_desc = dp_srng_dst_prefetch(hal_soc, hal_ring_hdl,
  277. num_pending);
  278. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  279. max_ast = wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx);
  280. /*
  281. * start reaping the buffers from reo ring and queue
  282. * them in per vdev queue.
  283. * Process the received pkts in a different per vdev loop.
  284. */
  285. while (qdf_likely(num_pending)) {
  286. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  287. if (qdf_unlikely(!ring_desc))
  288. break;
  289. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  290. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  291. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  292. soc, hal_ring_hdl, error);
  293. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  294. 1);
  295. /* Don't know how to deal with this -- assert */
  296. qdf_assert(0);
  297. }
  298. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  299. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  300. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  301. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  302. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  303. break;
  304. }
  305. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  306. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  307. ring_desc, rx_desc);
  308. if (QDF_IS_STATUS_ERROR(status)) {
  309. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  310. qdf_assert_always(!rx_desc->unmapped);
  311. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  312. rx_desc->unmapped = 1;
  313. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  314. rx_desc->pool_id);
  315. dp_rx_add_to_free_desc_list(
  316. &head[rx_desc->pool_id],
  317. &tail[rx_desc->pool_id],
  318. rx_desc);
  319. }
  320. continue;
  321. }
  322. /*
  323. * this is a unlikely scenario where the host is reaping
  324. * a descriptor which it already reaped just a while ago
  325. * but is yet to replenish it back to HW.
  326. * In this case host will dump the last 128 descriptors
  327. * including the software descriptor rx_desc and assert.
  328. */
  329. if (qdf_unlikely(!rx_desc->in_use)) {
  330. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  331. dp_info_rl("Reaping rx_desc not in use!");
  332. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  333. ring_desc, rx_desc);
  334. /* ignore duplicate RX desc and continue to process */
  335. /* Pop out the descriptor */
  336. continue;
  337. }
  338. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  339. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  340. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  341. dp_info_rl("Nbuf sanity check failure!");
  342. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  343. ring_desc, rx_desc);
  344. rx_desc->in_err_state = 1;
  345. continue;
  346. }
  347. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  348. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  349. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  350. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  351. ring_desc, rx_desc);
  352. }
  353. /* Get MPDU DESC info */
  354. hal_rx_mpdu_desc_info_get_li(ring_desc, &mpdu_desc_info);
  355. /* Get MSDU DESC info */
  356. hal_rx_msdu_desc_info_get_li(ring_desc, &msdu_desc_info);
  357. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  358. HAL_MSDU_F_MSDU_CONTINUATION)) {
  359. /* previous msdu has end bit set, so current one is
  360. * the new MPDU
  361. */
  362. if (is_prev_msdu_last) {
  363. /* For new MPDU check if we can read complete
  364. * MPDU by comparing the number of buffers
  365. * available and number of buffers needed to
  366. * reap this MPDU
  367. */
  368. if ((msdu_desc_info.msdu_len /
  369. (RX_DATA_BUFFER_SIZE -
  370. soc->rx_pkt_tlv_size) + 1) >
  371. num_pending) {
  372. DP_STATS_INC(soc,
  373. rx.msdu_scatter_wait_break,
  374. 1);
  375. dp_rx_cookie_reset_invalid_bit(
  376. ring_desc);
  377. /* As we are going to break out of the
  378. * loop because of unavailability of
  379. * descs to form complete SG, we need to
  380. * reset the TP in the REO destination
  381. * ring.
  382. */
  383. hal_srng_dst_dec_tp(hal_soc,
  384. hal_ring_hdl);
  385. break;
  386. }
  387. is_prev_msdu_last = false;
  388. }
  389. }
  390. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  391. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  392. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  393. HAL_MPDU_F_RAW_AMPDU))
  394. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  395. if (!is_prev_msdu_last &&
  396. !(msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION))
  397. is_prev_msdu_last = true;
  398. rx_bufs_reaped[rx_desc->pool_id]++;
  399. peer_mdata = mpdu_desc_info.peer_meta_data;
  400. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  401. dp_rx_peer_metadata_peer_id_get_li(soc, peer_mdata);
  402. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  403. DP_PEER_METADATA_VDEV_ID_GET_LI(peer_mdata);
  404. /* to indicate whether this msdu is rx offload */
  405. pkt_capture_offload =
  406. DP_PEER_METADATA_OFFLOAD_GET_LI(peer_mdata);
  407. /*
  408. * save msdu flags first, last and continuation msdu in
  409. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  410. * length to nbuf->cb. This ensures the info required for
  411. * per pkt processing is always in the same cache line.
  412. * This helps in improving throughput for smaller pkt
  413. * sizes.
  414. */
  415. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  416. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  417. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  418. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  419. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  420. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  421. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  422. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  423. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  424. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  425. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  426. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  427. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  428. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  429. /* set reo dest indication */
  430. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  431. rx_desc->nbuf,
  432. HAL_RX_REO_MSDU_REO_DST_IND_GET(ring_desc));
  433. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  434. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  435. /*
  436. * move unmap after scattered msdu waiting break logic
  437. * in case double skb unmap happened.
  438. */
  439. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  440. rx_desc->unmapped = 1;
  441. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  442. ebuf_tail, rx_desc);
  443. quota -= 1;
  444. num_pending -= 1;
  445. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  446. &tail[rx_desc->pool_id], rx_desc);
  447. num_rx_bufs_reaped++;
  448. dp_rx_prefetch_hw_sw_nbuf_desc(soc, hal_soc, num_pending,
  449. hal_ring_hdl,
  450. &last_prefetched_hw_desc,
  451. &last_prefetched_sw_desc);
  452. /*
  453. * only if complete msdu is received for scatter case,
  454. * then allow break.
  455. */
  456. if (is_prev_msdu_last &&
  457. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  458. max_reap_limit))
  459. break;
  460. }
  461. done:
  462. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  463. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  464. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  465. /*
  466. * continue with next mac_id if no pkts were reaped
  467. * from that pool
  468. */
  469. if (!rx_bufs_reaped[mac_id])
  470. continue;
  471. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  472. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  473. dp_rx_buffers_replenish_simple(soc, mac_id, dp_rxdma_srng,
  474. rx_desc_pool,
  475. rx_bufs_reaped[mac_id],
  476. &head[mac_id], &tail[mac_id]);
  477. }
  478. dp_verbose_debug("replenished %u", rx_bufs_reaped[0]);
  479. /* Peer can be NULL is case of LFR */
  480. if (qdf_likely(txrx_peer))
  481. vdev = NULL;
  482. /*
  483. * BIG loop where each nbuf is dequeued from global queue,
  484. * processed and queued back on a per vdev basis. These nbufs
  485. * are sent to stack as and when we run out of nbufs
  486. * or a new nbuf dequeued from global queue has a different
  487. * vdev when compared to previous nbuf.
  488. */
  489. nbuf = nbuf_head;
  490. while (nbuf) {
  491. next = nbuf->next;
  492. dp_rx_prefetch_nbuf_data(nbuf, next);
  493. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  494. nbuf = next;
  495. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  496. continue;
  497. }
  498. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  499. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  500. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  501. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  502. peer_id, vdev_id)) {
  503. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  504. deliver_list_head,
  505. deliver_list_tail);
  506. deliver_list_head = NULL;
  507. deliver_list_tail = NULL;
  508. }
  509. /* Get TID from struct cb->tid_val, save to tid */
  510. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  511. tid = qdf_nbuf_get_tid_val(nbuf);
  512. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  513. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  514. dp_rx_nbuf_free(nbuf);
  515. nbuf = next;
  516. continue;
  517. }
  518. if (qdf_unlikely(!txrx_peer)) {
  519. txrx_peer =
  520. dp_rx_get_txrx_peer_and_vdev(soc, nbuf, peer_id,
  521. &txrx_ref_handle,
  522. pkt_capture_offload,
  523. &vdev,
  524. &rx_pdev, &dsf,
  525. &old_tid);
  526. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  527. nbuf = next;
  528. continue;
  529. }
  530. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  531. dp_txrx_peer_unref_delete(txrx_ref_handle,
  532. DP_MOD_ID_RX);
  533. txrx_peer =
  534. dp_rx_get_txrx_peer_and_vdev(soc, nbuf, peer_id,
  535. &txrx_ref_handle,
  536. pkt_capture_offload,
  537. &vdev,
  538. &rx_pdev, &dsf,
  539. &old_tid);
  540. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  541. nbuf = next;
  542. continue;
  543. }
  544. }
  545. if (txrx_peer) {
  546. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  547. qdf_dp_trace_set_track(nbuf, QDF_RX);
  548. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  549. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  550. QDF_NBUF_RX_PKT_DATA_TRACK;
  551. }
  552. rx_bufs_used++;
  553. /* when hlos tid override is enabled, save tid in
  554. * skb->priority
  555. */
  556. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  557. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  558. qdf_nbuf_set_priority(nbuf, tid);
  559. DP_RX_TID_SAVE(nbuf, tid);
  560. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  561. dp_rx_pkt_tracepoints_enabled())
  562. qdf_nbuf_set_timestamp(nbuf);
  563. if (qdf_likely(old_tid != tid)) {
  564. tid_stats =
  565. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  566. old_tid = tid;
  567. }
  568. /*
  569. * Check if DMA completed -- msdu_done is the last bit
  570. * to be written
  571. */
  572. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(nbuf))) {
  573. if (qdf_unlikely(!hal_rx_attn_msdu_done_get_li(
  574. rx_tlv_hdr))) {
  575. dp_err_rl("MSDU DONE failure");
  576. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  577. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  578. QDF_TRACE_LEVEL_INFO);
  579. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  580. qdf_assert(0);
  581. dp_rx_nbuf_free(nbuf);
  582. nbuf = next;
  583. continue;
  584. } else if (qdf_unlikely(hal_rx_attn_msdu_len_err_get_li(
  585. rx_tlv_hdr))) {
  586. DP_STATS_INC(soc, rx.err.msdu_len_err, 1);
  587. dp_rx_nbuf_free(nbuf);
  588. nbuf = next;
  589. continue;
  590. }
  591. }
  592. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  593. /*
  594. * First IF condition:
  595. * 802.11 Fragmented pkts are reinjected to REO
  596. * HW block as SG pkts and for these pkts we only
  597. * need to pull the RX TLVS header length.
  598. * Second IF condition:
  599. * The below condition happens when an MSDU is spread
  600. * across multiple buffers. This can happen in two cases
  601. * 1. The nbuf size is smaller then the received msdu.
  602. * ex: we have set the nbuf size to 2048 during
  603. * nbuf_alloc. but we received an msdu which is
  604. * 2304 bytes in size then this msdu is spread
  605. * across 2 nbufs.
  606. *
  607. * 2. AMSDUs when RAW mode is enabled.
  608. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  609. * across 1st nbuf and 2nd nbuf and last MSDU is
  610. * spread across 2nd nbuf and 3rd nbuf.
  611. *
  612. * for these scenarios let us create a skb frag_list and
  613. * append these buffers till the last MSDU of the AMSDU
  614. * Third condition:
  615. * This is the most likely case, we receive 802.3 pkts
  616. * decapsulated by HW, here we need to set the pkt length.
  617. */
  618. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  619. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  620. bool is_mcbc, is_sa_vld, is_da_vld;
  621. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  622. rx_tlv_hdr);
  623. is_sa_vld =
  624. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  625. rx_tlv_hdr);
  626. is_da_vld =
  627. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  628. rx_tlv_hdr);
  629. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  630. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  631. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  632. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  633. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  634. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  635. nbuf = dp_rx_sg_create(soc, nbuf);
  636. next = nbuf->next;
  637. if (qdf_nbuf_is_raw_frame(nbuf)) {
  638. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  639. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  640. rx.raw, 1,
  641. msdu_len,
  642. 0);
  643. } else {
  644. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  645. if (!dp_rx_is_sg_supported()) {
  646. dp_rx_nbuf_free(nbuf);
  647. dp_info_rl("sg msdu len %d, dropped",
  648. msdu_len);
  649. nbuf = next;
  650. continue;
  651. }
  652. }
  653. } else {
  654. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  655. pkt_len = msdu_len +
  656. msdu_metadata.l3_hdr_pad +
  657. soc->rx_pkt_tlv_size;
  658. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  659. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  660. }
  661. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  662. /*
  663. * process frame for mulitpass phrase processing
  664. */
  665. if (qdf_unlikely(vdev->multipass_en)) {
  666. if (dp_rx_multipass_process(txrx_peer, nbuf,
  667. tid) == false) {
  668. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  669. rx.multipass_rx_pkt_drop,
  670. 1, 0);
  671. dp_rx_nbuf_free(nbuf);
  672. nbuf = next;
  673. continue;
  674. }
  675. }
  676. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  677. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  678. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  679. rx.policy_check_drop,
  680. 1, 0);
  681. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  682. /* Drop & free packet */
  683. dp_rx_nbuf_free(nbuf);
  684. /* Statistics */
  685. nbuf = next;
  686. continue;
  687. }
  688. if (qdf_unlikely(txrx_peer && (txrx_peer->nawds_enabled) &&
  689. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  690. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  691. rx_tlv_hdr) ==
  692. false))) {
  693. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  694. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  695. rx.nawds_mcast_drop,
  696. 1, 0);
  697. dp_rx_nbuf_free(nbuf);
  698. nbuf = next;
  699. continue;
  700. }
  701. /*
  702. * Drop non-EAPOL frames from unauthorized peer.
  703. */
  704. if (qdf_likely(txrx_peer) &&
  705. qdf_unlikely(!txrx_peer->authorize) &&
  706. !qdf_nbuf_is_raw_frame(nbuf)) {
  707. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  708. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  709. if (!is_eapol) {
  710. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  711. rx.peer_unauth_rx_pkt_drop,
  712. 1, 0);
  713. dp_rx_nbuf_free(nbuf);
  714. nbuf = next;
  715. continue;
  716. }
  717. }
  718. if (soc->process_rx_status)
  719. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  720. /* Update the protocol tag in SKB based on CCE metadata */
  721. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  722. reo_ring_num, false, true);
  723. /* Update the flow tag in SKB based on FSE metadata */
  724. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  725. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  726. reo_ring_num, tid_stats, 0);
  727. if (qdf_unlikely(vdev->mesh_vdev)) {
  728. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  729. == QDF_STATUS_SUCCESS) {
  730. dp_rx_info("%pK: mesh pkt filtered", soc);
  731. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  732. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  733. 1);
  734. dp_rx_nbuf_free(nbuf);
  735. nbuf = next;
  736. continue;
  737. }
  738. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  739. txrx_peer);
  740. }
  741. if (qdf_likely(vdev->rx_decap_type ==
  742. htt_cmn_pkt_type_ethernet) &&
  743. qdf_likely(!vdev->mesh_vdev)) {
  744. /* Due to HW issue, sometimes we see that the sa_idx
  745. * and da_idx are invalid with sa_valid and da_valid
  746. * bits set
  747. *
  748. * in this case we also see that value of
  749. * sa_sw_peer_id is set as 0
  750. *
  751. * Drop the packet if sa_idx and da_idx OOB or
  752. * sa_sw_peerid is 0
  753. */
  754. if (!is_sa_da_idx_valid(max_ast, nbuf,
  755. msdu_metadata)) {
  756. dp_rx_nbuf_free(nbuf);
  757. nbuf = next;
  758. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  759. continue;
  760. }
  761. if (qdf_unlikely(dp_rx_mec_check_wrapper(soc,
  762. txrx_peer,
  763. rx_tlv_hdr,
  764. nbuf))) {
  765. /* this is a looped back MCBC pkt,drop it */
  766. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  767. rx.mec_drop, 1,
  768. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  769. 0);
  770. dp_rx_nbuf_free(nbuf);
  771. nbuf = next;
  772. continue;
  773. }
  774. /* WDS Source Port Learning */
  775. if (qdf_likely(vdev->wds_enabled))
  776. dp_rx_wds_srcport_learn(soc,
  777. rx_tlv_hdr,
  778. txrx_peer,
  779. nbuf,
  780. msdu_metadata);
  781. /* Intrabss-fwd */
  782. if (dp_rx_check_ap_bridge(vdev))
  783. if (dp_rx_intrabss_fwd_li(soc, txrx_peer,
  784. rx_tlv_hdr,
  785. nbuf,
  786. msdu_metadata,
  787. tid_stats)) {
  788. nbuf = next;
  789. tid_stats->intrabss_cnt++;
  790. continue; /* Get next desc */
  791. }
  792. }
  793. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  794. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  795. nbuf);
  796. dp_rx_update_stats(soc, nbuf);
  797. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  798. current_time, nbuf);
  799. DP_RX_LIST_APPEND(deliver_list_head,
  800. deliver_list_tail,
  801. nbuf);
  802. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, to_stack, 1,
  803. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  804. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  805. rx.rx_success, 1,
  806. QDF_NBUF_CB_RX_PKT_LEN(nbuf), 0);
  807. if (qdf_unlikely(txrx_peer->in_twt))
  808. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  809. rx.to_stack_twt, 1,
  810. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  811. 0);
  812. tid_stats->delivered_to_stack++;
  813. nbuf = next;
  814. }
  815. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  816. pkt_capture_offload,
  817. deliver_list_head,
  818. deliver_list_tail);
  819. if (qdf_likely(txrx_peer))
  820. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  821. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  822. if (quota) {
  823. num_pending =
  824. dp_rx_srng_get_num_pending(hal_soc,
  825. hal_ring_hdl,
  826. num_entries,
  827. &near_full);
  828. if (num_pending) {
  829. DP_STATS_INC(soc, rx.hp_oos2, 1);
  830. if (!hif_exec_should_yield(scn, intr_id))
  831. goto more_data;
  832. if (qdf_unlikely(near_full)) {
  833. DP_STATS_INC(soc, rx.near_full, 1);
  834. goto more_data;
  835. }
  836. }
  837. }
  838. if (vdev && vdev->osif_fisa_flush)
  839. vdev->osif_fisa_flush(soc, reo_ring_num);
  840. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  841. vdev->osif_gro_flush(vdev->osif_vdev,
  842. reo_ring_num);
  843. }
  844. }
  845. /* Update histogram statistics by looping through pdev's */
  846. DP_RX_HIST_STATS_PER_PDEV();
  847. return rx_bufs_used; /* Assume no scale factor for now */
  848. }
  849. QDF_STATUS dp_rx_desc_pool_init_li(struct dp_soc *soc,
  850. struct rx_desc_pool *rx_desc_pool,
  851. uint32_t pool_id)
  852. {
  853. return dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
  854. }
  855. void dp_rx_desc_pool_deinit_li(struct dp_soc *soc,
  856. struct rx_desc_pool *rx_desc_pool,
  857. uint32_t pool_id)
  858. {
  859. }
  860. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_li(
  861. struct dp_soc *soc,
  862. void *ring_desc,
  863. struct dp_rx_desc **r_rx_desc)
  864. {
  865. struct hal_buf_info buf_info = {0};
  866. hal_soc_handle_t hal_soc = soc->hal_soc;
  867. /* only cookie and rbm will be valid in buf_info */
  868. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  869. &buf_info);
  870. if (qdf_unlikely(buf_info.rbm !=
  871. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id))) {
  872. /* TODO */
  873. /* Call appropriate handler */
  874. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  875. dp_rx_err("%pK: Invalid RBM %d", soc, buf_info.rbm);
  876. return QDF_STATUS_E_INVAL;
  877. }
  878. if (!dp_rx_is_sw_cookie_valid(soc, buf_info.sw_cookie)) {
  879. dp_rx_err("invalid sw_cookie 0x%x", buf_info.sw_cookie);
  880. return QDF_STATUS_E_INVAL;
  881. }
  882. *r_rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  883. return QDF_STATUS_SUCCESS;
  884. }
  885. bool dp_rx_chain_msdus_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  886. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  887. {
  888. bool mpdu_done = false;
  889. qdf_nbuf_t curr_nbuf = NULL;
  890. qdf_nbuf_t tmp_nbuf = NULL;
  891. /* TODO: Currently only single radio is supported, hence
  892. * pdev hard coded to '0' index
  893. */
  894. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  895. if (!dp_pdev) {
  896. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  897. return mpdu_done;
  898. }
  899. /* if invalid peer SG list has max values free the buffers in list
  900. * and treat current buffer as start of list
  901. *
  902. * current logic to detect the last buffer from attn_tlv is not reliable
  903. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  904. * up
  905. */
  906. if (!dp_pdev->first_nbuf ||
  907. (dp_pdev->invalid_peer_head_msdu &&
  908. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  909. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  910. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  911. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  912. rx_tlv_hdr);
  913. dp_pdev->first_nbuf = true;
  914. /* If the new nbuf received is the first msdu of the
  915. * amsdu and there are msdus in the invalid peer msdu
  916. * list, then let us free all the msdus of the invalid
  917. * peer msdu list.
  918. * This scenario can happen when we start receiving
  919. * new a-msdu even before the previous a-msdu is completely
  920. * received.
  921. */
  922. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  923. while (curr_nbuf) {
  924. tmp_nbuf = curr_nbuf->next;
  925. dp_rx_nbuf_free(curr_nbuf);
  926. curr_nbuf = tmp_nbuf;
  927. }
  928. dp_pdev->invalid_peer_head_msdu = NULL;
  929. dp_pdev->invalid_peer_tail_msdu = NULL;
  930. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  931. }
  932. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  933. rx_tlv_hdr) &&
  934. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  935. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  936. qdf_assert_always(dp_pdev->first_nbuf);
  937. dp_pdev->first_nbuf = false;
  938. mpdu_done = true;
  939. }
  940. /*
  941. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  942. * should be NULL here, add the checking for debugging purpose
  943. * in case some corner case.
  944. */
  945. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  946. dp_pdev->invalid_peer_tail_msdu);
  947. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  948. dp_pdev->invalid_peer_tail_msdu,
  949. nbuf);
  950. return mpdu_done;
  951. }
  952. static struct dp_soc *dp_rx_replensih_soc_get_li(struct dp_soc *soc,
  953. uint8_t chip_id)
  954. {
  955. return soc;
  956. }
  957. qdf_nbuf_t
  958. dp_rx_wbm_err_reap_desc_li(struct dp_intr *int_ctx, struct dp_soc *soc,
  959. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  960. uint32_t *rx_bufs_used)
  961. {
  962. hal_ring_desc_t ring_desc;
  963. hal_soc_handle_t hal_soc;
  964. struct dp_rx_desc *rx_desc;
  965. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  966. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  967. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  968. uint8_t buf_type;
  969. uint8_t mac_id;
  970. struct dp_srng *dp_rxdma_srng;
  971. struct rx_desc_pool *rx_desc_pool;
  972. qdf_nbuf_t nbuf_head = NULL;
  973. qdf_nbuf_t nbuf_tail = NULL;
  974. qdf_nbuf_t nbuf;
  975. union hal_wbm_err_info_u wbm_err_info = { 0 };
  976. uint8_t msdu_continuation = 0;
  977. bool process_sg_buf = false;
  978. uint32_t wbm_err_src;
  979. QDF_STATUS status;
  980. struct dp_soc *replenish_soc;
  981. uint8_t chip_id = 0;
  982. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  983. uint8_t *rx_tlv_hdr;
  984. uint32_t peer_mdata;
  985. qdf_assert(soc && hal_ring_hdl);
  986. hal_soc = soc->hal_soc;
  987. qdf_assert(hal_soc);
  988. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  989. /* TODO */
  990. /*
  991. * Need API to convert from hal_ring pointer to
  992. * Ring Type / Ring Id combo
  993. */
  994. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  995. soc, hal_ring_hdl);
  996. goto done;
  997. }
  998. while (qdf_likely(quota)) {
  999. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1000. if (qdf_unlikely(!ring_desc))
  1001. break;
  1002. /* XXX */
  1003. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1004. if (dp_assert_always_internal_stat(
  1005. buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF,
  1006. soc, rx.err.wbm_err_buf_rel_type))
  1007. continue;
  1008. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1009. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1010. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1011. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  1012. ring_desc,
  1013. &rx_desc)) {
  1014. dp_rx_err_err("get rx desc from hal_desc failed");
  1015. continue;
  1016. }
  1017. if (dp_assert_always_internal_stat(rx_desc, soc,
  1018. rx.err.rx_desc_null))
  1019. continue;
  1020. if (!dp_rx_desc_check_magic(rx_desc)) {
  1021. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  1022. soc, rx_desc);
  1023. continue;
  1024. }
  1025. /*
  1026. * this is a unlikely scenario where the host is reaping
  1027. * a descriptor which it already reaped just a while ago
  1028. * but is yet to replenish it back to HW.
  1029. * In this case host will dump the last 128 descriptors
  1030. * including the software descriptor rx_desc and assert.
  1031. */
  1032. if (qdf_unlikely(!rx_desc->in_use)) {
  1033. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1034. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1035. ring_desc, rx_desc);
  1036. continue;
  1037. }
  1038. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info.info_bit,
  1039. hal_soc);
  1040. nbuf = rx_desc->nbuf;
  1041. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1042. ring_desc, rx_desc);
  1043. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1044. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1045. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  1046. nbuf);
  1047. rx_desc->in_err_state = 1;
  1048. rx_desc->unmapped = 1;
  1049. rx_bufs_reaped[rx_desc->pool_id]++;
  1050. dp_rx_add_to_free_desc_list(
  1051. &head[rx_desc->pool_id],
  1052. &tail[rx_desc->pool_id],
  1053. rx_desc);
  1054. continue;
  1055. }
  1056. /* Update peer_id in nbuf cb */
  1057. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1058. peer_mdata = hal_rx_tlv_peer_meta_data_get(soc->hal_soc,
  1059. rx_tlv_hdr);
  1060. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1061. dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  1062. /* Get MPDU DESC info */
  1063. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1064. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  1065. HAL_MPDU_F_QOS_CONTROL_VALID))
  1066. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  1067. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1068. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1069. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1070. rx_desc->unmapped = 1;
  1071. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1072. if (qdf_unlikely(
  1073. soc->wbm_release_desc_rx_sg_support &&
  1074. dp_rx_is_sg_formation_required(&wbm_err_info.info_bit))) {
  1075. /* SG is detected from continuation bit */
  1076. msdu_continuation =
  1077. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1078. ring_desc);
  1079. if (msdu_continuation &&
  1080. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1081. /* Update length from first buffer in SG */
  1082. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1083. hal_rx_msdu_start_msdu_len_get(
  1084. soc->hal_soc,
  1085. qdf_nbuf_data(nbuf));
  1086. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1087. true;
  1088. }
  1089. if (msdu_continuation) {
  1090. /* MSDU continued packets */
  1091. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1092. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1093. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1094. } else {
  1095. /* This is the terminal packet in SG */
  1096. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1097. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1098. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1099. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1100. process_sg_buf = true;
  1101. }
  1102. }
  1103. /*
  1104. * save the wbm desc info in nbuf CB/TLV. We will need this
  1105. * info when we do the actual nbuf processing
  1106. */
  1107. wbm_err_info.info_bit.pool_id = rx_desc->pool_id;
  1108. dp_rx_set_wbm_err_info_in_nbuf(soc, nbuf, wbm_err_info);
  1109. rx_bufs_reaped[rx_desc->pool_id]++;
  1110. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1111. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1112. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1113. nbuf);
  1114. if (process_sg_buf) {
  1115. if (!dp_rx_buffer_pool_refill(
  1116. soc,
  1117. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1118. rx_desc->pool_id))
  1119. DP_RX_MERGE_TWO_LIST(
  1120. nbuf_head, nbuf_tail,
  1121. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1122. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1123. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1124. dp_rx_wbm_sg_list_reset(soc);
  1125. process_sg_buf = false;
  1126. }
  1127. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1128. rx_desc->pool_id)) {
  1129. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1130. }
  1131. dp_rx_add_to_free_desc_list
  1132. (&head[rx_desc->pool_id],
  1133. &tail[rx_desc->pool_id], rx_desc);
  1134. /*
  1135. * if continuation bit is set then we have MSDU spread
  1136. * across multiple buffers, let us not decrement quota
  1137. * till we reap all buffers of that MSDU.
  1138. */
  1139. if (qdf_likely(!msdu_continuation))
  1140. quota -= 1;
  1141. }
  1142. done:
  1143. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1144. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1145. /*
  1146. * continue with next mac_id if no pkts were reaped
  1147. * from that pool
  1148. */
  1149. if (!rx_bufs_reaped[mac_id])
  1150. continue;
  1151. replenish_soc =
  1152. dp_rx_replensih_soc_get_li(soc, chip_id);
  1153. dp_rxdma_srng =
  1154. &replenish_soc->rx_refill_buf_ring[mac_id];
  1155. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1156. dp_rx_buffers_replenish_simple(
  1157. replenish_soc, mac_id,
  1158. dp_rxdma_srng,
  1159. rx_desc_pool,
  1160. rx_bufs_reaped[mac_id],
  1161. &head[mac_id],
  1162. &tail[mac_id]);
  1163. *rx_bufs_used += rx_bufs_reaped[mac_id];
  1164. }
  1165. return nbuf_head;
  1166. }
  1167. QDF_STATUS
  1168. dp_rx_null_q_desc_handle_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1169. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1170. struct dp_txrx_peer *txrx_peer,
  1171. bool is_reo_exception,
  1172. uint8_t link_id)
  1173. {
  1174. uint32_t pkt_len;
  1175. uint16_t msdu_len;
  1176. struct dp_vdev *vdev;
  1177. uint8_t tid;
  1178. qdf_ether_header_t *eh;
  1179. struct hal_rx_msdu_metadata msdu_metadata;
  1180. uint16_t sa_idx = 0;
  1181. bool is_eapol = 0;
  1182. bool enh_flag;
  1183. qdf_nbuf_set_rx_chfrag_start(
  1184. nbuf,
  1185. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1186. rx_tlv_hdr));
  1187. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1188. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1189. rx_tlv_hdr));
  1190. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1191. rx_tlv_hdr));
  1192. qdf_nbuf_set_da_valid(nbuf,
  1193. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1194. rx_tlv_hdr));
  1195. qdf_nbuf_set_sa_valid(nbuf,
  1196. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1197. rx_tlv_hdr));
  1198. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1199. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1200. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1201. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1202. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1203. if (dp_rx_check_pkt_len(soc, pkt_len))
  1204. goto drop_nbuf;
  1205. /* Set length in nbuf */
  1206. qdf_nbuf_set_pktlen(
  1207. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1208. }
  1209. /*
  1210. * Check if DMA completed -- msdu_done is the last bit
  1211. * to be written
  1212. */
  1213. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1214. dp_err_rl("MSDU DONE failure");
  1215. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1216. QDF_TRACE_LEVEL_INFO);
  1217. qdf_assert(0);
  1218. }
  1219. if (!txrx_peer &&
  1220. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1221. rx_tlv_hdr, nbuf))
  1222. return QDF_STATUS_E_FAILURE;
  1223. if (!txrx_peer) {
  1224. bool mpdu_done = false;
  1225. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1226. if (!pdev) {
  1227. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1228. return QDF_STATUS_E_FAILURE;
  1229. }
  1230. dp_err_rl("txrx_peer is NULL");
  1231. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1232. qdf_nbuf_len(nbuf));
  1233. /* QCN9000 has the support enabled */
  1234. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1235. mpdu_done = true;
  1236. nbuf->next = NULL;
  1237. /* Trigger invalid peer handler wrapper */
  1238. dp_rx_process_invalid_peer_wrapper(soc,
  1239. nbuf,
  1240. mpdu_done,
  1241. pool_id);
  1242. } else {
  1243. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1244. rx_tlv_hdr,
  1245. pool_id);
  1246. /* Trigger invalid peer handler wrapper */
  1247. dp_rx_process_invalid_peer_wrapper(
  1248. soc,
  1249. pdev->invalid_peer_head_msdu,
  1250. mpdu_done, pool_id);
  1251. }
  1252. if (mpdu_done) {
  1253. pdev->invalid_peer_head_msdu = NULL;
  1254. pdev->invalid_peer_tail_msdu = NULL;
  1255. }
  1256. return QDF_STATUS_E_FAILURE;
  1257. }
  1258. vdev = txrx_peer->vdev;
  1259. if (!vdev) {
  1260. dp_err_rl("Null vdev!");
  1261. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1262. goto drop_nbuf;
  1263. }
  1264. /*
  1265. * Advance the packet start pointer by total size of
  1266. * pre-header TLV's
  1267. */
  1268. if (qdf_nbuf_is_frag(nbuf))
  1269. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1270. else
  1271. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1272. soc->rx_pkt_tlv_size));
  1273. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1274. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1275. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1276. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1277. 0);
  1278. goto drop_nbuf;
  1279. }
  1280. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1281. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1282. if ((sa_idx < 0) ||
  1283. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1284. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1285. goto drop_nbuf;
  1286. }
  1287. }
  1288. if ((!soc->mec_fw_offload) &&
  1289. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1290. /* this is a looped back MCBC pkt, drop it */
  1291. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1292. qdf_nbuf_len(nbuf), 0);
  1293. goto drop_nbuf;
  1294. }
  1295. /*
  1296. * In qwrap mode if the received packet matches with any of the vdev
  1297. * mac addresses, drop it. Donot receive multicast packets originated
  1298. * from any proxysta.
  1299. */
  1300. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1301. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1302. qdf_nbuf_len(nbuf), 0);
  1303. goto drop_nbuf;
  1304. }
  1305. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1306. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1307. rx_tlv_hdr))) {
  1308. dp_err_rl("free buffer for multicast packet");
  1309. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1310. 0);
  1311. goto drop_nbuf;
  1312. }
  1313. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1314. dp_err_rl("mcast Policy Check Drop pkt");
  1315. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1316. 0);
  1317. goto drop_nbuf;
  1318. }
  1319. /* WDS Source Port Learning */
  1320. if (!soc->ast_offload_support &&
  1321. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1322. vdev->wds_enabled))
  1323. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1324. msdu_metadata);
  1325. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1326. struct dp_peer *peer;
  1327. struct dp_rx_tid *rx_tid;
  1328. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1329. DP_MOD_ID_RX_ERR);
  1330. if (peer) {
  1331. rx_tid = &peer->rx_tid[tid];
  1332. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1333. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned) {
  1334. /* For Mesh peer, if on one of the mesh AP the
  1335. * mesh peer is not deleted, the new addition of mesh
  1336. * peer on other mesh AP doesn't do BA negotiation
  1337. * leading to mismatch in BA windows.
  1338. * To avoid this send max BA window during init.
  1339. */
  1340. if (qdf_unlikely(vdev->mesh_vdev) ||
  1341. qdf_unlikely(txrx_peer->nawds_enabled))
  1342. dp_rx_tid_setup_wifi3(
  1343. peer, tid,
  1344. hal_get_rx_max_ba_window(soc->hal_soc,tid),
  1345. IEEE80211_SEQ_MAX);
  1346. else
  1347. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1348. IEEE80211_SEQ_MAX);
  1349. }
  1350. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1351. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1352. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1353. }
  1354. }
  1355. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1356. if (!txrx_peer->authorize) {
  1357. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1358. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1359. if (!dp_rx_err_match_dhost(eh, vdev))
  1360. goto drop_nbuf;
  1361. } else {
  1362. goto drop_nbuf;
  1363. }
  1364. }
  1365. /*
  1366. * Drop packets in this path if cce_match is found. Packets will come
  1367. * in following path depending on whether tidQ is setup.
  1368. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1369. * cce_match = 1
  1370. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1371. * dropped.
  1372. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1373. * cce_match = 1
  1374. * These packets need to be dropped and should not get delivered
  1375. * to stack.
  1376. */
  1377. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1378. goto drop_nbuf;
  1379. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1380. qdf_nbuf_set_raw_frame(nbuf, 1);
  1381. qdf_nbuf_set_next(nbuf, NULL);
  1382. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, 0);
  1383. } else {
  1384. enh_flag = vdev->pdev->enhanced_stats_en;
  1385. qdf_nbuf_set_next(nbuf, NULL);
  1386. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1387. enh_flag);
  1388. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  1389. rx.rx_success, 1,
  1390. qdf_nbuf_len(nbuf), 0);
  1391. /*
  1392. * Update the protocol tag in SKB based on
  1393. * CCE metadata
  1394. */
  1395. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1396. EXCEPTION_DEST_RING_ID,
  1397. true, true);
  1398. /* Update the flow tag in SKB based on FSE metadata */
  1399. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1400. rx_tlv_hdr, true);
  1401. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1402. soc->hal_soc, rx_tlv_hdr) &&
  1403. (vdev->rx_decap_type ==
  1404. htt_cmn_pkt_type_ethernet))) {
  1405. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1406. enh_flag, 0);
  1407. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1408. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1409. qdf_nbuf_len(nbuf),
  1410. enh_flag, 0);
  1411. } else {
  1412. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  1413. qdf_nbuf_len(nbuf),
  1414. enh_flag,
  1415. 0);
  1416. }
  1417. qdf_nbuf_set_exc_frame(nbuf, 1);
  1418. if (qdf_unlikely(vdev->multipass_en)) {
  1419. if (dp_rx_multipass_process(txrx_peer, nbuf,
  1420. tid) == false) {
  1421. DP_PEER_PER_PKT_STATS_INC
  1422. (txrx_peer,
  1423. rx.multipass_rx_pkt_drop,
  1424. 1, link_id);
  1425. goto drop_nbuf;
  1426. }
  1427. }
  1428. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1429. is_eapol);
  1430. }
  1431. return QDF_STATUS_SUCCESS;
  1432. drop_nbuf:
  1433. dp_rx_nbuf_free(nbuf);
  1434. return QDF_STATUS_E_FAILURE;
  1435. }