dp_tx_desc.h 43 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef DP_TX_DESC_H
  20. #define DP_TX_DESC_H
  21. #include "dp_types.h"
  22. #include "dp_tx.h"
  23. #include "dp_internal.h"
  24. /*
  25. * 21 bits cookie
  26. * 2 bits pool id 0 ~ 3,
  27. * 10 bits page id 0 ~ 1023
  28. * 5 bits offset id 0 ~ 31 (Desc size = 128, Num descs per page = 4096/128 = 32)
  29. */
  30. /* ???Ring ID needed??? */
  31. /* TODO: Need to revisit this change for Rhine */
  32. #ifdef WLAN_SOFTUMAC_SUPPORT
  33. #define DP_TX_DESC_ID_POOL_MASK 0x018000
  34. #define DP_TX_DESC_ID_POOL_OS 15
  35. #define DP_TX_DESC_ID_PAGE_MASK 0x007FF0
  36. #define DP_TX_DESC_ID_PAGE_OS 4
  37. #define DP_TX_DESC_ID_OFFSET_MASK 0x00000F
  38. #define DP_TX_DESC_ID_OFFSET_OS 0
  39. #else
  40. #define DP_TX_DESC_ID_POOL_MASK 0x018000
  41. #define DP_TX_DESC_ID_POOL_OS 15
  42. #define DP_TX_DESC_ID_PAGE_MASK 0x007FE0
  43. #define DP_TX_DESC_ID_PAGE_OS 5
  44. #define DP_TX_DESC_ID_OFFSET_MASK 0x00001F
  45. #define DP_TX_DESC_ID_OFFSET_OS 0
  46. #endif /* WLAN_SOFTUMAC_SUPPORT */
  47. /*
  48. * Compilation assert on tx desc size
  49. *
  50. * if assert is hit please update POOL_MASK,
  51. * PAGE_MASK according to updated size
  52. *
  53. * for current PAGE mask allowed size range of tx_desc
  54. * is between 128 and 256
  55. */
  56. QDF_COMPILE_TIME_ASSERT(dp_tx_desc_size,
  57. ((sizeof(struct dp_tx_desc_s)) <=
  58. (DP_BLOCKMEM_SIZE >> DP_TX_DESC_ID_PAGE_OS)) &&
  59. ((sizeof(struct dp_tx_desc_s)) >
  60. (DP_BLOCKMEM_SIZE >> (DP_TX_DESC_ID_PAGE_OS + 1)))
  61. );
  62. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  63. #define TX_DESC_LOCK_CREATE(lock)
  64. #define TX_DESC_LOCK_DESTROY(lock)
  65. #define TX_DESC_LOCK_LOCK(lock)
  66. #define TX_DESC_LOCK_UNLOCK(lock)
  67. #define IS_TX_DESC_POOL_STATUS_INACTIVE(pool) \
  68. ((pool)->status == FLOW_POOL_INACTIVE)
  69. #ifdef QCA_AC_BASED_FLOW_CONTROL
  70. #define TX_DESC_POOL_MEMBER_CLEAN(_tx_desc_pool) \
  71. dp_tx_flow_pool_member_clean(_tx_desc_pool)
  72. #else /* !QCA_AC_BASED_FLOW_CONTROL */
  73. #define TX_DESC_POOL_MEMBER_CLEAN(_tx_desc_pool) \
  74. do { \
  75. (_tx_desc_pool)->elem_size = 0; \
  76. (_tx_desc_pool)->freelist = NULL; \
  77. (_tx_desc_pool)->pool_size = 0; \
  78. (_tx_desc_pool)->avail_desc = 0; \
  79. (_tx_desc_pool)->start_th = 0; \
  80. (_tx_desc_pool)->stop_th = 0; \
  81. (_tx_desc_pool)->status = FLOW_POOL_INACTIVE; \
  82. } while (0)
  83. #endif /* QCA_AC_BASED_FLOW_CONTROL */
  84. #else /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  85. #define TX_DESC_LOCK_CREATE(lock) qdf_spinlock_create(lock)
  86. #define TX_DESC_LOCK_DESTROY(lock) qdf_spinlock_destroy(lock)
  87. #define TX_DESC_LOCK_LOCK(lock) qdf_spin_lock_bh(lock)
  88. #define TX_DESC_LOCK_UNLOCK(lock) qdf_spin_unlock_bh(lock)
  89. #define IS_TX_DESC_POOL_STATUS_INACTIVE(pool) (false)
  90. #define TX_DESC_POOL_MEMBER_CLEAN(_tx_desc_pool) \
  91. do { \
  92. (_tx_desc_pool)->elem_size = 0; \
  93. (_tx_desc_pool)->num_allocated = 0; \
  94. (_tx_desc_pool)->freelist = NULL; \
  95. (_tx_desc_pool)->elem_count = 0; \
  96. (_tx_desc_pool)->num_free = 0; \
  97. } while (0)
  98. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  99. #define MAX_POOL_BUFF_COUNT 10000
  100. #ifdef DP_TX_TRACKING
  101. static inline void dp_tx_desc_set_magic(struct dp_tx_desc_s *tx_desc,
  102. uint32_t magic_pattern)
  103. {
  104. tx_desc->magic = magic_pattern;
  105. }
  106. #else
  107. static inline void dp_tx_desc_set_magic(struct dp_tx_desc_s *tx_desc,
  108. uint32_t magic_pattern)
  109. {
  110. }
  111. #endif
  112. /**
  113. * dp_tx_desc_pool_alloc() - Allocate Tx Descriptor pool(s)
  114. * @soc: Handle to DP SoC structure
  115. * @pool_id: pool to allocate
  116. * @num_elem: Number of descriptor elements per pool
  117. * @spcl_tx_desc: if special desc
  118. *
  119. * This function allocates memory for SW tx descriptors
  120. * (used within host for tx data path).
  121. * The number of tx descriptors required will be large
  122. * since based on number of clients (1024 clients x 3 radios),
  123. * outstanding MSDUs stored in TQM queues and LMAC queues will be significantly
  124. * large.
  125. *
  126. * To avoid allocating a large contiguous memory, it uses multi_page_alloc qdf
  127. * function to allocate memory
  128. * in multiple pages. It then iterates through the memory allocated across pages
  129. * and links each descriptor
  130. * to next descriptor, taking care of page boundaries.
  131. *
  132. * Since WiFi 3.0 HW supports multiple Tx rings, multiple pools are allocated,
  133. * one for each ring;
  134. * This minimizes lock contention when hard_start_xmit is called
  135. * from multiple CPUs.
  136. * Alternately, multiple pools can be used for multiple VDEVs for VDEV level
  137. * flow control.
  138. *
  139. * Return: Status code. 0 for success.
  140. */
  141. QDF_STATUS dp_tx_desc_pool_alloc(struct dp_soc *soc, uint8_t pool_id,
  142. uint32_t num_elem, bool spcl_tx_desc);
  143. /**
  144. * dp_tx_desc_pool_init() - Initialize Tx Descriptor pool(s)
  145. * @soc: Handle to DP SoC structure
  146. * @pool_id: pool to allocate
  147. * @num_elem: Number of descriptor elements per pool
  148. * @spcl_tx_desc: if special desc
  149. *
  150. * Return: QDF_STATUS_SUCCESS
  151. * QDF_STATUS_E_FAULT
  152. */
  153. QDF_STATUS dp_tx_desc_pool_init(struct dp_soc *soc, uint8_t pool_id,
  154. uint32_t num_elem, bool spcl_tx_desc);
  155. /**
  156. * dp_tx_desc_pool_free() - Free the tx dexcriptor pools
  157. * @soc: Handle to DP SoC structure
  158. * @pool_id: pool to free
  159. * @spcl_tx_desc: if special desc
  160. *
  161. */
  162. void dp_tx_desc_pool_free(struct dp_soc *soc, uint8_t pool_id,
  163. bool spcl_tx_desc);
  164. /**
  165. * dp_tx_desc_pool_deinit() - de-initialize Tx Descriptor pool(s)
  166. * @soc: Handle to DP SoC structure
  167. * @pool_id: pool to de-initialize
  168. * @spcl_tx_desc: if special desc
  169. *
  170. */
  171. void dp_tx_desc_pool_deinit(struct dp_soc *soc, uint8_t pool_id,
  172. bool spcl_tx_desc);
  173. /**
  174. * dp_tx_ext_desc_pool_alloc_by_id() - allocate TX extension Descriptor pool
  175. * based on pool ID
  176. * @soc: Handle to DP SoC structure
  177. * @num_elem: Number of descriptor elements per pool
  178. * @pool_id: Pool ID
  179. *
  180. * Return - QDF_STATUS_SUCCESS
  181. * QDF_STATUS_E_NOMEM
  182. */
  183. QDF_STATUS dp_tx_ext_desc_pool_alloc_by_id(struct dp_soc *soc,
  184. uint32_t num_elem,
  185. uint8_t pool_id);
  186. /**
  187. * dp_tx_ext_desc_pool_alloc() - allocate Tx extension Descriptor pool(s)
  188. * @soc: Handle to DP SoC structure
  189. * @num_pool: Number of pools to allocate
  190. * @num_elem: Number of descriptor elements per pool
  191. *
  192. * Return: QDF_STATUS_SUCCESS
  193. * QDF_STATUS_E_NOMEM
  194. */
  195. QDF_STATUS dp_tx_ext_desc_pool_alloc(struct dp_soc *soc, uint8_t num_pool,
  196. uint32_t num_elem);
  197. /**
  198. * dp_tx_ext_desc_pool_init_by_id() - initialize Tx extension Descriptor pool
  199. * based on pool ID
  200. * @soc: Handle to DP SoC structure
  201. * @num_elem: Number of descriptor elements per pool
  202. * @pool_id: Pool ID
  203. *
  204. * Return - QDF_STATUS_SUCCESS
  205. * QDF_STATUS_E_FAULT
  206. */
  207. QDF_STATUS dp_tx_ext_desc_pool_init_by_id(struct dp_soc *soc, uint32_t num_elem,
  208. uint8_t pool_id);
  209. /**
  210. * dp_tx_ext_desc_pool_init() - initialize Tx extension Descriptor pool(s)
  211. * @soc: Handle to DP SoC structure
  212. * @num_pool: Number of pools to initialize
  213. * @num_elem: Number of descriptor elements per pool
  214. *
  215. * Return: QDF_STATUS_SUCCESS
  216. * QDF_STATUS_E_NOMEM
  217. */
  218. QDF_STATUS dp_tx_ext_desc_pool_init(struct dp_soc *soc, uint8_t num_pool,
  219. uint32_t num_elem);
  220. /**
  221. * dp_tx_ext_desc_pool_free_by_id() - free TX extension Descriptor pool
  222. * based on pool ID
  223. * @soc: Handle to DP SoC structure
  224. * @pool_id: Pool ID
  225. *
  226. */
  227. void dp_tx_ext_desc_pool_free_by_id(struct dp_soc *soc, uint8_t pool_id);
  228. /**
  229. * dp_tx_ext_desc_pool_free() - free Tx extension Descriptor pool(s)
  230. * @soc: Handle to DP SoC structure
  231. * @num_pool: Number of pools to free
  232. *
  233. */
  234. void dp_tx_ext_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  235. /**
  236. * dp_tx_ext_desc_pool_deinit_by_id() - deinit Tx extension Descriptor pool
  237. * based on pool ID
  238. * @soc: Handle to DP SoC structure
  239. * @pool_id: Pool ID
  240. *
  241. */
  242. void dp_tx_ext_desc_pool_deinit_by_id(struct dp_soc *soc, uint8_t pool_id);
  243. /**
  244. * dp_tx_ext_desc_pool_deinit() - deinit Tx extension Descriptor pool(s)
  245. * @soc: Handle to DP SoC structure
  246. * @num_pool: Number of pools to de-initialize
  247. *
  248. */
  249. void dp_tx_ext_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  250. /**
  251. * dp_tx_tso_desc_pool_alloc_by_id() - allocate TSO Descriptor pool based
  252. * on pool ID
  253. * @soc: Handle to DP SoC structure
  254. * @num_elem: Number of descriptor elements per pool
  255. * @pool_id: Pool ID
  256. *
  257. * Return - QDF_STATUS_SUCCESS
  258. * QDF_STATUS_E_NOMEM
  259. */
  260. QDF_STATUS dp_tx_tso_desc_pool_alloc_by_id(struct dp_soc *soc, uint32_t num_elem,
  261. uint8_t pool_id);
  262. /**
  263. * dp_tx_tso_desc_pool_alloc() - allocate TSO Descriptor pool(s)
  264. * @soc: Handle to DP SoC structure
  265. * @num_pool: Number of pools to allocate
  266. * @num_elem: Number of descriptor elements per pool
  267. *
  268. * Return: QDF_STATUS_SUCCESS
  269. * QDF_STATUS_E_NOMEM
  270. */
  271. QDF_STATUS dp_tx_tso_desc_pool_alloc(struct dp_soc *soc, uint8_t num_pool,
  272. uint32_t num_elem);
  273. /**
  274. * dp_tx_tso_desc_pool_init_by_id() - initialize TSO Descriptor pool
  275. * based on pool ID
  276. * @soc: Handle to DP SoC structure
  277. * @num_elem: Number of descriptor elements per pool
  278. * @pool_id: Pool ID
  279. *
  280. * Return - QDF_STATUS_SUCCESS
  281. * QDF_STATUS_E_NOMEM
  282. */
  283. QDF_STATUS dp_tx_tso_desc_pool_init_by_id(struct dp_soc *soc, uint32_t num_elem,
  284. uint8_t pool_id);
  285. /**
  286. * dp_tx_tso_desc_pool_init() - initialize TSO Descriptor pool(s)
  287. * @soc: Handle to DP SoC structure
  288. * @num_pool: Number of pools to initialize
  289. * @num_elem: Number of descriptor elements per pool
  290. *
  291. * Return: QDF_STATUS_SUCCESS
  292. * QDF_STATUS_E_NOMEM
  293. */
  294. QDF_STATUS dp_tx_tso_desc_pool_init(struct dp_soc *soc, uint8_t num_pool,
  295. uint32_t num_elem);
  296. /**
  297. * dp_tx_tso_desc_pool_free_by_id() - free TSO Descriptor pool based on pool ID
  298. * @soc: Handle to DP SoC structure
  299. * @pool_id: Pool ID
  300. */
  301. void dp_tx_tso_desc_pool_free_by_id(struct dp_soc *soc, uint8_t pool_id);
  302. /**
  303. * dp_tx_tso_desc_pool_free() - free TSO Descriptor pool(s)
  304. * @soc: Handle to DP SoC structure
  305. * @num_pool: Number of pools to free
  306. *
  307. */
  308. void dp_tx_tso_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  309. /**
  310. * dp_tx_tso_desc_pool_deinit_by_id() - deinitialize TSO Descriptor pool
  311. * based on pool ID
  312. * @soc: Handle to DP SoC structure
  313. * @pool_id: Pool ID
  314. */
  315. void dp_tx_tso_desc_pool_deinit_by_id(struct dp_soc *soc, uint8_t pool_id);
  316. /**
  317. * dp_tx_tso_desc_pool_deinit() - deinitialize TSO Descriptor pool(s)
  318. * @soc: Handle to DP SoC structure
  319. * @num_pool: Number of pools to free
  320. *
  321. */
  322. void dp_tx_tso_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  323. /**
  324. * dp_tx_tso_num_seg_pool_alloc_by_id() - Allocate descriptors that tracks the
  325. * fragments in each tso segment based on pool ID
  326. * @soc: handle to dp soc structure
  327. * @num_elem: total number of descriptors to be allocated
  328. * @pool_id: Pool ID
  329. *
  330. * Return - QDF_STATUS_SUCCESS
  331. * QDF_STATUS_E_NOMEM
  332. */
  333. QDF_STATUS dp_tx_tso_num_seg_pool_alloc_by_id(struct dp_soc *soc,
  334. uint32_t num_elem,
  335. uint8_t pool_id);
  336. /**
  337. * dp_tx_tso_num_seg_pool_alloc() - Allocate descriptors that tracks the
  338. * fragments in each tso segment
  339. *
  340. * @soc: handle to dp soc structure
  341. * @num_pool: number of pools to allocate
  342. * @num_elem: total number of descriptors to be allocated
  343. *
  344. * Return: QDF_STATUS_SUCCESS
  345. * QDF_STATUS_E_NOMEM
  346. */
  347. QDF_STATUS dp_tx_tso_num_seg_pool_alloc(struct dp_soc *soc, uint8_t num_pool,
  348. uint32_t num_elem);
  349. /**
  350. * dp_tx_tso_num_seg_pool_init_by_id() - Initialize descriptors that tracks the
  351. * fragments in each tso segment based on pool ID
  352. *
  353. * @soc: handle to dp soc structure
  354. * @num_elem: total number of descriptors to be initialized
  355. * @pool_id: Pool ID
  356. *
  357. * Return - QDF_STATUS_SUCCESS
  358. * QDF_STATUS_E_FAULT
  359. */
  360. QDF_STATUS dp_tx_tso_num_seg_pool_init_by_id(struct dp_soc *soc,
  361. uint32_t num_elem,
  362. uint8_t pool_id);
  363. /**
  364. * dp_tx_tso_num_seg_pool_init() - Initialize descriptors that tracks the
  365. * fragments in each tso segment
  366. *
  367. * @soc: handle to dp soc structure
  368. * @num_pool: number of pools to initialize
  369. * @num_elem: total number of descriptors to be initialized
  370. *
  371. * Return: QDF_STATUS_SUCCESS
  372. * QDF_STATUS_E_FAULT
  373. */
  374. QDF_STATUS dp_tx_tso_num_seg_pool_init(struct dp_soc *soc, uint8_t num_pool,
  375. uint32_t num_elem);
  376. /**
  377. * dp_tx_tso_num_seg_pool_free_by_id() - free descriptors that tracks the
  378. * fragments in each tso segment based on pool ID
  379. *
  380. * @soc: handle to dp soc structure
  381. * @pool_id: Pool ID
  382. */
  383. void dp_tx_tso_num_seg_pool_free_by_id(struct dp_soc *soc, uint8_t pool_id);
  384. /**
  385. * dp_tx_tso_num_seg_pool_free() - free descriptors that tracks the
  386. * fragments in each tso segment
  387. *
  388. * @soc: handle to dp soc structure
  389. * @num_pool: number of pools to free
  390. */
  391. void dp_tx_tso_num_seg_pool_free(struct dp_soc *soc, uint8_t num_pool);
  392. /**
  393. * dp_tx_tso_num_seg_pool_deinit_by_id() - de-initialize descriptors that tracks
  394. * the fragments in each tso segment based on pool ID
  395. * @soc: handle to dp soc structure
  396. * @pool_id: Pool ID
  397. */
  398. void dp_tx_tso_num_seg_pool_deinit_by_id(struct dp_soc *soc, uint8_t pool_id);
  399. /**
  400. * dp_tx_tso_num_seg_pool_deinit() - de-initialize descriptors that tracks the
  401. * fragments in each tso segment
  402. *
  403. * @soc: handle to dp soc structure
  404. * @num_pool: number of pools to de-initialize
  405. *
  406. * Return: QDF_STATUS_SUCCESS
  407. * QDF_STATUS_E_FAULT
  408. */
  409. void dp_tx_tso_num_seg_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  410. #ifdef DP_UMAC_HW_RESET_SUPPORT
  411. /**
  412. * dp_tx_desc_pool_cleanup() - Clean up the tx dexcriptor pools
  413. * @soc: Handle to DP SoC structure
  414. * @nbuf_list: nbuf list for delayed free
  415. *
  416. */
  417. void dp_tx_desc_pool_cleanup(struct dp_soc *soc, qdf_nbuf_t *nbuf_list);
  418. #endif
  419. /**
  420. * dp_tx_desc_clear() - Clear contents of tx desc
  421. * @tx_desc: descriptor to free
  422. *
  423. * Return: none
  424. */
  425. static inline void
  426. dp_tx_desc_clear(struct dp_tx_desc_s *tx_desc)
  427. {
  428. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  429. tx_desc->nbuf = NULL;
  430. tx_desc->flags = 0;
  431. tx_desc->next = NULL;
  432. }
  433. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  434. void dp_tx_flow_control_init(struct dp_soc *);
  435. void dp_tx_flow_control_deinit(struct dp_soc *);
  436. QDF_STATUS dp_txrx_register_pause_cb(struct cdp_soc_t *soc,
  437. tx_pause_callback pause_cb);
  438. QDF_STATUS dp_tx_flow_pool_map(struct cdp_soc_t *soc, uint8_t pdev_id,
  439. uint8_t vdev_id);
  440. void dp_tx_flow_pool_unmap(struct cdp_soc_t *handle, uint8_t pdev_id,
  441. uint8_t vdev_id);
  442. void dp_tx_clear_flow_pool_stats(struct dp_soc *soc);
  443. struct dp_tx_desc_pool_s *dp_tx_create_flow_pool(struct dp_soc *soc,
  444. uint8_t flow_pool_id, uint32_t flow_pool_size);
  445. QDF_STATUS dp_tx_flow_pool_map_handler(struct dp_pdev *pdev, uint8_t flow_id,
  446. uint8_t flow_type, uint8_t flow_pool_id, uint32_t flow_pool_size);
  447. void dp_tx_flow_pool_unmap_handler(struct dp_pdev *pdev, uint8_t flow_id,
  448. uint8_t flow_type, uint8_t flow_pool_id);
  449. /**
  450. * dp_tx_get_desc_flow_pool() - get descriptor from flow pool
  451. * @pool: flow pool
  452. *
  453. * Caller needs to take lock and do sanity checks.
  454. *
  455. * Return: tx descriptor
  456. */
  457. static inline
  458. struct dp_tx_desc_s *dp_tx_get_desc_flow_pool(struct dp_tx_desc_pool_s *pool)
  459. {
  460. struct dp_tx_desc_s *tx_desc = pool->freelist;
  461. pool->freelist = pool->freelist->next;
  462. pool->avail_desc--;
  463. return tx_desc;
  464. }
  465. /**
  466. * dp_tx_put_desc_flow_pool() - put descriptor to flow pool freelist
  467. * @pool: flow pool
  468. * @tx_desc: tx descriptor
  469. *
  470. * Caller needs to take lock and do sanity checks.
  471. *
  472. * Return: none
  473. */
  474. static inline
  475. void dp_tx_put_desc_flow_pool(struct dp_tx_desc_pool_s *pool,
  476. struct dp_tx_desc_s *tx_desc)
  477. {
  478. tx_desc->next = pool->freelist;
  479. pool->freelist = tx_desc;
  480. pool->avail_desc++;
  481. }
  482. static inline void
  483. dp_tx_desc_free_list(struct dp_tx_desc_pool_s *pool,
  484. struct dp_tx_desc_s *head_desc,
  485. struct dp_tx_desc_s *tail_desc,
  486. uint32_t fast_desc_count)
  487. {
  488. }
  489. #ifdef QCA_AC_BASED_FLOW_CONTROL
  490. /**
  491. * dp_tx_flow_pool_member_clean() - Clean the members of TX flow pool
  492. * @pool: flow pool
  493. *
  494. * Return: None
  495. */
  496. static inline void
  497. dp_tx_flow_pool_member_clean(struct dp_tx_desc_pool_s *pool)
  498. {
  499. pool->elem_size = 0;
  500. pool->freelist = NULL;
  501. pool->pool_size = 0;
  502. pool->avail_desc = 0;
  503. qdf_mem_zero(pool->start_th, FL_TH_MAX);
  504. qdf_mem_zero(pool->stop_th, FL_TH_MAX);
  505. pool->status = FLOW_POOL_INACTIVE;
  506. }
  507. /**
  508. * dp_tx_is_threshold_reached() - Check if current avail desc meet threshold
  509. * @pool: flow pool
  510. * @avail_desc: available descriptor number
  511. *
  512. * Return: true if threshold is met, false if not
  513. */
  514. static inline bool
  515. dp_tx_is_threshold_reached(struct dp_tx_desc_pool_s *pool, uint16_t avail_desc)
  516. {
  517. if (qdf_unlikely(avail_desc == pool->stop_th[DP_TH_BE_BK]))
  518. return true;
  519. else if (qdf_unlikely(avail_desc == pool->stop_th[DP_TH_VI]))
  520. return true;
  521. else if (qdf_unlikely(avail_desc == pool->stop_th[DP_TH_VO]))
  522. return true;
  523. else if (qdf_unlikely(avail_desc == pool->stop_th[DP_TH_HI]))
  524. return true;
  525. else
  526. return false;
  527. }
  528. /**
  529. * dp_tx_adjust_flow_pool_state() - Adjust flow pool state
  530. * @soc: dp soc
  531. * @pool: flow pool
  532. */
  533. static inline void
  534. dp_tx_adjust_flow_pool_state(struct dp_soc *soc,
  535. struct dp_tx_desc_pool_s *pool)
  536. {
  537. if (pool->avail_desc > pool->stop_th[DP_TH_BE_BK]) {
  538. pool->status = FLOW_POOL_ACTIVE_UNPAUSED;
  539. return;
  540. } else if (pool->avail_desc <= pool->stop_th[DP_TH_BE_BK] &&
  541. pool->avail_desc > pool->stop_th[DP_TH_VI]) {
  542. pool->status = FLOW_POOL_BE_BK_PAUSED;
  543. } else if (pool->avail_desc <= pool->stop_th[DP_TH_VI] &&
  544. pool->avail_desc > pool->stop_th[DP_TH_VO]) {
  545. pool->status = FLOW_POOL_VI_PAUSED;
  546. } else if (pool->avail_desc <= pool->stop_th[DP_TH_VO] &&
  547. pool->avail_desc > pool->stop_th[DP_TH_HI]) {
  548. pool->status = FLOW_POOL_VO_PAUSED;
  549. } else if (pool->avail_desc <= pool->stop_th[DP_TH_HI]) {
  550. pool->status = FLOW_POOL_ACTIVE_PAUSED;
  551. }
  552. switch (pool->status) {
  553. case FLOW_POOL_ACTIVE_PAUSED:
  554. soc->pause_cb(pool->flow_pool_id,
  555. WLAN_NETIF_PRIORITY_QUEUE_OFF,
  556. WLAN_DATA_FLOW_CTRL_PRI);
  557. fallthrough;
  558. case FLOW_POOL_VO_PAUSED:
  559. soc->pause_cb(pool->flow_pool_id,
  560. WLAN_NETIF_VO_QUEUE_OFF,
  561. WLAN_DATA_FLOW_CTRL_VO);
  562. fallthrough;
  563. case FLOW_POOL_VI_PAUSED:
  564. soc->pause_cb(pool->flow_pool_id,
  565. WLAN_NETIF_VI_QUEUE_OFF,
  566. WLAN_DATA_FLOW_CTRL_VI);
  567. fallthrough;
  568. case FLOW_POOL_BE_BK_PAUSED:
  569. soc->pause_cb(pool->flow_pool_id,
  570. WLAN_NETIF_BE_BK_QUEUE_OFF,
  571. WLAN_DATA_FLOW_CTRL_BE_BK);
  572. break;
  573. default:
  574. dp_err("Invalid pool status:%u to adjust", pool->status);
  575. }
  576. }
  577. /**
  578. * dp_tx_desc_alloc() - Allocate a Software Tx descriptor from given pool
  579. * @soc: Handle to DP SoC structure
  580. * @desc_pool_id: ID of the flow control fool
  581. *
  582. * Return: TX descriptor allocated or NULL
  583. */
  584. static inline struct dp_tx_desc_s *
  585. dp_tx_desc_alloc(struct dp_soc *soc, uint8_t desc_pool_id)
  586. {
  587. struct dp_tx_desc_s *tx_desc = NULL;
  588. struct dp_tx_desc_pool_s *pool = &soc->tx_desc[desc_pool_id];
  589. bool is_pause = false;
  590. enum netif_action_type act = WLAN_NETIF_ACTION_TYPE_NONE;
  591. enum dp_fl_ctrl_threshold level = DP_TH_BE_BK;
  592. enum netif_reason_type reason;
  593. if (qdf_likely(pool)) {
  594. qdf_spin_lock_bh(&pool->flow_pool_lock);
  595. if (qdf_likely(pool->avail_desc &&
  596. pool->status != FLOW_POOL_INVALID &&
  597. pool->status != FLOW_POOL_INACTIVE)) {
  598. tx_desc = dp_tx_get_desc_flow_pool(pool);
  599. tx_desc->pool_id = desc_pool_id;
  600. tx_desc->flags = DP_TX_DESC_FLAG_ALLOCATED;
  601. dp_tx_desc_set_magic(tx_desc,
  602. DP_TX_MAGIC_PATTERN_INUSE);
  603. is_pause = dp_tx_is_threshold_reached(pool,
  604. pool->avail_desc);
  605. if (qdf_unlikely(pool->status ==
  606. FLOW_POOL_ACTIVE_UNPAUSED_REATTACH)) {
  607. dp_tx_adjust_flow_pool_state(soc, pool);
  608. is_pause = false;
  609. }
  610. if (qdf_unlikely(is_pause)) {
  611. switch (pool->status) {
  612. case FLOW_POOL_ACTIVE_UNPAUSED:
  613. /* pause network BE\BK queue */
  614. act = WLAN_NETIF_BE_BK_QUEUE_OFF;
  615. reason = WLAN_DATA_FLOW_CTRL_BE_BK;
  616. level = DP_TH_BE_BK;
  617. pool->status = FLOW_POOL_BE_BK_PAUSED;
  618. break;
  619. case FLOW_POOL_BE_BK_PAUSED:
  620. /* pause network VI queue */
  621. act = WLAN_NETIF_VI_QUEUE_OFF;
  622. reason = WLAN_DATA_FLOW_CTRL_VI;
  623. level = DP_TH_VI;
  624. pool->status = FLOW_POOL_VI_PAUSED;
  625. break;
  626. case FLOW_POOL_VI_PAUSED:
  627. /* pause network VO queue */
  628. act = WLAN_NETIF_VO_QUEUE_OFF;
  629. reason = WLAN_DATA_FLOW_CTRL_VO;
  630. level = DP_TH_VO;
  631. pool->status = FLOW_POOL_VO_PAUSED;
  632. break;
  633. case FLOW_POOL_VO_PAUSED:
  634. /* pause network HI PRI queue */
  635. act = WLAN_NETIF_PRIORITY_QUEUE_OFF;
  636. reason = WLAN_DATA_FLOW_CTRL_PRI;
  637. level = DP_TH_HI;
  638. pool->status = FLOW_POOL_ACTIVE_PAUSED;
  639. break;
  640. case FLOW_POOL_ACTIVE_PAUSED:
  641. act = WLAN_NETIF_ACTION_TYPE_NONE;
  642. break;
  643. default:
  644. dp_err_rl("pool status is %d!",
  645. pool->status);
  646. break;
  647. }
  648. if (act != WLAN_NETIF_ACTION_TYPE_NONE) {
  649. pool->latest_pause_time[level] =
  650. qdf_get_system_timestamp();
  651. soc->pause_cb(desc_pool_id,
  652. act,
  653. reason);
  654. }
  655. }
  656. } else {
  657. pool->pkt_drop_no_desc++;
  658. }
  659. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  660. } else {
  661. dp_err_rl("NULL desc pool pool_id %d", desc_pool_id);
  662. soc->pool_stats.pkt_drop_no_pool++;
  663. }
  664. return tx_desc;
  665. }
  666. /**
  667. * dp_tx_desc_free() - Free a tx descriptor and attach it to free list
  668. * @soc: Handle to DP SoC structure
  669. * @tx_desc: the tx descriptor to be freed
  670. * @desc_pool_id: ID of the flow control pool
  671. *
  672. * Return: None
  673. */
  674. static inline void
  675. dp_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  676. uint8_t desc_pool_id)
  677. {
  678. struct dp_tx_desc_pool_s *pool = &soc->tx_desc[desc_pool_id];
  679. qdf_time_t unpause_time = qdf_get_system_timestamp(), pause_dur;
  680. enum netif_action_type act = WLAN_WAKE_ALL_NETIF_QUEUE;
  681. enum netif_reason_type reason;
  682. qdf_spin_lock_bh(&pool->flow_pool_lock);
  683. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  684. tx_desc->nbuf = NULL;
  685. tx_desc->flags = 0;
  686. dp_tx_desc_set_magic(tx_desc, DP_TX_MAGIC_PATTERN_FREE);
  687. dp_tx_put_desc_flow_pool(pool, tx_desc);
  688. switch (pool->status) {
  689. case FLOW_POOL_ACTIVE_PAUSED:
  690. if (pool->avail_desc > pool->start_th[DP_TH_HI]) {
  691. act = WLAN_NETIF_PRIORITY_QUEUE_ON;
  692. reason = WLAN_DATA_FLOW_CTRL_PRI;
  693. pool->status = FLOW_POOL_VO_PAUSED;
  694. /* Update maximum pause duration for HI queue */
  695. pause_dur = unpause_time -
  696. pool->latest_pause_time[DP_TH_HI];
  697. if (pool->max_pause_time[DP_TH_HI] < pause_dur)
  698. pool->max_pause_time[DP_TH_HI] = pause_dur;
  699. }
  700. break;
  701. case FLOW_POOL_VO_PAUSED:
  702. if (pool->avail_desc > pool->start_th[DP_TH_VO]) {
  703. act = WLAN_NETIF_VO_QUEUE_ON;
  704. reason = WLAN_DATA_FLOW_CTRL_VO;
  705. pool->status = FLOW_POOL_VI_PAUSED;
  706. /* Update maximum pause duration for VO queue */
  707. pause_dur = unpause_time -
  708. pool->latest_pause_time[DP_TH_VO];
  709. if (pool->max_pause_time[DP_TH_VO] < pause_dur)
  710. pool->max_pause_time[DP_TH_VO] = pause_dur;
  711. }
  712. break;
  713. case FLOW_POOL_VI_PAUSED:
  714. if (pool->avail_desc > pool->start_th[DP_TH_VI]) {
  715. act = WLAN_NETIF_VI_QUEUE_ON;
  716. reason = WLAN_DATA_FLOW_CTRL_VI;
  717. pool->status = FLOW_POOL_BE_BK_PAUSED;
  718. /* Update maximum pause duration for VI queue */
  719. pause_dur = unpause_time -
  720. pool->latest_pause_time[DP_TH_VI];
  721. if (pool->max_pause_time[DP_TH_VI] < pause_dur)
  722. pool->max_pause_time[DP_TH_VI] = pause_dur;
  723. }
  724. break;
  725. case FLOW_POOL_BE_BK_PAUSED:
  726. if (pool->avail_desc > pool->start_th[DP_TH_BE_BK]) {
  727. act = WLAN_NETIF_BE_BK_QUEUE_ON;
  728. reason = WLAN_DATA_FLOW_CTRL_BE_BK;
  729. pool->status = FLOW_POOL_ACTIVE_UNPAUSED;
  730. /* Update maximum pause duration for BE_BK queue */
  731. pause_dur = unpause_time -
  732. pool->latest_pause_time[DP_TH_BE_BK];
  733. if (pool->max_pause_time[DP_TH_BE_BK] < pause_dur)
  734. pool->max_pause_time[DP_TH_BE_BK] = pause_dur;
  735. }
  736. break;
  737. case FLOW_POOL_INVALID:
  738. if (pool->avail_desc == pool->pool_size) {
  739. dp_tx_desc_pool_deinit(soc, desc_pool_id, false);
  740. dp_tx_desc_pool_free(soc, desc_pool_id, false);
  741. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  742. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  743. "%s %d pool is freed!!",
  744. __func__, __LINE__);
  745. return;
  746. }
  747. break;
  748. case FLOW_POOL_ACTIVE_UNPAUSED:
  749. break;
  750. default:
  751. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  752. "%s %d pool is INACTIVE State!!",
  753. __func__, __LINE__);
  754. break;
  755. };
  756. if (act != WLAN_WAKE_ALL_NETIF_QUEUE)
  757. soc->pause_cb(pool->flow_pool_id,
  758. act, reason);
  759. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  760. }
  761. static inline void
  762. dp_tx_spcl_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  763. uint8_t desc_pool_id)
  764. {
  765. }
  766. static inline struct dp_tx_desc_s *dp_tx_spcl_desc_alloc(struct dp_soc *soc,
  767. uint8_t desc_pool_id)
  768. {
  769. return NULL;
  770. }
  771. #else /* QCA_AC_BASED_FLOW_CONTROL */
  772. static inline bool
  773. dp_tx_is_threshold_reached(struct dp_tx_desc_pool_s *pool, uint16_t avail_desc)
  774. {
  775. if (qdf_unlikely(avail_desc < pool->stop_th))
  776. return true;
  777. else
  778. return false;
  779. }
  780. /**
  781. * dp_tx_desc_alloc() - Allocate a Software Tx Descriptor from given pool
  782. * @soc: Handle to DP SoC structure
  783. * @desc_pool_id:
  784. *
  785. * Return: Tx descriptor or NULL
  786. */
  787. static inline struct dp_tx_desc_s *
  788. dp_tx_desc_alloc(struct dp_soc *soc, uint8_t desc_pool_id)
  789. {
  790. struct dp_tx_desc_s *tx_desc = NULL;
  791. struct dp_tx_desc_pool_s *pool = &soc->tx_desc[desc_pool_id];
  792. if (pool) {
  793. qdf_spin_lock_bh(&pool->flow_pool_lock);
  794. if (pool->status <= FLOW_POOL_ACTIVE_PAUSED &&
  795. pool->avail_desc) {
  796. tx_desc = dp_tx_get_desc_flow_pool(pool);
  797. tx_desc->pool_id = desc_pool_id;
  798. tx_desc->flags = DP_TX_DESC_FLAG_ALLOCATED;
  799. dp_tx_desc_set_magic(tx_desc,
  800. DP_TX_MAGIC_PATTERN_INUSE);
  801. if (qdf_unlikely(pool->avail_desc < pool->stop_th)) {
  802. pool->status = FLOW_POOL_ACTIVE_PAUSED;
  803. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  804. /* pause network queues */
  805. soc->pause_cb(desc_pool_id,
  806. WLAN_STOP_ALL_NETIF_QUEUE,
  807. WLAN_DATA_FLOW_CONTROL);
  808. } else {
  809. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  810. }
  811. } else {
  812. pool->pkt_drop_no_desc++;
  813. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  814. }
  815. } else {
  816. soc->pool_stats.pkt_drop_no_pool++;
  817. }
  818. return tx_desc;
  819. }
  820. static inline struct dp_tx_desc_s *dp_tx_spcl_desc_alloc(struct dp_soc *soc,
  821. uint8_t desc_pool_id)
  822. {
  823. return NULL;
  824. }
  825. /**
  826. * dp_tx_desc_free() - Free a tx descriptor and attach it to free list
  827. * @soc: Handle to DP SoC structure
  828. * @tx_desc: Descriptor to free
  829. * @desc_pool_id: Descriptor pool Id
  830. *
  831. * Return: None
  832. */
  833. static inline void
  834. dp_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  835. uint8_t desc_pool_id)
  836. {
  837. struct dp_tx_desc_pool_s *pool = &soc->tx_desc[desc_pool_id];
  838. qdf_spin_lock_bh(&pool->flow_pool_lock);
  839. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  840. tx_desc->nbuf = NULL;
  841. tx_desc->flags = 0;
  842. dp_tx_desc_set_magic(tx_desc, DP_TX_MAGIC_PATTERN_FREE);
  843. dp_tx_put_desc_flow_pool(pool, tx_desc);
  844. switch (pool->status) {
  845. case FLOW_POOL_ACTIVE_PAUSED:
  846. if (pool->avail_desc > pool->start_th) {
  847. soc->pause_cb(pool->flow_pool_id,
  848. WLAN_WAKE_ALL_NETIF_QUEUE,
  849. WLAN_DATA_FLOW_CONTROL);
  850. pool->status = FLOW_POOL_ACTIVE_UNPAUSED;
  851. }
  852. break;
  853. case FLOW_POOL_INVALID:
  854. if (pool->avail_desc == pool->pool_size) {
  855. dp_tx_desc_pool_deinit(soc, desc_pool_id, false);
  856. dp_tx_desc_pool_free(soc, desc_pool_id, false);
  857. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  858. qdf_print("%s %d pool is freed!!",
  859. __func__, __LINE__);
  860. return;
  861. }
  862. break;
  863. case FLOW_POOL_ACTIVE_UNPAUSED:
  864. break;
  865. default:
  866. qdf_print("%s %d pool is INACTIVE State!!",
  867. __func__, __LINE__);
  868. break;
  869. };
  870. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  871. }
  872. static inline void
  873. dp_tx_spcl_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  874. uint8_t desc_pool_id)
  875. {
  876. }
  877. #endif /* QCA_AC_BASED_FLOW_CONTROL */
  878. static inline bool
  879. dp_tx_desc_thresh_reached(struct cdp_soc_t *soc_hdl, uint8_t vdev_id)
  880. {
  881. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  882. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  883. DP_MOD_ID_CDP);
  884. struct dp_tx_desc_pool_s *pool;
  885. bool status;
  886. if (!vdev)
  887. return false;
  888. pool = vdev->pool;
  889. status = dp_tx_is_threshold_reached(pool, pool->avail_desc);
  890. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  891. return status;
  892. }
  893. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  894. static inline void dp_tx_flow_control_init(struct dp_soc *handle)
  895. {
  896. }
  897. static inline void dp_tx_flow_control_deinit(struct dp_soc *handle)
  898. {
  899. }
  900. static inline QDF_STATUS dp_tx_flow_pool_map_handler(struct dp_pdev *pdev,
  901. uint8_t flow_id, uint8_t flow_type, uint8_t flow_pool_id,
  902. uint32_t flow_pool_size)
  903. {
  904. return QDF_STATUS_SUCCESS;
  905. }
  906. static inline void dp_tx_flow_pool_unmap_handler(struct dp_pdev *pdev,
  907. uint8_t flow_id, uint8_t flow_type, uint8_t flow_pool_id)
  908. {
  909. }
  910. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  911. static inline
  912. void dp_tx_prefetch_desc(struct dp_tx_desc_s *tx_desc)
  913. {
  914. if (tx_desc)
  915. prefetch(tx_desc);
  916. }
  917. #else
  918. static inline
  919. void dp_tx_prefetch_desc(struct dp_tx_desc_s *tx_desc)
  920. {
  921. }
  922. #endif
  923. /**
  924. * dp_tx_desc_alloc() - Allocate a Software Tx Descriptor from given pool
  925. * @soc: Handle to DP SoC structure
  926. * @desc_pool_id: pool id
  927. *
  928. * Return: Tx Descriptor or NULL
  929. */
  930. static inline struct dp_tx_desc_s *dp_tx_desc_alloc(struct dp_soc *soc,
  931. uint8_t desc_pool_id)
  932. {
  933. struct dp_tx_desc_s *tx_desc = NULL;
  934. struct dp_tx_desc_pool_s *pool = NULL;
  935. pool = dp_get_tx_desc_pool(soc, desc_pool_id);
  936. TX_DESC_LOCK_LOCK(&pool->lock);
  937. tx_desc = pool->freelist;
  938. /* Pool is exhausted */
  939. if (!tx_desc) {
  940. TX_DESC_LOCK_UNLOCK(&pool->lock);
  941. return NULL;
  942. }
  943. pool->freelist = pool->freelist->next;
  944. pool->num_allocated++;
  945. pool->num_free--;
  946. dp_tx_prefetch_desc(pool->freelist);
  947. tx_desc->flags = DP_TX_DESC_FLAG_ALLOCATED;
  948. TX_DESC_LOCK_UNLOCK(&pool->lock);
  949. return tx_desc;
  950. }
  951. static inline struct dp_tx_desc_s *dp_tx_spcl_desc_alloc(struct dp_soc *soc,
  952. uint8_t desc_pool_id)
  953. {
  954. struct dp_tx_desc_s *tx_desc = NULL;
  955. struct dp_tx_desc_pool_s *pool = NULL;
  956. pool = dp_get_spcl_tx_desc_pool(soc, desc_pool_id);
  957. TX_DESC_LOCK_LOCK(&pool->lock);
  958. tx_desc = pool->freelist;
  959. /* Pool is exhausted */
  960. if (!tx_desc) {
  961. TX_DESC_LOCK_UNLOCK(&pool->lock);
  962. return NULL;
  963. }
  964. pool->freelist = pool->freelist->next;
  965. pool->num_allocated++;
  966. pool->num_free--;
  967. dp_tx_prefetch_desc(pool->freelist);
  968. tx_desc->flags = DP_TX_DESC_FLAG_ALLOCATED;
  969. TX_DESC_LOCK_UNLOCK(&pool->lock);
  970. return tx_desc;
  971. }
  972. /**
  973. * dp_tx_desc_alloc_multiple() - Allocate batch of software Tx Descriptors
  974. * from given pool
  975. * @soc: Handle to DP SoC structure
  976. * @desc_pool_id: pool id should pick up
  977. * @num_requested: number of required descriptor
  978. *
  979. * allocate multiple tx descriptor and make a link
  980. *
  981. * Return: first descriptor pointer or NULL
  982. */
  983. static inline struct dp_tx_desc_s *dp_tx_desc_alloc_multiple(
  984. struct dp_soc *soc, uint8_t desc_pool_id, uint8_t num_requested)
  985. {
  986. struct dp_tx_desc_s *c_desc = NULL, *h_desc = NULL;
  987. uint8_t count;
  988. struct dp_tx_desc_pool_s *pool = NULL;
  989. pool = dp_get_tx_desc_pool(soc, desc_pool_id);
  990. TX_DESC_LOCK_LOCK(&pool->lock);
  991. if ((num_requested == 0) ||
  992. (pool->num_free < num_requested)) {
  993. TX_DESC_LOCK_UNLOCK(&pool->lock);
  994. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  995. "%s, No Free Desc: Available(%d) num_requested(%d)",
  996. __func__, pool->num_free,
  997. num_requested);
  998. return NULL;
  999. }
  1000. h_desc = pool->freelist;
  1001. /* h_desc should never be NULL since num_free > requested */
  1002. qdf_assert_always(h_desc);
  1003. c_desc = h_desc;
  1004. for (count = 0; count < (num_requested - 1); count++) {
  1005. c_desc->flags = DP_TX_DESC_FLAG_ALLOCATED;
  1006. c_desc = c_desc->next;
  1007. }
  1008. pool->num_free -= count;
  1009. pool->num_allocated += count;
  1010. pool->freelist = c_desc->next;
  1011. c_desc->next = NULL;
  1012. TX_DESC_LOCK_UNLOCK(&pool->lock);
  1013. return h_desc;
  1014. }
  1015. /**
  1016. * dp_tx_desc_free() - Free a tx descriptor and attach it to free list
  1017. * @soc: Handle to DP SoC structure
  1018. * @tx_desc: descriptor to free
  1019. * @desc_pool_id: ID of the free pool
  1020. */
  1021. static inline void
  1022. dp_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  1023. uint8_t desc_pool_id)
  1024. {
  1025. struct dp_tx_desc_pool_s *pool = NULL;
  1026. dp_tx_desc_clear(tx_desc);
  1027. pool = dp_get_tx_desc_pool(soc, desc_pool_id);
  1028. TX_DESC_LOCK_LOCK(&pool->lock);
  1029. tx_desc->next = pool->freelist;
  1030. pool->freelist = tx_desc;
  1031. pool->num_allocated--;
  1032. pool->num_free++;
  1033. TX_DESC_LOCK_UNLOCK(&pool->lock);
  1034. }
  1035. static inline void
  1036. dp_tx_spcl_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  1037. uint8_t desc_pool_id)
  1038. {
  1039. struct dp_tx_desc_pool_s *pool = NULL;
  1040. dp_tx_desc_clear(tx_desc);
  1041. pool = dp_get_spcl_tx_desc_pool(soc, desc_pool_id);
  1042. TX_DESC_LOCK_LOCK(&pool->lock);
  1043. tx_desc->next = pool->freelist;
  1044. pool->freelist = tx_desc;
  1045. pool->num_allocated--;
  1046. pool->num_free++;
  1047. TX_DESC_LOCK_UNLOCK(&pool->lock);
  1048. }
  1049. static inline void
  1050. dp_tx_desc_free_list(struct dp_tx_desc_pool_s *pool,
  1051. struct dp_tx_desc_s *head_desc,
  1052. struct dp_tx_desc_s *tail_desc,
  1053. uint32_t fast_desc_count)
  1054. {
  1055. TX_DESC_LOCK_LOCK(&pool->lock);
  1056. pool->num_allocated -= fast_desc_count;
  1057. pool->num_free += fast_desc_count;
  1058. tail_desc->next = pool->freelist;
  1059. pool->freelist = head_desc;
  1060. TX_DESC_LOCK_UNLOCK(&pool->lock);
  1061. }
  1062. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  1063. #ifdef QCA_DP_TX_DESC_ID_CHECK
  1064. /**
  1065. * dp_tx_is_desc_id_valid() - check is the tx desc id valid
  1066. * @soc: Handle to DP SoC structure
  1067. * @tx_desc_id:
  1068. *
  1069. * Return: true or false
  1070. */
  1071. static inline bool
  1072. dp_tx_is_desc_id_valid(struct dp_soc *soc, uint32_t tx_desc_id)
  1073. {
  1074. uint8_t pool_id;
  1075. uint16_t page_id, offset;
  1076. struct dp_tx_desc_pool_s *pool;
  1077. pool_id = (tx_desc_id & DP_TX_DESC_ID_POOL_MASK) >>
  1078. DP_TX_DESC_ID_POOL_OS;
  1079. /* Pool ID is out of limit */
  1080. if (pool_id > wlan_cfg_get_num_tx_desc_pool(
  1081. soc->wlan_cfg_ctx)) {
  1082. QDF_TRACE(QDF_MODULE_ID_DP,
  1083. QDF_TRACE_LEVEL_FATAL,
  1084. "%s:Tx Comp pool id %d not valid",
  1085. __func__,
  1086. pool_id);
  1087. goto warn_exit;
  1088. }
  1089. pool = &soc->tx_desc[pool_id];
  1090. /* the pool is freed */
  1091. if (IS_TX_DESC_POOL_STATUS_INACTIVE(pool)) {
  1092. QDF_TRACE(QDF_MODULE_ID_DP,
  1093. QDF_TRACE_LEVEL_FATAL,
  1094. "%s:the pool %d has been freed",
  1095. __func__,
  1096. pool_id);
  1097. goto warn_exit;
  1098. }
  1099. page_id = (tx_desc_id & DP_TX_DESC_ID_PAGE_MASK) >>
  1100. DP_TX_DESC_ID_PAGE_OS;
  1101. /* the page id is out of limit */
  1102. if (page_id >= pool->desc_pages.num_pages) {
  1103. QDF_TRACE(QDF_MODULE_ID_DP,
  1104. QDF_TRACE_LEVEL_FATAL,
  1105. "%s:the page id %d invalid, pool id %d, num_page %d",
  1106. __func__,
  1107. page_id,
  1108. pool_id,
  1109. pool->desc_pages.num_pages);
  1110. goto warn_exit;
  1111. }
  1112. offset = (tx_desc_id & DP_TX_DESC_ID_OFFSET_MASK) >>
  1113. DP_TX_DESC_ID_OFFSET_OS;
  1114. /* the offset is out of limit */
  1115. if (offset >= pool->desc_pages.num_element_per_page) {
  1116. QDF_TRACE(QDF_MODULE_ID_DP,
  1117. QDF_TRACE_LEVEL_FATAL,
  1118. "%s:offset %d invalid, pool%d,num_elem_per_page %d",
  1119. __func__,
  1120. offset,
  1121. pool_id,
  1122. pool->desc_pages.num_element_per_page);
  1123. goto warn_exit;
  1124. }
  1125. return true;
  1126. warn_exit:
  1127. QDF_TRACE(QDF_MODULE_ID_DP,
  1128. QDF_TRACE_LEVEL_FATAL,
  1129. "%s:Tx desc id 0x%x not valid",
  1130. __func__,
  1131. tx_desc_id);
  1132. qdf_assert_always(0);
  1133. return false;
  1134. }
  1135. #else
  1136. static inline bool
  1137. dp_tx_is_desc_id_valid(struct dp_soc *soc, uint32_t tx_desc_id)
  1138. {
  1139. return true;
  1140. }
  1141. #endif /* QCA_DP_TX_DESC_ID_CHECK */
  1142. #ifdef QCA_DP_TX_DESC_FAST_COMP_ENABLE
  1143. static inline void dp_tx_desc_update_fast_comp_flag(struct dp_soc *soc,
  1144. struct dp_tx_desc_s *desc,
  1145. uint8_t allow_fast_comp)
  1146. {
  1147. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_TO_FW)) &&
  1148. qdf_likely(allow_fast_comp)) {
  1149. desc->flags |= DP_TX_DESC_FLAG_SIMPLE;
  1150. }
  1151. }
  1152. #else
  1153. static inline void dp_tx_desc_update_fast_comp_flag(struct dp_soc *soc,
  1154. struct dp_tx_desc_s *desc,
  1155. uint8_t allow_fast_comp)
  1156. {
  1157. }
  1158. #endif /* QCA_DP_TX_DESC_FAST_COMP_ENABLE */
  1159. /**
  1160. * dp_tx_desc_find() - find dp tx descriptor from pool/page/offset
  1161. * @soc: handle for the device sending the data
  1162. * @pool_id:
  1163. * @page_id:
  1164. * @offset:
  1165. *
  1166. * Use page and offset to find the corresponding descriptor object in
  1167. * the given descriptor pool.
  1168. *
  1169. * Return: the descriptor object that has the specified ID
  1170. */
  1171. static inline struct dp_tx_desc_s *dp_tx_desc_find(struct dp_soc *soc,
  1172. uint8_t pool_id, uint16_t page_id, uint16_t offset)
  1173. {
  1174. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  1175. tx_desc_pool = dp_get_tx_desc_pool(soc, pool_id);
  1176. return tx_desc_pool->desc_pages.cacheable_pages[page_id] +
  1177. tx_desc_pool->elem_size * offset;
  1178. }
  1179. /**
  1180. * dp_tx_ext_desc_alloc() - Get tx extension descriptor from pool
  1181. * @soc: handle for the device sending the data
  1182. * @desc_pool_id: target pool id
  1183. *
  1184. * Return: None
  1185. */
  1186. static inline
  1187. struct dp_tx_ext_desc_elem_s *dp_tx_ext_desc_alloc(struct dp_soc *soc,
  1188. uint8_t desc_pool_id)
  1189. {
  1190. struct dp_tx_ext_desc_elem_s *c_elem;
  1191. desc_pool_id = dp_tx_ext_desc_pool_override(desc_pool_id);
  1192. qdf_spin_lock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1193. if (soc->tx_ext_desc[desc_pool_id].num_free <= 0) {
  1194. qdf_spin_unlock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1195. return NULL;
  1196. }
  1197. c_elem = soc->tx_ext_desc[desc_pool_id].freelist;
  1198. soc->tx_ext_desc[desc_pool_id].freelist =
  1199. soc->tx_ext_desc[desc_pool_id].freelist->next;
  1200. soc->tx_ext_desc[desc_pool_id].num_free--;
  1201. qdf_spin_unlock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1202. return c_elem;
  1203. }
  1204. /**
  1205. * dp_tx_ext_desc_free() - Release tx extension descriptor to the pool
  1206. * @soc: handle for the device sending the data
  1207. * @elem: ext descriptor pointer should release
  1208. * @desc_pool_id: target pool id
  1209. *
  1210. * Return: None
  1211. */
  1212. static inline void dp_tx_ext_desc_free(struct dp_soc *soc,
  1213. struct dp_tx_ext_desc_elem_s *elem, uint8_t desc_pool_id)
  1214. {
  1215. desc_pool_id = dp_tx_ext_desc_pool_override(desc_pool_id);
  1216. qdf_spin_lock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1217. elem->next = soc->tx_ext_desc[desc_pool_id].freelist;
  1218. soc->tx_ext_desc[desc_pool_id].freelist = elem;
  1219. soc->tx_ext_desc[desc_pool_id].num_free++;
  1220. qdf_spin_unlock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1221. return;
  1222. }
  1223. /**
  1224. * dp_tx_ext_desc_free_multiple() - Free multiple tx extension descriptor and
  1225. * attach it to free list
  1226. * @soc: Handle to DP SoC structure
  1227. * @desc_pool_id: pool id should pick up
  1228. * @elem: tx descriptor should be freed
  1229. * @num_free: number of descriptors should be freed
  1230. *
  1231. * Return: none
  1232. */
  1233. static inline void dp_tx_ext_desc_free_multiple(struct dp_soc *soc,
  1234. struct dp_tx_ext_desc_elem_s *elem, uint8_t desc_pool_id,
  1235. uint8_t num_free)
  1236. {
  1237. struct dp_tx_ext_desc_elem_s *head, *tail, *c_elem;
  1238. uint8_t freed = num_free;
  1239. /* caller should always guarantee atleast list of num_free nodes */
  1240. qdf_assert_always(elem);
  1241. head = elem;
  1242. c_elem = head;
  1243. tail = head;
  1244. while (c_elem && freed) {
  1245. tail = c_elem;
  1246. c_elem = c_elem->next;
  1247. freed--;
  1248. }
  1249. /* caller should always guarantee atleast list of num_free nodes */
  1250. qdf_assert_always(tail);
  1251. desc_pool_id = dp_tx_ext_desc_pool_override(desc_pool_id);
  1252. qdf_spin_lock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1253. tail->next = soc->tx_ext_desc[desc_pool_id].freelist;
  1254. soc->tx_ext_desc[desc_pool_id].freelist = head;
  1255. soc->tx_ext_desc[desc_pool_id].num_free += num_free;
  1256. qdf_spin_unlock_bh(&soc->tx_ext_desc[desc_pool_id].lock);
  1257. return;
  1258. }
  1259. #if defined(FEATURE_TSO)
  1260. /**
  1261. * dp_tx_tso_desc_alloc() - function to allocate a TSO segment
  1262. * @soc: device soc instance
  1263. * @pool_id: pool id should pick up tso descriptor
  1264. *
  1265. * Allocates a TSO segment element from the free list held in
  1266. * the soc
  1267. *
  1268. * Return: tso_seg, tso segment memory pointer
  1269. */
  1270. static inline struct qdf_tso_seg_elem_t *dp_tx_tso_desc_alloc(
  1271. struct dp_soc *soc, uint8_t pool_id)
  1272. {
  1273. struct qdf_tso_seg_elem_t *tso_seg = NULL;
  1274. qdf_spin_lock_bh(&soc->tx_tso_desc[pool_id].lock);
  1275. if (soc->tx_tso_desc[pool_id].freelist) {
  1276. soc->tx_tso_desc[pool_id].num_free--;
  1277. tso_seg = soc->tx_tso_desc[pool_id].freelist;
  1278. soc->tx_tso_desc[pool_id].freelist =
  1279. soc->tx_tso_desc[pool_id].freelist->next;
  1280. }
  1281. qdf_spin_unlock_bh(&soc->tx_tso_desc[pool_id].lock);
  1282. return tso_seg;
  1283. }
  1284. /**
  1285. * dp_tx_tso_desc_free() - function to free a TSO segment
  1286. * @soc: device soc instance
  1287. * @pool_id: pool id should pick up tso descriptor
  1288. * @tso_seg: tso segment memory pointer
  1289. *
  1290. * Returns a TSO segment element to the free list held in the
  1291. * HTT pdev
  1292. *
  1293. * Return: none
  1294. */
  1295. static inline void dp_tx_tso_desc_free(struct dp_soc *soc,
  1296. uint8_t pool_id, struct qdf_tso_seg_elem_t *tso_seg)
  1297. {
  1298. qdf_spin_lock_bh(&soc->tx_tso_desc[pool_id].lock);
  1299. tso_seg->next = soc->tx_tso_desc[pool_id].freelist;
  1300. soc->tx_tso_desc[pool_id].freelist = tso_seg;
  1301. soc->tx_tso_desc[pool_id].num_free++;
  1302. qdf_spin_unlock_bh(&soc->tx_tso_desc[pool_id].lock);
  1303. }
  1304. static inline
  1305. struct qdf_tso_num_seg_elem_t *dp_tso_num_seg_alloc(struct dp_soc *soc,
  1306. uint8_t pool_id)
  1307. {
  1308. struct qdf_tso_num_seg_elem_t *tso_num_seg = NULL;
  1309. qdf_spin_lock_bh(&soc->tx_tso_num_seg[pool_id].lock);
  1310. if (soc->tx_tso_num_seg[pool_id].freelist) {
  1311. soc->tx_tso_num_seg[pool_id].num_free--;
  1312. tso_num_seg = soc->tx_tso_num_seg[pool_id].freelist;
  1313. soc->tx_tso_num_seg[pool_id].freelist =
  1314. soc->tx_tso_num_seg[pool_id].freelist->next;
  1315. }
  1316. qdf_spin_unlock_bh(&soc->tx_tso_num_seg[pool_id].lock);
  1317. return tso_num_seg;
  1318. }
  1319. static inline
  1320. void dp_tso_num_seg_free(struct dp_soc *soc,
  1321. uint8_t pool_id, struct qdf_tso_num_seg_elem_t *tso_num_seg)
  1322. {
  1323. qdf_spin_lock_bh(&soc->tx_tso_num_seg[pool_id].lock);
  1324. tso_num_seg->next = soc->tx_tso_num_seg[pool_id].freelist;
  1325. soc->tx_tso_num_seg[pool_id].freelist = tso_num_seg;
  1326. soc->tx_tso_num_seg[pool_id].num_free++;
  1327. qdf_spin_unlock_bh(&soc->tx_tso_num_seg[pool_id].lock);
  1328. }
  1329. #endif
  1330. /**
  1331. * dp_tx_me_alloc_buf() - Alloc descriptor from me pool
  1332. * @pdev: DP_PDEV handle for datapath
  1333. *
  1334. * Return: tx descriptor on success, NULL on error
  1335. */
  1336. static inline struct dp_tx_me_buf_t*
  1337. dp_tx_me_alloc_buf(struct dp_pdev *pdev)
  1338. {
  1339. struct dp_tx_me_buf_t *buf = NULL;
  1340. qdf_spin_lock_bh(&pdev->tx_mutex);
  1341. if (pdev->me_buf.freelist) {
  1342. buf = pdev->me_buf.freelist;
  1343. pdev->me_buf.freelist = pdev->me_buf.freelist->next;
  1344. pdev->me_buf.buf_in_use++;
  1345. } else {
  1346. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1347. "Error allocating memory in pool");
  1348. qdf_spin_unlock_bh(&pdev->tx_mutex);
  1349. return NULL;
  1350. }
  1351. qdf_spin_unlock_bh(&pdev->tx_mutex);
  1352. return buf;
  1353. }
  1354. /**
  1355. * dp_tx_me_free_buf() - Unmap the buffer holding the dest
  1356. * address, free me descriptor and add it to the free-pool
  1357. * @pdev: DP_PDEV handle for datapath
  1358. * @buf : Allocated ME BUF
  1359. *
  1360. * Return:void
  1361. */
  1362. static inline void
  1363. dp_tx_me_free_buf(struct dp_pdev *pdev, struct dp_tx_me_buf_t *buf)
  1364. {
  1365. /*
  1366. * If the buf containing mac address was mapped,
  1367. * it must be unmapped before freeing the me_buf.
  1368. * The "paddr_macbuf" member in the me_buf structure
  1369. * holds the mapped physical address and it must be
  1370. * set to 0 after unmapping.
  1371. */
  1372. if (buf->paddr_macbuf) {
  1373. qdf_mem_unmap_nbytes_single(pdev->soc->osdev,
  1374. buf->paddr_macbuf,
  1375. QDF_DMA_TO_DEVICE,
  1376. QDF_MAC_ADDR_SIZE);
  1377. buf->paddr_macbuf = 0;
  1378. }
  1379. qdf_spin_lock_bh(&pdev->tx_mutex);
  1380. buf->next = pdev->me_buf.freelist;
  1381. pdev->me_buf.freelist = buf;
  1382. pdev->me_buf.buf_in_use--;
  1383. qdf_spin_unlock_bh(&pdev->tx_mutex);
  1384. }
  1385. #endif /* DP_TX_DESC_H */