dp_be_rx.c 63 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef FEATURE_WDS
  37. #include "dp_txrx_wds.h"
  38. #endif
  39. #include "dp_hist.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  42. static inline void
  43. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  44. {
  45. uint32_t fse_metadata;
  46. /* Set the flow idx valid flag only when there is no timeout */
  47. if (hal_rx_msdu_flow_idx_timeout_be(rx_tlv_hdr))
  48. return;
  49. /*
  50. * If invalid bit is not set and the fse metadata indicates that it is
  51. * a valid SFE flow match in FSE, do not set the rx flow tag and let it
  52. * go via stack instead of VP.
  53. */
  54. fse_metadata = hal_rx_msdu_fse_metadata_get_be(rx_tlv_hdr);
  55. if (!hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr) && (fse_metadata == DP_RX_FSE_FLOW_MATCH_SFE))
  56. return;
  57. qdf_nbuf_set_rx_flow_idx_valid(nbuf,
  58. !hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr));
  59. }
  60. #else
  61. static inline void
  62. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  63. {
  64. }
  65. #endif
  66. #ifndef AST_OFFLOAD_ENABLE
  67. static void
  68. dp_rx_wds_learn(struct dp_soc *soc,
  69. struct dp_vdev *vdev,
  70. uint8_t *rx_tlv_hdr,
  71. struct dp_txrx_peer *txrx_peer,
  72. qdf_nbuf_t nbuf)
  73. {
  74. struct hal_rx_msdu_metadata msdu_metadata;
  75. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  76. /* WDS Source Port Learning */
  77. if (qdf_likely(vdev->wds_enabled))
  78. dp_rx_wds_srcport_learn(soc,
  79. rx_tlv_hdr,
  80. txrx_peer,
  81. nbuf,
  82. msdu_metadata);
  83. }
  84. #else
  85. #ifdef QCA_SUPPORT_WDS_EXTENDED
  86. /**
  87. * dp_wds_ext_peer_learn_be() - function to send event to control
  88. * path on receiving 1st 4-address frame from backhaul.
  89. * @soc: DP soc
  90. * @ta_txrx_peer: WDS repeater txrx peer
  91. * @rx_tlv_hdr: start address of rx tlvs
  92. * @nbuf: RX packet buffer
  93. *
  94. * Return: void
  95. */
  96. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  97. struct dp_txrx_peer *ta_txrx_peer,
  98. uint8_t *rx_tlv_hdr,
  99. qdf_nbuf_t nbuf)
  100. {
  101. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  102. struct dp_peer *ta_base_peer;
  103. /* instead of checking addr4 is valid or not in per packet path
  104. * check for init bit, which will be set on reception of
  105. * first addr4 valid packet.
  106. */
  107. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  108. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  109. &ta_txrx_peer->wds_ext.init))
  110. return;
  111. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  112. (qdf_nbuf_is_fr_ds_set(nbuf) && qdf_nbuf_is_to_ds_set(nbuf))) {
  113. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  114. &ta_txrx_peer->wds_ext.init);
  115. if (qdf_unlikely(ta_txrx_peer->nawds_enabled &&
  116. ta_txrx_peer->is_mld_peer)) {
  117. ta_base_peer = dp_get_primary_link_peer_by_id(
  118. soc,
  119. ta_txrx_peer->peer_id,
  120. DP_MOD_ID_RX);
  121. } else {
  122. ta_base_peer = dp_peer_get_ref_by_id(
  123. soc,
  124. ta_txrx_peer->peer_id,
  125. DP_MOD_ID_RX);
  126. }
  127. if (!ta_base_peer)
  128. return;
  129. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  130. QDF_MAC_ADDR_SIZE);
  131. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  132. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  133. soc->ctrl_psoc,
  134. ta_txrx_peer->peer_id,
  135. ta_txrx_peer->vdev->vdev_id,
  136. wds_ext_src_mac);
  137. }
  138. }
  139. #else
  140. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  141. struct dp_txrx_peer *ta_txrx_peer,
  142. uint8_t *rx_tlv_hdr,
  143. qdf_nbuf_t nbuf)
  144. {
  145. }
  146. #endif
  147. static void
  148. dp_rx_wds_learn(struct dp_soc *soc,
  149. struct dp_vdev *vdev,
  150. uint8_t *rx_tlv_hdr,
  151. struct dp_txrx_peer *ta_txrx_peer,
  152. qdf_nbuf_t nbuf)
  153. {
  154. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  155. }
  156. #endif
  157. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  158. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  159. uint32_t quota)
  160. {
  161. hal_ring_desc_t ring_desc;
  162. hal_ring_desc_t last_prefetched_hw_desc;
  163. hal_soc_handle_t hal_soc;
  164. struct dp_rx_desc *rx_desc = NULL;
  165. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  166. qdf_nbuf_t nbuf, next;
  167. bool near_full;
  168. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  169. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  170. uint32_t num_pending = 0;
  171. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  172. uint16_t msdu_len = 0;
  173. uint16_t peer_id;
  174. uint8_t vdev_id;
  175. struct dp_txrx_peer *txrx_peer;
  176. dp_txrx_ref_handle txrx_ref_handle = NULL;
  177. struct dp_vdev *vdev;
  178. uint32_t pkt_len = 0;
  179. enum hal_reo_error_status error;
  180. uint8_t *rx_tlv_hdr;
  181. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  182. uint8_t mac_id = 0;
  183. struct dp_pdev *rx_pdev;
  184. uint8_t enh_flag;
  185. struct dp_srng *dp_rxdma_srng;
  186. struct rx_desc_pool *rx_desc_pool;
  187. struct dp_soc *soc = int_ctx->soc;
  188. struct cdp_tid_rx_stats *tid_stats;
  189. qdf_nbuf_t nbuf_head;
  190. qdf_nbuf_t nbuf_tail;
  191. qdf_nbuf_t deliver_list_head;
  192. qdf_nbuf_t deliver_list_tail;
  193. uint32_t num_rx_bufs_reaped = 0;
  194. uint32_t intr_id;
  195. struct hif_opaque_softc *scn;
  196. int32_t tid = 0;
  197. bool is_prev_msdu_last = true;
  198. uint32_t num_entries_avail = 0;
  199. uint32_t rx_ol_pkt_cnt = 0;
  200. uint32_t num_entries = 0;
  201. QDF_STATUS status;
  202. qdf_nbuf_t ebuf_head;
  203. qdf_nbuf_t ebuf_tail;
  204. uint8_t pkt_capture_offload = 0;
  205. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  206. int max_reap_limit, ring_near_full;
  207. struct dp_soc *replenish_soc;
  208. uint8_t chip_id;
  209. uint64_t current_time = 0;
  210. uint32_t old_tid;
  211. uint32_t peer_ext_stats;
  212. uint32_t dsf;
  213. uint32_t l3_pad;
  214. uint8_t link_id = 0;
  215. DP_HIST_INIT();
  216. qdf_assert_always(soc && hal_ring_hdl);
  217. hal_soc = soc->hal_soc;
  218. qdf_assert_always(hal_soc);
  219. scn = soc->hif_handle;
  220. intr_id = int_ctx->dp_intr_id;
  221. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  222. dp_runtime_pm_mark_last_busy(soc);
  223. more_data:
  224. /* reset local variables here to be re-used in the function */
  225. nbuf_head = NULL;
  226. nbuf_tail = NULL;
  227. deliver_list_head = NULL;
  228. deliver_list_tail = NULL;
  229. txrx_peer = NULL;
  230. vdev = NULL;
  231. num_rx_bufs_reaped = 0;
  232. ebuf_head = NULL;
  233. ebuf_tail = NULL;
  234. ring_near_full = 0;
  235. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  236. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  237. qdf_mem_zero(head, sizeof(head));
  238. qdf_mem_zero(tail, sizeof(tail));
  239. old_tid = 0xff;
  240. dsf = 0;
  241. peer_ext_stats = 0;
  242. rx_pdev = NULL;
  243. tid_stats = NULL;
  244. dp_pkt_get_timestamp(&current_time);
  245. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  246. &max_reap_limit);
  247. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  248. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  249. /*
  250. * Need API to convert from hal_ring pointer to
  251. * Ring Type / Ring Id combo
  252. */
  253. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  254. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  255. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  256. goto done;
  257. }
  258. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  259. if (!num_pending)
  260. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  261. if (num_pending > quota)
  262. num_pending = quota;
  263. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  264. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  265. hal_ring_hdl,
  266. num_pending);
  267. /*
  268. * start reaping the buffers from reo ring and queue
  269. * them in per vdev queue.
  270. * Process the received pkts in a different per vdev loop.
  271. */
  272. while (qdf_likely(num_pending)) {
  273. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  274. if (qdf_unlikely(!ring_desc))
  275. break;
  276. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  277. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  278. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  279. soc, hal_ring_hdl, error);
  280. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  281. 1);
  282. /* Don't know how to deal with this -- assert */
  283. qdf_assert(0);
  284. }
  285. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  286. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  287. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  288. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  289. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  290. break;
  291. }
  292. rx_desc = (struct dp_rx_desc *)
  293. hal_rx_get_reo_desc_va(ring_desc);
  294. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  295. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  296. ring_desc, rx_desc);
  297. if (QDF_IS_STATUS_ERROR(status)) {
  298. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  299. qdf_assert_always(!rx_desc->unmapped);
  300. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  301. rx_desc->unmapped = 1;
  302. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  303. rx_desc->pool_id);
  304. dp_rx_add_to_free_desc_list(
  305. &head[rx_desc->chip_id][rx_desc->pool_id],
  306. &tail[rx_desc->chip_id][rx_desc->pool_id],
  307. rx_desc);
  308. }
  309. continue;
  310. }
  311. /*
  312. * this is a unlikely scenario where the host is reaping
  313. * a descriptor which it already reaped just a while ago
  314. * but is yet to replenish it back to HW.
  315. * In this case host will dump the last 128 descriptors
  316. * including the software descriptor rx_desc and assert.
  317. */
  318. if (qdf_unlikely(!rx_desc->in_use)) {
  319. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  320. dp_info_rl("Reaping rx_desc not in use!");
  321. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  322. ring_desc, rx_desc);
  323. continue;
  324. }
  325. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  326. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  327. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  328. dp_info_rl("Nbuf sanity check failure!");
  329. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  330. ring_desc, rx_desc);
  331. rx_desc->in_err_state = 1;
  332. continue;
  333. }
  334. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  335. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  336. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  337. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  338. ring_desc, rx_desc);
  339. }
  340. pkt_capture_offload =
  341. dp_rx_copy_desc_info_in_nbuf_cb(soc, ring_desc,
  342. rx_desc->nbuf,
  343. reo_ring_num);
  344. if (qdf_unlikely(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf))) {
  345. /* In dp_rx_sg_create() until the last buffer,
  346. * end bit should not be set. As continuation bit set,
  347. * this is not a last buffer.
  348. */
  349. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 0);
  350. /* previous msdu has end bit set, so current one is
  351. * the new MPDU
  352. */
  353. if (is_prev_msdu_last) {
  354. /* Get number of entries available in HW ring */
  355. num_entries_avail =
  356. hal_srng_dst_num_valid(hal_soc,
  357. hal_ring_hdl, 1);
  358. /* For new MPDU check if we can read complete
  359. * MPDU by comparing the number of buffers
  360. * available and number of buffers needed to
  361. * reap this MPDU
  362. */
  363. if ((QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) /
  364. (RX_DATA_BUFFER_SIZE -
  365. soc->rx_pkt_tlv_size) + 1) >
  366. num_pending) {
  367. DP_STATS_INC(soc,
  368. rx.msdu_scatter_wait_break,
  369. 1);
  370. dp_rx_cookie_reset_invalid_bit(
  371. ring_desc);
  372. /* As we are going to break out of the
  373. * loop because of unavailability of
  374. * descs to form complete SG, we need to
  375. * reset the TP in the REO destination
  376. * ring.
  377. */
  378. hal_srng_dst_dec_tp(hal_soc,
  379. hal_ring_hdl);
  380. break;
  381. }
  382. is_prev_msdu_last = false;
  383. }
  384. }
  385. if (!is_prev_msdu_last &&
  386. !(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  387. is_prev_msdu_last = true;
  388. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  389. /*
  390. * move unmap after scattered msdu waiting break logic
  391. * in case double skb unmap happened.
  392. */
  393. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  394. rx_desc->unmapped = 1;
  395. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  396. ebuf_tail, rx_desc);
  397. quota -= 1;
  398. num_pending -= 1;
  399. dp_rx_add_to_free_desc_list
  400. (&head[rx_desc->chip_id][rx_desc->pool_id],
  401. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  402. num_rx_bufs_reaped++;
  403. dp_rx_prefetch_hw_sw_nbuf_32_byte_desc(soc, hal_soc,
  404. num_pending,
  405. hal_ring_hdl,
  406. &last_prefetched_hw_desc,
  407. &last_prefetched_sw_desc);
  408. /*
  409. * only if complete msdu is received for scatter case,
  410. * then allow break.
  411. */
  412. if (is_prev_msdu_last &&
  413. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  414. max_reap_limit))
  415. break;
  416. }
  417. done:
  418. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  419. qdf_dsb();
  420. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  421. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  422. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  423. /*
  424. * continue with next mac_id if no pkts were reaped
  425. * from that pool
  426. */
  427. if (!rx_bufs_reaped[chip_id][mac_id])
  428. continue;
  429. replenish_soc = dp_rx_replenish_soc_get(soc, chip_id);
  430. dp_rxdma_srng =
  431. &replenish_soc->rx_refill_buf_ring[mac_id];
  432. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  433. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  434. dp_rxdma_srng,
  435. rx_desc_pool,
  436. rx_bufs_reaped[chip_id][mac_id],
  437. &head[chip_id][mac_id],
  438. &tail[chip_id][mac_id]);
  439. }
  440. }
  441. /* Peer can be NULL is case of LFR */
  442. if (qdf_likely(txrx_peer))
  443. vdev = NULL;
  444. /*
  445. * BIG loop where each nbuf is dequeued from global queue,
  446. * processed and queued back on a per vdev basis. These nbufs
  447. * are sent to stack as and when we run out of nbufs
  448. * or a new nbuf dequeued from global queue has a different
  449. * vdev when compared to previous nbuf.
  450. */
  451. nbuf = nbuf_head;
  452. while (nbuf) {
  453. next = nbuf->next;
  454. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  455. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  456. nbuf = next;
  457. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  458. continue;
  459. }
  460. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  461. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  462. peer_id = dp_rx_get_peer_id_be(nbuf);
  463. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  464. peer_id, vdev_id)) {
  465. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  466. deliver_list_head,
  467. deliver_list_tail);
  468. deliver_list_head = NULL;
  469. deliver_list_tail = NULL;
  470. }
  471. /* Get TID from struct cb->tid_val, save to tid */
  472. tid = qdf_nbuf_get_tid_val(nbuf);
  473. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  474. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  475. dp_rx_nbuf_free(nbuf);
  476. nbuf = next;
  477. continue;
  478. }
  479. if (qdf_unlikely(!txrx_peer)) {
  480. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  481. peer_id,
  482. &txrx_ref_handle,
  483. pkt_capture_offload,
  484. &vdev,
  485. &rx_pdev, &dsf,
  486. &old_tid);
  487. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  488. nbuf = next;
  489. continue;
  490. }
  491. enh_flag = rx_pdev->enhanced_stats_en;
  492. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  493. dp_txrx_peer_unref_delete(txrx_ref_handle,
  494. DP_MOD_ID_RX);
  495. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  496. peer_id,
  497. &txrx_ref_handle,
  498. pkt_capture_offload,
  499. &vdev,
  500. &rx_pdev, &dsf,
  501. &old_tid);
  502. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  503. nbuf = next;
  504. continue;
  505. }
  506. enh_flag = rx_pdev->enhanced_stats_en;
  507. }
  508. if (txrx_peer) {
  509. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  510. qdf_dp_trace_set_track(nbuf, QDF_RX);
  511. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  512. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  513. QDF_NBUF_RX_PKT_DATA_TRACK;
  514. }
  515. rx_bufs_used++;
  516. /* MLD Link Peer Statistics support */
  517. if (txrx_peer->is_mld_peer && rx_pdev->link_peer_stats) {
  518. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  519. nbuf,
  520. txrx_peer);
  521. } else {
  522. link_id = 0;
  523. }
  524. dp_rx_set_nbuf_band(nbuf, txrx_peer, link_id);
  525. /* when hlos tid override is enabled, save tid in
  526. * skb->priority
  527. */
  528. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  529. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  530. qdf_nbuf_set_priority(nbuf, tid);
  531. DP_RX_TID_SAVE(nbuf, tid);
  532. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  533. dp_rx_pkt_tracepoints_enabled())
  534. qdf_nbuf_set_timestamp(nbuf);
  535. if (qdf_likely(old_tid != tid)) {
  536. tid_stats =
  537. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  538. old_tid = tid;
  539. }
  540. /*
  541. * Check if DMA completed -- msdu_done is the last bit
  542. * to be written
  543. */
  544. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  545. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  546. dp_err("MSDU DONE failure");
  547. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  548. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  549. QDF_TRACE_LEVEL_INFO);
  550. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  551. dp_rx_nbuf_free(nbuf);
  552. qdf_assert(0);
  553. nbuf = next;
  554. continue;
  555. }
  556. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  557. /*
  558. * First IF condition:
  559. * 802.11 Fragmented pkts are reinjected to REO
  560. * HW block as SG pkts and for these pkts we only
  561. * need to pull the RX TLVS header length.
  562. * Second IF condition:
  563. * The below condition happens when an MSDU is spread
  564. * across multiple buffers. This can happen in two cases
  565. * 1. The nbuf size is smaller then the received msdu.
  566. * ex: we have set the nbuf size to 2048 during
  567. * nbuf_alloc. but we received an msdu which is
  568. * 2304 bytes in size then this msdu is spread
  569. * across 2 nbufs.
  570. *
  571. * 2. AMSDUs when RAW mode is enabled.
  572. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  573. * across 1st nbuf and 2nd nbuf and last MSDU is
  574. * spread across 2nd nbuf and 3rd nbuf.
  575. *
  576. * for these scenarios let us create a skb frag_list and
  577. * append these buffers till the last MSDU of the AMSDU
  578. * Third condition:
  579. * This is the most likely case, we receive 802.3 pkts
  580. * decapsulated by HW, here we need to set the pkt length.
  581. */
  582. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  583. bool is_mcbc, is_sa_vld, is_da_vld;
  584. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  585. rx_tlv_hdr);
  586. is_sa_vld =
  587. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  588. rx_tlv_hdr);
  589. is_da_vld =
  590. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  591. rx_tlv_hdr);
  592. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  593. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  594. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  595. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  596. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  597. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  598. nbuf = dp_rx_sg_create(soc, nbuf);
  599. next = nbuf->next;
  600. if (qdf_nbuf_is_raw_frame(nbuf)) {
  601. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  602. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  603. rx.raw, 1,
  604. msdu_len,
  605. link_id);
  606. } else {
  607. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  608. if (!dp_rx_is_sg_supported()) {
  609. dp_rx_nbuf_free(nbuf);
  610. dp_info_rl("sg msdu len %d, dropped",
  611. msdu_len);
  612. nbuf = next;
  613. continue;
  614. }
  615. }
  616. } else {
  617. l3_pad = hal_rx_get_l3_pad_bytes_be(nbuf, rx_tlv_hdr);
  618. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  619. pkt_len = msdu_len + l3_pad + soc->rx_pkt_tlv_size;
  620. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  621. dp_rx_skip_tlvs(soc, nbuf, l3_pad);
  622. }
  623. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  624. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  625. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  626. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  627. rx.policy_check_drop,
  628. 1, link_id);
  629. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  630. /* Drop & free packet */
  631. dp_rx_nbuf_free(nbuf);
  632. /* Statistics */
  633. nbuf = next;
  634. continue;
  635. }
  636. /*
  637. * Drop non-EAPOL frames from unauthorized peer.
  638. */
  639. if (qdf_likely(txrx_peer) &&
  640. qdf_unlikely(!txrx_peer->authorize) &&
  641. !qdf_nbuf_is_raw_frame(nbuf)) {
  642. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  643. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  644. if (!is_eapol) {
  645. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  646. rx.peer_unauth_rx_pkt_drop,
  647. 1, link_id);
  648. dp_rx_nbuf_free(nbuf);
  649. nbuf = next;
  650. continue;
  651. }
  652. }
  653. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  654. dp_rx_update_flow_info(nbuf, rx_tlv_hdr);
  655. if (qdf_unlikely(!rx_pdev->rx_fast_flag)) {
  656. /*
  657. * process frame for mulitpass phrase processing
  658. */
  659. if (qdf_unlikely(vdev->multipass_en)) {
  660. if (dp_rx_multipass_process(txrx_peer, nbuf,
  661. tid) == false) {
  662. DP_PEER_PER_PKT_STATS_INC
  663. (txrx_peer,
  664. rx.multipass_rx_pkt_drop,
  665. 1, link_id);
  666. dp_rx_nbuf_free(nbuf);
  667. nbuf = next;
  668. continue;
  669. }
  670. }
  671. if (qdf_unlikely(txrx_peer &&
  672. (txrx_peer->nawds_enabled) &&
  673. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  674. (hal_rx_get_mpdu_mac_ad4_valid_be
  675. (rx_tlv_hdr) == false))) {
  676. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  677. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  678. rx.nawds_mcast_drop,
  679. 1, link_id);
  680. dp_rx_nbuf_free(nbuf);
  681. nbuf = next;
  682. continue;
  683. }
  684. /* Update the protocol tag in SKB based on CCE metadata
  685. */
  686. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  687. reo_ring_num, false, true);
  688. /* Update the flow tag in SKB based on FSE metadata */
  689. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  690. true);
  691. if (qdf_unlikely(vdev->mesh_vdev)) {
  692. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  693. rx_tlv_hdr)
  694. == QDF_STATUS_SUCCESS) {
  695. dp_rx_info("%pK: mesh pkt filtered",
  696. soc);
  697. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  698. DP_STATS_INC(vdev->pdev,
  699. dropped.mesh_filter, 1);
  700. dp_rx_nbuf_free(nbuf);
  701. nbuf = next;
  702. continue;
  703. }
  704. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  705. txrx_peer);
  706. }
  707. }
  708. if (qdf_likely(vdev->rx_decap_type ==
  709. htt_cmn_pkt_type_ethernet) &&
  710. qdf_likely(!vdev->mesh_vdev)) {
  711. dp_rx_wds_learn(soc, vdev,
  712. rx_tlv_hdr,
  713. txrx_peer,
  714. nbuf);
  715. }
  716. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  717. reo_ring_num, tid_stats, link_id);
  718. if (qdf_likely(vdev->rx_decap_type ==
  719. htt_cmn_pkt_type_ethernet) &&
  720. qdf_likely(!vdev->mesh_vdev)) {
  721. /* Intrabss-fwd */
  722. if (dp_rx_check_ap_bridge(vdev))
  723. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  724. rx_tlv_hdr,
  725. nbuf,
  726. link_id)) {
  727. nbuf = next;
  728. tid_stats->intrabss_cnt++;
  729. continue; /* Get next desc */
  730. }
  731. }
  732. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  733. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  734. nbuf);
  735. dp_rx_update_stats(soc, nbuf);
  736. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  737. current_time, nbuf);
  738. DP_RX_LIST_APPEND(deliver_list_head,
  739. deliver_list_tail,
  740. nbuf);
  741. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  742. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  743. enh_flag);
  744. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  745. rx.rx_success, 1,
  746. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  747. link_id);
  748. if (qdf_unlikely(txrx_peer->in_twt))
  749. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  750. rx.to_stack_twt, 1,
  751. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  752. link_id);
  753. tid_stats->delivered_to_stack++;
  754. nbuf = next;
  755. }
  756. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  757. pkt_capture_offload,
  758. deliver_list_head,
  759. deliver_list_tail);
  760. if (qdf_likely(txrx_peer))
  761. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  762. /*
  763. * If we are processing in near-full condition, there are 3 scenario
  764. * 1) Ring entries has reached critical state
  765. * 2) Ring entries are still near high threshold
  766. * 3) Ring entries are below the safe level
  767. *
  768. * One more loop will move the state to normal processing and yield
  769. */
  770. if (ring_near_full && quota)
  771. goto more_data;
  772. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  773. if (quota) {
  774. num_pending =
  775. dp_rx_srng_get_num_pending(hal_soc,
  776. hal_ring_hdl,
  777. num_entries,
  778. &near_full);
  779. if (num_pending) {
  780. DP_STATS_INC(soc, rx.hp_oos2, 1);
  781. if (!hif_exec_should_yield(scn, intr_id))
  782. goto more_data;
  783. if (qdf_unlikely(near_full)) {
  784. DP_STATS_INC(soc, rx.near_full, 1);
  785. goto more_data;
  786. }
  787. }
  788. }
  789. if (vdev && vdev->osif_fisa_flush)
  790. vdev->osif_fisa_flush(soc, reo_ring_num);
  791. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  792. vdev->osif_gro_flush(vdev->osif_vdev,
  793. reo_ring_num);
  794. }
  795. }
  796. /* Update histogram statistics by looping through pdev's */
  797. DP_RX_HIST_STATS_PER_PDEV();
  798. return rx_bufs_used; /* Assume no scale factor for now */
  799. }
  800. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  801. /**
  802. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  803. * @soc: Handle to DP Soc structure
  804. * @rx_desc_pool: Rx descriptor pool handler
  805. * @pool_id: Rx descriptor pool ID
  806. *
  807. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  808. */
  809. static QDF_STATUS
  810. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  811. struct rx_desc_pool *rx_desc_pool,
  812. uint32_t pool_id)
  813. {
  814. struct dp_hw_cookie_conversion_t *cc_ctx;
  815. struct dp_soc_be *be_soc;
  816. union dp_rx_desc_list_elem_t *rx_desc_elem;
  817. struct dp_spt_page_desc *page_desc;
  818. uint32_t ppt_idx = 0;
  819. uint32_t avail_entry_index = 0;
  820. if (!rx_desc_pool->pool_size) {
  821. dp_err("desc_num 0 !!");
  822. return QDF_STATUS_E_FAILURE;
  823. }
  824. be_soc = dp_get_be_soc_from_dp_soc(soc);
  825. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  826. page_desc = &cc_ctx->page_desc_base[0];
  827. rx_desc_elem = rx_desc_pool->freelist;
  828. while (rx_desc_elem) {
  829. if (avail_entry_index == 0) {
  830. if (ppt_idx >= cc_ctx->total_page_num) {
  831. dp_alert("insufficient secondary page tables");
  832. qdf_assert_always(0);
  833. }
  834. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  835. }
  836. /* put each RX Desc VA to SPT pages and
  837. * get corresponding ID
  838. */
  839. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  840. avail_entry_index,
  841. &rx_desc_elem->rx_desc);
  842. rx_desc_elem->rx_desc.cookie =
  843. dp_cc_desc_id_generate(page_desc->ppt_index,
  844. avail_entry_index);
  845. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  846. rx_desc_elem->rx_desc.pool_id = pool_id;
  847. rx_desc_elem->rx_desc.in_use = 0;
  848. rx_desc_elem = rx_desc_elem->next;
  849. avail_entry_index = (avail_entry_index + 1) &
  850. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  851. }
  852. return QDF_STATUS_SUCCESS;
  853. }
  854. #else
  855. static QDF_STATUS
  856. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  857. struct rx_desc_pool *rx_desc_pool,
  858. uint32_t pool_id)
  859. {
  860. struct dp_hw_cookie_conversion_t *cc_ctx;
  861. struct dp_soc_be *be_soc;
  862. struct dp_spt_page_desc *page_desc;
  863. uint32_t ppt_idx = 0;
  864. uint32_t avail_entry_index = 0;
  865. int i = 0;
  866. if (!rx_desc_pool->pool_size) {
  867. dp_err("desc_num 0 !!");
  868. return QDF_STATUS_E_FAILURE;
  869. }
  870. be_soc = dp_get_be_soc_from_dp_soc(soc);
  871. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  872. page_desc = &cc_ctx->page_desc_base[0];
  873. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  874. if (i == rx_desc_pool->pool_size - 1)
  875. rx_desc_pool->array[i].next = NULL;
  876. else
  877. rx_desc_pool->array[i].next =
  878. &rx_desc_pool->array[i + 1];
  879. if (avail_entry_index == 0) {
  880. if (ppt_idx >= cc_ctx->total_page_num) {
  881. dp_alert("insufficient secondary page tables");
  882. qdf_assert_always(0);
  883. }
  884. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  885. }
  886. /* put each RX Desc VA to SPT pages and
  887. * get corresponding ID
  888. */
  889. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  890. avail_entry_index,
  891. &rx_desc_pool->array[i].rx_desc);
  892. rx_desc_pool->array[i].rx_desc.cookie =
  893. dp_cc_desc_id_generate(page_desc->ppt_index,
  894. avail_entry_index);
  895. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  896. rx_desc_pool->array[i].rx_desc.in_use = 0;
  897. rx_desc_pool->array[i].rx_desc.chip_id =
  898. dp_mlo_get_chip_id(soc);
  899. avail_entry_index = (avail_entry_index + 1) &
  900. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  901. }
  902. return QDF_STATUS_SUCCESS;
  903. }
  904. #endif
  905. static void
  906. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  907. struct rx_desc_pool *rx_desc_pool,
  908. uint32_t pool_id)
  909. {
  910. struct dp_spt_page_desc *page_desc;
  911. struct dp_soc_be *be_soc;
  912. int i = 0;
  913. struct dp_hw_cookie_conversion_t *cc_ctx;
  914. be_soc = dp_get_be_soc_from_dp_soc(soc);
  915. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  916. for (i = 0; i < cc_ctx->total_page_num; i++) {
  917. page_desc = &cc_ctx->page_desc_base[i];
  918. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  919. }
  920. }
  921. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  922. struct rx_desc_pool *rx_desc_pool,
  923. uint32_t pool_id)
  924. {
  925. QDF_STATUS status = QDF_STATUS_SUCCESS;
  926. /* Only regular RX buffer desc pool use HW cookie conversion */
  927. if (rx_desc_pool->desc_type == QDF_DP_RX_DESC_BUF_TYPE) {
  928. dp_info("rx_desc_buf pool init");
  929. status = dp_rx_desc_pool_init_be_cc(soc,
  930. rx_desc_pool,
  931. pool_id);
  932. } else {
  933. dp_info("non_rx_desc_buf_pool init");
  934. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  935. pool_id);
  936. }
  937. return status;
  938. }
  939. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  940. struct rx_desc_pool *rx_desc_pool,
  941. uint32_t pool_id)
  942. {
  943. if (rx_desc_pool->desc_type == QDF_DP_RX_DESC_BUF_TYPE)
  944. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  945. }
  946. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  947. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  948. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  949. void *ring_desc,
  950. struct dp_rx_desc **r_rx_desc)
  951. {
  952. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  953. /* HW cookie conversion done */
  954. *r_rx_desc = (struct dp_rx_desc *)
  955. hal_rx_wbm_get_desc_va(ring_desc);
  956. } else {
  957. /* SW do cookie conversion */
  958. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  959. *r_rx_desc = (struct dp_rx_desc *)
  960. dp_cc_desc_find(soc, cookie);
  961. }
  962. return QDF_STATUS_SUCCESS;
  963. }
  964. #else
  965. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  966. void *ring_desc,
  967. struct dp_rx_desc **r_rx_desc)
  968. {
  969. *r_rx_desc = (struct dp_rx_desc *)
  970. hal_rx_wbm_get_desc_va(ring_desc);
  971. return QDF_STATUS_SUCCESS;
  972. }
  973. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  974. struct dp_rx_desc *dp_rx_desc_ppeds_cookie_2_va(struct dp_soc *soc,
  975. unsigned long cookie)
  976. {
  977. return (struct dp_rx_desc *)cookie;
  978. }
  979. #else
  980. struct dp_rx_desc *dp_rx_desc_ppeds_cookie_2_va(struct dp_soc *soc,
  981. unsigned long cookie)
  982. {
  983. if (!cookie)
  984. return NULL;
  985. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  986. }
  987. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  988. void *ring_desc,
  989. struct dp_rx_desc **r_rx_desc)
  990. {
  991. /* SW do cookie conversion */
  992. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  993. *r_rx_desc = (struct dp_rx_desc *)
  994. dp_cc_desc_find(soc, cookie);
  995. return QDF_STATUS_SUCCESS;
  996. }
  997. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  998. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  999. uint32_t cookie)
  1000. {
  1001. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  1002. }
  1003. #if defined(WLAN_FEATURE_11BE_MLO)
  1004. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  1005. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  1006. #define DP_RANDOM_MAC_OFFSET 1
  1007. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  1008. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  1009. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  1010. qdf_nbuf_t nbuf)
  1011. {
  1012. qdf_ether_header_t *eh =
  1013. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1014. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  1015. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  1016. DP_MAC_LOCAL_ADMBIT_MASK;
  1017. }
  1018. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1019. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  1020. {
  1021. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  1022. }
  1023. #else
  1024. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  1025. {
  1026. return false;
  1027. }
  1028. #endif
  1029. #ifdef EXT_HYBRID_MLO_MODE
  1030. static inline
  1031. bool dp_rx_check_ext_hybrid_mode(struct dp_soc *soc, struct dp_vdev *vdev)
  1032. {
  1033. return ((DP_MLD_MODE_HYBRID_NONBOND == soc->mld_mode_ap) &&
  1034. (wlan_op_mode_ap == vdev->opmode));
  1035. }
  1036. #else
  1037. static inline
  1038. bool dp_rx_check_ext_hybrid_mode(struct dp_soc *soc, struct dp_vdev *vdev)
  1039. {
  1040. return false;
  1041. }
  1042. #endif
  1043. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1044. struct dp_vdev *vdev,
  1045. struct dp_txrx_peer *peer,
  1046. qdf_nbuf_t nbuf,
  1047. uint8_t link_id)
  1048. {
  1049. qdf_nbuf_t nbuf_copy;
  1050. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1051. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1052. struct cdp_tid_rx_stats *tid_stats = &peer->vdev->pdev->stats.
  1053. tid_stats.tid_rx_wbm_stats[0][tid];
  1054. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1055. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1056. return false;
  1057. if (qdf_unlikely(vdev->multipass_en)) {
  1058. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1059. DP_PEER_PER_PKT_STATS_INC(peer,
  1060. rx.multipass_rx_pkt_drop,
  1061. 1, link_id);
  1062. return false;
  1063. }
  1064. }
  1065. if (!peer->bss_peer) {
  1066. if (dp_rx_intrabss_mcbc_fwd(soc, peer, NULL, nbuf,
  1067. tid_stats, link_id))
  1068. dp_rx_err("forwarding failed");
  1069. }
  1070. qdf_nbuf_set_next(nbuf, NULL);
  1071. /* REO sends IGMP to driver only if AP is operating in hybrid
  1072. * mld mode.
  1073. */
  1074. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer))) {
  1075. /* send the IGMP to the netdev corresponding to the interface
  1076. * its received on
  1077. */
  1078. goto send_pkt;
  1079. }
  1080. if (dp_rx_check_ext_hybrid_mode(soc, vdev)) {
  1081. /* send the IGMP to the netdev corresponding to the interface
  1082. * its received on
  1083. */
  1084. goto send_pkt;
  1085. }
  1086. /*
  1087. * In the case of ME5/ME6, Backhaul WDS for a mld peer, NAWDS,
  1088. * legacy non-mlo AP vdev & non-AP vdev(which is very unlikely),
  1089. * send the igmp pkt on the same link where it received, as these
  1090. * features will use peer based tcl metadata.
  1091. */
  1092. if (vdev->mcast_enhancement_en ||
  1093. peer->is_mld_peer ||
  1094. peer->nawds_enabled ||
  1095. !vdev->mlo_vdev ||
  1096. qdf_unlikely(wlan_op_mode_ap != vdev->opmode)) {
  1097. /* send the IGMP to the netdev corresponding to the interface
  1098. * its received on
  1099. */
  1100. goto send_pkt;
  1101. }
  1102. /* We are here, it means a legacy non-wds sta is connected
  1103. * to a hybrid mld ap, So send a clone of the IGPMP packet
  1104. * on the interface where it was received.
  1105. */
  1106. nbuf_copy = qdf_nbuf_copy(nbuf);
  1107. if (qdf_likely(nbuf_copy))
  1108. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy, NULL);
  1109. dp_rx_dummy_src_mac(vdev, nbuf);
  1110. /* Set the ml peer valid bit in skb peer metadata, so that osif
  1111. * can deliver the SA mangled IGMP packet to mld netdev.
  1112. */
  1113. QDF_NBUF_CB_RX_PEER_ID(nbuf) |= CDP_RX_ML_PEER_VALID_MASK;
  1114. /* Deliver the original IGMP with dummy src on the mld netdev */
  1115. send_pkt:
  1116. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1117. &be_vdev->vdev,
  1118. peer,
  1119. nbuf,
  1120. NULL);
  1121. return true;
  1122. }
  1123. #else
  1124. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1125. struct dp_vdev *vdev,
  1126. struct dp_txrx_peer *peer,
  1127. qdf_nbuf_t nbuf,
  1128. uint8_t link_id)
  1129. {
  1130. return false;
  1131. }
  1132. #endif
  1133. #endif
  1134. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1135. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1136. hal_ring_handle_t hal_ring_hdl,
  1137. uint8_t reo_ring_num,
  1138. uint32_t quota)
  1139. {
  1140. struct dp_soc *soc = int_ctx->soc;
  1141. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1142. uint32_t work_done = 0;
  1143. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1144. DP_SRNG_THRESH_NEAR_FULL)
  1145. return 0;
  1146. qdf_atomic_set(&rx_ring->near_full, 1);
  1147. work_done++;
  1148. return work_done;
  1149. }
  1150. #endif
  1151. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1152. #ifdef WLAN_FEATURE_11BE_MLO
  1153. /**
  1154. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1155. * @ta_peer: transmitter peer handle
  1156. * @da_peer: destination peer handle
  1157. *
  1158. * Return: true - MLO forwarding case, false: not
  1159. */
  1160. static inline bool
  1161. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1162. struct dp_txrx_peer *da_peer)
  1163. {
  1164. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1165. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1166. &da_peer->vdev->mld_mac_addr))
  1167. return false;
  1168. return true;
  1169. }
  1170. #else
  1171. static inline bool
  1172. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1173. struct dp_txrx_peer *da_peer)
  1174. {
  1175. return false;
  1176. }
  1177. #endif
  1178. #ifdef INTRA_BSS_FWD_OFFLOAD
  1179. /**
  1180. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1181. * for unicast frame
  1182. * @nbuf: RX packet buffer
  1183. * @ta_peer: transmitter DP peer handle
  1184. * @rx_tlv_hdr: Rx TLV header
  1185. * @msdu_metadata: MSDU meta data info
  1186. * @params: params to be filled in
  1187. *
  1188. * Return: true - intrabss allowed
  1189. * false - not allow
  1190. */
  1191. static bool
  1192. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1193. struct dp_txrx_peer *ta_peer,
  1194. uint8_t *rx_tlv_hdr,
  1195. struct hal_rx_msdu_metadata *msdu_metadata,
  1196. struct dp_be_intrabss_params *params)
  1197. {
  1198. uint8_t dest_chip_id, dest_chip_pmac_id;
  1199. struct dp_vdev_be *be_vdev =
  1200. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1201. struct dp_soc_be *be_soc =
  1202. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1203. uint16_t da_peer_id;
  1204. struct dp_peer *da_peer = NULL;
  1205. if (!qdf_nbuf_is_intra_bss(nbuf))
  1206. return false;
  1207. if (!be_vdev->mlo_dev_ctxt) {
  1208. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1209. return true;
  1210. }
  1211. hal_rx_tlv_get_dest_chip_pmac_id(rx_tlv_hdr,
  1212. &dest_chip_id,
  1213. &dest_chip_pmac_id);
  1214. if (dp_assert_always_internal_stat(
  1215. (dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1)),
  1216. &be_soc->soc, rx.err.intra_bss_bad_chipid))
  1217. return false;
  1218. params->dest_soc =
  1219. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1220. dest_chip_id);
  1221. if (!params->dest_soc)
  1222. return false;
  1223. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1224. da_peer = dp_peer_get_tgt_peer_by_id(params->dest_soc, da_peer_id,
  1225. DP_MOD_ID_RX);
  1226. if (da_peer) {
  1227. if (da_peer->bss_peer || (da_peer->txrx_peer == ta_peer)) {
  1228. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1229. return false;
  1230. }
  1231. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1232. }
  1233. if (dest_chip_id == be_soc->mlo_chip_id) {
  1234. if (dest_chip_pmac_id == ta_peer->vdev->pdev->pdev_id)
  1235. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1236. else
  1237. params->tx_vdev_id =
  1238. be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id]
  1239. [dest_chip_pmac_id];
  1240. return true;
  1241. }
  1242. params->tx_vdev_id =
  1243. be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id]
  1244. [dest_chip_pmac_id];
  1245. return true;
  1246. }
  1247. #else
  1248. #ifdef WLAN_MLO_MULTI_CHIP
  1249. static bool
  1250. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1251. struct dp_txrx_peer *ta_peer,
  1252. uint8_t *rx_tlv_hdr,
  1253. struct hal_rx_msdu_metadata *msdu_metadata,
  1254. struct dp_be_intrabss_params *params)
  1255. {
  1256. uint16_t da_peer_id;
  1257. struct dp_txrx_peer *da_peer;
  1258. bool ret = false;
  1259. uint8_t dest_chip_id;
  1260. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1261. struct dp_vdev_be *be_vdev =
  1262. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1263. struct dp_soc_be *be_soc =
  1264. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1265. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1266. return false;
  1267. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1268. if (dp_assert_always_internal_stat(
  1269. (dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1)),
  1270. &be_soc->soc, rx.err.intra_bss_bad_chipid))
  1271. return false;
  1272. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1273. /* use dest chip id when TA is MLD peer and DA is legacy */
  1274. if (be_soc->mlo_enabled &&
  1275. ta_peer->mld_peer &&
  1276. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1277. /* validate chip_id, get a ref, and re-assign soc */
  1278. params->dest_soc =
  1279. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1280. dest_chip_id);
  1281. if (!params->dest_soc)
  1282. return false;
  1283. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1284. da_peer_id,
  1285. &txrx_ref_handle,
  1286. DP_MOD_ID_RX);
  1287. if (!da_peer)
  1288. return false;
  1289. } else {
  1290. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1291. da_peer_id,
  1292. &txrx_ref_handle,
  1293. DP_MOD_ID_RX);
  1294. if (!da_peer)
  1295. return false;
  1296. params->dest_soc = da_peer->vdev->pdev->soc;
  1297. if (!params->dest_soc)
  1298. goto rel_da_peer;
  1299. }
  1300. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1301. /* If the source or destination peer in the isolation
  1302. * list then dont forward instead push to bridge stack.
  1303. */
  1304. if (dp_get_peer_isolation(ta_peer) ||
  1305. dp_get_peer_isolation(da_peer)) {
  1306. ret = false;
  1307. goto rel_da_peer;
  1308. }
  1309. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1310. ret = false;
  1311. goto rel_da_peer;
  1312. }
  1313. /* Same vdev, support Inra-BSS */
  1314. if (da_peer->vdev == ta_peer->vdev) {
  1315. ret = true;
  1316. goto rel_da_peer;
  1317. }
  1318. if (!be_vdev->mlo_dev_ctxt)
  1319. ret = false;
  1320. goto rel_da_peer;
  1321. }
  1322. /* MLO specific Intra-BSS check */
  1323. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1324. /* use dest chip id for legacy dest peer */
  1325. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1326. if (!(be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id][0]
  1327. == params->tx_vdev_id) &&
  1328. !(be_vdev->mlo_dev_ctxt->vdev_list[dest_chip_id][1]
  1329. == params->tx_vdev_id)) {
  1330. /*dp_soc_unref_delete(soc);*/
  1331. goto rel_da_peer;
  1332. }
  1333. }
  1334. ret = true;
  1335. }
  1336. rel_da_peer:
  1337. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1338. return ret;
  1339. }
  1340. #else
  1341. static bool
  1342. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1343. struct dp_txrx_peer *ta_peer,
  1344. uint8_t *rx_tlv_hdr,
  1345. struct hal_rx_msdu_metadata *msdu_metadata,
  1346. struct dp_be_intrabss_params *params)
  1347. {
  1348. uint16_t da_peer_id;
  1349. struct dp_txrx_peer *da_peer;
  1350. bool ret = false;
  1351. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1352. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1353. return false;
  1354. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1355. params->dest_soc,
  1356. msdu_metadata->da_idx);
  1357. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1358. &txrx_ref_handle, DP_MOD_ID_RX);
  1359. if (!da_peer)
  1360. return false;
  1361. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1362. /* If the source or destination peer in the isolation
  1363. * list then dont forward instead push to bridge stack.
  1364. */
  1365. if (dp_get_peer_isolation(ta_peer) ||
  1366. dp_get_peer_isolation(da_peer))
  1367. goto rel_da_peer;
  1368. if (da_peer->bss_peer || da_peer == ta_peer)
  1369. goto rel_da_peer;
  1370. /* Same vdev, support Inra-BSS */
  1371. if (da_peer->vdev == ta_peer->vdev) {
  1372. ret = true;
  1373. goto rel_da_peer;
  1374. }
  1375. /* MLO specific Intra-BSS check */
  1376. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1377. ret = true;
  1378. goto rel_da_peer;
  1379. }
  1380. rel_da_peer:
  1381. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1382. return ret;
  1383. }
  1384. #endif /* WLAN_MLO_MULTI_CHIP */
  1385. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1386. #if defined(WLAN_PKT_CAPTURE_RX_2_0) || defined(CONFIG_WORD_BASED_TLV)
  1387. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1388. uint32_t *msg_word,
  1389. void *rx_filter)
  1390. {
  1391. struct htt_rx_ring_tlv_filter *tlv_filter =
  1392. (struct htt_rx_ring_tlv_filter *)rx_filter;
  1393. if (!msg_word || !tlv_filter)
  1394. return;
  1395. /* tlv_filter->enable is set to 1 for monitor rings */
  1396. if (tlv_filter->enable)
  1397. return;
  1398. /* if word mask is zero, FW will set the default values */
  1399. if (!(tlv_filter->rx_mpdu_start_wmask > 0 &&
  1400. tlv_filter->rx_msdu_end_wmask > 0)) {
  1401. return;
  1402. }
  1403. HTT_RX_RING_SELECTION_CFG_WORD_MASK_COMPACTION_ENABLE_SET(*msg_word, 1);
  1404. /* word 14 */
  1405. msg_word += 3;
  1406. *msg_word = 0;
  1407. HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_WORD_MASK_SET(
  1408. *msg_word,
  1409. tlv_filter->rx_mpdu_start_wmask);
  1410. /* word 15 */
  1411. msg_word++;
  1412. *msg_word = 0;
  1413. HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_WORD_MASK_SET(
  1414. *msg_word,
  1415. tlv_filter->rx_msdu_end_wmask);
  1416. }
  1417. #else
  1418. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1419. uint32_t *msg_word,
  1420. void *rx_filter)
  1421. {
  1422. }
  1423. #endif
  1424. #if defined(WLAN_MCAST_MLO) && defined(CONFIG_MLO_SINGLE_DEV)
  1425. static inline
  1426. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1427. qdf_nbuf_t nbuf_copy)
  1428. {
  1429. struct dp_vdev *mcast_primary_vdev = NULL;
  1430. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1431. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1432. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1433. tx_exc_metadata.is_mlo_mcast = 1;
  1434. tx_exc_metadata.tx_encap_type = CDP_INVALID_TX_ENCAP_TYPE;
  1435. tx_exc_metadata.sec_type = CDP_INVALID_SEC_TYPE;
  1436. tx_exc_metadata.peer_id = CDP_INVALID_PEER;
  1437. tx_exc_metadata.tid = CDP_INVALID_TID;
  1438. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc,
  1439. be_vdev,
  1440. DP_MOD_ID_RX);
  1441. if (!mcast_primary_vdev)
  1442. return false;
  1443. nbuf_copy = dp_tx_send_exception((struct cdp_soc_t *)
  1444. mcast_primary_vdev->pdev->soc,
  1445. mcast_primary_vdev->vdev_id,
  1446. nbuf_copy, &tx_exc_metadata);
  1447. if (nbuf_copy)
  1448. qdf_nbuf_free(nbuf_copy);
  1449. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1450. mcast_primary_vdev, DP_MOD_ID_RX);
  1451. return true;
  1452. }
  1453. #else
  1454. static inline
  1455. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1456. qdf_nbuf_t nbuf_copy)
  1457. {
  1458. return false;
  1459. }
  1460. #endif
  1461. bool
  1462. dp_rx_intrabss_mcast_handler_be(struct dp_soc *soc,
  1463. struct dp_txrx_peer *ta_txrx_peer,
  1464. qdf_nbuf_t nbuf_copy,
  1465. struct cdp_tid_rx_stats *tid_stats,
  1466. uint8_t link_id)
  1467. {
  1468. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1469. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1470. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1471. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1472. tx_exc_metadata.is_intrabss_fwd = 1;
  1473. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1474. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1475. ta_txrx_peer->vdev->vdev_id,
  1476. nbuf_copy,
  1477. &tx_exc_metadata)) {
  1478. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1479. rx.intra_bss.fail, 1,
  1480. len, link_id);
  1481. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1482. qdf_nbuf_free(nbuf_copy);
  1483. } else {
  1484. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1485. rx.intra_bss.pkts, 1,
  1486. len, link_id);
  1487. tid_stats->intrabss_cnt++;
  1488. }
  1489. return true;
  1490. }
  1491. if (dp_rx_intrabss_mlo_mcbc_fwd(soc, ta_txrx_peer->vdev,
  1492. nbuf_copy))
  1493. return true;
  1494. return false;
  1495. }
  1496. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1497. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1498. uint8_t link_id)
  1499. {
  1500. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1501. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1502. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1503. tid_stats.tid_rx_stats[ring_id][tid];
  1504. bool ret = false;
  1505. struct dp_be_intrabss_params params;
  1506. struct hal_rx_msdu_metadata msdu_metadata;
  1507. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1508. * source, then clone the pkt and send the cloned pkt for
  1509. * intra BSS forwarding and original pkt up the network stack
  1510. * Note: how do we handle multicast pkts. do we forward
  1511. * all multicast pkts as is or let a higher layer module
  1512. * like igmpsnoop decide whether to forward or not with
  1513. * Mcast enhancement.
  1514. */
  1515. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1516. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1517. nbuf, tid_stats, link_id);
  1518. }
  1519. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1520. nbuf))
  1521. return true;
  1522. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  1523. params.dest_soc = soc;
  1524. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer, rx_tlv_hdr,
  1525. &msdu_metadata, &params)) {
  1526. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1527. params.tx_vdev_id,
  1528. rx_tlv_hdr, nbuf, tid_stats,
  1529. link_id);
  1530. }
  1531. return ret;
  1532. }
  1533. #endif
  1534. qdf_nbuf_t
  1535. dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
  1536. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  1537. uint32_t *rx_bufs_used)
  1538. {
  1539. hal_ring_desc_t ring_desc;
  1540. hal_soc_handle_t hal_soc;
  1541. struct dp_rx_desc *rx_desc;
  1542. union dp_rx_desc_list_elem_t
  1543. *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1544. union dp_rx_desc_list_elem_t
  1545. *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1546. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { 0 } };
  1547. uint8_t mac_id;
  1548. struct dp_srng *dp_rxdma_srng;
  1549. struct rx_desc_pool *rx_desc_pool;
  1550. qdf_nbuf_t nbuf_head = NULL;
  1551. qdf_nbuf_t nbuf_tail = NULL;
  1552. qdf_nbuf_t nbuf;
  1553. uint8_t msdu_continuation = 0;
  1554. bool process_sg_buf = false;
  1555. QDF_STATUS status;
  1556. struct dp_soc *replenish_soc;
  1557. uint8_t chip_id;
  1558. union hal_wbm_err_info_u wbm_err = { 0 };
  1559. qdf_assert(soc && hal_ring_hdl);
  1560. hal_soc = soc->hal_soc;
  1561. qdf_assert(hal_soc);
  1562. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1563. /* TODO */
  1564. /*
  1565. * Need API to convert from hal_ring pointer to
  1566. * Ring Type / Ring Id combo
  1567. */
  1568. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1569. soc, hal_ring_hdl);
  1570. goto done;
  1571. }
  1572. while (qdf_likely(quota)) {
  1573. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1574. if (qdf_unlikely(!ring_desc))
  1575. break;
  1576. /* Get SW Desc from HAL desc */
  1577. if (dp_wbm_get_rx_desc_from_hal_desc_be(soc,
  1578. ring_desc,
  1579. &rx_desc)) {
  1580. dp_rx_err_err("get rx sw desc from hal_desc failed");
  1581. continue;
  1582. }
  1583. if (dp_assert_always_internal_stat(rx_desc, soc,
  1584. rx.err.rx_desc_null))
  1585. continue;
  1586. if (!dp_rx_desc_check_magic(rx_desc)) {
  1587. dp_rx_err_err("%pK: Invalid rx_desc %pK",
  1588. soc, rx_desc);
  1589. continue;
  1590. }
  1591. /*
  1592. * this is a unlikely scenario where the host is reaping
  1593. * a descriptor which it already reaped just a while ago
  1594. * but is yet to replenish it back to HW.
  1595. * In this case host will dump the last 128 descriptors
  1596. * including the software descriptor rx_desc and assert.
  1597. */
  1598. if (qdf_unlikely(!rx_desc->in_use)) {
  1599. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1600. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1601. ring_desc, rx_desc);
  1602. continue;
  1603. }
  1604. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1605. ring_desc, rx_desc);
  1606. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1607. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1608. dp_info_rl("Rx error Nbuf %pK sanity check failure!",
  1609. rx_desc->nbuf);
  1610. rx_desc->in_err_state = 1;
  1611. rx_desc->unmapped = 1;
  1612. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1613. dp_rx_add_to_free_desc_list(
  1614. &head[rx_desc->chip_id][rx_desc->pool_id],
  1615. &tail[rx_desc->chip_id][rx_desc->pool_id],
  1616. rx_desc);
  1617. continue;
  1618. }
  1619. nbuf = rx_desc->nbuf;
  1620. /*
  1621. * Read wbm err info , MSDU info , MPDU info , peer meta data,
  1622. * from desc. Save all the info in nbuf CB/TLV.
  1623. * We will need this info when we do the actual nbuf processing
  1624. */
  1625. wbm_err.info = dp_rx_wbm_err_copy_desc_info_in_nbuf(
  1626. soc,
  1627. ring_desc,
  1628. nbuf,
  1629. rx_desc->pool_id);
  1630. /*
  1631. * For WBM ring, expect only MSDU buffers
  1632. */
  1633. if (dp_assert_always_internal_stat(
  1634. wbm_err.info_bit.buffer_or_desc_type ==
  1635. HAL_RX_WBM_BUF_TYPE_REL_BUF,
  1636. soc, rx.err.wbm_err_buf_rel_type))
  1637. continue;
  1638. /*
  1639. * Errors are handled only if the source is RXDMA or REO
  1640. */
  1641. qdf_assert((wbm_err.info_bit.wbm_err_src ==
  1642. HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1643. (wbm_err.info_bit.wbm_err_src ==
  1644. HAL_RX_WBM_ERR_SRC_REO));
  1645. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1646. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1647. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1648. rx_desc->unmapped = 1;
  1649. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1650. if (qdf_unlikely(
  1651. soc->wbm_release_desc_rx_sg_support &&
  1652. dp_rx_is_sg_formation_required(&wbm_err.info_bit))) {
  1653. /* SG is detected from continuation bit */
  1654. msdu_continuation =
  1655. dp_rx_wbm_err_msdu_continuation_get(soc,
  1656. ring_desc,
  1657. nbuf);
  1658. if (msdu_continuation &&
  1659. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1660. /* Update length from first buffer in SG */
  1661. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1662. hal_rx_msdu_start_msdu_len_get(
  1663. soc->hal_soc,
  1664. qdf_nbuf_data(nbuf));
  1665. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1666. true;
  1667. }
  1668. if (msdu_continuation) {
  1669. /* MSDU continued packets */
  1670. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1671. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1672. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1673. } else {
  1674. /* This is the terminal packet in SG */
  1675. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1676. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1677. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1678. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1679. process_sg_buf = true;
  1680. }
  1681. } else {
  1682. qdf_nbuf_set_rx_chfrag_cont(nbuf, 0);
  1683. }
  1684. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1685. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1686. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1687. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1688. nbuf);
  1689. if (process_sg_buf) {
  1690. if (!dp_rx_buffer_pool_refill(
  1691. soc,
  1692. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1693. rx_desc->pool_id))
  1694. DP_RX_MERGE_TWO_LIST(
  1695. nbuf_head, nbuf_tail,
  1696. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1697. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1698. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1699. dp_rx_wbm_sg_list_reset(soc);
  1700. process_sg_buf = false;
  1701. }
  1702. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1703. rx_desc->pool_id)) {
  1704. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1705. }
  1706. dp_rx_add_to_free_desc_list
  1707. (&head[rx_desc->chip_id][rx_desc->pool_id],
  1708. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  1709. /*
  1710. * if continuation bit is set then we have MSDU spread
  1711. * across multiple buffers, let us not decrement quota
  1712. * till we reap all buffers of that MSDU.
  1713. */
  1714. if (qdf_likely(!msdu_continuation))
  1715. quota -= 1;
  1716. }
  1717. done:
  1718. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1719. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  1720. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1721. /*
  1722. * continue with next mac_id if no pkts were reaped
  1723. * from that pool
  1724. */
  1725. if (!rx_bufs_reaped[chip_id][mac_id])
  1726. continue;
  1727. replenish_soc = dp_rx_replenish_soc_get(soc, chip_id);
  1728. dp_rxdma_srng =
  1729. &replenish_soc->rx_refill_buf_ring[mac_id];
  1730. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1731. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  1732. dp_rxdma_srng,
  1733. rx_desc_pool,
  1734. rx_bufs_reaped[chip_id][mac_id],
  1735. &head[chip_id][mac_id],
  1736. &tail[chip_id][mac_id]);
  1737. *rx_bufs_used += rx_bufs_reaped[chip_id][mac_id];
  1738. }
  1739. }
  1740. return nbuf_head;
  1741. }
  1742. #ifdef WLAN_FEATURE_11BE_MLO
  1743. /**
  1744. * check_extap_multicast_loopback() - Check if rx packet is a loopback packet.
  1745. *
  1746. * @vdev: vdev on which rx packet is received
  1747. * @addr: src address of the received packet
  1748. *
  1749. */
  1750. static bool check_extap_multicast_loopback(struct dp_vdev *vdev, uint8_t *addr)
  1751. {
  1752. /* if src mac addr matches with vdev mac address then drop the pkt */
  1753. if (!(qdf_mem_cmp(addr, vdev->mac_addr.raw, QDF_MAC_ADDR_SIZE)))
  1754. return true;
  1755. /* if src mac addr matches with mld mac address then drop the pkt */
  1756. if (!(qdf_mem_cmp(addr, vdev->mld_mac_addr.raw, QDF_MAC_ADDR_SIZE)))
  1757. return true;
  1758. return false;
  1759. }
  1760. #else
  1761. static bool check_extap_multicast_loopback(struct dp_vdev *vdev, uint8_t *addr)
  1762. {
  1763. return false;
  1764. }
  1765. #endif
  1766. QDF_STATUS
  1767. dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1768. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1769. struct dp_txrx_peer *txrx_peer,
  1770. bool is_reo_exception,
  1771. uint8_t link_id)
  1772. {
  1773. uint32_t pkt_len;
  1774. uint16_t msdu_len;
  1775. struct dp_vdev *vdev;
  1776. uint8_t tid;
  1777. qdf_ether_header_t *eh;
  1778. struct hal_rx_msdu_metadata msdu_metadata;
  1779. uint16_t sa_idx = 0;
  1780. bool is_eapol = 0;
  1781. bool enh_flag;
  1782. qdf_nbuf_set_rx_chfrag_start(
  1783. nbuf,
  1784. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1785. rx_tlv_hdr));
  1786. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1787. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1788. rx_tlv_hdr));
  1789. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1790. rx_tlv_hdr));
  1791. qdf_nbuf_set_da_valid(nbuf,
  1792. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1793. rx_tlv_hdr));
  1794. qdf_nbuf_set_sa_valid(nbuf,
  1795. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1796. rx_tlv_hdr));
  1797. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1798. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1799. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1800. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1801. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1802. if (dp_rx_check_pkt_len(soc, pkt_len))
  1803. goto drop_nbuf;
  1804. /* Set length in nbuf */
  1805. qdf_nbuf_set_pktlen(
  1806. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1807. }
  1808. /*
  1809. * Check if DMA completed -- msdu_done is the last bit
  1810. * to be written
  1811. */
  1812. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1813. dp_err_rl("MSDU DONE failure");
  1814. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1815. QDF_TRACE_LEVEL_INFO);
  1816. qdf_assert(0);
  1817. }
  1818. if (!txrx_peer &&
  1819. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1820. rx_tlv_hdr, nbuf))
  1821. return QDF_STATUS_E_FAILURE;
  1822. if (!txrx_peer) {
  1823. bool mpdu_done = false;
  1824. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1825. if (!pdev) {
  1826. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1827. return QDF_STATUS_E_FAILURE;
  1828. }
  1829. dp_err_rl("txrx_peer is NULL");
  1830. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1831. qdf_nbuf_len(nbuf));
  1832. /* QCN9000 has the support enabled */
  1833. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1834. mpdu_done = true;
  1835. nbuf->next = NULL;
  1836. /* Trigger invalid peer handler wrapper */
  1837. dp_rx_process_invalid_peer_wrapper(soc,
  1838. nbuf,
  1839. mpdu_done,
  1840. pool_id);
  1841. }
  1842. if (mpdu_done) {
  1843. pdev->invalid_peer_head_msdu = NULL;
  1844. pdev->invalid_peer_tail_msdu = NULL;
  1845. }
  1846. return QDF_STATUS_E_FAILURE;
  1847. }
  1848. vdev = txrx_peer->vdev;
  1849. if (!vdev) {
  1850. dp_err_rl("Null vdev!");
  1851. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1852. goto drop_nbuf;
  1853. }
  1854. /*
  1855. * Advance the packet start pointer by total size of
  1856. * pre-header TLV's
  1857. */
  1858. if (qdf_nbuf_is_frag(nbuf))
  1859. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1860. else
  1861. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1862. soc->rx_pkt_tlv_size));
  1863. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1864. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1865. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1866. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1867. link_id);
  1868. goto drop_nbuf;
  1869. }
  1870. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1871. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1872. if ((sa_idx < 0) ||
  1873. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1874. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1875. goto drop_nbuf;
  1876. }
  1877. }
  1878. if ((!soc->mec_fw_offload) &&
  1879. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1880. /* this is a looped back MCBC pkt, drop it */
  1881. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1882. qdf_nbuf_len(nbuf), link_id);
  1883. goto drop_nbuf;
  1884. }
  1885. /*
  1886. * In qwrap mode if the received packet matches with any of the vdev
  1887. * mac addresses, drop it. Donot receive multicast packets originated
  1888. * from any proxysta.
  1889. */
  1890. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1891. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1892. qdf_nbuf_len(nbuf), link_id);
  1893. goto drop_nbuf;
  1894. }
  1895. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1896. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1897. rx_tlv_hdr))) {
  1898. dp_err_rl("free buffer for multicast packet");
  1899. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1900. link_id);
  1901. goto drop_nbuf;
  1902. }
  1903. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1904. dp_err_rl("mcast Policy Check Drop pkt");
  1905. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1906. link_id);
  1907. goto drop_nbuf;
  1908. }
  1909. /* WDS Source Port Learning */
  1910. if (!soc->ast_offload_support &&
  1911. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1912. vdev->wds_enabled))
  1913. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1914. msdu_metadata);
  1915. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1916. struct dp_peer *peer;
  1917. struct dp_rx_tid *rx_tid;
  1918. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1919. DP_MOD_ID_RX_ERR);
  1920. if (peer) {
  1921. rx_tid = &peer->rx_tid[tid];
  1922. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1923. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned) {
  1924. /* For Mesh peer, if on one of the mesh AP the
  1925. * mesh peer is not deleted, the new addition of mesh
  1926. * peer on other mesh AP doesn't do BA negotiation
  1927. * leading to mismatch in BA windows.
  1928. * To avoid this send max BA window during init.
  1929. */
  1930. if (qdf_unlikely(vdev->mesh_vdev) ||
  1931. qdf_unlikely(txrx_peer->nawds_enabled))
  1932. dp_rx_tid_setup_wifi3(
  1933. peer, tid,
  1934. hal_get_rx_max_ba_window(soc->hal_soc,tid),
  1935. IEEE80211_SEQ_MAX);
  1936. else
  1937. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1938. IEEE80211_SEQ_MAX);
  1939. }
  1940. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1941. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1942. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1943. }
  1944. }
  1945. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1946. if (!txrx_peer->authorize) {
  1947. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1948. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1949. if (!dp_rx_err_match_dhost(eh, vdev))
  1950. goto drop_nbuf;
  1951. } else {
  1952. goto drop_nbuf;
  1953. }
  1954. }
  1955. /*
  1956. * Drop packets in this path if cce_match is found. Packets will come
  1957. * in following path depending on whether tidQ is setup.
  1958. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1959. * cce_match = 1
  1960. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1961. * dropped.
  1962. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1963. * cce_match = 1
  1964. * These packets need to be dropped and should not get delivered
  1965. * to stack.
  1966. */
  1967. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1968. goto drop_nbuf;
  1969. /*
  1970. * In extap mode if the received packet matches with mld mac address
  1971. * drop it. For non IP packets conversion might not be possible
  1972. * due to that MEC entry will not be updated, resulting loopback.
  1973. */
  1974. if (qdf_unlikely(check_extap_multicast_loopback(vdev,
  1975. eh->ether_shost))) {
  1976. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1977. qdf_nbuf_len(nbuf), link_id);
  1978. goto drop_nbuf;
  1979. }
  1980. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1981. qdf_nbuf_set_raw_frame(nbuf, 1);
  1982. qdf_nbuf_set_next(nbuf, NULL);
  1983. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, link_id);
  1984. } else {
  1985. enh_flag = vdev->pdev->enhanced_stats_en;
  1986. qdf_nbuf_set_next(nbuf, NULL);
  1987. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1988. enh_flag);
  1989. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  1990. rx.rx_success, 1,
  1991. qdf_nbuf_len(nbuf),
  1992. link_id);
  1993. /*
  1994. * Update the protocol tag in SKB based on
  1995. * CCE metadata
  1996. */
  1997. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1998. EXCEPTION_DEST_RING_ID,
  1999. true, true);
  2000. /* Update the flow tag in SKB based on FSE metadata */
  2001. dp_rx_update_flow_tag(soc, vdev, nbuf,
  2002. rx_tlv_hdr, true);
  2003. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  2004. soc->hal_soc, rx_tlv_hdr) &&
  2005. (vdev->rx_decap_type ==
  2006. htt_cmn_pkt_type_ethernet))) {
  2007. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  2008. enh_flag, link_id);
  2009. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  2010. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  2011. qdf_nbuf_len(nbuf),
  2012. enh_flag,
  2013. link_id);
  2014. } else {
  2015. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  2016. qdf_nbuf_len(nbuf),
  2017. enh_flag,
  2018. link_id);
  2019. }
  2020. qdf_nbuf_set_exc_frame(nbuf, 1);
  2021. if (qdf_unlikely(vdev->multipass_en)) {
  2022. if (dp_rx_multipass_process(txrx_peer, nbuf,
  2023. tid) == false) {
  2024. DP_PEER_PER_PKT_STATS_INC
  2025. (txrx_peer,
  2026. rx.multipass_rx_pkt_drop,
  2027. 1, link_id);
  2028. goto drop_nbuf;
  2029. }
  2030. }
  2031. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  2032. is_eapol);
  2033. }
  2034. return QDF_STATUS_SUCCESS;
  2035. drop_nbuf:
  2036. dp_rx_nbuf_free(nbuf);
  2037. return QDF_STATUS_E_FAILURE;
  2038. }