cam_sync_dma_fence.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #include "cam_sync_dma_fence.h"
  6. #include "cam_sync_util.h"
  7. extern unsigned long cam_sync_monitor_mask;
  8. /**
  9. * struct cam_dma_fence_row - DMA fence row
  10. */
  11. struct cam_dma_fence_row {
  12. char name[CAM_DMA_FENCE_NAME_LEN];
  13. struct dma_fence *fence;
  14. int32_t fd;
  15. enum cam_dma_fence_state state;
  16. struct dma_fence_cb fence_cb;
  17. int32_t sync_obj;
  18. cam_sync_callback_for_dma_fence sync_cb;
  19. bool cb_registered_for_sync;
  20. bool ext_dma_fence;
  21. bool sync_signal_dma;
  22. };
  23. /**
  24. * struct cam_dma_fence_device - DMA fence device
  25. */
  26. struct cam_dma_fence_device {
  27. uint64_t dma_fence_context;
  28. struct cam_dma_fence_row rows[CAM_DMA_FENCE_MAX_FENCES];
  29. spinlock_t row_spinlocks[CAM_DMA_FENCE_MAX_FENCES];
  30. struct mutex dev_lock;
  31. DECLARE_BITMAP(bitmap, CAM_DMA_FENCE_MAX_FENCES);
  32. struct cam_generic_fence_monitor_data **monitor_data;
  33. };
  34. static atomic64_t g_cam_dma_fence_seq_no;
  35. static struct cam_dma_fence_device *g_cam_dma_fence_dev;
  36. bool __cam_dma_fence_enable_signaling(
  37. struct dma_fence *fence)
  38. {
  39. return true;
  40. }
  41. const char *__cam_dma_fence_get_driver_name(
  42. struct dma_fence *fence)
  43. {
  44. return "Camera DMA fence driver";
  45. }
  46. void __cam_dma_fence_free(struct dma_fence *fence)
  47. {
  48. CAM_DBG(CAM_DMA_FENCE,
  49. "Free memory for dma fence seqno: %llu", fence->seqno);
  50. kfree(fence->lock);
  51. kfree(fence);
  52. }
  53. static struct dma_fence_ops cam_sync_dma_fence_ops = {
  54. .enable_signaling = __cam_dma_fence_enable_signaling,
  55. .get_driver_name = __cam_dma_fence_get_driver_name,
  56. .get_timeline_name = __cam_dma_fence_get_driver_name,
  57. .release = __cam_dma_fence_free,
  58. };
  59. static inline struct cam_generic_fence_monitor_entry *
  60. __cam_dma_fence_get_monitor_entries(int idx)
  61. {
  62. struct cam_generic_fence_monitor_data *monitor_data;
  63. monitor_data = CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data, idx);
  64. if (monitor_data->swap_monitor_entries)
  65. return monitor_data->prev_monitor_entries;
  66. else
  67. return monitor_data->monitor_entries;
  68. }
  69. static inline struct cam_generic_fence_monitor_entry *
  70. __cam_dma_fence_get_prev_monitor_entries(int idx)
  71. {
  72. struct cam_generic_fence_monitor_data *monitor_data;
  73. monitor_data = CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data, idx);
  74. if (monitor_data->swap_monitor_entries)
  75. return monitor_data->monitor_entries;
  76. else
  77. return monitor_data->prev_monitor_entries;
  78. }
  79. static void __cam_dma_fence_print_table(void)
  80. {
  81. int i;
  82. struct cam_dma_fence_row *row;
  83. struct dma_fence *fence;
  84. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  85. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  86. row = &g_cam_dma_fence_dev->rows[i];
  87. fence = row->fence;
  88. CAM_INFO(CAM_DMA_FENCE,
  89. "Idx: %d seqno: %llu name: %s state: %d",
  90. i, fence->seqno, row->name, row->state);
  91. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  92. }
  93. }
  94. static int __cam_dma_fence_find_free_idx(uint32_t *idx)
  95. {
  96. int rc = -ENOMEM;
  97. /* Hold lock to obtain free index */
  98. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  99. *idx = find_first_zero_bit(g_cam_dma_fence_dev->bitmap, CAM_DMA_FENCE_MAX_FENCES);
  100. if (*idx < CAM_DMA_FENCE_MAX_FENCES) {
  101. set_bit(*idx, g_cam_dma_fence_dev->bitmap);
  102. rc = 0;
  103. }
  104. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  105. if (rc) {
  106. CAM_ERR(CAM_DMA_FENCE, "No free idx, printing dma fence table......");
  107. __cam_dma_fence_print_table();
  108. }
  109. return rc;
  110. }
  111. static struct dma_fence *__cam_dma_fence_find_fence_in_table(
  112. int32_t fd, int32_t *idx)
  113. {
  114. int i;
  115. struct dma_fence *fence = NULL;
  116. struct cam_dma_fence_row *row = NULL;
  117. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  118. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  119. row = &g_cam_dma_fence_dev->rows[i];
  120. if ((row->state != CAM_DMA_FENCE_STATE_INVALID) && (row->fd == fd)) {
  121. *idx = i;
  122. fence = row->fence;
  123. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  124. break;
  125. }
  126. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  127. }
  128. return fence;
  129. }
  130. static void __cam_dma_fence_init_row(const char *name,
  131. struct dma_fence *dma_fence, int32_t fd, uint32_t idx,
  132. bool ext_dma_fence)
  133. {
  134. struct cam_dma_fence_row *row;
  135. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  136. row = &g_cam_dma_fence_dev->rows[idx];
  137. row->fence = dma_fence;
  138. row->fd = fd;
  139. row->state = CAM_DMA_FENCE_STATE_ACTIVE;
  140. row->ext_dma_fence = ext_dma_fence;
  141. strscpy(row->name, name, CAM_DMA_FENCE_NAME_LEN);
  142. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  143. cam_generic_fence_update_monitor_array(idx,
  144. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  145. CAM_FENCE_OP_CREATE);
  146. }
  147. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  148. }
  149. void __cam_dma_fence_signal_cb(
  150. struct dma_fence *fence, struct dma_fence_cb *cb)
  151. {
  152. struct cam_dma_fence_signal_sync_obj signal_sync_obj;
  153. struct cam_dma_fence_row *dma_fence_row =
  154. container_of(cb, struct cam_dma_fence_row, fence_cb);
  155. uint32_t idx;
  156. if (dma_fence_row->state == CAM_DMA_FENCE_STATE_INVALID) {
  157. CAM_ERR(CAM_DMA_FENCE, "dma fence seqno: %llu is in invalid state: %d",
  158. fence->seqno, dma_fence_row->state);
  159. return;
  160. }
  161. /* If this dma fence is signaled by sync obj, skip cb */
  162. if (dma_fence_row->sync_signal_dma)
  163. return;
  164. CAM_DBG(CAM_DMA_FENCE, "dma fence seqno: %llu fd: %d signaled, signal sync obj: %d",
  165. fence->seqno, dma_fence_row->fd, dma_fence_row->sync_obj);
  166. if ((dma_fence_row->cb_registered_for_sync) && (dma_fence_row->sync_cb)) {
  167. signal_sync_obj.fd = dma_fence_row->fd;
  168. /*
  169. * Signal is invoked with the fence lock held,
  170. * lock not needed to query status
  171. */
  172. signal_sync_obj.status = dma_fence_get_status_locked(fence);
  173. dma_fence_row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  174. dma_fence_row->sync_cb(dma_fence_row->sync_obj, &signal_sync_obj);
  175. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  176. &cam_sync_monitor_mask)) {
  177. __cam_dma_fence_find_fence_in_table(dma_fence_row->fd, &idx);
  178. cam_generic_fence_update_monitor_array(idx,
  179. &g_cam_dma_fence_dev->dev_lock,
  180. g_cam_dma_fence_dev->monitor_data,
  181. CAM_FENCE_OP_UNREGISTER_ON_SIGNAL);
  182. }
  183. }
  184. }
  185. static void __cam_dma_fence_dump_monitor_array(int dma_row_idx)
  186. {
  187. struct dma_fence *fence;
  188. struct cam_generic_fence_monitor_obj_info obj_info;
  189. struct cam_dma_fence_row *row;
  190. if (!g_cam_dma_fence_dev->monitor_data ||
  191. !test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  192. return;
  193. if (!CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data,
  194. dma_row_idx)->prev_obj_id)
  195. return;
  196. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  197. fence = row->fence;
  198. obj_info.name = row->name;
  199. obj_info.obj_id = row->fd;
  200. obj_info.state = row->state;
  201. obj_info.ref_cnt = kref_read(&fence->refcount);
  202. obj_info.monitor_data = CAM_GENERIC_MONITOR_GET_DATA(
  203. g_cam_dma_fence_dev->monitor_data, dma_row_idx);
  204. obj_info.fence_type = CAM_GENERIC_FENCE_TYPE_DMA_FENCE;
  205. obj_info.sync_id = row->sync_obj;
  206. obj_info.monitor_entries =
  207. __cam_dma_fence_get_monitor_entries(dma_row_idx);
  208. obj_info.prev_monitor_entries =
  209. __cam_dma_fence_get_prev_monitor_entries(dma_row_idx);
  210. cam_generic_fence_dump_monitor_array(&obj_info);
  211. }
  212. int cam_dma_fence_get_put_ref(
  213. bool get_or_put, int32_t dma_fence_row_idx)
  214. {
  215. struct dma_fence *dma_fence;
  216. struct cam_dma_fence_row *row;
  217. int rc = 0;
  218. if ((dma_fence_row_idx < 0) ||
  219. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  220. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  221. dma_fence_row_idx);
  222. return -EINVAL;
  223. }
  224. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  225. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  226. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  227. CAM_ERR(CAM_DMA_FENCE,
  228. "dma fence at idx: %d is in invalid state: %d",
  229. dma_fence_row_idx, row->state);
  230. rc = -EINVAL;
  231. goto monitor_dump;
  232. }
  233. dma_fence = row->fence;
  234. if (get_or_put)
  235. dma_fence_get(dma_fence);
  236. else
  237. dma_fence_put(dma_fence);
  238. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  239. CAM_DBG(CAM_DMA_FENCE, "Refcnt: %u after %s for dma fence with seqno: %llu",
  240. kref_read(&dma_fence->refcount), (get_or_put ? "getref" : "putref"),
  241. dma_fence->seqno);
  242. return rc;
  243. monitor_dump:
  244. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  245. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  246. return rc;
  247. }
  248. static struct dma_fence *cam_dma_fence_get_fence_from_sync_file(
  249. int32_t fd, int32_t *dma_fence_row_idx)
  250. {
  251. uint32_t idx;
  252. struct dma_fence *dma_fence = NULL;
  253. dma_fence = sync_file_get_fence(fd);
  254. if (IS_ERR_OR_NULL(dma_fence)) {
  255. CAM_ERR(CAM_DMA_FENCE, "Invalid fd: %d no dma fence found", fd);
  256. return ERR_PTR(-EINVAL);
  257. }
  258. if (__cam_dma_fence_find_free_idx(&idx)) {
  259. CAM_ERR(CAM_DMA_FENCE, "No free idx");
  260. goto end;
  261. }
  262. __cam_dma_fence_init_row(dma_fence->ops->get_driver_name(dma_fence),
  263. dma_fence, fd, idx, true);
  264. *dma_fence_row_idx = idx;
  265. CAM_DBG(CAM_DMA_FENCE,
  266. "External dma fence with fd: %d seqno: %llu ref_cnt: %u updated in tbl",
  267. fd, dma_fence->seqno, kref_read(&dma_fence->refcount));
  268. return dma_fence;
  269. end:
  270. dma_fence_put(dma_fence);
  271. return NULL;
  272. }
  273. struct dma_fence *cam_dma_fence_get_fence_from_fd(
  274. int32_t fd, int32_t *dma_fence_row_idx)
  275. {
  276. struct dma_fence *dma_fence = NULL;
  277. dma_fence = __cam_dma_fence_find_fence_in_table(fd, dma_fence_row_idx);
  278. if (IS_ERR_OR_NULL(dma_fence)) {
  279. CAM_WARN(CAM_DMA_FENCE,
  280. "dma fence with fd: %d is an external fence, querying sync file",
  281. fd);
  282. return cam_dma_fence_get_fence_from_sync_file(fd, dma_fence_row_idx);
  283. }
  284. dma_fence_get(dma_fence);
  285. CAM_DBG(CAM_DMA_FENCE, "dma fence found for fd: %d with seqno: %llu ref_cnt: %u",
  286. fd, dma_fence->seqno, kref_read(&dma_fence->refcount));
  287. return dma_fence;
  288. }
  289. int cam_dma_fence_register_cb(int32_t *sync_obj, int32_t *dma_fence_idx,
  290. cam_sync_callback_for_dma_fence sync_cb)
  291. {
  292. int rc = 0;
  293. int dma_fence_row_idx = 0;
  294. struct cam_dma_fence_row *row = NULL;
  295. struct dma_fence *dma_fence = NULL;
  296. if (!sync_obj || !dma_fence_idx || !sync_cb) {
  297. CAM_ERR(CAM_DMA_FENCE,
  298. "Invalid args sync_obj: %p dma_fence_idx: %p sync_cb: %p",
  299. sync_obj, dma_fence_idx, sync_cb);
  300. return -EINVAL;
  301. }
  302. dma_fence_row_idx = *dma_fence_idx;
  303. if ((dma_fence_row_idx < 0) ||
  304. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  305. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  306. dma_fence_row_idx);
  307. return -EINVAL;
  308. }
  309. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  310. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  311. dma_fence = row->fence;
  312. if (row->state != CAM_DMA_FENCE_STATE_ACTIVE) {
  313. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  314. &cam_sync_monitor_mask))
  315. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  316. &g_cam_dma_fence_dev->dev_lock,
  317. g_cam_dma_fence_dev->monitor_data,
  318. CAM_FENCE_OP_SKIP_REGISTER_CB);
  319. CAM_ERR(CAM_DMA_FENCE,
  320. "dma fence at idx: %d fd: %d seqno: %llu is not active, current state: %d",
  321. dma_fence_row_idx, row->fd, dma_fence->seqno, row->state);
  322. rc = -EINVAL;
  323. goto monitor_dump;
  324. }
  325. /**
  326. * If the cb is already registered, return
  327. * If a fd is closed by userspace without releasing the dma fence, it is
  328. * possible that same fd is returned to a new fence.
  329. */
  330. if (row->cb_registered_for_sync) {
  331. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  332. &cam_sync_monitor_mask))
  333. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  334. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  335. CAM_FENCE_OP_ALREADY_REGISTERED_CB);
  336. CAM_WARN(CAM_DMA_FENCE,
  337. "dma fence at idx: %d fd: %d seqno: %llu has already registered a cb for sync: %d - same fd for 2 fences?",
  338. dma_fence_row_idx, row->fd, dma_fence->seqno, row->sync_obj);
  339. goto end;
  340. }
  341. rc = dma_fence_add_callback(row->fence, &row->fence_cb,
  342. __cam_dma_fence_signal_cb);
  343. if (rc) {
  344. CAM_ERR(CAM_DMA_FENCE,
  345. "Failed to register cb for dma fence fd: %d seqno: %llu rc: %d",
  346. row->fd, dma_fence->seqno, rc);
  347. goto monitor_dump;
  348. }
  349. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  350. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  351. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  352. CAM_FENCE_OP_REGISTER_CB);
  353. row->cb_registered_for_sync = true;
  354. row->sync_obj = *sync_obj;
  355. row->sync_cb = sync_cb;
  356. CAM_DBG(CAM_DMA_FENCE,
  357. "CB successfully registered for dma fence fd: %d seqno: %llu for sync_obj: %d",
  358. row->fd, dma_fence->seqno, *sync_obj);
  359. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  360. return rc;
  361. monitor_dump:
  362. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  363. end:
  364. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  365. return rc;
  366. }
  367. static int __cam_dma_fence_signal_fence(
  368. struct dma_fence *dma_fence,
  369. int32_t status)
  370. {
  371. bool fence_signaled = false;
  372. fence_signaled = dma_fence_is_signaled(dma_fence);
  373. if (fence_signaled) {
  374. CAM_WARN(CAM_DMA_FENCE,
  375. "dma fence seqno: %llu is already signaled",
  376. dma_fence->seqno);
  377. return 0;
  378. }
  379. if (status)
  380. dma_fence_set_error(dma_fence, status);
  381. return dma_fence_signal(dma_fence);
  382. }
  383. int cam_dma_fence_internal_signal(
  384. int32_t dma_fence_row_idx,
  385. struct cam_dma_fence_signal *signal_dma_fence)
  386. {
  387. int rc;
  388. struct dma_fence *dma_fence = NULL;
  389. struct cam_dma_fence_row *row = NULL;
  390. if ((dma_fence_row_idx < 0) ||
  391. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  392. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  393. dma_fence_row_idx);
  394. return -EINVAL;
  395. }
  396. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  397. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  398. /* Ensures sync obj cb is not invoked */
  399. row->sync_signal_dma = true;
  400. dma_fence = row->fence;
  401. if (IS_ERR_OR_NULL(dma_fence)) {
  402. CAM_ERR(CAM_DMA_FENCE, "DMA fence in row: %d is invalid",
  403. dma_fence_row_idx);
  404. rc = -EINVAL;
  405. goto monitor_dump;
  406. }
  407. if (row->state == CAM_DMA_FENCE_STATE_SIGNALED) {
  408. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  409. CAM_WARN(CAM_DMA_FENCE,
  410. "dma fence fd: %d[seqno: %llu] already in signaled state",
  411. signal_dma_fence->dma_fence_fd, dma_fence->seqno);
  412. return 0;
  413. }
  414. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  415. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  416. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  417. CAM_FENCE_OP_SIGNAL);
  418. rc = __cam_dma_fence_signal_fence(dma_fence, signal_dma_fence->status);
  419. if (rc)
  420. CAM_WARN(CAM_DMA_FENCE,
  421. "dma fence seqno: %llu fd: %d already signaled rc: %d",
  422. dma_fence->seqno, row->fd, rc);
  423. row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  424. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  425. CAM_DBG(CAM_DMA_FENCE,
  426. "dma fence fd: %d[seqno: %llu] signaled with status: %d rc: %d",
  427. signal_dma_fence->dma_fence_fd, dma_fence->seqno,
  428. signal_dma_fence->status, rc);
  429. return rc;
  430. monitor_dump:
  431. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  432. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  433. return rc;
  434. }
  435. int cam_dma_fence_signal_fd(struct cam_dma_fence_signal *signal_dma_fence)
  436. {
  437. int rc;
  438. uint32_t idx;
  439. struct dma_fence *dma_fence = NULL;
  440. struct cam_dma_fence_row *row = NULL;
  441. dma_fence = __cam_dma_fence_find_fence_in_table(
  442. signal_dma_fence->dma_fence_fd, &idx);
  443. if (IS_ERR_OR_NULL(dma_fence)) {
  444. CAM_ERR(CAM_DMA_FENCE, "Failed to find dma fence for fd: %d",
  445. signal_dma_fence->dma_fence_fd);
  446. return -EINVAL;
  447. }
  448. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  449. row = &g_cam_dma_fence_dev->rows[idx];
  450. /*
  451. * Check for invalid state again, there could be a contention
  452. * between signal and release
  453. */
  454. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  455. CAM_ERR(CAM_DMA_FENCE,
  456. "dma fence fd: %d is invalid row_idx: %u, failed to signal",
  457. signal_dma_fence->dma_fence_fd, idx);
  458. rc = -EINVAL;
  459. goto monitor_dump;
  460. }
  461. if (row->state == CAM_DMA_FENCE_STATE_SIGNALED) {
  462. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  463. CAM_WARN(CAM_DMA_FENCE,
  464. "dma fence fd: %d[seqno: %llu] already in signaled state",
  465. signal_dma_fence->dma_fence_fd, dma_fence->seqno);
  466. return 0;
  467. }
  468. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  469. cam_generic_fence_update_monitor_array(idx,
  470. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  471. CAM_FENCE_OP_SIGNAL);
  472. rc = __cam_dma_fence_signal_fence(dma_fence, signal_dma_fence->status);
  473. if (rc)
  474. CAM_WARN(CAM_DMA_FENCE,
  475. "dma fence seqno: %llu fd: %d already signaled rc: %d",
  476. dma_fence->seqno, row->fd, rc);
  477. row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  478. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  479. CAM_DBG(CAM_DMA_FENCE,
  480. "dma fence fd: %d[seqno: %llu] signaled with status: %d rc: %d",
  481. signal_dma_fence->dma_fence_fd, dma_fence->seqno,
  482. signal_dma_fence->status, rc);
  483. return rc;
  484. monitor_dump:
  485. __cam_dma_fence_dump_monitor_array(idx);
  486. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  487. return rc;
  488. }
  489. static int __cam_dma_fence_get_fd(int32_t *row_idx,
  490. const char *name)
  491. {
  492. int fd = -1;
  493. uint32_t idx;
  494. struct dma_fence *dma_fence = NULL;
  495. spinlock_t *dma_fence_lock = NULL;
  496. struct sync_file *sync_file = NULL;
  497. if (__cam_dma_fence_find_free_idx(&idx))
  498. goto end;
  499. dma_fence_lock = kzalloc(sizeof(spinlock_t), GFP_KERNEL);
  500. if (!dma_fence_lock)
  501. goto free_idx;
  502. dma_fence = kzalloc(sizeof(struct dma_fence), GFP_KERNEL);
  503. if (!dma_fence) {
  504. kfree(dma_fence_lock);
  505. goto free_idx;
  506. }
  507. spin_lock_init(dma_fence_lock);
  508. dma_fence_init(dma_fence, &cam_sync_dma_fence_ops, dma_fence_lock,
  509. g_cam_dma_fence_dev->dma_fence_context,
  510. atomic64_inc_return(&g_cam_dma_fence_seq_no));
  511. fd = get_unused_fd_flags(O_CLOEXEC);
  512. if (fd < 0) {
  513. CAM_ERR(CAM_DMA_FENCE, "failed to get a unused fd: %d", fd);
  514. dma_fence_put(dma_fence);
  515. goto free_idx;
  516. }
  517. sync_file = sync_file_create(dma_fence);
  518. if (!sync_file) {
  519. put_unused_fd(fd);
  520. fd = -1;
  521. dma_fence_put(dma_fence);
  522. goto free_idx;
  523. }
  524. fd_install(fd, sync_file->file);
  525. *row_idx = idx;
  526. __cam_dma_fence_init_row(name, dma_fence, fd, idx, false);
  527. CAM_DBG(CAM_DMA_FENCE, "Created dma fence fd: %d[%s] seqno: %llu row_idx: %u ref_cnt: %u",
  528. fd, name, dma_fence->seqno, idx, kref_read(&dma_fence->refcount));
  529. return fd;
  530. free_idx:
  531. clear_bit(idx, g_cam_dma_fence_dev->bitmap);
  532. end:
  533. return fd;
  534. }
  535. int cam_dma_fence_create_fd(
  536. int32_t *dma_fence_fd, int32_t *dma_fence_row_idx, const char *name)
  537. {
  538. int fd = -1, rc = 0;
  539. if (!dma_fence_fd || !dma_fence_row_idx) {
  540. CAM_ERR(CAM_DMA_FENCE, "Invalid args fd: %pK dma_fence_row_idx: %pK",
  541. dma_fence_fd, dma_fence_row_idx);
  542. return -EINVAL;
  543. }
  544. fd = __cam_dma_fence_get_fd(dma_fence_row_idx, name);
  545. if (fd < 0) {
  546. rc = -EBADFD;
  547. goto end;
  548. }
  549. *dma_fence_fd = fd;
  550. end:
  551. return rc;
  552. }
  553. void __cam_dma_fence_save_previous_monitor_data(int dma_row_idx)
  554. {
  555. struct cam_generic_fence_monitor_data *row_mon_data;
  556. struct cam_dma_fence_row *row;
  557. if (!g_cam_dma_fence_dev->monitor_data)
  558. return;
  559. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  560. row_mon_data = CAM_GENERIC_MONITOR_GET_DATA(
  561. g_cam_dma_fence_dev->monitor_data, dma_row_idx);
  562. /* save current usage details into prev variables */
  563. strscpy(row_mon_data->prev_name, row->name, CAM_DMA_FENCE_NAME_LEN);
  564. row_mon_data->prev_obj_id = row->fd;
  565. row_mon_data->prev_sync_id = row->sync_obj;
  566. row_mon_data->prev_state = row->state;
  567. row_mon_data->swap_monitor_entries = !row_mon_data->swap_monitor_entries;
  568. row_mon_data->prev_monitor_head = atomic64_read(&row_mon_data->monitor_head);
  569. }
  570. static int __cam_dma_fence_release(int32_t dma_row_idx)
  571. {
  572. struct dma_fence *dma_fence = NULL;
  573. struct cam_dma_fence_row *row = NULL;
  574. int rc;
  575. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  576. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  577. dma_fence = row->fence;
  578. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  579. CAM_ERR(CAM_DMA_FENCE, "Invalid row index: %u, state: %u",
  580. dma_row_idx, row->state);
  581. rc = -EINVAL;
  582. goto monitor_dump;
  583. }
  584. if (row->state == CAM_DMA_FENCE_STATE_ACTIVE) {
  585. CAM_WARN(CAM_DMA_FENCE,
  586. "Unsignaled fence being released name: %s seqno: %llu fd:%d",
  587. row->name, dma_fence->seqno, row->fd);
  588. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  589. &cam_sync_monitor_mask))
  590. cam_generic_fence_update_monitor_array(dma_row_idx,
  591. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  592. CAM_FENCE_OP_SIGNAL);
  593. __cam_dma_fence_signal_fence(dma_fence, -ECANCELED);
  594. }
  595. CAM_DBG(CAM_DMA_FENCE,
  596. "Releasing dma fence with fd: %d[%s] row_idx: %u current ref_cnt: %u",
  597. row->fd, row->name, dma_row_idx, kref_read(&dma_fence->refcount));
  598. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  599. /* Update monitor entries & save data before row memset to 0 */
  600. cam_generic_fence_update_monitor_array(dma_row_idx,
  601. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  602. CAM_FENCE_OP_DESTROY);
  603. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE_DUMP, &cam_sync_monitor_mask))
  604. __cam_dma_fence_dump_monitor_array(dma_row_idx);
  605. __cam_dma_fence_save_previous_monitor_data(dma_row_idx);
  606. }
  607. /* putref on dma fence */
  608. dma_fence_put(dma_fence);
  609. /* deinit row */
  610. memset(row, 0, sizeof(struct cam_dma_fence_row));
  611. clear_bit(dma_row_idx, g_cam_dma_fence_dev->bitmap);
  612. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  613. return 0;
  614. monitor_dump:
  615. __cam_dma_fence_dump_monitor_array(dma_row_idx);
  616. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  617. return rc;
  618. }
  619. static int __cam_dma_fence_release_fd(int fd)
  620. {
  621. int32_t idx;
  622. struct dma_fence *dma_fence = NULL;
  623. dma_fence = __cam_dma_fence_find_fence_in_table(fd, &idx);
  624. if (IS_ERR_OR_NULL(dma_fence)) {
  625. CAM_ERR(CAM_DMA_FENCE, "Failed to find dma fence for fd: %d", fd);
  626. return -EINVAL;
  627. }
  628. return __cam_dma_fence_release(idx);
  629. }
  630. static int __cam_dma_fence_release_row(
  631. int32_t dma_fence_row_idx)
  632. {
  633. if ((dma_fence_row_idx < 0) ||
  634. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  635. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  636. dma_fence_row_idx);
  637. return -EINVAL;
  638. }
  639. return __cam_dma_fence_release(dma_fence_row_idx);
  640. }
  641. int cam_dma_fence_release(
  642. struct cam_dma_fence_release_params *release_params)
  643. {
  644. if (release_params->use_row_idx)
  645. return __cam_dma_fence_release_row(release_params->u.dma_row_idx);
  646. else
  647. return __cam_dma_fence_release_fd(release_params->u.dma_fence_fd);
  648. }
  649. void cam_dma_fence_close(void)
  650. {
  651. int i;
  652. struct cam_dma_fence_row *row = NULL;
  653. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  654. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  655. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  656. row = &g_cam_dma_fence_dev->rows[i];
  657. if (row->state != CAM_DMA_FENCE_STATE_INVALID) {
  658. CAM_DBG(CAM_DMA_FENCE,
  659. "Releasing dma fence seqno: %llu associated with fd: %d[%s] ref_cnt: %u",
  660. row->fence->seqno, row->fd, row->name,
  661. kref_read(&row->fence->refcount));
  662. /* If registered for cb, remove cb */
  663. if (row->cb_registered_for_sync) {
  664. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  665. &cam_sync_monitor_mask))
  666. cam_generic_fence_update_monitor_array(i,
  667. &g_cam_dma_fence_dev->dev_lock,
  668. g_cam_dma_fence_dev->monitor_data,
  669. CAM_FENCE_OP_UNREGISTER_CB);
  670. dma_fence_remove_callback(row->fence, &row->fence_cb);
  671. }
  672. /* Signal and put if the dma fence is created from camera */
  673. if (!row->ext_dma_fence) {
  674. if (row->state != CAM_DMA_FENCE_STATE_SIGNALED) {
  675. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  676. &cam_sync_monitor_mask))
  677. cam_generic_fence_update_monitor_array(i,
  678. &g_cam_dma_fence_dev->dev_lock,
  679. g_cam_dma_fence_dev->monitor_data,
  680. CAM_FENCE_OP_SIGNAL);
  681. __cam_dma_fence_signal_fence(row->fence, -EADV);
  682. }
  683. dma_fence_put(row->fence);
  684. }
  685. memset(row, 0, sizeof(struct cam_dma_fence_row));
  686. clear_bit(i, g_cam_dma_fence_dev->bitmap);
  687. }
  688. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  689. }
  690. if (g_cam_dma_fence_dev->monitor_data) {
  691. for (i = 0; i < CAM_DMA_FENCE_TABLE_SZ; i++)
  692. kfree(g_cam_dma_fence_dev->monitor_data[i]);
  693. }
  694. kfree(g_cam_dma_fence_dev->monitor_data);
  695. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  696. CAM_DBG(CAM_DMA_FENCE, "Close on Camera DMA fence driver");
  697. }
  698. void cam_dma_fence_open(void)
  699. {
  700. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  701. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  702. g_cam_dma_fence_dev->monitor_data = kzalloc(
  703. sizeof(struct cam_generic_fence_monitor_data *) *
  704. CAM_DMA_FENCE_TABLE_SZ, GFP_KERNEL);
  705. if (!g_cam_dma_fence_dev->monitor_data) {
  706. CAM_WARN(CAM_DMA_FENCE, "Failed to allocate memory %d",
  707. sizeof(struct cam_generic_fence_monitor_data *) *
  708. CAM_DMA_FENCE_TABLE_SZ);
  709. }
  710. }
  711. /* DMA fence seqno reset */
  712. atomic64_set(&g_cam_dma_fence_seq_no, 0);
  713. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  714. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver opened");
  715. }
  716. int cam_dma_fence_driver_init(void)
  717. {
  718. int i;
  719. g_cam_dma_fence_dev = kzalloc(sizeof(struct cam_dma_fence_device), GFP_KERNEL);
  720. if (!g_cam_dma_fence_dev)
  721. return -ENOMEM;
  722. mutex_init(&g_cam_dma_fence_dev->dev_lock);
  723. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++)
  724. spin_lock_init(&g_cam_dma_fence_dev->row_spinlocks[i]);
  725. bitmap_zero(g_cam_dma_fence_dev->bitmap, CAM_DMA_FENCE_MAX_FENCES);
  726. g_cam_dma_fence_dev->dma_fence_context = dma_fence_context_alloc(1);
  727. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver initialized");
  728. return 0;
  729. }
  730. void cam_dma_fence_driver_deinit(void)
  731. {
  732. kfree(g_cam_dma_fence_dev);
  733. g_cam_dma_fence_dev = NULL;
  734. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver deinitialized");
  735. }