dp_main.c 201 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /**
  92. * default_dscp_tid_map - Default DSCP-TID mapping
  93. *
  94. * DSCP TID
  95. * 000000 0
  96. * 001000 1
  97. * 010000 2
  98. * 011000 3
  99. * 100000 4
  100. * 101000 5
  101. * 110000 6
  102. * 111000 7
  103. */
  104. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  105. 0, 0, 0, 0, 0, 0, 0, 0,
  106. 1, 1, 1, 1, 1, 1, 1, 1,
  107. 2, 2, 2, 2, 2, 2, 2, 2,
  108. 3, 3, 3, 3, 3, 3, 3, 3,
  109. 4, 4, 4, 4, 4, 4, 4, 4,
  110. 5, 5, 5, 5, 5, 5, 5, 5,
  111. 6, 6, 6, 6, 6, 6, 6, 6,
  112. 7, 7, 7, 7, 7, 7, 7, 7,
  113. };
  114. /*
  115. * struct dp_rate_debug
  116. *
  117. * @mcs_type: print string for a given mcs
  118. * @valid: valid mcs rate?
  119. */
  120. struct dp_rate_debug {
  121. char mcs_type[DP_MAX_MCS_STRING_LEN];
  122. uint8_t valid;
  123. };
  124. #define MCS_VALID 1
  125. #define MCS_INVALID 0
  126. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  127. {
  128. {"OFDM 48 Mbps", MCS_VALID},
  129. {"OFDM 24 Mbps", MCS_VALID},
  130. {"OFDM 12 Mbps", MCS_VALID},
  131. {"OFDM 6 Mbps ", MCS_VALID},
  132. {"OFDM 54 Mbps", MCS_VALID},
  133. {"OFDM 36 Mbps", MCS_VALID},
  134. {"OFDM 18 Mbps", MCS_VALID},
  135. {"OFDM 9 Mbps ", MCS_VALID},
  136. {"INVALID ", MCS_INVALID},
  137. {"INVALID ", MCS_INVALID},
  138. {"INVALID ", MCS_INVALID},
  139. {"INVALID ", MCS_INVALID},
  140. {"INVALID ", MCS_VALID},
  141. },
  142. {
  143. {"CCK 11 Mbps Long ", MCS_VALID},
  144. {"CCK 5.5 Mbps Long ", MCS_VALID},
  145. {"CCK 2 Mbps Long ", MCS_VALID},
  146. {"CCK 1 Mbps Long ", MCS_VALID},
  147. {"CCK 11 Mbps Short ", MCS_VALID},
  148. {"CCK 5.5 Mbps Short", MCS_VALID},
  149. {"CCK 2 Mbps Short ", MCS_VALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_INVALID},
  153. {"INVALID ", MCS_INVALID},
  154. {"INVALID ", MCS_INVALID},
  155. {"INVALID ", MCS_VALID},
  156. },
  157. {
  158. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  159. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  160. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  161. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  162. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  163. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  164. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  165. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_INVALID},
  170. {"INVALID ", MCS_VALID},
  171. },
  172. {
  173. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  174. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  175. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  176. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  177. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  178. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  179. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  180. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  181. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  182. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  183. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  184. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  185. {"INVALID ", MCS_VALID},
  186. },
  187. {
  188. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  189. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  190. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  191. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  192. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  193. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  194. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  195. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  196. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  197. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  198. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  199. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  200. {"INVALID ", MCS_VALID},
  201. }
  202. };
  203. /**
  204. * @brief Cpu ring map types
  205. */
  206. enum dp_cpu_ring_map_types {
  207. DP_DEFAULT_MAP,
  208. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  209. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  210. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  211. DP_CPU_RING_MAP_MAX
  212. };
  213. /**
  214. * @brief Cpu to tx ring map
  215. */
  216. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  217. {0x0, 0x1, 0x2, 0x0},
  218. {0x1, 0x2, 0x1, 0x2},
  219. {0x0, 0x2, 0x0, 0x2},
  220. {0x2, 0x2, 0x2, 0x2}
  221. };
  222. /**
  223. * @brief Select the type of statistics
  224. */
  225. enum dp_stats_type {
  226. STATS_FW = 0,
  227. STATS_HOST = 1,
  228. STATS_TYPE_MAX = 2,
  229. };
  230. /**
  231. * @brief General Firmware statistics options
  232. *
  233. */
  234. enum dp_fw_stats {
  235. TXRX_FW_STATS_INVALID = -1,
  236. };
  237. /**
  238. * dp_stats_mapping_table - Firmware and Host statistics
  239. * currently supported
  240. */
  241. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  242. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  253. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  261. /* Last ENUM for HTT FW STATS */
  262. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  263. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  264. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  265. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  266. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  267. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  268. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  269. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  270. };
  271. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  272. struct cdp_peer *peer_hdl,
  273. uint8_t *mac_addr,
  274. enum cdp_txrx_ast_entry_type type,
  275. uint32_t flags)
  276. {
  277. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  278. (struct dp_peer *)peer_hdl,
  279. mac_addr,
  280. type,
  281. flags);
  282. }
  283. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  284. void *ast_entry_hdl)
  285. {
  286. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  287. qdf_spin_lock_bh(&soc->ast_lock);
  288. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  289. (struct dp_ast_entry *)ast_entry_hdl);
  290. qdf_spin_unlock_bh(&soc->ast_lock);
  291. }
  292. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  293. struct cdp_peer *peer_hdl,
  294. void *ast_entry_hdl,
  295. uint32_t flags)
  296. {
  297. int status;
  298. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  299. qdf_spin_lock_bh(&soc->ast_lock);
  300. status = dp_peer_update_ast(soc,
  301. (struct dp_peer *)peer_hdl,
  302. (struct dp_ast_entry *)ast_entry_hdl,
  303. flags);
  304. qdf_spin_unlock_bh(&soc->ast_lock);
  305. return status;
  306. }
  307. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  308. uint8_t *ast_mac_addr)
  309. {
  310. struct dp_ast_entry *ast_entry;
  311. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  312. qdf_spin_lock_bh(&soc->ast_lock);
  313. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  314. qdf_spin_unlock_bh(&soc->ast_lock);
  315. return (void *)ast_entry;
  316. }
  317. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  318. void *ast_entry_hdl)
  319. {
  320. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  321. (struct dp_ast_entry *)ast_entry_hdl);
  322. }
  323. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  324. void *ast_entry_hdl)
  325. {
  326. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  327. (struct dp_ast_entry *)ast_entry_hdl);
  328. }
  329. static void dp_peer_ast_set_type_wifi3(
  330. struct cdp_soc_t *soc_hdl,
  331. void *ast_entry_hdl,
  332. enum cdp_txrx_ast_entry_type type)
  333. {
  334. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  335. (struct dp_ast_entry *)ast_entry_hdl,
  336. type);
  337. }
  338. /**
  339. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  340. * @ring_num: ring num of the ring being queried
  341. * @grp_mask: the grp_mask array for the ring type in question.
  342. *
  343. * The grp_mask array is indexed by group number and the bit fields correspond
  344. * to ring numbers. We are finding which interrupt group a ring belongs to.
  345. *
  346. * Return: the index in the grp_mask array with the ring number.
  347. * -QDF_STATUS_E_NOENT if no entry is found
  348. */
  349. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  350. {
  351. int ext_group_num;
  352. int mask = 1 << ring_num;
  353. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  354. ext_group_num++) {
  355. if (mask & grp_mask[ext_group_num])
  356. return ext_group_num;
  357. }
  358. return -QDF_STATUS_E_NOENT;
  359. }
  360. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  361. enum hal_ring_type ring_type,
  362. int ring_num)
  363. {
  364. int *grp_mask;
  365. switch (ring_type) {
  366. case WBM2SW_RELEASE:
  367. /* dp_tx_comp_handler - soc->tx_comp_ring */
  368. if (ring_num < 3)
  369. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  370. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  371. else if (ring_num == 3) {
  372. /* sw treats this as a separate ring type */
  373. grp_mask = &soc->wlan_cfg_ctx->
  374. int_rx_wbm_rel_ring_mask[0];
  375. ring_num = 0;
  376. } else {
  377. qdf_assert(0);
  378. return -QDF_STATUS_E_NOENT;
  379. }
  380. break;
  381. case REO_EXCEPTION:
  382. /* dp_rx_err_process - &soc->reo_exception_ring */
  383. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  384. break;
  385. case REO_DST:
  386. /* dp_rx_process - soc->reo_dest_ring */
  387. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  388. break;
  389. case REO_STATUS:
  390. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  391. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  392. break;
  393. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  394. case RXDMA_MONITOR_STATUS:
  395. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  396. case RXDMA_MONITOR_DST:
  397. /* dp_mon_process */
  398. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  399. break;
  400. case RXDMA_DST:
  401. /* dp_rxdma_err_process */
  402. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  403. break;
  404. case RXDMA_BUF:
  405. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  406. break;
  407. case RXDMA_MONITOR_BUF:
  408. /* TODO: support low_thresh interrupt */
  409. return -QDF_STATUS_E_NOENT;
  410. break;
  411. case TCL_DATA:
  412. case TCL_CMD:
  413. case REO_CMD:
  414. case SW2WBM_RELEASE:
  415. case WBM_IDLE_LINK:
  416. /* normally empty SW_TO_HW rings */
  417. return -QDF_STATUS_E_NOENT;
  418. break;
  419. case TCL_STATUS:
  420. case REO_REINJECT:
  421. /* misc unused rings */
  422. return -QDF_STATUS_E_NOENT;
  423. break;
  424. case CE_SRC:
  425. case CE_DST:
  426. case CE_DST_STATUS:
  427. /* CE_rings - currently handled by hif */
  428. default:
  429. return -QDF_STATUS_E_NOENT;
  430. break;
  431. }
  432. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  433. }
  434. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  435. *ring_params, int ring_type, int ring_num)
  436. {
  437. int msi_group_number;
  438. int msi_data_count;
  439. int ret;
  440. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  441. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  442. &msi_data_count, &msi_data_start,
  443. &msi_irq_start);
  444. if (ret)
  445. return;
  446. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  447. ring_num);
  448. if (msi_group_number < 0) {
  449. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  450. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  451. ring_type, ring_num);
  452. ring_params->msi_addr = 0;
  453. ring_params->msi_data = 0;
  454. return;
  455. }
  456. if (msi_group_number > msi_data_count) {
  457. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  458. FL("2 msi_groups will share an msi; msi_group_num %d"),
  459. msi_group_number);
  460. QDF_ASSERT(0);
  461. }
  462. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  463. ring_params->msi_addr = addr_low;
  464. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  465. ring_params->msi_data = (msi_group_number % msi_data_count)
  466. + msi_data_start;
  467. ring_params->flags |= HAL_SRNG_MSI_INTR;
  468. }
  469. /**
  470. * dp_print_ast_stats() - Dump AST table contents
  471. * @soc: Datapath soc handle
  472. *
  473. * return void
  474. */
  475. #ifdef FEATURE_AST
  476. static void dp_print_ast_stats(struct dp_soc *soc)
  477. {
  478. uint8_t i;
  479. uint8_t num_entries = 0;
  480. struct dp_vdev *vdev;
  481. struct dp_pdev *pdev;
  482. struct dp_peer *peer;
  483. struct dp_ast_entry *ase, *tmp_ase;
  484. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  485. DP_PRINT_STATS("AST Stats:");
  486. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  487. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  488. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  489. DP_PRINT_STATS("AST Table:");
  490. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  491. pdev = soc->pdev_list[i];
  492. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  493. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  494. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  495. DP_PRINT_STATS("%6d mac_addr = %pM"
  496. " peer_mac_addr = %pM"
  497. " type = %s"
  498. " next_hop = %d"
  499. " is_active = %d"
  500. " is_bss = %d"
  501. " ast_idx = %d"
  502. " pdev_id = %d"
  503. " vdev_id = %d",
  504. ++num_entries,
  505. ase->mac_addr.raw,
  506. ase->peer->mac_addr.raw,
  507. type[ase->type],
  508. ase->next_hop,
  509. ase->is_active,
  510. ase->is_bss,
  511. ase->ast_idx,
  512. ase->pdev_id,
  513. ase->vdev_id);
  514. }
  515. }
  516. }
  517. }
  518. }
  519. #else
  520. static void dp_print_ast_stats(struct dp_soc *soc)
  521. {
  522. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  523. return;
  524. }
  525. #endif
  526. /*
  527. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  528. */
  529. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  530. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  531. {
  532. void *hal_soc = soc->hal_soc;
  533. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  534. /* TODO: See if we should get align size from hal */
  535. uint32_t ring_base_align = 8;
  536. struct hal_srng_params ring_params;
  537. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  538. /* TODO: Currently hal layer takes care of endianness related settings.
  539. * See if these settings need to passed from DP layer
  540. */
  541. ring_params.flags = 0;
  542. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  543. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  544. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  545. srng->hal_srng = NULL;
  546. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  547. srng->num_entries = num_entries;
  548. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  549. soc->osdev, soc->osdev->dev, srng->alloc_size,
  550. &(srng->base_paddr_unaligned));
  551. if (!srng->base_vaddr_unaligned) {
  552. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  553. FL("alloc failed - ring_type: %d, ring_num %d"),
  554. ring_type, ring_num);
  555. return QDF_STATUS_E_NOMEM;
  556. }
  557. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  558. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  559. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  560. ((unsigned long)(ring_params.ring_base_vaddr) -
  561. (unsigned long)srng->base_vaddr_unaligned);
  562. ring_params.num_entries = num_entries;
  563. if (soc->intr_mode == DP_INTR_MSI) {
  564. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  565. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  566. FL("Using MSI for ring_type: %d, ring_num %d"),
  567. ring_type, ring_num);
  568. } else {
  569. ring_params.msi_data = 0;
  570. ring_params.msi_addr = 0;
  571. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  572. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  573. ring_type, ring_num);
  574. }
  575. /*
  576. * Setup interrupt timer and batch counter thresholds for
  577. * interrupt mitigation based on ring type
  578. */
  579. if (ring_type == REO_DST) {
  580. ring_params.intr_timer_thres_us =
  581. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  582. ring_params.intr_batch_cntr_thres_entries =
  583. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  584. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  585. ring_params.intr_timer_thres_us =
  586. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  587. ring_params.intr_batch_cntr_thres_entries =
  588. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  589. } else {
  590. ring_params.intr_timer_thres_us =
  591. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  592. ring_params.intr_batch_cntr_thres_entries =
  593. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  594. }
  595. /* Enable low threshold interrupts for rx buffer rings (regular and
  596. * monitor buffer rings.
  597. * TODO: See if this is required for any other ring
  598. */
  599. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  600. (ring_type == RXDMA_MONITOR_STATUS)) {
  601. /* TODO: Setting low threshold to 1/8th of ring size
  602. * see if this needs to be configurable
  603. */
  604. ring_params.low_threshold = num_entries >> 3;
  605. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  606. ring_params.intr_timer_thres_us = 0x1000;
  607. }
  608. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  609. mac_id, &ring_params);
  610. if (!srng->hal_srng) {
  611. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  612. srng->alloc_size,
  613. srng->base_vaddr_unaligned,
  614. srng->base_paddr_unaligned, 0);
  615. }
  616. return 0;
  617. }
  618. /**
  619. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  620. * Any buffers allocated and attached to ring entries are expected to be freed
  621. * before calling this function.
  622. */
  623. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  624. int ring_type, int ring_num)
  625. {
  626. if (!srng->hal_srng) {
  627. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  628. FL("Ring type: %d, num:%d not setup"),
  629. ring_type, ring_num);
  630. return;
  631. }
  632. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  633. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  634. srng->alloc_size,
  635. srng->base_vaddr_unaligned,
  636. srng->base_paddr_unaligned, 0);
  637. srng->hal_srng = NULL;
  638. }
  639. /* TODO: Need this interface from HIF */
  640. void *hif_get_hal_handle(void *hif_handle);
  641. /*
  642. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  643. * @dp_ctx: DP SOC handle
  644. * @budget: Number of frames/descriptors that can be processed in one shot
  645. *
  646. * Return: remaining budget/quota for the soc device
  647. */
  648. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  649. {
  650. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  651. struct dp_soc *soc = int_ctx->soc;
  652. int ring = 0;
  653. uint32_t work_done = 0;
  654. int budget = dp_budget;
  655. uint8_t tx_mask = int_ctx->tx_ring_mask;
  656. uint8_t rx_mask = int_ctx->rx_ring_mask;
  657. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  658. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  659. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  660. uint32_t remaining_quota = dp_budget;
  661. struct dp_pdev *pdev = NULL;
  662. int mac_id;
  663. /* Process Tx completion interrupts first to return back buffers */
  664. while (tx_mask) {
  665. if (tx_mask & 0x1) {
  666. work_done = dp_tx_comp_handler(soc,
  667. soc->tx_comp_ring[ring].hal_srng,
  668. remaining_quota);
  669. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  670. "tx mask 0x%x ring %d, budget %d, work_done %d",
  671. tx_mask, ring, budget, work_done);
  672. budget -= work_done;
  673. if (budget <= 0)
  674. goto budget_done;
  675. remaining_quota = budget;
  676. }
  677. tx_mask = tx_mask >> 1;
  678. ring++;
  679. }
  680. /* Process REO Exception ring interrupt */
  681. if (rx_err_mask) {
  682. work_done = dp_rx_err_process(soc,
  683. soc->reo_exception_ring.hal_srng,
  684. remaining_quota);
  685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  686. "REO Exception Ring: work_done %d budget %d",
  687. work_done, budget);
  688. budget -= work_done;
  689. if (budget <= 0) {
  690. goto budget_done;
  691. }
  692. remaining_quota = budget;
  693. }
  694. /* Process Rx WBM release ring interrupt */
  695. if (rx_wbm_rel_mask) {
  696. work_done = dp_rx_wbm_err_process(soc,
  697. soc->rx_rel_ring.hal_srng, remaining_quota);
  698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  699. "WBM Release Ring: work_done %d budget %d",
  700. work_done, budget);
  701. budget -= work_done;
  702. if (budget <= 0) {
  703. goto budget_done;
  704. }
  705. remaining_quota = budget;
  706. }
  707. /* Process Rx interrupts */
  708. if (rx_mask) {
  709. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  710. if (rx_mask & (1 << ring)) {
  711. work_done = dp_rx_process(int_ctx,
  712. soc->reo_dest_ring[ring].hal_srng,
  713. remaining_quota);
  714. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  715. "rx mask 0x%x ring %d, work_done %d budget %d",
  716. rx_mask, ring, work_done, budget);
  717. budget -= work_done;
  718. if (budget <= 0)
  719. goto budget_done;
  720. remaining_quota = budget;
  721. }
  722. }
  723. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  724. work_done = dp_rxdma_err_process(soc, ring,
  725. remaining_quota);
  726. budget -= work_done;
  727. }
  728. }
  729. if (reo_status_mask)
  730. dp_reo_status_ring_handler(soc);
  731. /* Process LMAC interrupts */
  732. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  733. pdev = soc->pdev_list[ring];
  734. if (pdev == NULL)
  735. continue;
  736. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  737. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  738. pdev->pdev_id);
  739. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  740. work_done = dp_mon_process(soc, mac_for_pdev,
  741. remaining_quota);
  742. budget -= work_done;
  743. if (budget <= 0)
  744. goto budget_done;
  745. remaining_quota = budget;
  746. }
  747. if (int_ctx->rxdma2host_ring_mask &
  748. (1 << mac_for_pdev)) {
  749. work_done = dp_rxdma_err_process(soc,
  750. mac_for_pdev,
  751. remaining_quota);
  752. budget -= work_done;
  753. if (budget <= 0)
  754. goto budget_done;
  755. remaining_quota = budget;
  756. }
  757. if (int_ctx->host2rxdma_ring_mask &
  758. (1 << mac_for_pdev)) {
  759. union dp_rx_desc_list_elem_t *desc_list = NULL;
  760. union dp_rx_desc_list_elem_t *tail = NULL;
  761. struct dp_srng *rx_refill_buf_ring =
  762. &pdev->rx_refill_buf_ring;
  763. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  764. 1);
  765. dp_rx_buffers_replenish(soc, mac_for_pdev,
  766. rx_refill_buf_ring,
  767. &soc->rx_desc_buf[mac_for_pdev], 0,
  768. &desc_list, &tail,
  769. HAL_RX_BUF_RBM_SW3_BM);
  770. }
  771. }
  772. }
  773. qdf_lro_flush(int_ctx->lro_ctx);
  774. budget_done:
  775. return dp_budget - budget;
  776. }
  777. #ifdef DP_INTR_POLL_BASED
  778. /* dp_interrupt_timer()- timer poll for interrupts
  779. *
  780. * @arg: SoC Handle
  781. *
  782. * Return:
  783. *
  784. */
  785. static void dp_interrupt_timer(void *arg)
  786. {
  787. struct dp_soc *soc = (struct dp_soc *) arg;
  788. int i;
  789. if (qdf_atomic_read(&soc->cmn_init_done)) {
  790. for (i = 0;
  791. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  792. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  793. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  794. }
  795. }
  796. /*
  797. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  798. * @txrx_soc: DP SOC handle
  799. *
  800. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  801. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  802. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  803. *
  804. * Return: 0 for success. nonzero for failure.
  805. */
  806. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  807. {
  808. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  809. int i;
  810. soc->intr_mode = DP_INTR_POLL;
  811. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  812. soc->intr_ctx[i].dp_intr_id = i;
  813. soc->intr_ctx[i].tx_ring_mask =
  814. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  815. soc->intr_ctx[i].rx_ring_mask =
  816. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  817. soc->intr_ctx[i].rx_mon_ring_mask =
  818. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  819. soc->intr_ctx[i].rx_err_ring_mask =
  820. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  821. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  822. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  823. soc->intr_ctx[i].reo_status_ring_mask =
  824. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  825. soc->intr_ctx[i].rxdma2host_ring_mask =
  826. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  827. soc->intr_ctx[i].soc = soc;
  828. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  829. }
  830. qdf_timer_init(soc->osdev, &soc->int_timer,
  831. dp_interrupt_timer, (void *)soc,
  832. QDF_TIMER_TYPE_WAKE_APPS);
  833. return QDF_STATUS_SUCCESS;
  834. }
  835. #if defined(CONFIG_MCL)
  836. extern int con_mode_monitor;
  837. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  838. /*
  839. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  840. * @txrx_soc: DP SOC handle
  841. *
  842. * Call the appropriate attach function based on the mode of operation.
  843. * This is a WAR for enabling monitor mode.
  844. *
  845. * Return: 0 for success. nonzero for failure.
  846. */
  847. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  848. {
  849. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  850. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  851. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  853. "%s: Poll mode", __func__);
  854. return dp_soc_interrupt_attach_poll(txrx_soc);
  855. } else {
  856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  857. "%s: Interrupt mode", __func__);
  858. return dp_soc_interrupt_attach(txrx_soc);
  859. }
  860. }
  861. #else
  862. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  863. {
  864. return dp_soc_interrupt_attach_poll(txrx_soc);
  865. }
  866. #endif
  867. #endif
  868. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  869. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  870. {
  871. int j;
  872. int num_irq = 0;
  873. int tx_mask =
  874. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  875. int rx_mask =
  876. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  877. int rx_mon_mask =
  878. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  879. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  880. soc->wlan_cfg_ctx, intr_ctx_num);
  881. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  882. soc->wlan_cfg_ctx, intr_ctx_num);
  883. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  884. soc->wlan_cfg_ctx, intr_ctx_num);
  885. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  886. soc->wlan_cfg_ctx, intr_ctx_num);
  887. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  888. soc->wlan_cfg_ctx, intr_ctx_num);
  889. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  890. if (tx_mask & (1 << j)) {
  891. irq_id_map[num_irq++] =
  892. (wbm2host_tx_completions_ring1 - j);
  893. }
  894. if (rx_mask & (1 << j)) {
  895. irq_id_map[num_irq++] =
  896. (reo2host_destination_ring1 - j);
  897. }
  898. if (rxdma2host_ring_mask & (1 << j)) {
  899. irq_id_map[num_irq++] =
  900. rxdma2host_destination_ring_mac1 -
  901. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  902. }
  903. if (host2rxdma_ring_mask & (1 << j)) {
  904. irq_id_map[num_irq++] =
  905. host2rxdma_host_buf_ring_mac1 -
  906. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  907. }
  908. if (rx_mon_mask & (1 << j)) {
  909. irq_id_map[num_irq++] =
  910. ppdu_end_interrupts_mac1 -
  911. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  912. irq_id_map[num_irq++] =
  913. rxdma2host_monitor_status_ring_mac1 -
  914. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  915. }
  916. if (rx_wbm_rel_ring_mask & (1 << j))
  917. irq_id_map[num_irq++] = wbm2host_rx_release;
  918. if (rx_err_ring_mask & (1 << j))
  919. irq_id_map[num_irq++] = reo2host_exception;
  920. if (reo_status_ring_mask & (1 << j))
  921. irq_id_map[num_irq++] = reo2host_status;
  922. }
  923. *num_irq_r = num_irq;
  924. }
  925. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  926. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  927. int msi_vector_count, int msi_vector_start)
  928. {
  929. int tx_mask = wlan_cfg_get_tx_ring_mask(
  930. soc->wlan_cfg_ctx, intr_ctx_num);
  931. int rx_mask = wlan_cfg_get_rx_ring_mask(
  932. soc->wlan_cfg_ctx, intr_ctx_num);
  933. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  934. soc->wlan_cfg_ctx, intr_ctx_num);
  935. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  936. soc->wlan_cfg_ctx, intr_ctx_num);
  937. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  938. soc->wlan_cfg_ctx, intr_ctx_num);
  939. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  940. soc->wlan_cfg_ctx, intr_ctx_num);
  941. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  942. soc->wlan_cfg_ctx, intr_ctx_num);
  943. unsigned int vector =
  944. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  945. int num_irq = 0;
  946. soc->intr_mode = DP_INTR_MSI;
  947. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  948. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  949. irq_id_map[num_irq++] =
  950. pld_get_msi_irq(soc->osdev->dev, vector);
  951. *num_irq_r = num_irq;
  952. }
  953. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  954. int *irq_id_map, int *num_irq)
  955. {
  956. int msi_vector_count, ret;
  957. uint32_t msi_base_data, msi_vector_start;
  958. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  959. &msi_vector_count,
  960. &msi_base_data,
  961. &msi_vector_start);
  962. if (ret)
  963. return dp_soc_interrupt_map_calculate_integrated(soc,
  964. intr_ctx_num, irq_id_map, num_irq);
  965. else
  966. dp_soc_interrupt_map_calculate_msi(soc,
  967. intr_ctx_num, irq_id_map, num_irq,
  968. msi_vector_count, msi_vector_start);
  969. }
  970. /*
  971. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  972. * @txrx_soc: DP SOC handle
  973. *
  974. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  975. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  976. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  977. *
  978. * Return: 0 for success. nonzero for failure.
  979. */
  980. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  981. {
  982. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  983. int i = 0;
  984. int num_irq = 0;
  985. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  986. int ret = 0;
  987. /* Map of IRQ ids registered with one interrupt context */
  988. int irq_id_map[HIF_MAX_GRP_IRQ];
  989. int tx_mask =
  990. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  991. int rx_mask =
  992. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  993. int rx_mon_mask =
  994. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  995. int rx_err_ring_mask =
  996. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  997. int rx_wbm_rel_ring_mask =
  998. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  999. int reo_status_ring_mask =
  1000. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1001. int rxdma2host_ring_mask =
  1002. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1003. int host2rxdma_ring_mask =
  1004. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1005. soc->intr_ctx[i].dp_intr_id = i;
  1006. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1007. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1008. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1009. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1010. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1011. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1012. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1013. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1014. soc->intr_ctx[i].soc = soc;
  1015. num_irq = 0;
  1016. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1017. &num_irq);
  1018. ret = hif_register_ext_group(soc->hif_handle,
  1019. num_irq, irq_id_map, dp_service_srngs,
  1020. &soc->intr_ctx[i], "dp_intr",
  1021. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1022. if (ret) {
  1023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1024. FL("failed, ret = %d"), ret);
  1025. return QDF_STATUS_E_FAILURE;
  1026. }
  1027. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1028. }
  1029. hif_configure_ext_group_interrupts(soc->hif_handle);
  1030. return QDF_STATUS_SUCCESS;
  1031. }
  1032. /*
  1033. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1034. * @txrx_soc: DP SOC handle
  1035. *
  1036. * Return: void
  1037. */
  1038. static void dp_soc_interrupt_detach(void *txrx_soc)
  1039. {
  1040. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1041. int i;
  1042. if (soc->intr_mode == DP_INTR_POLL) {
  1043. qdf_timer_stop(&soc->int_timer);
  1044. qdf_timer_free(&soc->int_timer);
  1045. } else {
  1046. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1047. }
  1048. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1049. soc->intr_ctx[i].tx_ring_mask = 0;
  1050. soc->intr_ctx[i].rx_ring_mask = 0;
  1051. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1052. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1053. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1054. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1055. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1056. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1057. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1058. }
  1059. }
  1060. #define AVG_MAX_MPDUS_PER_TID 128
  1061. #define AVG_TIDS_PER_CLIENT 2
  1062. #define AVG_FLOWS_PER_TID 2
  1063. #define AVG_MSDUS_PER_FLOW 128
  1064. #define AVG_MSDUS_PER_MPDU 4
  1065. /*
  1066. * Allocate and setup link descriptor pool that will be used by HW for
  1067. * various link and queue descriptors and managed by WBM
  1068. */
  1069. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1070. {
  1071. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1072. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1073. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1074. uint32_t num_mpdus_per_link_desc =
  1075. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1076. uint32_t num_msdus_per_link_desc =
  1077. hal_num_msdus_per_link_desc(soc->hal_soc);
  1078. uint32_t num_mpdu_links_per_queue_desc =
  1079. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1080. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1081. uint32_t total_link_descs, total_mem_size;
  1082. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1083. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1084. uint32_t num_link_desc_banks;
  1085. uint32_t last_bank_size = 0;
  1086. uint32_t entry_size, num_entries;
  1087. int i;
  1088. uint32_t desc_id = 0;
  1089. /* Only Tx queue descriptors are allocated from common link descriptor
  1090. * pool Rx queue descriptors are not included in this because (REO queue
  1091. * extension descriptors) they are expected to be allocated contiguously
  1092. * with REO queue descriptors
  1093. */
  1094. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1095. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1096. num_mpdu_queue_descs = num_mpdu_link_descs /
  1097. num_mpdu_links_per_queue_desc;
  1098. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1099. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1100. num_msdus_per_link_desc;
  1101. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1102. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1103. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1104. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1105. /* Round up to power of 2 */
  1106. total_link_descs = 1;
  1107. while (total_link_descs < num_entries)
  1108. total_link_descs <<= 1;
  1109. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1110. FL("total_link_descs: %u, link_desc_size: %d"),
  1111. total_link_descs, link_desc_size);
  1112. total_mem_size = total_link_descs * link_desc_size;
  1113. total_mem_size += link_desc_align;
  1114. if (total_mem_size <= max_alloc_size) {
  1115. num_link_desc_banks = 0;
  1116. last_bank_size = total_mem_size;
  1117. } else {
  1118. num_link_desc_banks = (total_mem_size) /
  1119. (max_alloc_size - link_desc_align);
  1120. last_bank_size = total_mem_size %
  1121. (max_alloc_size - link_desc_align);
  1122. }
  1123. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1124. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1125. total_mem_size, num_link_desc_banks);
  1126. for (i = 0; i < num_link_desc_banks; i++) {
  1127. soc->link_desc_banks[i].base_vaddr_unaligned =
  1128. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1129. max_alloc_size,
  1130. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1131. soc->link_desc_banks[i].size = max_alloc_size;
  1132. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1133. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1134. ((unsigned long)(
  1135. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1136. link_desc_align));
  1137. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1138. soc->link_desc_banks[i].base_paddr_unaligned) +
  1139. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1140. (unsigned long)(
  1141. soc->link_desc_banks[i].base_vaddr_unaligned));
  1142. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1144. FL("Link descriptor memory alloc failed"));
  1145. goto fail;
  1146. }
  1147. }
  1148. if (last_bank_size) {
  1149. /* Allocate last bank in case total memory required is not exact
  1150. * multiple of max_alloc_size
  1151. */
  1152. soc->link_desc_banks[i].base_vaddr_unaligned =
  1153. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1154. last_bank_size,
  1155. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1156. soc->link_desc_banks[i].size = last_bank_size;
  1157. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1158. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1159. ((unsigned long)(
  1160. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1161. link_desc_align));
  1162. soc->link_desc_banks[i].base_paddr =
  1163. (unsigned long)(
  1164. soc->link_desc_banks[i].base_paddr_unaligned) +
  1165. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1166. (unsigned long)(
  1167. soc->link_desc_banks[i].base_vaddr_unaligned));
  1168. }
  1169. /* Allocate and setup link descriptor idle list for HW internal use */
  1170. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1171. total_mem_size = entry_size * total_link_descs;
  1172. if (total_mem_size <= max_alloc_size) {
  1173. void *desc;
  1174. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1175. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1176. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1177. FL("Link desc idle ring setup failed"));
  1178. goto fail;
  1179. }
  1180. hal_srng_access_start_unlocked(soc->hal_soc,
  1181. soc->wbm_idle_link_ring.hal_srng);
  1182. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1183. soc->link_desc_banks[i].base_paddr; i++) {
  1184. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1185. ((unsigned long)(
  1186. soc->link_desc_banks[i].base_vaddr) -
  1187. (unsigned long)(
  1188. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1189. / link_desc_size;
  1190. unsigned long paddr = (unsigned long)(
  1191. soc->link_desc_banks[i].base_paddr);
  1192. while (num_entries && (desc = hal_srng_src_get_next(
  1193. soc->hal_soc,
  1194. soc->wbm_idle_link_ring.hal_srng))) {
  1195. hal_set_link_desc_addr(desc,
  1196. LINK_DESC_COOKIE(desc_id, i), paddr);
  1197. num_entries--;
  1198. desc_id++;
  1199. paddr += link_desc_size;
  1200. }
  1201. }
  1202. hal_srng_access_end_unlocked(soc->hal_soc,
  1203. soc->wbm_idle_link_ring.hal_srng);
  1204. } else {
  1205. uint32_t num_scatter_bufs;
  1206. uint32_t num_entries_per_buf;
  1207. uint32_t rem_entries;
  1208. uint8_t *scatter_buf_ptr;
  1209. uint16_t scatter_buf_num;
  1210. soc->wbm_idle_scatter_buf_size =
  1211. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1212. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1213. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1214. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1215. soc->hal_soc, total_mem_size,
  1216. soc->wbm_idle_scatter_buf_size);
  1217. for (i = 0; i < num_scatter_bufs; i++) {
  1218. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1219. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1220. soc->wbm_idle_scatter_buf_size,
  1221. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1222. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1223. QDF_TRACE(QDF_MODULE_ID_DP,
  1224. QDF_TRACE_LEVEL_ERROR,
  1225. FL("Scatter list memory alloc failed"));
  1226. goto fail;
  1227. }
  1228. }
  1229. /* Populate idle list scatter buffers with link descriptor
  1230. * pointers
  1231. */
  1232. scatter_buf_num = 0;
  1233. scatter_buf_ptr = (uint8_t *)(
  1234. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1235. rem_entries = num_entries_per_buf;
  1236. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1237. soc->link_desc_banks[i].base_paddr; i++) {
  1238. uint32_t num_link_descs =
  1239. (soc->link_desc_banks[i].size -
  1240. ((unsigned long)(
  1241. soc->link_desc_banks[i].base_vaddr) -
  1242. (unsigned long)(
  1243. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1244. / link_desc_size;
  1245. unsigned long paddr = (unsigned long)(
  1246. soc->link_desc_banks[i].base_paddr);
  1247. while (num_link_descs) {
  1248. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1249. LINK_DESC_COOKIE(desc_id, i), paddr);
  1250. num_link_descs--;
  1251. desc_id++;
  1252. paddr += link_desc_size;
  1253. rem_entries--;
  1254. if (rem_entries) {
  1255. scatter_buf_ptr += entry_size;
  1256. } else {
  1257. rem_entries = num_entries_per_buf;
  1258. scatter_buf_num++;
  1259. if (scatter_buf_num >= num_scatter_bufs)
  1260. break;
  1261. scatter_buf_ptr = (uint8_t *)(
  1262. soc->wbm_idle_scatter_buf_base_vaddr[
  1263. scatter_buf_num]);
  1264. }
  1265. }
  1266. }
  1267. /* Setup link descriptor idle list in HW */
  1268. hal_setup_link_idle_list(soc->hal_soc,
  1269. soc->wbm_idle_scatter_buf_base_paddr,
  1270. soc->wbm_idle_scatter_buf_base_vaddr,
  1271. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1272. (uint32_t)(scatter_buf_ptr -
  1273. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1274. scatter_buf_num-1])), total_link_descs);
  1275. }
  1276. return 0;
  1277. fail:
  1278. if (soc->wbm_idle_link_ring.hal_srng) {
  1279. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1280. WBM_IDLE_LINK, 0);
  1281. }
  1282. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1283. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1284. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1285. soc->wbm_idle_scatter_buf_size,
  1286. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1287. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1288. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1289. }
  1290. }
  1291. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1292. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1293. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1294. soc->link_desc_banks[i].size,
  1295. soc->link_desc_banks[i].base_vaddr_unaligned,
  1296. soc->link_desc_banks[i].base_paddr_unaligned,
  1297. 0);
  1298. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1299. }
  1300. }
  1301. return QDF_STATUS_E_FAILURE;
  1302. }
  1303. /*
  1304. * Free link descriptor pool that was setup HW
  1305. */
  1306. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1307. {
  1308. int i;
  1309. if (soc->wbm_idle_link_ring.hal_srng) {
  1310. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1311. WBM_IDLE_LINK, 0);
  1312. }
  1313. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1314. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1315. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1316. soc->wbm_idle_scatter_buf_size,
  1317. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1318. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1319. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1320. }
  1321. }
  1322. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1323. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1324. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1325. soc->link_desc_banks[i].size,
  1326. soc->link_desc_banks[i].base_vaddr_unaligned,
  1327. soc->link_desc_banks[i].base_paddr_unaligned,
  1328. 0);
  1329. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1330. }
  1331. }
  1332. }
  1333. /* TODO: Following should be configurable */
  1334. #define WBM_RELEASE_RING_SIZE 64
  1335. #define TCL_CMD_RING_SIZE 32
  1336. #define TCL_STATUS_RING_SIZE 32
  1337. #if defined(QCA_WIFI_QCA6290)
  1338. #define REO_DST_RING_SIZE 1024
  1339. #else
  1340. #define REO_DST_RING_SIZE 2048
  1341. #endif
  1342. #define REO_REINJECT_RING_SIZE 32
  1343. #define RX_RELEASE_RING_SIZE 1024
  1344. #define REO_EXCEPTION_RING_SIZE 128
  1345. #define REO_CMD_RING_SIZE 64
  1346. #define REO_STATUS_RING_SIZE 128
  1347. #define RXDMA_BUF_RING_SIZE 1024
  1348. #define RXDMA_REFILL_RING_SIZE 4096
  1349. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1350. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1351. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1352. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1353. #define RXDMA_ERR_DST_RING_SIZE 1024
  1354. /*
  1355. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1356. * @soc: Datapath SOC handle
  1357. *
  1358. * This is a timer function used to age out stale AST nodes from
  1359. * AST table
  1360. */
  1361. #ifdef FEATURE_WDS
  1362. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1363. {
  1364. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1365. struct dp_pdev *pdev;
  1366. struct dp_vdev *vdev;
  1367. struct dp_peer *peer;
  1368. struct dp_ast_entry *ase, *temp_ase;
  1369. int i;
  1370. qdf_spin_lock_bh(&soc->ast_lock);
  1371. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1372. pdev = soc->pdev_list[i];
  1373. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1374. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1375. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1376. /*
  1377. * Do not expire static ast entries
  1378. * and HM WDS entries
  1379. */
  1380. if (ase->type ==
  1381. CDP_TXRX_AST_TYPE_STATIC ||
  1382. ase->type ==
  1383. CDP_TXRX_AST_TYPE_WDS_HM)
  1384. continue;
  1385. if (ase->is_active) {
  1386. ase->is_active = FALSE;
  1387. continue;
  1388. }
  1389. DP_STATS_INC(soc, ast.aged_out, 1);
  1390. dp_peer_del_ast(soc, ase);
  1391. }
  1392. }
  1393. }
  1394. }
  1395. qdf_spin_unlock_bh(&soc->ast_lock);
  1396. if (qdf_atomic_read(&soc->cmn_init_done))
  1397. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1398. }
  1399. /*
  1400. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1401. * @soc: Datapath SOC handle
  1402. *
  1403. * Return: None
  1404. */
  1405. static void dp_soc_wds_attach(struct dp_soc *soc)
  1406. {
  1407. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1408. dp_wds_aging_timer_fn, (void *)soc,
  1409. QDF_TIMER_TYPE_WAKE_APPS);
  1410. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1411. }
  1412. /*
  1413. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1414. * @txrx_soc: DP SOC handle
  1415. *
  1416. * Return: None
  1417. */
  1418. static void dp_soc_wds_detach(struct dp_soc *soc)
  1419. {
  1420. qdf_timer_stop(&soc->wds_aging_timer);
  1421. qdf_timer_free(&soc->wds_aging_timer);
  1422. }
  1423. #else
  1424. static void dp_soc_wds_attach(struct dp_soc *soc)
  1425. {
  1426. }
  1427. static void dp_soc_wds_detach(struct dp_soc *soc)
  1428. {
  1429. }
  1430. #endif
  1431. /*
  1432. * dp_soc_reset_ring_map() - Reset cpu ring map
  1433. * @soc: Datapath soc handler
  1434. *
  1435. * This api resets the default cpu ring map
  1436. */
  1437. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1438. {
  1439. uint8_t i;
  1440. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1441. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1442. if (nss_config == 1) {
  1443. /*
  1444. * Setting Tx ring map for one nss offloaded radio
  1445. */
  1446. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1447. } else if (nss_config == 2) {
  1448. /*
  1449. * Setting Tx ring for two nss offloaded radios
  1450. */
  1451. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1452. } else {
  1453. /*
  1454. * Setting Tx ring map for all nss offloaded radios
  1455. */
  1456. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1457. }
  1458. }
  1459. }
  1460. /*
  1461. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1462. * @dp_soc - DP soc handle
  1463. * @ring_type - ring type
  1464. * @ring_num - ring_num
  1465. *
  1466. * return 0 or 1
  1467. */
  1468. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1469. {
  1470. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1471. uint8_t status = 0;
  1472. switch (ring_type) {
  1473. case WBM2SW_RELEASE:
  1474. case REO_DST:
  1475. case RXDMA_BUF:
  1476. status = ((nss_config) & (1 << ring_num));
  1477. break;
  1478. default:
  1479. break;
  1480. }
  1481. return status;
  1482. }
  1483. /*
  1484. * dp_soc_reset_intr_mask() - reset interrupt mask
  1485. * @dp_soc - DP Soc handle
  1486. *
  1487. * Return: Return void
  1488. */
  1489. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1490. {
  1491. uint8_t j;
  1492. int *grp_mask = NULL;
  1493. int group_number, mask, num_ring;
  1494. /* number of tx ring */
  1495. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1496. /*
  1497. * group mask for tx completion ring.
  1498. */
  1499. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1500. /* loop and reset the mask for only offloaded ring */
  1501. for (j = 0; j < num_ring; j++) {
  1502. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1503. continue;
  1504. }
  1505. /*
  1506. * Group number corresponding to tx offloaded ring.
  1507. */
  1508. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1509. if (group_number < 0) {
  1510. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1511. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1512. WBM2SW_RELEASE, j);
  1513. return;
  1514. }
  1515. /* reset the tx mask for offloaded ring */
  1516. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1517. mask &= (~(1 << j));
  1518. /*
  1519. * reset the interrupt mask for offloaded ring.
  1520. */
  1521. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1522. }
  1523. /* number of rx rings */
  1524. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1525. /*
  1526. * group mask for reo destination ring.
  1527. */
  1528. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1529. /* loop and reset the mask for only offloaded ring */
  1530. for (j = 0; j < num_ring; j++) {
  1531. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1532. continue;
  1533. }
  1534. /*
  1535. * Group number corresponding to rx offloaded ring.
  1536. */
  1537. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1538. if (group_number < 0) {
  1539. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1540. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1541. REO_DST, j);
  1542. return;
  1543. }
  1544. /* set the interrupt mask for offloaded ring */
  1545. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1546. mask &= (~(1 << j));
  1547. /*
  1548. * set the interrupt mask to zero for rx offloaded radio.
  1549. */
  1550. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1551. }
  1552. /*
  1553. * group mask for Rx buffer refill ring
  1554. */
  1555. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1556. /* loop and reset the mask for only offloaded ring */
  1557. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1558. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1559. continue;
  1560. }
  1561. /*
  1562. * Group number corresponding to rx offloaded ring.
  1563. */
  1564. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1565. if (group_number < 0) {
  1566. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1567. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1568. REO_DST, j);
  1569. return;
  1570. }
  1571. /* set the interrupt mask for offloaded ring */
  1572. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1573. group_number);
  1574. mask &= (~(1 << j));
  1575. /*
  1576. * set the interrupt mask to zero for rx offloaded radio.
  1577. */
  1578. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1579. group_number, mask);
  1580. }
  1581. }
  1582. #ifdef IPA_OFFLOAD
  1583. /**
  1584. * dp_reo_remap_config() - configure reo remap register value based
  1585. * nss configuration.
  1586. * based on offload_radio value below remap configuration
  1587. * get applied.
  1588. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1589. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1590. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1591. * 3 - both Radios handled by NSS (remap not required)
  1592. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1593. *
  1594. * @remap1: output parameter indicates reo remap 1 register value
  1595. * @remap2: output parameter indicates reo remap 2 register value
  1596. * Return: bool type, true if remap is configured else false.
  1597. */
  1598. static bool dp_reo_remap_config(struct dp_soc *soc,
  1599. uint32_t *remap1,
  1600. uint32_t *remap2)
  1601. {
  1602. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1603. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1604. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1605. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1606. return true;
  1607. }
  1608. #else
  1609. static bool dp_reo_remap_config(struct dp_soc *soc,
  1610. uint32_t *remap1,
  1611. uint32_t *remap2)
  1612. {
  1613. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1614. switch (offload_radio) {
  1615. case 0:
  1616. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1617. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1618. (0x3 << 18) | (0x4 << 21)) << 8;
  1619. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1620. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1621. (0x3 << 18) | (0x4 << 21)) << 8;
  1622. break;
  1623. case 1:
  1624. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1625. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1626. (0x2 << 18) | (0x3 << 21)) << 8;
  1627. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1628. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1629. (0x4 << 18) | (0x2 << 21)) << 8;
  1630. break;
  1631. case 2:
  1632. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1633. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1634. (0x1 << 18) | (0x3 << 21)) << 8;
  1635. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1636. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1637. (0x4 << 18) | (0x1 << 21)) << 8;
  1638. break;
  1639. case 3:
  1640. /* return false if both radios are offloaded to NSS */
  1641. return false;
  1642. }
  1643. return true;
  1644. }
  1645. #endif
  1646. /*
  1647. * dp_reo_frag_dst_set() - configure reo register to set the
  1648. * fragment destination ring
  1649. * @soc : Datapath soc
  1650. * @frag_dst_ring : output parameter to set fragment destination ring
  1651. *
  1652. * Based on offload_radio below fragment destination rings is selected
  1653. * 0 - TCL
  1654. * 1 - SW1
  1655. * 2 - SW2
  1656. * 3 - SW3
  1657. * 4 - SW4
  1658. * 5 - Release
  1659. * 6 - FW
  1660. * 7 - alternate select
  1661. *
  1662. * return: void
  1663. */
  1664. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1665. {
  1666. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1667. switch (offload_radio) {
  1668. case 0:
  1669. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1670. break;
  1671. case 3:
  1672. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1673. break;
  1674. default:
  1675. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1676. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1677. break;
  1678. }
  1679. }
  1680. /*
  1681. * dp_soc_cmn_setup() - Common SoC level initializion
  1682. * @soc: Datapath SOC handle
  1683. *
  1684. * This is an internal function used to setup common SOC data structures,
  1685. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1686. */
  1687. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1688. {
  1689. int i;
  1690. struct hal_reo_params reo_params;
  1691. int tx_ring_size;
  1692. int tx_comp_ring_size;
  1693. if (qdf_atomic_read(&soc->cmn_init_done))
  1694. return 0;
  1695. if (dp_peer_find_attach(soc))
  1696. goto fail0;
  1697. if (dp_hw_link_desc_pool_setup(soc))
  1698. goto fail1;
  1699. /* Setup SRNG rings */
  1700. /* Common rings */
  1701. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1702. WBM_RELEASE_RING_SIZE)) {
  1703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1704. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1705. goto fail1;
  1706. }
  1707. soc->num_tcl_data_rings = 0;
  1708. /* Tx data rings */
  1709. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1710. soc->num_tcl_data_rings =
  1711. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1712. tx_comp_ring_size =
  1713. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1714. tx_ring_size =
  1715. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1716. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1717. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1718. TCL_DATA, i, 0, tx_ring_size)) {
  1719. QDF_TRACE(QDF_MODULE_ID_DP,
  1720. QDF_TRACE_LEVEL_ERROR,
  1721. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1722. goto fail1;
  1723. }
  1724. /*
  1725. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1726. * count
  1727. */
  1728. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1729. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1730. QDF_TRACE(QDF_MODULE_ID_DP,
  1731. QDF_TRACE_LEVEL_ERROR,
  1732. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1733. goto fail1;
  1734. }
  1735. }
  1736. } else {
  1737. /* This will be incremented during per pdev ring setup */
  1738. soc->num_tcl_data_rings = 0;
  1739. }
  1740. if (dp_tx_soc_attach(soc)) {
  1741. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1742. FL("dp_tx_soc_attach failed"));
  1743. goto fail1;
  1744. }
  1745. /* TCL command and status rings */
  1746. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1747. TCL_CMD_RING_SIZE)) {
  1748. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1749. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1750. goto fail1;
  1751. }
  1752. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1753. TCL_STATUS_RING_SIZE)) {
  1754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1755. FL("dp_srng_setup failed for tcl_status_ring"));
  1756. goto fail1;
  1757. }
  1758. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1759. * descriptors
  1760. */
  1761. /* Rx data rings */
  1762. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1763. soc->num_reo_dest_rings =
  1764. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1765. QDF_TRACE(QDF_MODULE_ID_DP,
  1766. QDF_TRACE_LEVEL_ERROR,
  1767. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1768. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1769. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1770. i, 0, REO_DST_RING_SIZE)) {
  1771. QDF_TRACE(QDF_MODULE_ID_DP,
  1772. QDF_TRACE_LEVEL_ERROR,
  1773. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1774. goto fail1;
  1775. }
  1776. }
  1777. } else {
  1778. /* This will be incremented during per pdev ring setup */
  1779. soc->num_reo_dest_rings = 0;
  1780. }
  1781. /* LMAC RxDMA to SW Rings configuration */
  1782. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1783. /* Only valid for MCL */
  1784. struct dp_pdev *pdev = soc->pdev_list[0];
  1785. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1786. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1787. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1788. QDF_TRACE(QDF_MODULE_ID_DP,
  1789. QDF_TRACE_LEVEL_ERROR,
  1790. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1791. goto fail1;
  1792. }
  1793. }
  1794. }
  1795. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1796. /* REO reinjection ring */
  1797. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1798. REO_REINJECT_RING_SIZE)) {
  1799. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1800. FL("dp_srng_setup failed for reo_reinject_ring"));
  1801. goto fail1;
  1802. }
  1803. /* Rx release ring */
  1804. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1805. RX_RELEASE_RING_SIZE)) {
  1806. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1807. FL("dp_srng_setup failed for rx_rel_ring"));
  1808. goto fail1;
  1809. }
  1810. /* Rx exception ring */
  1811. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1812. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1814. FL("dp_srng_setup failed for reo_exception_ring"));
  1815. goto fail1;
  1816. }
  1817. /* REO command and status rings */
  1818. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1819. REO_CMD_RING_SIZE)) {
  1820. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1821. FL("dp_srng_setup failed for reo_cmd_ring"));
  1822. goto fail1;
  1823. }
  1824. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1825. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1826. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1827. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1828. REO_STATUS_RING_SIZE)) {
  1829. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1830. FL("dp_srng_setup failed for reo_status_ring"));
  1831. goto fail1;
  1832. }
  1833. qdf_spinlock_create(&soc->ast_lock);
  1834. dp_soc_wds_attach(soc);
  1835. /* Reset the cpu ring map if radio is NSS offloaded */
  1836. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1837. dp_soc_reset_cpu_ring_map(soc);
  1838. dp_soc_reset_intr_mask(soc);
  1839. }
  1840. /* Setup HW REO */
  1841. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1842. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1843. /*
  1844. * Reo ring remap is not required if both radios
  1845. * are offloaded to NSS
  1846. */
  1847. if (!dp_reo_remap_config(soc,
  1848. &reo_params.remap1,
  1849. &reo_params.remap2))
  1850. goto out;
  1851. reo_params.rx_hash_enabled = true;
  1852. }
  1853. /* setup the global rx defrag waitlist */
  1854. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1855. soc->rx.defrag.timeout_ms =
  1856. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1857. soc->rx.flags.defrag_timeout_check =
  1858. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1859. out:
  1860. /*
  1861. * set the fragment destination ring
  1862. */
  1863. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1864. hal_reo_setup(soc->hal_soc, &reo_params);
  1865. qdf_atomic_set(&soc->cmn_init_done, 1);
  1866. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1867. return 0;
  1868. fail1:
  1869. /*
  1870. * Cleanup will be done as part of soc_detach, which will
  1871. * be called on pdev attach failure
  1872. */
  1873. fail0:
  1874. return QDF_STATUS_E_FAILURE;
  1875. }
  1876. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1877. static void dp_lro_hash_setup(struct dp_soc *soc)
  1878. {
  1879. struct cdp_lro_hash_config lro_hash;
  1880. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1881. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1882. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1883. FL("LRO disabled RX hash disabled"));
  1884. return;
  1885. }
  1886. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1887. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1888. lro_hash.lro_enable = 1;
  1889. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1890. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1891. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1892. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1893. }
  1894. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1895. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1896. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1897. LRO_IPV4_SEED_ARR_SZ));
  1898. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1899. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1900. LRO_IPV6_SEED_ARR_SZ));
  1901. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1902. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1903. lro_hash.lro_enable, lro_hash.tcp_flag,
  1904. lro_hash.tcp_flag_mask);
  1905. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1906. QDF_TRACE_LEVEL_ERROR,
  1907. (void *)lro_hash.toeplitz_hash_ipv4,
  1908. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1909. LRO_IPV4_SEED_ARR_SZ));
  1910. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1911. QDF_TRACE_LEVEL_ERROR,
  1912. (void *)lro_hash.toeplitz_hash_ipv6,
  1913. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1914. LRO_IPV6_SEED_ARR_SZ));
  1915. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1916. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1917. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1918. (soc->ctrl_psoc, &lro_hash);
  1919. }
  1920. /*
  1921. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1922. * @soc: data path SoC handle
  1923. * @pdev: Physical device handle
  1924. *
  1925. * Return: 0 - success, > 0 - failure
  1926. */
  1927. #ifdef QCA_HOST2FW_RXBUF_RING
  1928. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1929. struct dp_pdev *pdev)
  1930. {
  1931. int max_mac_rings =
  1932. wlan_cfg_get_num_mac_rings
  1933. (pdev->wlan_cfg_ctx);
  1934. int i;
  1935. for (i = 0; i < max_mac_rings; i++) {
  1936. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1937. "%s: pdev_id %d mac_id %d\n",
  1938. __func__, pdev->pdev_id, i);
  1939. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1940. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1941. QDF_TRACE(QDF_MODULE_ID_DP,
  1942. QDF_TRACE_LEVEL_ERROR,
  1943. FL("failed rx mac ring setup"));
  1944. return QDF_STATUS_E_FAILURE;
  1945. }
  1946. }
  1947. return QDF_STATUS_SUCCESS;
  1948. }
  1949. #else
  1950. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1951. struct dp_pdev *pdev)
  1952. {
  1953. return QDF_STATUS_SUCCESS;
  1954. }
  1955. #endif
  1956. /**
  1957. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1958. * @pdev - DP_PDEV handle
  1959. *
  1960. * Return: void
  1961. */
  1962. static inline void
  1963. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1964. {
  1965. uint8_t map_id;
  1966. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1967. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1968. sizeof(default_dscp_tid_map));
  1969. }
  1970. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1971. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1972. pdev->dscp_tid_map[map_id],
  1973. map_id);
  1974. }
  1975. }
  1976. #ifdef QCA_SUPPORT_SON
  1977. /**
  1978. * dp_mark_peer_inact(): Update peer inactivity status
  1979. * @peer_handle - datapath peer handle
  1980. *
  1981. * Return: void
  1982. */
  1983. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1984. {
  1985. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1986. struct dp_pdev *pdev;
  1987. struct dp_soc *soc;
  1988. bool inactive_old;
  1989. if (!peer)
  1990. return;
  1991. pdev = peer->vdev->pdev;
  1992. soc = pdev->soc;
  1993. inactive_old = peer->peer_bs_inact_flag == 1;
  1994. if (!inactive)
  1995. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1996. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1997. if (inactive_old != inactive) {
  1998. /**
  1999. * Note: a node lookup can happen in RX datapath context
  2000. * when a node changes from inactive to active (at most once
  2001. * per inactivity timeout threshold)
  2002. */
  2003. if (soc->cdp_soc.ol_ops->record_act_change) {
  2004. soc->cdp_soc.ol_ops->record_act_change(pdev->osif_pdev,
  2005. peer->mac_addr.raw, !inactive);
  2006. }
  2007. }
  2008. }
  2009. /**
  2010. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2011. *
  2012. * Periodically checks the inactivity status
  2013. */
  2014. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2015. {
  2016. struct dp_pdev *pdev;
  2017. struct dp_vdev *vdev;
  2018. struct dp_peer *peer;
  2019. struct dp_soc *soc;
  2020. int i;
  2021. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2022. qdf_spin_lock(&soc->peer_ref_mutex);
  2023. for (i = 0; i < soc->pdev_count; i++) {
  2024. pdev = soc->pdev_list[i];
  2025. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2026. if (vdev->opmode != wlan_op_mode_ap)
  2027. continue;
  2028. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2029. if (!peer->authorize) {
  2030. /**
  2031. * Inactivity check only interested in
  2032. * connected node
  2033. */
  2034. continue;
  2035. }
  2036. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2037. /**
  2038. * This check ensures we do not wait extra long
  2039. * due to the potential race condition
  2040. */
  2041. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2042. }
  2043. if (peer->peer_bs_inact > 0) {
  2044. /* Do not let it wrap around */
  2045. peer->peer_bs_inact--;
  2046. }
  2047. if (peer->peer_bs_inact == 0)
  2048. dp_mark_peer_inact(peer, true);
  2049. }
  2050. }
  2051. }
  2052. qdf_spin_unlock(&soc->peer_ref_mutex);
  2053. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2054. soc->pdev_bs_inact_interval * 1000);
  2055. }
  2056. /**
  2057. * dp_free_inact_timer(): free inact timer
  2058. * @timer - inact timer handle
  2059. *
  2060. * Return: bool
  2061. */
  2062. void dp_free_inact_timer(struct dp_soc *soc)
  2063. {
  2064. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2065. }
  2066. #else
  2067. void dp_mark_peer_inact(void *peer, bool inactive)
  2068. {
  2069. return;
  2070. }
  2071. void dp_free_inact_timer(struct dp_soc *soc)
  2072. {
  2073. return;
  2074. }
  2075. #endif
  2076. #ifdef IPA_OFFLOAD
  2077. /**
  2078. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2079. * @soc: data path instance
  2080. * @pdev: core txrx pdev context
  2081. *
  2082. * Return: QDF_STATUS_SUCCESS: success
  2083. * QDF_STATUS_E_RESOURCES: Error return
  2084. */
  2085. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2086. struct dp_pdev *pdev)
  2087. {
  2088. /* Setup second Rx refill buffer ring */
  2089. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2090. IPA_RX_REFILL_BUF_RING_IDX,
  2091. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2092. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2093. FL("dp_srng_setup failed second rx refill ring"));
  2094. return QDF_STATUS_E_FAILURE;
  2095. }
  2096. return QDF_STATUS_SUCCESS;
  2097. }
  2098. /**
  2099. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2100. * @soc: data path instance
  2101. * @pdev: core txrx pdev context
  2102. *
  2103. * Return: void
  2104. */
  2105. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2106. struct dp_pdev *pdev)
  2107. {
  2108. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2109. IPA_RX_REFILL_BUF_RING_IDX);
  2110. }
  2111. #else
  2112. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2113. struct dp_pdev *pdev)
  2114. {
  2115. return QDF_STATUS_SUCCESS;
  2116. }
  2117. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2118. struct dp_pdev *pdev)
  2119. {
  2120. }
  2121. #endif
  2122. /*
  2123. * dp_pdev_attach_wifi3() - attach txrx pdev
  2124. * @ctrl_pdev: Opaque PDEV object
  2125. * @txrx_soc: Datapath SOC handle
  2126. * @htc_handle: HTC handle for host-target interface
  2127. * @qdf_osdev: QDF OS device
  2128. * @pdev_id: PDEV ID
  2129. *
  2130. * Return: DP PDEV handle on success, NULL on failure
  2131. */
  2132. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2133. struct cdp_cfg *ctrl_pdev,
  2134. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2135. {
  2136. int tx_ring_size;
  2137. int tx_comp_ring_size;
  2138. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2139. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2140. int mac_id;
  2141. if (!pdev) {
  2142. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2143. FL("DP PDEV memory allocation failed"));
  2144. goto fail0;
  2145. }
  2146. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2147. if (!pdev->wlan_cfg_ctx) {
  2148. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2149. FL("pdev cfg_attach failed"));
  2150. qdf_mem_free(pdev);
  2151. goto fail0;
  2152. }
  2153. /*
  2154. * set nss pdev config based on soc config
  2155. */
  2156. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2157. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2158. pdev->soc = soc;
  2159. pdev->osif_pdev = ctrl_pdev;
  2160. pdev->pdev_id = pdev_id;
  2161. soc->pdev_list[pdev_id] = pdev;
  2162. soc->pdev_count++;
  2163. TAILQ_INIT(&pdev->vdev_list);
  2164. pdev->vdev_count = 0;
  2165. qdf_spinlock_create(&pdev->tx_mutex);
  2166. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2167. TAILQ_INIT(&pdev->neighbour_peers_list);
  2168. if (dp_soc_cmn_setup(soc)) {
  2169. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2170. FL("dp_soc_cmn_setup failed"));
  2171. goto fail1;
  2172. }
  2173. /* Setup per PDEV TCL rings if configured */
  2174. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2175. tx_ring_size =
  2176. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2177. tx_comp_ring_size =
  2178. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2179. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2180. pdev_id, pdev_id, tx_ring_size)) {
  2181. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2182. FL("dp_srng_setup failed for tcl_data_ring"));
  2183. goto fail1;
  2184. }
  2185. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2186. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2187. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2188. FL("dp_srng_setup failed for tx_comp_ring"));
  2189. goto fail1;
  2190. }
  2191. soc->num_tcl_data_rings++;
  2192. }
  2193. /* Tx specific init */
  2194. if (dp_tx_pdev_attach(pdev)) {
  2195. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2196. FL("dp_tx_pdev_attach failed"));
  2197. goto fail1;
  2198. }
  2199. /* Setup per PDEV REO rings if configured */
  2200. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2201. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2202. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2203. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2204. FL("dp_srng_setup failed for reo_dest_ringn"));
  2205. goto fail1;
  2206. }
  2207. soc->num_reo_dest_rings++;
  2208. }
  2209. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2210. RXDMA_REFILL_RING_SIZE)) {
  2211. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2212. FL("dp_srng_setup failed rx refill ring"));
  2213. goto fail1;
  2214. }
  2215. if (dp_rxdma_ring_setup(soc, pdev)) {
  2216. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2217. FL("RXDMA ring config failed"));
  2218. goto fail1;
  2219. }
  2220. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2221. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2222. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2223. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2224. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2225. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2226. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2227. goto fail1;
  2228. }
  2229. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2230. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2231. RXDMA_MONITOR_DST_RING_SIZE)) {
  2232. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2233. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2234. goto fail1;
  2235. }
  2236. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2237. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2238. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2239. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2240. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2241. goto fail1;
  2242. }
  2243. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2244. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2245. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2246. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2247. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2248. goto fail1;
  2249. }
  2250. }
  2251. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2252. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2253. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2254. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2255. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2256. goto fail1;
  2257. }
  2258. }
  2259. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2260. goto fail1;
  2261. if (dp_ipa_ring_resource_setup(soc, pdev))
  2262. goto fail1;
  2263. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2264. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2265. FL("dp_ipa_uc_attach failed"));
  2266. goto fail1;
  2267. }
  2268. /* Rx specific init */
  2269. if (dp_rx_pdev_attach(pdev)) {
  2270. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2271. FL("dp_rx_pdev_attach failed"));
  2272. goto fail0;
  2273. }
  2274. DP_STATS_INIT(pdev);
  2275. /* Monitor filter init */
  2276. pdev->mon_filter_mode = MON_FILTER_ALL;
  2277. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2278. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2279. pdev->fp_data_filter = FILTER_DATA_ALL;
  2280. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2281. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2282. pdev->mo_data_filter = FILTER_DATA_ALL;
  2283. #ifndef CONFIG_WIN
  2284. /* MCL */
  2285. dp_local_peer_id_pool_init(pdev);
  2286. #endif
  2287. dp_dscp_tid_map_setup(pdev);
  2288. /* Rx monitor mode specific init */
  2289. if (dp_rx_pdev_mon_attach(pdev)) {
  2290. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2291. "dp_rx_pdev_attach failed\n");
  2292. goto fail1;
  2293. }
  2294. if (dp_wdi_event_attach(pdev)) {
  2295. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2296. "dp_wdi_evet_attach failed\n");
  2297. goto fail1;
  2298. }
  2299. /* set the reo destination during initialization */
  2300. pdev->reo_dest = pdev->pdev_id + 1;
  2301. /*
  2302. * initialize ppdu tlv list
  2303. */
  2304. TAILQ_INIT(&pdev->ppdu_info_list);
  2305. pdev->tlv_count = 0;
  2306. pdev->list_depth = 0;
  2307. return (struct cdp_pdev *)pdev;
  2308. fail1:
  2309. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2310. fail0:
  2311. return NULL;
  2312. }
  2313. /*
  2314. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2315. * @soc: data path SoC handle
  2316. * @pdev: Physical device handle
  2317. *
  2318. * Return: void
  2319. */
  2320. #ifdef QCA_HOST2FW_RXBUF_RING
  2321. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2322. struct dp_pdev *pdev)
  2323. {
  2324. int max_mac_rings =
  2325. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2326. int i;
  2327. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2328. max_mac_rings : MAX_RX_MAC_RINGS;
  2329. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2330. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2331. RXDMA_BUF, 1);
  2332. qdf_timer_free(&soc->mon_reap_timer);
  2333. }
  2334. #else
  2335. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2336. struct dp_pdev *pdev)
  2337. {
  2338. }
  2339. #endif
  2340. /*
  2341. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2342. * @pdev: device object
  2343. *
  2344. * Return: void
  2345. */
  2346. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2347. {
  2348. struct dp_neighbour_peer *peer = NULL;
  2349. struct dp_neighbour_peer *temp_peer = NULL;
  2350. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2351. neighbour_peer_list_elem, temp_peer) {
  2352. /* delete this peer from the list */
  2353. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2354. peer, neighbour_peer_list_elem);
  2355. qdf_mem_free(peer);
  2356. }
  2357. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2358. }
  2359. /*
  2360. * dp_pdev_detach_wifi3() - detach txrx pdev
  2361. * @txrx_pdev: Datapath PDEV handle
  2362. * @force: Force detach
  2363. *
  2364. */
  2365. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2366. {
  2367. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2368. struct dp_soc *soc = pdev->soc;
  2369. qdf_nbuf_t curr_nbuf, next_nbuf;
  2370. int mac_id;
  2371. dp_wdi_event_detach(pdev);
  2372. dp_tx_pdev_detach(pdev);
  2373. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2374. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2375. TCL_DATA, pdev->pdev_id);
  2376. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2377. WBM2SW_RELEASE, pdev->pdev_id);
  2378. }
  2379. dp_pktlogmod_exit(pdev);
  2380. dp_rx_pdev_detach(pdev);
  2381. dp_rx_pdev_mon_detach(pdev);
  2382. dp_neighbour_peers_detach(pdev);
  2383. qdf_spinlock_destroy(&pdev->tx_mutex);
  2384. dp_ipa_uc_detach(soc, pdev);
  2385. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2386. /* Cleanup per PDEV REO rings if configured */
  2387. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2388. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2389. REO_DST, pdev->pdev_id);
  2390. }
  2391. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2392. dp_rxdma_ring_cleanup(soc, pdev);
  2393. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2394. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2395. RXDMA_MONITOR_BUF, 0);
  2396. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2397. RXDMA_MONITOR_DST, 0);
  2398. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2399. RXDMA_MONITOR_STATUS, 0);
  2400. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2401. RXDMA_MONITOR_DESC, 0);
  2402. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2403. RXDMA_DST, 0);
  2404. }
  2405. curr_nbuf = pdev->invalid_peer_head_msdu;
  2406. while (curr_nbuf) {
  2407. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2408. qdf_nbuf_free(curr_nbuf);
  2409. curr_nbuf = next_nbuf;
  2410. }
  2411. soc->pdev_list[pdev->pdev_id] = NULL;
  2412. soc->pdev_count--;
  2413. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2414. qdf_mem_free(pdev->dp_txrx_handle);
  2415. qdf_mem_free(pdev);
  2416. }
  2417. /*
  2418. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2419. * @soc: DP SOC handle
  2420. */
  2421. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2422. {
  2423. struct reo_desc_list_node *desc;
  2424. struct dp_rx_tid *rx_tid;
  2425. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2426. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2427. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2428. rx_tid = &desc->rx_tid;
  2429. qdf_mem_unmap_nbytes_single(soc->osdev,
  2430. rx_tid->hw_qdesc_paddr,
  2431. QDF_DMA_BIDIRECTIONAL,
  2432. rx_tid->hw_qdesc_alloc_size);
  2433. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2434. qdf_mem_free(desc);
  2435. }
  2436. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2437. qdf_list_destroy(&soc->reo_desc_freelist);
  2438. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2439. }
  2440. /*
  2441. * dp_soc_detach_wifi3() - Detach txrx SOC
  2442. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2443. */
  2444. static void dp_soc_detach_wifi3(void *txrx_soc)
  2445. {
  2446. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2447. int i;
  2448. qdf_atomic_set(&soc->cmn_init_done, 0);
  2449. qdf_flush_work(&soc->htt_stats.work);
  2450. qdf_disable_work(&soc->htt_stats.work);
  2451. /* Free pending htt stats messages */
  2452. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2453. dp_free_inact_timer(soc);
  2454. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2455. if (soc->pdev_list[i])
  2456. dp_pdev_detach_wifi3(
  2457. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2458. }
  2459. dp_peer_find_detach(soc);
  2460. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2461. * SW descriptors
  2462. */
  2463. /* Free the ring memories */
  2464. /* Common rings */
  2465. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2466. dp_tx_soc_detach(soc);
  2467. /* Tx data rings */
  2468. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2469. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2470. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2471. TCL_DATA, i);
  2472. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2473. WBM2SW_RELEASE, i);
  2474. }
  2475. }
  2476. /* TCL command and status rings */
  2477. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2478. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2479. /* Rx data rings */
  2480. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2481. soc->num_reo_dest_rings =
  2482. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2483. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2484. /* TODO: Get number of rings and ring sizes
  2485. * from wlan_cfg
  2486. */
  2487. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2488. REO_DST, i);
  2489. }
  2490. }
  2491. /* REO reinjection ring */
  2492. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2493. /* Rx release ring */
  2494. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2495. /* Rx exception ring */
  2496. /* TODO: Better to store ring_type and ring_num in
  2497. * dp_srng during setup
  2498. */
  2499. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2500. /* REO command and status rings */
  2501. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2502. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2503. dp_hw_link_desc_pool_cleanup(soc);
  2504. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2505. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2506. htt_soc_detach(soc->htt_handle);
  2507. dp_reo_cmdlist_destroy(soc);
  2508. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2509. dp_reo_desc_freelist_destroy(soc);
  2510. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2511. dp_soc_wds_detach(soc);
  2512. qdf_spinlock_destroy(&soc->ast_lock);
  2513. qdf_mem_free(soc);
  2514. }
  2515. /*
  2516. * dp_rxdma_ring_config() - configure the RX DMA rings
  2517. *
  2518. * This function is used to configure the MAC rings.
  2519. * On MCL host provides buffers in Host2FW ring
  2520. * FW refills (copies) buffers to the ring and updates
  2521. * ring_idx in register
  2522. *
  2523. * @soc: data path SoC handle
  2524. *
  2525. * Return: void
  2526. */
  2527. #ifdef QCA_HOST2FW_RXBUF_RING
  2528. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2529. {
  2530. int i;
  2531. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2532. struct dp_pdev *pdev = soc->pdev_list[i];
  2533. if (pdev) {
  2534. int mac_id;
  2535. bool dbs_enable = 0;
  2536. int max_mac_rings =
  2537. wlan_cfg_get_num_mac_rings
  2538. (pdev->wlan_cfg_ctx);
  2539. htt_srng_setup(soc->htt_handle, 0,
  2540. pdev->rx_refill_buf_ring.hal_srng,
  2541. RXDMA_BUF);
  2542. if (pdev->rx_refill_buf_ring2.hal_srng)
  2543. htt_srng_setup(soc->htt_handle, 0,
  2544. pdev->rx_refill_buf_ring2.hal_srng,
  2545. RXDMA_BUF);
  2546. if (soc->cdp_soc.ol_ops->
  2547. is_hw_dbs_2x2_capable) {
  2548. dbs_enable = soc->cdp_soc.ol_ops->
  2549. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2550. }
  2551. if (dbs_enable) {
  2552. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2553. QDF_TRACE_LEVEL_ERROR,
  2554. FL("DBS enabled max_mac_rings %d\n"),
  2555. max_mac_rings);
  2556. } else {
  2557. max_mac_rings = 1;
  2558. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2559. QDF_TRACE_LEVEL_ERROR,
  2560. FL("DBS disabled, max_mac_rings %d\n"),
  2561. max_mac_rings);
  2562. }
  2563. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2564. FL("pdev_id %d max_mac_rings %d\n"),
  2565. pdev->pdev_id, max_mac_rings);
  2566. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2567. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2568. mac_id, pdev->pdev_id);
  2569. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2570. QDF_TRACE_LEVEL_ERROR,
  2571. FL("mac_id %d\n"), mac_for_pdev);
  2572. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2573. pdev->rx_mac_buf_ring[mac_id]
  2574. .hal_srng,
  2575. RXDMA_BUF);
  2576. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2577. pdev->rxdma_err_dst_ring[mac_id]
  2578. .hal_srng,
  2579. RXDMA_DST);
  2580. /* Configure monitor mode rings */
  2581. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2582. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2583. RXDMA_MONITOR_BUF);
  2584. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2585. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2586. RXDMA_MONITOR_DST);
  2587. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2588. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2589. RXDMA_MONITOR_STATUS);
  2590. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2591. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2592. RXDMA_MONITOR_DESC);
  2593. }
  2594. }
  2595. }
  2596. /*
  2597. * Timer to reap rxdma status rings.
  2598. * Needed until we enable ppdu end interrupts
  2599. */
  2600. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2601. dp_service_mon_rings, (void *)soc,
  2602. QDF_TIMER_TYPE_WAKE_APPS);
  2603. soc->reap_timer_init = 1;
  2604. }
  2605. #else
  2606. /* This is only for WIN */
  2607. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2608. {
  2609. int i;
  2610. int mac_id;
  2611. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2612. struct dp_pdev *pdev = soc->pdev_list[i];
  2613. if (pdev == NULL)
  2614. continue;
  2615. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2616. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2617. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2618. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2619. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2620. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2621. RXDMA_MONITOR_BUF);
  2622. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2623. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2624. RXDMA_MONITOR_DST);
  2625. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2626. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2627. RXDMA_MONITOR_STATUS);
  2628. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2629. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2630. RXDMA_MONITOR_DESC);
  2631. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2632. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2633. RXDMA_DST);
  2634. }
  2635. }
  2636. }
  2637. #endif
  2638. /*
  2639. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2640. * @txrx_soc: Datapath SOC handle
  2641. */
  2642. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2643. {
  2644. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2645. htt_soc_attach_target(soc->htt_handle);
  2646. dp_rxdma_ring_config(soc);
  2647. DP_STATS_INIT(soc);
  2648. /* initialize work queue for stats processing */
  2649. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2650. return 0;
  2651. }
  2652. /*
  2653. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2654. * @txrx_soc: Datapath SOC handle
  2655. */
  2656. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2657. {
  2658. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2659. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2660. }
  2661. /*
  2662. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2663. * @txrx_soc: Datapath SOC handle
  2664. * @nss_cfg: nss config
  2665. */
  2666. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2667. {
  2668. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2669. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2670. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2671. /*
  2672. * TODO: masked out based on the per offloaded radio
  2673. */
  2674. if (config == dp_nss_cfg_dbdc) {
  2675. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2676. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2677. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2678. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2679. }
  2680. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2681. FL("nss-wifi<0> nss config is enabled"));
  2682. }
  2683. /*
  2684. * dp_vdev_attach_wifi3() - attach txrx vdev
  2685. * @txrx_pdev: Datapath PDEV handle
  2686. * @vdev_mac_addr: MAC address of the virtual interface
  2687. * @vdev_id: VDEV Id
  2688. * @wlan_op_mode: VDEV operating mode
  2689. *
  2690. * Return: DP VDEV handle on success, NULL on failure
  2691. */
  2692. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2693. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2694. {
  2695. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2696. struct dp_soc *soc = pdev->soc;
  2697. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2698. int tx_ring_size;
  2699. if (!vdev) {
  2700. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2701. FL("DP VDEV memory allocation failed"));
  2702. goto fail0;
  2703. }
  2704. vdev->pdev = pdev;
  2705. vdev->vdev_id = vdev_id;
  2706. vdev->opmode = op_mode;
  2707. vdev->osdev = soc->osdev;
  2708. vdev->osif_rx = NULL;
  2709. vdev->osif_rsim_rx_decap = NULL;
  2710. vdev->osif_get_key = NULL;
  2711. vdev->osif_rx_mon = NULL;
  2712. vdev->osif_tx_free_ext = NULL;
  2713. vdev->osif_vdev = NULL;
  2714. vdev->delete.pending = 0;
  2715. vdev->safemode = 0;
  2716. vdev->drop_unenc = 1;
  2717. vdev->sec_type = cdp_sec_type_none;
  2718. #ifdef notyet
  2719. vdev->filters_num = 0;
  2720. #endif
  2721. qdf_mem_copy(
  2722. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2723. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2724. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2725. vdev->dscp_tid_map_id = 0;
  2726. vdev->mcast_enhancement_en = 0;
  2727. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2728. /* TODO: Initialize default HTT meta data that will be used in
  2729. * TCL descriptors for packets transmitted from this VDEV
  2730. */
  2731. TAILQ_INIT(&vdev->peer_list);
  2732. /* add this vdev into the pdev's list */
  2733. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2734. pdev->vdev_count++;
  2735. dp_tx_vdev_attach(vdev);
  2736. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2737. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2738. goto fail1;
  2739. if ((soc->intr_mode == DP_INTR_POLL) &&
  2740. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2741. if (pdev->vdev_count == 1)
  2742. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2743. }
  2744. dp_lro_hash_setup(soc);
  2745. /* LRO */
  2746. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2747. wlan_op_mode_sta == vdev->opmode)
  2748. vdev->lro_enable = true;
  2749. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2750. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2751. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2752. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2753. DP_STATS_INIT(vdev);
  2754. if (wlan_op_mode_sta == vdev->opmode)
  2755. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2756. vdev->mac_addr.raw);
  2757. return (struct cdp_vdev *)vdev;
  2758. fail1:
  2759. dp_tx_vdev_detach(vdev);
  2760. qdf_mem_free(vdev);
  2761. fail0:
  2762. return NULL;
  2763. }
  2764. /**
  2765. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2766. * @vdev: Datapath VDEV handle
  2767. * @osif_vdev: OSIF vdev handle
  2768. * @txrx_ops: Tx and Rx operations
  2769. *
  2770. * Return: DP VDEV handle on success, NULL on failure
  2771. */
  2772. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2773. void *osif_vdev,
  2774. struct ol_txrx_ops *txrx_ops)
  2775. {
  2776. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2777. vdev->osif_vdev = osif_vdev;
  2778. vdev->osif_rx = txrx_ops->rx.rx;
  2779. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2780. vdev->osif_get_key = txrx_ops->get_key;
  2781. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2782. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2783. #ifdef notyet
  2784. #if ATH_SUPPORT_WAPI
  2785. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2786. #endif
  2787. #endif
  2788. #ifdef UMAC_SUPPORT_PROXY_ARP
  2789. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2790. #endif
  2791. vdev->me_convert = txrx_ops->me_convert;
  2792. /* TODO: Enable the following once Tx code is integrated */
  2793. if (vdev->mesh_vdev)
  2794. txrx_ops->tx.tx = dp_tx_send_mesh;
  2795. else
  2796. txrx_ops->tx.tx = dp_tx_send;
  2797. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2798. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2799. "DP Vdev Register success");
  2800. }
  2801. /**
  2802. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2803. * @vdev: Datapath VDEV handle
  2804. *
  2805. * Return: void
  2806. */
  2807. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2808. {
  2809. struct dp_pdev *pdev = vdev->pdev;
  2810. struct dp_soc *soc = pdev->soc;
  2811. struct dp_peer *peer;
  2812. uint16_t *peer_ids;
  2813. uint8_t i = 0, j = 0;
  2814. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2815. if (!peer_ids) {
  2816. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2817. "DP alloc failure - unable to flush peers");
  2818. return;
  2819. }
  2820. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2821. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2822. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2823. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2824. if (j < soc->max_peers)
  2825. peer_ids[j++] = peer->peer_ids[i];
  2826. }
  2827. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2828. for (i = 0; i < j ; i++)
  2829. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2830. qdf_mem_free(peer_ids);
  2831. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2832. FL("Flushed peers for vdev object %pK "), vdev);
  2833. }
  2834. /*
  2835. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2836. * @txrx_vdev: Datapath VDEV handle
  2837. * @callback: Callback OL_IF on completion of detach
  2838. * @cb_context: Callback context
  2839. *
  2840. */
  2841. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2842. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2843. {
  2844. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2845. struct dp_pdev *pdev = vdev->pdev;
  2846. struct dp_soc *soc = pdev->soc;
  2847. /* preconditions */
  2848. qdf_assert(vdev);
  2849. /* remove the vdev from its parent pdev's list */
  2850. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2851. if (wlan_op_mode_sta == vdev->opmode)
  2852. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2853. /*
  2854. * If Target is hung, flush all peers before detaching vdev
  2855. * this will free all references held due to missing
  2856. * unmap commands from Target
  2857. */
  2858. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  2859. dp_vdev_flush_peers(vdev);
  2860. /*
  2861. * Use peer_ref_mutex while accessing peer_list, in case
  2862. * a peer is in the process of being removed from the list.
  2863. */
  2864. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2865. /* check that the vdev has no peers allocated */
  2866. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2867. /* debug print - will be removed later */
  2868. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2869. FL("not deleting vdev object %pK (%pM)"
  2870. "until deletion finishes for all its peers"),
  2871. vdev, vdev->mac_addr.raw);
  2872. /* indicate that the vdev needs to be deleted */
  2873. vdev->delete.pending = 1;
  2874. vdev->delete.callback = callback;
  2875. vdev->delete.context = cb_context;
  2876. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2877. return;
  2878. }
  2879. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2880. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2881. vdev->vdev_id);
  2882. dp_tx_vdev_detach(vdev);
  2883. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2884. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2885. qdf_mem_free(vdev);
  2886. if (callback)
  2887. callback(cb_context);
  2888. }
  2889. /*
  2890. * dp_peer_create_wifi3() - attach txrx peer
  2891. * @txrx_vdev: Datapath VDEV handle
  2892. * @peer_mac_addr: Peer MAC address
  2893. *
  2894. * Return: DP peeer handle on success, NULL on failure
  2895. */
  2896. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2897. uint8_t *peer_mac_addr)
  2898. {
  2899. struct dp_peer *peer;
  2900. int i;
  2901. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2902. struct dp_pdev *pdev;
  2903. struct dp_soc *soc;
  2904. /* preconditions */
  2905. qdf_assert(vdev);
  2906. qdf_assert(peer_mac_addr);
  2907. pdev = vdev->pdev;
  2908. soc = pdev->soc;
  2909. #ifdef notyet
  2910. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2911. soc->mempool_ol_ath_peer);
  2912. #else
  2913. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2914. #endif
  2915. if (!peer)
  2916. return NULL; /* failure */
  2917. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2918. TAILQ_INIT(&peer->ast_entry_list);
  2919. /* store provided params */
  2920. peer->vdev = vdev;
  2921. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  2922. qdf_spinlock_create(&peer->peer_info_lock);
  2923. qdf_mem_copy(
  2924. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2925. /* TODO: See of rx_opt_proc is really required */
  2926. peer->rx_opt_proc = soc->rx_opt_proc;
  2927. /* initialize the peer_id */
  2928. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2929. peer->peer_ids[i] = HTT_INVALID_PEER;
  2930. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2931. qdf_atomic_init(&peer->ref_cnt);
  2932. /* keep one reference for attach */
  2933. qdf_atomic_inc(&peer->ref_cnt);
  2934. /* add this peer into the vdev's list */
  2935. if (wlan_op_mode_sta == vdev->opmode)
  2936. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  2937. else
  2938. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2939. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2940. /* TODO: See if hash based search is required */
  2941. dp_peer_find_hash_add(soc, peer);
  2942. /* Initialize the peer state */
  2943. peer->state = OL_TXRX_PEER_STATE_DISC;
  2944. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2945. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2946. vdev, peer, peer->mac_addr.raw,
  2947. qdf_atomic_read(&peer->ref_cnt));
  2948. /*
  2949. * For every peer MAp message search and set if bss_peer
  2950. */
  2951. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2953. "vdev bss_peer!!!!");
  2954. peer->bss_peer = 1;
  2955. vdev->vap_bss_peer = peer;
  2956. }
  2957. #ifndef CONFIG_WIN
  2958. dp_local_peer_id_alloc(pdev, peer);
  2959. #endif
  2960. DP_STATS_INIT(peer);
  2961. return (void *)peer;
  2962. }
  2963. /*
  2964. * dp_peer_setup_wifi3() - initialize the peer
  2965. * @vdev_hdl: virtual device object
  2966. * @peer: Peer object
  2967. *
  2968. * Return: void
  2969. */
  2970. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2971. {
  2972. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2973. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2974. struct dp_pdev *pdev;
  2975. struct dp_soc *soc;
  2976. bool hash_based = 0;
  2977. enum cdp_host_reo_dest_ring reo_dest;
  2978. /* preconditions */
  2979. qdf_assert(vdev);
  2980. qdf_assert(peer);
  2981. pdev = vdev->pdev;
  2982. soc = pdev->soc;
  2983. peer->last_assoc_rcvd = 0;
  2984. peer->last_disassoc_rcvd = 0;
  2985. peer->last_deauth_rcvd = 0;
  2986. /*
  2987. * hash based steering is disabled for Radios which are offloaded
  2988. * to NSS
  2989. */
  2990. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2991. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2992. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2993. FL("hash based steering for pdev: %d is %d\n"),
  2994. pdev->pdev_id, hash_based);
  2995. /*
  2996. * Below line of code will ensure the proper reo_dest ring is choosen
  2997. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2998. */
  2999. reo_dest = pdev->reo_dest;
  3000. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3001. /* TODO: Check the destination ring number to be passed to FW */
  3002. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3003. pdev->osif_pdev, peer->mac_addr.raw,
  3004. peer->vdev->vdev_id, hash_based, reo_dest);
  3005. }
  3006. dp_peer_rx_init(pdev, peer);
  3007. return;
  3008. }
  3009. /*
  3010. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3011. * @vdev_handle: virtual device object
  3012. * @htt_pkt_type: type of pkt
  3013. *
  3014. * Return: void
  3015. */
  3016. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3017. enum htt_cmn_pkt_type val)
  3018. {
  3019. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3020. vdev->tx_encap_type = val;
  3021. }
  3022. /*
  3023. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3024. * @vdev_handle: virtual device object
  3025. * @htt_pkt_type: type of pkt
  3026. *
  3027. * Return: void
  3028. */
  3029. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3030. enum htt_cmn_pkt_type val)
  3031. {
  3032. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3033. vdev->rx_decap_type = val;
  3034. }
  3035. /*
  3036. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3037. * @pdev_handle: physical device object
  3038. * @val: reo destination ring index (1 - 4)
  3039. *
  3040. * Return: void
  3041. */
  3042. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3043. enum cdp_host_reo_dest_ring val)
  3044. {
  3045. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3046. if (pdev)
  3047. pdev->reo_dest = val;
  3048. }
  3049. /*
  3050. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3051. * @pdev_handle: physical device object
  3052. *
  3053. * Return: reo destination ring index
  3054. */
  3055. static enum cdp_host_reo_dest_ring
  3056. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3057. {
  3058. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3059. if (pdev)
  3060. return pdev->reo_dest;
  3061. else
  3062. return cdp_host_reo_dest_ring_unknown;
  3063. }
  3064. #ifdef QCA_SUPPORT_SON
  3065. static void dp_son_peer_authorize(struct dp_peer *peer)
  3066. {
  3067. struct dp_soc *soc;
  3068. soc = peer->vdev->pdev->soc;
  3069. peer->peer_bs_inact_flag = 0;
  3070. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3071. return;
  3072. }
  3073. #else
  3074. static void dp_son_peer_authorize(struct dp_peer *peer)
  3075. {
  3076. return;
  3077. }
  3078. #endif
  3079. /*
  3080. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3081. * @pdev_handle: device object
  3082. * @val: value to be set
  3083. *
  3084. * Return: void
  3085. */
  3086. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3087. uint32_t val)
  3088. {
  3089. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3090. /* Enable/Disable smart mesh filtering. This flag will be checked
  3091. * during rx processing to check if packets are from NAC clients.
  3092. */
  3093. pdev->filter_neighbour_peers = val;
  3094. return 0;
  3095. }
  3096. /*
  3097. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3098. * address for smart mesh filtering
  3099. * @pdev_handle: device object
  3100. * @cmd: Add/Del command
  3101. * @macaddr: nac client mac address
  3102. *
  3103. * Return: void
  3104. */
  3105. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3106. uint32_t cmd, uint8_t *macaddr)
  3107. {
  3108. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3109. struct dp_neighbour_peer *peer = NULL;
  3110. if (!macaddr)
  3111. goto fail0;
  3112. /* Store address of NAC (neighbour peer) which will be checked
  3113. * against TA of received packets.
  3114. */
  3115. if (cmd == DP_NAC_PARAM_ADD) {
  3116. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3117. sizeof(*peer));
  3118. if (!peer) {
  3119. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3120. FL("DP neighbour peer node memory allocation failed"));
  3121. goto fail0;
  3122. }
  3123. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3124. macaddr, DP_MAC_ADDR_LEN);
  3125. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3126. /* add this neighbour peer into the list */
  3127. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3128. neighbour_peer_list_elem);
  3129. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3130. return 1;
  3131. } else if (cmd == DP_NAC_PARAM_DEL) {
  3132. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3133. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3134. neighbour_peer_list_elem) {
  3135. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3136. macaddr, DP_MAC_ADDR_LEN)) {
  3137. /* delete this peer from the list */
  3138. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3139. peer, neighbour_peer_list_elem);
  3140. qdf_mem_free(peer);
  3141. break;
  3142. }
  3143. }
  3144. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3145. return 1;
  3146. }
  3147. fail0:
  3148. return 0;
  3149. }
  3150. /*
  3151. * dp_get_sec_type() - Get the security type
  3152. * @peer: Datapath peer handle
  3153. * @sec_idx: Security id (mcast, ucast)
  3154. *
  3155. * return sec_type: Security type
  3156. */
  3157. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3158. {
  3159. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3160. return dpeer->security[sec_idx].sec_type;
  3161. }
  3162. /*
  3163. * dp_peer_authorize() - authorize txrx peer
  3164. * @peer_handle: Datapath peer handle
  3165. * @authorize
  3166. *
  3167. */
  3168. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3169. {
  3170. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3171. struct dp_soc *soc;
  3172. if (peer != NULL) {
  3173. soc = peer->vdev->pdev->soc;
  3174. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3175. dp_son_peer_authorize(peer);
  3176. peer->authorize = authorize ? 1 : 0;
  3177. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3178. }
  3179. }
  3180. #ifdef QCA_SUPPORT_SON
  3181. /*
  3182. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3183. * @pdev_handle: Device handle
  3184. * @new_threshold : updated threshold value
  3185. *
  3186. */
  3187. static void
  3188. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3189. u_int16_t new_threshold)
  3190. {
  3191. struct dp_vdev *vdev;
  3192. struct dp_peer *peer;
  3193. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3194. struct dp_soc *soc = pdev->soc;
  3195. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3196. if (old_threshold == new_threshold)
  3197. return;
  3198. soc->pdev_bs_inact_reload = new_threshold;
  3199. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3200. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3201. if (vdev->opmode != wlan_op_mode_ap)
  3202. continue;
  3203. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3204. if (!peer->authorize)
  3205. continue;
  3206. if (old_threshold - peer->peer_bs_inact >=
  3207. new_threshold) {
  3208. dp_mark_peer_inact((void *)peer, true);
  3209. peer->peer_bs_inact = 0;
  3210. } else {
  3211. peer->peer_bs_inact = new_threshold -
  3212. (old_threshold - peer->peer_bs_inact);
  3213. }
  3214. }
  3215. }
  3216. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3217. }
  3218. /**
  3219. * dp_txrx_reset_inact_count(): Reset inact count
  3220. * @pdev_handle - device handle
  3221. *
  3222. * Return: void
  3223. */
  3224. static void
  3225. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3226. {
  3227. struct dp_vdev *vdev = NULL;
  3228. struct dp_peer *peer = NULL;
  3229. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3230. struct dp_soc *soc = pdev->soc;
  3231. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3232. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3233. if (vdev->opmode != wlan_op_mode_ap)
  3234. continue;
  3235. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3236. if (!peer->authorize)
  3237. continue;
  3238. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3239. }
  3240. }
  3241. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3242. }
  3243. /**
  3244. * dp_set_inact_params(): set inactivity params
  3245. * @pdev_handle - device handle
  3246. * @inact_check_interval - inactivity interval
  3247. * @inact_normal - Inactivity normal
  3248. * @inact_overload - Inactivity overload
  3249. *
  3250. * Return: bool
  3251. */
  3252. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3253. u_int16_t inact_check_interval,
  3254. u_int16_t inact_normal, u_int16_t inact_overload)
  3255. {
  3256. struct dp_soc *soc;
  3257. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3258. if (!pdev)
  3259. return false;
  3260. soc = pdev->soc;
  3261. if (!soc)
  3262. return false;
  3263. soc->pdev_bs_inact_interval = inact_check_interval;
  3264. soc->pdev_bs_inact_normal = inact_normal;
  3265. soc->pdev_bs_inact_overload = inact_overload;
  3266. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3267. soc->pdev_bs_inact_normal);
  3268. return true;
  3269. }
  3270. /**
  3271. * dp_start_inact_timer(): Inactivity timer start
  3272. * @pdev_handle - device handle
  3273. * @enable - Inactivity timer start/stop
  3274. *
  3275. * Return: bool
  3276. */
  3277. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3278. {
  3279. struct dp_soc *soc;
  3280. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3281. if (!pdev)
  3282. return false;
  3283. soc = pdev->soc;
  3284. if (!soc)
  3285. return false;
  3286. if (enable) {
  3287. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3288. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3289. soc->pdev_bs_inact_interval * 1000);
  3290. } else {
  3291. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3292. }
  3293. return true;
  3294. }
  3295. /**
  3296. * dp_set_overload(): Set inactivity overload
  3297. * @pdev_handle - device handle
  3298. * @overload - overload status
  3299. *
  3300. * Return: void
  3301. */
  3302. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3303. {
  3304. struct dp_soc *soc;
  3305. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3306. if (!pdev)
  3307. return;
  3308. soc = pdev->soc;
  3309. if (!soc)
  3310. return;
  3311. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3312. overload ? soc->pdev_bs_inact_overload :
  3313. soc->pdev_bs_inact_normal);
  3314. }
  3315. /**
  3316. * dp_peer_is_inact(): check whether peer is inactive
  3317. * @peer_handle - datapath peer handle
  3318. *
  3319. * Return: bool
  3320. */
  3321. bool dp_peer_is_inact(void *peer_handle)
  3322. {
  3323. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3324. if (!peer)
  3325. return false;
  3326. return peer->peer_bs_inact_flag == 1;
  3327. }
  3328. /**
  3329. * dp_init_inact_timer: initialize the inact timer
  3330. * @soc - SOC handle
  3331. *
  3332. * Return: void
  3333. */
  3334. void dp_init_inact_timer(struct dp_soc *soc)
  3335. {
  3336. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3337. dp_txrx_peer_find_inact_timeout_handler,
  3338. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3339. }
  3340. #else
  3341. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3342. u_int16_t inact_normal, u_int16_t inact_overload)
  3343. {
  3344. return false;
  3345. }
  3346. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3347. {
  3348. return false;
  3349. }
  3350. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3351. {
  3352. return;
  3353. }
  3354. void dp_init_inact_timer(struct dp_soc *soc)
  3355. {
  3356. return;
  3357. }
  3358. bool dp_peer_is_inact(void *peer)
  3359. {
  3360. return false;
  3361. }
  3362. #endif
  3363. /*
  3364. * dp_peer_unref_delete() - unref and delete peer
  3365. * @peer_handle: Datapath peer handle
  3366. *
  3367. */
  3368. void dp_peer_unref_delete(void *peer_handle)
  3369. {
  3370. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3371. struct dp_peer *bss_peer = NULL;
  3372. struct dp_vdev *vdev = peer->vdev;
  3373. struct dp_pdev *pdev = vdev->pdev;
  3374. struct dp_soc *soc = pdev->soc;
  3375. struct dp_peer *tmppeer;
  3376. int found = 0;
  3377. uint16_t peer_id;
  3378. uint16_t vdev_id;
  3379. /*
  3380. * Hold the lock all the way from checking if the peer ref count
  3381. * is zero until the peer references are removed from the hash
  3382. * table and vdev list (if the peer ref count is zero).
  3383. * This protects against a new HL tx operation starting to use the
  3384. * peer object just after this function concludes it's done being used.
  3385. * Furthermore, the lock needs to be held while checking whether the
  3386. * vdev's list of peers is empty, to make sure that list is not modified
  3387. * concurrently with the empty check.
  3388. */
  3389. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3390. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3391. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3392. peer, qdf_atomic_read(&peer->ref_cnt));
  3393. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3394. peer_id = peer->peer_ids[0];
  3395. vdev_id = vdev->vdev_id;
  3396. /*
  3397. * Make sure that the reference to the peer in
  3398. * peer object map is removed
  3399. */
  3400. if (peer_id != HTT_INVALID_PEER)
  3401. soc->peer_id_to_obj_map[peer_id] = NULL;
  3402. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3403. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3404. /* remove the reference to the peer from the hash table */
  3405. dp_peer_find_hash_remove(soc, peer);
  3406. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3407. if (tmppeer == peer) {
  3408. found = 1;
  3409. break;
  3410. }
  3411. }
  3412. if (found) {
  3413. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3414. peer_list_elem);
  3415. } else {
  3416. /*Ignoring the remove operation as peer not found*/
  3417. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3418. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3419. peer, vdev, &peer->vdev->peer_list);
  3420. }
  3421. /* cleanup the peer data */
  3422. dp_peer_cleanup(vdev, peer);
  3423. /* check whether the parent vdev has no peers left */
  3424. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3425. /*
  3426. * Now that there are no references to the peer, we can
  3427. * release the peer reference lock.
  3428. */
  3429. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3430. /*
  3431. * Check if the parent vdev was waiting for its peers
  3432. * to be deleted, in order for it to be deleted too.
  3433. */
  3434. if (vdev->delete.pending) {
  3435. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3436. vdev->delete.callback;
  3437. void *vdev_delete_context =
  3438. vdev->delete.context;
  3439. QDF_TRACE(QDF_MODULE_ID_DP,
  3440. QDF_TRACE_LEVEL_INFO_HIGH,
  3441. FL("deleting vdev object %pK (%pM)"
  3442. " - its last peer is done"),
  3443. vdev, vdev->mac_addr.raw);
  3444. /* all peers are gone, go ahead and delete it */
  3445. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3446. FLOW_TYPE_VDEV,
  3447. vdev_id);
  3448. dp_tx_vdev_detach(vdev);
  3449. QDF_TRACE(QDF_MODULE_ID_DP,
  3450. QDF_TRACE_LEVEL_INFO_HIGH,
  3451. FL("deleting vdev object %pK (%pM)"),
  3452. vdev, vdev->mac_addr.raw);
  3453. qdf_mem_free(vdev);
  3454. vdev = NULL;
  3455. if (vdev_delete_cb)
  3456. vdev_delete_cb(vdev_delete_context);
  3457. }
  3458. } else {
  3459. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3460. }
  3461. if (vdev) {
  3462. if (vdev->vap_bss_peer == peer) {
  3463. vdev->vap_bss_peer = NULL;
  3464. }
  3465. }
  3466. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3467. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3468. vdev_id, peer->mac_addr.raw);
  3469. }
  3470. if (!vdev || !vdev->vap_bss_peer) {
  3471. goto free_peer;
  3472. }
  3473. #ifdef notyet
  3474. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3475. #else
  3476. bss_peer = vdev->vap_bss_peer;
  3477. DP_UPDATE_STATS(bss_peer, peer);
  3478. free_peer:
  3479. qdf_mem_free(peer);
  3480. #endif
  3481. } else {
  3482. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3483. }
  3484. }
  3485. /*
  3486. * dp_peer_detach_wifi3() – Detach txrx peer
  3487. * @peer_handle: Datapath peer handle
  3488. * @bitmap: bitmap indicating special handling of request.
  3489. *
  3490. */
  3491. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3492. {
  3493. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3494. /* redirect the peer's rx delivery function to point to a
  3495. * discard func
  3496. */
  3497. peer->rx_opt_proc = dp_rx_discard;
  3498. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3499. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3500. #ifndef CONFIG_WIN
  3501. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3502. #endif
  3503. qdf_spinlock_destroy(&peer->peer_info_lock);
  3504. /*
  3505. * Remove the reference added during peer_attach.
  3506. * The peer will still be left allocated until the
  3507. * PEER_UNMAP message arrives to remove the other
  3508. * reference, added by the PEER_MAP message.
  3509. */
  3510. dp_peer_unref_delete(peer_handle);
  3511. }
  3512. /*
  3513. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3514. * @peer_handle: Datapath peer handle
  3515. *
  3516. */
  3517. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3518. {
  3519. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3520. return vdev->mac_addr.raw;
  3521. }
  3522. /*
  3523. * dp_vdev_set_wds() - Enable per packet stats
  3524. * @vdev_handle: DP VDEV handle
  3525. * @val: value
  3526. *
  3527. * Return: none
  3528. */
  3529. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3530. {
  3531. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3532. vdev->wds_enabled = val;
  3533. return 0;
  3534. }
  3535. /*
  3536. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3537. * @peer_handle: Datapath peer handle
  3538. *
  3539. */
  3540. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3541. uint8_t vdev_id)
  3542. {
  3543. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3544. struct dp_vdev *vdev = NULL;
  3545. if (qdf_unlikely(!pdev))
  3546. return NULL;
  3547. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3548. if (vdev->vdev_id == vdev_id)
  3549. break;
  3550. }
  3551. return (struct cdp_vdev *)vdev;
  3552. }
  3553. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3554. {
  3555. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3556. return vdev->opmode;
  3557. }
  3558. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3559. {
  3560. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3561. struct dp_pdev *pdev = vdev->pdev;
  3562. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3563. }
  3564. /**
  3565. * dp_reset_monitor_mode() - Disable monitor mode
  3566. * @pdev_handle: Datapath PDEV handle
  3567. *
  3568. * Return: 0 on success, not 0 on failure
  3569. */
  3570. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3571. {
  3572. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3573. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3574. struct dp_soc *soc = pdev->soc;
  3575. uint8_t pdev_id;
  3576. int mac_id;
  3577. pdev_id = pdev->pdev_id;
  3578. soc = pdev->soc;
  3579. pdev->monitor_vdev = NULL;
  3580. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3581. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3582. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3583. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3584. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3585. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3586. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3587. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3588. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3589. }
  3590. return 0;
  3591. }
  3592. /**
  3593. * dp_set_nac() - set peer_nac
  3594. * @peer_handle: Datapath PEER handle
  3595. *
  3596. * Return: void
  3597. */
  3598. static void dp_set_nac(struct cdp_peer *peer_handle)
  3599. {
  3600. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3601. peer->nac = 1;
  3602. }
  3603. /**
  3604. * dp_get_tx_pending() - read pending tx
  3605. * @pdev_handle: Datapath PDEV handle
  3606. *
  3607. * Return: outstanding tx
  3608. */
  3609. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3610. {
  3611. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3612. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3613. }
  3614. /**
  3615. * dp_get_peer_mac_from_peer_id() - get peer mac
  3616. * @pdev_handle: Datapath PDEV handle
  3617. * @peer_id: Peer ID
  3618. * @peer_mac: MAC addr of PEER
  3619. *
  3620. * Return: void
  3621. */
  3622. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3623. uint32_t peer_id, uint8_t *peer_mac)
  3624. {
  3625. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3626. struct dp_peer *peer;
  3627. if (pdev && peer_mac) {
  3628. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3629. if (peer && peer->mac_addr.raw) {
  3630. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3631. DP_MAC_ADDR_LEN);
  3632. }
  3633. }
  3634. }
  3635. /**
  3636. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3637. * @vdev_handle: Datapath VDEV handle
  3638. * @smart_monitor: Flag to denote if its smart monitor mode
  3639. *
  3640. * Return: 0 on success, not 0 on failure
  3641. */
  3642. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3643. uint8_t smart_monitor)
  3644. {
  3645. /* Many monitor VAPs can exists in a system but only one can be up at
  3646. * anytime
  3647. */
  3648. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3649. struct dp_pdev *pdev;
  3650. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3651. struct dp_soc *soc;
  3652. uint8_t pdev_id;
  3653. int mac_id;
  3654. qdf_assert(vdev);
  3655. pdev = vdev->pdev;
  3656. pdev_id = pdev->pdev_id;
  3657. soc = pdev->soc;
  3658. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3659. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3660. pdev, pdev_id, soc, vdev);
  3661. /*Check if current pdev's monitor_vdev exists */
  3662. if (pdev->monitor_vdev) {
  3663. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3664. "vdev=%pK\n", vdev);
  3665. qdf_assert(vdev);
  3666. }
  3667. pdev->monitor_vdev = vdev;
  3668. /* If smart monitor mode, do not configure monitor ring */
  3669. if (smart_monitor)
  3670. return QDF_STATUS_SUCCESS;
  3671. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3672. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3673. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3674. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3675. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3676. pdev->mo_data_filter);
  3677. htt_tlv_filter.mpdu_start = 1;
  3678. htt_tlv_filter.msdu_start = 1;
  3679. htt_tlv_filter.packet = 1;
  3680. htt_tlv_filter.msdu_end = 1;
  3681. htt_tlv_filter.mpdu_end = 1;
  3682. htt_tlv_filter.packet_header = 1;
  3683. htt_tlv_filter.attention = 1;
  3684. htt_tlv_filter.ppdu_start = 0;
  3685. htt_tlv_filter.ppdu_end = 0;
  3686. htt_tlv_filter.ppdu_end_user_stats = 0;
  3687. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3688. htt_tlv_filter.ppdu_end_status_done = 0;
  3689. htt_tlv_filter.header_per_msdu = 1;
  3690. htt_tlv_filter.enable_fp =
  3691. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3692. htt_tlv_filter.enable_md = 0;
  3693. htt_tlv_filter.enable_mo =
  3694. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3695. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3696. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3697. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3698. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3699. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3700. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3701. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3702. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3703. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3704. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3705. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3706. }
  3707. htt_tlv_filter.mpdu_start = 1;
  3708. htt_tlv_filter.msdu_start = 1;
  3709. htt_tlv_filter.packet = 0;
  3710. htt_tlv_filter.msdu_end = 1;
  3711. htt_tlv_filter.mpdu_end = 1;
  3712. htt_tlv_filter.packet_header = 1;
  3713. htt_tlv_filter.attention = 1;
  3714. htt_tlv_filter.ppdu_start = 1;
  3715. htt_tlv_filter.ppdu_end = 1;
  3716. htt_tlv_filter.ppdu_end_user_stats = 1;
  3717. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3718. htt_tlv_filter.ppdu_end_status_done = 1;
  3719. htt_tlv_filter.header_per_msdu = 0;
  3720. htt_tlv_filter.enable_fp =
  3721. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3722. htt_tlv_filter.enable_md = 0;
  3723. htt_tlv_filter.enable_mo =
  3724. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3725. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3726. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3727. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3728. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3729. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3730. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3731. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3732. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3733. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3734. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3735. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3736. }
  3737. return QDF_STATUS_SUCCESS;
  3738. }
  3739. /**
  3740. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3741. * @pdev_handle: Datapath PDEV handle
  3742. * @filter_val: Flag to select Filter for monitor mode
  3743. * Return: 0 on success, not 0 on failure
  3744. */
  3745. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3746. struct cdp_monitor_filter *filter_val)
  3747. {
  3748. /* Many monitor VAPs can exists in a system but only one can be up at
  3749. * anytime
  3750. */
  3751. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3752. struct dp_vdev *vdev = pdev->monitor_vdev;
  3753. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3754. struct dp_soc *soc;
  3755. uint8_t pdev_id;
  3756. int mac_id;
  3757. pdev_id = pdev->pdev_id;
  3758. soc = pdev->soc;
  3759. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3760. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3761. pdev, pdev_id, soc, vdev);
  3762. /*Check if current pdev's monitor_vdev exists */
  3763. if (!pdev->monitor_vdev) {
  3764. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3765. "vdev=%pK\n", vdev);
  3766. qdf_assert(vdev);
  3767. }
  3768. /* update filter mode, type in pdev structure */
  3769. pdev->mon_filter_mode = filter_val->mode;
  3770. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3771. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3772. pdev->fp_data_filter = filter_val->fp_data;
  3773. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3774. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3775. pdev->mo_data_filter = filter_val->mo_data;
  3776. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3777. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3778. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3779. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3780. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3781. pdev->mo_data_filter);
  3782. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3783. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3784. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3785. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3786. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3787. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3788. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3789. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3790. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3791. }
  3792. htt_tlv_filter.mpdu_start = 1;
  3793. htt_tlv_filter.msdu_start = 1;
  3794. htt_tlv_filter.packet = 1;
  3795. htt_tlv_filter.msdu_end = 1;
  3796. htt_tlv_filter.mpdu_end = 1;
  3797. htt_tlv_filter.packet_header = 1;
  3798. htt_tlv_filter.attention = 1;
  3799. htt_tlv_filter.ppdu_start = 0;
  3800. htt_tlv_filter.ppdu_end = 0;
  3801. htt_tlv_filter.ppdu_end_user_stats = 0;
  3802. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3803. htt_tlv_filter.ppdu_end_status_done = 0;
  3804. htt_tlv_filter.header_per_msdu = 1;
  3805. htt_tlv_filter.enable_fp =
  3806. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3807. htt_tlv_filter.enable_md = 0;
  3808. htt_tlv_filter.enable_mo =
  3809. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3810. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3811. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3812. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3813. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3814. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3815. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3816. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3817. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3818. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3819. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3820. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3821. }
  3822. htt_tlv_filter.mpdu_start = 1;
  3823. htt_tlv_filter.msdu_start = 1;
  3824. htt_tlv_filter.packet = 0;
  3825. htt_tlv_filter.msdu_end = 1;
  3826. htt_tlv_filter.mpdu_end = 1;
  3827. htt_tlv_filter.packet_header = 1;
  3828. htt_tlv_filter.attention = 1;
  3829. htt_tlv_filter.ppdu_start = 1;
  3830. htt_tlv_filter.ppdu_end = 1;
  3831. htt_tlv_filter.ppdu_end_user_stats = 1;
  3832. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3833. htt_tlv_filter.ppdu_end_status_done = 1;
  3834. htt_tlv_filter.header_per_msdu = 0;
  3835. htt_tlv_filter.enable_fp =
  3836. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3837. htt_tlv_filter.enable_md = 0;
  3838. htt_tlv_filter.enable_mo =
  3839. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3840. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3841. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3842. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3843. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3844. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3845. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3846. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3847. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3848. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3849. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3850. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3851. }
  3852. return QDF_STATUS_SUCCESS;
  3853. }
  3854. /**
  3855. * dp_get_pdev_id_frm_pdev() - get pdev_id
  3856. * @pdev_handle: Datapath PDEV handle
  3857. *
  3858. * Return: pdev_id
  3859. */
  3860. static
  3861. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  3862. {
  3863. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3864. return pdev->pdev_id;
  3865. }
  3866. /**
  3867. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  3868. * @vdev_handle: Datapath VDEV handle
  3869. * Return: true on ucast filter flag set
  3870. */
  3871. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  3872. {
  3873. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3874. struct dp_pdev *pdev;
  3875. pdev = vdev->pdev;
  3876. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  3877. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  3878. return true;
  3879. return false;
  3880. }
  3881. /**
  3882. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  3883. * @vdev_handle: Datapath VDEV handle
  3884. * Return: true on mcast filter flag set
  3885. */
  3886. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  3887. {
  3888. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3889. struct dp_pdev *pdev;
  3890. pdev = vdev->pdev;
  3891. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  3892. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  3893. return true;
  3894. return false;
  3895. }
  3896. /**
  3897. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  3898. * @vdev_handle: Datapath VDEV handle
  3899. * Return: true on non data filter flag set
  3900. */
  3901. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  3902. {
  3903. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3904. struct dp_pdev *pdev;
  3905. pdev = vdev->pdev;
  3906. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  3907. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  3908. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  3909. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  3910. return true;
  3911. }
  3912. }
  3913. return false;
  3914. }
  3915. #ifdef MESH_MODE_SUPPORT
  3916. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3917. {
  3918. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3919. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3920. FL("val %d"), val);
  3921. vdev->mesh_vdev = val;
  3922. }
  3923. /*
  3924. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3925. * @vdev_hdl: virtual device object
  3926. * @val: value to be set
  3927. *
  3928. * Return: void
  3929. */
  3930. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3931. {
  3932. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3933. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3934. FL("val %d"), val);
  3935. vdev->mesh_rx_filter = val;
  3936. }
  3937. #endif
  3938. /*
  3939. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3940. * Current scope is bar recieved count
  3941. *
  3942. * @pdev_handle: DP_PDEV handle
  3943. *
  3944. * Return: void
  3945. */
  3946. #define STATS_PROC_TIMEOUT (HZ/1000)
  3947. static void
  3948. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3949. {
  3950. struct dp_vdev *vdev;
  3951. struct dp_peer *peer;
  3952. uint32_t waitcnt;
  3953. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3954. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3955. if (!peer) {
  3956. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3957. FL("DP Invalid Peer refernce"));
  3958. return;
  3959. }
  3960. if (peer->delete_in_progress) {
  3961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3962. FL("DP Peer deletion in progress"));
  3963. continue;
  3964. }
  3965. qdf_atomic_inc(&peer->ref_cnt);
  3966. waitcnt = 0;
  3967. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3968. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  3969. && waitcnt < 10) {
  3970. schedule_timeout_interruptible(
  3971. STATS_PROC_TIMEOUT);
  3972. waitcnt++;
  3973. }
  3974. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  3975. dp_peer_unref_delete(peer);
  3976. }
  3977. }
  3978. }
  3979. /**
  3980. * dp_rx_bar_stats_cb(): BAR received stats callback
  3981. * @soc: SOC handle
  3982. * @cb_ctxt: Call back context
  3983. * @reo_status: Reo status
  3984. *
  3985. * return: void
  3986. */
  3987. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3988. union hal_reo_status *reo_status)
  3989. {
  3990. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3991. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3992. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3993. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3994. queue_status->header.status);
  3995. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3996. return;
  3997. }
  3998. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3999. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4000. }
  4001. /**
  4002. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4003. * @vdev: DP VDEV handle
  4004. *
  4005. * return: void
  4006. */
  4007. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4008. {
  4009. struct dp_peer *peer = NULL;
  4010. struct dp_soc *soc = vdev->pdev->soc;
  4011. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4012. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4013. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4014. DP_UPDATE_STATS(vdev, peer);
  4015. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4016. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4017. &vdev->stats, (uint16_t) vdev->vdev_id,
  4018. UPDATE_VDEV_STATS);
  4019. }
  4020. /**
  4021. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4022. * @pdev: DP PDEV handle
  4023. *
  4024. * return: void
  4025. */
  4026. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4027. {
  4028. struct dp_vdev *vdev = NULL;
  4029. struct dp_soc *soc = pdev->soc;
  4030. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4031. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4032. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4033. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4034. dp_aggregate_vdev_stats(vdev);
  4035. DP_UPDATE_STATS(pdev, vdev);
  4036. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4037. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4038. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4039. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4040. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4041. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4042. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4043. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4044. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4045. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4046. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4047. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4048. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4049. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4050. DP_STATS_AGGR(pdev, vdev,
  4051. tx_i.mcast_en.dropped_map_error);
  4052. DP_STATS_AGGR(pdev, vdev,
  4053. tx_i.mcast_en.dropped_self_mac);
  4054. DP_STATS_AGGR(pdev, vdev,
  4055. tx_i.mcast_en.dropped_send_fail);
  4056. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4057. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4058. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4059. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4060. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4061. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4062. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4063. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4064. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4065. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4066. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4067. pdev->stats.tx_i.dropped.dma_error +
  4068. pdev->stats.tx_i.dropped.ring_full +
  4069. pdev->stats.tx_i.dropped.enqueue_fail +
  4070. pdev->stats.tx_i.dropped.desc_na +
  4071. pdev->stats.tx_i.dropped.res_full;
  4072. pdev->stats.tx.last_ack_rssi =
  4073. vdev->stats.tx.last_ack_rssi;
  4074. pdev->stats.tx_i.tso.num_seg =
  4075. vdev->stats.tx_i.tso.num_seg;
  4076. }
  4077. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4078. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  4079. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4080. }
  4081. /**
  4082. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4083. * @pdev: DP_PDEV Handle
  4084. *
  4085. * Return:void
  4086. */
  4087. static inline void
  4088. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4089. {
  4090. uint8_t index = 0;
  4091. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4092. DP_PRINT_STATS("Received From Stack:");
  4093. DP_PRINT_STATS(" Packets = %d",
  4094. pdev->stats.tx_i.rcvd.num);
  4095. DP_PRINT_STATS(" Bytes = %llu",
  4096. pdev->stats.tx_i.rcvd.bytes);
  4097. DP_PRINT_STATS("Processed:");
  4098. DP_PRINT_STATS(" Packets = %d",
  4099. pdev->stats.tx_i.processed.num);
  4100. DP_PRINT_STATS(" Bytes = %llu",
  4101. pdev->stats.tx_i.processed.bytes);
  4102. DP_PRINT_STATS("Total Completions:");
  4103. DP_PRINT_STATS(" Packets = %u",
  4104. pdev->stats.tx.comp_pkt.num);
  4105. DP_PRINT_STATS(" Bytes = %llu",
  4106. pdev->stats.tx.comp_pkt.bytes);
  4107. DP_PRINT_STATS("Successful Completions:");
  4108. DP_PRINT_STATS(" Packets = %u",
  4109. pdev->stats.tx.tx_success.num);
  4110. DP_PRINT_STATS(" Bytes = %llu",
  4111. pdev->stats.tx.tx_success.bytes);
  4112. DP_PRINT_STATS("Dropped:");
  4113. DP_PRINT_STATS(" Total = %d",
  4114. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4115. DP_PRINT_STATS(" Dma_map_error = %d",
  4116. pdev->stats.tx_i.dropped.dma_error);
  4117. DP_PRINT_STATS(" Ring Full = %d",
  4118. pdev->stats.tx_i.dropped.ring_full);
  4119. DP_PRINT_STATS(" Descriptor Not available = %d",
  4120. pdev->stats.tx_i.dropped.desc_na);
  4121. DP_PRINT_STATS(" HW enqueue failed= %d",
  4122. pdev->stats.tx_i.dropped.enqueue_fail);
  4123. DP_PRINT_STATS(" Resources Full = %d",
  4124. pdev->stats.tx_i.dropped.res_full);
  4125. DP_PRINT_STATS(" FW removed = %d",
  4126. pdev->stats.tx.dropped.fw_rem);
  4127. DP_PRINT_STATS(" FW removed transmitted = %d",
  4128. pdev->stats.tx.dropped.fw_rem_tx);
  4129. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4130. pdev->stats.tx.dropped.fw_rem_notx);
  4131. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4132. pdev->stats.tx.dropped.fw_reason1);
  4133. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4134. pdev->stats.tx.dropped.fw_reason2);
  4135. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4136. pdev->stats.tx.dropped.fw_reason3);
  4137. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4138. pdev->stats.tx.dropped.age_out);
  4139. DP_PRINT_STATS("Scatter Gather:");
  4140. DP_PRINT_STATS(" Packets = %d",
  4141. pdev->stats.tx_i.sg.sg_pkt.num);
  4142. DP_PRINT_STATS(" Bytes = %llu",
  4143. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4144. DP_PRINT_STATS(" Dropped By Host = %d",
  4145. pdev->stats.tx_i.sg.dropped_host);
  4146. DP_PRINT_STATS(" Dropped By Target = %d",
  4147. pdev->stats.tx_i.sg.dropped_target);
  4148. DP_PRINT_STATS("TSO:");
  4149. DP_PRINT_STATS(" Number of Segments = %d",
  4150. pdev->stats.tx_i.tso.num_seg);
  4151. DP_PRINT_STATS(" Packets = %d",
  4152. pdev->stats.tx_i.tso.tso_pkt.num);
  4153. DP_PRINT_STATS(" Bytes = %llu",
  4154. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4155. DP_PRINT_STATS(" Dropped By Host = %d",
  4156. pdev->stats.tx_i.tso.dropped_host);
  4157. DP_PRINT_STATS("Mcast Enhancement:");
  4158. DP_PRINT_STATS(" Packets = %d",
  4159. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4160. DP_PRINT_STATS(" Bytes = %llu",
  4161. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4162. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4163. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4164. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4165. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4166. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4167. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4168. DP_PRINT_STATS(" Unicast sent = %d",
  4169. pdev->stats.tx_i.mcast_en.ucast);
  4170. DP_PRINT_STATS("Raw:");
  4171. DP_PRINT_STATS(" Packets = %d",
  4172. pdev->stats.tx_i.raw.raw_pkt.num);
  4173. DP_PRINT_STATS(" Bytes = %llu",
  4174. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4175. DP_PRINT_STATS(" DMA map error = %d",
  4176. pdev->stats.tx_i.raw.dma_map_error);
  4177. DP_PRINT_STATS("Reinjected:");
  4178. DP_PRINT_STATS(" Packets = %d",
  4179. pdev->stats.tx_i.reinject_pkts.num);
  4180. DP_PRINT_STATS("Bytes = %llu\n",
  4181. pdev->stats.tx_i.reinject_pkts.bytes);
  4182. DP_PRINT_STATS("Inspected:");
  4183. DP_PRINT_STATS(" Packets = %d",
  4184. pdev->stats.tx_i.inspect_pkts.num);
  4185. DP_PRINT_STATS(" Bytes = %llu",
  4186. pdev->stats.tx_i.inspect_pkts.bytes);
  4187. DP_PRINT_STATS("Nawds Multicast:");
  4188. DP_PRINT_STATS(" Packets = %d",
  4189. pdev->stats.tx_i.nawds_mcast.num);
  4190. DP_PRINT_STATS(" Bytes = %llu",
  4191. pdev->stats.tx_i.nawds_mcast.bytes);
  4192. DP_PRINT_STATS("CCE Classified:");
  4193. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4194. pdev->stats.tx_i.cce_classified);
  4195. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4196. pdev->stats.tx_i.cce_classified_raw);
  4197. DP_PRINT_STATS("Mesh stats:");
  4198. DP_PRINT_STATS(" frames to firmware: %u",
  4199. pdev->stats.tx_i.mesh.exception_fw);
  4200. DP_PRINT_STATS(" completions from fw: %u",
  4201. pdev->stats.tx_i.mesh.completion_fw);
  4202. DP_PRINT_STATS("PPDU stats counter");
  4203. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4204. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4205. pdev->stats.ppdu_stats_counter[index]);
  4206. }
  4207. }
  4208. /**
  4209. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4210. * @pdev: DP_PDEV Handle
  4211. *
  4212. * Return: void
  4213. */
  4214. static inline void
  4215. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4216. {
  4217. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4218. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4219. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4220. pdev->stats.rx.rcvd_reo[0].num,
  4221. pdev->stats.rx.rcvd_reo[1].num,
  4222. pdev->stats.rx.rcvd_reo[2].num,
  4223. pdev->stats.rx.rcvd_reo[3].num);
  4224. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4225. pdev->stats.rx.rcvd_reo[0].bytes,
  4226. pdev->stats.rx.rcvd_reo[1].bytes,
  4227. pdev->stats.rx.rcvd_reo[2].bytes,
  4228. pdev->stats.rx.rcvd_reo[3].bytes);
  4229. DP_PRINT_STATS("Replenished:");
  4230. DP_PRINT_STATS(" Packets = %d",
  4231. pdev->stats.replenish.pkts.num);
  4232. DP_PRINT_STATS(" Bytes = %llu",
  4233. pdev->stats.replenish.pkts.bytes);
  4234. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4235. pdev->stats.buf_freelist);
  4236. DP_PRINT_STATS(" Low threshold intr = %d",
  4237. pdev->stats.replenish.low_thresh_intrs);
  4238. DP_PRINT_STATS("Dropped:");
  4239. DP_PRINT_STATS(" msdu_not_done = %d",
  4240. pdev->stats.dropped.msdu_not_done);
  4241. DP_PRINT_STATS(" mon_rx_drop = %d",
  4242. pdev->stats.dropped.mon_rx_drop);
  4243. DP_PRINT_STATS("Sent To Stack:");
  4244. DP_PRINT_STATS(" Packets = %d",
  4245. pdev->stats.rx.to_stack.num);
  4246. DP_PRINT_STATS(" Bytes = %llu",
  4247. pdev->stats.rx.to_stack.bytes);
  4248. DP_PRINT_STATS("Multicast/Broadcast:");
  4249. DP_PRINT_STATS(" Packets = %d",
  4250. pdev->stats.rx.multicast.num);
  4251. DP_PRINT_STATS(" Bytes = %llu",
  4252. pdev->stats.rx.multicast.bytes);
  4253. DP_PRINT_STATS("Errors:");
  4254. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4255. pdev->stats.replenish.rxdma_err);
  4256. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4257. pdev->stats.err.desc_alloc_fail);
  4258. /* Get bar_recv_cnt */
  4259. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4260. DP_PRINT_STATS("BAR Received Count: = %d",
  4261. pdev->stats.rx.bar_recv_cnt);
  4262. }
  4263. /**
  4264. * dp_print_soc_tx_stats(): Print SOC level stats
  4265. * @soc DP_SOC Handle
  4266. *
  4267. * Return: void
  4268. */
  4269. static inline void
  4270. dp_print_soc_tx_stats(struct dp_soc *soc)
  4271. {
  4272. DP_PRINT_STATS("SOC Tx Stats:\n");
  4273. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4274. soc->stats.tx.desc_in_use);
  4275. DP_PRINT_STATS("Invalid peer:");
  4276. DP_PRINT_STATS(" Packets = %d",
  4277. soc->stats.tx.tx_invalid_peer.num);
  4278. DP_PRINT_STATS(" Bytes = %llu",
  4279. soc->stats.tx.tx_invalid_peer.bytes);
  4280. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4281. soc->stats.tx.tcl_ring_full[0],
  4282. soc->stats.tx.tcl_ring_full[1],
  4283. soc->stats.tx.tcl_ring_full[2]);
  4284. }
  4285. /**
  4286. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4287. * @soc: DP_SOC Handle
  4288. *
  4289. * Return:void
  4290. */
  4291. static inline void
  4292. dp_print_soc_rx_stats(struct dp_soc *soc)
  4293. {
  4294. uint32_t i;
  4295. char reo_error[DP_REO_ERR_LENGTH];
  4296. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4297. uint8_t index = 0;
  4298. DP_PRINT_STATS("SOC Rx Stats:\n");
  4299. DP_PRINT_STATS("Errors:\n");
  4300. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4301. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4302. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4303. DP_PRINT_STATS("Invalid RBM = %d",
  4304. soc->stats.rx.err.invalid_rbm);
  4305. DP_PRINT_STATS("Invalid Vdev = %d",
  4306. soc->stats.rx.err.invalid_vdev);
  4307. DP_PRINT_STATS("Invalid Pdev = %d",
  4308. soc->stats.rx.err.invalid_pdev);
  4309. DP_PRINT_STATS("Invalid Peer = %d",
  4310. soc->stats.rx.err.rx_invalid_peer.num);
  4311. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4312. soc->stats.rx.err.hal_ring_access_fail);
  4313. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4314. index += qdf_snprint(&rxdma_error[index],
  4315. DP_RXDMA_ERR_LENGTH - index,
  4316. " %d", soc->stats.rx.err.rxdma_error[i]);
  4317. }
  4318. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4319. rxdma_error);
  4320. index = 0;
  4321. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4322. index += qdf_snprint(&reo_error[index],
  4323. DP_REO_ERR_LENGTH - index,
  4324. " %d", soc->stats.rx.err.reo_error[i]);
  4325. }
  4326. DP_PRINT_STATS("REO Error(0-14):%s",
  4327. reo_error);
  4328. }
  4329. /**
  4330. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4331. * @soc: DP_SOC handle
  4332. * @srng: DP_SRNG handle
  4333. * @ring_name: SRNG name
  4334. *
  4335. * Return: void
  4336. */
  4337. static inline void
  4338. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4339. char *ring_name)
  4340. {
  4341. uint32_t tailp;
  4342. uint32_t headp;
  4343. if (srng->hal_srng != NULL) {
  4344. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4345. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4346. ring_name, headp, tailp);
  4347. }
  4348. }
  4349. /**
  4350. * dp_print_ring_stats(): Print tail and head pointer
  4351. * @pdev: DP_PDEV handle
  4352. *
  4353. * Return:void
  4354. */
  4355. static inline void
  4356. dp_print_ring_stats(struct dp_pdev *pdev)
  4357. {
  4358. uint32_t i;
  4359. char ring_name[STR_MAXLEN + 1];
  4360. int mac_id;
  4361. dp_print_ring_stat_from_hal(pdev->soc,
  4362. &pdev->soc->reo_exception_ring,
  4363. "Reo Exception Ring");
  4364. dp_print_ring_stat_from_hal(pdev->soc,
  4365. &pdev->soc->reo_reinject_ring,
  4366. "Reo Inject Ring");
  4367. dp_print_ring_stat_from_hal(pdev->soc,
  4368. &pdev->soc->reo_cmd_ring,
  4369. "Reo Command Ring");
  4370. dp_print_ring_stat_from_hal(pdev->soc,
  4371. &pdev->soc->reo_status_ring,
  4372. "Reo Status Ring");
  4373. dp_print_ring_stat_from_hal(pdev->soc,
  4374. &pdev->soc->rx_rel_ring,
  4375. "Rx Release ring");
  4376. dp_print_ring_stat_from_hal(pdev->soc,
  4377. &pdev->soc->tcl_cmd_ring,
  4378. "Tcl command Ring");
  4379. dp_print_ring_stat_from_hal(pdev->soc,
  4380. &pdev->soc->tcl_status_ring,
  4381. "Tcl Status Ring");
  4382. dp_print_ring_stat_from_hal(pdev->soc,
  4383. &pdev->soc->wbm_desc_rel_ring,
  4384. "Wbm Desc Rel Ring");
  4385. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4386. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4387. dp_print_ring_stat_from_hal(pdev->soc,
  4388. &pdev->soc->reo_dest_ring[i],
  4389. ring_name);
  4390. }
  4391. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4392. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4393. dp_print_ring_stat_from_hal(pdev->soc,
  4394. &pdev->soc->tcl_data_ring[i],
  4395. ring_name);
  4396. }
  4397. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4398. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4399. dp_print_ring_stat_from_hal(pdev->soc,
  4400. &pdev->soc->tx_comp_ring[i],
  4401. ring_name);
  4402. }
  4403. dp_print_ring_stat_from_hal(pdev->soc,
  4404. &pdev->rx_refill_buf_ring,
  4405. "Rx Refill Buf Ring");
  4406. dp_print_ring_stat_from_hal(pdev->soc,
  4407. &pdev->rx_refill_buf_ring2,
  4408. "Second Rx Refill Buf Ring");
  4409. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4410. dp_print_ring_stat_from_hal(pdev->soc,
  4411. &pdev->rxdma_mon_buf_ring[mac_id],
  4412. "Rxdma Mon Buf Ring");
  4413. dp_print_ring_stat_from_hal(pdev->soc,
  4414. &pdev->rxdma_mon_dst_ring[mac_id],
  4415. "Rxdma Mon Dst Ring");
  4416. dp_print_ring_stat_from_hal(pdev->soc,
  4417. &pdev->rxdma_mon_status_ring[mac_id],
  4418. "Rxdma Mon Status Ring");
  4419. dp_print_ring_stat_from_hal(pdev->soc,
  4420. &pdev->rxdma_mon_desc_ring[mac_id],
  4421. "Rxdma mon desc Ring");
  4422. }
  4423. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4424. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4425. dp_print_ring_stat_from_hal(pdev->soc,
  4426. &pdev->rxdma_err_dst_ring[i],
  4427. ring_name);
  4428. }
  4429. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4430. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4431. dp_print_ring_stat_from_hal(pdev->soc,
  4432. &pdev->rx_mac_buf_ring[i],
  4433. ring_name);
  4434. }
  4435. }
  4436. /**
  4437. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4438. * @vdev: DP_VDEV handle
  4439. *
  4440. * Return:void
  4441. */
  4442. static inline void
  4443. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4444. {
  4445. struct dp_peer *peer = NULL;
  4446. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4447. DP_STATS_CLR(vdev->pdev);
  4448. DP_STATS_CLR(vdev->pdev->soc);
  4449. DP_STATS_CLR(vdev);
  4450. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4451. if (!peer)
  4452. return;
  4453. DP_STATS_CLR(peer);
  4454. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4455. soc->cdp_soc.ol_ops->update_dp_stats(
  4456. vdev->pdev->osif_pdev,
  4457. &peer->stats,
  4458. peer->peer_ids[0],
  4459. UPDATE_PEER_STATS);
  4460. }
  4461. }
  4462. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4463. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4464. &vdev->stats, (uint16_t)vdev->vdev_id,
  4465. UPDATE_VDEV_STATS);
  4466. }
  4467. /**
  4468. * dp_print_rx_rates(): Print Rx rate stats
  4469. * @vdev: DP_VDEV handle
  4470. *
  4471. * Return:void
  4472. */
  4473. static inline void
  4474. dp_print_rx_rates(struct dp_vdev *vdev)
  4475. {
  4476. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4477. uint8_t i, mcs, pkt_type;
  4478. uint8_t index = 0;
  4479. char nss[DP_NSS_LENGTH];
  4480. DP_PRINT_STATS("Rx Rate Info:\n");
  4481. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4482. index = 0;
  4483. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4484. if (!dp_rate_string[pkt_type][mcs].valid)
  4485. continue;
  4486. DP_PRINT_STATS(" %s = %d",
  4487. dp_rate_string[pkt_type][mcs].mcs_type,
  4488. pdev->stats.rx.pkt_type[pkt_type].
  4489. mcs_count[mcs]);
  4490. }
  4491. DP_PRINT_STATS("\n");
  4492. }
  4493. index = 0;
  4494. for (i = 0; i < SS_COUNT; i++) {
  4495. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4496. " %d", pdev->stats.rx.nss[i]);
  4497. }
  4498. DP_PRINT_STATS("NSS(1-8) = %s",
  4499. nss);
  4500. DP_PRINT_STATS("SGI ="
  4501. " 0.8us %d,"
  4502. " 0.4us %d,"
  4503. " 1.6us %d,"
  4504. " 3.2us %d,",
  4505. pdev->stats.rx.sgi_count[0],
  4506. pdev->stats.rx.sgi_count[1],
  4507. pdev->stats.rx.sgi_count[2],
  4508. pdev->stats.rx.sgi_count[3]);
  4509. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4510. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4511. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4512. DP_PRINT_STATS("Reception Type ="
  4513. " SU: %d,"
  4514. " MU_MIMO:%d,"
  4515. " MU_OFDMA:%d,"
  4516. " MU_OFDMA_MIMO:%d\n",
  4517. pdev->stats.rx.reception_type[0],
  4518. pdev->stats.rx.reception_type[1],
  4519. pdev->stats.rx.reception_type[2],
  4520. pdev->stats.rx.reception_type[3]);
  4521. DP_PRINT_STATS("Aggregation:\n");
  4522. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4523. pdev->stats.rx.ampdu_cnt);
  4524. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4525. pdev->stats.rx.non_ampdu_cnt);
  4526. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4527. pdev->stats.rx.amsdu_cnt);
  4528. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4529. pdev->stats.rx.non_amsdu_cnt);
  4530. }
  4531. /**
  4532. * dp_print_tx_rates(): Print tx rates
  4533. * @vdev: DP_VDEV handle
  4534. *
  4535. * Return:void
  4536. */
  4537. static inline void
  4538. dp_print_tx_rates(struct dp_vdev *vdev)
  4539. {
  4540. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4541. uint8_t mcs, pkt_type;
  4542. uint32_t index;
  4543. DP_PRINT_STATS("Tx Rate Info:\n");
  4544. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4545. index = 0;
  4546. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4547. if (!dp_rate_string[pkt_type][mcs].valid)
  4548. continue;
  4549. DP_PRINT_STATS(" %s = %d",
  4550. dp_rate_string[pkt_type][mcs].mcs_type,
  4551. pdev->stats.tx.pkt_type[pkt_type].
  4552. mcs_count[mcs]);
  4553. }
  4554. DP_PRINT_STATS("\n");
  4555. }
  4556. DP_PRINT_STATS("SGI ="
  4557. " 0.8us %d"
  4558. " 0.4us %d"
  4559. " 1.6us %d"
  4560. " 3.2us %d",
  4561. pdev->stats.tx.sgi_count[0],
  4562. pdev->stats.tx.sgi_count[1],
  4563. pdev->stats.tx.sgi_count[2],
  4564. pdev->stats.tx.sgi_count[3]);
  4565. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4566. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4567. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4568. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4569. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4570. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4571. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4572. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4573. DP_PRINT_STATS("Aggregation:\n");
  4574. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4575. pdev->stats.tx.amsdu_cnt);
  4576. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4577. pdev->stats.tx.non_amsdu_cnt);
  4578. }
  4579. /**
  4580. * dp_print_peer_stats():print peer stats
  4581. * @peer: DP_PEER handle
  4582. *
  4583. * return void
  4584. */
  4585. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4586. {
  4587. uint8_t i, mcs, pkt_type;
  4588. uint32_t index;
  4589. char nss[DP_NSS_LENGTH];
  4590. DP_PRINT_STATS("Node Tx Stats:\n");
  4591. DP_PRINT_STATS("Total Packet Completions = %d",
  4592. peer->stats.tx.comp_pkt.num);
  4593. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4594. peer->stats.tx.comp_pkt.bytes);
  4595. DP_PRINT_STATS("Success Packets = %d",
  4596. peer->stats.tx.tx_success.num);
  4597. DP_PRINT_STATS("Success Bytes = %llu",
  4598. peer->stats.tx.tx_success.bytes);
  4599. DP_PRINT_STATS("Unicast Success Packets = %d",
  4600. peer->stats.tx.ucast.num);
  4601. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4602. peer->stats.tx.ucast.bytes);
  4603. DP_PRINT_STATS("Multicast Success Packets = %d",
  4604. peer->stats.tx.mcast.num);
  4605. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4606. peer->stats.tx.mcast.bytes);
  4607. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4608. peer->stats.tx.bcast.num);
  4609. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4610. peer->stats.tx.bcast.bytes);
  4611. DP_PRINT_STATS("Packets Failed = %d",
  4612. peer->stats.tx.tx_failed);
  4613. DP_PRINT_STATS("Packets In OFDMA = %d",
  4614. peer->stats.tx.ofdma);
  4615. DP_PRINT_STATS("Packets In STBC = %d",
  4616. peer->stats.tx.stbc);
  4617. DP_PRINT_STATS("Packets In LDPC = %d",
  4618. peer->stats.tx.ldpc);
  4619. DP_PRINT_STATS("Packet Retries = %d",
  4620. peer->stats.tx.retries);
  4621. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4622. peer->stats.tx.amsdu_cnt);
  4623. DP_PRINT_STATS("Last Packet RSSI = %d",
  4624. peer->stats.tx.last_ack_rssi);
  4625. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4626. peer->stats.tx.dropped.fw_rem);
  4627. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4628. peer->stats.tx.dropped.fw_rem_tx);
  4629. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4630. peer->stats.tx.dropped.fw_rem_notx);
  4631. DP_PRINT_STATS("Dropped : Age Out = %d",
  4632. peer->stats.tx.dropped.age_out);
  4633. DP_PRINT_STATS("NAWDS : ");
  4634. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4635. peer->stats.tx.nawds_mcast_drop);
  4636. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4637. peer->stats.tx.nawds_mcast.num);
  4638. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4639. peer->stats.tx.nawds_mcast.bytes);
  4640. DP_PRINT_STATS("Rate Info:");
  4641. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4642. index = 0;
  4643. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4644. if (!dp_rate_string[pkt_type][mcs].valid)
  4645. continue;
  4646. DP_PRINT_STATS(" %s = %d",
  4647. dp_rate_string[pkt_type][mcs].mcs_type,
  4648. peer->stats.tx.pkt_type[pkt_type].
  4649. mcs_count[mcs]);
  4650. }
  4651. DP_PRINT_STATS("\n");
  4652. }
  4653. DP_PRINT_STATS("SGI = "
  4654. " 0.8us %d"
  4655. " 0.4us %d"
  4656. " 1.6us %d"
  4657. " 3.2us %d",
  4658. peer->stats.tx.sgi_count[0],
  4659. peer->stats.tx.sgi_count[1],
  4660. peer->stats.tx.sgi_count[2],
  4661. peer->stats.tx.sgi_count[3]);
  4662. DP_PRINT_STATS("Excess Retries per AC ");
  4663. DP_PRINT_STATS(" Best effort = %d",
  4664. peer->stats.tx.excess_retries_per_ac[0]);
  4665. DP_PRINT_STATS(" Background= %d",
  4666. peer->stats.tx.excess_retries_per_ac[1]);
  4667. DP_PRINT_STATS(" Video = %d",
  4668. peer->stats.tx.excess_retries_per_ac[2]);
  4669. DP_PRINT_STATS(" Voice = %d",
  4670. peer->stats.tx.excess_retries_per_ac[3]);
  4671. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4672. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4673. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4674. index = 0;
  4675. for (i = 0; i < SS_COUNT; i++) {
  4676. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4677. " %d", peer->stats.tx.nss[i]);
  4678. }
  4679. DP_PRINT_STATS("NSS(1-8) = %s",
  4680. nss);
  4681. DP_PRINT_STATS("Aggregation:");
  4682. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4683. peer->stats.tx.amsdu_cnt);
  4684. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4685. peer->stats.tx.non_amsdu_cnt);
  4686. DP_PRINT_STATS("Node Rx Stats:");
  4687. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4688. peer->stats.rx.to_stack.num);
  4689. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4690. peer->stats.rx.to_stack.bytes);
  4691. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4692. DP_PRINT_STATS("Ring Id = %d", i);
  4693. DP_PRINT_STATS(" Packets Received = %d",
  4694. peer->stats.rx.rcvd_reo[i].num);
  4695. DP_PRINT_STATS(" Bytes Received = %llu",
  4696. peer->stats.rx.rcvd_reo[i].bytes);
  4697. }
  4698. DP_PRINT_STATS("Multicast Packets Received = %d",
  4699. peer->stats.rx.multicast.num);
  4700. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4701. peer->stats.rx.multicast.bytes);
  4702. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4703. peer->stats.rx.bcast.num);
  4704. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4705. peer->stats.rx.bcast.bytes);
  4706. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4707. peer->stats.rx.intra_bss.pkts.num);
  4708. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4709. peer->stats.rx.intra_bss.pkts.bytes);
  4710. DP_PRINT_STATS("Raw Packets Received = %d",
  4711. peer->stats.rx.raw.num);
  4712. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4713. peer->stats.rx.raw.bytes);
  4714. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4715. peer->stats.rx.err.mic_err);
  4716. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4717. peer->stats.rx.err.decrypt_err);
  4718. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4719. peer->stats.rx.non_ampdu_cnt);
  4720. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4721. peer->stats.rx.ampdu_cnt);
  4722. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4723. peer->stats.rx.non_amsdu_cnt);
  4724. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4725. peer->stats.rx.amsdu_cnt);
  4726. DP_PRINT_STATS("NAWDS : ");
  4727. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4728. peer->stats.rx.nawds_mcast_drop.num);
  4729. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4730. peer->stats.rx.nawds_mcast_drop.bytes);
  4731. DP_PRINT_STATS("SGI ="
  4732. " 0.8us %d"
  4733. " 0.4us %d"
  4734. " 1.6us %d"
  4735. " 3.2us %d",
  4736. peer->stats.rx.sgi_count[0],
  4737. peer->stats.rx.sgi_count[1],
  4738. peer->stats.rx.sgi_count[2],
  4739. peer->stats.rx.sgi_count[3]);
  4740. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4741. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4742. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4743. DP_PRINT_STATS("Reception Type ="
  4744. " SU %d,"
  4745. " MU_MIMO %d,"
  4746. " MU_OFDMA %d,"
  4747. " MU_OFDMA_MIMO %d",
  4748. peer->stats.rx.reception_type[0],
  4749. peer->stats.rx.reception_type[1],
  4750. peer->stats.rx.reception_type[2],
  4751. peer->stats.rx.reception_type[3]);
  4752. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4753. index = 0;
  4754. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4755. if (!dp_rate_string[pkt_type][mcs].valid)
  4756. continue;
  4757. DP_PRINT_STATS(" %s = %d",
  4758. dp_rate_string[pkt_type][mcs].mcs_type,
  4759. peer->stats.rx.pkt_type[pkt_type].
  4760. mcs_count[mcs]);
  4761. }
  4762. DP_PRINT_STATS("\n");
  4763. }
  4764. index = 0;
  4765. for (i = 0; i < SS_COUNT; i++) {
  4766. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4767. " %d", peer->stats.rx.nss[i]);
  4768. }
  4769. DP_PRINT_STATS("NSS(1-8) = %s",
  4770. nss);
  4771. DP_PRINT_STATS("Aggregation:");
  4772. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4773. peer->stats.rx.ampdu_cnt);
  4774. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4775. peer->stats.rx.non_ampdu_cnt);
  4776. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4777. peer->stats.rx.amsdu_cnt);
  4778. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4779. peer->stats.rx.non_amsdu_cnt);
  4780. }
  4781. /**
  4782. * dp_print_host_stats()- Function to print the stats aggregated at host
  4783. * @vdev_handle: DP_VDEV handle
  4784. * @type: host stats type
  4785. *
  4786. * Available Stat types
  4787. * TXRX_CLEAR_STATS : Clear the stats
  4788. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4789. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4790. * TXRX_TX_HOST_STATS: Print Tx Stats
  4791. * TXRX_RX_HOST_STATS: Print Rx Stats
  4792. * TXRX_AST_STATS: Print AST Stats
  4793. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4794. *
  4795. * Return: 0 on success, print error message in case of failure
  4796. */
  4797. static int
  4798. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4799. {
  4800. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4801. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4802. dp_aggregate_pdev_stats(pdev);
  4803. switch (type) {
  4804. case TXRX_CLEAR_STATS:
  4805. dp_txrx_host_stats_clr(vdev);
  4806. break;
  4807. case TXRX_RX_RATE_STATS:
  4808. dp_print_rx_rates(vdev);
  4809. break;
  4810. case TXRX_TX_RATE_STATS:
  4811. dp_print_tx_rates(vdev);
  4812. break;
  4813. case TXRX_TX_HOST_STATS:
  4814. dp_print_pdev_tx_stats(pdev);
  4815. dp_print_soc_tx_stats(pdev->soc);
  4816. break;
  4817. case TXRX_RX_HOST_STATS:
  4818. dp_print_pdev_rx_stats(pdev);
  4819. dp_print_soc_rx_stats(pdev->soc);
  4820. break;
  4821. case TXRX_AST_STATS:
  4822. dp_print_ast_stats(pdev->soc);
  4823. break;
  4824. case TXRX_SRNG_PTR_STATS:
  4825. dp_print_ring_stats(pdev);
  4826. break;
  4827. default:
  4828. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4829. break;
  4830. }
  4831. return 0;
  4832. }
  4833. /*
  4834. * dp_get_host_peer_stats()- function to print peer stats
  4835. * @pdev_handle: DP_PDEV handle
  4836. * @mac_addr: mac address of the peer
  4837. *
  4838. * Return: void
  4839. */
  4840. static void
  4841. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4842. {
  4843. struct dp_peer *peer;
  4844. uint8_t local_id;
  4845. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4846. &local_id);
  4847. if (!peer) {
  4848. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4849. "%s: Invalid peer\n", __func__);
  4850. return;
  4851. }
  4852. dp_print_peer_stats(peer);
  4853. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4854. return;
  4855. }
  4856. /*
  4857. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4858. * @pdev: DP_PDEV handle
  4859. *
  4860. * Return: void
  4861. */
  4862. static void
  4863. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4864. {
  4865. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4866. int mac_id;
  4867. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4868. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4869. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4870. pdev->pdev_id);
  4871. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  4872. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4873. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4874. }
  4875. }
  4876. /*
  4877. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4878. * @pdev: DP_PDEV handle
  4879. *
  4880. * Return: void
  4881. */
  4882. static void
  4883. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4884. {
  4885. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4886. int mac_id;
  4887. htt_tlv_filter.mpdu_start = 0;
  4888. htt_tlv_filter.msdu_start = 0;
  4889. htt_tlv_filter.packet = 0;
  4890. htt_tlv_filter.msdu_end = 0;
  4891. htt_tlv_filter.mpdu_end = 0;
  4892. htt_tlv_filter.packet_header = 1;
  4893. htt_tlv_filter.attention = 1;
  4894. htt_tlv_filter.ppdu_start = 1;
  4895. htt_tlv_filter.ppdu_end = 1;
  4896. htt_tlv_filter.ppdu_end_user_stats = 1;
  4897. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4898. htt_tlv_filter.ppdu_end_status_done = 1;
  4899. htt_tlv_filter.enable_fp = 1;
  4900. htt_tlv_filter.enable_md = 0;
  4901. if (pdev->mcopy_mode)
  4902. htt_tlv_filter.enable_mo = 1;
  4903. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4904. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4905. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4906. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4907. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4908. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4909. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4910. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4911. pdev->pdev_id);
  4912. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  4913. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4914. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4915. }
  4916. }
  4917. /*
  4918. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4919. * @pdev_handle: DP_PDEV handle
  4920. * @val: user provided value
  4921. *
  4922. * Return: void
  4923. */
  4924. static void
  4925. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4926. {
  4927. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4928. switch (val) {
  4929. case 0:
  4930. pdev->tx_sniffer_enable = 0;
  4931. pdev->mcopy_mode = 0;
  4932. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  4933. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4934. dp_ppdu_ring_reset(pdev);
  4935. } else if (pdev->enhanced_stats_en) {
  4936. dp_h2t_cfg_stats_msg_send(pdev,
  4937. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4938. }
  4939. break;
  4940. case 1:
  4941. pdev->tx_sniffer_enable = 1;
  4942. pdev->mcopy_mode = 0;
  4943. if (!pdev->pktlog_ppdu_stats)
  4944. dp_h2t_cfg_stats_msg_send(pdev,
  4945. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4946. break;
  4947. case 2:
  4948. pdev->mcopy_mode = 1;
  4949. pdev->tx_sniffer_enable = 0;
  4950. if (!pdev->enhanced_stats_en)
  4951. dp_ppdu_ring_cfg(pdev);
  4952. if (!pdev->pktlog_ppdu_stats)
  4953. dp_h2t_cfg_stats_msg_send(pdev,
  4954. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4955. break;
  4956. default:
  4957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4958. "Invalid value\n");
  4959. break;
  4960. }
  4961. }
  4962. /*
  4963. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4964. * @pdev_handle: DP_PDEV handle
  4965. *
  4966. * Return: void
  4967. */
  4968. static void
  4969. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4970. {
  4971. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4972. pdev->enhanced_stats_en = 1;
  4973. if (!pdev->mcopy_mode)
  4974. dp_ppdu_ring_cfg(pdev);
  4975. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4976. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4977. }
  4978. /*
  4979. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4980. * @pdev_handle: DP_PDEV handle
  4981. *
  4982. * Return: void
  4983. */
  4984. static void
  4985. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4986. {
  4987. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4988. pdev->enhanced_stats_en = 0;
  4989. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4990. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4991. if (!pdev->mcopy_mode)
  4992. dp_ppdu_ring_reset(pdev);
  4993. }
  4994. /*
  4995. * dp_get_fw_peer_stats()- function to print peer stats
  4996. * @pdev_handle: DP_PDEV handle
  4997. * @mac_addr: mac address of the peer
  4998. * @cap: Type of htt stats requested
  4999. *
  5000. * Currently Supporting only MAC ID based requests Only
  5001. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5002. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5003. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5004. *
  5005. * Return: void
  5006. */
  5007. static void
  5008. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5009. uint32_t cap)
  5010. {
  5011. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5012. int i;
  5013. uint32_t config_param0 = 0;
  5014. uint32_t config_param1 = 0;
  5015. uint32_t config_param2 = 0;
  5016. uint32_t config_param3 = 0;
  5017. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5018. config_param0 |= (1 << (cap + 1));
  5019. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5020. config_param1 |= (1 << i);
  5021. }
  5022. config_param2 |= (mac_addr[0] & 0x000000ff);
  5023. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5024. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5025. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5026. config_param3 |= (mac_addr[4] & 0x000000ff);
  5027. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5028. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5029. config_param0, config_param1, config_param2,
  5030. config_param3, 0, 0, 0);
  5031. }
  5032. /* This struct definition will be removed from here
  5033. * once it get added in FW headers*/
  5034. struct httstats_cmd_req {
  5035. uint32_t config_param0;
  5036. uint32_t config_param1;
  5037. uint32_t config_param2;
  5038. uint32_t config_param3;
  5039. int cookie;
  5040. u_int8_t stats_id;
  5041. };
  5042. /*
  5043. * dp_get_htt_stats: function to process the httstas request
  5044. * @pdev_handle: DP pdev handle
  5045. * @data: pointer to request data
  5046. * @data_len: length for request data
  5047. *
  5048. * return: void
  5049. */
  5050. static void
  5051. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5052. {
  5053. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5054. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5055. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5056. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5057. req->config_param0, req->config_param1,
  5058. req->config_param2, req->config_param3,
  5059. req->cookie, 0, 0);
  5060. }
  5061. /*
  5062. * dp_set_pdev_param: function to set parameters in pdev
  5063. * @pdev_handle: DP pdev handle
  5064. * @param: parameter type to be set
  5065. * @val: value of parameter to be set
  5066. *
  5067. * return: void
  5068. */
  5069. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5070. enum cdp_pdev_param_type param, uint8_t val)
  5071. {
  5072. switch (param) {
  5073. case CDP_CONFIG_DEBUG_SNIFFER:
  5074. dp_config_debug_sniffer(pdev_handle, val);
  5075. break;
  5076. default:
  5077. break;
  5078. }
  5079. }
  5080. /*
  5081. * dp_set_vdev_param: function to set parameters in vdev
  5082. * @param: parameter type to be set
  5083. * @val: value of parameter to be set
  5084. *
  5085. * return: void
  5086. */
  5087. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5088. enum cdp_vdev_param_type param, uint32_t val)
  5089. {
  5090. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5091. switch (param) {
  5092. case CDP_ENABLE_WDS:
  5093. vdev->wds_enabled = val;
  5094. break;
  5095. case CDP_ENABLE_NAWDS:
  5096. vdev->nawds_enabled = val;
  5097. break;
  5098. case CDP_ENABLE_MCAST_EN:
  5099. vdev->mcast_enhancement_en = val;
  5100. break;
  5101. case CDP_ENABLE_PROXYSTA:
  5102. vdev->proxysta_vdev = val;
  5103. break;
  5104. case CDP_UPDATE_TDLS_FLAGS:
  5105. vdev->tdls_link_connected = val;
  5106. break;
  5107. case CDP_CFG_WDS_AGING_TIMER:
  5108. if (val == 0)
  5109. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5110. else if (val != vdev->wds_aging_timer_val)
  5111. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5112. vdev->wds_aging_timer_val = val;
  5113. break;
  5114. case CDP_ENABLE_AP_BRIDGE:
  5115. if (wlan_op_mode_sta != vdev->opmode)
  5116. vdev->ap_bridge_enabled = val;
  5117. else
  5118. vdev->ap_bridge_enabled = false;
  5119. break;
  5120. case CDP_ENABLE_CIPHER:
  5121. vdev->sec_type = val;
  5122. break;
  5123. case CDP_ENABLE_QWRAP_ISOLATION:
  5124. vdev->isolation_vdev = val;
  5125. break;
  5126. default:
  5127. break;
  5128. }
  5129. dp_tx_vdev_update_search_flags(vdev);
  5130. }
  5131. /**
  5132. * dp_peer_set_nawds: set nawds bit in peer
  5133. * @peer_handle: pointer to peer
  5134. * @value: enable/disable nawds
  5135. *
  5136. * return: void
  5137. */
  5138. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5139. {
  5140. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5141. peer->nawds_enabled = value;
  5142. }
  5143. /*
  5144. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5145. * @vdev_handle: DP_VDEV handle
  5146. * @map_id:ID of map that needs to be updated
  5147. *
  5148. * Return: void
  5149. */
  5150. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5151. uint8_t map_id)
  5152. {
  5153. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5154. vdev->dscp_tid_map_id = map_id;
  5155. return;
  5156. }
  5157. /*
  5158. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5159. * @pdev_handle: DP_PDEV handle
  5160. * @buf: to hold pdev_stats
  5161. *
  5162. * Return: int
  5163. */
  5164. static int
  5165. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5166. {
  5167. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5168. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5169. struct cdp_txrx_stats_req req = {0,};
  5170. dp_aggregate_pdev_stats(pdev);
  5171. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5172. req.cookie_val = 1;
  5173. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5174. req.param1, req.param2, req.param3, 0,
  5175. req.cookie_val, 0);
  5176. msleep(DP_MAX_SLEEP_TIME);
  5177. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5178. req.cookie_val = 1;
  5179. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5180. req.param1, req.param2, req.param3, 0,
  5181. req.cookie_val, 0);
  5182. msleep(DP_MAX_SLEEP_TIME);
  5183. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5184. return TXRX_STATS_LEVEL;
  5185. }
  5186. /**
  5187. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5188. * @pdev: DP_PDEV handle
  5189. * @map_id: ID of map that needs to be updated
  5190. * @tos: index value in map
  5191. * @tid: tid value passed by the user
  5192. *
  5193. * Return: void
  5194. */
  5195. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5196. uint8_t map_id, uint8_t tos, uint8_t tid)
  5197. {
  5198. uint8_t dscp;
  5199. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5200. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5201. pdev->dscp_tid_map[map_id][dscp] = tid;
  5202. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5203. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5204. map_id, dscp);
  5205. return;
  5206. }
  5207. /**
  5208. * dp_fw_stats_process(): Process TxRX FW stats request
  5209. * @vdev_handle: DP VDEV handle
  5210. * @req: stats request
  5211. *
  5212. * return: int
  5213. */
  5214. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5215. struct cdp_txrx_stats_req *req)
  5216. {
  5217. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5218. struct dp_pdev *pdev = NULL;
  5219. uint32_t stats = req->stats;
  5220. uint8_t channel = req->channel;
  5221. if (!vdev) {
  5222. DP_TRACE(NONE, "VDEV not found");
  5223. return 1;
  5224. }
  5225. pdev = vdev->pdev;
  5226. /*
  5227. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5228. * from param0 to param3 according to below rule:
  5229. *
  5230. * PARAM:
  5231. * - config_param0 : start_offset (stats type)
  5232. * - config_param1 : stats bmask from start offset
  5233. * - config_param2 : stats bmask from start offset + 32
  5234. * - config_param3 : stats bmask from start offset + 64
  5235. */
  5236. if (req->stats == CDP_TXRX_STATS_0) {
  5237. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5238. req->param1 = 0xFFFFFFFF;
  5239. req->param2 = 0xFFFFFFFF;
  5240. req->param3 = 0xFFFFFFFF;
  5241. }
  5242. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5243. req->param1, req->param2, req->param3,
  5244. 0, 0, channel);
  5245. }
  5246. /**
  5247. * dp_txrx_stats_request - function to map to firmware and host stats
  5248. * @vdev: virtual handle
  5249. * @req: stats request
  5250. *
  5251. * Return: integer
  5252. */
  5253. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5254. struct cdp_txrx_stats_req *req)
  5255. {
  5256. int host_stats;
  5257. int fw_stats;
  5258. enum cdp_stats stats;
  5259. if (!vdev || !req) {
  5260. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5261. "Invalid vdev/req instance");
  5262. return 0;
  5263. }
  5264. stats = req->stats;
  5265. if (stats >= CDP_TXRX_MAX_STATS)
  5266. return 0;
  5267. /*
  5268. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5269. * has to be updated if new FW HTT stats added
  5270. */
  5271. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5272. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5273. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5274. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5275. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5276. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5277. stats, fw_stats, host_stats);
  5278. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5279. /* update request with FW stats type */
  5280. req->stats = fw_stats;
  5281. return dp_fw_stats_process(vdev, req);
  5282. }
  5283. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5284. (host_stats <= TXRX_HOST_STATS_MAX))
  5285. return dp_print_host_stats(vdev, host_stats);
  5286. else
  5287. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5288. "Wrong Input for TxRx Stats");
  5289. return 0;
  5290. }
  5291. /*
  5292. * dp_print_napi_stats(): NAPI stats
  5293. * @soc - soc handle
  5294. */
  5295. static void dp_print_napi_stats(struct dp_soc *soc)
  5296. {
  5297. hif_print_napi_stats(soc->hif_handle);
  5298. }
  5299. /*
  5300. * dp_print_per_ring_stats(): Packet count per ring
  5301. * @soc - soc handle
  5302. */
  5303. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5304. {
  5305. uint8_t ring;
  5306. uint16_t core;
  5307. uint64_t total_packets;
  5308. DP_TRACE(FATAL, "Reo packets per ring:");
  5309. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5310. total_packets = 0;
  5311. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5312. for (core = 0; core < NR_CPUS; core++) {
  5313. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5314. core, soc->stats.rx.ring_packets[core][ring]);
  5315. total_packets += soc->stats.rx.ring_packets[core][ring];
  5316. }
  5317. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5318. ring, total_packets);
  5319. }
  5320. }
  5321. /*
  5322. * dp_txrx_path_stats() - Function to display dump stats
  5323. * @soc - soc handle
  5324. *
  5325. * return: none
  5326. */
  5327. static void dp_txrx_path_stats(struct dp_soc *soc)
  5328. {
  5329. uint8_t error_code;
  5330. uint8_t loop_pdev;
  5331. struct dp_pdev *pdev;
  5332. uint8_t i;
  5333. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5334. pdev = soc->pdev_list[loop_pdev];
  5335. dp_aggregate_pdev_stats(pdev);
  5336. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5337. "Tx path Statistics:");
  5338. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5339. pdev->stats.tx_i.rcvd.num,
  5340. pdev->stats.tx_i.rcvd.bytes);
  5341. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5342. pdev->stats.tx_i.processed.num,
  5343. pdev->stats.tx_i.processed.bytes);
  5344. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5345. pdev->stats.tx.tx_success.num,
  5346. pdev->stats.tx.tx_success.bytes);
  5347. DP_TRACE(FATAL, "Dropped in host:");
  5348. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5349. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5350. DP_TRACE(FATAL, "Descriptor not available: %u",
  5351. pdev->stats.tx_i.dropped.desc_na);
  5352. DP_TRACE(FATAL, "Ring full: %u",
  5353. pdev->stats.tx_i.dropped.ring_full);
  5354. DP_TRACE(FATAL, "Enqueue fail: %u",
  5355. pdev->stats.tx_i.dropped.enqueue_fail);
  5356. DP_TRACE(FATAL, "DMA Error: %u",
  5357. pdev->stats.tx_i.dropped.dma_error);
  5358. DP_TRACE(FATAL, "Dropped in hardware:");
  5359. DP_TRACE(FATAL, "total packets dropped: %u",
  5360. pdev->stats.tx.tx_failed);
  5361. DP_TRACE(FATAL, "mpdu age out: %u",
  5362. pdev->stats.tx.dropped.age_out);
  5363. DP_TRACE(FATAL, "firmware removed: %u",
  5364. pdev->stats.tx.dropped.fw_rem);
  5365. DP_TRACE(FATAL, "firmware removed tx: %u",
  5366. pdev->stats.tx.dropped.fw_rem_tx);
  5367. DP_TRACE(FATAL, "firmware removed notx %u",
  5368. pdev->stats.tx.dropped.fw_rem_notx);
  5369. DP_TRACE(FATAL, "peer_invalid: %u",
  5370. pdev->soc->stats.tx.tx_invalid_peer.num);
  5371. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5372. DP_TRACE(FATAL, "Single Packet: %u",
  5373. pdev->stats.tx_comp_histogram.pkts_1);
  5374. DP_TRACE(FATAL, "2-20 Packets: %u",
  5375. pdev->stats.tx_comp_histogram.pkts_2_20);
  5376. DP_TRACE(FATAL, "21-40 Packets: %u",
  5377. pdev->stats.tx_comp_histogram.pkts_21_40);
  5378. DP_TRACE(FATAL, "41-60 Packets: %u",
  5379. pdev->stats.tx_comp_histogram.pkts_41_60);
  5380. DP_TRACE(FATAL, "61-80 Packets: %u",
  5381. pdev->stats.tx_comp_histogram.pkts_61_80);
  5382. DP_TRACE(FATAL, "81-100 Packets: %u",
  5383. pdev->stats.tx_comp_histogram.pkts_81_100);
  5384. DP_TRACE(FATAL, "101-200 Packets: %u",
  5385. pdev->stats.tx_comp_histogram.pkts_101_200);
  5386. DP_TRACE(FATAL, " 201+ Packets: %u",
  5387. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5388. DP_TRACE(FATAL, "Rx path statistics");
  5389. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5390. pdev->stats.rx.to_stack.num,
  5391. pdev->stats.rx.to_stack.bytes);
  5392. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5393. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5394. i, pdev->stats.rx.rcvd_reo[i].num,
  5395. pdev->stats.rx.rcvd_reo[i].bytes);
  5396. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5397. pdev->stats.rx.intra_bss.pkts.num,
  5398. pdev->stats.rx.intra_bss.pkts.bytes);
  5399. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5400. pdev->stats.rx.intra_bss.fail.num,
  5401. pdev->stats.rx.intra_bss.fail.bytes);
  5402. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5403. pdev->stats.rx.raw.num,
  5404. pdev->stats.rx.raw.bytes);
  5405. DP_TRACE(FATAL, "dropped: error %u msdus",
  5406. pdev->stats.rx.err.mic_err);
  5407. DP_TRACE(FATAL, "peer invalid %u",
  5408. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5409. DP_TRACE(FATAL, "Reo Statistics");
  5410. DP_TRACE(FATAL, "rbm error: %u msdus",
  5411. pdev->soc->stats.rx.err.invalid_rbm);
  5412. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5413. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5414. DP_TRACE(FATAL, "Reo errors");
  5415. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5416. error_code++) {
  5417. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5418. error_code,
  5419. pdev->soc->stats.rx.err.reo_error[error_code]);
  5420. }
  5421. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5422. error_code++) {
  5423. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5424. error_code,
  5425. pdev->soc->stats.rx.err
  5426. .rxdma_error[error_code]);
  5427. }
  5428. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5429. DP_TRACE(FATAL, "Single Packet: %u",
  5430. pdev->stats.rx_ind_histogram.pkts_1);
  5431. DP_TRACE(FATAL, "2-20 Packets: %u",
  5432. pdev->stats.rx_ind_histogram.pkts_2_20);
  5433. DP_TRACE(FATAL, "21-40 Packets: %u",
  5434. pdev->stats.rx_ind_histogram.pkts_21_40);
  5435. DP_TRACE(FATAL, "41-60 Packets: %u",
  5436. pdev->stats.rx_ind_histogram.pkts_41_60);
  5437. DP_TRACE(FATAL, "61-80 Packets: %u",
  5438. pdev->stats.rx_ind_histogram.pkts_61_80);
  5439. DP_TRACE(FATAL, "81-100 Packets: %u",
  5440. pdev->stats.rx_ind_histogram.pkts_81_100);
  5441. DP_TRACE(FATAL, "101-200 Packets: %u",
  5442. pdev->stats.rx_ind_histogram.pkts_101_200);
  5443. DP_TRACE(FATAL, " 201+ Packets: %u",
  5444. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5445. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5446. __func__,
  5447. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5448. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5449. pdev->soc->wlan_cfg_ctx->rx_hash,
  5450. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5451. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5452. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5453. __func__,
  5454. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5455. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5456. #endif
  5457. }
  5458. }
  5459. /*
  5460. * dp_txrx_dump_stats() - Dump statistics
  5461. * @value - Statistics option
  5462. */
  5463. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5464. enum qdf_stats_verbosity_level level)
  5465. {
  5466. struct dp_soc *soc =
  5467. (struct dp_soc *)psoc;
  5468. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5469. if (!soc) {
  5470. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5471. "%s: soc is NULL", __func__);
  5472. return QDF_STATUS_E_INVAL;
  5473. }
  5474. switch (value) {
  5475. case CDP_TXRX_PATH_STATS:
  5476. dp_txrx_path_stats(soc);
  5477. break;
  5478. case CDP_RX_RING_STATS:
  5479. dp_print_per_ring_stats(soc);
  5480. break;
  5481. case CDP_TXRX_TSO_STATS:
  5482. /* TODO: NOT IMPLEMENTED */
  5483. break;
  5484. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5485. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5486. break;
  5487. case CDP_DP_NAPI_STATS:
  5488. dp_print_napi_stats(soc);
  5489. break;
  5490. case CDP_TXRX_DESC_STATS:
  5491. /* TODO: NOT IMPLEMENTED */
  5492. break;
  5493. default:
  5494. status = QDF_STATUS_E_INVAL;
  5495. break;
  5496. }
  5497. return status;
  5498. }
  5499. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5500. /**
  5501. * dp_update_flow_control_parameters() - API to store datapath
  5502. * config parameters
  5503. * @soc: soc handle
  5504. * @cfg: ini parameter handle
  5505. *
  5506. * Return: void
  5507. */
  5508. static inline
  5509. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5510. struct cdp_config_params *params)
  5511. {
  5512. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5513. params->tx_flow_stop_queue_threshold;
  5514. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5515. params->tx_flow_start_queue_offset;
  5516. }
  5517. #else
  5518. static inline
  5519. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5520. struct cdp_config_params *params)
  5521. {
  5522. }
  5523. #endif
  5524. /**
  5525. * dp_update_config_parameters() - API to store datapath
  5526. * config parameters
  5527. * @soc: soc handle
  5528. * @cfg: ini parameter handle
  5529. *
  5530. * Return: status
  5531. */
  5532. static
  5533. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5534. struct cdp_config_params *params)
  5535. {
  5536. struct dp_soc *soc = (struct dp_soc *)psoc;
  5537. if (!(soc)) {
  5538. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5539. "%s: Invalid handle", __func__);
  5540. return QDF_STATUS_E_INVAL;
  5541. }
  5542. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5543. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5544. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5545. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5546. params->tcp_udp_checksumoffload;
  5547. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5548. dp_update_flow_control_parameters(soc, params);
  5549. return QDF_STATUS_SUCCESS;
  5550. }
  5551. /**
  5552. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5553. * config parameters
  5554. * @vdev_handle - datapath vdev handle
  5555. * @cfg: ini parameter handle
  5556. *
  5557. * Return: status
  5558. */
  5559. #ifdef WDS_VENDOR_EXTENSION
  5560. void
  5561. dp_txrx_set_wds_rx_policy(
  5562. struct cdp_vdev *vdev_handle,
  5563. u_int32_t val)
  5564. {
  5565. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5566. struct dp_peer *peer;
  5567. if (vdev->opmode == wlan_op_mode_ap) {
  5568. /* for ap, set it on bss_peer */
  5569. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5570. if (peer->bss_peer) {
  5571. peer->wds_ecm.wds_rx_filter = 1;
  5572. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5573. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5574. break;
  5575. }
  5576. }
  5577. } else if (vdev->opmode == wlan_op_mode_sta) {
  5578. peer = TAILQ_FIRST(&vdev->peer_list);
  5579. peer->wds_ecm.wds_rx_filter = 1;
  5580. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5581. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5582. }
  5583. }
  5584. /**
  5585. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5586. *
  5587. * @peer_handle - datapath peer handle
  5588. * @wds_tx_ucast: policy for unicast transmission
  5589. * @wds_tx_mcast: policy for multicast transmission
  5590. *
  5591. * Return: void
  5592. */
  5593. void
  5594. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5595. int wds_tx_ucast, int wds_tx_mcast)
  5596. {
  5597. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5598. if (wds_tx_ucast || wds_tx_mcast) {
  5599. peer->wds_enabled = 1;
  5600. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5601. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5602. } else {
  5603. peer->wds_enabled = 0;
  5604. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5605. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5606. }
  5607. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5608. FL("Policy Update set to :\
  5609. peer->wds_enabled %d\
  5610. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5611. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5612. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5613. peer->wds_ecm.wds_tx_mcast_4addr);
  5614. return;
  5615. }
  5616. #endif
  5617. static struct cdp_wds_ops dp_ops_wds = {
  5618. .vdev_set_wds = dp_vdev_set_wds,
  5619. #ifdef WDS_VENDOR_EXTENSION
  5620. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5621. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5622. #endif
  5623. };
  5624. /*
  5625. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5626. * @soc - datapath soc handle
  5627. * @peer - datapath peer handle
  5628. *
  5629. * Delete the AST entries belonging to a peer
  5630. */
  5631. #ifdef FEATURE_AST
  5632. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5633. struct dp_peer *peer)
  5634. {
  5635. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5636. qdf_spin_lock_bh(&soc->ast_lock);
  5637. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5638. dp_peer_del_ast(soc, ast_entry);
  5639. qdf_spin_unlock_bh(&soc->ast_lock);
  5640. }
  5641. #else
  5642. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5643. struct dp_peer *peer)
  5644. {
  5645. }
  5646. #endif
  5647. /*
  5648. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5649. * @vdev_handle - datapath vdev handle
  5650. * @callback - callback function
  5651. * @ctxt: callback context
  5652. *
  5653. */
  5654. static void
  5655. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5656. ol_txrx_data_tx_cb callback, void *ctxt)
  5657. {
  5658. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5659. vdev->tx_non_std_data_callback.func = callback;
  5660. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5661. }
  5662. /**
  5663. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5664. * @pdev_hdl: datapath pdev handle
  5665. *
  5666. * Return: opaque pointer to dp txrx handle
  5667. */
  5668. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5669. {
  5670. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5671. return pdev->dp_txrx_handle;
  5672. }
  5673. /**
  5674. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5675. * @pdev_hdl: datapath pdev handle
  5676. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5677. *
  5678. * Return: void
  5679. */
  5680. static void
  5681. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5682. {
  5683. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5684. pdev->dp_txrx_handle = dp_txrx_hdl;
  5685. }
  5686. /**
  5687. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  5688. * @soc_handle: datapath soc handle
  5689. *
  5690. * Return: opaque pointer to external dp (non-core DP)
  5691. */
  5692. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  5693. {
  5694. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5695. return soc->external_txrx_handle;
  5696. }
  5697. /**
  5698. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  5699. * @soc_handle: datapath soc handle
  5700. * @txrx_handle: opaque pointer to external dp (non-core DP)
  5701. *
  5702. * Return: void
  5703. */
  5704. static void
  5705. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  5706. {
  5707. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5708. soc->external_txrx_handle = txrx_handle;
  5709. }
  5710. #ifdef FEATURE_AST
  5711. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5712. {
  5713. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5714. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5715. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5716. peer->delete_in_progress = true;
  5717. dp_peer_delete_ast_entries(soc, peer);
  5718. }
  5719. #endif
  5720. #ifdef ATH_SUPPORT_NAC_RSSI
  5721. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  5722. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  5723. uint8_t chan_num)
  5724. {
  5725. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5726. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5727. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5728. pdev->nac_rssi_filtering = 1;
  5729. /* Store address of NAC (neighbour peer) which will be checked
  5730. * against TA of received packets.
  5731. */
  5732. if (cmd == CDP_NAC_PARAM_ADD) {
  5733. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  5734. client_macaddr, DP_MAC_ADDR_LEN);
  5735. vdev->cdp_nac_rssi_enabled = 1;
  5736. } else if (cmd == CDP_NAC_PARAM_DEL) {
  5737. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  5738. client_macaddr, DP_MAC_ADDR_LEN)) {
  5739. /* delete this peer from the list */
  5740. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  5741. DP_MAC_ADDR_LEN);
  5742. }
  5743. vdev->cdp_nac_rssi_enabled = 0;
  5744. }
  5745. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  5746. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  5747. (vdev->pdev->osif_pdev, vdev->vdev_id, cmd, bssid);
  5748. return QDF_STATUS_SUCCESS;
  5749. }
  5750. #endif
  5751. static struct cdp_cmn_ops dp_ops_cmn = {
  5752. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5753. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5754. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5755. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5756. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5757. .txrx_peer_create = dp_peer_create_wifi3,
  5758. .txrx_peer_setup = dp_peer_setup_wifi3,
  5759. #ifdef FEATURE_AST
  5760. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5761. #else
  5762. .txrx_peer_teardown = NULL,
  5763. #endif
  5764. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  5765. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  5766. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  5767. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  5768. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  5769. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  5770. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  5771. .txrx_peer_delete = dp_peer_delete_wifi3,
  5772. .txrx_vdev_register = dp_vdev_register_wifi3,
  5773. .txrx_soc_detach = dp_soc_detach_wifi3,
  5774. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5775. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5776. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5777. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5778. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5779. .delba_process = dp_delba_process_wifi3,
  5780. .set_addba_response = dp_set_addba_response,
  5781. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5782. .flush_cache_rx_queue = NULL,
  5783. /* TODO: get API's for dscp-tid need to be added*/
  5784. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5785. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5786. .txrx_stats_request = dp_txrx_stats_request,
  5787. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5788. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  5789. .txrx_set_nac = dp_set_nac,
  5790. .txrx_get_tx_pending = dp_get_tx_pending,
  5791. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  5792. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  5793. .display_stats = dp_txrx_dump_stats,
  5794. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5795. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5796. #ifdef DP_INTR_POLL_BASED
  5797. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5798. #else
  5799. .txrx_intr_attach = dp_soc_interrupt_attach,
  5800. #endif
  5801. .txrx_intr_detach = dp_soc_interrupt_detach,
  5802. .set_pn_check = dp_set_pn_check_wifi3,
  5803. .update_config_parameters = dp_update_config_parameters,
  5804. /* TODO: Add other functions */
  5805. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5806. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5807. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5808. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  5809. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  5810. .tx_send = dp_tx_send,
  5811. };
  5812. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5813. .txrx_peer_authorize = dp_peer_authorize,
  5814. #ifdef QCA_SUPPORT_SON
  5815. .txrx_set_inact_params = dp_set_inact_params,
  5816. .txrx_start_inact_timer = dp_start_inact_timer,
  5817. .txrx_set_overload = dp_set_overload,
  5818. .txrx_peer_is_inact = dp_peer_is_inact,
  5819. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5820. #endif
  5821. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5822. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5823. #ifdef MESH_MODE_SUPPORT
  5824. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5825. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5826. #endif
  5827. .txrx_set_vdev_param = dp_set_vdev_param,
  5828. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5829. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5830. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5831. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5832. .txrx_update_filter_neighbour_peers =
  5833. dp_update_filter_neighbour_peers,
  5834. .txrx_get_sec_type = dp_get_sec_type,
  5835. /* TODO: Add other functions */
  5836. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5837. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5838. #ifdef WDI_EVENT_ENABLE
  5839. .txrx_get_pldev = dp_get_pldev,
  5840. #endif
  5841. .txrx_set_pdev_param = dp_set_pdev_param,
  5842. #ifdef ATH_SUPPORT_NAC_RSSI
  5843. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  5844. #endif
  5845. };
  5846. static struct cdp_me_ops dp_ops_me = {
  5847. #ifdef ATH_SUPPORT_IQUE
  5848. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5849. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5850. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5851. #endif
  5852. };
  5853. static struct cdp_mon_ops dp_ops_mon = {
  5854. .txrx_monitor_set_filter_ucast_data = NULL,
  5855. .txrx_monitor_set_filter_mcast_data = NULL,
  5856. .txrx_monitor_set_filter_non_data = NULL,
  5857. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  5858. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  5859. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  5860. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5861. /* Added support for HK advance filter */
  5862. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5863. };
  5864. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5865. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5866. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5867. .get_htt_stats = dp_get_htt_stats,
  5868. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5869. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5870. .txrx_stats_publish = dp_txrx_stats_publish,
  5871. /* TODO */
  5872. };
  5873. static struct cdp_raw_ops dp_ops_raw = {
  5874. /* TODO */
  5875. };
  5876. #ifdef CONFIG_WIN
  5877. static struct cdp_pflow_ops dp_ops_pflow = {
  5878. /* TODO */
  5879. };
  5880. #endif /* CONFIG_WIN */
  5881. #ifdef FEATURE_RUNTIME_PM
  5882. /**
  5883. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5884. * @opaque_pdev: DP pdev context
  5885. *
  5886. * DP is ready to runtime suspend if there are no pending TX packets.
  5887. *
  5888. * Return: QDF_STATUS
  5889. */
  5890. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5891. {
  5892. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5893. struct dp_soc *soc = pdev->soc;
  5894. /* Call DP TX flow control API to check if there is any
  5895. pending packets */
  5896. if (soc->intr_mode == DP_INTR_POLL)
  5897. qdf_timer_stop(&soc->int_timer);
  5898. return QDF_STATUS_SUCCESS;
  5899. }
  5900. /**
  5901. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5902. * @opaque_pdev: DP pdev context
  5903. *
  5904. * Resume DP for runtime PM.
  5905. *
  5906. * Return: QDF_STATUS
  5907. */
  5908. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5909. {
  5910. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5911. struct dp_soc *soc = pdev->soc;
  5912. void *hal_srng;
  5913. int i;
  5914. if (soc->intr_mode == DP_INTR_POLL)
  5915. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5916. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5917. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5918. if (hal_srng) {
  5919. /* We actually only need to acquire the lock */
  5920. hal_srng_access_start(soc->hal_soc, hal_srng);
  5921. /* Update SRC ring head pointer for HW to send
  5922. all pending packets */
  5923. hal_srng_access_end(soc->hal_soc, hal_srng);
  5924. }
  5925. }
  5926. return QDF_STATUS_SUCCESS;
  5927. }
  5928. #endif /* FEATURE_RUNTIME_PM */
  5929. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5930. {
  5931. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5932. struct dp_soc *soc = pdev->soc;
  5933. if (soc->intr_mode == DP_INTR_POLL)
  5934. qdf_timer_stop(&soc->int_timer);
  5935. return QDF_STATUS_SUCCESS;
  5936. }
  5937. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5938. {
  5939. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5940. struct dp_soc *soc = pdev->soc;
  5941. if (soc->intr_mode == DP_INTR_POLL)
  5942. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5943. return QDF_STATUS_SUCCESS;
  5944. }
  5945. #ifndef CONFIG_WIN
  5946. static struct cdp_misc_ops dp_ops_misc = {
  5947. .tx_non_std = dp_tx_non_std,
  5948. .get_opmode = dp_get_opmode,
  5949. #ifdef FEATURE_RUNTIME_PM
  5950. .runtime_suspend = dp_runtime_suspend,
  5951. .runtime_resume = dp_runtime_resume,
  5952. #endif /* FEATURE_RUNTIME_PM */
  5953. .pkt_log_init = dp_pkt_log_init,
  5954. .pkt_log_con_service = dp_pkt_log_con_service,
  5955. };
  5956. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5957. /* WIFI 3.0 DP implement as required. */
  5958. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5959. .register_pause_cb = dp_txrx_register_pause_cb,
  5960. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5961. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5962. };
  5963. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5964. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5965. };
  5966. #ifdef IPA_OFFLOAD
  5967. static struct cdp_ipa_ops dp_ops_ipa = {
  5968. .ipa_get_resource = dp_ipa_get_resource,
  5969. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5970. .ipa_op_response = dp_ipa_op_response,
  5971. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5972. .ipa_get_stat = dp_ipa_get_stat,
  5973. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5974. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5975. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5976. .ipa_setup = dp_ipa_setup,
  5977. .ipa_cleanup = dp_ipa_cleanup,
  5978. .ipa_setup_iface = dp_ipa_setup_iface,
  5979. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5980. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5981. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5982. .ipa_set_perf_level = dp_ipa_set_perf_level
  5983. };
  5984. #endif
  5985. static struct cdp_bus_ops dp_ops_bus = {
  5986. .bus_suspend = dp_bus_suspend,
  5987. .bus_resume = dp_bus_resume
  5988. };
  5989. static struct cdp_ocb_ops dp_ops_ocb = {
  5990. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5991. };
  5992. static struct cdp_throttle_ops dp_ops_throttle = {
  5993. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5994. };
  5995. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5996. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5997. };
  5998. static struct cdp_cfg_ops dp_ops_cfg = {
  5999. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6000. };
  6001. /*
  6002. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6003. * @dev: physical device instance
  6004. * @peer_mac_addr: peer mac address
  6005. * @local_id: local id for the peer
  6006. * @debug_id: to track enum peer access
  6007. * Return: peer instance pointer
  6008. */
  6009. static inline void *
  6010. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6011. u8 *local_id,
  6012. enum peer_debug_id_type debug_id)
  6013. {
  6014. /*
  6015. * Currently this function does not implement the "get ref"
  6016. * functionality and is mapped to dp_find_peer_by_addr which does not
  6017. * increment the peer ref count. So the peer state is uncertain after
  6018. * calling this API. The functionality needs to be implemented.
  6019. * Accordingly the corresponding release_ref function is NULL.
  6020. */
  6021. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6022. }
  6023. static struct cdp_peer_ops dp_ops_peer = {
  6024. .register_peer = dp_register_peer,
  6025. .clear_peer = dp_clear_peer,
  6026. .find_peer_by_addr = dp_find_peer_by_addr,
  6027. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6028. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6029. .peer_release_ref = NULL,
  6030. .local_peer_id = dp_local_peer_id,
  6031. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6032. .peer_state_update = dp_peer_state_update,
  6033. .get_vdevid = dp_get_vdevid,
  6034. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6035. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6036. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6037. .get_peer_state = dp_get_peer_state,
  6038. .last_assoc_received = dp_get_last_assoc_received,
  6039. .last_disassoc_received = dp_get_last_disassoc_received,
  6040. .last_deauth_received = dp_get_last_deauth_received,
  6041. };
  6042. #endif
  6043. static struct cdp_ops dp_txrx_ops = {
  6044. .cmn_drv_ops = &dp_ops_cmn,
  6045. .ctrl_ops = &dp_ops_ctrl,
  6046. .me_ops = &dp_ops_me,
  6047. .mon_ops = &dp_ops_mon,
  6048. .host_stats_ops = &dp_ops_host_stats,
  6049. .wds_ops = &dp_ops_wds,
  6050. .raw_ops = &dp_ops_raw,
  6051. #ifdef CONFIG_WIN
  6052. .pflow_ops = &dp_ops_pflow,
  6053. #endif /* CONFIG_WIN */
  6054. #ifndef CONFIG_WIN
  6055. .misc_ops = &dp_ops_misc,
  6056. .cfg_ops = &dp_ops_cfg,
  6057. .flowctl_ops = &dp_ops_flowctl,
  6058. .l_flowctl_ops = &dp_ops_l_flowctl,
  6059. #ifdef IPA_OFFLOAD
  6060. .ipa_ops = &dp_ops_ipa,
  6061. #endif
  6062. .bus_ops = &dp_ops_bus,
  6063. .ocb_ops = &dp_ops_ocb,
  6064. .peer_ops = &dp_ops_peer,
  6065. .throttle_ops = &dp_ops_throttle,
  6066. .mob_stats_ops = &dp_ops_mob_stats,
  6067. #endif
  6068. };
  6069. /*
  6070. * dp_soc_set_txrx_ring_map()
  6071. * @dp_soc: DP handler for soc
  6072. *
  6073. * Return: Void
  6074. */
  6075. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6076. {
  6077. uint32_t i;
  6078. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6079. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6080. }
  6081. }
  6082. /*
  6083. * dp_soc_attach_wifi3() - Attach txrx SOC
  6084. * @ctrl_psoc: Opaque SOC handle from control plane
  6085. * @htc_handle: Opaque HTC handle
  6086. * @hif_handle: Opaque HIF handle
  6087. * @qdf_osdev: QDF device
  6088. *
  6089. * Return: DP SOC handle on success, NULL on failure
  6090. */
  6091. /*
  6092. * Local prototype added to temporarily address warning caused by
  6093. * -Wmissing-prototypes. A more correct solution, namely to expose
  6094. * a prototype in an appropriate header file, will come later.
  6095. */
  6096. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6097. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6098. struct ol_if_ops *ol_ops);
  6099. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6100. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6101. struct ol_if_ops *ol_ops)
  6102. {
  6103. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6104. if (!soc) {
  6105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6106. FL("DP SOC memory allocation failed"));
  6107. goto fail0;
  6108. }
  6109. soc->cdp_soc.ops = &dp_txrx_ops;
  6110. soc->cdp_soc.ol_ops = ol_ops;
  6111. soc->ctrl_psoc = ctrl_psoc;
  6112. soc->osdev = qdf_osdev;
  6113. soc->hif_handle = hif_handle;
  6114. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6115. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6116. soc->hal_soc, qdf_osdev);
  6117. if (!soc->htt_handle) {
  6118. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6119. FL("HTT attach failed"));
  6120. goto fail1;
  6121. }
  6122. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6123. if (!soc->wlan_cfg_ctx) {
  6124. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6125. FL("wlan_cfg_soc_attach failed"));
  6126. goto fail2;
  6127. }
  6128. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6129. soc->cce_disable = false;
  6130. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6131. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6132. CDP_CFG_MAX_PEER_ID);
  6133. if (ret != -EINVAL) {
  6134. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6135. }
  6136. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6137. CDP_CFG_CCE_DISABLE);
  6138. if (ret == 1)
  6139. soc->cce_disable = true;
  6140. }
  6141. qdf_spinlock_create(&soc->peer_ref_mutex);
  6142. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6143. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6144. /* fill the tx/rx cpu ring map*/
  6145. dp_soc_set_txrx_ring_map(soc);
  6146. qdf_spinlock_create(&soc->htt_stats.lock);
  6147. /* initialize work queue for stats processing */
  6148. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6149. /*Initialize inactivity timer for wifison */
  6150. dp_init_inact_timer(soc);
  6151. return (void *)soc;
  6152. fail2:
  6153. htt_soc_detach(soc->htt_handle);
  6154. fail1:
  6155. qdf_mem_free(soc);
  6156. fail0:
  6157. return NULL;
  6158. }
  6159. /*
  6160. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6161. *
  6162. * @soc: handle to DP soc
  6163. * @mac_id: MAC id
  6164. *
  6165. * Return: Return pdev corresponding to MAC
  6166. */
  6167. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6168. {
  6169. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6170. return soc->pdev_list[mac_id];
  6171. /* Typically for MCL as there only 1 PDEV*/
  6172. return soc->pdev_list[0];
  6173. }
  6174. /*
  6175. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6176. * @soc: DP SoC context
  6177. * @max_mac_rings: No of MAC rings
  6178. *
  6179. * Return: None
  6180. */
  6181. static
  6182. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6183. int *max_mac_rings)
  6184. {
  6185. bool dbs_enable = false;
  6186. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6187. dbs_enable = soc->cdp_soc.ol_ops->
  6188. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6189. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6190. }
  6191. /*
  6192. * dp_set_pktlog_wifi3() - attach txrx vdev
  6193. * @pdev: Datapath PDEV handle
  6194. * @event: which event's notifications are being subscribed to
  6195. * @enable: WDI event subscribe or not. (True or False)
  6196. *
  6197. * Return: Success, NULL on failure
  6198. */
  6199. #ifdef WDI_EVENT_ENABLE
  6200. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6201. bool enable)
  6202. {
  6203. struct dp_soc *soc = pdev->soc;
  6204. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6205. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6206. (pdev->wlan_cfg_ctx);
  6207. uint8_t mac_id = 0;
  6208. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6209. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6210. FL("Max_mac_rings %d \n"),
  6211. max_mac_rings);
  6212. if (enable) {
  6213. switch (event) {
  6214. case WDI_EVENT_RX_DESC:
  6215. if (pdev->monitor_vdev) {
  6216. /* Nothing needs to be done if monitor mode is
  6217. * enabled
  6218. */
  6219. return 0;
  6220. }
  6221. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6222. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6223. htt_tlv_filter.mpdu_start = 1;
  6224. htt_tlv_filter.msdu_start = 1;
  6225. htt_tlv_filter.msdu_end = 1;
  6226. htt_tlv_filter.mpdu_end = 1;
  6227. htt_tlv_filter.packet_header = 1;
  6228. htt_tlv_filter.attention = 1;
  6229. htt_tlv_filter.ppdu_start = 1;
  6230. htt_tlv_filter.ppdu_end = 1;
  6231. htt_tlv_filter.ppdu_end_user_stats = 1;
  6232. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6233. htt_tlv_filter.ppdu_end_status_done = 1;
  6234. htt_tlv_filter.enable_fp = 1;
  6235. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6236. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6237. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6238. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6239. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6240. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6241. for (mac_id = 0; mac_id < max_mac_rings;
  6242. mac_id++) {
  6243. int mac_for_pdev =
  6244. dp_get_mac_id_for_pdev(mac_id,
  6245. pdev->pdev_id);
  6246. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6247. mac_for_pdev,
  6248. pdev->rxdma_mon_status_ring[mac_id]
  6249. .hal_srng,
  6250. RXDMA_MONITOR_STATUS,
  6251. RX_BUFFER_SIZE,
  6252. &htt_tlv_filter);
  6253. }
  6254. if (soc->reap_timer_init)
  6255. qdf_timer_mod(&soc->mon_reap_timer,
  6256. DP_INTR_POLL_TIMER_MS);
  6257. }
  6258. break;
  6259. case WDI_EVENT_LITE_RX:
  6260. if (pdev->monitor_vdev) {
  6261. /* Nothing needs to be done if monitor mode is
  6262. * enabled
  6263. */
  6264. return 0;
  6265. }
  6266. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6267. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6268. htt_tlv_filter.ppdu_start = 1;
  6269. htt_tlv_filter.ppdu_end = 1;
  6270. htt_tlv_filter.ppdu_end_user_stats = 1;
  6271. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6272. htt_tlv_filter.ppdu_end_status_done = 1;
  6273. htt_tlv_filter.mpdu_start = 1;
  6274. htt_tlv_filter.enable_fp = 1;
  6275. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6276. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6277. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6278. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6279. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6280. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6281. for (mac_id = 0; mac_id < max_mac_rings;
  6282. mac_id++) {
  6283. int mac_for_pdev =
  6284. dp_get_mac_id_for_pdev(mac_id,
  6285. pdev->pdev_id);
  6286. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6287. mac_for_pdev,
  6288. pdev->rxdma_mon_status_ring[mac_id]
  6289. .hal_srng,
  6290. RXDMA_MONITOR_STATUS,
  6291. RX_BUFFER_SIZE_PKTLOG_LITE,
  6292. &htt_tlv_filter);
  6293. }
  6294. if (soc->reap_timer_init)
  6295. qdf_timer_mod(&soc->mon_reap_timer,
  6296. DP_INTR_POLL_TIMER_MS);
  6297. }
  6298. break;
  6299. case WDI_EVENT_LITE_T2H:
  6300. if (pdev->monitor_vdev) {
  6301. /* Nothing needs to be done if monitor mode is
  6302. * enabled
  6303. */
  6304. return 0;
  6305. }
  6306. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6307. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6308. mac_id, pdev->pdev_id);
  6309. pdev->pktlog_ppdu_stats = true;
  6310. dp_h2t_cfg_stats_msg_send(pdev,
  6311. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6312. mac_for_pdev);
  6313. }
  6314. break;
  6315. default:
  6316. /* Nothing needs to be done for other pktlog types */
  6317. break;
  6318. }
  6319. } else {
  6320. switch (event) {
  6321. case WDI_EVENT_RX_DESC:
  6322. case WDI_EVENT_LITE_RX:
  6323. if (pdev->monitor_vdev) {
  6324. /* Nothing needs to be done if monitor mode is
  6325. * enabled
  6326. */
  6327. return 0;
  6328. }
  6329. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6330. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6331. for (mac_id = 0; mac_id < max_mac_rings;
  6332. mac_id++) {
  6333. int mac_for_pdev =
  6334. dp_get_mac_id_for_pdev(mac_id,
  6335. pdev->pdev_id);
  6336. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6337. mac_for_pdev,
  6338. pdev->rxdma_mon_status_ring[mac_id]
  6339. .hal_srng,
  6340. RXDMA_MONITOR_STATUS,
  6341. RX_BUFFER_SIZE,
  6342. &htt_tlv_filter);
  6343. }
  6344. if (soc->reap_timer_init)
  6345. qdf_timer_stop(&soc->mon_reap_timer);
  6346. }
  6347. break;
  6348. case WDI_EVENT_LITE_T2H:
  6349. if (pdev->monitor_vdev) {
  6350. /* Nothing needs to be done if monitor mode is
  6351. * enabled
  6352. */
  6353. return 0;
  6354. }
  6355. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6356. * passing value 0. Once these macros will define in htt
  6357. * header file will use proper macros
  6358. */
  6359. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6360. int mac_for_pdev =
  6361. dp_get_mac_id_for_pdev(mac_id,
  6362. pdev->pdev_id);
  6363. pdev->pktlog_ppdu_stats = false;
  6364. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6365. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6366. mac_for_pdev);
  6367. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6368. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6369. mac_for_pdev);
  6370. } else if (pdev->enhanced_stats_en) {
  6371. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6372. mac_for_pdev);
  6373. }
  6374. }
  6375. break;
  6376. default:
  6377. /* Nothing needs to be done for other pktlog types */
  6378. break;
  6379. }
  6380. }
  6381. return 0;
  6382. }
  6383. #endif
  6384. #ifdef CONFIG_MCL
  6385. /*
  6386. * dp_service_mon_rings()- timer to reap monitor rings
  6387. * reqd as we are not getting ppdu end interrupts
  6388. * @arg: SoC Handle
  6389. *
  6390. * Return:
  6391. *
  6392. */
  6393. static void dp_service_mon_rings(void *arg)
  6394. {
  6395. struct dp_soc *soc = (struct dp_soc *) arg;
  6396. int ring = 0, work_done, mac_id;
  6397. struct dp_pdev *pdev = NULL;
  6398. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6399. pdev = soc->pdev_list[ring];
  6400. if (pdev == NULL)
  6401. continue;
  6402. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6403. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6404. pdev->pdev_id);
  6405. work_done = dp_mon_process(soc, mac_for_pdev,
  6406. QCA_NAPI_BUDGET);
  6407. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6408. FL("Reaped %d descs from Monitor rings"),
  6409. work_done);
  6410. }
  6411. }
  6412. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6413. }
  6414. #ifndef REMOVE_PKT_LOG
  6415. /**
  6416. * dp_pkt_log_init() - API to initialize packet log
  6417. * @ppdev: physical device handle
  6418. * @scn: HIF context
  6419. *
  6420. * Return: none
  6421. */
  6422. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6423. {
  6424. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6425. if (handle->pkt_log_init) {
  6426. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6427. "%s: Packet log not initialized", __func__);
  6428. return;
  6429. }
  6430. pktlog_sethandle(&handle->pl_dev, scn);
  6431. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6432. if (pktlogmod_init(scn)) {
  6433. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6434. "%s: pktlogmod_init failed", __func__);
  6435. handle->pkt_log_init = false;
  6436. } else {
  6437. handle->pkt_log_init = true;
  6438. }
  6439. }
  6440. /**
  6441. * dp_pkt_log_con_service() - connect packet log service
  6442. * @ppdev: physical device handle
  6443. * @scn: device context
  6444. *
  6445. * Return: none
  6446. */
  6447. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6448. {
  6449. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6450. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6451. pktlog_htc_attach();
  6452. }
  6453. /**
  6454. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6455. * @handle: Pdev handle
  6456. *
  6457. * Return: none
  6458. */
  6459. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6460. {
  6461. void *scn = (void *)handle->soc->hif_handle;
  6462. if (!scn) {
  6463. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6464. "%s: Invalid hif(scn) handle", __func__);
  6465. return;
  6466. }
  6467. pktlogmod_exit(scn);
  6468. handle->pkt_log_init = false;
  6469. }
  6470. #endif
  6471. #else
  6472. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6473. #endif