dp_rx_err.c 90 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "dp_internal.h"
  25. #include "hal_api.h"
  26. #include "qdf_trace.h"
  27. #include "qdf_nbuf.h"
  28. #include "dp_rx_defrag.h"
  29. #include "dp_ipa.h"
  30. #include "dp_internal.h"
  31. #ifdef WIFI_MONITOR_SUPPORT
  32. #include "dp_htt.h"
  33. #include <dp_mon.h>
  34. #endif
  35. #ifdef FEATURE_WDS
  36. #include "dp_txrx_wds.h"
  37. #endif
  38. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  39. #include "qdf_net_types.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  42. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #define dp_rx_err_info(params...) \
  44. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  45. #define dp_rx_err_info_rl(params...) \
  46. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  47. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  48. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  49. /* Max regular Rx packet routing error */
  50. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  51. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  52. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  53. #ifdef FEATURE_MEC
  54. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  55. struct dp_txrx_peer *txrx_peer,
  56. uint8_t *rx_tlv_hdr,
  57. qdf_nbuf_t nbuf)
  58. {
  59. struct dp_vdev *vdev = txrx_peer->vdev;
  60. struct dp_pdev *pdev = vdev->pdev;
  61. struct dp_mec_entry *mecentry = NULL;
  62. struct dp_ast_entry *ase = NULL;
  63. uint16_t sa_idx = 0;
  64. uint8_t *data;
  65. /*
  66. * Multicast Echo Check is required only if vdev is STA and
  67. * received pkt is a multicast/broadcast pkt. otherwise
  68. * skip the MEC check.
  69. */
  70. if (vdev->opmode != wlan_op_mode_sta)
  71. return false;
  72. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  73. return false;
  74. data = qdf_nbuf_data(nbuf);
  75. /*
  76. * if the received pkts src mac addr matches with vdev
  77. * mac address then drop the pkt as it is looped back
  78. */
  79. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  80. vdev->mac_addr.raw,
  81. QDF_MAC_ADDR_SIZE)))
  82. return true;
  83. /*
  84. * In case of qwrap isolation mode, donot drop loopback packets.
  85. * In isolation mode, all packets from the wired stations need to go
  86. * to rootap and loop back to reach the wireless stations and
  87. * vice-versa.
  88. */
  89. if (qdf_unlikely(vdev->isolation_vdev))
  90. return false;
  91. /*
  92. * if the received pkts src mac addr matches with the
  93. * wired PCs MAC addr which is behind the STA or with
  94. * wireless STAs MAC addr which are behind the Repeater,
  95. * then drop the pkt as it is looped back
  96. */
  97. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  98. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  99. if ((sa_idx < 0) ||
  100. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  101. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  102. "invalid sa_idx: %d", sa_idx);
  103. qdf_assert_always(0);
  104. }
  105. qdf_spin_lock_bh(&soc->ast_lock);
  106. ase = soc->ast_table[sa_idx];
  107. /*
  108. * this check was not needed since MEC is not dependent on AST,
  109. * but if we dont have this check SON has some issues in
  110. * dual backhaul scenario. in APS SON mode, client connected
  111. * to RE 2G and sends multicast packets. the RE sends it to CAP
  112. * over 5G backhaul. the CAP loopback it on 2G to RE.
  113. * On receiving in 2G STA vap, we assume that client has roamed
  114. * and kickout the client.
  115. */
  116. if (ase && (ase->peer_id != txrx_peer->peer_id)) {
  117. qdf_spin_unlock_bh(&soc->ast_lock);
  118. goto drop;
  119. }
  120. qdf_spin_unlock_bh(&soc->ast_lock);
  121. }
  122. qdf_spin_lock_bh(&soc->mec_lock);
  123. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  124. &data[QDF_MAC_ADDR_SIZE]);
  125. if (!mecentry) {
  126. qdf_spin_unlock_bh(&soc->mec_lock);
  127. return false;
  128. }
  129. qdf_spin_unlock_bh(&soc->mec_lock);
  130. drop:
  131. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  132. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  133. return true;
  134. }
  135. #endif
  136. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  137. void dp_rx_link_desc_refill_duplicate_check(
  138. struct dp_soc *soc,
  139. struct hal_buf_info *buf_info,
  140. hal_buff_addrinfo_t ring_buf_info)
  141. {
  142. struct hal_buf_info current_link_desc_buf_info = { 0 };
  143. /* do duplicate link desc address check */
  144. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  145. &current_link_desc_buf_info);
  146. /*
  147. * TODO - Check if the hal soc api call can be removed
  148. * since the cookie is just used for print.
  149. * buffer_addr_info is the first element of ring_desc
  150. */
  151. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  152. (uint32_t *)ring_buf_info,
  153. &current_link_desc_buf_info);
  154. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  155. buf_info->paddr)) {
  156. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  157. current_link_desc_buf_info.paddr,
  158. current_link_desc_buf_info.sw_cookie);
  159. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  160. }
  161. *buf_info = current_link_desc_buf_info;
  162. }
  163. QDF_STATUS
  164. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  165. hal_buff_addrinfo_t link_desc_addr,
  166. uint8_t bm_action)
  167. {
  168. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  169. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  170. hal_soc_handle_t hal_soc = soc->hal_soc;
  171. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  172. void *src_srng_desc;
  173. if (!wbm_rel_srng) {
  174. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  175. return status;
  176. }
  177. /* do duplicate link desc address check */
  178. dp_rx_link_desc_refill_duplicate_check(
  179. soc,
  180. &soc->last_op_info.wbm_rel_link_desc,
  181. link_desc_addr);
  182. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  183. /* TODO */
  184. /*
  185. * Need API to convert from hal_ring pointer to
  186. * Ring Type / Ring Id combo
  187. */
  188. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  189. soc, wbm_rel_srng);
  190. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  191. goto done;
  192. }
  193. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  194. if (qdf_likely(src_srng_desc)) {
  195. /* Return link descriptor through WBM ring (SW2WBM)*/
  196. hal_rx_msdu_link_desc_set(hal_soc,
  197. src_srng_desc, link_desc_addr, bm_action);
  198. status = QDF_STATUS_SUCCESS;
  199. } else {
  200. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  201. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  202. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  203. srng->ring_id,
  204. soc->stats.rx.err.hal_ring_access_full_fail);
  205. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  206. *srng->u.src_ring.hp_addr,
  207. srng->u.src_ring.reap_hp,
  208. *srng->u.src_ring.tp_addr,
  209. srng->u.src_ring.cached_tp);
  210. QDF_BUG(0);
  211. }
  212. done:
  213. hal_srng_access_end(hal_soc, wbm_rel_srng);
  214. return status;
  215. }
  216. qdf_export_symbol(dp_rx_link_desc_return_by_addr);
  217. QDF_STATUS
  218. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  219. uint8_t bm_action)
  220. {
  221. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  222. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  223. }
  224. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  225. /**
  226. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  227. *
  228. * @soc: core txrx main context
  229. * @ring_desc: opaque pointer to the REO error ring descriptor
  230. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  231. * @mac_id: mac ID
  232. * @quota: No. of units (packets) that can be serviced in one shot.
  233. *
  234. * This function is used to drop all MSDU in an MPDU
  235. *
  236. * Return: uint32_t: No. of elements processed
  237. */
  238. static uint32_t
  239. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  240. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  241. uint8_t *mac_id,
  242. uint32_t quota)
  243. {
  244. uint32_t rx_bufs_used = 0;
  245. void *link_desc_va;
  246. struct hal_buf_info buf_info;
  247. struct dp_pdev *pdev;
  248. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  249. int i;
  250. uint8_t *rx_tlv_hdr;
  251. uint32_t tid;
  252. struct rx_desc_pool *rx_desc_pool;
  253. struct dp_rx_desc *rx_desc;
  254. /* First field in REO Dst ring Desc is buffer_addr_info */
  255. void *buf_addr_info = ring_desc;
  256. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  257. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  258. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  259. /* buffer_addr_info is the first element of ring_desc */
  260. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  261. (uint32_t *)ring_desc,
  262. &buf_info);
  263. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  264. if (!link_desc_va) {
  265. dp_rx_err_debug("link desc va is null, soc %pk", soc);
  266. return rx_bufs_used;
  267. }
  268. more_msdu_link_desc:
  269. /* No UNMAP required -- this is "malloc_consistent" memory */
  270. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  271. &mpdu_desc_info->msdu_count);
  272. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  273. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  274. soc, msdu_list.sw_cookie[i]);
  275. qdf_assert_always(rx_desc);
  276. /* all buffers from a MSDU link link belong to same pdev */
  277. *mac_id = rx_desc->pool_id;
  278. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  279. if (!pdev) {
  280. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  281. soc, rx_desc->pool_id);
  282. return rx_bufs_used;
  283. }
  284. if (!dp_rx_desc_check_magic(rx_desc)) {
  285. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  286. soc, msdu_list.sw_cookie[i]);
  287. return rx_bufs_used;
  288. }
  289. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  290. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  291. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  292. rx_desc->unmapped = 1;
  293. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  294. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  295. rx_bufs_used++;
  296. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  297. rx_desc->rx_buf_start);
  298. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  299. soc, tid);
  300. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  301. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  302. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  303. dp_rx_err_send_pktlog(soc, pdev, mpdu_desc_info,
  304. rx_desc->nbuf,
  305. QDF_TX_RX_STATUS_DROP, true);
  306. /* Just free the buffers */
  307. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  308. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  309. &pdev->free_list_tail, rx_desc);
  310. }
  311. /*
  312. * If the msdu's are spread across multiple link-descriptors,
  313. * we cannot depend solely on the msdu_count(e.g., if msdu is
  314. * spread across multiple buffers).Hence, it is
  315. * necessary to check the next link_descriptor and release
  316. * all the msdu's that are part of it.
  317. */
  318. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  319. link_desc_va,
  320. &next_link_desc_addr_info);
  321. if (hal_rx_is_buf_addr_info_valid(
  322. &next_link_desc_addr_info)) {
  323. /* Clear the next link desc info for the current link_desc */
  324. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  325. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  326. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  327. hal_rx_buffer_addr_info_get_paddr(
  328. &next_link_desc_addr_info,
  329. &buf_info);
  330. /* buffer_addr_info is the first element of ring_desc */
  331. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  332. (uint32_t *)&next_link_desc_addr_info,
  333. &buf_info);
  334. cur_link_desc_addr_info = next_link_desc_addr_info;
  335. buf_addr_info = &cur_link_desc_addr_info;
  336. link_desc_va =
  337. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  338. goto more_msdu_link_desc;
  339. }
  340. quota--;
  341. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  342. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  343. return rx_bufs_used;
  344. }
  345. /**
  346. * dp_rx_pn_error_handle() - Handles PN check errors
  347. *
  348. * @soc: core txrx main context
  349. * @ring_desc: opaque pointer to the REO error ring descriptor
  350. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  351. * @mac_id: mac ID
  352. * @quota: No. of units (packets) that can be serviced in one shot.
  353. *
  354. * This function implements PN error handling
  355. * If the peer is configured to ignore the PN check errors
  356. * or if DP feels, that this frame is still OK, the frame can be
  357. * re-injected back to REO to use some of the other features
  358. * of REO e.g. duplicate detection/routing to other cores
  359. *
  360. * Return: uint32_t: No. of elements processed
  361. */
  362. static uint32_t
  363. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  364. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  365. uint8_t *mac_id,
  366. uint32_t quota)
  367. {
  368. uint16_t peer_id;
  369. uint32_t rx_bufs_used = 0;
  370. struct dp_txrx_peer *txrx_peer;
  371. bool peer_pn_policy = false;
  372. dp_txrx_ref_handle txrx_ref_handle = NULL;
  373. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  374. mpdu_desc_info->peer_meta_data);
  375. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  376. &txrx_ref_handle,
  377. DP_MOD_ID_RX_ERR);
  378. if (qdf_likely(txrx_peer)) {
  379. /*
  380. * TODO: Check for peer specific policies & set peer_pn_policy
  381. */
  382. dp_err_rl("discard rx due to PN error for peer %pK",
  383. txrx_peer);
  384. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  385. }
  386. dp_rx_err_err("%pK: Packet received with PN error", soc);
  387. /* No peer PN policy -- definitely drop */
  388. if (!peer_pn_policy)
  389. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  390. mpdu_desc_info,
  391. mac_id, quota);
  392. return rx_bufs_used;
  393. }
  394. #ifdef DP_RX_DELIVER_ALL_OOR_FRAMES
  395. /**
  396. * dp_rx_deliver_oor_frame() - deliver OOR frames to stack
  397. * @soc: Datapath soc handler
  398. * @txrx_peer: pointer to DP peer
  399. * @nbuf: pointer to the skb of RX frame
  400. * @frame_mask: the mask for special frame needed
  401. * @rx_tlv_hdr: start of rx tlv header
  402. *
  403. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  404. * single nbuf is expected.
  405. *
  406. * return: true - nbuf has been delivered to stack, false - not.
  407. */
  408. static bool
  409. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  410. struct dp_txrx_peer *txrx_peer,
  411. qdf_nbuf_t nbuf, uint32_t frame_mask,
  412. uint8_t *rx_tlv_hdr)
  413. {
  414. uint32_t l2_hdr_offset = 0;
  415. uint16_t msdu_len = 0;
  416. uint32_t skip_len;
  417. l2_hdr_offset =
  418. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  419. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  420. skip_len = l2_hdr_offset;
  421. } else {
  422. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  423. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  424. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  425. }
  426. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  427. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  428. qdf_nbuf_pull_head(nbuf, skip_len);
  429. qdf_nbuf_set_exc_frame(nbuf, 1);
  430. dp_info_rl("OOR frame, mpdu sn 0x%x",
  431. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  432. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer, nbuf, NULL);
  433. return true;
  434. }
  435. #else
  436. static bool
  437. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  438. struct dp_txrx_peer *txrx_peer,
  439. qdf_nbuf_t nbuf, uint32_t frame_mask,
  440. uint8_t *rx_tlv_hdr)
  441. {
  442. return dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  443. rx_tlv_hdr);
  444. }
  445. #endif
  446. /**
  447. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  448. *
  449. * @soc: core txrx main context
  450. * @nbuf: pointer to msdu skb
  451. * @peer_id: dp peer ID
  452. * @rx_tlv_hdr: start of rx tlv header
  453. *
  454. * This function process the msdu delivered from REO2TCL
  455. * ring with error type OOR
  456. *
  457. * Return: None
  458. */
  459. static void
  460. dp_rx_oor_handle(struct dp_soc *soc,
  461. qdf_nbuf_t nbuf,
  462. uint16_t peer_id,
  463. uint8_t *rx_tlv_hdr)
  464. {
  465. uint32_t frame_mask = wlan_cfg_get_special_frame_cfg(soc->wlan_cfg_ctx);
  466. struct dp_txrx_peer *txrx_peer = NULL;
  467. dp_txrx_ref_handle txrx_ref_handle = NULL;
  468. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  469. &txrx_ref_handle,
  470. DP_MOD_ID_RX_ERR);
  471. if (!txrx_peer) {
  472. dp_info_rl("peer not found");
  473. goto free_nbuf;
  474. }
  475. if (dp_rx_deliver_oor_frame(soc, txrx_peer, nbuf, frame_mask,
  476. rx_tlv_hdr)) {
  477. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  478. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  479. return;
  480. }
  481. free_nbuf:
  482. if (txrx_peer)
  483. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  484. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  485. dp_rx_nbuf_free(nbuf);
  486. }
  487. /**
  488. * dp_rx_err_nbuf_pn_check() - Check if the PN number of this current packet
  489. * is a monotonous increment of packet number
  490. * from the previous successfully re-ordered
  491. * frame.
  492. * @soc: Datapath SOC handle
  493. * @ring_desc: REO ring descriptor
  494. * @nbuf: Current packet
  495. *
  496. * Return: QDF_STATUS_SUCCESS, if the pn check passes, else QDF_STATUS_E_FAILURE
  497. */
  498. static inline QDF_STATUS
  499. dp_rx_err_nbuf_pn_check(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  500. qdf_nbuf_t nbuf)
  501. {
  502. uint64_t prev_pn, curr_pn[2];
  503. if (!hal_rx_encryption_info_valid(soc->hal_soc, qdf_nbuf_data(nbuf)))
  504. return QDF_STATUS_SUCCESS;
  505. hal_rx_reo_prev_pn_get(soc->hal_soc, ring_desc, &prev_pn);
  506. hal_rx_tlv_get_pn_num(soc->hal_soc, qdf_nbuf_data(nbuf), curr_pn);
  507. if (curr_pn[0] > prev_pn)
  508. return QDF_STATUS_SUCCESS;
  509. return QDF_STATUS_E_FAILURE;
  510. }
  511. #ifdef WLAN_SKIP_BAR_UPDATE
  512. static
  513. void dp_rx_err_handle_bar(struct dp_soc *soc,
  514. struct dp_peer *peer,
  515. qdf_nbuf_t nbuf)
  516. {
  517. dp_info_rl("BAR update to H.W is skipped");
  518. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  519. }
  520. #else
  521. static
  522. void dp_rx_err_handle_bar(struct dp_soc *soc,
  523. struct dp_peer *peer,
  524. qdf_nbuf_t nbuf)
  525. {
  526. uint8_t *rx_tlv_hdr;
  527. unsigned char type, subtype;
  528. uint16_t start_seq_num;
  529. uint32_t tid;
  530. QDF_STATUS status;
  531. struct ieee80211_frame_bar *bar;
  532. /*
  533. * 1. Is this a BAR frame. If not Discard it.
  534. * 2. If it is, get the peer id, tid, ssn
  535. * 2a Do a tid update
  536. */
  537. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  538. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  539. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  540. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  541. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  542. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  543. dp_err_rl("Not a BAR frame!");
  544. return;
  545. }
  546. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  547. qdf_assert_always(tid < DP_MAX_TIDS);
  548. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  549. dp_info_rl("tid %u window_size %u start_seq_num %u",
  550. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  551. status = dp_rx_tid_update_wifi3(peer, tid,
  552. peer->rx_tid[tid].ba_win_size,
  553. start_seq_num,
  554. true);
  555. if (status != QDF_STATUS_SUCCESS) {
  556. dp_err_rl("failed to handle bar frame update rx tid");
  557. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  558. } else {
  559. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  560. }
  561. }
  562. #endif
  563. /**
  564. * _dp_rx_bar_frame_handle(): Core of the BAR frame handling
  565. * @soc: Datapath SoC handle
  566. * @nbuf: packet being processed
  567. * @mpdu_desc_info: mpdu desc info for the current packet
  568. * @tid: tid on which the packet arrived
  569. * @err_status: Flag to indicate if REO encountered an error while routing this
  570. * frame
  571. * @error_code: REO error code
  572. *
  573. * Return: None
  574. */
  575. static void
  576. _dp_rx_bar_frame_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  577. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  578. uint32_t tid, uint8_t err_status, uint32_t error_code)
  579. {
  580. uint16_t peer_id;
  581. struct dp_peer *peer;
  582. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  583. mpdu_desc_info->peer_meta_data);
  584. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  585. if (!peer)
  586. return;
  587. dp_info_rl("BAR frame: "
  588. " peer_id = %d"
  589. " tid = %u"
  590. " SSN = %d"
  591. " error status = %d",
  592. peer->peer_id,
  593. tid,
  594. mpdu_desc_info->mpdu_seq,
  595. err_status);
  596. if (err_status == HAL_REO_ERROR_DETECTED) {
  597. switch (error_code) {
  598. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  599. case HAL_REO_ERR_BAR_FRAME_OOR:
  600. dp_rx_err_handle_bar(soc, peer, nbuf);
  601. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  602. break;
  603. default:
  604. DP_STATS_INC(soc, rx.bar_frame, 1);
  605. }
  606. }
  607. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  608. }
  609. /**
  610. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  611. * @soc: core DP main context
  612. * @ring_desc: Hal ring desc
  613. * @rx_desc: dp rx desc
  614. * @mpdu_desc_info: mpdu desc info
  615. * @err_status: error status
  616. * @err_code: error code
  617. *
  618. * Handle the error BAR frames received. Ensure the SOC level
  619. * stats are updated based on the REO error code. The BAR frames
  620. * are further processed by updating the Rx tids with the start
  621. * sequence number (SSN) and BA window size. Desc is returned
  622. * to the free desc list
  623. *
  624. * Return: none
  625. */
  626. static void
  627. dp_rx_bar_frame_handle(struct dp_soc *soc,
  628. hal_ring_desc_t ring_desc,
  629. struct dp_rx_desc *rx_desc,
  630. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  631. uint8_t err_status,
  632. uint32_t err_code)
  633. {
  634. qdf_nbuf_t nbuf;
  635. struct dp_pdev *pdev;
  636. struct rx_desc_pool *rx_desc_pool;
  637. uint8_t *rx_tlv_hdr;
  638. uint32_t tid;
  639. nbuf = rx_desc->nbuf;
  640. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  641. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  642. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  643. rx_desc->unmapped = 1;
  644. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  645. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  646. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  647. rx_tlv_hdr);
  648. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  649. if (!pdev) {
  650. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  651. soc, rx_desc->pool_id);
  652. return;
  653. }
  654. _dp_rx_bar_frame_handle(soc, nbuf, mpdu_desc_info, tid, err_status,
  655. err_code);
  656. dp_rx_err_send_pktlog(soc, pdev, mpdu_desc_info, nbuf,
  657. QDF_TX_RX_STATUS_DROP, true);
  658. dp_rx_link_desc_return(soc, ring_desc,
  659. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  660. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  661. rx_desc->pool_id);
  662. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  663. &pdev->free_list_tail,
  664. rx_desc);
  665. }
  666. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  667. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  668. uint16_t peer_id, uint8_t tid)
  669. {
  670. struct dp_peer *peer = NULL;
  671. struct dp_rx_tid *rx_tid = NULL;
  672. struct dp_txrx_peer *txrx_peer;
  673. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  674. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  675. if (!peer) {
  676. dp_rx_err_info_rl("%pK: peer not found", soc);
  677. goto free_nbuf;
  678. }
  679. txrx_peer = dp_get_txrx_peer(peer);
  680. if (!txrx_peer) {
  681. dp_rx_err_info_rl("%pK: txrx_peer not found", soc);
  682. goto free_nbuf;
  683. }
  684. if (tid >= DP_MAX_TIDS) {
  685. dp_info_rl("invalid tid");
  686. goto nbuf_deliver;
  687. }
  688. rx_tid = &peer->rx_tid[tid];
  689. qdf_spin_lock_bh(&rx_tid->tid_lock);
  690. /* only if BA session is active, allow send Delba */
  691. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  692. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  693. goto nbuf_deliver;
  694. }
  695. if (!rx_tid->delba_tx_status) {
  696. rx_tid->delba_tx_retry++;
  697. rx_tid->delba_tx_status = 1;
  698. rx_tid->delba_rcode =
  699. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  700. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  701. if (soc->cdp_soc.ol_ops->send_delba) {
  702. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent,
  703. 1);
  704. soc->cdp_soc.ol_ops->send_delba(
  705. peer->vdev->pdev->soc->ctrl_psoc,
  706. peer->vdev->vdev_id,
  707. peer->mac_addr.raw,
  708. tid,
  709. rx_tid->delba_rcode,
  710. CDP_DELBA_2K_JUMP);
  711. }
  712. } else {
  713. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  714. }
  715. nbuf_deliver:
  716. if (dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  717. rx_tlv_hdr)) {
  718. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  719. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  720. return;
  721. }
  722. free_nbuf:
  723. if (peer)
  724. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  725. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  726. dp_rx_nbuf_free(nbuf);
  727. }
  728. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  729. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  730. bool
  731. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  732. uint8_t pool_id,
  733. uint8_t *rx_tlv_hdr,
  734. qdf_nbuf_t nbuf)
  735. {
  736. struct dp_peer *peer = NULL;
  737. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  738. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  739. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  740. if (!pdev) {
  741. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  742. soc, pool_id);
  743. return false;
  744. }
  745. /*
  746. * WAR- In certain types of packets if peer_id is not correct then
  747. * driver may not be able find. Try finding peer by addr_2 of
  748. * received MPDU
  749. */
  750. if (wh)
  751. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  752. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  753. if (peer) {
  754. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  755. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  756. QDF_TRACE_LEVEL_DEBUG);
  757. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  758. 1, qdf_nbuf_len(nbuf));
  759. dp_rx_nbuf_free(nbuf);
  760. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  761. return true;
  762. }
  763. return false;
  764. }
  765. #else
  766. bool
  767. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  768. uint8_t pool_id,
  769. uint8_t *rx_tlv_hdr,
  770. qdf_nbuf_t nbuf)
  771. {
  772. return false;
  773. }
  774. #endif
  775. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  776. {
  777. uint16_t buf_size;
  778. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  779. if (qdf_unlikely(pkt_len > buf_size)) {
  780. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  781. 1, pkt_len);
  782. return true;
  783. } else {
  784. return false;
  785. }
  786. }
  787. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  788. void
  789. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  790. struct dp_vdev *vdev,
  791. struct dp_txrx_peer *txrx_peer,
  792. qdf_nbuf_t nbuf,
  793. qdf_nbuf_t tail,
  794. bool is_eapol)
  795. {
  796. if (is_eapol && soc->eapol_over_control_port)
  797. dp_rx_eapol_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  798. else
  799. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  800. }
  801. #else
  802. void
  803. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  804. struct dp_vdev *vdev,
  805. struct dp_txrx_peer *txrx_peer,
  806. qdf_nbuf_t nbuf,
  807. qdf_nbuf_t tail,
  808. bool is_eapol)
  809. {
  810. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  811. }
  812. #endif
  813. #ifdef WLAN_FEATURE_11BE_MLO
  814. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  815. {
  816. return ((qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  817. QDF_MAC_ADDR_SIZE) == 0) ||
  818. (qdf_mem_cmp(eh->ether_dhost, &vdev->mld_mac_addr.raw[0],
  819. QDF_MAC_ADDR_SIZE) == 0));
  820. }
  821. #else
  822. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  823. {
  824. return (qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  825. QDF_MAC_ADDR_SIZE) == 0);
  826. }
  827. #endif
  828. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  829. bool
  830. dp_rx_err_drop_3addr_mcast(struct dp_vdev *vdev, uint8_t *rx_tlv_hdr)
  831. {
  832. struct dp_soc *soc = vdev->pdev->soc;
  833. if (!vdev->drop_3addr_mcast)
  834. return false;
  835. if (vdev->opmode != wlan_op_mode_sta)
  836. return false;
  837. if (hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  838. return true;
  839. return false;
  840. }
  841. /**
  842. * dp_rx_err_is_pn_check_needed() - Check if the packet number check is needed
  843. * for this frame received in REO error ring.
  844. * @soc: Datapath SOC handle
  845. * @error: REO error detected or not
  846. * @error_code: Error code in case of REO error
  847. *
  848. * Return: true if pn check if needed in software,
  849. * false, if pn check if not needed.
  850. */
  851. static inline bool
  852. dp_rx_err_is_pn_check_needed(struct dp_soc *soc, uint8_t error,
  853. uint32_t error_code)
  854. {
  855. return (soc->features.pn_in_reo_dest &&
  856. (error == HAL_REO_ERROR_DETECTED &&
  857. (hal_rx_reo_is_2k_jump(error_code) ||
  858. hal_rx_reo_is_oor_error(error_code) ||
  859. hal_rx_reo_is_bar_oor_2k_jump(error_code))));
  860. }
  861. #ifdef DP_WAR_INVALID_FIRST_MSDU_FLAG
  862. static inline void
  863. dp_rx_err_populate_mpdu_desc_info(struct dp_soc *soc, qdf_nbuf_t nbuf,
  864. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  865. bool first_msdu_in_mpdu_processed)
  866. {
  867. if (first_msdu_in_mpdu_processed) {
  868. /*
  869. * This is the 2nd indication of first_msdu in the same mpdu.
  870. * Skip re-parsing the mdpu_desc_info and use the cached one,
  871. * since this msdu is most probably from the current mpdu
  872. * which is being processed
  873. */
  874. } else {
  875. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc,
  876. qdf_nbuf_data(nbuf),
  877. mpdu_desc_info);
  878. }
  879. }
  880. #else
  881. static inline void
  882. dp_rx_err_populate_mpdu_desc_info(struct dp_soc *soc, qdf_nbuf_t nbuf,
  883. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  884. bool first_msdu_in_mpdu_processed)
  885. {
  886. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc, qdf_nbuf_data(nbuf),
  887. mpdu_desc_info);
  888. }
  889. #endif
  890. /**
  891. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  892. *
  893. * @soc: core txrx main context
  894. * @ring_desc: opaque pointer to the REO error ring descriptor
  895. * @mpdu_desc_info: pointer to mpdu level description info
  896. * @link_desc_va: pointer to msdu_link_desc virtual address
  897. * @err_code: reo error code fetched from ring entry
  898. *
  899. * Function to handle msdus fetched from msdu link desc, currently
  900. * support REO error NULL queue, 2K jump, OOR.
  901. *
  902. * Return: msdu count processed
  903. */
  904. static uint32_t
  905. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  906. void *ring_desc,
  907. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  908. void *link_desc_va,
  909. enum hal_reo_error_code err_code)
  910. {
  911. uint32_t rx_bufs_used = 0;
  912. struct dp_pdev *pdev;
  913. int i;
  914. uint8_t *rx_tlv_hdr_first;
  915. uint8_t *rx_tlv_hdr_last;
  916. uint32_t tid = DP_MAX_TIDS;
  917. uint16_t peer_id;
  918. struct dp_rx_desc *rx_desc;
  919. struct rx_desc_pool *rx_desc_pool;
  920. qdf_nbuf_t nbuf;
  921. qdf_nbuf_t next_nbuf;
  922. struct hal_buf_info buf_info;
  923. struct hal_rx_msdu_list msdu_list;
  924. uint16_t num_msdus;
  925. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  926. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  927. /* First field in REO Dst ring Desc is buffer_addr_info */
  928. void *buf_addr_info = ring_desc;
  929. qdf_nbuf_t head_nbuf = NULL;
  930. qdf_nbuf_t tail_nbuf = NULL;
  931. uint16_t msdu_processed = 0;
  932. QDF_STATUS status;
  933. bool ret, is_pn_check_needed;
  934. uint8_t rx_desc_pool_id;
  935. struct dp_txrx_peer *txrx_peer = NULL;
  936. dp_txrx_ref_handle txrx_ref_handle = NULL;
  937. hal_ring_handle_t hal_ring_hdl = soc->reo_exception_ring.hal_srng;
  938. bool first_msdu_in_mpdu_processed = false;
  939. bool msdu_dropped = false;
  940. uint8_t link_id = 0;
  941. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  942. mpdu_desc_info->peer_meta_data);
  943. is_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  944. HAL_REO_ERROR_DETECTED,
  945. err_code);
  946. more_msdu_link_desc:
  947. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  948. &num_msdus);
  949. for (i = 0; i < num_msdus; i++) {
  950. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  951. soc,
  952. msdu_list.sw_cookie[i]);
  953. if (dp_assert_always_internal_stat(rx_desc, soc,
  954. rx.err.reo_err_rx_desc_null))
  955. continue;
  956. nbuf = rx_desc->nbuf;
  957. /*
  958. * this is a unlikely scenario where the host is reaping
  959. * a descriptor which it already reaped just a while ago
  960. * but is yet to replenish it back to HW.
  961. * In this case host will dump the last 128 descriptors
  962. * including the software descriptor rx_desc and assert.
  963. */
  964. if (qdf_unlikely(!rx_desc->in_use) ||
  965. qdf_unlikely(!nbuf)) {
  966. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  967. dp_info_rl("Reaping rx_desc not in use!");
  968. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  969. ring_desc, rx_desc);
  970. /* ignore duplicate RX desc and continue to process */
  971. /* Pop out the descriptor */
  972. msdu_dropped = true;
  973. continue;
  974. }
  975. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  976. msdu_list.paddr[i]);
  977. if (!ret) {
  978. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  979. rx_desc->in_err_state = 1;
  980. msdu_dropped = true;
  981. continue;
  982. }
  983. rx_desc_pool_id = rx_desc->pool_id;
  984. /* all buffers from a MSDU link belong to same pdev */
  985. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc_pool_id);
  986. rx_desc_pool = &soc->rx_desc_buf[rx_desc_pool_id];
  987. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  988. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  989. rx_desc->unmapped = 1;
  990. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  991. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  992. rx_bufs_used++;
  993. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  994. &pdev->free_list_tail, rx_desc);
  995. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  996. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  997. HAL_MSDU_F_MSDU_CONTINUATION)) {
  998. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  999. continue;
  1000. }
  1001. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  1002. rx_desc_pool_id)) {
  1003. /* MSDU queued back to the pool */
  1004. msdu_dropped = true;
  1005. head_nbuf = NULL;
  1006. goto process_next_msdu;
  1007. }
  1008. if (is_pn_check_needed) {
  1009. if (msdu_list.msdu_info[i].msdu_flags &
  1010. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) {
  1011. dp_rx_err_populate_mpdu_desc_info(soc, nbuf,
  1012. mpdu_desc_info,
  1013. first_msdu_in_mpdu_processed);
  1014. first_msdu_in_mpdu_processed = true;
  1015. } else {
  1016. if (!first_msdu_in_mpdu_processed) {
  1017. /*
  1018. * If no msdu in this mpdu was dropped
  1019. * due to failed sanity checks, then
  1020. * its not expected to hit this
  1021. * condition. Hence we assert here.
  1022. */
  1023. if (!msdu_dropped)
  1024. qdf_assert_always(0);
  1025. /*
  1026. * We do not have valid mpdu_desc_info
  1027. * to process this nbuf, hence drop it.
  1028. * TODO - Increment stats
  1029. */
  1030. goto process_next_msdu;
  1031. }
  1032. /*
  1033. * DO NOTHING -
  1034. * Continue using the same mpdu_desc_info
  1035. * details populated from the first msdu in
  1036. * the mpdu.
  1037. */
  1038. }
  1039. status = dp_rx_err_nbuf_pn_check(soc, ring_desc, nbuf);
  1040. if (QDF_IS_STATUS_ERROR(status)) {
  1041. DP_STATS_INC(soc, rx.err.pn_in_dest_check_fail,
  1042. 1);
  1043. goto process_next_msdu;
  1044. }
  1045. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1046. mpdu_desc_info->peer_meta_data);
  1047. if (mpdu_desc_info->bar_frame)
  1048. _dp_rx_bar_frame_handle(soc, nbuf,
  1049. mpdu_desc_info, tid,
  1050. HAL_REO_ERROR_DETECTED,
  1051. err_code);
  1052. }
  1053. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  1054. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  1055. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  1056. /*
  1057. * For SG case, only the length of last skb is valid
  1058. * as HW only populate the msdu_len for last msdu
  1059. * in rx link descriptor, use the length from
  1060. * last skb to overwrite the head skb for further
  1061. * SG processing.
  1062. */
  1063. QDF_NBUF_CB_RX_PKT_LEN(head_nbuf) =
  1064. QDF_NBUF_CB_RX_PKT_LEN(tail_nbuf);
  1065. nbuf = dp_rx_sg_create(soc, head_nbuf);
  1066. qdf_nbuf_set_is_frag(nbuf, 1);
  1067. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  1068. }
  1069. head_nbuf = NULL;
  1070. dp_rx_nbuf_set_link_id_from_tlv(soc, qdf_nbuf_data(nbuf), nbuf);
  1071. if (pdev && pdev->link_peer_stats &&
  1072. txrx_peer && txrx_peer->is_mld_peer) {
  1073. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  1074. nbuf,
  1075. txrx_peer);
  1076. }
  1077. if (txrx_peer)
  1078. dp_rx_set_nbuf_band(nbuf, txrx_peer, link_id);
  1079. switch (err_code) {
  1080. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  1081. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  1082. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  1083. /*
  1084. * only first msdu, mpdu start description tlv valid?
  1085. * and use it for following msdu.
  1086. */
  1087. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1088. rx_tlv_hdr_last))
  1089. tid = hal_rx_mpdu_start_tid_get(
  1090. soc->hal_soc,
  1091. rx_tlv_hdr_first);
  1092. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  1093. peer_id, tid);
  1094. break;
  1095. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  1096. case HAL_REO_ERR_BAR_FRAME_OOR:
  1097. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  1098. break;
  1099. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1100. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(
  1101. soc, peer_id,
  1102. &txrx_ref_handle,
  1103. DP_MOD_ID_RX_ERR);
  1104. if (!txrx_peer)
  1105. dp_info_rl("txrx_peer is null peer_id %u",
  1106. peer_id);
  1107. soc->arch_ops.dp_rx_null_q_desc_handle(soc, nbuf,
  1108. rx_tlv_hdr_last,
  1109. rx_desc_pool_id,
  1110. txrx_peer,
  1111. TRUE,
  1112. link_id);
  1113. if (txrx_peer)
  1114. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1115. DP_MOD_ID_RX_ERR);
  1116. break;
  1117. default:
  1118. dp_err_rl("Non-support error code %d", err_code);
  1119. dp_rx_nbuf_free(nbuf);
  1120. }
  1121. process_next_msdu:
  1122. nbuf = head_nbuf;
  1123. while (nbuf) {
  1124. next_nbuf = qdf_nbuf_next(nbuf);
  1125. dp_rx_nbuf_free(nbuf);
  1126. nbuf = next_nbuf;
  1127. }
  1128. msdu_processed++;
  1129. head_nbuf = NULL;
  1130. tail_nbuf = NULL;
  1131. }
  1132. /*
  1133. * If the msdu's are spread across multiple link-descriptors,
  1134. * we cannot depend solely on the msdu_count(e.g., if msdu is
  1135. * spread across multiple buffers).Hence, it is
  1136. * necessary to check the next link_descriptor and release
  1137. * all the msdu's that are part of it.
  1138. */
  1139. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  1140. link_desc_va,
  1141. &next_link_desc_addr_info);
  1142. if (hal_rx_is_buf_addr_info_valid(
  1143. &next_link_desc_addr_info)) {
  1144. /* Clear the next link desc info for the current link_desc */
  1145. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  1146. dp_rx_link_desc_return_by_addr(
  1147. soc,
  1148. buf_addr_info,
  1149. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1150. hal_rx_buffer_addr_info_get_paddr(
  1151. &next_link_desc_addr_info,
  1152. &buf_info);
  1153. /* buffer_addr_info is the first element of ring_desc */
  1154. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  1155. (uint32_t *)&next_link_desc_addr_info,
  1156. &buf_info);
  1157. link_desc_va =
  1158. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1159. cur_link_desc_addr_info = next_link_desc_addr_info;
  1160. buf_addr_info = &cur_link_desc_addr_info;
  1161. goto more_msdu_link_desc;
  1162. }
  1163. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  1164. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1165. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  1166. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  1167. return rx_bufs_used;
  1168. }
  1169. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1170. void
  1171. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1172. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1173. uint8_t err_code, uint8_t mac_id, uint8_t link_id)
  1174. {
  1175. uint32_t pkt_len, l2_hdr_offset;
  1176. uint16_t msdu_len;
  1177. struct dp_vdev *vdev;
  1178. qdf_ether_header_t *eh;
  1179. bool is_broadcast;
  1180. /*
  1181. * Check if DMA completed -- msdu_done is the last bit
  1182. * to be written
  1183. */
  1184. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1185. dp_err_rl("MSDU DONE failure");
  1186. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1187. QDF_TRACE_LEVEL_INFO);
  1188. qdf_assert(0);
  1189. }
  1190. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1191. rx_tlv_hdr);
  1192. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1193. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1194. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1195. /* Drop & free packet */
  1196. dp_rx_nbuf_free(nbuf);
  1197. return;
  1198. }
  1199. /* Set length in nbuf */
  1200. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1201. qdf_nbuf_set_next(nbuf, NULL);
  1202. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1203. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1204. if (!txrx_peer) {
  1205. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "txrx_peer is NULL");
  1206. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1207. qdf_nbuf_len(nbuf));
  1208. /* Trigger invalid peer handler wrapper */
  1209. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1210. return;
  1211. }
  1212. vdev = txrx_peer->vdev;
  1213. if (!vdev) {
  1214. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1215. vdev);
  1216. /* Drop & free packet */
  1217. dp_rx_nbuf_free(nbuf);
  1218. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1219. return;
  1220. }
  1221. /*
  1222. * Advance the packet start pointer by total size of
  1223. * pre-header TLV's
  1224. */
  1225. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1226. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1227. uint8_t *pkt_type;
  1228. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1229. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1230. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1231. htons(QDF_LLC_STP)) {
  1232. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1233. goto process_mesh;
  1234. } else {
  1235. goto process_rx;
  1236. }
  1237. }
  1238. }
  1239. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1240. goto process_mesh;
  1241. /*
  1242. * WAPI cert AP sends rekey frames as unencrypted.
  1243. * Thus RXDMA will report unencrypted frame error.
  1244. * To pass WAPI cert case, SW needs to pass unencrypted
  1245. * rekey frame to stack.
  1246. */
  1247. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1248. goto process_rx;
  1249. }
  1250. /*
  1251. * In dynamic WEP case rekey frames are not encrypted
  1252. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1253. * key install is already done
  1254. */
  1255. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1256. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1257. goto process_rx;
  1258. process_mesh:
  1259. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1260. dp_rx_nbuf_free(nbuf);
  1261. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1262. return;
  1263. }
  1264. if (vdev->mesh_vdev) {
  1265. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1266. == QDF_STATUS_SUCCESS) {
  1267. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1268. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1269. dp_rx_nbuf_free(nbuf);
  1270. return;
  1271. }
  1272. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, txrx_peer);
  1273. }
  1274. process_rx:
  1275. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1276. rx_tlv_hdr) &&
  1277. (vdev->rx_decap_type ==
  1278. htt_cmn_pkt_type_ethernet))) {
  1279. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1280. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1281. (eh->ether_dhost)) ? 1 : 0 ;
  1282. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.multicast, 1,
  1283. qdf_nbuf_len(nbuf), link_id);
  1284. if (is_broadcast) {
  1285. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.bcast, 1,
  1286. qdf_nbuf_len(nbuf),
  1287. link_id);
  1288. }
  1289. } else {
  1290. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.unicast, 1,
  1291. qdf_nbuf_len(nbuf),
  1292. link_id);
  1293. }
  1294. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1295. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, link_id);
  1296. } else {
  1297. /* Update the protocol tag in SKB based on CCE metadata */
  1298. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1299. EXCEPTION_DEST_RING_ID, true, true);
  1300. /* Update the flow tag in SKB based on FSE metadata */
  1301. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1302. DP_PEER_STATS_FLAT_INC(txrx_peer, to_stack.num, 1);
  1303. qdf_nbuf_set_exc_frame(nbuf, 1);
  1304. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1305. qdf_nbuf_is_ipv4_eapol_pkt(nbuf));
  1306. }
  1307. return;
  1308. }
  1309. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1310. uint8_t *rx_tlv_hdr,
  1311. struct dp_txrx_peer *txrx_peer)
  1312. {
  1313. struct dp_vdev *vdev = NULL;
  1314. struct dp_pdev *pdev = NULL;
  1315. struct ol_if_ops *tops = NULL;
  1316. uint16_t rx_seq, fragno;
  1317. uint8_t is_raw;
  1318. unsigned int tid;
  1319. QDF_STATUS status;
  1320. struct cdp_rx_mic_err_info mic_failure_info;
  1321. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1322. rx_tlv_hdr))
  1323. return;
  1324. if (!txrx_peer) {
  1325. dp_info_rl("txrx_peer not found");
  1326. goto fail;
  1327. }
  1328. vdev = txrx_peer->vdev;
  1329. if (!vdev) {
  1330. dp_info_rl("VDEV not found");
  1331. goto fail;
  1332. }
  1333. pdev = vdev->pdev;
  1334. if (!pdev) {
  1335. dp_info_rl("PDEV not found");
  1336. goto fail;
  1337. }
  1338. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1339. if (is_raw) {
  1340. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1341. qdf_nbuf_data(nbuf));
  1342. /* Can get only last fragment */
  1343. if (fragno) {
  1344. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1345. qdf_nbuf_data(nbuf));
  1346. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1347. qdf_nbuf_data(nbuf));
  1348. status = dp_rx_defrag_add_last_frag(soc, txrx_peer,
  1349. tid, rx_seq, nbuf);
  1350. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1351. "status %d !", rx_seq, fragno, status);
  1352. return;
  1353. }
  1354. }
  1355. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1356. &mic_failure_info.da_mac_addr.bytes[0])) {
  1357. dp_err_rl("Failed to get da_mac_addr");
  1358. goto fail;
  1359. }
  1360. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1361. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1362. dp_err_rl("Failed to get ta_mac_addr");
  1363. goto fail;
  1364. }
  1365. mic_failure_info.key_id = 0;
  1366. mic_failure_info.multicast =
  1367. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1368. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1369. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1370. mic_failure_info.data = NULL;
  1371. mic_failure_info.vdev_id = vdev->vdev_id;
  1372. tops = pdev->soc->cdp_soc.ol_ops;
  1373. if (tops->rx_mic_error)
  1374. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1375. &mic_failure_info);
  1376. fail:
  1377. dp_rx_nbuf_free(nbuf);
  1378. return;
  1379. }
  1380. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  1381. static void dp_rx_peek_trapped_packet(struct dp_soc *soc,
  1382. struct dp_vdev *vdev)
  1383. {
  1384. if (soc->cdp_soc.ol_ops->send_wakeup_trigger)
  1385. soc->cdp_soc.ol_ops->send_wakeup_trigger(soc->ctrl_psoc,
  1386. vdev->vdev_id);
  1387. }
  1388. #else
  1389. static void dp_rx_peek_trapped_packet(struct dp_soc *soc,
  1390. struct dp_vdev *vdev)
  1391. {
  1392. return;
  1393. }
  1394. #endif
  1395. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1396. defined(WLAN_MCAST_MLO)
  1397. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1398. struct dp_vdev *vdev,
  1399. struct dp_txrx_peer *peer,
  1400. qdf_nbuf_t nbuf,
  1401. uint8_t link_id)
  1402. {
  1403. if (soc->arch_ops.dp_rx_mcast_handler) {
  1404. if (soc->arch_ops.dp_rx_mcast_handler(soc, vdev, peer,
  1405. nbuf, link_id))
  1406. return true;
  1407. }
  1408. return false;
  1409. }
  1410. #else
  1411. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1412. struct dp_vdev *vdev,
  1413. struct dp_txrx_peer *peer,
  1414. qdf_nbuf_t nbuf,
  1415. uint8_t link_id)
  1416. {
  1417. return false;
  1418. }
  1419. #endif
  1420. /**
  1421. * dp_rx_err_route_hdl() - Function to send EAPOL frames to stack
  1422. * Free any other packet which comes in
  1423. * this path.
  1424. *
  1425. * @soc: core DP main context
  1426. * @nbuf: buffer pointer
  1427. * @txrx_peer: txrx peer handle
  1428. * @rx_tlv_hdr: start of rx tlv header
  1429. * @err_src: rxdma/reo
  1430. * @link_id: link id on which the packet is received
  1431. *
  1432. * This function indicates EAPOL frame received in wbm error ring to stack.
  1433. * Any other frame should be dropped.
  1434. *
  1435. * Return: SUCCESS if delivered to stack
  1436. */
  1437. static void
  1438. dp_rx_err_route_hdl(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1439. struct dp_txrx_peer *txrx_peer, uint8_t *rx_tlv_hdr,
  1440. enum hal_rx_wbm_error_source err_src,
  1441. uint8_t link_id)
  1442. {
  1443. uint32_t pkt_len;
  1444. uint16_t msdu_len;
  1445. struct dp_vdev *vdev;
  1446. struct hal_rx_msdu_metadata msdu_metadata;
  1447. bool is_eapol;
  1448. uint16_t buf_size;
  1449. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1450. qdf_nbuf_set_rx_chfrag_start(
  1451. nbuf,
  1452. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1453. rx_tlv_hdr));
  1454. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1455. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1456. rx_tlv_hdr));
  1457. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1458. rx_tlv_hdr));
  1459. qdf_nbuf_set_da_valid(nbuf,
  1460. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1461. rx_tlv_hdr));
  1462. qdf_nbuf_set_sa_valid(nbuf,
  1463. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1464. rx_tlv_hdr));
  1465. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1466. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1467. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1468. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1469. if (dp_rx_check_pkt_len(soc, pkt_len))
  1470. goto drop_nbuf;
  1471. /* Set length in nbuf */
  1472. qdf_nbuf_set_pktlen(nbuf, qdf_min(pkt_len, (uint32_t)buf_size));
  1473. }
  1474. /*
  1475. * Check if DMA completed -- msdu_done is the last bit
  1476. * to be written
  1477. */
  1478. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1479. dp_err_rl("MSDU DONE failure");
  1480. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1481. QDF_TRACE_LEVEL_INFO);
  1482. qdf_assert(0);
  1483. }
  1484. if (!txrx_peer)
  1485. goto drop_nbuf;
  1486. vdev = txrx_peer->vdev;
  1487. if (!vdev) {
  1488. dp_err_rl("Null vdev!");
  1489. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1490. goto drop_nbuf;
  1491. }
  1492. /*
  1493. * Advance the packet start pointer by total size of
  1494. * pre-header TLV's
  1495. */
  1496. if (qdf_nbuf_is_frag(nbuf))
  1497. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1498. else
  1499. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1500. soc->rx_pkt_tlv_size));
  1501. if (hal_rx_msdu_cce_metadata_get(soc->hal_soc, rx_tlv_hdr) ==
  1502. CDP_STANDBY_METADATA)
  1503. dp_rx_peek_trapped_packet(soc, vdev);
  1504. QDF_NBUF_CB_RX_PEER_ID(nbuf) = txrx_peer->peer_id;
  1505. if (dp_rx_igmp_handler(soc, vdev, txrx_peer, nbuf, link_id))
  1506. return;
  1507. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1508. /*
  1509. * Indicate EAPOL frame to stack only when vap mac address
  1510. * matches the destination address.
  1511. */
  1512. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1513. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1514. qdf_ether_header_t *eh =
  1515. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1516. if (dp_rx_err_match_dhost(eh, vdev)) {
  1517. DP_STATS_INC_PKT(vdev, rx_i.routed_eapol_pkt, 1,
  1518. qdf_nbuf_len(nbuf));
  1519. /*
  1520. * Update the protocol tag in SKB based on
  1521. * CCE metadata.
  1522. */
  1523. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1524. EXCEPTION_DEST_RING_ID,
  1525. true, true);
  1526. /* Update the flow tag in SKB based on FSE metadata */
  1527. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1528. true);
  1529. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  1530. qdf_nbuf_len(nbuf),
  1531. vdev->pdev->enhanced_stats_en);
  1532. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  1533. rx.rx_success, 1,
  1534. qdf_nbuf_len(nbuf),
  1535. link_id);
  1536. qdf_nbuf_set_exc_frame(nbuf, 1);
  1537. qdf_nbuf_set_next(nbuf, NULL);
  1538. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf,
  1539. NULL, is_eapol);
  1540. return;
  1541. }
  1542. }
  1543. drop_nbuf:
  1544. DP_STATS_INCC(soc, rx.reo2rel_route_drop, 1,
  1545. err_src == HAL_RX_WBM_ERR_SRC_REO);
  1546. DP_STATS_INCC(soc, rx.rxdma2rel_route_drop, 1,
  1547. err_src == HAL_RX_WBM_ERR_SRC_RXDMA);
  1548. dp_rx_nbuf_free(nbuf);
  1549. }
  1550. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1551. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1552. /**
  1553. * dp_rx_link_cookie_check() - Validate link desc cookie
  1554. * @ring_desc: ring descriptor
  1555. *
  1556. * Return: qdf status
  1557. */
  1558. static inline QDF_STATUS
  1559. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1560. {
  1561. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1562. return QDF_STATUS_E_FAILURE;
  1563. return QDF_STATUS_SUCCESS;
  1564. }
  1565. /**
  1566. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1567. * @ring_desc: ring descriptor
  1568. *
  1569. * Return: None
  1570. */
  1571. static inline void
  1572. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1573. {
  1574. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1575. }
  1576. #else
  1577. static inline QDF_STATUS
  1578. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1579. {
  1580. return QDF_STATUS_SUCCESS;
  1581. }
  1582. static inline void
  1583. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1584. {
  1585. }
  1586. #endif
  1587. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1588. /**
  1589. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1590. * @soc: Datapath soc structure
  1591. * @paddr: paddr of the buffer in RX err ring
  1592. * @sw_cookie: SW cookie of the buffer in RX err ring
  1593. * @rbm: Return buffer manager of the buffer in RX err ring
  1594. *
  1595. * Return: None
  1596. */
  1597. static inline void
  1598. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1599. uint32_t sw_cookie, uint8_t rbm)
  1600. {
  1601. struct dp_buf_info_record *record;
  1602. uint32_t idx;
  1603. if (qdf_unlikely(!soc->rx_err_ring_history))
  1604. return;
  1605. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1606. DP_RX_ERR_HIST_MAX);
  1607. /* No NULL check needed for record since its an array */
  1608. record = &soc->rx_err_ring_history->entry[idx];
  1609. record->timestamp = qdf_get_log_timestamp();
  1610. record->hbi.paddr = paddr;
  1611. record->hbi.sw_cookie = sw_cookie;
  1612. record->hbi.rbm = rbm;
  1613. }
  1614. #else
  1615. static inline void
  1616. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1617. uint32_t sw_cookie, uint8_t rbm)
  1618. {
  1619. }
  1620. #endif
  1621. #if defined(HANDLE_RX_REROUTE_ERR) || defined(REO_EXCEPTION_MSDU_WAR)
  1622. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1623. hal_ring_desc_t ring_desc)
  1624. {
  1625. int lmac_id = DP_INVALID_LMAC_ID;
  1626. struct dp_rx_desc *rx_desc;
  1627. struct hal_buf_info hbi;
  1628. struct dp_pdev *pdev;
  1629. struct rx_desc_pool *rx_desc_pool;
  1630. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1631. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1632. /* sanity */
  1633. if (!rx_desc) {
  1634. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1635. goto assert_return;
  1636. }
  1637. if (!rx_desc->nbuf)
  1638. goto assert_return;
  1639. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1640. hbi.sw_cookie,
  1641. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1642. ring_desc));
  1643. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1644. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1645. rx_desc->in_err_state = 1;
  1646. goto assert_return;
  1647. }
  1648. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1649. /* After this point the rx_desc and nbuf are valid */
  1650. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1651. qdf_assert_always(!rx_desc->unmapped);
  1652. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  1653. rx_desc->unmapped = 1;
  1654. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1655. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1656. rx_desc->pool_id);
  1657. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1658. lmac_id = rx_desc->pool_id;
  1659. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1660. &pdev->free_list_tail,
  1661. rx_desc);
  1662. return lmac_id;
  1663. assert_return:
  1664. qdf_assert(0);
  1665. return lmac_id;
  1666. }
  1667. #endif
  1668. #ifdef HANDLE_RX_REROUTE_ERR
  1669. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1670. {
  1671. int ret;
  1672. uint64_t cur_time_stamp;
  1673. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1674. /* Recover if overall error count exceeds threshold */
  1675. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1676. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1677. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1678. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1679. soc->rx_route_err_start_pkt_ts);
  1680. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1681. }
  1682. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1683. if (!soc->rx_route_err_start_pkt_ts)
  1684. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1685. /* Recover if threshold number of packets received in threshold time */
  1686. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1687. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1688. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1689. if (soc->rx_route_err_in_window >
  1690. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1691. qdf_trigger_self_recovery(NULL,
  1692. QDF_RX_REG_PKT_ROUTE_ERR);
  1693. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1694. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1695. soc->rx_route_err_start_pkt_ts);
  1696. } else {
  1697. soc->rx_route_err_in_window = 1;
  1698. }
  1699. } else {
  1700. soc->rx_route_err_in_window++;
  1701. }
  1702. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1703. return ret;
  1704. }
  1705. #else /* HANDLE_RX_REROUTE_ERR */
  1706. #ifdef REO_EXCEPTION_MSDU_WAR
  1707. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1708. {
  1709. return dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1710. }
  1711. #else /* REO_EXCEPTION_MSDU_WAR */
  1712. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1713. {
  1714. qdf_assert_always(0);
  1715. return DP_INVALID_LMAC_ID;
  1716. }
  1717. #endif /* REO_EXCEPTION_MSDU_WAR */
  1718. #endif /* HANDLE_RX_REROUTE_ERR */
  1719. #ifdef WLAN_MLO_MULTI_CHIP
  1720. /**
  1721. * dp_idle_link_bm_id_check() - war for HW issue
  1722. *
  1723. * @soc: DP SOC handle
  1724. * @rbm: idle link RBM value
  1725. * @ring_desc: reo error link descriptor
  1726. *
  1727. * This is a war for HW issue where link descriptor
  1728. * of partner soc received due to packets wrongly
  1729. * interpreted as fragments
  1730. *
  1731. * Return: true in case link desc is consumed
  1732. * false in other cases
  1733. */
  1734. static bool dp_idle_link_bm_id_check(struct dp_soc *soc, uint8_t rbm,
  1735. void *ring_desc)
  1736. {
  1737. struct dp_soc *replenish_soc = NULL;
  1738. /* return ok incase of link desc of same soc */
  1739. if (rbm == soc->idle_link_bm_id)
  1740. return false;
  1741. if (soc->arch_ops.dp_soc_get_by_idle_bm_id)
  1742. replenish_soc =
  1743. soc->arch_ops.dp_soc_get_by_idle_bm_id(soc, rbm);
  1744. qdf_assert_always(replenish_soc);
  1745. /*
  1746. * For WIN usecase we should only get fragment packets in
  1747. * this ring as for MLO case fragmentation is not supported
  1748. * we should not see links from other soc.
  1749. *
  1750. * Drop all packets from partner soc and replenish the descriptors
  1751. */
  1752. dp_handle_wbm_internal_error(replenish_soc, ring_desc,
  1753. HAL_WBM_RELEASE_RING_2_DESC_TYPE);
  1754. return true;
  1755. }
  1756. #else
  1757. static bool dp_idle_link_bm_id_check(struct dp_soc *soc, uint8_t rbm,
  1758. void *ring_desc)
  1759. {
  1760. return false;
  1761. }
  1762. #endif
  1763. static inline void
  1764. dp_rx_err_dup_frame(struct dp_soc *soc,
  1765. struct hal_rx_mpdu_desc_info *mpdu_desc_info)
  1766. {
  1767. struct dp_txrx_peer *txrx_peer = NULL;
  1768. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1769. uint16_t peer_id;
  1770. peer_id =
  1771. dp_rx_peer_metadata_peer_id_get(soc,
  1772. mpdu_desc_info->peer_meta_data);
  1773. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  1774. &txrx_ref_handle,
  1775. DP_MOD_ID_RX_ERR);
  1776. if (txrx_peer) {
  1777. DP_STATS_INC(txrx_peer->vdev, rx.duplicate_count, 1);
  1778. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  1779. }
  1780. }
  1781. uint32_t
  1782. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1783. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1784. {
  1785. hal_ring_desc_t ring_desc;
  1786. hal_soc_handle_t hal_soc;
  1787. uint32_t count = 0;
  1788. uint32_t rx_bufs_used = 0;
  1789. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1790. uint8_t mac_id = 0;
  1791. uint8_t buf_type;
  1792. uint8_t err_status;
  1793. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1794. struct hal_buf_info hbi;
  1795. struct dp_pdev *dp_pdev;
  1796. struct dp_srng *dp_rxdma_srng;
  1797. struct rx_desc_pool *rx_desc_pool;
  1798. void *link_desc_va;
  1799. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  1800. uint16_t num_msdus;
  1801. struct dp_rx_desc *rx_desc = NULL;
  1802. QDF_STATUS status;
  1803. bool ret;
  1804. uint32_t error_code = 0;
  1805. bool sw_pn_check_needed;
  1806. int max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  1807. int i, rx_bufs_reaped_total;
  1808. uint16_t peer_id;
  1809. struct dp_txrx_peer *txrx_peer = NULL;
  1810. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1811. /* Debug -- Remove later */
  1812. qdf_assert(soc && hal_ring_hdl);
  1813. hal_soc = soc->hal_soc;
  1814. /* Debug -- Remove later */
  1815. qdf_assert(hal_soc);
  1816. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1817. /* TODO */
  1818. /*
  1819. * Need API to convert from hal_ring pointer to
  1820. * Ring Type / Ring Id combo
  1821. */
  1822. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1823. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  1824. hal_ring_hdl);
  1825. goto done;
  1826. }
  1827. while (qdf_likely(quota-- && (ring_desc =
  1828. hal_srng_dst_peek(hal_soc,
  1829. hal_ring_hdl)))) {
  1830. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  1831. err_status = hal_rx_err_status_get(hal_soc, ring_desc);
  1832. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  1833. if (err_status == HAL_REO_ERROR_DETECTED)
  1834. error_code = hal_rx_get_reo_error_code(hal_soc,
  1835. ring_desc);
  1836. qdf_mem_set(&mpdu_desc_info, sizeof(mpdu_desc_info), 0);
  1837. sw_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  1838. err_status,
  1839. error_code);
  1840. if (!sw_pn_check_needed) {
  1841. /*
  1842. * MPDU desc info will be present in the REO desc
  1843. * only in the below scenarios
  1844. * 1) pn_in_dest_disabled: always
  1845. * 2) pn_in_dest enabled: All cases except 2k-jup
  1846. * and OOR errors
  1847. */
  1848. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc,
  1849. &mpdu_desc_info);
  1850. }
  1851. if (HAL_RX_REO_DESC_MSDU_COUNT_GET(ring_desc) == 0)
  1852. goto next_entry;
  1853. /*
  1854. * For REO error ring, only MSDU LINK DESC is expected.
  1855. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  1856. */
  1857. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  1858. int lmac_id;
  1859. lmac_id = dp_rx_err_exception(soc, ring_desc);
  1860. if (lmac_id >= 0)
  1861. rx_bufs_reaped[lmac_id] += 1;
  1862. goto next_entry;
  1863. }
  1864. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  1865. &hbi);
  1866. /*
  1867. * check for the magic number in the sw cookie
  1868. */
  1869. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  1870. soc->link_desc_id_start);
  1871. if (dp_idle_link_bm_id_check(soc, hbi.rbm, ring_desc)) {
  1872. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  1873. goto next_entry;
  1874. }
  1875. status = dp_rx_link_cookie_check(ring_desc);
  1876. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1877. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  1878. break;
  1879. }
  1880. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1881. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  1882. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1883. &num_msdus);
  1884. if (!num_msdus ||
  1885. !dp_rx_is_sw_cookie_valid(soc, msdu_list.sw_cookie[0])) {
  1886. dp_rx_err_info_rl("Invalid MSDU info num_msdus %u cookie: 0x%x",
  1887. num_msdus, msdu_list.sw_cookie[0]);
  1888. dp_rx_link_desc_return(soc, ring_desc,
  1889. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1890. goto next_entry;
  1891. }
  1892. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  1893. msdu_list.sw_cookie[0],
  1894. msdu_list.rbm[0]);
  1895. // TODO - BE- Check if the RBM is to be checked for all chips
  1896. if (qdf_unlikely((msdu_list.rbm[0] !=
  1897. dp_rx_get_rx_bm_id(soc)) &&
  1898. (msdu_list.rbm[0] !=
  1899. soc->idle_link_bm_id) &&
  1900. (msdu_list.rbm[0] !=
  1901. dp_rx_get_defrag_bm_id(soc)))) {
  1902. /* TODO */
  1903. /* Call appropriate handler */
  1904. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1905. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1906. dp_rx_err_err("%pK: Invalid RBM %d",
  1907. soc, msdu_list.rbm[0]);
  1908. }
  1909. /* Return link descriptor through WBM ring (SW2WBM)*/
  1910. dp_rx_link_desc_return(soc, ring_desc,
  1911. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  1912. goto next_entry;
  1913. }
  1914. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  1915. soc,
  1916. msdu_list.sw_cookie[0]);
  1917. qdf_assert_always(rx_desc);
  1918. mac_id = rx_desc->pool_id;
  1919. if (sw_pn_check_needed) {
  1920. goto process_reo_error_code;
  1921. }
  1922. if (mpdu_desc_info.bar_frame) {
  1923. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  1924. dp_rx_bar_frame_handle(soc, ring_desc, rx_desc,
  1925. &mpdu_desc_info, err_status,
  1926. error_code);
  1927. rx_bufs_reaped[mac_id] += 1;
  1928. goto next_entry;
  1929. }
  1930. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  1931. /*
  1932. * We only handle one msdu per link desc for fragmented
  1933. * case. We drop the msdus and release the link desc
  1934. * back if there are more than one msdu in link desc.
  1935. */
  1936. if (qdf_unlikely(num_msdus > 1)) {
  1937. count = dp_rx_msdus_drop(soc, ring_desc,
  1938. &mpdu_desc_info,
  1939. &mac_id, quota);
  1940. rx_bufs_reaped[mac_id] += count;
  1941. goto next_entry;
  1942. }
  1943. /*
  1944. * this is a unlikely scenario where the host is reaping
  1945. * a descriptor which it already reaped just a while ago
  1946. * but is yet to replenish it back to HW.
  1947. * In this case host will dump the last 128 descriptors
  1948. * including the software descriptor rx_desc and assert.
  1949. */
  1950. if (qdf_unlikely(!rx_desc->in_use)) {
  1951. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1952. dp_info_rl("Reaping rx_desc not in use!");
  1953. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1954. ring_desc, rx_desc);
  1955. /* ignore duplicate RX desc and continue */
  1956. /* Pop out the descriptor */
  1957. goto next_entry;
  1958. }
  1959. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1960. msdu_list.paddr[0]);
  1961. if (!ret) {
  1962. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1963. rx_desc->in_err_state = 1;
  1964. goto next_entry;
  1965. }
  1966. count = dp_rx_frag_handle(soc,
  1967. ring_desc, &mpdu_desc_info,
  1968. rx_desc, &mac_id, quota);
  1969. rx_bufs_reaped[mac_id] += count;
  1970. DP_STATS_INC(soc, rx.rx_frags, 1);
  1971. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1972. mpdu_desc_info.peer_meta_data);
  1973. txrx_peer =
  1974. dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  1975. &txrx_ref_handle,
  1976. DP_MOD_ID_RX_ERR);
  1977. if (txrx_peer) {
  1978. DP_STATS_INC(txrx_peer->vdev,
  1979. rx.fragment_count, 1);
  1980. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1981. DP_MOD_ID_RX_ERR);
  1982. }
  1983. goto next_entry;
  1984. }
  1985. process_reo_error_code:
  1986. /*
  1987. * Expect REO errors to be handled after this point
  1988. */
  1989. qdf_assert_always(err_status == HAL_REO_ERROR_DETECTED);
  1990. dp_info_rl("Got pkt with REO ERROR: %d", error_code);
  1991. switch (error_code) {
  1992. case HAL_REO_ERR_PN_CHECK_FAILED:
  1993. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  1994. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  1995. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1996. if (dp_pdev)
  1997. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1998. count = dp_rx_pn_error_handle(soc,
  1999. ring_desc,
  2000. &mpdu_desc_info, &mac_id,
  2001. quota);
  2002. rx_bufs_reaped[mac_id] += count;
  2003. break;
  2004. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2005. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  2006. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2007. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2008. case HAL_REO_ERR_BAR_FRAME_OOR:
  2009. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2010. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2011. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2012. if (dp_pdev)
  2013. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2014. count = dp_rx_reo_err_entry_process(
  2015. soc,
  2016. ring_desc,
  2017. &mpdu_desc_info,
  2018. link_desc_va,
  2019. error_code);
  2020. rx_bufs_reaped[mac_id] += count;
  2021. break;
  2022. case HAL_REO_ERR_NON_BA_DUPLICATE:
  2023. dp_rx_err_dup_frame(soc, &mpdu_desc_info);
  2024. fallthrough;
  2025. case HAL_REO_ERR_QUEUE_DESC_INVALID:
  2026. case HAL_REO_ERR_AMPDU_IN_NON_BA:
  2027. case HAL_REO_ERR_BA_DUPLICATE:
  2028. case HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION:
  2029. case HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN:
  2030. case HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET:
  2031. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2032. count = dp_rx_msdus_drop(soc, ring_desc,
  2033. &mpdu_desc_info,
  2034. &mac_id, quota);
  2035. rx_bufs_reaped[mac_id] += count;
  2036. break;
  2037. default:
  2038. /* Assert if unexpected error type */
  2039. qdf_assert_always(0);
  2040. }
  2041. next_entry:
  2042. dp_rx_link_cookie_invalidate(ring_desc);
  2043. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2044. rx_bufs_reaped_total = 0;
  2045. for (i = 0; i < MAX_PDEV_CNT; i++)
  2046. rx_bufs_reaped_total += rx_bufs_reaped[i];
  2047. if (dp_rx_reap_loop_pkt_limit_hit(soc, rx_bufs_reaped_total,
  2048. max_reap_limit))
  2049. break;
  2050. }
  2051. done:
  2052. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2053. if (soc->rx.flags.defrag_timeout_check) {
  2054. uint32_t now_ms =
  2055. qdf_system_ticks_to_msecs(qdf_system_ticks());
  2056. if (now_ms >= soc->rx.defrag.next_flush_ms)
  2057. dp_rx_defrag_waitlist_flush(soc);
  2058. }
  2059. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2060. if (rx_bufs_reaped[mac_id]) {
  2061. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2062. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2063. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2064. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2065. rx_desc_pool,
  2066. rx_bufs_reaped[mac_id],
  2067. &dp_pdev->free_list_head,
  2068. &dp_pdev->free_list_tail,
  2069. false);
  2070. rx_bufs_used += rx_bufs_reaped[mac_id];
  2071. }
  2072. }
  2073. return rx_bufs_used; /* Assume no scale factor for now */
  2074. }
  2075. #ifdef DROP_RXDMA_DECRYPT_ERR
  2076. /**
  2077. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  2078. *
  2079. * Return: true if rxdma decrypt err frames are handled and false otherwise
  2080. */
  2081. static inline bool dp_handle_rxdma_decrypt_err(void)
  2082. {
  2083. return false;
  2084. }
  2085. #else
  2086. static inline bool dp_handle_rxdma_decrypt_err(void)
  2087. {
  2088. return true;
  2089. }
  2090. #endif
  2091. void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
  2092. {
  2093. if (soc->wbm_sg_last_msdu_war) {
  2094. uint32_t len;
  2095. qdf_nbuf_t temp = soc->wbm_sg_param.wbm_sg_nbuf_tail;
  2096. len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc,
  2097. qdf_nbuf_data(temp));
  2098. temp = soc->wbm_sg_param.wbm_sg_nbuf_head;
  2099. while (temp) {
  2100. QDF_NBUF_CB_RX_PKT_LEN(temp) = len;
  2101. temp = temp->next;
  2102. }
  2103. }
  2104. }
  2105. #ifdef RX_DESC_DEBUG_CHECK
  2106. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2107. hal_ring_handle_t hal_ring_hdl,
  2108. hal_ring_desc_t ring_desc,
  2109. struct dp_rx_desc *rx_desc)
  2110. {
  2111. struct hal_buf_info hbi;
  2112. hal_rx_wbm_rel_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2113. /* Sanity check for possible buffer paddr corruption */
  2114. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2115. return QDF_STATUS_SUCCESS;
  2116. hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
  2117. return QDF_STATUS_E_FAILURE;
  2118. }
  2119. #else
  2120. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2121. hal_ring_handle_t hal_ring_hdl,
  2122. hal_ring_desc_t ring_desc,
  2123. struct dp_rx_desc *rx_desc)
  2124. {
  2125. return QDF_STATUS_SUCCESS;
  2126. }
  2127. #endif
  2128. bool
  2129. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  2130. {
  2131. /*
  2132. * Currently Null Queue and Unencrypted error handlers has support for
  2133. * SG. Other error handler do not deal with SG buffer.
  2134. */
  2135. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  2136. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  2137. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  2138. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  2139. return true;
  2140. return false;
  2141. }
  2142. #ifdef QCA_DP_NBUF_FAST_RECYCLE_CHECK
  2143. void dp_rx_err_tlv_invalidate(struct dp_soc *soc,
  2144. qdf_nbuf_t nbuf)
  2145. {
  2146. /*
  2147. * In case of fast recycle TX driver can avoid invalidate
  2148. * of buffer in case of SFE forward. We need to invalidate
  2149. * the TLV headers after writing to this location
  2150. */
  2151. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2152. (void *)(nbuf->data +
  2153. soc->rx_pkt_tlv_size +
  2154. L3_HEADER_PAD));
  2155. }
  2156. #else
  2157. void dp_rx_err_tlv_invalidate(struct dp_soc *soc,
  2158. qdf_nbuf_t nbuf)
  2159. {
  2160. }
  2161. #endif
  2162. #ifndef CONFIG_NBUF_AP_PLATFORM
  2163. static inline uint16_t
  2164. dp_rx_get_peer_id(struct dp_soc *soc,
  2165. uint8_t *rx_tlv_hdr,
  2166. qdf_nbuf_t nbuf)
  2167. {
  2168. uint32_t peer_mdata = 0;
  2169. peer_mdata = hal_rx_tlv_peer_meta_data_get(soc->hal_soc,
  2170. rx_tlv_hdr);
  2171. return dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  2172. }
  2173. static inline void
  2174. dp_rx_get_wbm_err_info_from_nbuf(struct dp_soc *soc,
  2175. qdf_nbuf_t nbuf,
  2176. uint8_t *rx_tlv_hdr,
  2177. union hal_wbm_err_info_u *wbm_err)
  2178. {
  2179. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2180. (uint8_t *)&wbm_err->info,
  2181. sizeof(union hal_wbm_err_info_u));
  2182. }
  2183. void
  2184. dp_rx_set_wbm_err_info_in_nbuf(struct dp_soc *soc,
  2185. qdf_nbuf_t nbuf,
  2186. union hal_wbm_err_info_u wbm_err)
  2187. {
  2188. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  2189. qdf_nbuf_data(nbuf),
  2190. (uint8_t *)&wbm_err.info,
  2191. sizeof(union hal_wbm_err_info_u));
  2192. }
  2193. #else
  2194. static inline uint16_t
  2195. dp_rx_get_peer_id(struct dp_soc *soc,
  2196. uint8_t *rx_tlv_hdr,
  2197. qdf_nbuf_t nbuf)
  2198. {
  2199. uint32_t peer_mdata = QDF_NBUF_CB_RX_MPDU_DESC_INFO_2(nbuf);
  2200. return dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  2201. }
  2202. static inline void
  2203. dp_rx_get_wbm_err_info_from_nbuf(struct dp_soc *soc,
  2204. qdf_nbuf_t nbuf,
  2205. uint8_t *rx_tlv_hdr,
  2206. union hal_wbm_err_info_u *wbm_err)
  2207. {
  2208. wbm_err->info = QDF_NBUF_CB_RX_ERROR_CODE_INFO(nbuf);
  2209. }
  2210. void
  2211. dp_rx_set_wbm_err_info_in_nbuf(struct dp_soc *soc,
  2212. qdf_nbuf_t nbuf,
  2213. union hal_wbm_err_info_u wbm_err)
  2214. {
  2215. QDF_NBUF_CB_RX_ERROR_CODE_INFO(nbuf) = wbm_err.info;
  2216. }
  2217. #endif /* CONFIG_NBUF_AP_PLATFORM */
  2218. uint32_t
  2219. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2220. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2221. {
  2222. hal_soc_handle_t hal_soc;
  2223. uint32_t rx_bufs_used = 0;
  2224. struct dp_pdev *dp_pdev;
  2225. uint8_t *rx_tlv_hdr;
  2226. bool is_tkip_mic_err;
  2227. qdf_nbuf_t nbuf_head = NULL;
  2228. qdf_nbuf_t nbuf, next;
  2229. union hal_wbm_err_info_u wbm_err = { 0 };
  2230. uint8_t pool_id;
  2231. uint8_t tid = 0;
  2232. uint8_t link_id = 0;
  2233. /* Debug -- Remove later */
  2234. qdf_assert(soc && hal_ring_hdl);
  2235. hal_soc = soc->hal_soc;
  2236. /* Debug -- Remove later */
  2237. qdf_assert(hal_soc);
  2238. nbuf_head = soc->arch_ops.dp_rx_wbm_err_reap_desc(int_ctx, soc,
  2239. hal_ring_hdl,
  2240. quota,
  2241. &rx_bufs_used);
  2242. nbuf = nbuf_head;
  2243. while (nbuf) {
  2244. struct dp_txrx_peer *txrx_peer;
  2245. struct dp_peer *peer;
  2246. uint16_t peer_id;
  2247. uint8_t err_code;
  2248. uint8_t *tlv_hdr;
  2249. dp_txrx_ref_handle txrx_ref_handle = NULL;
  2250. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2251. /*
  2252. * retrieve the wbm desc info from nbuf CB/TLV, so we can
  2253. * handle error cases appropriately
  2254. */
  2255. dp_rx_get_wbm_err_info_from_nbuf(soc, nbuf,
  2256. rx_tlv_hdr,
  2257. &wbm_err);
  2258. peer_id = dp_rx_get_peer_id(soc,
  2259. rx_tlv_hdr,
  2260. nbuf);
  2261. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  2262. &txrx_ref_handle,
  2263. DP_MOD_ID_RX_ERR);
  2264. if (!txrx_peer)
  2265. dp_info_rl("peer is null peer_id %u err_src %u, "
  2266. "REO: push_rsn %u err_code %u, "
  2267. "RXDMA: push_rsn %u err_code %u",
  2268. peer_id, wbm_err.info_bit.wbm_err_src,
  2269. wbm_err.info_bit.reo_psh_rsn,
  2270. wbm_err.info_bit.reo_err_code,
  2271. wbm_err.info_bit.rxdma_psh_rsn,
  2272. wbm_err.info_bit.rxdma_err_code);
  2273. /* Set queue_mapping in nbuf to 0 */
  2274. dp_set_rx_queue(nbuf, 0);
  2275. next = nbuf->next;
  2276. /*
  2277. * Form the SG for msdu continued buffers
  2278. * QCN9000 has this support
  2279. */
  2280. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2281. nbuf = dp_rx_sg_create(soc, nbuf);
  2282. next = nbuf->next;
  2283. /*
  2284. * SG error handling is not done correctly,
  2285. * drop SG frames for now.
  2286. */
  2287. dp_rx_nbuf_free(nbuf);
  2288. dp_info_rl("scattered msdu dropped");
  2289. nbuf = next;
  2290. if (txrx_peer)
  2291. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2292. DP_MOD_ID_RX_ERR);
  2293. continue;
  2294. }
  2295. dp_rx_nbuf_set_link_id_from_tlv(soc, rx_tlv_hdr, nbuf);
  2296. pool_id = wbm_err.info_bit.pool_id;
  2297. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2298. if (dp_pdev && dp_pdev->link_peer_stats &&
  2299. txrx_peer && txrx_peer->is_mld_peer) {
  2300. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  2301. nbuf,
  2302. txrx_peer);
  2303. } else {
  2304. link_id = 0;
  2305. }
  2306. if (wbm_err.info_bit.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2307. if (wbm_err.info_bit.reo_psh_rsn
  2308. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2309. DP_STATS_INC(soc,
  2310. rx.err.reo_error
  2311. [wbm_err.info_bit.reo_err_code], 1);
  2312. /* increment @pdev level */
  2313. if (dp_pdev)
  2314. DP_STATS_INC(dp_pdev, err.reo_error,
  2315. 1);
  2316. switch (wbm_err.info_bit.reo_err_code) {
  2317. /*
  2318. * Handling for packets which have NULL REO
  2319. * queue descriptor
  2320. */
  2321. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2322. pool_id = wbm_err.info_bit.pool_id;
  2323. soc->arch_ops.dp_rx_null_q_desc_handle(
  2324. soc, nbuf,
  2325. rx_tlv_hdr,
  2326. pool_id,
  2327. txrx_peer,
  2328. FALSE,
  2329. link_id);
  2330. break;
  2331. /* TODO */
  2332. /* Add per error code accounting */
  2333. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2334. if (txrx_peer)
  2335. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2336. rx.err.jump_2k_err,
  2337. 1,
  2338. link_id);
  2339. pool_id = wbm_err.info_bit.pool_id;
  2340. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2341. rx_tlv_hdr)) {
  2342. tid =
  2343. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2344. }
  2345. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2346. hal_rx_msdu_start_msdu_len_get(
  2347. soc->hal_soc, rx_tlv_hdr);
  2348. nbuf->next = NULL;
  2349. dp_2k_jump_handle(soc, nbuf,
  2350. rx_tlv_hdr,
  2351. peer_id, tid);
  2352. break;
  2353. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2354. if (txrx_peer)
  2355. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2356. rx.err.oor_err,
  2357. 1,
  2358. link_id);
  2359. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2360. rx_tlv_hdr)) {
  2361. tid =
  2362. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2363. }
  2364. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2365. hal_rx_msdu_start_msdu_len_get(
  2366. soc->hal_soc, rx_tlv_hdr);
  2367. nbuf->next = NULL;
  2368. dp_rx_oor_handle(soc, nbuf,
  2369. peer_id,
  2370. rx_tlv_hdr);
  2371. break;
  2372. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2373. case HAL_REO_ERR_BAR_FRAME_OOR:
  2374. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2375. if (peer) {
  2376. dp_rx_err_handle_bar(soc, peer,
  2377. nbuf);
  2378. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2379. }
  2380. dp_rx_nbuf_free(nbuf);
  2381. break;
  2382. case HAL_REO_ERR_PN_CHECK_FAILED:
  2383. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2384. if (txrx_peer)
  2385. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2386. rx.err.pn_err,
  2387. 1,
  2388. link_id);
  2389. dp_rx_nbuf_free(nbuf);
  2390. break;
  2391. default:
  2392. dp_info_rl("Got pkt with REO ERROR: %d",
  2393. wbm_err.info_bit.
  2394. reo_err_code);
  2395. dp_rx_nbuf_free(nbuf);
  2396. }
  2397. } else if (wbm_err.info_bit.reo_psh_rsn
  2398. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2399. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2400. rx_tlv_hdr,
  2401. HAL_RX_WBM_ERR_SRC_REO,
  2402. link_id);
  2403. } else {
  2404. /* should not enter here */
  2405. dp_rx_err_alert("invalid reo push reason %u",
  2406. wbm_err.info_bit.reo_psh_rsn);
  2407. dp_rx_nbuf_free(nbuf);
  2408. dp_assert_always_internal(0);
  2409. }
  2410. } else if (wbm_err.info_bit.wbm_err_src ==
  2411. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2412. if (wbm_err.info_bit.rxdma_psh_rsn
  2413. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2414. DP_STATS_INC(soc,
  2415. rx.err.rxdma_error
  2416. [wbm_err.info_bit.rxdma_err_code], 1);
  2417. /* increment @pdev level */
  2418. if (dp_pdev)
  2419. DP_STATS_INC(dp_pdev,
  2420. err.rxdma_error, 1);
  2421. switch (wbm_err.info_bit.rxdma_err_code) {
  2422. case HAL_RXDMA_ERR_UNENCRYPTED:
  2423. case HAL_RXDMA_ERR_WIFI_PARSE:
  2424. if (txrx_peer)
  2425. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2426. rx.err.rxdma_wifi_parse_err,
  2427. 1,
  2428. link_id);
  2429. pool_id = wbm_err.info_bit.pool_id;
  2430. dp_rx_process_rxdma_err(soc, nbuf,
  2431. rx_tlv_hdr,
  2432. txrx_peer,
  2433. wbm_err.
  2434. info_bit.
  2435. rxdma_err_code,
  2436. pool_id,
  2437. link_id);
  2438. break;
  2439. case HAL_RXDMA_ERR_TKIP_MIC:
  2440. dp_rx_process_mic_error(soc, nbuf,
  2441. rx_tlv_hdr,
  2442. txrx_peer);
  2443. if (txrx_peer)
  2444. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2445. rx.err.mic_err,
  2446. 1,
  2447. link_id);
  2448. break;
  2449. case HAL_RXDMA_ERR_DECRYPT:
  2450. /* All the TKIP-MIC failures are treated as Decrypt Errors
  2451. * for QCN9224 Targets
  2452. */
  2453. is_tkip_mic_err = hal_rx_msdu_end_is_tkip_mic_err(hal_soc, rx_tlv_hdr);
  2454. if (is_tkip_mic_err && txrx_peer) {
  2455. dp_rx_process_mic_error(soc, nbuf,
  2456. rx_tlv_hdr,
  2457. txrx_peer);
  2458. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2459. rx.err.mic_err,
  2460. 1,
  2461. link_id);
  2462. break;
  2463. }
  2464. if (txrx_peer) {
  2465. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2466. rx.err.decrypt_err,
  2467. 1,
  2468. link_id);
  2469. dp_rx_nbuf_free(nbuf);
  2470. break;
  2471. }
  2472. if (!dp_handle_rxdma_decrypt_err()) {
  2473. dp_rx_nbuf_free(nbuf);
  2474. break;
  2475. }
  2476. pool_id = wbm_err.info_bit.pool_id;
  2477. err_code = wbm_err.info_bit.rxdma_err_code;
  2478. tlv_hdr = rx_tlv_hdr;
  2479. dp_rx_process_rxdma_err(soc, nbuf,
  2480. tlv_hdr, NULL,
  2481. err_code,
  2482. pool_id,
  2483. link_id);
  2484. break;
  2485. case HAL_RXDMA_MULTICAST_ECHO:
  2486. if (txrx_peer)
  2487. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2488. rx.mec_drop, 1,
  2489. qdf_nbuf_len(nbuf),
  2490. link_id);
  2491. dp_rx_nbuf_free(nbuf);
  2492. break;
  2493. case HAL_RXDMA_UNAUTHORIZED_WDS:
  2494. pool_id = wbm_err.info_bit.pool_id;
  2495. err_code = wbm_err.info_bit.rxdma_err_code;
  2496. tlv_hdr = rx_tlv_hdr;
  2497. dp_rx_process_rxdma_err(soc, nbuf,
  2498. tlv_hdr,
  2499. txrx_peer,
  2500. err_code,
  2501. pool_id,
  2502. link_id);
  2503. break;
  2504. default:
  2505. dp_rx_nbuf_free(nbuf);
  2506. dp_err_rl("RXDMA error %d",
  2507. wbm_err.info_bit.rxdma_err_code);
  2508. }
  2509. } else if (wbm_err.info_bit.rxdma_psh_rsn
  2510. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2511. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2512. rx_tlv_hdr,
  2513. HAL_RX_WBM_ERR_SRC_RXDMA,
  2514. link_id);
  2515. } else if (wbm_err.info_bit.rxdma_psh_rsn
  2516. == HAL_RX_WBM_RXDMA_PSH_RSN_FLUSH) {
  2517. dp_rx_err_err("rxdma push reason %u",
  2518. wbm_err.info_bit.rxdma_psh_rsn);
  2519. DP_STATS_INC(soc, rx.err.rx_flush_count, 1);
  2520. dp_rx_nbuf_free(nbuf);
  2521. } else {
  2522. /* should not enter here */
  2523. dp_rx_err_alert("invalid rxdma push reason %u",
  2524. wbm_err.info_bit.rxdma_psh_rsn);
  2525. dp_rx_nbuf_free(nbuf);
  2526. dp_assert_always_internal(0);
  2527. }
  2528. } else {
  2529. /* Should not come here */
  2530. qdf_assert(0);
  2531. }
  2532. if (txrx_peer)
  2533. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2534. DP_MOD_ID_RX_ERR);
  2535. nbuf = next;
  2536. }
  2537. return rx_bufs_used; /* Assume no scale factor for now */
  2538. }
  2539. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2540. /**
  2541. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2542. *
  2543. * @soc: core DP main context
  2544. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2545. * @rx_desc: void pointer to rx descriptor
  2546. *
  2547. * Return: void
  2548. */
  2549. static void dup_desc_dbg(struct dp_soc *soc,
  2550. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2551. void *rx_desc)
  2552. {
  2553. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2554. dp_rx_dump_info_and_assert(
  2555. soc,
  2556. soc->rx_rel_ring.hal_srng,
  2557. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2558. rx_desc);
  2559. }
  2560. /**
  2561. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2562. *
  2563. * @soc: core DP main context
  2564. * @mac_id: mac id which is one of 3 mac_ids
  2565. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2566. * @head: head of descs list to be freed
  2567. * @tail: tail of decs list to be freed
  2568. *
  2569. * Return: number of msdu in MPDU to be popped
  2570. */
  2571. static inline uint32_t
  2572. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2573. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2574. union dp_rx_desc_list_elem_t **head,
  2575. union dp_rx_desc_list_elem_t **tail)
  2576. {
  2577. void *rx_msdu_link_desc;
  2578. qdf_nbuf_t msdu;
  2579. qdf_nbuf_t last;
  2580. struct hal_rx_msdu_list msdu_list;
  2581. uint16_t num_msdus;
  2582. struct hal_buf_info buf_info;
  2583. uint32_t rx_bufs_used = 0;
  2584. uint32_t msdu_cnt;
  2585. uint32_t i;
  2586. uint8_t push_reason;
  2587. uint8_t rxdma_error_code = 0;
  2588. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2589. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2590. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2591. hal_rxdma_desc_t ring_desc;
  2592. struct rx_desc_pool *rx_desc_pool;
  2593. if (!pdev) {
  2594. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2595. soc, mac_id);
  2596. return rx_bufs_used;
  2597. }
  2598. msdu = 0;
  2599. last = NULL;
  2600. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2601. &buf_info, &msdu_cnt);
  2602. push_reason =
  2603. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2604. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2605. rxdma_error_code =
  2606. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2607. }
  2608. do {
  2609. rx_msdu_link_desc =
  2610. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2611. qdf_assert_always(rx_msdu_link_desc);
  2612. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2613. &msdu_list, &num_msdus);
  2614. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2615. /* if the msdus belongs to NSS offloaded radio &&
  2616. * the rbm is not SW1_BM then return the msdu_link
  2617. * descriptor without freeing the msdus (nbufs). let
  2618. * these buffers be given to NSS completion ring for
  2619. * NSS to free them.
  2620. * else iterate through the msdu link desc list and
  2621. * free each msdu in the list.
  2622. */
  2623. if (msdu_list.rbm[0] !=
  2624. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2625. wlan_cfg_get_dp_pdev_nss_enabled(
  2626. pdev->wlan_cfg_ctx))
  2627. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2628. else {
  2629. for (i = 0; i < num_msdus; i++) {
  2630. struct dp_rx_desc *rx_desc =
  2631. soc->arch_ops.
  2632. dp_rx_desc_cookie_2_va(
  2633. soc,
  2634. msdu_list.sw_cookie[i]);
  2635. qdf_assert_always(rx_desc);
  2636. msdu = rx_desc->nbuf;
  2637. /*
  2638. * this is a unlikely scenario
  2639. * where the host is reaping
  2640. * a descriptor which
  2641. * it already reaped just a while ago
  2642. * but is yet to replenish
  2643. * it back to HW.
  2644. * In this case host will dump
  2645. * the last 128 descriptors
  2646. * including the software descriptor
  2647. * rx_desc and assert.
  2648. */
  2649. ring_desc = rxdma_dst_ring_desc;
  2650. if (qdf_unlikely(!rx_desc->in_use)) {
  2651. dup_desc_dbg(soc,
  2652. ring_desc,
  2653. rx_desc);
  2654. continue;
  2655. }
  2656. if (rx_desc->unmapped == 0) {
  2657. rx_desc_pool =
  2658. &soc->rx_desc_buf[rx_desc->pool_id];
  2659. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2660. dp_rx_nbuf_unmap_pool(soc,
  2661. rx_desc_pool,
  2662. msdu);
  2663. rx_desc->unmapped = 1;
  2664. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2665. }
  2666. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  2667. soc, msdu);
  2668. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2669. rx_desc->pool_id);
  2670. rx_bufs_used++;
  2671. dp_rx_add_to_free_desc_list(head,
  2672. tail, rx_desc);
  2673. }
  2674. }
  2675. } else {
  2676. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  2677. }
  2678. /*
  2679. * Store the current link buffer into to the local structure
  2680. * to be used for release purpose.
  2681. */
  2682. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2683. buf_info.paddr, buf_info.sw_cookie,
  2684. buf_info.rbm);
  2685. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2686. &buf_info);
  2687. dp_rx_link_desc_return_by_addr(soc,
  2688. (hal_buff_addrinfo_t)
  2689. rx_link_buf_info,
  2690. bm_action);
  2691. } while (buf_info.paddr);
  2692. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  2693. if (pdev)
  2694. DP_STATS_INC(pdev, err.rxdma_error, 1);
  2695. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  2696. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  2697. }
  2698. return rx_bufs_used;
  2699. }
  2700. uint32_t
  2701. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2702. uint32_t mac_id, uint32_t quota)
  2703. {
  2704. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2705. hal_rxdma_desc_t rxdma_dst_ring_desc;
  2706. hal_soc_handle_t hal_soc;
  2707. void *err_dst_srng;
  2708. union dp_rx_desc_list_elem_t *head = NULL;
  2709. union dp_rx_desc_list_elem_t *tail = NULL;
  2710. struct dp_srng *dp_rxdma_srng;
  2711. struct rx_desc_pool *rx_desc_pool;
  2712. uint32_t work_done = 0;
  2713. uint32_t rx_bufs_used = 0;
  2714. if (!pdev)
  2715. return 0;
  2716. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  2717. if (!err_dst_srng) {
  2718. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2719. soc, err_dst_srng);
  2720. return 0;
  2721. }
  2722. hal_soc = soc->hal_soc;
  2723. qdf_assert(hal_soc);
  2724. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  2725. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2726. soc, err_dst_srng);
  2727. return 0;
  2728. }
  2729. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  2730. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  2731. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  2732. rxdma_dst_ring_desc,
  2733. &head, &tail);
  2734. }
  2735. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  2736. if (rx_bufs_used) {
  2737. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2738. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2739. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2740. } else {
  2741. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  2742. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  2743. }
  2744. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2745. rx_desc_pool, rx_bufs_used, &head, &tail, false);
  2746. work_done += rx_bufs_used;
  2747. }
  2748. return work_done;
  2749. }
  2750. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2751. static inline void
  2752. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2753. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2754. union dp_rx_desc_list_elem_t **head,
  2755. union dp_rx_desc_list_elem_t **tail,
  2756. uint32_t *rx_bufs_used)
  2757. {
  2758. void *rx_msdu_link_desc;
  2759. qdf_nbuf_t msdu;
  2760. qdf_nbuf_t last;
  2761. struct hal_rx_msdu_list msdu_list;
  2762. uint16_t num_msdus;
  2763. struct hal_buf_info buf_info;
  2764. uint32_t msdu_cnt, i;
  2765. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2766. struct rx_desc_pool *rx_desc_pool;
  2767. struct dp_rx_desc *rx_desc;
  2768. msdu = 0;
  2769. last = NULL;
  2770. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2771. &buf_info, &msdu_cnt);
  2772. do {
  2773. rx_msdu_link_desc =
  2774. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2775. if (!rx_msdu_link_desc) {
  2776. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  2777. break;
  2778. }
  2779. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2780. &msdu_list, &num_msdus);
  2781. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2782. for (i = 0; i < num_msdus; i++) {
  2783. if (!dp_rx_is_sw_cookie_valid(soc, msdu_list.sw_cookie[i])) {
  2784. dp_rx_err_info_rl("Invalid MSDU info cookie: 0x%x",
  2785. msdu_list.sw_cookie[i]);
  2786. continue;
  2787. }
  2788. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2789. soc,
  2790. msdu_list.sw_cookie[i]);
  2791. qdf_assert_always(rx_desc);
  2792. rx_desc_pool =
  2793. &soc->rx_desc_buf[rx_desc->pool_id];
  2794. msdu = rx_desc->nbuf;
  2795. /*
  2796. * this is a unlikely scenario where the host is reaping
  2797. * a descriptor which it already reaped just a while ago
  2798. * but is yet to replenish it back to HW.
  2799. */
  2800. if (qdf_unlikely(!rx_desc->in_use) ||
  2801. qdf_unlikely(!msdu)) {
  2802. dp_rx_err_info_rl("Reaping rx_desc not in use!");
  2803. continue;
  2804. }
  2805. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2806. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, msdu);
  2807. rx_desc->unmapped = 1;
  2808. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2809. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2810. rx_desc->pool_id);
  2811. rx_bufs_used[rx_desc->pool_id]++;
  2812. dp_rx_add_to_free_desc_list(head,
  2813. tail, rx_desc);
  2814. }
  2815. }
  2816. /*
  2817. * Store the current link buffer into to the local structure
  2818. * to be used for release purpose.
  2819. */
  2820. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2821. buf_info.paddr, buf_info.sw_cookie,
  2822. buf_info.rbm);
  2823. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2824. &buf_info);
  2825. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  2826. rx_link_buf_info,
  2827. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  2828. } while (buf_info.paddr);
  2829. }
  2830. void
  2831. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  2832. uint32_t buf_type)
  2833. {
  2834. struct hal_buf_info buf_info = {0};
  2835. struct dp_rx_desc *rx_desc = NULL;
  2836. struct rx_desc_pool *rx_desc_pool;
  2837. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = {0};
  2838. union dp_rx_desc_list_elem_t *head = NULL;
  2839. union dp_rx_desc_list_elem_t *tail = NULL;
  2840. uint8_t pool_id;
  2841. uint8_t mac_id;
  2842. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  2843. if (!buf_info.paddr) {
  2844. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  2845. return;
  2846. }
  2847. /* buffer_addr_info is the first element of ring_desc */
  2848. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  2849. &buf_info);
  2850. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  2851. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  2852. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2853. soc,
  2854. buf_info.sw_cookie);
  2855. if (rx_desc && rx_desc->nbuf) {
  2856. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2857. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2858. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool,
  2859. rx_desc->nbuf);
  2860. rx_desc->unmapped = 1;
  2861. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2862. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  2863. rx_desc->pool_id);
  2864. dp_rx_add_to_free_desc_list(&head,
  2865. &tail,
  2866. rx_desc);
  2867. rx_bufs_reaped[rx_desc->pool_id]++;
  2868. }
  2869. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  2870. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  2871. dp_wbm_int_err_mpdu_pop(soc, pool_id, hal_desc,
  2872. &head, &tail, rx_bufs_reaped);
  2873. }
  2874. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2875. struct rx_desc_pool *rx_desc_pool;
  2876. struct dp_srng *dp_rxdma_srng;
  2877. if (!rx_bufs_reaped[mac_id])
  2878. continue;
  2879. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  2880. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2881. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2882. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2883. rx_desc_pool,
  2884. rx_bufs_reaped[mac_id],
  2885. &head, &tail, false);
  2886. }
  2887. }
  2888. #endif /* QCA_HOST_MODE_WIFI_DISABLED */