dp_rx.c 91 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #ifndef WLAN_SOFTUMAC_SUPPORT /* WLAN_SOFTUMAC_SUPPORT */
  45. #ifdef DUP_RX_DESC_WAR
  46. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  47. hal_ring_handle_t hal_ring,
  48. hal_ring_desc_t ring_desc,
  49. struct dp_rx_desc *rx_desc)
  50. {
  51. void *hal_soc = soc->hal_soc;
  52. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  53. dp_rx_desc_dump(rx_desc);
  54. }
  55. #else
  56. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  57. hal_ring_handle_t hal_ring_hdl,
  58. hal_ring_desc_t ring_desc,
  59. struct dp_rx_desc *rx_desc)
  60. {
  61. hal_soc_handle_t hal_soc = soc->hal_soc;
  62. dp_rx_desc_dump(rx_desc);
  63. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  64. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  65. qdf_assert_always(0);
  66. }
  67. #endif
  68. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  69. #ifdef RX_DESC_SANITY_WAR
  70. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  71. hal_ring_handle_t hal_ring_hdl,
  72. hal_ring_desc_t ring_desc,
  73. struct dp_rx_desc *rx_desc)
  74. {
  75. uint8_t return_buffer_manager;
  76. if (qdf_unlikely(!rx_desc)) {
  77. /*
  78. * This is an unlikely case where the cookie obtained
  79. * from the ring_desc is invalid and hence we are not
  80. * able to find the corresponding rx_desc
  81. */
  82. goto fail;
  83. }
  84. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  85. if (qdf_unlikely(!(return_buffer_manager ==
  86. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  87. return_buffer_manager ==
  88. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  89. goto fail;
  90. }
  91. return QDF_STATUS_SUCCESS;
  92. fail:
  93. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  94. dp_err("Ring Desc:");
  95. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  96. ring_desc);
  97. return QDF_STATUS_E_NULL_VALUE;
  98. }
  99. #endif
  100. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  101. hal_ring_handle_t hal_ring_hdl,
  102. uint32_t num_entries,
  103. bool *near_full)
  104. {
  105. uint32_t num_pending = 0;
  106. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  107. hal_ring_hdl,
  108. true);
  109. if (num_entries && (num_pending >= num_entries >> 1))
  110. *near_full = true;
  111. else
  112. *near_full = false;
  113. return num_pending;
  114. }
  115. #ifdef RX_DESC_DEBUG_CHECK
  116. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  117. hal_ring_desc_t ring_desc,
  118. struct dp_rx_desc *rx_desc)
  119. {
  120. struct hal_buf_info hbi;
  121. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  122. /* Sanity check for possible buffer paddr corruption */
  123. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  124. return QDF_STATUS_SUCCESS;
  125. return QDF_STATUS_E_FAILURE;
  126. }
  127. /**
  128. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  129. * out of bound access from H.W
  130. *
  131. * @soc: DP soc
  132. * @pkt_len: Packet length received from H.W
  133. *
  134. * Return: NONE
  135. */
  136. static inline void
  137. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  138. uint32_t pkt_len)
  139. {
  140. struct rx_desc_pool *rx_desc_pool;
  141. rx_desc_pool = &soc->rx_desc_buf[0];
  142. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  143. }
  144. #else
  145. static inline void
  146. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  147. #endif
  148. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  149. void
  150. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  151. hal_ring_desc_t ring_desc)
  152. {
  153. struct dp_buf_info_record *record;
  154. struct hal_buf_info hbi;
  155. uint32_t idx;
  156. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  157. return;
  158. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  159. /* buffer_addr_info is the first element of ring_desc */
  160. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  161. &hbi);
  162. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  163. DP_RX_HIST_MAX);
  164. /* No NULL check needed for record since its an array */
  165. record = &soc->rx_ring_history[ring_num]->entry[idx];
  166. record->timestamp = qdf_get_log_timestamp();
  167. record->hbi.paddr = hbi.paddr;
  168. record->hbi.sw_cookie = hbi.sw_cookie;
  169. record->hbi.rbm = hbi.rbm;
  170. }
  171. #endif
  172. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  173. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  174. uint8_t *rx_tlv,
  175. qdf_nbuf_t nbuf)
  176. {
  177. struct dp_soc *soc;
  178. if (!pdev->is_first_wakeup_packet)
  179. return;
  180. soc = pdev->soc;
  181. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  182. qdf_nbuf_mark_wakeup_frame(nbuf);
  183. dp_info("First packet after WOW Wakeup rcvd");
  184. }
  185. }
  186. #endif
  187. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  188. #endif /* WLAN_SOFTUMAC_SUPPORT */
  189. /**
  190. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  191. *
  192. * @dp_soc: struct dp_soc *
  193. * @nbuf_frag_info_t: nbuf frag info
  194. * @dp_pdev: struct dp_pdev *
  195. * @rx_desc_pool: Rx desc pool
  196. *
  197. * Return: QDF_STATUS
  198. */
  199. #ifdef DP_RX_MON_MEM_FRAG
  200. static inline QDF_STATUS
  201. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  202. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  203. struct dp_pdev *dp_pdev,
  204. struct rx_desc_pool *rx_desc_pool)
  205. {
  206. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  207. (nbuf_frag_info_t->virt_addr).vaddr =
  208. qdf_frag_alloc(NULL, rx_desc_pool->buf_size);
  209. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  210. dp_err("Frag alloc failed");
  211. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  212. return QDF_STATUS_E_NOMEM;
  213. }
  214. ret = qdf_mem_map_page(dp_soc->osdev,
  215. (nbuf_frag_info_t->virt_addr).vaddr,
  216. QDF_DMA_FROM_DEVICE,
  217. rx_desc_pool->buf_size,
  218. &nbuf_frag_info_t->paddr);
  219. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  220. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  221. dp_err("Frag map failed");
  222. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  223. return QDF_STATUS_E_FAULT;
  224. }
  225. return QDF_STATUS_SUCCESS;
  226. }
  227. #else
  228. static inline QDF_STATUS
  229. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  230. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  231. struct dp_pdev *dp_pdev,
  232. struct rx_desc_pool *rx_desc_pool)
  233. {
  234. return QDF_STATUS_SUCCESS;
  235. }
  236. #endif /* DP_RX_MON_MEM_FRAG */
  237. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  238. /**
  239. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  240. * @soc: Datapath soc structure
  241. * @ring_num: Refill ring number
  242. * @hal_ring_hdl:
  243. * @num_req: number of buffers requested for refill
  244. * @num_refill: number of buffers refilled
  245. *
  246. * Return: None
  247. */
  248. static inline void
  249. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  250. hal_ring_handle_t hal_ring_hdl,
  251. uint32_t num_req, uint32_t num_refill)
  252. {
  253. struct dp_refill_info_record *record;
  254. uint32_t idx;
  255. uint32_t tp;
  256. uint32_t hp;
  257. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  258. !soc->rx_refill_ring_history[ring_num]))
  259. return;
  260. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  261. DP_RX_REFILL_HIST_MAX);
  262. /* No NULL check needed for record since its an array */
  263. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  264. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  265. record->timestamp = qdf_get_log_timestamp();
  266. record->num_req = num_req;
  267. record->num_refill = num_refill;
  268. record->hp = hp;
  269. record->tp = tp;
  270. }
  271. #else
  272. static inline void
  273. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  274. hal_ring_handle_t hal_ring_hdl,
  275. uint32_t num_req, uint32_t num_refill)
  276. {
  277. }
  278. #endif
  279. /**
  280. * dp_pdev_nbuf_alloc_and_map_replenish() - Allocate nbuf for desc buffer and
  281. * map
  282. * @dp_soc: struct dp_soc *
  283. * @mac_id: Mac id
  284. * @num_entries_avail: num_entries_avail
  285. * @nbuf_frag_info_t: nbuf frag info
  286. * @dp_pdev: struct dp_pdev *
  287. * @rx_desc_pool: Rx desc pool
  288. *
  289. * Return: QDF_STATUS
  290. */
  291. static inline QDF_STATUS
  292. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  293. uint32_t mac_id,
  294. uint32_t num_entries_avail,
  295. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  296. struct dp_pdev *dp_pdev,
  297. struct rx_desc_pool *rx_desc_pool)
  298. {
  299. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  300. (nbuf_frag_info_t->virt_addr).nbuf =
  301. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  302. mac_id,
  303. rx_desc_pool,
  304. num_entries_avail);
  305. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  306. dp_err("nbuf alloc failed");
  307. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  308. return QDF_STATUS_E_NOMEM;
  309. }
  310. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  311. nbuf_frag_info_t);
  312. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  313. dp_rx_buffer_pool_nbuf_free(dp_soc,
  314. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  315. dp_err("nbuf map failed");
  316. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  317. return QDF_STATUS_E_FAULT;
  318. }
  319. nbuf_frag_info_t->paddr =
  320. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  321. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, (qdf_nbuf_t)(
  322. (nbuf_frag_info_t->virt_addr).nbuf),
  323. rx_desc_pool->buf_size,
  324. true, __func__, __LINE__);
  325. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  326. &nbuf_frag_info_t->paddr,
  327. rx_desc_pool);
  328. if (ret == QDF_STATUS_E_FAILURE) {
  329. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  330. return QDF_STATUS_E_ADDRNOTAVAIL;
  331. }
  332. return QDF_STATUS_SUCCESS;
  333. }
  334. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  335. QDF_STATUS
  336. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  337. struct dp_srng *dp_rxdma_srng,
  338. struct rx_desc_pool *rx_desc_pool)
  339. {
  340. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  341. uint32_t count;
  342. void *rxdma_ring_entry;
  343. union dp_rx_desc_list_elem_t *next = NULL;
  344. void *rxdma_srng;
  345. qdf_nbuf_t nbuf;
  346. qdf_dma_addr_t paddr;
  347. uint16_t num_entries_avail = 0;
  348. uint16_t num_alloc_desc = 0;
  349. union dp_rx_desc_list_elem_t *desc_list = NULL;
  350. union dp_rx_desc_list_elem_t *tail = NULL;
  351. int sync_hw_ptr = 0;
  352. rxdma_srng = dp_rxdma_srng->hal_srng;
  353. if (qdf_unlikely(!dp_pdev)) {
  354. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  355. return QDF_STATUS_E_FAILURE;
  356. }
  357. if (qdf_unlikely(!rxdma_srng)) {
  358. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  359. return QDF_STATUS_E_FAILURE;
  360. }
  361. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  362. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  363. rxdma_srng,
  364. sync_hw_ptr);
  365. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  366. soc, num_entries_avail);
  367. if (qdf_unlikely(num_entries_avail <
  368. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  369. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  370. return QDF_STATUS_E_FAILURE;
  371. }
  372. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  373. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  374. rx_desc_pool,
  375. num_entries_avail,
  376. &desc_list,
  377. &tail);
  378. if (!num_alloc_desc) {
  379. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  380. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  381. num_entries_avail);
  382. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  383. return QDF_STATUS_E_NOMEM;
  384. }
  385. for (count = 0; count < num_alloc_desc; count++) {
  386. next = desc_list->next;
  387. qdf_prefetch(next);
  388. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  389. if (qdf_unlikely(!nbuf)) {
  390. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  391. break;
  392. }
  393. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  394. rx_desc_pool->buf_size);
  395. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  396. rxdma_srng);
  397. qdf_assert_always(rxdma_ring_entry);
  398. desc_list->rx_desc.nbuf = nbuf;
  399. dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
  400. desc_list->rx_desc.rx_buf_start = nbuf->data;
  401. desc_list->rx_desc.paddr_buf_start = paddr;
  402. desc_list->rx_desc.unmapped = 0;
  403. /* rx_desc.in_use should be zero at this time*/
  404. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  405. desc_list->rx_desc.in_use = 1;
  406. desc_list->rx_desc.in_err_state = 0;
  407. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  408. paddr,
  409. desc_list->rx_desc.cookie,
  410. rx_desc_pool->owner);
  411. desc_list = next;
  412. }
  413. qdf_dsb();
  414. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  415. /* No need to count the number of bytes received during replenish.
  416. * Therefore set replenish.pkts.bytes as 0.
  417. */
  418. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  419. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  420. /*
  421. * add any available free desc back to the free list
  422. */
  423. if (desc_list)
  424. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  425. mac_id, rx_desc_pool);
  426. return QDF_STATUS_SUCCESS;
  427. }
  428. QDF_STATUS
  429. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  430. struct dp_srng *dp_rxdma_srng,
  431. struct rx_desc_pool *rx_desc_pool,
  432. uint32_t num_req_buffers,
  433. union dp_rx_desc_list_elem_t **desc_list,
  434. union dp_rx_desc_list_elem_t **tail)
  435. {
  436. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  437. uint32_t count;
  438. void *rxdma_ring_entry;
  439. union dp_rx_desc_list_elem_t *next;
  440. void *rxdma_srng;
  441. qdf_nbuf_t nbuf;
  442. qdf_nbuf_t nbuf_next;
  443. qdf_nbuf_t nbuf_head = NULL;
  444. qdf_nbuf_t nbuf_tail = NULL;
  445. qdf_dma_addr_t paddr;
  446. rxdma_srng = dp_rxdma_srng->hal_srng;
  447. if (qdf_unlikely(!dp_pdev)) {
  448. dp_rx_err("%pK: pdev is null for mac_id = %d",
  449. soc, mac_id);
  450. return QDF_STATUS_E_FAILURE;
  451. }
  452. if (qdf_unlikely(!rxdma_srng)) {
  453. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  454. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  455. return QDF_STATUS_E_FAILURE;
  456. }
  457. /* Allocate required number of nbufs */
  458. for (count = 0; count < num_req_buffers; count++) {
  459. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  460. if (qdf_unlikely(!nbuf)) {
  461. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  462. /* Update num_req_buffers to nbufs allocated count */
  463. num_req_buffers = count;
  464. break;
  465. }
  466. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  467. rx_desc_pool->buf_size);
  468. QDF_NBUF_CB_PADDR(nbuf) = paddr;
  469. DP_RX_LIST_APPEND(nbuf_head,
  470. nbuf_tail,
  471. nbuf);
  472. }
  473. qdf_dsb();
  474. nbuf = nbuf_head;
  475. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  476. for (count = 0; count < num_req_buffers; count++) {
  477. next = (*desc_list)->next;
  478. nbuf_next = nbuf->next;
  479. qdf_prefetch(next);
  480. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  481. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  482. if (!rxdma_ring_entry)
  483. break;
  484. (*desc_list)->rx_desc.nbuf = nbuf;
  485. dp_rx_set_reuse_nbuf(&(*desc_list)->rx_desc, nbuf);
  486. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  487. (*desc_list)->rx_desc.paddr_buf_start = QDF_NBUF_CB_PADDR(nbuf);
  488. (*desc_list)->rx_desc.unmapped = 0;
  489. /* rx_desc.in_use should be zero at this time*/
  490. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  491. (*desc_list)->rx_desc.in_use = 1;
  492. (*desc_list)->rx_desc.in_err_state = 0;
  493. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  494. QDF_NBUF_CB_PADDR(nbuf),
  495. (*desc_list)->rx_desc.cookie,
  496. rx_desc_pool->owner);
  497. *desc_list = next;
  498. nbuf = nbuf_next;
  499. }
  500. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  501. /* No need to count the number of bytes received during replenish.
  502. * Therefore set replenish.pkts.bytes as 0.
  503. */
  504. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  505. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  506. /*
  507. * add any available free desc back to the free list
  508. */
  509. if (*desc_list)
  510. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  511. mac_id, rx_desc_pool);
  512. while (nbuf) {
  513. nbuf_next = nbuf->next;
  514. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  515. qdf_nbuf_free(nbuf);
  516. nbuf = nbuf_next;
  517. }
  518. return QDF_STATUS_SUCCESS;
  519. }
  520. #ifdef WLAN_SUPPORT_PPEDS
  521. QDF_STATUS
  522. __dp_rx_comp2refill_replenish(struct dp_soc *soc, uint32_t mac_id,
  523. struct dp_srng *dp_rxdma_srng,
  524. struct rx_desc_pool *rx_desc_pool,
  525. uint32_t num_req_buffers,
  526. union dp_rx_desc_list_elem_t **desc_list,
  527. union dp_rx_desc_list_elem_t **tail)
  528. {
  529. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  530. uint32_t count;
  531. void *rxdma_ring_entry;
  532. union dp_rx_desc_list_elem_t *next;
  533. union dp_rx_desc_list_elem_t *cur;
  534. void *rxdma_srng;
  535. qdf_nbuf_t nbuf;
  536. rxdma_srng = dp_rxdma_srng->hal_srng;
  537. if (qdf_unlikely(!dp_pdev)) {
  538. dp_rx_err("%pK: pdev is null for mac_id = %d",
  539. soc, mac_id);
  540. return QDF_STATUS_E_FAILURE;
  541. }
  542. if (qdf_unlikely(!rxdma_srng)) {
  543. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  544. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  545. return QDF_STATUS_E_FAILURE;
  546. }
  547. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  548. for (count = 0; count < num_req_buffers; count++) {
  549. next = (*desc_list)->next;
  550. qdf_prefetch(next);
  551. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  552. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  553. if (!rxdma_ring_entry)
  554. break;
  555. (*desc_list)->rx_desc.in_use = 1;
  556. (*desc_list)->rx_desc.in_err_state = 0;
  557. (*desc_list)->rx_desc.nbuf = (*desc_list)->rx_desc.reuse_nbuf;
  558. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  559. (*desc_list)->rx_desc.paddr_buf_start,
  560. (*desc_list)->rx_desc.cookie,
  561. rx_desc_pool->owner);
  562. *desc_list = next;
  563. }
  564. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  565. /* No need to count the number of bytes received during replenish.
  566. * Therefore set replenish.pkts.bytes as 0.
  567. */
  568. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  569. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  570. /*
  571. * add any available free desc back to the free list
  572. */
  573. cur = *desc_list;
  574. for ( ; count < num_req_buffers; count++) {
  575. next = cur->next;
  576. qdf_prefetch(next);
  577. nbuf = cur->rx_desc.reuse_nbuf;
  578. cur->rx_desc.nbuf = NULL;
  579. cur->rx_desc.in_use = 0;
  580. cur->rx_desc.has_reuse_nbuf = false;
  581. cur->rx_desc.reuse_nbuf = NULL;
  582. if (!nbuf->recycled_for_ds)
  583. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  584. nbuf->recycled_for_ds = 0;
  585. nbuf->fast_recycled = 0;
  586. qdf_nbuf_free(nbuf);
  587. cur = next;
  588. }
  589. if (*desc_list)
  590. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  591. mac_id, rx_desc_pool);
  592. return QDF_STATUS_SUCCESS;
  593. }
  594. #endif
  595. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  596. uint32_t mac_id,
  597. struct dp_srng *dp_rxdma_srng,
  598. struct rx_desc_pool *rx_desc_pool,
  599. uint32_t num_req_buffers)
  600. {
  601. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  602. uint32_t count;
  603. uint32_t nr_descs = 0;
  604. void *rxdma_ring_entry;
  605. union dp_rx_desc_list_elem_t *next;
  606. void *rxdma_srng;
  607. qdf_nbuf_t nbuf;
  608. qdf_dma_addr_t paddr;
  609. union dp_rx_desc_list_elem_t *desc_list = NULL;
  610. union dp_rx_desc_list_elem_t *tail = NULL;
  611. rxdma_srng = dp_rxdma_srng->hal_srng;
  612. if (qdf_unlikely(!dp_pdev)) {
  613. dp_rx_err("%pK: pdev is null for mac_id = %d",
  614. soc, mac_id);
  615. return QDF_STATUS_E_FAILURE;
  616. }
  617. if (qdf_unlikely(!rxdma_srng)) {
  618. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  619. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  620. return QDF_STATUS_E_FAILURE;
  621. }
  622. dp_rx_debug("%pK: requested %d buffers for replenish",
  623. soc, num_req_buffers);
  624. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  625. num_req_buffers, &desc_list, &tail);
  626. if (!nr_descs) {
  627. dp_err("no free rx_descs in freelist");
  628. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  629. return QDF_STATUS_E_NOMEM;
  630. }
  631. dp_debug("got %u RX descs for driver attach", nr_descs);
  632. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  633. for (count = 0; count < nr_descs; count++) {
  634. next = desc_list->next;
  635. qdf_prefetch(next);
  636. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  637. if (qdf_unlikely(!nbuf)) {
  638. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  639. break;
  640. }
  641. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  642. rx_desc_pool->buf_size);
  643. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  644. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  645. if (!rxdma_ring_entry)
  646. break;
  647. qdf_assert_always(rxdma_ring_entry);
  648. desc_list->rx_desc.nbuf = nbuf;
  649. dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
  650. desc_list->rx_desc.rx_buf_start = nbuf->data;
  651. desc_list->rx_desc.paddr_buf_start = paddr;
  652. desc_list->rx_desc.unmapped = 0;
  653. /* rx_desc.in_use should be zero at this time*/
  654. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  655. desc_list->rx_desc.in_use = 1;
  656. desc_list->rx_desc.in_err_state = 0;
  657. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  658. paddr,
  659. desc_list->rx_desc.cookie,
  660. rx_desc_pool->owner);
  661. desc_list = next;
  662. }
  663. qdf_dsb();
  664. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  665. /* No need to count the number of bytes received during replenish.
  666. * Therefore set replenish.pkts.bytes as 0.
  667. */
  668. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  669. return QDF_STATUS_SUCCESS;
  670. }
  671. #endif
  672. #ifdef DP_UMAC_HW_RESET_SUPPORT
  673. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  674. static inline
  675. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  676. uint32_t buf_size)
  677. {
  678. return dp_rx_nbuf_sync_no_dsb(dp_soc, nbuf, buf_size);
  679. }
  680. #else
  681. static inline
  682. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  683. uint32_t buf_size)
  684. {
  685. return qdf_nbuf_get_frag_paddr(nbuf, 0);
  686. }
  687. #endif
  688. /**
  689. * dp_rx_desc_replenish() - Replenish the rx descriptors one at a time
  690. * @soc: core txrx main context
  691. * @dp_rxdma_srng: rxdma ring
  692. * @rx_desc_pool: rx descriptor pool
  693. * @rx_desc:rx descriptor
  694. *
  695. * Return: void
  696. */
  697. static inline
  698. void dp_rx_desc_replenish(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  699. struct rx_desc_pool *rx_desc_pool,
  700. struct dp_rx_desc *rx_desc)
  701. {
  702. void *rxdma_srng;
  703. void *rxdma_ring_entry;
  704. qdf_dma_addr_t paddr;
  705. rxdma_srng = dp_rxdma_srng->hal_srng;
  706. /* No one else should be accessing the srng at this point */
  707. hal_srng_access_start_unlocked(soc->hal_soc, rxdma_srng);
  708. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  709. qdf_assert_always(rxdma_ring_entry);
  710. rx_desc->in_err_state = 0;
  711. paddr = dp_rx_rep_retrieve_paddr(soc, rx_desc->nbuf,
  712. rx_desc_pool->buf_size);
  713. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry, paddr,
  714. rx_desc->cookie, rx_desc_pool->owner);
  715. hal_srng_access_end_unlocked(soc->hal_soc, rxdma_srng);
  716. }
  717. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list)
  718. {
  719. int mac_id, i, j;
  720. union dp_rx_desc_list_elem_t *head = NULL;
  721. union dp_rx_desc_list_elem_t *tail = NULL;
  722. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  723. struct dp_srng *dp_rxdma_srng =
  724. &soc->rx_refill_buf_ring[mac_id];
  725. struct rx_desc_pool *rx_desc_pool = &soc->rx_desc_buf[mac_id];
  726. uint32_t rx_sw_desc_num = rx_desc_pool->pool_size;
  727. /* Only fill up 1/3 of the ring size */
  728. uint32_t num_req_decs;
  729. if (!dp_rxdma_srng || !dp_rxdma_srng->hal_srng ||
  730. !rx_desc_pool->array)
  731. continue;
  732. num_req_decs = dp_rxdma_srng->num_entries / 3;
  733. for (i = 0, j = 0; i < rx_sw_desc_num; i++) {
  734. struct dp_rx_desc *rx_desc =
  735. (struct dp_rx_desc *)&rx_desc_pool->array[i];
  736. if (rx_desc->in_use) {
  737. if (j < (dp_rxdma_srng->num_entries - 1)) {
  738. dp_rx_desc_replenish(soc, dp_rxdma_srng,
  739. rx_desc_pool,
  740. rx_desc);
  741. } else {
  742. dp_rx_nbuf_unmap(soc, rx_desc, 0);
  743. rx_desc->unmapped = 0;
  744. rx_desc->nbuf->next = *nbuf_list;
  745. *nbuf_list = rx_desc->nbuf;
  746. dp_rx_add_to_free_desc_list(&head,
  747. &tail,
  748. rx_desc);
  749. }
  750. j++;
  751. }
  752. }
  753. if (head)
  754. dp_rx_add_desc_list_to_free_list(soc, &head, &tail,
  755. mac_id, rx_desc_pool);
  756. /* If num of descs in use were less, then we need to replenish
  757. * the ring with some buffers
  758. */
  759. head = NULL;
  760. tail = NULL;
  761. if (j < (num_req_decs - 1))
  762. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  763. rx_desc_pool,
  764. ((num_req_decs - 1) - j),
  765. &head, &tail, true);
  766. }
  767. }
  768. #endif
  769. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  770. struct dp_srng *dp_rxdma_srng,
  771. struct rx_desc_pool *rx_desc_pool,
  772. uint32_t num_req_buffers,
  773. union dp_rx_desc_list_elem_t **desc_list,
  774. union dp_rx_desc_list_elem_t **tail,
  775. bool req_only, const char *func_name)
  776. {
  777. uint32_t num_alloc_desc;
  778. uint16_t num_desc_to_free = 0;
  779. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  780. uint32_t num_entries_avail;
  781. uint32_t count;
  782. uint32_t extra_buffers;
  783. int sync_hw_ptr = 1;
  784. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  785. void *rxdma_ring_entry;
  786. union dp_rx_desc_list_elem_t *next;
  787. QDF_STATUS ret;
  788. void *rxdma_srng;
  789. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  790. union dp_rx_desc_list_elem_t *tail_append = NULL;
  791. union dp_rx_desc_list_elem_t *temp_list = NULL;
  792. rxdma_srng = dp_rxdma_srng->hal_srng;
  793. if (qdf_unlikely(!dp_pdev)) {
  794. dp_rx_err("%pK: pdev is null for mac_id = %d",
  795. dp_soc, mac_id);
  796. return QDF_STATUS_E_FAILURE;
  797. }
  798. if (qdf_unlikely(!rxdma_srng)) {
  799. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  800. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  801. return QDF_STATUS_E_FAILURE;
  802. }
  803. dp_verbose_debug("%pK: requested %d buffers for replenish",
  804. dp_soc, num_req_buffers);
  805. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  806. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  807. rxdma_srng,
  808. sync_hw_ptr);
  809. dp_verbose_debug("%pK: no of available entries in rxdma ring: %d",
  810. dp_soc, num_entries_avail);
  811. if (!req_only && !(*desc_list) && (num_entries_avail >
  812. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  813. num_req_buffers = num_entries_avail;
  814. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  815. } else if (num_entries_avail < num_req_buffers) {
  816. num_desc_to_free = num_req_buffers - num_entries_avail;
  817. num_req_buffers = num_entries_avail;
  818. } else if ((*desc_list) &&
  819. dp_rxdma_srng->num_entries - num_entries_avail <
  820. CRITICAL_BUFFER_THRESHOLD) {
  821. /* set extra buffers to CRITICAL_BUFFER_THRESHOLD only if
  822. * total buff requested after adding extra buffers is less
  823. * than or equal to num entries available, else set it to max
  824. * possible additional buffers available at that moment
  825. */
  826. extra_buffers =
  827. ((num_req_buffers + CRITICAL_BUFFER_THRESHOLD) > num_entries_avail) ?
  828. (num_entries_avail - num_req_buffers) :
  829. CRITICAL_BUFFER_THRESHOLD;
  830. /* Append some free descriptors to tail */
  831. num_alloc_desc =
  832. dp_rx_get_free_desc_list(dp_soc, mac_id,
  833. rx_desc_pool,
  834. extra_buffers,
  835. &desc_list_append,
  836. &tail_append);
  837. if (num_alloc_desc) {
  838. temp_list = *desc_list;
  839. *desc_list = desc_list_append;
  840. tail_append->next = temp_list;
  841. num_req_buffers += num_alloc_desc;
  842. DP_STATS_DEC(dp_pdev,
  843. replenish.free_list,
  844. num_alloc_desc);
  845. } else
  846. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  847. }
  848. if (qdf_unlikely(!num_req_buffers)) {
  849. num_desc_to_free = num_req_buffers;
  850. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  851. goto free_descs;
  852. }
  853. /*
  854. * if desc_list is NULL, allocate the descs from freelist
  855. */
  856. if (!(*desc_list)) {
  857. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  858. rx_desc_pool,
  859. num_req_buffers,
  860. desc_list,
  861. tail);
  862. if (!num_alloc_desc) {
  863. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  864. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  865. num_req_buffers);
  866. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  867. return QDF_STATUS_E_NOMEM;
  868. }
  869. dp_verbose_debug("%pK: %d rx desc allocated", dp_soc,
  870. num_alloc_desc);
  871. num_req_buffers = num_alloc_desc;
  872. }
  873. count = 0;
  874. while (count < num_req_buffers) {
  875. /* Flag is set while pdev rx_desc_pool initialization */
  876. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  877. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  878. &nbuf_frag_info,
  879. dp_pdev,
  880. rx_desc_pool);
  881. else
  882. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  883. mac_id,
  884. num_entries_avail, &nbuf_frag_info,
  885. dp_pdev, rx_desc_pool);
  886. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  887. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  888. continue;
  889. break;
  890. }
  891. count++;
  892. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  893. rxdma_srng);
  894. qdf_assert_always(rxdma_ring_entry);
  895. next = (*desc_list)->next;
  896. /* Flag is set while pdev rx_desc_pool initialization */
  897. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  898. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  899. &nbuf_frag_info);
  900. else
  901. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  902. &nbuf_frag_info);
  903. /* rx_desc.in_use should be zero at this time*/
  904. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  905. (*desc_list)->rx_desc.in_use = 1;
  906. (*desc_list)->rx_desc.in_err_state = 0;
  907. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  908. func_name, RX_DESC_REPLENISHED);
  909. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  910. nbuf_frag_info.virt_addr.nbuf,
  911. (unsigned long long)(nbuf_frag_info.paddr),
  912. (*desc_list)->rx_desc.cookie);
  913. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  914. nbuf_frag_info.paddr,
  915. (*desc_list)->rx_desc.cookie,
  916. rx_desc_pool->owner);
  917. *desc_list = next;
  918. }
  919. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  920. num_req_buffers, count);
  921. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  922. dp_rx_schedule_refill_thread(dp_soc);
  923. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  924. count, num_desc_to_free);
  925. /* No need to count the number of bytes received during replenish.
  926. * Therefore set replenish.pkts.bytes as 0.
  927. */
  928. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  929. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  930. free_descs:
  931. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  932. /*
  933. * add any available free desc back to the free list
  934. */
  935. if (*desc_list)
  936. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  937. mac_id, rx_desc_pool);
  938. return QDF_STATUS_SUCCESS;
  939. }
  940. qdf_export_symbol(__dp_rx_buffers_replenish);
  941. void
  942. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  943. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  944. {
  945. qdf_nbuf_t deliver_list_head = NULL;
  946. qdf_nbuf_t deliver_list_tail = NULL;
  947. qdf_nbuf_t nbuf;
  948. nbuf = nbuf_list;
  949. while (nbuf) {
  950. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  951. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  952. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  953. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  954. qdf_nbuf_len(nbuf), link_id);
  955. /*
  956. * reset the chfrag_start and chfrag_end bits in nbuf cb
  957. * as this is a non-amsdu pkt and RAW mode simulation expects
  958. * these bit s to be 0 for non-amsdu pkt.
  959. */
  960. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  961. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  962. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  963. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  964. }
  965. nbuf = next;
  966. }
  967. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  968. &deliver_list_tail);
  969. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  970. }
  971. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  972. #ifndef FEATURE_WDS
  973. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  974. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  975. {
  976. }
  977. #endif
  978. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  979. /**
  980. * dp_classify_critical_pkts() - API for marking critical packets
  981. * @soc: dp_soc context
  982. * @vdev: vdev on which packet is to be sent
  983. * @nbuf: nbuf that has to be classified
  984. *
  985. * The function parses the packet, identifies whether its a critical frame and
  986. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  987. * Code for marking which frames are CRITICAL is accessed via callback.
  988. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  989. *
  990. * Return: None
  991. */
  992. static
  993. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  994. qdf_nbuf_t nbuf)
  995. {
  996. if (vdev->tx_classify_critical_pkt_cb)
  997. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  998. }
  999. #else
  1000. static inline
  1001. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  1002. qdf_nbuf_t nbuf)
  1003. {
  1004. }
  1005. #endif
  1006. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  1007. static inline
  1008. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  1009. {
  1010. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  1011. }
  1012. #else
  1013. static inline
  1014. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  1015. {
  1016. }
  1017. #endif
  1018. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1019. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1020. struct cdp_tid_rx_stats *tid_stats,
  1021. uint8_t link_id)
  1022. {
  1023. uint16_t len;
  1024. qdf_nbuf_t nbuf_copy;
  1025. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1026. nbuf))
  1027. return true;
  1028. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf, link_id))
  1029. return false;
  1030. /* If the source peer in the isolation list
  1031. * then dont forward instead push to bridge stack
  1032. */
  1033. if (dp_get_peer_isolation(ta_peer))
  1034. return false;
  1035. nbuf_copy = qdf_nbuf_copy(nbuf);
  1036. if (!nbuf_copy)
  1037. return false;
  1038. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1039. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  1040. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  1041. if (soc->arch_ops.dp_rx_intrabss_mcast_handler(soc, ta_peer,
  1042. nbuf_copy,
  1043. tid_stats,
  1044. link_id))
  1045. return false;
  1046. /* Don't send packets if tx is paused */
  1047. if (!soc->is_tx_pause &&
  1048. !dp_tx_send((struct cdp_soc_t *)soc,
  1049. ta_peer->vdev->vdev_id, nbuf_copy)) {
  1050. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1051. len, link_id);
  1052. tid_stats->intrabss_cnt++;
  1053. } else {
  1054. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1055. len, link_id);
  1056. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1057. dp_rx_nbuf_free(nbuf_copy);
  1058. }
  1059. return false;
  1060. }
  1061. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1062. uint8_t tx_vdev_id,
  1063. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1064. struct cdp_tid_rx_stats *tid_stats,
  1065. uint8_t link_id)
  1066. {
  1067. uint16_t len;
  1068. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1069. /* linearize the nbuf just before we send to
  1070. * dp_tx_send()
  1071. */
  1072. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1073. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  1074. return false;
  1075. nbuf = qdf_nbuf_unshare(nbuf);
  1076. if (!nbuf) {
  1077. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  1078. rx.intra_bss.fail,
  1079. 1, len, link_id);
  1080. /* return true even though the pkt is
  1081. * not forwarded. Basically skb_unshare
  1082. * failed and we want to continue with
  1083. * next nbuf.
  1084. */
  1085. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1086. return false;
  1087. }
  1088. }
  1089. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  1090. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  1091. /* Don't send packets if tx is paused */
  1092. if (!soc->is_tx_pause && !dp_tx_send((struct cdp_soc_t *)soc,
  1093. tx_vdev_id, nbuf)) {
  1094. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1095. len, link_id);
  1096. } else {
  1097. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1098. len, link_id);
  1099. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1100. return false;
  1101. }
  1102. return true;
  1103. }
  1104. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1105. #ifdef MESH_MODE_SUPPORT
  1106. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1107. uint8_t *rx_tlv_hdr,
  1108. struct dp_txrx_peer *txrx_peer)
  1109. {
  1110. struct mesh_recv_hdr_s *rx_info = NULL;
  1111. uint32_t pkt_type;
  1112. uint32_t nss;
  1113. uint32_t rate_mcs;
  1114. uint32_t bw;
  1115. uint8_t primary_chan_num;
  1116. uint32_t center_chan_freq;
  1117. struct dp_soc *soc = vdev->pdev->soc;
  1118. struct dp_peer *peer;
  1119. struct dp_peer *primary_link_peer;
  1120. struct dp_soc *link_peer_soc;
  1121. cdp_peer_stats_param_t buf = {0};
  1122. /* fill recv mesh stats */
  1123. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  1124. /* upper layers are responsible to free this memory */
  1125. if (!rx_info) {
  1126. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  1127. vdev->pdev->soc);
  1128. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  1129. return;
  1130. }
  1131. rx_info->rs_flags = MESH_RXHDR_VER1;
  1132. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1133. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  1134. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  1135. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  1136. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  1137. if (peer) {
  1138. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  1139. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  1140. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  1141. rx_tlv_hdr);
  1142. if (vdev->osif_get_key)
  1143. vdev->osif_get_key(vdev->osif_vdev,
  1144. &rx_info->rs_decryptkey[0],
  1145. &peer->mac_addr.raw[0],
  1146. rx_info->rs_keyix);
  1147. }
  1148. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  1149. }
  1150. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  1151. txrx_peer->peer_id,
  1152. DP_MOD_ID_MESH);
  1153. if (qdf_likely(primary_link_peer)) {
  1154. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  1155. dp_monitor_peer_get_stats_param(link_peer_soc,
  1156. primary_link_peer,
  1157. cdp_peer_rx_snr, &buf);
  1158. rx_info->rs_snr = buf.rx_snr;
  1159. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  1160. }
  1161. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  1162. soc = vdev->pdev->soc;
  1163. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  1164. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  1165. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  1166. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  1167. soc->ctrl_psoc,
  1168. vdev->pdev->pdev_id,
  1169. center_chan_freq);
  1170. }
  1171. rx_info->rs_channel = primary_chan_num;
  1172. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1173. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1174. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1175. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1176. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  1177. (bw << 24);
  1178. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  1179. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  1180. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  1181. rx_info->rs_flags,
  1182. rx_info->rs_rssi,
  1183. rx_info->rs_channel,
  1184. rx_info->rs_ratephy1,
  1185. rx_info->rs_keyix,
  1186. rx_info->rs_snr);
  1187. }
  1188. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1189. uint8_t *rx_tlv_hdr)
  1190. {
  1191. union dp_align_mac_addr mac_addr;
  1192. struct dp_soc *soc = vdev->pdev->soc;
  1193. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  1194. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  1195. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1196. rx_tlv_hdr))
  1197. return QDF_STATUS_SUCCESS;
  1198. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  1199. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1200. rx_tlv_hdr))
  1201. return QDF_STATUS_SUCCESS;
  1202. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  1203. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1204. rx_tlv_hdr) &&
  1205. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1206. rx_tlv_hdr))
  1207. return QDF_STATUS_SUCCESS;
  1208. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  1209. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  1210. rx_tlv_hdr,
  1211. &mac_addr.raw[0]))
  1212. return QDF_STATUS_E_FAILURE;
  1213. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1214. &vdev->mac_addr.raw[0],
  1215. QDF_MAC_ADDR_SIZE))
  1216. return QDF_STATUS_SUCCESS;
  1217. }
  1218. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  1219. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  1220. rx_tlv_hdr,
  1221. &mac_addr.raw[0]))
  1222. return QDF_STATUS_E_FAILURE;
  1223. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1224. &vdev->mac_addr.raw[0],
  1225. QDF_MAC_ADDR_SIZE))
  1226. return QDF_STATUS_SUCCESS;
  1227. }
  1228. }
  1229. return QDF_STATUS_E_FAILURE;
  1230. }
  1231. #else
  1232. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1233. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1234. {
  1235. }
  1236. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1237. uint8_t *rx_tlv_hdr)
  1238. {
  1239. return QDF_STATUS_E_FAILURE;
  1240. }
  1241. #endif
  1242. #ifdef RX_PEER_INVALID_ENH
  1243. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1244. uint8_t mac_id)
  1245. {
  1246. struct dp_invalid_peer_msg msg;
  1247. struct dp_vdev *vdev = NULL;
  1248. struct dp_pdev *pdev = NULL;
  1249. struct ieee80211_frame *wh;
  1250. qdf_nbuf_t curr_nbuf, next_nbuf;
  1251. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1252. uint8_t *rx_pkt_hdr = NULL;
  1253. int i = 0;
  1254. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1255. dp_rx_debug("%pK: Drop decapped frames", soc);
  1256. goto free;
  1257. }
  1258. /* In RAW packet, packet header will be part of data */
  1259. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1260. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1261. if (!DP_FRAME_IS_DATA(wh)) {
  1262. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1263. goto free;
  1264. }
  1265. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1266. dp_rx_err("%pK: Invalid nbuf length", soc);
  1267. goto free;
  1268. }
  1269. /* In DMAC case the rx_desc_pools are common across PDEVs
  1270. * so PDEV cannot be derived from the pool_id.
  1271. *
  1272. * link_id need to derived from the TLV tag word which is
  1273. * disabled by default. For now adding a WAR to get vdev
  1274. * with brute force this need to fixed with word based subscription
  1275. * support is added by enabling TLV tag word
  1276. */
  1277. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1278. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1279. pdev = soc->pdev_list[i];
  1280. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1281. continue;
  1282. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1283. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1284. QDF_MAC_ADDR_SIZE) == 0) {
  1285. goto out;
  1286. }
  1287. }
  1288. }
  1289. } else {
  1290. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1291. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1292. dp_rx_err("%pK: PDEV %s",
  1293. soc, !pdev ? "not found" : "down");
  1294. goto free;
  1295. }
  1296. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1297. QDF_STATUS_SUCCESS)
  1298. return 0;
  1299. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1300. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1301. QDF_MAC_ADDR_SIZE) == 0) {
  1302. goto out;
  1303. }
  1304. }
  1305. }
  1306. if (!vdev) {
  1307. dp_rx_err("%pK: VDEV not found", soc);
  1308. goto free;
  1309. }
  1310. out:
  1311. msg.wh = wh;
  1312. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1313. msg.nbuf = mpdu;
  1314. msg.vdev_id = vdev->vdev_id;
  1315. /*
  1316. * NOTE: Only valid for HKv1.
  1317. * If smart monitor mode is enabled on RE, we are getting invalid
  1318. * peer frames with RA as STA mac of RE and the TA not matching
  1319. * with any NAC list or the the BSSID.Such frames need to dropped
  1320. * in order to avoid HM_WDS false addition.
  1321. */
  1322. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1323. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1324. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1325. soc, wh->i_addr1);
  1326. goto free;
  1327. }
  1328. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1329. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1330. pdev->pdev_id, &msg);
  1331. }
  1332. free:
  1333. /* Drop and free packet */
  1334. curr_nbuf = mpdu;
  1335. while (curr_nbuf) {
  1336. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1337. dp_rx_nbuf_free(curr_nbuf);
  1338. curr_nbuf = next_nbuf;
  1339. }
  1340. return 0;
  1341. }
  1342. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1343. qdf_nbuf_t mpdu, bool mpdu_done,
  1344. uint8_t mac_id)
  1345. {
  1346. /* Only trigger the process when mpdu is completed */
  1347. if (mpdu_done)
  1348. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1349. }
  1350. #else
  1351. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1352. uint8_t mac_id)
  1353. {
  1354. qdf_nbuf_t curr_nbuf, next_nbuf;
  1355. struct dp_pdev *pdev;
  1356. struct dp_vdev *vdev = NULL;
  1357. struct ieee80211_frame *wh;
  1358. struct dp_peer *peer = NULL;
  1359. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1360. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1361. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1362. if (!DP_FRAME_IS_DATA(wh)) {
  1363. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1364. "only for data frames");
  1365. goto free;
  1366. }
  1367. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1368. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1369. goto free;
  1370. }
  1371. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1372. if (!pdev) {
  1373. dp_rx_info_rl("%pK: PDEV not found", soc);
  1374. goto free;
  1375. }
  1376. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1377. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1378. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1379. QDF_MAC_ADDR_SIZE) == 0) {
  1380. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1381. goto out;
  1382. }
  1383. }
  1384. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1385. if (!vdev) {
  1386. dp_rx_info_rl("%pK: VDEV not found", soc);
  1387. goto free;
  1388. }
  1389. out:
  1390. if (vdev->opmode == wlan_op_mode_ap) {
  1391. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  1392. vdev->vdev_id,
  1393. DP_MOD_ID_RX_ERR);
  1394. /* If SA is a valid peer in vdev,
  1395. * don't send disconnect
  1396. */
  1397. if (peer) {
  1398. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1399. DP_STATS_INC(soc, rx.err.decrypt_err_drop, 1);
  1400. dp_err_rl("invalid peer frame with correct SA/RA is freed");
  1401. goto free;
  1402. }
  1403. }
  1404. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1405. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1406. free:
  1407. /* Drop and free packet */
  1408. curr_nbuf = mpdu;
  1409. while (curr_nbuf) {
  1410. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1411. dp_rx_nbuf_free(curr_nbuf);
  1412. curr_nbuf = next_nbuf;
  1413. }
  1414. /* Reset the head and tail pointers */
  1415. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1416. if (pdev) {
  1417. pdev->invalid_peer_head_msdu = NULL;
  1418. pdev->invalid_peer_tail_msdu = NULL;
  1419. }
  1420. return 0;
  1421. }
  1422. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1423. qdf_nbuf_t mpdu, bool mpdu_done,
  1424. uint8_t mac_id)
  1425. {
  1426. /* Process the nbuf */
  1427. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1428. }
  1429. #endif
  1430. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1431. #ifdef RECEIVE_OFFLOAD
  1432. /**
  1433. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1434. * @soc: dp soc handle
  1435. * @msdu: MSDU for which the offload info is to be printed
  1436. *
  1437. * Return: None
  1438. */
  1439. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1440. qdf_nbuf_t msdu)
  1441. {
  1442. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1443. dp_verbose_debug("lro_eligible 0x%x",
  1444. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1445. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1446. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1447. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1448. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1449. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1450. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1451. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1452. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1453. dp_verbose_debug("---------------------------------------------------------");
  1454. }
  1455. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1456. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1457. {
  1458. struct hal_offload_info offload_info;
  1459. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1460. return;
  1461. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1462. return;
  1463. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1464. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1465. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1466. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1467. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1468. rx_tlv);
  1469. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1470. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1471. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1472. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1473. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1474. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1475. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1476. dp_rx_print_offload_info(soc, msdu);
  1477. }
  1478. #endif /* RECEIVE_OFFLOAD */
  1479. /**
  1480. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1481. *
  1482. * @soc: DP soc handle
  1483. * @nbuf: pointer to msdu.
  1484. * @mpdu_len: mpdu length
  1485. * @l3_pad_len: L3 padding length by HW
  1486. *
  1487. * Return: returns true if nbuf is last msdu of mpdu else returns false.
  1488. */
  1489. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1490. qdf_nbuf_t nbuf,
  1491. uint16_t *mpdu_len,
  1492. uint32_t l3_pad_len)
  1493. {
  1494. bool last_nbuf;
  1495. uint32_t pkt_hdr_size;
  1496. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1497. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1498. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1499. last_nbuf = false;
  1500. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1501. } else {
  1502. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1503. last_nbuf = true;
  1504. *mpdu_len = 0;
  1505. }
  1506. return last_nbuf;
  1507. }
  1508. /**
  1509. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1510. *
  1511. * @soc: DP soc handle
  1512. * @nbuf: pointer to msdu.
  1513. *
  1514. * Return: returns padding length in bytes.
  1515. */
  1516. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1517. qdf_nbuf_t nbuf)
  1518. {
  1519. uint32_t l3_hdr_pad = 0;
  1520. uint8_t *rx_tlv_hdr;
  1521. struct hal_rx_msdu_metadata msdu_metadata;
  1522. while (nbuf) {
  1523. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1524. /* scattered msdu end with continuation is 0 */
  1525. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1526. hal_rx_msdu_metadata_get(soc->hal_soc,
  1527. rx_tlv_hdr,
  1528. &msdu_metadata);
  1529. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1530. break;
  1531. }
  1532. nbuf = nbuf->next;
  1533. }
  1534. return l3_hdr_pad;
  1535. }
  1536. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1537. {
  1538. qdf_nbuf_t parent, frag_list, next = NULL;
  1539. uint16_t frag_list_len = 0;
  1540. uint16_t mpdu_len;
  1541. bool last_nbuf;
  1542. uint32_t l3_hdr_pad_offset = 0;
  1543. /*
  1544. * Use msdu len got from REO entry descriptor instead since
  1545. * there is case the RX PKT TLV is corrupted while msdu_len
  1546. * from REO descriptor is right for non-raw RX scatter msdu.
  1547. */
  1548. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1549. /*
  1550. * this is a case where the complete msdu fits in one single nbuf.
  1551. * in this case HW sets both start and end bit and we only need to
  1552. * reset these bits for RAW mode simulator to decap the pkt
  1553. */
  1554. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1555. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1556. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1557. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1558. return nbuf;
  1559. }
  1560. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1561. /*
  1562. * This is a case where we have multiple msdus (A-MSDU) spread across
  1563. * multiple nbufs. here we create a fraglist out of these nbufs.
  1564. *
  1565. * the moment we encounter a nbuf with continuation bit set we
  1566. * know for sure we have an MSDU which is spread across multiple
  1567. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1568. */
  1569. parent = nbuf;
  1570. frag_list = nbuf->next;
  1571. nbuf = nbuf->next;
  1572. /*
  1573. * set the start bit in the first nbuf we encounter with continuation
  1574. * bit set. This has the proper mpdu length set as it is the first
  1575. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1576. * nbufs will form the frag_list of the parent nbuf.
  1577. */
  1578. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1579. /*
  1580. * L3 header padding is only needed for the 1st buffer
  1581. * in a scattered msdu
  1582. */
  1583. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1584. l3_hdr_pad_offset);
  1585. /*
  1586. * MSDU cont bit is set but reported MPDU length can fit
  1587. * in to single buffer
  1588. *
  1589. * Increment error stats and avoid SG list creation
  1590. */
  1591. if (last_nbuf) {
  1592. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1593. qdf_nbuf_pull_head(parent,
  1594. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1595. return parent;
  1596. }
  1597. /*
  1598. * this is where we set the length of the fragments which are
  1599. * associated to the parent nbuf. We iterate through the frag_list
  1600. * till we hit the last_nbuf of the list.
  1601. */
  1602. do {
  1603. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1604. qdf_nbuf_pull_head(nbuf,
  1605. soc->rx_pkt_tlv_size);
  1606. frag_list_len += qdf_nbuf_len(nbuf);
  1607. if (last_nbuf) {
  1608. next = nbuf->next;
  1609. nbuf->next = NULL;
  1610. break;
  1611. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1612. dp_err("Invalid packet length\n");
  1613. qdf_assert_always(0);
  1614. }
  1615. nbuf = nbuf->next;
  1616. } while (!last_nbuf);
  1617. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1618. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1619. parent->next = next;
  1620. qdf_nbuf_pull_head(parent,
  1621. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1622. return parent;
  1623. }
  1624. #ifdef DP_RX_SG_FRAME_SUPPORT
  1625. bool dp_rx_is_sg_supported(void)
  1626. {
  1627. return true;
  1628. }
  1629. #else
  1630. bool dp_rx_is_sg_supported(void)
  1631. {
  1632. return false;
  1633. }
  1634. #endif
  1635. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1636. #ifdef QCA_PEER_EXT_STATS
  1637. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1638. qdf_nbuf_t nbuf)
  1639. {
  1640. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1641. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1642. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1643. }
  1644. #endif /* QCA_PEER_EXT_STATS */
  1645. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1646. {
  1647. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1648. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1649. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1650. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1651. uint32_t interframe_delay =
  1652. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1653. struct cdp_tid_rx_stats *rstats =
  1654. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1655. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1656. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1657. /*
  1658. * Update interframe delay stats calculated at deliver_data_ol point.
  1659. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1660. * interframe delay will not be calculate correctly for 1st frame.
  1661. * On the other side, this will help in avoiding extra per packet check
  1662. * of vdev->prev_rx_deliver_tstamp.
  1663. */
  1664. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1665. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1666. vdev->prev_rx_deliver_tstamp = current_ts;
  1667. }
  1668. /**
  1669. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1670. * @pdev: dp pdev reference
  1671. * @buf_list: buffer list to be dropepd
  1672. *
  1673. * Return: int (number of bufs dropped)
  1674. */
  1675. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1676. qdf_nbuf_t buf_list)
  1677. {
  1678. struct cdp_tid_rx_stats *stats = NULL;
  1679. uint8_t tid = 0, ring_id = 0;
  1680. int num_dropped = 0;
  1681. qdf_nbuf_t buf, next_buf;
  1682. buf = buf_list;
  1683. while (buf) {
  1684. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1685. next_buf = qdf_nbuf_queue_next(buf);
  1686. tid = qdf_nbuf_get_tid_val(buf);
  1687. if (qdf_likely(pdev)) {
  1688. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1689. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1690. stats->delivered_to_stack--;
  1691. }
  1692. dp_rx_nbuf_free(buf);
  1693. buf = next_buf;
  1694. num_dropped++;
  1695. }
  1696. return num_dropped;
  1697. }
  1698. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1699. /**
  1700. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1701. * @soc: core txrx main context
  1702. * @vdev: vdev
  1703. * @txrx_peer: txrx peer
  1704. * @nbuf_head: skb list head
  1705. *
  1706. * Return: true if packet is delivered to netdev per STA.
  1707. */
  1708. static inline bool
  1709. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1710. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1711. {
  1712. /*
  1713. * When extended WDS is disabled, frames are sent to AP netdevice.
  1714. */
  1715. if (qdf_likely(!vdev->wds_ext_enabled))
  1716. return false;
  1717. /*
  1718. * There can be 2 cases:
  1719. * 1. Send frame to parent netdev if its not for netdev per STA
  1720. * 2. If frame is meant for netdev per STA:
  1721. * a. Send frame to appropriate netdev using registered fp.
  1722. * b. If fp is NULL, drop the frames.
  1723. */
  1724. if (!txrx_peer->wds_ext.init)
  1725. return false;
  1726. if (txrx_peer->osif_rx)
  1727. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1728. else
  1729. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1730. return true;
  1731. }
  1732. #else
  1733. static inline bool
  1734. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1735. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1736. {
  1737. return false;
  1738. }
  1739. #endif
  1740. #ifdef PEER_CACHE_RX_PKTS
  1741. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1742. {
  1743. struct dp_peer_cached_bufq *bufqi;
  1744. struct dp_rx_cached_buf *cache_buf = NULL;
  1745. ol_txrx_rx_fp data_rx = NULL;
  1746. int num_buff_elem;
  1747. QDF_STATUS status;
  1748. /*
  1749. * Flush dp cached frames only for mld peers and legacy peers, as
  1750. * link peers don't store cached frames
  1751. */
  1752. if (IS_MLO_DP_LINK_PEER(peer))
  1753. return;
  1754. if (!peer->txrx_peer) {
  1755. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1756. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1757. return;
  1758. }
  1759. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1760. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1761. return;
  1762. }
  1763. qdf_spin_lock_bh(&peer->peer_info_lock);
  1764. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1765. data_rx = peer->vdev->osif_rx;
  1766. else
  1767. drop = true;
  1768. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1769. bufqi = &peer->txrx_peer->bufq_info;
  1770. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1771. qdf_list_remove_front(&bufqi->cached_bufq,
  1772. (qdf_list_node_t **)&cache_buf);
  1773. while (cache_buf) {
  1774. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1775. cache_buf->buf);
  1776. bufqi->entries -= num_buff_elem;
  1777. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1778. if (drop) {
  1779. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1780. cache_buf->buf);
  1781. } else {
  1782. /* Flush the cached frames to OSIF DEV */
  1783. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1784. if (status != QDF_STATUS_SUCCESS)
  1785. bufqi->dropped = dp_rx_drop_nbuf_list(
  1786. peer->vdev->pdev,
  1787. cache_buf->buf);
  1788. }
  1789. qdf_mem_free(cache_buf);
  1790. cache_buf = NULL;
  1791. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1792. qdf_list_remove_front(&bufqi->cached_bufq,
  1793. (qdf_list_node_t **)&cache_buf);
  1794. }
  1795. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1796. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1797. }
  1798. /**
  1799. * dp_rx_enqueue_rx() - cache rx frames
  1800. * @peer: peer
  1801. * @txrx_peer: DP txrx_peer
  1802. * @rx_buf_list: cache buffer list
  1803. *
  1804. * Return: None
  1805. */
  1806. static QDF_STATUS
  1807. dp_rx_enqueue_rx(struct dp_peer *peer,
  1808. struct dp_txrx_peer *txrx_peer,
  1809. qdf_nbuf_t rx_buf_list)
  1810. {
  1811. struct dp_rx_cached_buf *cache_buf;
  1812. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1813. int num_buff_elem;
  1814. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1815. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1816. struct dp_peer *ta_peer = NULL;
  1817. /*
  1818. * If peer id is invalid which likely peer map has not completed,
  1819. * then need caller provide dp_peer pointer, else it's ok to use
  1820. * txrx_peer->peer_id to get dp_peer.
  1821. */
  1822. if (peer) {
  1823. if (QDF_STATUS_SUCCESS ==
  1824. dp_peer_get_ref(soc, peer, DP_MOD_ID_RX))
  1825. ta_peer = peer;
  1826. } else {
  1827. ta_peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1828. DP_MOD_ID_RX);
  1829. }
  1830. if (!ta_peer) {
  1831. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1832. rx_buf_list);
  1833. return QDF_STATUS_E_INVAL;
  1834. }
  1835. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1836. bufqi->dropped);
  1837. if (!ta_peer->valid) {
  1838. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1839. rx_buf_list);
  1840. ret = QDF_STATUS_E_INVAL;
  1841. goto fail;
  1842. }
  1843. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1844. if (bufqi->entries >= bufqi->thresh) {
  1845. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1846. rx_buf_list);
  1847. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1848. ret = QDF_STATUS_E_RESOURCES;
  1849. goto fail;
  1850. }
  1851. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1852. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1853. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1854. if (!cache_buf) {
  1855. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1856. "Failed to allocate buf to cache rx frames");
  1857. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1858. rx_buf_list);
  1859. ret = QDF_STATUS_E_NOMEM;
  1860. goto fail;
  1861. }
  1862. cache_buf->buf = rx_buf_list;
  1863. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1864. qdf_list_insert_back(&bufqi->cached_bufq,
  1865. &cache_buf->node);
  1866. bufqi->entries += num_buff_elem;
  1867. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1868. fail:
  1869. dp_peer_unref_delete(ta_peer, DP_MOD_ID_RX);
  1870. return ret;
  1871. }
  1872. static inline
  1873. bool dp_rx_is_peer_cache_bufq_supported(void)
  1874. {
  1875. return true;
  1876. }
  1877. #else
  1878. static inline
  1879. bool dp_rx_is_peer_cache_bufq_supported(void)
  1880. {
  1881. return false;
  1882. }
  1883. static inline QDF_STATUS
  1884. dp_rx_enqueue_rx(struct dp_peer *peer,
  1885. struct dp_txrx_peer *txrx_peer,
  1886. qdf_nbuf_t rx_buf_list)
  1887. {
  1888. return QDF_STATUS_SUCCESS;
  1889. }
  1890. #endif
  1891. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1892. /**
  1893. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1894. * using the appropriate call back functions.
  1895. * @soc: soc
  1896. * @vdev: vdev
  1897. * @txrx_peer: peer
  1898. * @nbuf_head: skb list head
  1899. *
  1900. * Return: None
  1901. */
  1902. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1903. struct dp_vdev *vdev,
  1904. struct dp_txrx_peer *txrx_peer,
  1905. qdf_nbuf_t nbuf_head)
  1906. {
  1907. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1908. txrx_peer, nbuf_head)))
  1909. return;
  1910. /* Function pointer initialized only when FISA is enabled */
  1911. if (vdev->osif_fisa_rx)
  1912. /* on failure send it via regular path */
  1913. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1914. else
  1915. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1916. }
  1917. #else
  1918. /**
  1919. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1920. * using the appropriate call back functions.
  1921. * @soc: soc
  1922. * @vdev: vdev
  1923. * @txrx_peer: txrx peer
  1924. * @nbuf_head: skb list head
  1925. *
  1926. * Check the return status of the call back function and drop
  1927. * the packets if the return status indicates a failure.
  1928. *
  1929. * Return: None
  1930. */
  1931. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1932. struct dp_vdev *vdev,
  1933. struct dp_txrx_peer *txrx_peer,
  1934. qdf_nbuf_t nbuf_head)
  1935. {
  1936. int num_nbuf = 0;
  1937. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1938. /* Function pointer initialized only when FISA is enabled */
  1939. if (vdev->osif_fisa_rx)
  1940. /* on failure send it via regular path */
  1941. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1942. else if (vdev->osif_rx)
  1943. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1944. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1945. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1946. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1947. if (txrx_peer)
  1948. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1949. num_nbuf);
  1950. }
  1951. }
  1952. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1953. /**
  1954. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1955. * @soc: DP soc
  1956. * @vdev: DP vdev handle
  1957. * @txrx_peer: pointer to the txrx peer object
  1958. * @nbuf_head: skb list head
  1959. *
  1960. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1961. * QDF_STATUS_E_FAILURE
  1962. */
  1963. static inline QDF_STATUS
  1964. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1965. struct dp_vdev *vdev,
  1966. struct dp_txrx_peer *txrx_peer,
  1967. qdf_nbuf_t nbuf_head)
  1968. {
  1969. int num_nbuf;
  1970. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1971. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1972. /*
  1973. * This is a special case where vdev is invalid,
  1974. * so we cannot know the pdev to which this packet
  1975. * belonged. Hence we update the soc rx error stats.
  1976. */
  1977. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1978. return QDF_STATUS_E_FAILURE;
  1979. }
  1980. /*
  1981. * highly unlikely to have a vdev without a registered rx
  1982. * callback function. if so let us free the nbuf_list.
  1983. */
  1984. if (qdf_unlikely(!vdev->osif_rx)) {
  1985. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1986. dp_rx_enqueue_rx(NULL, txrx_peer, nbuf_head);
  1987. } else {
  1988. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1989. nbuf_head);
  1990. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1991. vdev->pdev->enhanced_stats_en);
  1992. }
  1993. return QDF_STATUS_E_FAILURE;
  1994. }
  1995. return QDF_STATUS_SUCCESS;
  1996. }
  1997. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1998. struct dp_vdev *vdev,
  1999. struct dp_txrx_peer *txrx_peer,
  2000. qdf_nbuf_t nbuf_head,
  2001. qdf_nbuf_t nbuf_tail)
  2002. {
  2003. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  2004. QDF_STATUS_SUCCESS)
  2005. return QDF_STATUS_E_FAILURE;
  2006. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  2007. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  2008. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  2009. &nbuf_tail);
  2010. }
  2011. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  2012. return QDF_STATUS_SUCCESS;
  2013. }
  2014. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  2015. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  2016. struct dp_vdev *vdev,
  2017. struct dp_txrx_peer *txrx_peer,
  2018. qdf_nbuf_t nbuf_head,
  2019. qdf_nbuf_t nbuf_tail)
  2020. {
  2021. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  2022. QDF_STATUS_SUCCESS)
  2023. return QDF_STATUS_E_FAILURE;
  2024. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  2025. return QDF_STATUS_SUCCESS;
  2026. }
  2027. #endif
  2028. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2029. #ifdef VDEV_PEER_PROTOCOL_COUNT
  2030. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  2031. { \
  2032. qdf_nbuf_t nbuf_local; \
  2033. struct dp_txrx_peer *txrx_peer_local; \
  2034. struct dp_vdev *vdev_local = vdev_hdl; \
  2035. do { \
  2036. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  2037. break; \
  2038. nbuf_local = nbuf; \
  2039. txrx_peer_local = txrx_peer; \
  2040. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  2041. break; \
  2042. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  2043. break; \
  2044. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  2045. (nbuf_local), \
  2046. (txrx_peer_local), 0, 1); \
  2047. } while (0); \
  2048. }
  2049. #else
  2050. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  2051. #endif
  2052. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  2053. /**
  2054. * dp_rx_rates_stats_update() - update rate stats
  2055. * from rx msdu.
  2056. * @soc: datapath soc handle
  2057. * @nbuf: received msdu buffer
  2058. * @rx_tlv_hdr: rx tlv header
  2059. * @txrx_peer: datapath txrx_peer handle
  2060. * @sgi: Short Guard Interval
  2061. * @mcs: Modulation and Coding Set
  2062. * @nss: Number of Spatial Streams
  2063. * @bw: BandWidth
  2064. * @pkt_type: Corresponds to preamble
  2065. * @link_id: Link Id on which packet is received
  2066. *
  2067. * To be precisely record rates, following factors are considered:
  2068. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  2069. * Make sure to affect rx throughput as least as possible.
  2070. *
  2071. * Return: void
  2072. */
  2073. static void
  2074. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2075. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2076. uint32_t sgi, uint32_t mcs,
  2077. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  2078. uint8_t link_id)
  2079. {
  2080. uint32_t rix;
  2081. uint16_t ratecode;
  2082. uint32_t avg_rx_rate;
  2083. uint32_t ratekbps;
  2084. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  2085. if (soc->high_throughput ||
  2086. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  2087. return;
  2088. }
  2089. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs, link_id);
  2090. /* In 11b mode, the nss we get from tlv is 0, invalid and should be 1 */
  2091. if (qdf_unlikely(pkt_type == DOT11_B))
  2092. nss = 1;
  2093. /* here pkt_type corresponds to preamble */
  2094. ratekbps = dp_getrateindex(sgi,
  2095. mcs,
  2096. nss - 1,
  2097. pkt_type,
  2098. bw,
  2099. punc_mode,
  2100. &rix,
  2101. &ratecode);
  2102. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps, link_id);
  2103. avg_rx_rate =
  2104. dp_ath_rate_lpf(
  2105. txrx_peer->stats[link_id].extd_stats.rx.avg_rx_rate,
  2106. ratekbps);
  2107. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate, link_id);
  2108. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss, link_id);
  2109. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs, link_id);
  2110. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw, link_id);
  2111. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi, link_id);
  2112. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type, link_id);
  2113. }
  2114. #else
  2115. static inline void
  2116. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2117. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2118. uint32_t sgi, uint32_t mcs,
  2119. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  2120. uint8_t link_id)
  2121. {
  2122. }
  2123. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  2124. #ifndef QCA_ENHANCED_STATS_SUPPORT
  2125. /**
  2126. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  2127. *
  2128. * @soc: datapath soc handle
  2129. * @nbuf: received msdu buffer
  2130. * @rx_tlv_hdr: rx tlv header
  2131. * @txrx_peer: datapath txrx_peer handle
  2132. * @link_id: link id on which the packet is received
  2133. *
  2134. * Return: void
  2135. */
  2136. static inline
  2137. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2138. uint8_t *rx_tlv_hdr,
  2139. struct dp_txrx_peer *txrx_peer,
  2140. uint8_t link_id)
  2141. {
  2142. bool is_ampdu;
  2143. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  2144. uint8_t dst_mcs_idx;
  2145. /*
  2146. * TODO - For KIWI this field is present in ring_desc
  2147. * Try to use ring desc instead of tlv.
  2148. */
  2149. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  2150. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu, link_id);
  2151. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu),
  2152. link_id);
  2153. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  2154. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  2155. tid = qdf_nbuf_get_tid_val(nbuf);
  2156. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  2157. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  2158. rx_tlv_hdr);
  2159. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  2160. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  2161. /* do HW to SW pkt type conversion */
  2162. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  2163. hal_2_dp_pkt_type_map[pkt_type]);
  2164. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  2165. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2166. link_id);
  2167. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  2168. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2169. link_id);
  2170. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1, link_id);
  2171. /*
  2172. * only if nss > 0 and pkt_type is 11N/AC/AX,
  2173. * then increase index [nss - 1] in array counter.
  2174. */
  2175. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  2176. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1, link_id);
  2177. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1, link_id);
  2178. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  2179. hal_rx_tlv_mic_err_get(soc->hal_soc,
  2180. rx_tlv_hdr), link_id);
  2181. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  2182. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  2183. rx_tlv_hdr), link_id);
  2184. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1,
  2185. link_id);
  2186. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1,
  2187. link_id);
  2188. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  2189. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  2190. DP_PEER_EXTD_STATS_INC(txrx_peer,
  2191. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  2192. 1, link_id);
  2193. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  2194. sgi, mcs, nss, bw, pkt_type, link_id);
  2195. }
  2196. #else
  2197. static inline
  2198. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2199. uint8_t *rx_tlv_hdr,
  2200. struct dp_txrx_peer *txrx_peer,
  2201. uint8_t link_id)
  2202. {
  2203. }
  2204. #endif
  2205. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  2206. static inline void
  2207. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2208. qdf_nbuf_t nbuf, uint8_t link_id)
  2209. {
  2210. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  2211. if (qdf_unlikely(lmac_id >= CDP_MAX_LMACS)) {
  2212. dp_err_rl("Invalid lmac_id: %u vdev_id: %u",
  2213. lmac_id, QDF_NBUF_CB_RX_VDEV_ID(nbuf));
  2214. if (qdf_likely(txrx_peer))
  2215. dp_err_rl("peer_id: %u", txrx_peer->peer_id);
  2216. return;
  2217. }
  2218. /* only count stats per lmac for MLO connection*/
  2219. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  2220. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  2221. txrx_peer->is_mld_peer, link_id);
  2222. }
  2223. #else
  2224. static inline void
  2225. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2226. qdf_nbuf_t nbuf, uint8_t link_id)
  2227. {
  2228. }
  2229. #endif
  2230. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2231. uint8_t *rx_tlv_hdr,
  2232. struct dp_txrx_peer *txrx_peer,
  2233. uint8_t ring_id,
  2234. struct cdp_tid_rx_stats *tid_stats,
  2235. uint8_t link_id)
  2236. {
  2237. bool is_not_amsdu;
  2238. struct dp_vdev *vdev = txrx_peer->vdev;
  2239. uint8_t enh_flag;
  2240. qdf_ether_header_t *eh;
  2241. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2242. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2243. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2244. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2245. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2246. msdu_len, link_id);
  2247. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2248. is_not_amsdu, link_id);
  2249. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1,
  2250. !is_not_amsdu, link_id);
  2251. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2252. qdf_nbuf_is_rx_retry_flag(nbuf), link_id);
  2253. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf, link_id);
  2254. tid_stats->msdu_cnt++;
  2255. enh_flag = vdev->pdev->enhanced_stats_en;
  2256. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2257. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2258. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2259. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag, link_id);
  2260. tid_stats->mcast_msdu_cnt++;
  2261. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2262. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len,
  2263. enh_flag, link_id);
  2264. tid_stats->bcast_msdu_cnt++;
  2265. }
  2266. } else {
  2267. DP_PEER_UC_INCC_PKT(txrx_peer, 1, msdu_len,
  2268. enh_flag, link_id);
  2269. }
  2270. txrx_peer->stats[link_id].per_pkt_stats.rx.last_rx_ts =
  2271. qdf_system_ticks();
  2272. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr,
  2273. txrx_peer, link_id);
  2274. }
  2275. #ifndef WDS_VENDOR_EXTENSION
  2276. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2277. struct dp_vdev *vdev,
  2278. struct dp_txrx_peer *txrx_peer)
  2279. {
  2280. return 1;
  2281. }
  2282. #endif
  2283. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2284. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2285. /**
  2286. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2287. * during roaming
  2288. * @vdev: dp_vdev pointer
  2289. * @rx_tlv_hdr: rx tlv header
  2290. * @nbuf: pkt skb pointer
  2291. *
  2292. * This function will check if rx udp data is received from authorised
  2293. * roamed peer before peer map indication is received from FW after
  2294. * roaming. This is needed for VoIP scenarios in which packet loss
  2295. * expected during roaming is minimal.
  2296. *
  2297. * Return: bool
  2298. */
  2299. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2300. uint8_t *rx_tlv_hdr,
  2301. qdf_nbuf_t nbuf)
  2302. {
  2303. char *hdr_desc;
  2304. struct ieee80211_frame *wh = NULL;
  2305. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2306. rx_tlv_hdr);
  2307. wh = (struct ieee80211_frame *)hdr_desc;
  2308. if (vdev->roaming_peer_status ==
  2309. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2310. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2311. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2312. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2313. return true;
  2314. return false;
  2315. }
  2316. #else
  2317. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2318. uint8_t *rx_tlv_hdr,
  2319. qdf_nbuf_t nbuf)
  2320. {
  2321. return false;
  2322. }
  2323. #endif
  2324. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2325. {
  2326. uint16_t peer_id;
  2327. uint8_t vdev_id;
  2328. struct dp_vdev *vdev = NULL;
  2329. uint32_t l2_hdr_offset = 0;
  2330. uint16_t msdu_len = 0;
  2331. uint32_t pkt_len = 0;
  2332. uint8_t *rx_tlv_hdr;
  2333. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2334. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2335. bool is_special_frame = false;
  2336. struct dp_peer *peer = NULL;
  2337. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2338. if (peer_id > soc->max_peer_id)
  2339. goto deliver_fail;
  2340. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2341. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2342. if (!vdev || vdev->delete.pending)
  2343. goto deliver_fail;
  2344. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2345. goto deliver_fail;
  2346. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2347. l2_hdr_offset =
  2348. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2349. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2350. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2351. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2352. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2353. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2354. is_special_frame = dp_rx_is_special_frame(nbuf, frame_mask);
  2355. if (qdf_likely(vdev->osif_rx)) {
  2356. if (is_special_frame ||
  2357. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr,
  2358. nbuf)) {
  2359. qdf_nbuf_set_exc_frame(nbuf, 1);
  2360. if (QDF_STATUS_SUCCESS !=
  2361. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2362. goto deliver_fail;
  2363. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2364. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2365. return;
  2366. }
  2367. } else if (is_special_frame) {
  2368. /*
  2369. * If MLO connection, txrx_peer for link peer does not exist,
  2370. * try to store these RX packets to txrx_peer's bufq of MLD
  2371. * peer until vdev->osif_rx is registered from CP and flush
  2372. * them to stack.
  2373. */
  2374. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id,
  2375. DP_MOD_ID_RX);
  2376. if (!peer)
  2377. goto deliver_fail;
  2378. /* only check for MLO connection */
  2379. if (IS_MLO_DP_MLD_PEER(peer) && peer->txrx_peer &&
  2380. dp_rx_is_peer_cache_bufq_supported()) {
  2381. qdf_nbuf_set_exc_frame(nbuf, 1);
  2382. if (QDF_STATUS_SUCCESS ==
  2383. dp_rx_enqueue_rx(peer, peer->txrx_peer, nbuf)) {
  2384. DP_STATS_INC(soc,
  2385. rx.err.pkt_delivered_no_peer,
  2386. 1);
  2387. } else {
  2388. DP_STATS_INC(soc,
  2389. rx.err.rx_invalid_peer.num,
  2390. 1);
  2391. }
  2392. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2393. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2394. return;
  2395. }
  2396. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2397. }
  2398. deliver_fail:
  2399. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2400. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2401. dp_rx_nbuf_free(nbuf);
  2402. if (vdev)
  2403. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2404. }
  2405. #else
  2406. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2407. {
  2408. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2409. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2410. dp_rx_nbuf_free(nbuf);
  2411. }
  2412. #endif
  2413. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2414. #ifdef WLAN_SUPPORT_RX_FISA
  2415. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2416. {
  2417. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2418. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2419. }
  2420. #else
  2421. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2422. {
  2423. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2424. }
  2425. #endif
  2426. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2427. #ifdef DP_RX_DROP_RAW_FRM
  2428. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2429. {
  2430. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2431. dp_rx_nbuf_free(nbuf);
  2432. return true;
  2433. }
  2434. return false;
  2435. }
  2436. #endif
  2437. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2438. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2439. {
  2440. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2441. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2442. }
  2443. #endif
  2444. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2445. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2446. uint16_t peer_id, uint32_t is_offload,
  2447. qdf_nbuf_t netbuf)
  2448. {
  2449. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2450. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2451. peer_id, is_offload, pdev->pdev_id);
  2452. }
  2453. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2454. uint32_t is_offload)
  2455. {
  2456. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2457. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2458. soc, nbuf, HTT_INVALID_VDEV,
  2459. is_offload, 0);
  2460. }
  2461. #endif
  2462. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2463. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2464. {
  2465. QDF_STATUS ret;
  2466. if (vdev->osif_rx_flush) {
  2467. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2468. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2469. dp_err("Failed to flush rx pkts for vdev %d\n",
  2470. vdev->vdev_id);
  2471. return ret;
  2472. }
  2473. }
  2474. return QDF_STATUS_SUCCESS;
  2475. }
  2476. static QDF_STATUS
  2477. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2478. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2479. struct dp_pdev *dp_pdev,
  2480. struct rx_desc_pool *rx_desc_pool)
  2481. {
  2482. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2483. (nbuf_frag_info_t->virt_addr).nbuf =
  2484. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2485. RX_BUFFER_RESERVATION,
  2486. rx_desc_pool->buf_alignment, FALSE);
  2487. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2488. dp_err("nbuf alloc failed");
  2489. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2490. return ret;
  2491. }
  2492. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2493. (nbuf_frag_info_t->virt_addr).nbuf,
  2494. QDF_DMA_FROM_DEVICE,
  2495. rx_desc_pool->buf_size);
  2496. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2497. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2498. dp_err("nbuf map failed");
  2499. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2500. return ret;
  2501. }
  2502. nbuf_frag_info_t->paddr =
  2503. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2504. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2505. &nbuf_frag_info_t->paddr,
  2506. rx_desc_pool);
  2507. if (ret == QDF_STATUS_E_FAILURE) {
  2508. dp_err("nbuf check x86 failed");
  2509. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2510. return ret;
  2511. }
  2512. return QDF_STATUS_SUCCESS;
  2513. }
  2514. QDF_STATUS
  2515. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2516. struct dp_srng *dp_rxdma_srng,
  2517. struct rx_desc_pool *rx_desc_pool,
  2518. uint32_t num_req_buffers)
  2519. {
  2520. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2521. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2522. union dp_rx_desc_list_elem_t *next;
  2523. void *rxdma_ring_entry;
  2524. qdf_dma_addr_t paddr;
  2525. struct dp_rx_nbuf_frag_info *nf_info;
  2526. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2527. uint32_t buffer_index, nbuf_ptrs_per_page;
  2528. qdf_nbuf_t nbuf;
  2529. QDF_STATUS ret;
  2530. int page_idx, total_pages;
  2531. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2532. union dp_rx_desc_list_elem_t *tail = NULL;
  2533. int sync_hw_ptr = 1;
  2534. uint32_t num_entries_avail;
  2535. if (qdf_unlikely(!dp_pdev)) {
  2536. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2537. dp_soc, mac_id);
  2538. return QDF_STATUS_E_FAILURE;
  2539. }
  2540. if (qdf_unlikely(!rxdma_srng)) {
  2541. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2542. return QDF_STATUS_E_FAILURE;
  2543. }
  2544. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2545. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2546. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2547. rxdma_srng,
  2548. sync_hw_ptr);
  2549. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2550. if (!num_entries_avail) {
  2551. dp_err("Num of available entries is zero, nothing to do");
  2552. return QDF_STATUS_E_NOMEM;
  2553. }
  2554. if (num_entries_avail < num_req_buffers)
  2555. num_req_buffers = num_entries_avail;
  2556. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2557. num_req_buffers, &desc_list, &tail);
  2558. if (!nr_descs) {
  2559. dp_err("no free rx_descs in freelist");
  2560. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2561. return QDF_STATUS_E_NOMEM;
  2562. }
  2563. dp_debug("got %u RX descs for driver attach", nr_descs);
  2564. /*
  2565. * Try to allocate pointers to the nbuf one page at a time.
  2566. * Take pointers that can fit in one page of memory and
  2567. * iterate through the total descriptors that need to be
  2568. * allocated in order of pages. Reuse the pointers that
  2569. * have been allocated to fit in one page across each
  2570. * iteration to index into the nbuf.
  2571. */
  2572. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2573. /*
  2574. * Add an extra page to store the remainder if any
  2575. */
  2576. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2577. total_pages++;
  2578. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2579. if (!nf_info) {
  2580. dp_err("failed to allocate nbuf array");
  2581. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2582. QDF_BUG(0);
  2583. return QDF_STATUS_E_NOMEM;
  2584. }
  2585. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2586. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2587. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2588. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2589. /*
  2590. * The last page of buffer pointers may not be required
  2591. * completely based on the number of descriptors. Below
  2592. * check will ensure we are allocating only the
  2593. * required number of descriptors.
  2594. */
  2595. if (nr_nbuf_total >= nr_descs)
  2596. break;
  2597. /* Flag is set while pdev rx_desc_pool initialization */
  2598. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2599. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2600. &nf_info[nr_nbuf], dp_pdev,
  2601. rx_desc_pool);
  2602. else
  2603. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2604. &nf_info[nr_nbuf], dp_pdev,
  2605. rx_desc_pool);
  2606. if (QDF_IS_STATUS_ERROR(ret))
  2607. break;
  2608. nr_nbuf_total++;
  2609. }
  2610. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2611. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2612. rxdma_ring_entry =
  2613. hal_srng_src_get_next(dp_soc->hal_soc,
  2614. rxdma_srng);
  2615. qdf_assert_always(rxdma_ring_entry);
  2616. next = desc_list->next;
  2617. paddr = nf_info[buffer_index].paddr;
  2618. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2619. /* Flag is set while pdev rx_desc_pool initialization */
  2620. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2621. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2622. &nf_info[buffer_index]);
  2623. else
  2624. dp_rx_desc_prep(&desc_list->rx_desc,
  2625. &nf_info[buffer_index]);
  2626. desc_list->rx_desc.in_use = 1;
  2627. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2628. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2629. __func__,
  2630. RX_DESC_REPLENISHED);
  2631. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2632. desc_list->rx_desc.cookie,
  2633. rx_desc_pool->owner);
  2634. dp_ipa_handle_rx_buf_smmu_mapping(
  2635. dp_soc, nbuf,
  2636. rx_desc_pool->buf_size, true,
  2637. __func__, __LINE__);
  2638. dp_audio_smmu_map(dp_soc->osdev,
  2639. qdf_mem_paddr_from_dmaaddr(dp_soc->osdev,
  2640. QDF_NBUF_CB_PADDR(nbuf)),
  2641. QDF_NBUF_CB_PADDR(nbuf),
  2642. rx_desc_pool->buf_size);
  2643. desc_list = next;
  2644. }
  2645. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2646. rxdma_srng, nr_nbuf, nr_nbuf);
  2647. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2648. }
  2649. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2650. qdf_mem_free(nf_info);
  2651. if (!nr_nbuf_total) {
  2652. dp_err("No nbuf's allocated");
  2653. QDF_BUG(0);
  2654. return QDF_STATUS_E_RESOURCES;
  2655. }
  2656. /* No need to count the number of bytes received during replenish.
  2657. * Therefore set replenish.pkts.bytes as 0.
  2658. */
  2659. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2660. return QDF_STATUS_SUCCESS;
  2661. }
  2662. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2663. #ifdef DP_RX_MON_MEM_FRAG
  2664. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2665. bool is_mon_dest_desc)
  2666. {
  2667. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2668. if (is_mon_dest_desc)
  2669. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2670. }
  2671. #else
  2672. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2673. bool is_mon_dest_desc)
  2674. {
  2675. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2676. if (is_mon_dest_desc)
  2677. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2678. }
  2679. #endif
  2680. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2681. QDF_STATUS
  2682. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2683. {
  2684. struct dp_soc *soc = pdev->soc;
  2685. uint32_t rxdma_entries;
  2686. uint32_t rx_sw_desc_num;
  2687. struct dp_srng *dp_rxdma_srng;
  2688. struct rx_desc_pool *rx_desc_pool;
  2689. uint32_t status = QDF_STATUS_SUCCESS;
  2690. int mac_for_pdev;
  2691. mac_for_pdev = pdev->lmac_id;
  2692. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2693. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2694. soc, mac_for_pdev);
  2695. return status;
  2696. }
  2697. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2698. rxdma_entries = dp_rxdma_srng->num_entries;
  2699. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2700. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2701. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2702. status = dp_rx_desc_pool_alloc(soc,
  2703. rx_sw_desc_num,
  2704. rx_desc_pool);
  2705. if (status != QDF_STATUS_SUCCESS)
  2706. return status;
  2707. return status;
  2708. }
  2709. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2710. {
  2711. int mac_for_pdev = pdev->lmac_id;
  2712. struct dp_soc *soc = pdev->soc;
  2713. struct rx_desc_pool *rx_desc_pool;
  2714. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2715. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2716. }
  2717. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2718. {
  2719. int mac_for_pdev = pdev->lmac_id;
  2720. struct dp_soc *soc = pdev->soc;
  2721. uint32_t rxdma_entries;
  2722. uint32_t rx_sw_desc_num;
  2723. struct dp_srng *dp_rxdma_srng;
  2724. struct rx_desc_pool *rx_desc_pool;
  2725. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2726. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2727. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2728. /*
  2729. * If NSS is enabled, rx_desc_pool is already filled.
  2730. * Hence, just disable desc_pool frag flag.
  2731. */
  2732. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2733. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2734. soc, mac_for_pdev);
  2735. return QDF_STATUS_SUCCESS;
  2736. }
  2737. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2738. return QDF_STATUS_E_NOMEM;
  2739. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2740. rxdma_entries = dp_rxdma_srng->num_entries;
  2741. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2742. rx_sw_desc_num =
  2743. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2744. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2745. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2746. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2747. /* Disable monitor dest processing via frag */
  2748. if (target_type == TARGET_TYPE_QCN9160)
  2749. dp_rx_enable_mon_dest_frag(rx_desc_pool, true);
  2750. else
  2751. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2752. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2753. rx_sw_desc_num, rx_desc_pool);
  2754. return QDF_STATUS_SUCCESS;
  2755. }
  2756. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2757. {
  2758. int mac_for_pdev = pdev->lmac_id;
  2759. struct dp_soc *soc = pdev->soc;
  2760. struct rx_desc_pool *rx_desc_pool;
  2761. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2762. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2763. }
  2764. QDF_STATUS
  2765. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2766. {
  2767. int mac_for_pdev = pdev->lmac_id;
  2768. struct dp_soc *soc = pdev->soc;
  2769. struct dp_srng *dp_rxdma_srng;
  2770. struct rx_desc_pool *rx_desc_pool;
  2771. uint32_t rxdma_entries;
  2772. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2773. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2774. rxdma_entries = dp_rxdma_srng->num_entries;
  2775. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2776. /* Initialize RX buffer pool which will be
  2777. * used during low memory conditions
  2778. */
  2779. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2780. if (target_type == TARGET_TYPE_QCN9160)
  2781. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev,
  2782. dp_rxdma_srng,
  2783. rx_desc_pool,
  2784. rxdma_entries - 1);
  2785. else
  2786. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2787. dp_rxdma_srng,
  2788. rx_desc_pool,
  2789. rxdma_entries - 1);
  2790. }
  2791. void
  2792. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2793. {
  2794. int mac_for_pdev = pdev->lmac_id;
  2795. struct dp_soc *soc = pdev->soc;
  2796. struct rx_desc_pool *rx_desc_pool;
  2797. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2798. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2799. if (target_type == TARGET_TYPE_QCN9160)
  2800. dp_rx_desc_frag_free(soc, rx_desc_pool);
  2801. else
  2802. dp_rx_desc_nbuf_free(soc, rx_desc_pool, false);
  2803. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2804. }
  2805. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2806. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2807. struct dp_txrx_peer *txrx_peer,
  2808. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2809. uint8_t *rx_tlv_hdr)
  2810. {
  2811. uint32_t l2_hdr_offset = 0;
  2812. uint16_t msdu_len = 0;
  2813. uint32_t skip_len;
  2814. l2_hdr_offset =
  2815. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2816. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2817. skip_len = l2_hdr_offset;
  2818. } else {
  2819. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2820. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2821. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2822. }
  2823. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2824. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2825. qdf_nbuf_pull_head(nbuf, skip_len);
  2826. if (txrx_peer->vdev) {
  2827. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2828. QDF_TX_RX_STATUS_OK);
  2829. }
  2830. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2831. dp_info("special frame, mpdu sn 0x%x",
  2832. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2833. qdf_nbuf_set_exc_frame(nbuf, 1);
  2834. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2835. nbuf, NULL);
  2836. return true;
  2837. }
  2838. return false;
  2839. }
  2840. #endif