dp_main.c 49 KB

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  1. /*
  2. * Copyright (c) 2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "dp_rx.h"
  30. #include "../../wlan_cfg/wlan_cfg.h"
  31. #define DP_INTR_POLL_TIMER_MS 100
  32. /**
  33. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  34. */
  35. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  36. int ring_type, int ring_num, int pdev_id, uint32_t num_entries)
  37. {
  38. void *hal_soc = soc->hal_soc;
  39. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  40. /* TODO: See if we should get align size from hal */
  41. uint32_t ring_base_align = 8;
  42. struct hal_srng_params ring_params;
  43. srng->hal_srng = NULL;
  44. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  45. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  46. soc->osdev, soc->osdev->dev, srng->alloc_size,
  47. &(srng->base_paddr_unaligned));
  48. if (!srng->base_vaddr_unaligned) {
  49. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  50. "%s: alloc failed - ring_type: %d, ring_num %d\n",
  51. __func__, ring_type, ring_num);
  52. return QDF_STATUS_E_NOMEM;
  53. }
  54. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  55. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  56. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  57. ((unsigned long)(ring_params.ring_base_vaddr) -
  58. (unsigned long)srng->base_vaddr_unaligned);
  59. ring_params.num_entries = num_entries;
  60. /* TODO: Check MSI support and get MSI settings from HIF layer */
  61. ring_params.msi_data = 0;
  62. ring_params.msi_addr = 0;
  63. /* TODO: Setup interrupt timer and batch counter thresholds for
  64. * interrupt mitigation based on ring type
  65. */
  66. ring_params.intr_timer_thres_us = 8;
  67. ring_params.intr_batch_cntr_thres_entries = 1;
  68. /* TODO: Currently hal layer takes care of endianness related settings.
  69. * See if these settings need to passed from DP layer
  70. */
  71. ring_params.flags = 0;
  72. /* Enable low threshold interrupts for rx buffer rings (regular and
  73. * monitor buffer rings.
  74. * TODO: See if this is required for any other ring
  75. */
  76. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  77. /* TODO: Setting low threshold to 1/8th of ring size
  78. * see if this needs to be configurable
  79. */
  80. ring_params.low_threshold = num_entries >> 3;
  81. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  82. }
  83. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  84. pdev_id, &ring_params);
  85. return 0;
  86. }
  87. /**
  88. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  89. * Any buffers allocated and attached to ring entries are expected to be freed
  90. * before calling this function.
  91. */
  92. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  93. int ring_type, int ring_num)
  94. {
  95. if (!srng->hal_srng) {
  96. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  97. "%s: Ring type: %d, num:%d not setup\n",
  98. __func__, ring_type, ring_num);
  99. return;
  100. }
  101. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  102. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  103. srng->alloc_size,
  104. srng->base_vaddr_unaligned,
  105. srng->base_paddr_unaligned, 0);
  106. }
  107. /* TODO: Need this interface from HIF */
  108. void *hif_get_hal_handle(void *hif_handle);
  109. /*
  110. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  111. * @dp_ctx: DP SOC handle
  112. * @budget: Number of frames/descriptors that can be processed in one shot
  113. *
  114. * Return: remaining budget/quota for the soc device
  115. */
  116. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  117. {
  118. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  119. struct dp_soc *soc = int_ctx->soc;
  120. int ring = 0;
  121. uint32_t work_done = 0;
  122. uint32_t budget = dp_budget;
  123. uint8_t tx_mask = int_ctx->tx_ring_mask;
  124. uint8_t rx_mask = int_ctx->rx_ring_mask;
  125. /* Process Tx completion interrupts first to return back buffers */
  126. if (tx_mask) {
  127. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  128. if (tx_mask & (1 << ring)) {
  129. work_done =
  130. dp_tx_comp_handler(soc, ring, budget);
  131. budget -= work_done;
  132. if (work_done)
  133. DP_TRACE(INFO, "tx mask 0x%x ring %d, budget %d\n",
  134. tx_mask, ring, budget);
  135. if (budget <= 0)
  136. goto budget_done;
  137. }
  138. }
  139. }
  140. /* Process Rx interrupts */
  141. if (rx_mask) {
  142. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  143. if (rx_mask & (1 << ring)) {
  144. work_done =
  145. dp_rx_process(soc,
  146. soc->reo_dest_ring[ring].hal_srng,
  147. budget);
  148. budget -= work_done;
  149. if (work_done)
  150. DP_TRACE(INFO, "rx mask 0x%x ring %d, budget %d\n",
  151. tx_mask, ring, budget);
  152. if (budget <= 0)
  153. goto budget_done;
  154. }
  155. }
  156. }
  157. budget_done:
  158. return dp_budget - budget;
  159. }
  160. /* dp_interrupt_timer()- timer poll for interrupts
  161. *
  162. * @arg: SoC Handle
  163. *
  164. * Return:
  165. *
  166. */
  167. #ifdef DP_INTR_POLL_BASED
  168. void dp_interrupt_timer(void *arg)
  169. {
  170. struct dp_soc *soc = (struct dp_soc *) arg;
  171. int i;
  172. for (i = 0 ; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  173. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  174. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  175. }
  176. /*
  177. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  178. * @txrx_soc: DP SOC handle
  179. *
  180. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  181. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  182. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  183. *
  184. * Return: 0 for success. nonzero for failure.
  185. */
  186. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  187. {
  188. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  189. int i;
  190. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  191. soc->intr_ctx[i].tx_ring_mask = 0xF;
  192. soc->intr_ctx[i].rx_ring_mask = 0xF;
  193. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  194. soc->intr_ctx[i].soc = soc;
  195. }
  196. qdf_timer_init(soc->osdev, &soc->int_timer,
  197. dp_interrupt_timer, (void *)soc,
  198. QDF_TIMER_TYPE_WAKE_APPS);
  199. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  200. return QDF_STATUS_SUCCESS;
  201. }
  202. /*
  203. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  204. * @txrx_soc: DP SOC handle
  205. *
  206. * Return: void
  207. */
  208. void dp_soc_interrupt_detach(void *txrx_soc)
  209. {
  210. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  211. qdf_timer_stop(&soc->int_timer);
  212. /* TODO -- call timer detach? */
  213. }
  214. #else
  215. /*
  216. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  217. * @txrx_soc: DP SOC handle
  218. *
  219. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  220. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  221. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  222. *
  223. * Return: 0 for success. nonzero for failure.
  224. */
  225. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  226. {
  227. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  228. int i = 0;
  229. int num_irq = 0;
  230. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  231. int j = 0;
  232. int ret = 0;
  233. /* Map of IRQ ids registered with one interrupt context */
  234. int irq_id_map[HIF_MAX_GRP_IRQ];
  235. int tx_mask =
  236. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  237. int rx_mask =
  238. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  239. int rx_mon_mask =
  240. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  241. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  242. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  243. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  244. soc->intr_ctx[i].soc = soc;
  245. num_irq = 0;
  246. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  247. if (tx_mask & (1 << j)) {
  248. irq_id_map[num_irq++] =
  249. (wbm2host_tx_completions_ring1 - j);
  250. }
  251. if (rx_mask & (1 << j)) {
  252. irq_id_map[num_irq++] =
  253. (reo2host_destination_ring1 - j);
  254. }
  255. if (rx_mon_mask & (1 << j)) {
  256. irq_id_map[num_irq++] =
  257. (rxdma2host_monitor_destination_mac1
  258. - j);
  259. }
  260. }
  261. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  262. num_irq, irq_id_map,
  263. dp_service_srngs,
  264. &soc->intr_ctx[i]);
  265. if (ret) {
  266. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  267. "%s: failed, ret = %d", __func__, ret);
  268. return QDF_STATUS_E_FAILURE;
  269. }
  270. }
  271. return QDF_STATUS_SUCCESS;
  272. }
  273. /*
  274. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  275. * @txrx_soc: DP SOC handle
  276. *
  277. * Return: void
  278. */
  279. void dp_soc_interrupt_detach(void *txrx_soc)
  280. {
  281. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  282. int i;
  283. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  284. soc->intr_ctx[i].tx_ring_mask = 0;
  285. soc->intr_ctx[i].rx_ring_mask = 0;
  286. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  287. }
  288. }
  289. #endif
  290. #define AVG_MAX_MPDUS_PER_TID 128
  291. #define AVG_TIDS_PER_CLIENT 2
  292. #define AVG_FLOWS_PER_TID 2
  293. #define AVG_MSDUS_PER_FLOW 128
  294. #define AVG_MSDUS_PER_MPDU 4
  295. /*
  296. * Allocate and setup link descriptor pool that will be used by HW for
  297. * various link and queue descriptors and managed by WBM
  298. */
  299. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  300. {
  301. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  302. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  303. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  304. uint32_t num_mpdus_per_link_desc =
  305. hal_num_mpdus_per_link_desc(soc->hal_soc);
  306. uint32_t num_msdus_per_link_desc =
  307. hal_num_msdus_per_link_desc(soc->hal_soc);
  308. uint32_t num_mpdu_links_per_queue_desc =
  309. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  310. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  311. uint32_t total_link_descs, total_mem_size;
  312. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  313. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  314. uint32_t num_link_desc_banks;
  315. uint32_t last_bank_size = 0;
  316. uint32_t entry_size, num_entries;
  317. int i;
  318. /* Only Tx queue descriptors are allocated from common link descriptor
  319. * pool Rx queue descriptors are not included in this because (REO queue
  320. * extension descriptors) they are expected to be allocated contiguously
  321. * with REO queue descriptors
  322. */
  323. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  324. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  325. num_mpdu_queue_descs = num_mpdu_link_descs /
  326. num_mpdu_links_per_queue_desc;
  327. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  328. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  329. num_msdus_per_link_desc;
  330. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  331. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  332. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  333. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  334. /* Round up to power of 2 */
  335. total_link_descs = 1;
  336. while (total_link_descs < num_entries)
  337. total_link_descs <<= 1;
  338. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  339. "%s: total_link_descs: %u, link_desc_size: %d\n",
  340. __func__, total_link_descs, link_desc_size);
  341. total_mem_size = total_link_descs * link_desc_size;
  342. total_mem_size += link_desc_align;
  343. if (total_mem_size <= max_alloc_size) {
  344. num_link_desc_banks = 0;
  345. last_bank_size = total_mem_size;
  346. } else {
  347. num_link_desc_banks = (total_mem_size) /
  348. (max_alloc_size - link_desc_align);
  349. last_bank_size = total_mem_size %
  350. (max_alloc_size - link_desc_align);
  351. }
  352. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  353. "%s: total_mem_size: %d, num_link_desc_banks: %u\n",
  354. __func__, total_mem_size, num_link_desc_banks);
  355. for (i = 0; i < num_link_desc_banks; i++) {
  356. soc->link_desc_banks[i].base_vaddr_unaligned =
  357. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  358. max_alloc_size,
  359. &(soc->link_desc_banks[i].base_paddr_unaligned));
  360. soc->link_desc_banks[i].size = max_alloc_size;
  361. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  362. soc->link_desc_banks[i].base_vaddr_unaligned) +
  363. ((unsigned long)(
  364. soc->link_desc_banks[i].base_vaddr_unaligned) %
  365. link_desc_align));
  366. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  367. soc->link_desc_banks[i].base_paddr_unaligned) +
  368. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  369. (unsigned long)(
  370. soc->link_desc_banks[i].base_vaddr_unaligned));
  371. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  372. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  373. "%s: Link descriptor memory alloc failed\n",
  374. __func__);
  375. goto fail;
  376. }
  377. }
  378. if (last_bank_size) {
  379. /* Allocate last bank in case total memory required is not exact
  380. * multiple of max_alloc_size
  381. */
  382. soc->link_desc_banks[i].base_vaddr_unaligned =
  383. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  384. last_bank_size,
  385. &(soc->link_desc_banks[i].base_paddr_unaligned));
  386. soc->link_desc_banks[i].size = last_bank_size;
  387. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  388. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  389. ((unsigned long)(
  390. soc->link_desc_banks[i].base_vaddr_unaligned) %
  391. link_desc_align));
  392. soc->link_desc_banks[i].base_paddr =
  393. (unsigned long)(
  394. soc->link_desc_banks[i].base_paddr_unaligned) +
  395. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  396. (unsigned long)(
  397. soc->link_desc_banks[i].base_vaddr_unaligned));
  398. }
  399. /* Allocate and setup link descriptor idle list for HW internal use */
  400. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  401. total_mem_size = entry_size * total_link_descs;
  402. if (total_mem_size <= max_alloc_size) {
  403. void *desc;
  404. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  405. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  406. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  407. "%s: Link desc idle ring setup failed\n",
  408. __func__);
  409. goto fail;
  410. }
  411. hal_srng_access_start_unlocked(soc->hal_soc,
  412. soc->wbm_idle_link_ring.hal_srng);
  413. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  414. soc->link_desc_banks[i].base_paddr; i++) {
  415. uint32_t num_entries = (soc->link_desc_banks[i].size -
  416. (unsigned long)(
  417. soc->link_desc_banks[i].base_vaddr) -
  418. (unsigned long)(
  419. soc->link_desc_banks[i].base_vaddr_unaligned))
  420. / link_desc_size;
  421. unsigned long paddr = (unsigned long)(
  422. soc->link_desc_banks[i].base_paddr);
  423. while (num_entries && (desc = hal_srng_src_get_next(
  424. soc->hal_soc,
  425. soc->wbm_idle_link_ring.hal_srng))) {
  426. hal_set_link_desc_addr(desc, i, paddr);
  427. num_entries--;
  428. paddr += link_desc_size;
  429. }
  430. }
  431. hal_srng_access_end_unlocked(soc->hal_soc,
  432. soc->wbm_idle_link_ring.hal_srng);
  433. } else {
  434. uint32_t num_scatter_bufs;
  435. uint32_t num_entries_per_buf;
  436. uint32_t rem_entries;
  437. uint8_t *scatter_buf_ptr;
  438. uint16_t scatter_buf_num;
  439. soc->wbm_idle_scatter_buf_size =
  440. hal_idle_list_scatter_buf_size(soc->hal_soc);
  441. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  442. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  443. num_scatter_bufs = (total_mem_size /
  444. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  445. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  446. for (i = 0; i < num_scatter_bufs; i++) {
  447. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  448. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  449. soc->wbm_idle_scatter_buf_size,
  450. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  451. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  452. QDF_TRACE(QDF_MODULE_ID_TXRX,
  453. QDF_TRACE_LEVEL_ERROR,
  454. "%s:Scatter list memory alloc failed\n",
  455. __func__);
  456. goto fail;
  457. }
  458. }
  459. /* Populate idle list scatter buffers with link descriptor
  460. * pointers
  461. */
  462. scatter_buf_num = 0;
  463. scatter_buf_ptr = (uint8_t *)(
  464. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  465. rem_entries = num_entries_per_buf;
  466. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  467. soc->link_desc_banks[i].base_paddr; i++) {
  468. uint32_t num_link_descs =
  469. (soc->link_desc_banks[i].size -
  470. (unsigned long)(
  471. soc->link_desc_banks[i].base_vaddr) -
  472. (unsigned long)(
  473. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  474. link_desc_size;
  475. unsigned long paddr = (unsigned long)(
  476. soc->link_desc_banks[i].base_paddr);
  477. void *desc = NULL;
  478. while (num_link_descs && (desc =
  479. hal_srng_src_get_next(soc->hal_soc,
  480. soc->wbm_idle_link_ring.hal_srng))) {
  481. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  482. i, paddr);
  483. num_link_descs--;
  484. paddr += link_desc_size;
  485. if (rem_entries) {
  486. rem_entries--;
  487. scatter_buf_ptr += link_desc_size;
  488. } else {
  489. rem_entries = num_entries_per_buf;
  490. scatter_buf_num++;
  491. scatter_buf_ptr = (uint8_t *)(
  492. soc->wbm_idle_scatter_buf_base_vaddr[
  493. scatter_buf_num]);
  494. }
  495. }
  496. }
  497. /* Setup link descriptor idle list in HW */
  498. hal_setup_link_idle_list(soc->hal_soc,
  499. soc->wbm_idle_scatter_buf_base_paddr,
  500. soc->wbm_idle_scatter_buf_base_vaddr,
  501. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  502. (uint32_t)(scatter_buf_ptr -
  503. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  504. scatter_buf_num])));
  505. }
  506. return 0;
  507. fail:
  508. if (soc->wbm_idle_link_ring.hal_srng) {
  509. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  510. WBM_IDLE_LINK, 0);
  511. }
  512. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  513. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  514. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  515. soc->wbm_idle_scatter_buf_size,
  516. soc->wbm_idle_scatter_buf_base_vaddr[i],
  517. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  518. }
  519. }
  520. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  521. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  522. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  523. soc->link_desc_banks[i].size,
  524. soc->link_desc_banks[i].base_vaddr_unaligned,
  525. soc->link_desc_banks[i].base_paddr_unaligned,
  526. 0);
  527. }
  528. }
  529. return QDF_STATUS_E_FAILURE;
  530. }
  531. /*
  532. * Free link descriptor pool that was setup HW
  533. */
  534. void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  535. {
  536. int i;
  537. if (soc->wbm_idle_link_ring.hal_srng) {
  538. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  539. WBM_IDLE_LINK, 0);
  540. }
  541. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  542. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  543. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  544. soc->wbm_idle_scatter_buf_size,
  545. soc->wbm_idle_scatter_buf_base_vaddr[i],
  546. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  547. }
  548. }
  549. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  550. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  551. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  552. soc->link_desc_banks[i].size,
  553. soc->link_desc_banks[i].base_vaddr_unaligned,
  554. soc->link_desc_banks[i].base_paddr_unaligned,
  555. 0);
  556. }
  557. }
  558. }
  559. /* TODO: Following should be configurable */
  560. #define WBM_RELEASE_RING_SIZE 64
  561. #define TCL_DATA_RING_SIZE 512
  562. #define TCL_CMD_RING_SIZE 32
  563. #define TCL_STATUS_RING_SIZE 32
  564. #define REO_DST_RING_SIZE 2048
  565. #define REO_REINJECT_RING_SIZE 32
  566. #define RX_RELEASE_RING_SIZE 256
  567. #define REO_EXCEPTION_RING_SIZE 128
  568. #define REO_CMD_RING_SIZE 32
  569. #define REO_STATUS_RING_SIZE 32
  570. #define RXDMA_BUF_RING_SIZE 8192
  571. #define RXDMA_MONITOR_BUF_RING_SIZE 8192
  572. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  573. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  574. /*
  575. * dp_soc_cmn_setup() - Common SoC level initializion
  576. * @soc: Datapath SOC handle
  577. *
  578. * This is an internal function used to setup common SOC data structures,
  579. * to be called from PDEV attach after receiving HW mode capabilities from FW
  580. */
  581. static int dp_soc_cmn_setup(struct dp_soc *soc)
  582. {
  583. int i;
  584. if (soc->cmn_init_done)
  585. return 0;
  586. if (dp_peer_find_attach(soc))
  587. goto fail0;
  588. if (dp_hw_link_desc_pool_setup(soc))
  589. goto fail1;
  590. /* Setup SRNG rings */
  591. /* Common rings */
  592. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  593. WBM_RELEASE_RING_SIZE)) {
  594. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  595. "%s: dp_srng_setup failed for wbm_desc_rel_ring\n",
  596. __func__);
  597. goto fail1;
  598. }
  599. soc->num_tcl_data_rings = 0;
  600. /* Tx data rings */
  601. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  602. soc->num_tcl_data_rings =
  603. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  604. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  605. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  606. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  607. QDF_TRACE(QDF_MODULE_ID_TXRX,
  608. QDF_TRACE_LEVEL_ERROR,
  609. "%s: dp_srng_setup failed for tcl_data_ring[%d]\n",
  610. __func__, i);
  611. goto fail1;
  612. }
  613. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  614. WBM2SW_RELEASE, i, 0, TCL_DATA_RING_SIZE)) {
  615. QDF_TRACE(QDF_MODULE_ID_TXRX,
  616. QDF_TRACE_LEVEL_ERROR,
  617. "%s: dp_srng_setup failed for tx_comp_ring[%d]\n",
  618. __func__, i);
  619. goto fail1;
  620. }
  621. }
  622. } else {
  623. /* This will be incremented during per pdev ring setup */
  624. soc->num_tcl_data_rings = 0;
  625. }
  626. if (dp_tx_soc_attach(soc)) {
  627. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  628. "%s: dp_tx_soc_attach failed\n", __func__);
  629. goto fail1;
  630. }
  631. /* TCL command and status rings */
  632. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  633. TCL_CMD_RING_SIZE)) {
  634. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  635. "%s: dp_srng_setup failed for tcl_cmd_ring\n",
  636. __func__);
  637. goto fail1;
  638. }
  639. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  640. TCL_STATUS_RING_SIZE)) {
  641. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  642. "%s: dp_srng_setup failed for tcl_status_ring\n",
  643. __func__);
  644. goto fail1;
  645. }
  646. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  647. * descriptors
  648. */
  649. /* Rx data rings */
  650. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  651. soc->num_reo_dest_rings =
  652. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  653. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  654. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  655. i, 0, REO_DST_RING_SIZE)) {
  656. QDF_TRACE(QDF_MODULE_ID_TXRX,
  657. QDF_TRACE_LEVEL_ERROR,
  658. "%s: dp_srng_setup failed for reo_dest_ring[%d]\n",
  659. __func__, i);
  660. goto fail1;
  661. }
  662. }
  663. } else {
  664. /* This will be incremented during per pdev ring setup */
  665. soc->num_reo_dest_rings = 0;
  666. }
  667. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  668. /* REO reinjection ring */
  669. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  670. REO_REINJECT_RING_SIZE)) {
  671. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  672. "%s: dp_srng_setup failed for reo_reinject_ring\n",
  673. __func__);
  674. goto fail1;
  675. }
  676. /* Rx release ring */
  677. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  678. RX_RELEASE_RING_SIZE)) {
  679. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  680. "%s: dp_srng_setup failed for rx_rel_ring\n",
  681. __func__);
  682. goto fail1;
  683. }
  684. /* Rx exception ring */
  685. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  686. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  687. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  688. "%s: dp_srng_setup failed for reo_exception_ring\n",
  689. __func__);
  690. goto fail1;
  691. }
  692. /* REO command and status rings */
  693. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  694. REO_CMD_RING_SIZE)) {
  695. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  696. "%s: dp_srng_setup failed for reo_cmd_ring\n",
  697. __func__);
  698. goto fail1;
  699. }
  700. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  701. REO_STATUS_RING_SIZE)) {
  702. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  703. "%s: dp_srng_setup failed for reo_status_ring\n",
  704. __func__);
  705. goto fail1;
  706. }
  707. dp_soc_interrupt_attach(soc);
  708. /* Setup HW REO */
  709. hal_reo_setup(soc->hal_soc);
  710. soc->cmn_init_done = 1;
  711. return 0;
  712. fail1:
  713. /*
  714. * Cleanup will be done as part of soc_detach, which will
  715. * be called on pdev attach failure
  716. */
  717. fail0:
  718. return QDF_STATUS_E_FAILURE;
  719. }
  720. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force);
  721. /*
  722. * dp_pdev_attach_wifi3() - attach txrx pdev
  723. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  724. * @txrx_soc: Datapath SOC handle
  725. * @htc_handle: HTC handle for host-target interface
  726. * @qdf_osdev: QDF OS device
  727. * @pdev_id: PDEV ID
  728. *
  729. * Return: DP PDEV handle on success, NULL on failure
  730. */
  731. void *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc, void *ctrl_pdev,
  732. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  733. {
  734. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  735. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  736. if (!pdev) {
  737. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  738. "%s: DP PDEV memory allocation failed\n", __func__);
  739. goto fail0;
  740. }
  741. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  742. if (!pdev->wlan_cfg_ctx) {
  743. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  744. "%s: pdev cfg_attach failed\n", __func__);
  745. qdf_mem_free(pdev);
  746. goto fail0;
  747. }
  748. pdev->soc = soc;
  749. pdev->osif_pdev = ctrl_pdev;
  750. pdev->pdev_id = pdev_id;
  751. soc->pdev_list[pdev_id] = pdev;
  752. TAILQ_INIT(&pdev->vdev_list);
  753. pdev->vdev_count = 0;
  754. if (dp_soc_cmn_setup(soc)) {
  755. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  756. "%s: dp_soc_cmn_setup failed\n", __func__);
  757. goto fail1;
  758. }
  759. /* Setup per PDEV TCL rings if configured */
  760. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  761. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  762. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  763. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  764. "%s: dp_srng_setup failed for tcl_data_ring\n",
  765. __func__);
  766. goto fail1;
  767. }
  768. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  769. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  770. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  771. "%s: dp_srng_setup failed for tx_comp_ring\n",
  772. __func__);
  773. goto fail1;
  774. }
  775. soc->num_tcl_data_rings++;
  776. }
  777. /* Tx specific init */
  778. if (dp_tx_pdev_attach(pdev)) {
  779. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  780. "%s: dp_tx_pdev_attach failed\n", __func__);
  781. goto fail1;
  782. }
  783. /* Setup per PDEV REO rings if configured */
  784. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  785. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  786. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  787. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  788. "%s: dp_srng_setup failed for reo_dest_ring\n",
  789. __func__);
  790. goto fail1;
  791. }
  792. soc->num_reo_dest_rings++;
  793. }
  794. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  795. RXDMA_BUF_RING_SIZE)) {
  796. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  797. "%s: dp_srng_setup failed rx refill ring\n", __func__);
  798. goto fail1;
  799. }
  800. #ifdef QCA_HOST2FW_RXBUF_RING
  801. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1, pdev_id,
  802. RXDMA_BUF_RING_SIZE)) {
  803. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  804. "%s: dp_srng_setup failed rx mac ring\n", __func__);
  805. goto fail1;
  806. }
  807. #endif
  808. /* TODO: RXDMA destination ring is not planned to be used currently.
  809. * Setup the ring when required
  810. */
  811. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  812. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  813. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  814. "%s: dp_srng_setup failed for rxdma_mon_buf_ring\n",
  815. __func__);
  816. goto fail1;
  817. }
  818. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  819. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  820. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  821. "%s: dp_srng_setup failed for rxdma_mon_dst_ring\n",
  822. __func__);
  823. goto fail1;
  824. }
  825. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  826. RXDMA_MONITOR_STATUS, 0, pdev_id,
  827. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  828. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  829. "%s: dp_srng_setup failed for rxdma_mon_status_ring\n",
  830. __func__);
  831. goto fail1;
  832. }
  833. /* Rx specific init */
  834. if (dp_rx_pdev_attach(pdev)) {
  835. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  836. "%s: dp_rx_pdev_attach failed \n", __func__);
  837. goto fail0;
  838. }
  839. #ifndef CONFIG_WIN
  840. /* MCL */
  841. dp_local_peer_id_pool_init(pdev);
  842. #endif
  843. return (void *)pdev;
  844. fail1:
  845. dp_pdev_detach_wifi3((void *)pdev, 0);
  846. fail0:
  847. return NULL;
  848. }
  849. /*
  850. * dp_pdev_detach_wifi3() - detach txrx pdev
  851. * @txrx_pdev: Datapath PDEV handle
  852. * @force: Force detach
  853. *
  854. */
  855. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force)
  856. {
  857. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  858. struct dp_soc *soc = pdev->soc;
  859. dp_tx_pdev_detach(pdev);
  860. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  861. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  862. TCL_DATA, pdev->pdev_id);
  863. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  864. WBM2SW_RELEASE, pdev->pdev_id);
  865. }
  866. dp_rx_pdev_detach(pdev);
  867. /* Setup per PDEV REO rings if configured */
  868. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  869. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  870. REO_DST, pdev->pdev_id);
  871. }
  872. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  873. #ifdef QCA_HOST2FW_RXBUF_RING
  874. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1);
  875. #endif
  876. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  877. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  878. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  879. RXDMA_MONITOR_STATUS, 0);
  880. soc->pdev_list[pdev->pdev_id] = NULL;
  881. qdf_mem_free(pdev);
  882. }
  883. /*
  884. * dp_soc_detach_wifi3() - Detach txrx SOC
  885. * @txrx_soc: DP SOC handle
  886. *
  887. */
  888. void dp_soc_detach_wifi3(void *txrx_soc)
  889. {
  890. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  891. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  892. int i;
  893. soc->cmn_init_done = 0;
  894. for (i = 0; i < MAX_PDEV_CNT; i++) {
  895. if (soc->pdev_list[i])
  896. dp_pdev_detach_wifi3((void *)pdev, 1);
  897. }
  898. dp_peer_find_detach(soc);
  899. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  900. * SW descriptors
  901. */
  902. /* Free the ring memories */
  903. /* Common rings */
  904. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  905. /* Tx data rings */
  906. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  907. dp_tx_soc_detach(soc);
  908. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  909. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  910. TCL_DATA, i);
  911. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  912. WBM2SW_RELEASE, i);
  913. }
  914. }
  915. /* TCL command and status rings */
  916. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  917. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  918. /* Rx data rings */
  919. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  920. soc->num_reo_dest_rings =
  921. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  922. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  923. /* TODO: Get number of rings and ring sizes
  924. * from wlan_cfg
  925. */
  926. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  927. REO_DST, i);
  928. }
  929. }
  930. /* REO reinjection ring */
  931. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  932. /* Rx release ring */
  933. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  934. /* Rx exception ring */
  935. /* TODO: Better to store ring_type and ring_num in
  936. * dp_srng during setup
  937. */
  938. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  939. /* REO command and status rings */
  940. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  941. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  942. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  943. htt_soc_detach(soc->htt_handle);
  944. }
  945. /*
  946. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  947. * @txrx_soc: Datapath SOC handle
  948. */
  949. int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  950. {
  951. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  952. int i;
  953. htt_soc_attach_target(soc->htt_handle);
  954. for (i = 0; i < MAX_PDEV_CNT; i++) {
  955. struct dp_pdev *pdev = soc->pdev_list[i];
  956. if (pdev) {
  957. htt_srng_setup(soc->htt_handle, i,
  958. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  959. #ifdef QCA_HOST2FW_RXBUF_RING
  960. htt_srng_setup(soc->htt_handle, i,
  961. pdev->rx_mac_buf_ring.hal_srng, RXDMA_BUF);
  962. #endif
  963. #ifdef notyet /* FW doesn't handle monitor rings yet */
  964. htt_srng_setup(soc->htt_handle, i,
  965. pdev->rxdma_mon_buf_ring.hal_srng,
  966. RXDMA_MONITOR_BUF);
  967. htt_srng_setup(soc->htt_handle, i,
  968. pdev->rxdma_mon_dst_ring.hal_srng,
  969. RXDMA_MONITOR_DST);
  970. htt_srng_setup(soc->htt_handle, i,
  971. pdev->rxdma_mon_status_ring.hal_srng,
  972. RXDMA_MONITOR_STATUS);
  973. #endif
  974. }
  975. }
  976. return 0;
  977. }
  978. /*
  979. * dp_vdev_attach_wifi3() - attach txrx vdev
  980. * @txrx_pdev: Datapath PDEV handle
  981. * @vdev_mac_addr: MAC address of the virtual interface
  982. * @vdev_id: VDEV Id
  983. * @wlan_op_mode: VDEV operating mode
  984. *
  985. * Return: DP VDEV handle on success, NULL on failure
  986. */
  987. void *dp_vdev_attach_wifi3(void *txrx_pdev,
  988. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  989. {
  990. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  991. struct dp_soc *soc = pdev->soc;
  992. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  993. if (!vdev) {
  994. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  995. "%s: DP VDEV memory allocation failed\n", __func__);
  996. goto fail0;
  997. }
  998. vdev->pdev = pdev;
  999. vdev->vdev_id = vdev_id;
  1000. vdev->opmode = op_mode;
  1001. vdev->osdev = soc->osdev;
  1002. vdev->osif_rx = NULL;
  1003. vdev->osif_rx_mon = NULL;
  1004. vdev->osif_vdev = NULL;
  1005. vdev->delete.pending = 0;
  1006. vdev->safemode = 0;
  1007. vdev->drop_unenc = 1;
  1008. #ifdef notyet
  1009. vdev->filters_num = 0;
  1010. #endif
  1011. qdf_mem_copy(
  1012. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1013. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1014. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1015. /* TODO: Initialize default HTT meta data that will be used in
  1016. * TCL descriptors for packets transmitted from this VDEV
  1017. */
  1018. TAILQ_INIT(&vdev->peer_list);
  1019. /* add this vdev into the pdev's list */
  1020. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1021. pdev->vdev_count++;
  1022. dp_tx_vdev_attach(vdev);
  1023. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1024. "Created vdev %p (%02x:%02x:%02x:%02x:%02x:%02x)\n", vdev,
  1025. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1026. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1027. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1028. return (void *)vdev;
  1029. fail0:
  1030. return NULL;
  1031. }
  1032. /**
  1033. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1034. * @vdev: Datapath VDEV handle
  1035. * @osif_vdev: OSIF vdev handle
  1036. * @txrx_ops: Tx and Rx operations
  1037. *
  1038. * Return: DP VDEV handle on success, NULL on failure
  1039. */
  1040. void dp_vdev_register_wifi3(void *vdev_handle, void *osif_vdev,
  1041. struct ol_txrx_ops *txrx_ops)
  1042. {
  1043. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1044. vdev->osif_vdev = osif_vdev;
  1045. vdev->osif_rx = txrx_ops->rx.rx;
  1046. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1047. #ifdef notyet
  1048. #if ATH_SUPPORT_WAPI
  1049. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1050. #endif
  1051. #if UMAC_SUPPORT_PROXY_ARP
  1052. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1053. #endif
  1054. #endif
  1055. /* TODO: Enable the following once Tx code is integrated */
  1056. txrx_ops->tx.tx = dp_tx_send;
  1057. DP_TRACE(ERROR, "DP Vdev Register success");
  1058. }
  1059. /*
  1060. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1061. * @txrx_vdev: Datapath VDEV handle
  1062. * @callback: Callback OL_IF on completion of detach
  1063. * @cb_context: Callback context
  1064. *
  1065. */
  1066. void dp_vdev_detach_wifi3(void *vdev_handle,
  1067. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1068. {
  1069. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1070. struct dp_pdev *pdev = vdev->pdev;
  1071. struct dp_soc *soc = pdev->soc;
  1072. /* preconditions */
  1073. qdf_assert(vdev);
  1074. /* remove the vdev from its parent pdev's list */
  1075. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1076. /*
  1077. * Use peer_ref_mutex while accessing peer_list, in case
  1078. * a peer is in the process of being removed from the list.
  1079. */
  1080. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1081. /* check that the vdev has no peers allocated */
  1082. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1083. /* debug print - will be removed later */
  1084. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1085. "%s: not deleting vdev object %p (%02x:%02x:%02x:%02x:%02x:%02x)"
  1086. "until deletion finishes for all its peers\n",
  1087. __func__, vdev,
  1088. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1089. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1090. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1091. /* indicate that the vdev needs to be deleted */
  1092. vdev->delete.pending = 1;
  1093. vdev->delete.callback = callback;
  1094. vdev->delete.context = cb_context;
  1095. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1096. return;
  1097. }
  1098. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1099. dp_tx_vdev_detach(vdev);
  1100. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1101. "%s: deleting vdev object %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1102. __func__, vdev,
  1103. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1104. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1105. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1106. qdf_mem_free(vdev);
  1107. if (callback)
  1108. callback(cb_context);
  1109. }
  1110. /*
  1111. * dp_peer_attach_wifi3() - attach txrx peer
  1112. * @txrx_vdev: Datapath VDEV handle
  1113. * @peer_mac_addr: Peer MAC address
  1114. *
  1115. * Return: DP peeer handle on success, NULL on failure
  1116. */
  1117. void *dp_peer_attach_wifi3(void *vdev_handle, uint8_t *peer_mac_addr)
  1118. {
  1119. struct dp_peer *peer;
  1120. int i;
  1121. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1122. struct dp_pdev *pdev;
  1123. struct dp_soc *soc;
  1124. /* preconditions */
  1125. qdf_assert(vdev);
  1126. qdf_assert(peer_mac_addr);
  1127. pdev = vdev->pdev;
  1128. soc = pdev->soc;
  1129. #ifdef notyet
  1130. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1131. soc->mempool_ol_ath_peer);
  1132. #else
  1133. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1134. #endif
  1135. if (!peer)
  1136. return NULL; /* failure */
  1137. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1138. qdf_spinlock_create(&peer->peer_info_lock);
  1139. /* store provided params */
  1140. peer->vdev = vdev;
  1141. qdf_mem_copy(
  1142. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1143. /* TODO: See of rx_opt_proc is really required */
  1144. peer->rx_opt_proc = soc->rx_opt_proc;
  1145. dp_peer_rx_init(pdev, peer);
  1146. /* initialize the peer_id */
  1147. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1148. peer->peer_ids[i] = HTT_INVALID_PEER;
  1149. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1150. qdf_atomic_init(&peer->ref_cnt);
  1151. /* keep one reference for attach */
  1152. qdf_atomic_inc(&peer->ref_cnt);
  1153. /* add this peer into the vdev's list */
  1154. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1155. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1156. /* TODO: See if hash based search is required */
  1157. dp_peer_find_hash_add(soc, peer);
  1158. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1159. /* TODO: Check on the destination ring number to be passed to FW */
  1160. soc->cdp_soc.ol_ops->peer_set_default_routing(soc->osif_soc, peer->mac_addr.raw,
  1161. peer->vdev->vdev_id, 0, 1);
  1162. }
  1163. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1164. "vdev %p created peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1165. vdev, peer,
  1166. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1167. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1168. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1169. /*
  1170. * For every peer MAp message search and set if bss_peer
  1171. */
  1172. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1173. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1174. "vdev bss_peer!!!!\n");
  1175. peer->bss_peer = 1;
  1176. vdev->vap_bss_peer = peer;
  1177. }
  1178. #ifndef CONFIG_WIN
  1179. dp_local_peer_id_alloc(pdev, peer);
  1180. #endif
  1181. return (void *)peer;
  1182. }
  1183. /*
  1184. * dp_peer_authorize() - authorize txrx peer
  1185. * @peer_handle: Datapath peer handle
  1186. * @authorize
  1187. *
  1188. */
  1189. void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1190. {
  1191. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1192. struct dp_soc *soc;
  1193. if (peer != NULL) {
  1194. soc = peer->vdev->pdev->soc;
  1195. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1196. peer->authorize = authorize ? 1 : 0;
  1197. #ifdef notyet /* ATH_BAND_STEERING */
  1198. peer->peer_bs_inact_flag = 0;
  1199. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1200. #endif
  1201. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1202. }
  1203. }
  1204. /*
  1205. * dp_peer_unref_delete() - unref and delete peer
  1206. * @peer_handle: Datapath peer handle
  1207. *
  1208. */
  1209. void dp_peer_unref_delete(void *peer_handle)
  1210. {
  1211. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1212. struct dp_vdev *vdev = peer->vdev;
  1213. struct dp_soc *soc = vdev->pdev->soc;
  1214. struct dp_peer *tmppeer;
  1215. int found = 0;
  1216. uint16_t peer_id;
  1217. /*
  1218. * Hold the lock all the way from checking if the peer ref count
  1219. * is zero until the peer references are removed from the hash
  1220. * table and vdev list (if the peer ref count is zero).
  1221. * This protects against a new HL tx operation starting to use the
  1222. * peer object just after this function concludes it's done being used.
  1223. * Furthermore, the lock needs to be held while checking whether the
  1224. * vdev's list of peers is empty, to make sure that list is not modified
  1225. * concurrently with the empty check.
  1226. */
  1227. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1228. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1229. peer_id = peer->peer_ids[0];
  1230. /*
  1231. * Make sure that the reference to the peer in
  1232. * peer object map is removed
  1233. */
  1234. if (peer_id != HTT_INVALID_PEER)
  1235. soc->peer_id_to_obj_map[peer_id] = NULL;
  1236. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1237. "Deleting peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1238. peer, peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1239. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1240. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1241. /* remove the reference to the peer from the hash table */
  1242. dp_peer_find_hash_remove(soc, peer);
  1243. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1244. if (tmppeer == peer) {
  1245. found = 1;
  1246. break;
  1247. }
  1248. }
  1249. if (found) {
  1250. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1251. peer_list_elem);
  1252. } else {
  1253. /*Ignoring the remove operation as peer not found*/
  1254. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1255. "WARN peer %p not found in vdev (%p)->peer_list:%p\n",
  1256. peer, vdev, &peer->vdev->peer_list);
  1257. }
  1258. /* cleanup the Rx reorder queues for this peer */
  1259. dp_peer_rx_cleanup(vdev, peer);
  1260. /* check whether the parent vdev has no peers left */
  1261. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1262. /*
  1263. * Now that there are no references to the peer, we can
  1264. * release the peer reference lock.
  1265. */
  1266. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1267. /*
  1268. * Check if the parent vdev was waiting for its peers
  1269. * to be deleted, in order for it to be deleted too.
  1270. */
  1271. if (vdev->delete.pending) {
  1272. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1273. vdev->delete.callback;
  1274. void *vdev_delete_context =
  1275. vdev->delete.context;
  1276. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1277. QDF_TRACE_LEVEL_INFO_HIGH,
  1278. "%s: deleting vdev object %p "
  1279. "(%02x:%02x:%02x:%02x:%02x:%02x)"
  1280. " - its last peer is done\n",
  1281. __func__, vdev,
  1282. vdev->mac_addr.raw[0],
  1283. vdev->mac_addr.raw[1],
  1284. vdev->mac_addr.raw[2],
  1285. vdev->mac_addr.raw[3],
  1286. vdev->mac_addr.raw[4],
  1287. vdev->mac_addr.raw[5]);
  1288. /* all peers are gone, go ahead and delete it */
  1289. qdf_mem_free(vdev);
  1290. if (vdev_delete_cb)
  1291. vdev_delete_cb(vdev_delete_context);
  1292. }
  1293. } else {
  1294. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1295. }
  1296. #ifdef notyet
  1297. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1298. #else
  1299. qdf_mem_free(peer);
  1300. #endif
  1301. #ifdef notyet /* See why this should be done in DP layer */
  1302. qdf_atomic_inc(&soc->peer_count);
  1303. #endif
  1304. } else {
  1305. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1306. }
  1307. }
  1308. /*
  1309. * dp_peer_detach_wifi3() – Detach txrx peer
  1310. * @peer_handle: Datapath peer handle
  1311. *
  1312. */
  1313. void dp_peer_detach_wifi3(void *peer_handle)
  1314. {
  1315. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1316. /* redirect the peer's rx delivery function to point to a
  1317. * discard func
  1318. */
  1319. peer->rx_opt_proc = dp_rx_discard;
  1320. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1321. "%s:peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n", __func__, peer,
  1322. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1323. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1324. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1325. /*
  1326. * Remove the reference added during peer_attach.
  1327. * The peer will still be left allocated until the
  1328. * PEER_UNMAP message arrives to remove the other
  1329. * reference, added by the PEER_MAP message.
  1330. */
  1331. dp_peer_unref_delete(peer_handle);
  1332. #ifndef CONFIG_WIN
  1333. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1334. #endif
  1335. qdf_spinlock_destroy(&peer->peer_info_lock);
  1336. }
  1337. /*
  1338. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1339. * @peer_handle: Datapath peer handle
  1340. *
  1341. */
  1342. uint8 *dp_get_vdev_mac_addr_wifi3(void *pvdev)
  1343. {
  1344. struct dp_vdev *vdev = pvdev;
  1345. return vdev->mac_addr.raw;
  1346. }
  1347. /*
  1348. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1349. * @peer_handle: Datapath peer handle
  1350. *
  1351. */
  1352. void *dp_get_vdev_from_vdev_id_wifi3(void *dev, uint8_t vdev_id)
  1353. {
  1354. struct dp_pdev *pdev = dev;
  1355. struct dp_vdev *vdev = NULL;
  1356. if (qdf_unlikely(!pdev))
  1357. return NULL;
  1358. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1359. if (vdev->vdev_id == vdev_id)
  1360. break;
  1361. }
  1362. return vdev;
  1363. }
  1364. int dp_get_opmode(void *vdev_handle)
  1365. {
  1366. struct dp_vdev *vdev = vdev_handle;
  1367. return vdev->opmode;
  1368. }
  1369. void *dp_get_ctrl_pdev_from_vdev_wifi3(void *pvdev)
  1370. {
  1371. struct dp_vdev *vdev = pvdev;
  1372. struct dp_pdev *pdev = vdev->pdev;
  1373. return (void *)pdev->wlan_cfg_ctx;
  1374. }
  1375. static struct cdp_cmn_ops dp_ops_cmn = {
  1376. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1377. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1378. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1379. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1380. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1381. .txrx_peer_attach = dp_peer_attach_wifi3,
  1382. .txrx_peer_detach = dp_peer_detach_wifi3,
  1383. .txrx_vdev_register = dp_vdev_register_wifi3,
  1384. .txrx_soc_detach = dp_soc_detach_wifi3,
  1385. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1386. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1387. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1388. /* TODO: Add other functions */
  1389. };
  1390. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1391. .txrx_peer_authorize = dp_peer_authorize,
  1392. /* TODO: Add other functions */
  1393. };
  1394. static struct cdp_me_ops dp_ops_me = {
  1395. /* TODO */
  1396. };
  1397. static struct cdp_mon_ops dp_ops_mon = {
  1398. /* TODO */
  1399. };
  1400. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1401. /* TODO */
  1402. };
  1403. static struct cdp_wds_ops dp_ops_wds = {
  1404. /* TODO */
  1405. };
  1406. static struct cdp_raw_ops dp_ops_raw = {
  1407. /* TODO */
  1408. };
  1409. #ifdef CONFIG_WIN
  1410. static struct cdp_pflow_ops dp_ops_pflow = {
  1411. /* TODO */
  1412. };
  1413. #endif /* CONFIG_WIN */
  1414. #ifndef CONFIG_WIN
  1415. static struct cdp_misc_ops dp_ops_misc = {
  1416. .get_opmode = dp_get_opmode,
  1417. };
  1418. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1419. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1420. };
  1421. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1422. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1423. };
  1424. static struct cdp_ipa_ops dp_ops_ipa = {
  1425. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1426. };
  1427. static struct cdp_lro_ops dp_ops_lro = {
  1428. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1429. };
  1430. static struct cdp_bus_ops dp_ops_bus = {
  1431. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1432. };
  1433. static struct cdp_ocb_ops dp_ops_ocb = {
  1434. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1435. };
  1436. static struct cdp_throttle_ops dp_ops_throttle = {
  1437. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1438. };
  1439. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1440. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1441. };
  1442. static struct cdp_cfg_ops dp_ops_cfg = {
  1443. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1444. };
  1445. static struct cdp_peer_ops dp_ops_peer = {
  1446. .register_peer = dp_register_peer,
  1447. .clear_peer = dp_clear_peer,
  1448. .find_peer_by_addr = dp_find_peer_by_addr,
  1449. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1450. .local_peer_id = dp_local_peer_id,
  1451. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1452. .peer_state_update = dp_peer_state_update,
  1453. .get_vdevid = dp_get_vdevid,
  1454. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1455. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1456. .get_peer_state = dp_get_peer_state,
  1457. };
  1458. #endif
  1459. static struct cdp_ops dp_txrx_ops = {
  1460. .cmn_drv_ops = &dp_ops_cmn,
  1461. .ctrl_ops = &dp_ops_ctrl,
  1462. .me_ops = &dp_ops_me,
  1463. .mon_ops = &dp_ops_mon,
  1464. .host_stats_ops = &dp_ops_host_stats,
  1465. .wds_ops = &dp_ops_wds,
  1466. .raw_ops = &dp_ops_raw,
  1467. #ifdef CONFIG_WIN
  1468. .pflow_ops = &dp_ops_pflow,
  1469. #endif /* CONFIG_WIN */
  1470. #ifndef CONFIG_WIN
  1471. .misc_ops = &dp_ops_misc,
  1472. .cfg_ops = &dp_ops_cfg,
  1473. .flowctl_ops = &dp_ops_flowctl,
  1474. .l_flowctl_ops = &dp_ops_l_flowctl,
  1475. .ipa_ops = &dp_ops_ipa,
  1476. .lro_ops = &dp_ops_lro,
  1477. .bus_ops = &dp_ops_bus,
  1478. .ocb_ops = &dp_ops_ocb,
  1479. .peer_ops = &dp_ops_peer,
  1480. .throttle_ops = &dp_ops_throttle,
  1481. .mob_stats_ops = &dp_ops_mob_stats,
  1482. #endif
  1483. };
  1484. /*
  1485. * dp_soc_attach_wifi3() - Attach txrx SOC
  1486. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1487. * @htc_handle: Opaque HTC handle
  1488. * @hif_handle: Opaque HIF handle
  1489. * @qdf_osdev: QDF device
  1490. *
  1491. * Return: DP SOC handle on success, NULL on failure
  1492. */
  1493. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1494. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1495. struct ol_if_ops *ol_ops)
  1496. {
  1497. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1498. if (!soc) {
  1499. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1500. "%s: DP SOC memory allocation failed\n", __func__);
  1501. goto fail0;
  1502. }
  1503. soc->cdp_soc.ops = &dp_txrx_ops;
  1504. soc->cdp_soc.ol_ops = ol_ops;
  1505. soc->osif_soc = osif_soc;
  1506. soc->osdev = qdf_osdev;
  1507. soc->hif_handle = hif_handle;
  1508. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1509. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1510. soc->hal_soc, qdf_osdev);
  1511. if (soc->htt_handle == NULL) {
  1512. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1513. "%s: HTT attach failed\n", __func__);
  1514. goto fail1;
  1515. }
  1516. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1517. if (!soc->wlan_cfg_ctx) {
  1518. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1519. "%s: wlan_cfg_soc_attach failed\n", __func__);
  1520. goto fail2;
  1521. }
  1522. qdf_spinlock_create(&soc->peer_ref_mutex);
  1523. #ifdef notyet
  1524. if (wdi_event_attach(soc)) {
  1525. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1526. "%s: WDI event attach failed\n", __func__);
  1527. goto fail2;
  1528. }
  1529. #endif
  1530. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1531. goto fail2;
  1532. }
  1533. return (void *)soc;
  1534. fail2:
  1535. htt_soc_detach(soc->htt_handle);
  1536. fail1:
  1537. qdf_mem_free(soc);
  1538. fail0:
  1539. return NULL;
  1540. }