dp_mst_sim_helper.c 26 KB

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  1. /*
  2. * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. */
  14. /*
  15. * Copyright © 2014 Red Hat
  16. *
  17. * Permission to use, copy, modify, distribute, and sell this software and its
  18. * documentation for any purpose is hereby granted without fee, provided that
  19. * the above copyright notice appear in all copies and that both that copyright
  20. * notice and this permission notice appear in supporting documentation, and
  21. * that the name of the copyright holders not be used in advertising or
  22. * publicity pertaining to distribution of the software without specific,
  23. * written prior permission. The copyright holders make no representations
  24. * about the suitability of this software for any purpose. It is provided "as
  25. * is" without express or implied warranty.
  26. *
  27. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  28. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  29. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  30. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  31. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  32. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  33. * OF THIS SOFTWARE.
  34. */
  35. #include <linux/types.h>
  36. #include <linux/completion.h>
  37. #include <linux/delay.h>
  38. #include <drm/drm_fixed.h>
  39. #include <drm/drm_edid.h>
  40. #include <drm/drm_dp_mst_helper.h>
  41. #include "dp_mst_sim_helper.h"
  42. #include "dp_debug.h"
  43. #define DP_MST_DEBUG(fmt, ...) DP_DEBUG(fmt, ##__VA_ARGS__)
  44. #define DP_MST_INFO(fmt, ...) DP_DEBUG(fmt, ##__VA_ARGS__)
  45. #define DDC_SEGMENT_ADDR 0x30
  46. struct dp_mst_sim_context {
  47. void *host_dev;
  48. void (*host_hpd_irq)(void *host_dev);
  49. void (*host_req)(void *host_dev, const u8 *in, int in_size,
  50. u8 *out, int *out_size);
  51. struct dp_mst_sim_port *ports;
  52. u32 port_num;
  53. struct drm_dp_sideband_msg_rx down_req;
  54. struct drm_dp_sideband_msg_rx down_rep;
  55. struct mutex session_lock;
  56. struct completion session_comp;
  57. struct workqueue_struct *wq;
  58. int reset_cnt;
  59. u8 esi[16];
  60. u8 guid[16];
  61. u8 dpcd[1024];
  62. };
  63. struct dp_mst_sim_work {
  64. struct work_struct base;
  65. struct dp_mst_sim_context *ctx;
  66. unsigned int address;
  67. u8 buffer[256];
  68. size_t size;
  69. };
  70. struct dp_mst_notify_work {
  71. struct work_struct base;
  72. struct dp_mst_sim_context *ctx;
  73. u32 port_mask;
  74. };
  75. #ifdef CONFIG_DYNAMIC_DEBUG
  76. static void dp_sideband_hex_dump(const char *name,
  77. u32 address, u8 *buffer, size_t size)
  78. {
  79. char prefix[64];
  80. int i, linelen, remaining = size;
  81. const int rowsize = 16;
  82. u8 linebuf[64];
  83. snprintf(prefix, sizeof(prefix), "%s(%d) %4xh(%2zu): ",
  84. name, current->pid, address, size);
  85. for (i = 0; i < size; i += rowsize) {
  86. linelen = min(remaining, rowsize);
  87. remaining -= rowsize;
  88. hex_dump_to_buffer(buffer + i, linelen, rowsize, 1,
  89. linebuf, sizeof(linebuf), false);
  90. DP_MST_DEBUG("%s%s\n", prefix, linebuf);
  91. }
  92. }
  93. #else
  94. static void dp_sideband_hex_dump(const char *name,
  95. u32 address, u8 *buffer, size_t size)
  96. {
  97. }
  98. #endif
  99. static u8 dp_mst_sim_msg_header_crc4(const uint8_t *data, size_t num_nibbles)
  100. {
  101. u8 bitmask = 0x80;
  102. u8 bitshift = 7;
  103. u8 array_index = 0;
  104. int number_of_bits = num_nibbles * 4;
  105. u8 remainder = 0;
  106. while (number_of_bits != 0) {
  107. number_of_bits--;
  108. remainder <<= 1;
  109. remainder |= (data[array_index] & bitmask) >> bitshift;
  110. bitmask >>= 1;
  111. bitshift--;
  112. if (bitmask == 0) {
  113. bitmask = 0x80;
  114. bitshift = 7;
  115. array_index++;
  116. }
  117. if ((remainder & 0x10) == 0x10)
  118. remainder ^= 0x13;
  119. }
  120. number_of_bits = 4;
  121. while (number_of_bits != 0) {
  122. number_of_bits--;
  123. remainder <<= 1;
  124. if ((remainder & 0x10) != 0)
  125. remainder ^= 0x13;
  126. }
  127. return remainder;
  128. }
  129. static u8 dp_mst_sim_msg_data_crc4(const uint8_t *data, u8 number_of_bytes)
  130. {
  131. u8 bitmask = 0x80;
  132. u8 bitshift = 7;
  133. u8 array_index = 0;
  134. int number_of_bits = number_of_bytes * 8;
  135. u16 remainder = 0;
  136. while (number_of_bits != 0) {
  137. number_of_bits--;
  138. remainder <<= 1;
  139. remainder |= (data[array_index] & bitmask) >> bitshift;
  140. bitmask >>= 1;
  141. bitshift--;
  142. if (bitmask == 0) {
  143. bitmask = 0x80;
  144. bitshift = 7;
  145. array_index++;
  146. }
  147. if ((remainder & 0x100) == 0x100)
  148. remainder ^= 0xd5;
  149. }
  150. number_of_bits = 8;
  151. while (number_of_bits != 0) {
  152. number_of_bits--;
  153. remainder <<= 1;
  154. if ((remainder & 0x100) != 0)
  155. remainder ^= 0xd5;
  156. }
  157. return remainder & 0xff;
  158. }
  159. static bool dp_mst_sim_decode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
  160. u8 *buf, int buflen, u8 *hdrlen)
  161. {
  162. u8 crc4;
  163. u8 len;
  164. int i;
  165. u8 idx;
  166. if (buf[0] == 0)
  167. return false;
  168. len = 3;
  169. len += ((buf[0] & 0xf0) >> 4) / 2;
  170. if (len > buflen)
  171. return false;
  172. crc4 = dp_mst_sim_msg_header_crc4(buf, (len * 2) - 1);
  173. if ((crc4 & 0xf) != (buf[len - 1] & 0xf)) {
  174. DP_MST_DEBUG("crc4 mismatch 0x%x 0x%x\n", crc4, buf[len - 1]);
  175. return false;
  176. }
  177. hdr->lct = (buf[0] & 0xf0) >> 4;
  178. hdr->lcr = (buf[0] & 0xf);
  179. idx = 1;
  180. for (i = 0; i < (hdr->lct / 2); i++)
  181. hdr->rad[i] = buf[idx++];
  182. hdr->broadcast = (buf[idx] >> 7) & 0x1;
  183. hdr->path_msg = (buf[idx] >> 6) & 0x1;
  184. hdr->msg_len = buf[idx] & 0x3f;
  185. idx++;
  186. hdr->somt = (buf[idx] >> 7) & 0x1;
  187. hdr->eomt = (buf[idx] >> 6) & 0x1;
  188. hdr->seqno = (buf[idx] >> 4) & 0x1;
  189. idx++;
  190. *hdrlen = idx;
  191. return true;
  192. }
  193. static bool dp_mst_sim_sideband_msg_build(struct drm_dp_sideband_msg_rx *msg,
  194. u8 *replybuf, u8 replybuflen, bool hdr)
  195. {
  196. int ret;
  197. u8 crc4;
  198. if (hdr) {
  199. u8 hdrlen;
  200. struct drm_dp_sideband_msg_hdr recv_hdr;
  201. ret = dp_mst_sim_decode_sideband_msg_hdr(&recv_hdr,
  202. replybuf, replybuflen, &hdrlen);
  203. if (ret == false)
  204. return false;
  205. /*
  206. * ignore out-of-order messages or messages that are part of a
  207. * failed transaction
  208. */
  209. if (!recv_hdr.somt && !msg->have_somt)
  210. return false;
  211. /* get length contained in this portion */
  212. msg->curchunk_len = recv_hdr.msg_len;
  213. msg->curchunk_hdrlen = hdrlen;
  214. /* we have already gotten an somt - don't bother parsing */
  215. if (recv_hdr.somt && msg->have_somt)
  216. return false;
  217. if (recv_hdr.somt) {
  218. memcpy(&msg->initial_hdr, &recv_hdr,
  219. sizeof(struct drm_dp_sideband_msg_hdr));
  220. msg->have_somt = true;
  221. }
  222. if (recv_hdr.eomt)
  223. msg->have_eomt = true;
  224. /* copy the bytes for the remainder of this header chunk */
  225. msg->curchunk_idx = min(msg->curchunk_len,
  226. (u8)(replybuflen - hdrlen));
  227. memcpy(&msg->chunk[0], replybuf + hdrlen, msg->curchunk_idx);
  228. } else {
  229. memcpy(&msg->chunk[msg->curchunk_idx], replybuf, replybuflen);
  230. msg->curchunk_idx += replybuflen;
  231. }
  232. if (msg->curchunk_idx >= msg->curchunk_len) {
  233. /* do CRC */
  234. crc4 = dp_mst_sim_msg_data_crc4(msg->chunk, msg->curchunk_len - 1);
  235. /* copy chunk into bigger msg */
  236. memcpy(&msg->msg[msg->curlen], msg->chunk,
  237. msg->curchunk_len - 1);
  238. msg->curlen += msg->curchunk_len - 1;
  239. }
  240. return true;
  241. }
  242. static void dp_mst_sim_encode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
  243. u8 *buf, int *len)
  244. {
  245. int idx = 0;
  246. int i;
  247. u8 crc4;
  248. buf[idx++] = ((hdr->lct & 0xf) << 4) | (hdr->lcr & 0xf);
  249. for (i = 0; i < (hdr->lct / 2); i++)
  250. buf[idx++] = hdr->rad[i];
  251. buf[idx++] = (hdr->broadcast << 7) | (hdr->path_msg << 6) |
  252. (hdr->msg_len & 0x3f);
  253. buf[idx++] = (hdr->somt << 7) | (hdr->eomt << 6) | (hdr->seqno << 4);
  254. crc4 = dp_mst_sim_msg_header_crc4(buf, (idx * 2) - 1);
  255. buf[idx - 1] |= (crc4 & 0xf);
  256. *len = idx;
  257. }
  258. static bool dp_get_one_sb_msg(struct drm_dp_sideband_msg_rx *msg,
  259. struct drm_dp_aux_msg *aux_msg)
  260. {
  261. int ret;
  262. if (!msg->have_somt) {
  263. ret = dp_mst_sim_sideband_msg_build(msg,
  264. aux_msg->buffer, aux_msg->size, true);
  265. if (!ret) {
  266. DP_ERR("sideband hdr build failed\n");
  267. return false;
  268. }
  269. } else {
  270. ret = dp_mst_sim_sideband_msg_build(msg,
  271. aux_msg->buffer, aux_msg->size, false);
  272. if (!ret) {
  273. DP_ERR("sideband msg build failed\n");
  274. return false;
  275. }
  276. }
  277. return true;
  278. }
  279. static int dp_sideband_build_nak_rep(
  280. struct dp_mst_sim_context *ctx)
  281. {
  282. struct drm_dp_sideband_msg_rx *msg = &ctx->down_req;
  283. u8 *buf = ctx->down_rep.msg;
  284. int idx = 0;
  285. buf[idx] = msg->msg[0] | 0x80;
  286. idx++;
  287. memcpy(&buf[idx], ctx->guid, 16);
  288. idx += 16;
  289. buf[idx] = 0x4;
  290. idx++;
  291. buf[idx] = 0;
  292. idx++;
  293. return idx;
  294. }
  295. static int dp_sideband_build_link_address_rep(
  296. struct dp_mst_sim_context *ctx)
  297. {
  298. struct dp_mst_sim_port *port;
  299. u8 *buf = ctx->down_rep.msg;
  300. int idx = 0;
  301. u32 i, tmp;
  302. buf[idx] = DP_LINK_ADDRESS;
  303. idx++;
  304. memcpy(&buf[idx], ctx->guid, 16);
  305. idx += 16;
  306. buf[idx] = ctx->port_num;
  307. idx++;
  308. for (i = 0; i < ctx->port_num; i++) {
  309. port = &ctx->ports[i];
  310. tmp = 0;
  311. if (port->input)
  312. tmp |= 0x80;
  313. tmp |= port->pdt << 4;
  314. tmp |= i & 0xF;
  315. buf[idx] = tmp;
  316. idx++;
  317. tmp = 0;
  318. if (port->mcs)
  319. tmp |= 0x80;
  320. if (port->ddps)
  321. tmp |= 0x40;
  322. if (port->input) {
  323. buf[idx] = tmp;
  324. idx++;
  325. continue;
  326. }
  327. if (port->ldps)
  328. tmp |= 0x20;
  329. buf[idx] = tmp;
  330. idx++;
  331. buf[idx] = port->dpcd_rev;
  332. idx++;
  333. memcpy(&buf[idx], port->peer_guid, 16);
  334. idx += 16;
  335. buf[idx] = (port->num_sdp_streams << 4) |
  336. (port->num_sdp_stream_sinks);
  337. idx++;
  338. }
  339. return idx;
  340. }
  341. static int dp_sideband_build_remote_i2c_read_rep(
  342. struct dp_mst_sim_context *ctx)
  343. {
  344. struct dp_mst_sim_port *port;
  345. struct drm_dp_remote_i2c_read i2c_read;
  346. u8 *buf;
  347. int idx;
  348. u32 i, start, len;
  349. buf = ctx->down_req.msg;
  350. idx = 1;
  351. i2c_read.num_transactions = buf[idx] & 0x3;
  352. i2c_read.port_number = buf[idx] >> 4;
  353. idx++;
  354. if (i2c_read.port_number >= ctx->port_num)
  355. goto err;
  356. for (i = 0; i < i2c_read.num_transactions; i++) {
  357. i2c_read.transactions[i].i2c_dev_id = buf[idx] & 0x7f;
  358. idx++;
  359. i2c_read.transactions[i].num_bytes = buf[idx];
  360. idx++;
  361. i2c_read.transactions[i].bytes = &buf[idx];
  362. idx += i2c_read.transactions[i].num_bytes;
  363. i2c_read.transactions[i].no_stop_bit = (buf[idx] >> 4) & 0x1;
  364. i2c_read.transactions[i].i2c_transaction_delay = buf[idx] & 0xf;
  365. idx++;
  366. }
  367. i2c_read.read_i2c_device_id = buf[idx];
  368. idx++;
  369. i2c_read.num_bytes_read = buf[idx];
  370. idx++;
  371. port = &ctx->ports[i2c_read.port_number];
  372. if (i2c_read.num_transactions == 1) {
  373. if (i2c_read.transactions[0].i2c_dev_id != DDC_ADDR ||
  374. i2c_read.transactions[0].num_bytes != 1) {
  375. DP_ERR("unsupported i2c address\n");
  376. goto err;
  377. }
  378. start = i2c_read.transactions[0].bytes[0];
  379. } else if (i2c_read.num_transactions == 2) {
  380. if (i2c_read.transactions[0].i2c_dev_id != DDC_SEGMENT_ADDR ||
  381. i2c_read.transactions[0].num_bytes != 1 ||
  382. i2c_read.transactions[1].i2c_dev_id != DDC_ADDR ||
  383. i2c_read.transactions[1].num_bytes != 1) {
  384. DP_ERR("unsupported i2c address\n");
  385. goto err;
  386. }
  387. start = i2c_read.transactions[0].bytes[0] * EDID_LENGTH * 2 +
  388. i2c_read.transactions[1].bytes[0];
  389. } else {
  390. DP_ERR("unsupported i2c transaction\n");
  391. goto err;
  392. }
  393. len = i2c_read.num_bytes_read;
  394. if (start + len > port->edid_size) {
  395. DP_ERR("edid data exceeds maximum\n");
  396. goto err;
  397. }
  398. buf = ctx->down_rep.msg;
  399. idx = 0;
  400. buf[idx] = DP_REMOTE_I2C_READ;
  401. idx++;
  402. buf[idx] = i2c_read.port_number;
  403. idx++;
  404. buf[idx] = len;
  405. idx++;
  406. memcpy(&buf[idx], &port->edid[start], len);
  407. idx += len;
  408. return idx;
  409. err:
  410. return dp_sideband_build_nak_rep(ctx);
  411. }
  412. static int dp_sideband_build_enum_path_resources_rep(
  413. struct dp_mst_sim_context *ctx)
  414. {
  415. struct dp_mst_sim_port *port;
  416. u8 port_num;
  417. u8 *buf;
  418. int idx;
  419. buf = ctx->down_req.msg;
  420. port_num = buf[1] >> 4;
  421. if (port_num >= ctx->port_num) {
  422. DP_ERR("invalid port num\n");
  423. goto err;
  424. }
  425. port = &ctx->ports[port_num];
  426. buf = ctx->down_rep.msg;
  427. idx = 0;
  428. buf[idx] = DP_ENUM_PATH_RESOURCES;
  429. idx++;
  430. buf[idx] = port_num << 4;
  431. idx++;
  432. buf[idx] = port->full_pbn >> 8;
  433. idx++;
  434. buf[idx] = port->full_pbn & 0xFF;
  435. idx++;
  436. buf[idx] = port->avail_pbn >> 8;
  437. idx++;
  438. buf[idx] = port->avail_pbn & 0xFF;
  439. idx++;
  440. return idx;
  441. err:
  442. return dp_sideband_build_nak_rep(ctx);
  443. }
  444. static int dp_sideband_build_allocate_payload_rep(
  445. struct dp_mst_sim_context *ctx)
  446. {
  447. struct drm_dp_allocate_payload allocate_payload;
  448. u8 *buf;
  449. int idx;
  450. u32 i;
  451. buf = ctx->down_req.msg;
  452. idx = 1;
  453. allocate_payload.port_number = buf[idx] >> 4;
  454. allocate_payload.number_sdp_streams = buf[idx] & 0xF;
  455. idx++;
  456. allocate_payload.vcpi = buf[idx];
  457. idx++;
  458. allocate_payload.pbn = (buf[idx] << 8) | buf[idx+1];
  459. idx += 2;
  460. for (i = 0; i < allocate_payload.number_sdp_streams / 2; i++) {
  461. allocate_payload.sdp_stream_sink[i * 2] = buf[idx] >> 4;
  462. allocate_payload.sdp_stream_sink[i * 2 + 1] = buf[idx] & 0xf;
  463. idx++;
  464. }
  465. if (allocate_payload.number_sdp_streams & 1) {
  466. i = allocate_payload.number_sdp_streams - 1;
  467. allocate_payload.sdp_stream_sink[i] = buf[idx] >> 4;
  468. idx++;
  469. }
  470. if (allocate_payload.port_number >= ctx->port_num) {
  471. DP_ERR("invalid port num\n");
  472. goto err;
  473. }
  474. buf = ctx->down_rep.msg;
  475. idx = 0;
  476. buf[idx] = DP_ALLOCATE_PAYLOAD;
  477. idx++;
  478. buf[idx] = allocate_payload.port_number;
  479. idx++;
  480. buf[idx] = allocate_payload.vcpi;
  481. idx++;
  482. buf[idx] = allocate_payload.pbn >> 8;
  483. idx++;
  484. buf[idx] = allocate_payload.pbn & 0xFF;
  485. idx++;
  486. return idx;
  487. err:
  488. return dp_sideband_build_nak_rep(ctx);
  489. }
  490. static int dp_sideband_build_power_updown_phy_rep(
  491. struct dp_mst_sim_context *ctx)
  492. {
  493. u8 port_num;
  494. u8 *buf;
  495. int idx;
  496. buf = ctx->down_req.msg;
  497. port_num = buf[1] >> 4;
  498. if (port_num >= ctx->port_num) {
  499. DP_ERR("invalid port num\n");
  500. goto err;
  501. }
  502. buf = ctx->down_rep.msg;
  503. idx = 0;
  504. buf[idx] = ctx->down_req.msg[0];
  505. idx++;
  506. buf[idx] = port_num;
  507. idx++;
  508. return idx;
  509. err:
  510. return dp_sideband_build_nak_rep(ctx);
  511. }
  512. static int dp_sideband_build_clear_payload_id_table_rep(
  513. struct dp_mst_sim_context *ctx)
  514. {
  515. u8 *buf = ctx->down_rep.msg;
  516. int idx = 0;
  517. buf[idx] = DP_CLEAR_PAYLOAD_ID_TABLE;
  518. idx++;
  519. return idx;
  520. }
  521. static int dp_sideband_build_connection_notify_req(
  522. struct dp_mst_sim_context *ctx, int port_idx)
  523. {
  524. struct dp_mst_sim_port *port = &ctx->ports[port_idx];
  525. u8 *buf = ctx->down_rep.msg;
  526. int idx = 0;
  527. buf[idx] = DP_CONNECTION_STATUS_NOTIFY;
  528. idx++;
  529. buf[idx] = port_idx << 4;
  530. idx++;
  531. memcpy(&buf[idx], &port->peer_guid, 16);
  532. idx += 16;
  533. buf[idx] = (port->ldps << 6) |
  534. (port->ddps << 5) |
  535. (port->mcs << 4) |
  536. (port->input << 3) |
  537. (port->pdt & 0x7);
  538. idx++;
  539. return idx;
  540. }
  541. static inline int dp_sideband_update_esi(
  542. struct dp_mst_sim_context *ctx, u8 val)
  543. {
  544. ctx->esi[0] = ctx->port_num;
  545. ctx->esi[1] = val;
  546. ctx->esi[2] = 0;
  547. return 0;
  548. }
  549. static inline bool dp_sideband_pending_esi(
  550. struct dp_mst_sim_context *ctx, u8 val)
  551. {
  552. return !!(ctx->esi[1] & val);
  553. }
  554. static int dp_mst_sim_clear_esi(struct dp_mst_sim_context *ctx,
  555. struct drm_dp_aux_msg *msg)
  556. {
  557. size_t i;
  558. u8 old_esi = ctx->esi[1];
  559. u32 addr = msg->address - DP_SINK_COUNT_ESI;
  560. if (msg->size - addr >= 16) {
  561. msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  562. return 0;
  563. }
  564. mutex_lock(&ctx->session_lock);
  565. for (i = 0; i < msg->size; i++)
  566. ctx->esi[addr + i] &= ~((u8 *)msg->buffer)[i];
  567. if (old_esi != ctx->esi[1])
  568. complete(&ctx->session_comp);
  569. mutex_unlock(&ctx->session_lock);
  570. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  571. return 0;
  572. }
  573. static int dp_mst_sim_read_esi(struct dp_mst_sim_context *ctx,
  574. struct drm_dp_aux_msg *msg)
  575. {
  576. u32 addr = msg->address - DP_SINK_COUNT_ESI;
  577. if (msg->size - addr >= 16) {
  578. msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  579. return 0;
  580. }
  581. memcpy(msg->buffer, &ctx->esi[addr], msg->size);
  582. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  583. return 0;
  584. }
  585. static int dp_mst_sim_down_req_internal(struct dp_mst_sim_context *ctx,
  586. struct drm_dp_aux_msg *aux_msg)
  587. {
  588. struct drm_dp_sideband_msg_rx *msg = &ctx->down_req;
  589. struct drm_dp_sideband_msg_hdr hdr;
  590. bool seqno;
  591. int ret, size, len, hdr_len;
  592. ret = dp_get_one_sb_msg(msg, aux_msg);
  593. if (!ret)
  594. return -EINVAL;
  595. if (!msg->have_eomt)
  596. return 0;
  597. seqno = msg->initial_hdr.seqno;
  598. switch (msg->msg[0]) {
  599. case DP_LINK_ADDRESS:
  600. size = dp_sideband_build_link_address_rep(ctx);
  601. break;
  602. case DP_REMOTE_I2C_READ:
  603. size = dp_sideband_build_remote_i2c_read_rep(ctx);
  604. break;
  605. case DP_ENUM_PATH_RESOURCES:
  606. size = dp_sideband_build_enum_path_resources_rep(ctx);
  607. break;
  608. case DP_ALLOCATE_PAYLOAD:
  609. size = dp_sideband_build_allocate_payload_rep(ctx);
  610. break;
  611. case DP_POWER_DOWN_PHY:
  612. case DP_POWER_UP_PHY:
  613. size = dp_sideband_build_power_updown_phy_rep(ctx);
  614. break;
  615. case DP_CLEAR_PAYLOAD_ID_TABLE:
  616. size = dp_sideband_build_clear_payload_id_table_rep(ctx);
  617. break;
  618. default:
  619. size = dp_sideband_build_nak_rep(ctx);
  620. break;
  621. }
  622. if (ctx->host_req)
  623. ctx->host_req(ctx->host_dev,
  624. ctx->down_req.msg, ctx->down_req.curlen,
  625. ctx->down_rep.msg, &size);
  626. memset(msg, 0, sizeof(*msg));
  627. msg = &ctx->down_rep;
  628. msg->curlen = 0;
  629. mutex_lock(&ctx->session_lock);
  630. while (msg->curlen < size) {
  631. if (ctx->reset_cnt)
  632. break;
  633. /* copy data */
  634. len = min(size - msg->curlen, 44);
  635. memcpy(&ctx->dpcd[3], &msg->msg[msg->curlen], len);
  636. msg->curlen += len;
  637. /* build header */
  638. memset(&hdr, 0, sizeof(struct drm_dp_sideband_msg_hdr));
  639. hdr.broadcast = 0;
  640. hdr.path_msg = 0;
  641. hdr.lct = 1;
  642. hdr.lcr = 0;
  643. hdr.seqno = seqno;
  644. hdr.msg_len = len + 1;
  645. hdr.eomt = (msg->curlen == size);
  646. hdr.somt = (msg->curlen == len);
  647. dp_mst_sim_encode_sideband_msg_hdr(&hdr, ctx->dpcd, &hdr_len);
  648. /* build crc */
  649. ctx->dpcd[len + 3] = dp_mst_sim_msg_data_crc4(&ctx->dpcd[3], len);
  650. /* update esi */
  651. dp_sideband_update_esi(ctx, DP_DOWN_REP_MSG_RDY);
  652. /* notify host */
  653. mutex_unlock(&ctx->session_lock);
  654. ctx->host_hpd_irq(ctx->host_dev);
  655. mutex_lock(&ctx->session_lock);
  656. /* wait until esi is cleared */
  657. while (dp_sideband_pending_esi(ctx, DP_DOWN_REP_MSG_RDY)) {
  658. if (ctx->reset_cnt)
  659. break;
  660. mutex_unlock(&ctx->session_lock);
  661. wait_for_completion(&ctx->session_comp);
  662. mutex_lock(&ctx->session_lock);
  663. }
  664. }
  665. mutex_unlock(&ctx->session_lock);
  666. return 0;
  667. }
  668. static void dp_mst_sim_down_req_work(struct work_struct *work)
  669. {
  670. struct dp_mst_sim_work *sim_work =
  671. container_of(work, struct dp_mst_sim_work, base);
  672. struct drm_dp_aux_msg msg;
  673. msg.address = sim_work->address;
  674. msg.buffer = sim_work->buffer;
  675. msg.size = sim_work->size;
  676. dp_mst_sim_down_req_internal(sim_work->ctx, &msg);
  677. kfree(sim_work);
  678. }
  679. static int dp_mst_sim_down_req(struct dp_mst_sim_context *ctx,
  680. struct drm_dp_aux_msg *aux_msg)
  681. {
  682. struct dp_mst_sim_work *work;
  683. if (aux_msg->size >= 256) {
  684. aux_msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  685. return 0;
  686. }
  687. dp_sideband_hex_dump("request",
  688. aux_msg->address, aux_msg->buffer, aux_msg->size);
  689. work = kzalloc(sizeof(*work), GFP_KERNEL);
  690. if (!work) {
  691. aux_msg->reply = DP_AUX_NATIVE_REPLY_NACK;
  692. return 0;
  693. }
  694. work->ctx = ctx;
  695. work->address = aux_msg->address;
  696. work->size = aux_msg->size;
  697. memcpy(work->buffer, aux_msg->buffer, aux_msg->size);
  698. INIT_WORK(&work->base, dp_mst_sim_down_req_work);
  699. queue_work(ctx->wq, &work->base);
  700. aux_msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  701. return 0;
  702. }
  703. static int dp_mst_sim_down_rep(struct dp_mst_sim_context *ctx,
  704. struct drm_dp_aux_msg *msg)
  705. {
  706. u32 addr = msg->address - DP_SIDEBAND_MSG_DOWN_REP_BASE;
  707. memcpy(msg->buffer, &ctx->dpcd[addr], msg->size);
  708. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  709. dp_sideband_hex_dump("reply",
  710. addr, msg->buffer, msg->size);
  711. return 0;
  712. }
  713. static int dp_mst_sim_up_req(struct dp_mst_sim_context *ctx,
  714. struct drm_dp_aux_msg *msg)
  715. {
  716. u32 addr = msg->address - DP_SIDEBAND_MSG_UP_REQ_BASE;
  717. memcpy(msg->buffer, &ctx->dpcd[addr], msg->size);
  718. msg->reply = DP_AUX_NATIVE_REPLY_ACK;
  719. dp_sideband_hex_dump("up_req",
  720. addr, msg->buffer, msg->size);
  721. return 0;
  722. }
  723. static void dp_mst_sim_reset_work(struct work_struct *work)
  724. {
  725. struct dp_mst_notify_work *notify_work =
  726. container_of(work, struct dp_mst_notify_work, base);
  727. struct dp_mst_sim_context *ctx = notify_work->ctx;
  728. mutex_lock(&ctx->session_lock);
  729. --ctx->reset_cnt;
  730. reinit_completion(&ctx->session_comp);
  731. mutex_unlock(&ctx->session_lock);
  732. }
  733. static int dp_mst_sim_reset(struct dp_mst_sim_context *ctx,
  734. struct drm_dp_aux_msg *msg)
  735. {
  736. struct dp_mst_notify_work *work;
  737. if (!msg->size || ((u8 *)msg->buffer)[0])
  738. return msg->size;
  739. mutex_lock(&ctx->session_lock);
  740. ++ctx->reset_cnt;
  741. complete(&ctx->session_comp);
  742. mutex_unlock(&ctx->session_lock);
  743. work = kzalloc(sizeof(*work), GFP_KERNEL);
  744. if (!work)
  745. return msg->size;
  746. work->ctx = ctx;
  747. INIT_WORK(&work->base, dp_mst_sim_reset_work);
  748. queue_work(ctx->wq, &work->base);
  749. return msg->size;
  750. }
  751. int dp_mst_sim_transfer(void *mst_sim_context, struct drm_dp_aux_msg *msg)
  752. {
  753. struct dp_mst_sim_context *ctx = mst_sim_context;
  754. if (!ctx || !ctx->port_num || !msg)
  755. return -ENOENT;
  756. if (msg->request == DP_AUX_NATIVE_WRITE) {
  757. if (msg->address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE &&
  758. msg->address < DP_SIDEBAND_MSG_DOWN_REQ_BASE + 256)
  759. return dp_mst_sim_down_req(mst_sim_context, msg);
  760. if (msg->address >= DP_SIDEBAND_MSG_UP_REP_BASE &&
  761. msg->address < DP_SIDEBAND_MSG_UP_REP_BASE + 256)
  762. return 0;
  763. if (msg->address >= DP_SINK_COUNT_ESI &&
  764. msg->address < DP_SINK_COUNT_ESI + 14)
  765. return dp_mst_sim_clear_esi(mst_sim_context, msg);
  766. if (msg->address == DP_MSTM_CTRL)
  767. return dp_mst_sim_reset(mst_sim_context, msg);
  768. } else if (msg->request == DP_AUX_NATIVE_READ) {
  769. if (msg->address >= DP_SIDEBAND_MSG_DOWN_REP_BASE &&
  770. msg->address < DP_SIDEBAND_MSG_DOWN_REP_BASE + 256)
  771. return dp_mst_sim_down_rep(mst_sim_context, msg);
  772. if (msg->address >= DP_SIDEBAND_MSG_UP_REQ_BASE &&
  773. msg->address < DP_SIDEBAND_MSG_UP_REQ_BASE + 256)
  774. return dp_mst_sim_up_req(mst_sim_context, msg);
  775. if (msg->address >= DP_SINK_COUNT_ESI &&
  776. msg->address < DP_SINK_COUNT_ESI + 14)
  777. return dp_mst_sim_read_esi(mst_sim_context, msg);
  778. }
  779. return -EINVAL;
  780. }
  781. static void dp_mst_sim_up_req_work(struct work_struct *work)
  782. {
  783. struct dp_mst_notify_work *notify_work =
  784. container_of(work, struct dp_mst_notify_work, base);
  785. struct dp_mst_sim_context *ctx = notify_work->ctx;
  786. struct drm_dp_sideband_msg_rx *msg = &ctx->down_rep;
  787. struct drm_dp_sideband_msg_hdr hdr;
  788. int len, hdr_len, i;
  789. mutex_lock(&ctx->session_lock);
  790. for (i = 0; i < ctx->port_num; i++) {
  791. if (ctx->reset_cnt)
  792. break;
  793. if (!(notify_work->port_mask & (1 << i)))
  794. continue;
  795. len = dp_sideband_build_connection_notify_req(ctx, i);
  796. /* copy data */
  797. memcpy(&ctx->dpcd[3], msg->msg, len);
  798. /* build header */
  799. memset(&hdr, 0, sizeof(struct drm_dp_sideband_msg_hdr));
  800. hdr.broadcast = 0;
  801. hdr.path_msg = 0;
  802. hdr.lct = 1;
  803. hdr.lcr = 0;
  804. hdr.seqno = 0;
  805. hdr.msg_len = len + 1;
  806. hdr.eomt = 1;
  807. hdr.somt = 1;
  808. dp_mst_sim_encode_sideband_msg_hdr(&hdr, ctx->dpcd, &hdr_len);
  809. /* build crc */
  810. ctx->dpcd[len + 3] = dp_mst_sim_msg_data_crc4(&ctx->dpcd[3], len);
  811. /* update esi */
  812. dp_sideband_update_esi(ctx, DP_UP_REQ_MSG_RDY);
  813. /* notify host */
  814. mutex_unlock(&ctx->session_lock);
  815. ctx->host_hpd_irq(ctx->host_dev);
  816. mutex_lock(&ctx->session_lock);
  817. /* wait until esi is cleared */
  818. while (dp_sideband_pending_esi(ctx, DP_UP_REQ_MSG_RDY)) {
  819. if (ctx->reset_cnt)
  820. break;
  821. mutex_unlock(&ctx->session_lock);
  822. wait_for_completion(&ctx->session_comp);
  823. mutex_lock(&ctx->session_lock);
  824. }
  825. }
  826. mutex_unlock(&ctx->session_lock);
  827. kfree(notify_work);
  828. }
  829. static void dp_mst_sim_notify(struct dp_mst_sim_context *ctx,
  830. u32 port_mask)
  831. {
  832. struct dp_mst_notify_work *work;
  833. work = kzalloc(sizeof(*work), GFP_KERNEL);
  834. if (!work)
  835. return;
  836. work->ctx = ctx;
  837. work->port_mask = port_mask;
  838. INIT_WORK(&work->base, dp_mst_sim_up_req_work);
  839. queue_work(ctx->wq, &work->base);
  840. }
  841. int dp_mst_sim_update(void *mst_sim_context, u32 port_num,
  842. struct dp_mst_sim_port *ports)
  843. {
  844. struct dp_mst_sim_context *ctx = mst_sim_context;
  845. u8 *edid;
  846. int rc = 0;
  847. u32 update_mask = 0;
  848. u32 i;
  849. if (!ctx || port_num >= 15)
  850. return -EINVAL;
  851. mutex_lock(&ctx->session_lock);
  852. /* get update mask */
  853. if (port_num && ctx->port_num == port_num) {
  854. for (i = 0; i < port_num; i++) {
  855. if (ports[i].pdt != ctx->ports[i].pdt ||
  856. ports[i].input != ctx->ports[i].input ||
  857. ports[i].ldps != ctx->ports[i].ldps ||
  858. ports[i].ddps != ctx->ports[i].ddps ||
  859. ports[i].mcs != ctx->ports[i].mcs)
  860. update_mask |= (1 << i);
  861. }
  862. }
  863. for (i = 0; i < ctx->port_num; i++)
  864. kfree(ctx->ports[i].edid);
  865. kfree(ctx->ports);
  866. ctx->port_num = 0;
  867. ctx->ports = kcalloc(port_num, sizeof(*ports), GFP_KERNEL);
  868. if (!ctx->ports) {
  869. rc = -ENOMEM;
  870. goto fail;
  871. }
  872. ctx->port_num = port_num;
  873. for (i = 0; i < port_num; i++) {
  874. ctx->ports[i] = ports[i];
  875. if (ports[i].edid_size) {
  876. if (!ports[i].edid) {
  877. rc = -EINVAL;
  878. goto fail;
  879. }
  880. edid = kzalloc(ports[i].edid_size,
  881. GFP_KERNEL);
  882. if (!edid) {
  883. rc = -ENOMEM;
  884. goto fail;
  885. }
  886. memcpy(edid, ports[i].edid, ports[i].edid_size);
  887. ctx->ports[i].edid = edid;
  888. }
  889. }
  890. fail:
  891. if (rc) {
  892. for (i = 0; i < ctx->port_num; i++)
  893. kfree(ctx->ports[i].edid);
  894. kfree(ctx->ports);
  895. }
  896. mutex_unlock(&ctx->session_lock);
  897. if (update_mask)
  898. dp_mst_sim_notify(ctx, update_mask);
  899. return rc;
  900. }
  901. int dp_mst_sim_create(const struct dp_mst_sim_cfg *cfg,
  902. void **mst_sim_context)
  903. {
  904. struct dp_mst_sim_context *ctx;
  905. if (!cfg || !mst_sim_context)
  906. return -EINVAL;
  907. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  908. if (!ctx)
  909. return -ENOMEM;
  910. ctx->host_dev = cfg->host_dev;
  911. ctx->host_hpd_irq = cfg->host_hpd_irq;
  912. ctx->host_req = cfg->host_req;
  913. memcpy(ctx->guid, cfg->guid, 16);
  914. mutex_init(&ctx->session_lock);
  915. init_completion(&ctx->session_comp);
  916. ctx->wq = create_singlethread_workqueue("dp_mst_sim");
  917. if (IS_ERR_OR_NULL(ctx->wq)) {
  918. DP_ERR("Error creating wq\n");
  919. kfree(ctx);
  920. return -EPERM;
  921. }
  922. *mst_sim_context = ctx;
  923. return 0;
  924. }
  925. int dp_mst_sim_destroy(void *mst_sim_context)
  926. {
  927. struct dp_mst_sim_context *ctx = mst_sim_context;
  928. u32 i;
  929. if (!ctx)
  930. return -EINVAL;
  931. for (i = 0; i < ctx->port_num; i++)
  932. kfree(ctx->ports[i].edid);
  933. kfree(ctx->ports);
  934. destroy_workqueue(ctx->wq);
  935. return 0;
  936. }