rouleur.c 69 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. };
  43. /* TODO: Check on the step values */
  44. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  45. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  46. static int rouleur_handle_post_irq(void *data);
  47. static int rouleur_reset(struct device *dev, int val);
  48. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  49. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  66. };
  67. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  68. .name = "rouleur",
  69. .irqs = ROULEUR_IRQs,
  70. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  71. .num_regs = 3,
  72. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  73. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  74. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  75. .use_ack = 1,
  76. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  77. .runtime_pm = false,
  78. .handle_post_irq = rouleur_handle_post_irq,
  79. .irq_drv_data = NULL,
  80. };
  81. static int rouleur_handle_post_irq(void *data)
  82. {
  83. struct rouleur_priv *rouleur = data;
  84. u32 status1 = 0, status2 = 0, status3 = 0;
  85. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  88. rouleur->tx_swr_dev->slave_irq_pending =
  89. ((status1 || status2 || status3) ? true : false);
  90. return IRQ_HANDLED;
  91. }
  92. static int rouleur_init_reg(struct snd_soc_component *component)
  93. {
  94. /* Disable HPH OCP */
  95. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  96. 0x03, 0x00);
  97. /* Enable surge protection */
  98. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  99. 0xC0, 0xC0);
  100. /* Disable mic bias pull down */
  101. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  102. 0x01, 0x00);
  103. return 0;
  104. }
  105. static int rouleur_set_port_params(struct snd_soc_component *component,
  106. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  107. u8 *ch_mask, u32 *ch_rate,
  108. u8 *port_type, u8 path)
  109. {
  110. int i, j;
  111. u8 num_ports = 0;
  112. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  113. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  114. switch (path) {
  115. case CODEC_RX:
  116. map = &rouleur->rx_port_mapping;
  117. num_ports = rouleur->num_rx_ports;
  118. break;
  119. case CODEC_TX:
  120. map = &rouleur->tx_port_mapping;
  121. num_ports = rouleur->num_tx_ports;
  122. break;
  123. default:
  124. dev_err(component->dev, "%s Invalid path: %d\n",
  125. __func__, path);
  126. return -EINVAL;
  127. }
  128. for (i = 0; i <= num_ports; i++) {
  129. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  130. if ((*map)[i][j].slave_port_type == slv_prt_type)
  131. goto found;
  132. }
  133. }
  134. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  135. __func__, slv_prt_type);
  136. return -EINVAL;
  137. found:
  138. *port_id = i;
  139. *num_ch = (*map)[i][j].num_ch;
  140. *ch_mask = (*map)[i][j].ch_mask;
  141. *ch_rate = (*map)[i][j].ch_rate;
  142. *port_type = (*map)[i][j].master_port_type;
  143. return 0;
  144. }
  145. static int rouleur_parse_port_mapping(struct device *dev,
  146. char *prop, u8 path)
  147. {
  148. u32 *dt_array, map_size, map_length;
  149. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  150. u32 slave_port_type, master_port_type;
  151. u32 i, ch_iter = 0;
  152. int ret = 0;
  153. u8 *num_ports = NULL;
  154. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  155. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  156. switch (path) {
  157. case CODEC_RX:
  158. map = &rouleur->rx_port_mapping;
  159. num_ports = &rouleur->num_rx_ports;
  160. break;
  161. case CODEC_TX:
  162. map = &rouleur->tx_port_mapping;
  163. num_ports = &rouleur->num_tx_ports;
  164. break;
  165. default:
  166. dev_err(dev, "%s Invalid path: %d\n",
  167. __func__, path);
  168. return -EINVAL;
  169. }
  170. if (!of_find_property(dev->of_node, prop,
  171. &map_size)) {
  172. dev_err(dev, "missing port mapping prop %s\n", prop);
  173. ret = -EINVAL;
  174. goto err;
  175. }
  176. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  177. dt_array = kzalloc(map_size, GFP_KERNEL);
  178. if (!dt_array) {
  179. ret = -ENOMEM;
  180. goto err;
  181. }
  182. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  183. NUM_SWRS_DT_PARAMS * map_length);
  184. if (ret) {
  185. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  186. __func__, prop);
  187. ret = -EINVAL;
  188. goto err_pdata_fail;
  189. }
  190. for (i = 0; i < map_length; i++) {
  191. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  192. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  193. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  194. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  195. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  196. if (port_num != old_port_num)
  197. ch_iter = 0;
  198. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  199. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  200. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  201. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  202. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  203. old_port_num = port_num;
  204. }
  205. *num_ports = port_num;
  206. err_pdata_fail:
  207. kfree(dt_array);
  208. err:
  209. return ret;
  210. }
  211. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  212. u8 slv_port_type, u8 enable)
  213. {
  214. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  215. u8 port_id;
  216. u8 num_ch;
  217. u8 ch_mask;
  218. u32 ch_rate;
  219. u8 port_type;
  220. u8 num_port = 1;
  221. int ret = 0;
  222. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  223. &num_ch, &ch_mask, &ch_rate,
  224. &port_type, CODEC_TX);
  225. if (ret) {
  226. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  227. __func__, ret);
  228. return ret;
  229. }
  230. if (enable)
  231. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  232. num_port, &ch_mask, &ch_rate,
  233. &num_ch, &port_type);
  234. else
  235. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  236. num_port, &ch_mask, &port_type);
  237. return ret;
  238. }
  239. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  240. u8 slv_port_type, u8 enable)
  241. {
  242. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  243. u8 port_id;
  244. u8 num_ch;
  245. u8 ch_mask;
  246. u32 ch_rate;
  247. u8 port_type;
  248. u8 num_port = 1;
  249. int ret = 0;
  250. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  251. &num_ch, &ch_mask, &ch_rate,
  252. &port_type, CODEC_RX);
  253. if (ret) {
  254. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  255. __func__, ret);
  256. return ret;
  257. }
  258. if (enable)
  259. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  260. num_port, &ch_mask, &ch_rate,
  261. &num_ch, &port_type);
  262. else
  263. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  264. num_port, &ch_mask, &port_type);
  265. return ret;
  266. }
  267. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  268. {
  269. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  270. mutex_lock(&rouleur->main_bias_lock);
  271. if (rouleur->mbias_cnt == 0) {
  272. snd_soc_component_update_bits(component,
  273. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  274. snd_soc_component_update_bits(component,
  275. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  276. usleep_range(1000, 1100);
  277. }
  278. rouleur->mbias_cnt++;
  279. mutex_unlock(&rouleur->main_bias_lock);
  280. return 0;
  281. }
  282. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  283. {
  284. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  285. mutex_lock(&rouleur->main_bias_lock);
  286. if (rouleur->mbias_cnt == 0) {
  287. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  288. mutex_unlock(&rouleur->main_bias_lock);
  289. return 0;
  290. }
  291. rouleur->mbias_cnt--;
  292. if (rouleur->mbias_cnt == 0) {
  293. snd_soc_component_update_bits(component,
  294. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  295. snd_soc_component_update_bits(component,
  296. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  297. }
  298. mutex_unlock(&rouleur->main_bias_lock);
  299. return 0;
  300. }
  301. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  302. {
  303. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  304. mutex_lock(&rouleur->rx_clk_lock);
  305. if (rouleur->rx_clk_cnt == 0) {
  306. snd_soc_component_update_bits(component,
  307. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  308. snd_soc_component_update_bits(component,
  309. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  310. usleep_range(5000, 5100);
  311. rouleur_global_mbias_enable(component);
  312. snd_soc_component_update_bits(component,
  313. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  314. snd_soc_component_update_bits(component,
  315. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  316. snd_soc_component_update_bits(component,
  317. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  318. usleep_range(500, 510);
  319. }
  320. rouleur->rx_clk_cnt++;
  321. mutex_unlock(&rouleur->rx_clk_lock);
  322. return 0;
  323. }
  324. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  325. {
  326. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  327. mutex_lock(&rouleur->rx_clk_lock);
  328. if (rouleur->rx_clk_cnt == 0) {
  329. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  330. mutex_unlock(&rouleur->rx_clk_lock);
  331. return 0;
  332. }
  333. rouleur->rx_clk_cnt--;
  334. if (rouleur->rx_clk_cnt == 0) {
  335. snd_soc_component_update_bits(component,
  336. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  337. snd_soc_component_update_bits(component,
  338. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  339. snd_soc_component_update_bits(component,
  340. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  341. snd_soc_component_update_bits(component,
  342. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  343. snd_soc_component_update_bits(component,
  344. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  345. rouleur_global_mbias_disable(component);
  346. }
  347. mutex_unlock(&rouleur->rx_clk_lock);
  348. return 0;
  349. }
  350. /*
  351. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  352. * @component: handle to snd_soc_component *
  353. *
  354. * return rouleur_mbhc handle or error code in case of failure
  355. */
  356. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  357. {
  358. struct rouleur_priv *rouleur;
  359. if (!component) {
  360. pr_err("%s: Invalid params, NULL component\n", __func__);
  361. return NULL;
  362. }
  363. rouleur = snd_soc_component_get_drvdata(component);
  364. if (!rouleur) {
  365. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  366. return NULL;
  367. }
  368. return rouleur->mbhc;
  369. }
  370. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  371. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  372. struct snd_kcontrol *kcontrol,
  373. int event)
  374. {
  375. struct snd_soc_component *component =
  376. snd_soc_dapm_to_component(w->dapm);
  377. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  378. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  379. w->name, event);
  380. switch (event) {
  381. case SND_SOC_DAPM_PRE_PMU:
  382. rouleur_rx_clk_enable(component);
  383. snd_soc_component_update_bits(component,
  384. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  385. 0x02, 0x02);
  386. snd_soc_component_update_bits(component,
  387. ROULEUR_SWR_HPHPA_HD2,
  388. 0x38, 0x38);
  389. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  390. break;
  391. case SND_SOC_DAPM_POST_PMU:
  392. if (rouleur->comp1_enable) {
  393. snd_soc_component_update_bits(component,
  394. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  395. 0x02, 0x02);
  396. if (rouleur->comp2_enable)
  397. snd_soc_component_update_bits(component,
  398. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  399. 0x01, 0x01);
  400. /*
  401. * 5ms sleep is required after COMP is enabled as per
  402. * HW requirement
  403. */
  404. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  405. usleep_range(5000, 5100);
  406. clear_bit(HPH_COMP_DELAY,
  407. &rouleur->status_mask);
  408. }
  409. } else {
  410. snd_soc_component_update_bits(component,
  411. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  412. 0x02, 0x00);
  413. }
  414. snd_soc_component_update_bits(component,
  415. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  416. 0x7C, 0x7C);
  417. snd_soc_component_update_bits(component,
  418. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  419. 0x04, 0x04);
  420. snd_soc_component_update_bits(component,
  421. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  422. break;
  423. case SND_SOC_DAPM_POST_PMD:
  424. snd_soc_component_update_bits(component,
  425. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  426. 0x01, 0x00);
  427. snd_soc_component_update_bits(component,
  428. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  429. 0x04, 0x00);
  430. if (rouleur->comp1_enable)
  431. snd_soc_component_update_bits(component,
  432. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  433. 0x02, 0x00);
  434. break;
  435. }
  436. return 0;
  437. }
  438. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  439. struct snd_kcontrol *kcontrol,
  440. int event)
  441. {
  442. struct snd_soc_component *component =
  443. snd_soc_dapm_to_component(w->dapm);
  444. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  445. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  446. w->name, event);
  447. switch (event) {
  448. case SND_SOC_DAPM_PRE_PMU:
  449. rouleur_rx_clk_enable(component);
  450. snd_soc_component_update_bits(component,
  451. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  452. 0x02, 0x02);
  453. snd_soc_component_update_bits(component,
  454. ROULEUR_SWR_HPHPA_HD2,
  455. 0x07, 0x07);
  456. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  457. break;
  458. case SND_SOC_DAPM_POST_PMU:
  459. if (rouleur->comp2_enable) {
  460. snd_soc_component_update_bits(component,
  461. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  462. 0x01, 0x01);
  463. if (rouleur->comp1_enable)
  464. snd_soc_component_update_bits(component,
  465. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  466. 0x02, 0x02);
  467. /*
  468. * 5ms sleep is required after COMP is enabled as per
  469. * HW requirement
  470. */
  471. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  472. usleep_range(5000, 5100);
  473. clear_bit(HPH_COMP_DELAY,
  474. &rouleur->status_mask);
  475. }
  476. } else {
  477. snd_soc_component_update_bits(component,
  478. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  479. 0x01, 0x00);
  480. }
  481. snd_soc_component_update_bits(component,
  482. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  483. 0x7C, 0x7C);
  484. snd_soc_component_update_bits(component,
  485. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  486. 0x08, 0x08);
  487. snd_soc_component_update_bits(component,
  488. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  489. break;
  490. case SND_SOC_DAPM_POST_PMD:
  491. snd_soc_component_update_bits(component,
  492. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  493. snd_soc_component_update_bits(component,
  494. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  495. 0x08, 0x00);
  496. if (rouleur->comp2_enable)
  497. snd_soc_component_update_bits(component,
  498. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  499. 0x01, 0x00);
  500. break;
  501. }
  502. return 0;
  503. }
  504. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  505. struct snd_kcontrol *kcontrol,
  506. int event)
  507. {
  508. struct snd_soc_component *component =
  509. snd_soc_dapm_to_component(w->dapm);
  510. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  511. w->name, event);
  512. switch (event) {
  513. case SND_SOC_DAPM_PRE_PMU:
  514. rouleur_rx_clk_enable(component);
  515. snd_soc_component_update_bits(component,
  516. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  517. 0x7C, 0x7C);
  518. snd_soc_component_update_bits(component,
  519. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  520. 0x04, 0x04);
  521. snd_soc_component_update_bits(component,
  522. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  523. 0x01, 0x01);
  524. break;
  525. case SND_SOC_DAPM_POST_PMD:
  526. snd_soc_component_update_bits(component,
  527. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  528. 0x01, 0x00);
  529. snd_soc_component_update_bits(component,
  530. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  531. 0x04, 0x00);
  532. break;
  533. };
  534. return 0;
  535. }
  536. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  537. struct snd_kcontrol *kcontrol,
  538. int event)
  539. {
  540. struct snd_soc_component *component =
  541. snd_soc_dapm_to_component(w->dapm);
  542. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  543. int ret = 0;
  544. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  545. w->name, event);
  546. switch (event) {
  547. case SND_SOC_DAPM_PRE_PMU:
  548. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  549. rouleur->rx_swr_dev->dev_num,
  550. true);
  551. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  552. usleep_range(5000, 5100);
  553. snd_soc_component_update_bits(component,
  554. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  555. 0x03, 0x03);
  556. break;
  557. case SND_SOC_DAPM_POST_PMU:
  558. /*
  559. * 5ms sleep is required after PA is enabled as per
  560. * HW requirement.
  561. */
  562. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  563. usleep_range(5000, 5100);
  564. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  565. }
  566. if (rouleur->update_wcd_event)
  567. rouleur->update_wcd_event(rouleur->handle,
  568. WCD_BOLERO_EVT_RX_MUTE,
  569. (WCD_RX2 << 0x10));
  570. wcd_enable_irq(&rouleur->irq_info,
  571. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  572. break;
  573. case SND_SOC_DAPM_PRE_PMD:
  574. wcd_disable_irq(&rouleur->irq_info,
  575. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  576. if (rouleur->update_wcd_event)
  577. rouleur->update_wcd_event(rouleur->handle,
  578. WCD_BOLERO_EVT_RX_MUTE,
  579. (WCD_RX2 << 0x10 | 0x1));
  580. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  581. WCD_EVENT_PRE_HPHR_PA_OFF,
  582. &rouleur->mbhc->wcd_mbhc);
  583. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  584. break;
  585. case SND_SOC_DAPM_POST_PMD:
  586. /*
  587. * 7ms sleep is required after PA is disabled as per
  588. * HW requirement. If compander is disabled, then
  589. * 20ms delay is required.
  590. */
  591. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  592. usleep_range(5000, 5100);
  593. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  594. }
  595. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  596. WCD_EVENT_POST_HPHR_PA_OFF,
  597. &rouleur->mbhc->wcd_mbhc);
  598. snd_soc_component_update_bits(component,
  599. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  600. 0x03, 0x00);
  601. break;
  602. };
  603. return ret;
  604. }
  605. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  606. struct snd_kcontrol *kcontrol,
  607. int event)
  608. {
  609. struct snd_soc_component *component =
  610. snd_soc_dapm_to_component(w->dapm);
  611. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  612. int ret = 0;
  613. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  614. w->name, event);
  615. switch (event) {
  616. case SND_SOC_DAPM_PRE_PMU:
  617. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  618. rouleur->rx_swr_dev->dev_num,
  619. true);
  620. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  621. usleep_range(5000, 5100);
  622. snd_soc_component_update_bits(component,
  623. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  624. 0x03, 0x03);
  625. break;
  626. case SND_SOC_DAPM_POST_PMU:
  627. /*
  628. * 5ms sleep is required after PA is enabled as per
  629. * HW requirement.
  630. */
  631. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  632. usleep_range(5000, 5100);
  633. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  634. }
  635. if (rouleur->update_wcd_event)
  636. rouleur->update_wcd_event(rouleur->handle,
  637. WCD_BOLERO_EVT_RX_MUTE,
  638. (WCD_RX1 << 0x10));
  639. wcd_enable_irq(&rouleur->irq_info,
  640. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  641. break;
  642. case SND_SOC_DAPM_PRE_PMD:
  643. wcd_disable_irq(&rouleur->irq_info,
  644. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  645. if (rouleur->update_wcd_event)
  646. rouleur->update_wcd_event(rouleur->handle,
  647. WCD_BOLERO_EVT_RX_MUTE,
  648. (WCD_RX1 << 0x10 | 0x1));
  649. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  650. WCD_EVENT_PRE_HPHL_PA_OFF,
  651. &rouleur->mbhc->wcd_mbhc);
  652. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  653. break;
  654. case SND_SOC_DAPM_POST_PMD:
  655. /*
  656. * 5ms sleep is required after PA is disabled as per
  657. * HW requirement.
  658. */
  659. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  660. usleep_range(5000, 5100);
  661. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  662. }
  663. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  664. WCD_EVENT_POST_HPHL_PA_OFF,
  665. &rouleur->mbhc->wcd_mbhc);
  666. snd_soc_component_update_bits(component,
  667. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  668. 0x03, 0x00);
  669. break;
  670. };
  671. return ret;
  672. }
  673. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  674. struct snd_kcontrol *kcontrol,
  675. int event)
  676. {
  677. struct snd_soc_component *component =
  678. snd_soc_dapm_to_component(w->dapm);
  679. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  680. int ret = 0;
  681. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  682. w->name, event);
  683. switch (event) {
  684. case SND_SOC_DAPM_PRE_PMU:
  685. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  686. rouleur->rx_swr_dev->dev_num,
  687. true);
  688. usleep_range(5000, 5100);
  689. snd_soc_component_update_bits(component,
  690. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  691. 0x03, 0x03);
  692. break;
  693. case SND_SOC_DAPM_POST_PMU:
  694. if (rouleur->update_wcd_event)
  695. rouleur->update_wcd_event(rouleur->handle,
  696. WCD_BOLERO_EVT_RX_MUTE,
  697. (WCD_RX1 << 0x10));
  698. wcd_enable_irq(&rouleur->irq_info,
  699. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  700. break;
  701. case SND_SOC_DAPM_PRE_PMD:
  702. wcd_disable_irq(&rouleur->irq_info,
  703. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  704. if (rouleur->update_wcd_event)
  705. rouleur->update_wcd_event(rouleur->handle,
  706. WCD_BOLERO_EVT_RX_MUTE,
  707. (WCD_RX1 << 0x10 | 0x1));
  708. break;
  709. case SND_SOC_DAPM_POST_PMD:
  710. usleep_range(5000, 5100);
  711. snd_soc_component_update_bits(component,
  712. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  713. 0x03, 0x00);
  714. };
  715. return ret;
  716. }
  717. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  718. struct snd_kcontrol *kcontrol,
  719. int event)
  720. {
  721. struct snd_soc_component *component =
  722. snd_soc_dapm_to_component(w->dapm);
  723. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  724. int ret = 0;
  725. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  726. w->name, event);
  727. switch (event) {
  728. case SND_SOC_DAPM_PRE_PMU:
  729. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  730. rouleur->rx_swr_dev->dev_num,
  731. true);
  732. snd_soc_component_update_bits(component,
  733. ROULEUR_ANA_COMBOPA_CTL,
  734. 0x40, 0x40);
  735. usleep_range(5000, 5100);
  736. snd_soc_component_update_bits(component,
  737. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  738. 0x03, 0x03);
  739. break;
  740. case SND_SOC_DAPM_POST_PMU:
  741. if (rouleur->update_wcd_event)
  742. rouleur->update_wcd_event(rouleur->handle,
  743. WCD_BOLERO_EVT_RX_MUTE,
  744. (WCD_RX1 << 0x10));
  745. wcd_enable_irq(&rouleur->irq_info,
  746. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  747. break;
  748. case SND_SOC_DAPM_PRE_PMD:
  749. wcd_disable_irq(&rouleur->irq_info,
  750. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  751. if (rouleur->update_wcd_event)
  752. rouleur->update_wcd_event(rouleur->handle,
  753. WCD_BOLERO_EVT_RX_MUTE,
  754. (WCD_RX1 << 0x10 | 0x1));
  755. break;
  756. case SND_SOC_DAPM_POST_PMD:
  757. snd_soc_component_update_bits(component,
  758. ROULEUR_ANA_COMBOPA_CTL,
  759. 0x40, 0x00);
  760. usleep_range(5000, 5100);
  761. snd_soc_component_update_bits(component,
  762. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  763. 0x03, 0x00);
  764. };
  765. return ret;
  766. }
  767. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  768. struct snd_kcontrol *kcontrol,
  769. int event)
  770. {
  771. struct snd_soc_component *component =
  772. snd_soc_dapm_to_component(w->dapm);
  773. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  774. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  775. w->name, event);
  776. switch (event) {
  777. case SND_SOC_DAPM_PRE_PMU:
  778. rouleur_rx_connect_port(component, HPH_L, true);
  779. if (rouleur->comp1_enable)
  780. rouleur_rx_connect_port(component, COMP_L, true);
  781. break;
  782. case SND_SOC_DAPM_POST_PMD:
  783. rouleur_rx_connect_port(component, HPH_L, false);
  784. if (rouleur->comp1_enable)
  785. rouleur_rx_connect_port(component, COMP_L, false);
  786. rouleur_rx_clk_disable(component);
  787. break;
  788. };
  789. return 0;
  790. }
  791. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  792. struct snd_kcontrol *kcontrol, int event)
  793. {
  794. struct snd_soc_component *component =
  795. snd_soc_dapm_to_component(w->dapm);
  796. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  797. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  798. w->name, event);
  799. switch (event) {
  800. case SND_SOC_DAPM_PRE_PMU:
  801. rouleur_rx_connect_port(component, HPH_R, true);
  802. if (rouleur->comp2_enable)
  803. rouleur_rx_connect_port(component, COMP_R, true);
  804. break;
  805. case SND_SOC_DAPM_POST_PMD:
  806. rouleur_rx_connect_port(component, HPH_R, false);
  807. if (rouleur->comp2_enable)
  808. rouleur_rx_connect_port(component, COMP_R, false);
  809. rouleur_rx_clk_disable(component);
  810. break;
  811. };
  812. return 0;
  813. }
  814. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  815. struct snd_kcontrol *kcontrol,
  816. int event)
  817. {
  818. struct snd_soc_component *component =
  819. snd_soc_dapm_to_component(w->dapm);
  820. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  821. u16 dmic_clk_reg;
  822. s32 *dmic_clk_cnt;
  823. unsigned int dmic;
  824. char *wname;
  825. int ret = 0;
  826. wname = strpbrk(w->name, "01");
  827. if (!wname) {
  828. dev_err(component->dev, "%s: widget not found\n", __func__);
  829. return -EINVAL;
  830. }
  831. ret = kstrtouint(wname, 10, &dmic);
  832. if (ret < 0) {
  833. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  834. __func__);
  835. return -EINVAL;
  836. }
  837. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  838. w->name, event);
  839. switch (dmic) {
  840. case 0:
  841. case 1:
  842. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  843. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  844. break;
  845. default:
  846. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  847. __func__);
  848. return -EINVAL;
  849. };
  850. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  851. __func__, event, dmic, *dmic_clk_cnt);
  852. switch (event) {
  853. case SND_SOC_DAPM_PRE_PMU:
  854. snd_soc_component_update_bits(component,
  855. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  856. snd_soc_component_update_bits(component,
  857. dmic_clk_reg, 0x08, 0x08);
  858. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  859. break;
  860. case SND_SOC_DAPM_POST_PMD:
  861. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  862. snd_soc_component_update_bits(component,
  863. dmic_clk_reg, 0x08, 0x00);
  864. snd_soc_component_update_bits(component,
  865. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  866. break;
  867. };
  868. return 0;
  869. }
  870. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  871. struct snd_kcontrol *kcontrol,
  872. int event)
  873. {
  874. struct snd_soc_component *component =
  875. snd_soc_dapm_to_component(w->dapm);
  876. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  877. int ret = 0;
  878. switch (event) {
  879. case SND_SOC_DAPM_PRE_PMU:
  880. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  881. rouleur->tx_swr_dev->dev_num,
  882. true);
  883. break;
  884. case SND_SOC_DAPM_POST_PMD:
  885. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  886. rouleur->tx_swr_dev->dev_num,
  887. false);
  888. break;
  889. };
  890. return ret;
  891. }
  892. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  893. struct snd_kcontrol *kcontrol,
  894. int event)
  895. {
  896. struct snd_soc_component *component =
  897. snd_soc_dapm_to_component(w->dapm);
  898. struct rouleur_priv *rouleur =
  899. snd_soc_component_get_drvdata(component);
  900. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  901. w->name, event);
  902. switch (event) {
  903. case SND_SOC_DAPM_PRE_PMU:
  904. /* Enable BCS for Headset mic */
  905. if (w->shift == 1 && !(snd_soc_component_read32(component,
  906. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  907. rouleur_tx_connect_port(component, MBHC, true);
  908. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  909. }
  910. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  911. rouleur_global_mbias_enable(component);
  912. if (w->shift)
  913. snd_soc_component_update_bits(component,
  914. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  915. 0x30, 0x30);
  916. else
  917. snd_soc_component_update_bits(component,
  918. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  919. 0x03, 0x03);
  920. break;
  921. case SND_SOC_DAPM_POST_PMD:
  922. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  923. if (w->shift == 1 &&
  924. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  925. rouleur_tx_connect_port(component, MBHC, false);
  926. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  927. }
  928. if (w->shift)
  929. snd_soc_component_update_bits(component,
  930. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  931. 0x30, 0x00);
  932. else
  933. snd_soc_component_update_bits(component,
  934. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  935. 0x03, 0x00);
  936. rouleur_global_mbias_disable(component);
  937. break;
  938. };
  939. return 0;
  940. }
  941. /*
  942. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  943. * @micb_mv: micbias in mv
  944. *
  945. * return register value converted
  946. */
  947. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  948. {
  949. /* min micbias voltage is 1.6V and maximum is 2.85V */
  950. if (micb_mv < 1600 || micb_mv > 2850) {
  951. pr_err("%s: unsupported micbias voltage\n", __func__);
  952. return -EINVAL;
  953. }
  954. return (micb_mv - 1600) / 50;
  955. }
  956. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  957. /*
  958. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  959. * @component: handle to snd_soc_component *
  960. * @req_volt: micbias voltage to be set
  961. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  962. *
  963. * return 0 if adjustment is success or error code in case of failure
  964. */
  965. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  966. int req_volt, int micb_num)
  967. {
  968. struct rouleur_priv *rouleur =
  969. snd_soc_component_get_drvdata(component);
  970. int cur_vout_ctl, req_vout_ctl;
  971. int micb_reg, micb_val, micb_en;
  972. int ret = 0;
  973. int pullup_mask;
  974. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  975. switch (micb_num) {
  976. case MIC_BIAS_1:
  977. micb_val = snd_soc_component_read32(component, micb_reg);
  978. micb_en = (micb_val & 0x40) >> 6;
  979. pullup_mask = 0x20;
  980. break;
  981. case MIC_BIAS_2:
  982. micb_val = snd_soc_component_read32(component, micb_reg);
  983. micb_en = (micb_val & 0x04) >> 2;
  984. pullup_mask = 0x02;
  985. break;
  986. case MIC_BIAS_3:
  987. default:
  988. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  989. __func__, micb_num);
  990. return -EINVAL;
  991. }
  992. mutex_lock(&rouleur->micb_lock);
  993. /*
  994. * If requested micbias voltage is same as current micbias
  995. * voltage, then just return. Otherwise, adjust voltage as
  996. * per requested value. If micbias is already enabled, then
  997. * to avoid slow micbias ramp-up or down enable pull-up
  998. * momentarily, change the micbias value and then re-enable
  999. * micbias.
  1000. */
  1001. cur_vout_ctl = (snd_soc_component_read32(component,
  1002. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1003. cur_vout_ctl = cur_vout_ctl >> 3;
  1004. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1005. if (req_vout_ctl < 0) {
  1006. ret = -EINVAL;
  1007. goto exit;
  1008. }
  1009. if (cur_vout_ctl == req_vout_ctl) {
  1010. ret = 0;
  1011. goto exit;
  1012. }
  1013. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1014. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1015. req_volt, micb_en);
  1016. if (micb_en == 0x1)
  1017. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1018. pullup_mask);
  1019. snd_soc_component_update_bits(component,
  1020. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1021. if (micb_en == 0x1) {
  1022. snd_soc_component_update_bits(component, micb_reg,
  1023. pullup_mask, 0x00);
  1024. /*
  1025. * Add 2ms delay as per HW requirement after enabling
  1026. * micbias
  1027. */
  1028. usleep_range(2000, 2100);
  1029. }
  1030. exit:
  1031. mutex_unlock(&rouleur->micb_lock);
  1032. return ret;
  1033. }
  1034. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1035. int rouleur_micbias_control(struct snd_soc_component *component,
  1036. int micb_num, int req, bool is_dapm)
  1037. {
  1038. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1039. int micb_index = micb_num - 1;
  1040. u16 micb_reg;
  1041. int pre_off_event = 0, post_off_event = 0;
  1042. int post_on_event = 0, post_dapm_off = 0;
  1043. int post_dapm_on = 0;
  1044. u8 pullup_mask = 0, enable_mask = 0;
  1045. int ret = 0;
  1046. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1047. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1048. __func__, micb_index);
  1049. return -EINVAL;
  1050. }
  1051. switch (micb_num) {
  1052. case MIC_BIAS_1:
  1053. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1054. pullup_mask = 0x20;
  1055. enable_mask = 0x40;
  1056. break;
  1057. case MIC_BIAS_2:
  1058. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1059. pullup_mask = 0x02;
  1060. enable_mask = 0x04;
  1061. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1062. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1063. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1064. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1065. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1066. break;
  1067. case MIC_BIAS_3:
  1068. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1069. pullup_mask = 0x02;
  1070. break;
  1071. default:
  1072. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1073. __func__, micb_num);
  1074. return -EINVAL;
  1075. };
  1076. mutex_lock(&rouleur->micb_lock);
  1077. switch (req) {
  1078. case MICB_PULLUP_ENABLE:
  1079. if (!rouleur->dev_up) {
  1080. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1081. __func__, req);
  1082. ret = -ENODEV;
  1083. goto done;
  1084. }
  1085. rouleur->pullup_ref[micb_index]++;
  1086. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1087. (rouleur->micb_ref[micb_index] == 0))
  1088. snd_soc_component_update_bits(component, micb_reg,
  1089. pullup_mask, pullup_mask);
  1090. break;
  1091. case MICB_PULLUP_DISABLE:
  1092. if (!rouleur->dev_up) {
  1093. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1094. __func__, req);
  1095. ret = -ENODEV;
  1096. goto done;
  1097. }
  1098. if (rouleur->pullup_ref[micb_index] > 0)
  1099. rouleur->pullup_ref[micb_index]--;
  1100. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1101. (rouleur->micb_ref[micb_index] == 0))
  1102. snd_soc_component_update_bits(component, micb_reg,
  1103. pullup_mask, 0x00);
  1104. break;
  1105. case MICB_ENABLE:
  1106. if (!rouleur->dev_up) {
  1107. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1108. __func__, req);
  1109. ret = -ENODEV;
  1110. goto done;
  1111. }
  1112. rouleur->micb_ref[micb_index]++;
  1113. if (rouleur->micb_ref[micb_index] == 1) {
  1114. rouleur_global_mbias_enable(component);
  1115. snd_soc_component_update_bits(component,
  1116. micb_reg, enable_mask, enable_mask);
  1117. if (post_on_event)
  1118. blocking_notifier_call_chain(
  1119. &rouleur->mbhc->notifier, post_on_event,
  1120. &rouleur->mbhc->wcd_mbhc);
  1121. }
  1122. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1123. blocking_notifier_call_chain(
  1124. &rouleur->mbhc->notifier, post_dapm_on,
  1125. &rouleur->mbhc->wcd_mbhc);
  1126. break;
  1127. case MICB_DISABLE:
  1128. if (rouleur->micb_ref[micb_index] > 0)
  1129. rouleur->micb_ref[micb_index]--;
  1130. if (!rouleur->dev_up) {
  1131. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1132. __func__, req);
  1133. ret = -ENODEV;
  1134. goto done;
  1135. }
  1136. if ((rouleur->micb_ref[micb_index] == 0) &&
  1137. (rouleur->pullup_ref[micb_index] > 0)) {
  1138. snd_soc_component_update_bits(component, micb_reg,
  1139. pullup_mask, pullup_mask);
  1140. snd_soc_component_update_bits(component, micb_reg,
  1141. enable_mask, 0x00);
  1142. rouleur_global_mbias_disable(component);
  1143. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1144. (rouleur->pullup_ref[micb_index] == 0)) {
  1145. if (pre_off_event && rouleur->mbhc)
  1146. blocking_notifier_call_chain(
  1147. &rouleur->mbhc->notifier, pre_off_event,
  1148. &rouleur->mbhc->wcd_mbhc);
  1149. snd_soc_component_update_bits(component, micb_reg,
  1150. enable_mask, 0x00);
  1151. rouleur_global_mbias_disable(component);
  1152. if (post_off_event && rouleur->mbhc)
  1153. blocking_notifier_call_chain(
  1154. &rouleur->mbhc->notifier,
  1155. post_off_event,
  1156. &rouleur->mbhc->wcd_mbhc);
  1157. }
  1158. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1159. blocking_notifier_call_chain(
  1160. &rouleur->mbhc->notifier, post_dapm_off,
  1161. &rouleur->mbhc->wcd_mbhc);
  1162. break;
  1163. };
  1164. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1165. __func__, micb_num, rouleur->micb_ref[micb_index],
  1166. rouleur->pullup_ref[micb_index]);
  1167. done:
  1168. mutex_unlock(&rouleur->micb_lock);
  1169. return 0;
  1170. }
  1171. EXPORT_SYMBOL(rouleur_micbias_control);
  1172. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1173. bool bcs_disable)
  1174. {
  1175. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1176. if (rouleur->update_wcd_event) {
  1177. if (bcs_disable)
  1178. rouleur->update_wcd_event(rouleur->handle,
  1179. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1180. else
  1181. rouleur->update_wcd_event(rouleur->handle,
  1182. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1183. }
  1184. }
  1185. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1186. {
  1187. int ret = 0;
  1188. uint8_t devnum = 0;
  1189. int num_retry = NUM_ATTEMPTS;
  1190. do {
  1191. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1192. if (ret) {
  1193. dev_err(&swr_dev->dev,
  1194. "%s get devnum %d for dev addr %lx failed\n",
  1195. __func__, devnum, swr_dev->addr);
  1196. /* retry after 1ms */
  1197. usleep_range(1000, 1010);
  1198. }
  1199. } while (ret && --num_retry);
  1200. swr_dev->dev_num = devnum;
  1201. return 0;
  1202. }
  1203. static int rouleur_event_notify(struct notifier_block *block,
  1204. unsigned long val,
  1205. void *data)
  1206. {
  1207. u16 event = (val & 0xffff);
  1208. int ret = 0;
  1209. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1210. struct snd_soc_component *component = rouleur->component;
  1211. struct wcd_mbhc *mbhc;
  1212. switch (event) {
  1213. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1214. snd_soc_component_update_bits(component,
  1215. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1216. 0xC0, 0x00);
  1217. snd_soc_component_update_bits(component,
  1218. ROULEUR_ANA_COMBOPA_CTL,
  1219. 0x40, 0x00);
  1220. snd_soc_component_update_bits(component,
  1221. ROULEUR_ANA_COMBOPA_CTL,
  1222. 0x80, 0x00);
  1223. snd_soc_component_update_bits(component,
  1224. ROULEUR_ANA_COMBOPA_CTL,
  1225. 0x40, 0x40);
  1226. snd_soc_component_update_bits(component,
  1227. ROULEUR_ANA_COMBOPA_CTL,
  1228. 0x80, 0x00);
  1229. break;
  1230. case BOLERO_WCD_EVT_SSR_DOWN:
  1231. rouleur->dev_up = false;
  1232. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1233. mbhc = &rouleur->mbhc->wcd_mbhc;
  1234. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1235. rouleur_reset(rouleur->dev, 0x01);
  1236. break;
  1237. case BOLERO_WCD_EVT_SSR_UP:
  1238. rouleur_reset(rouleur->dev, 0x00);
  1239. /* allow reset to take effect */
  1240. usleep_range(10000, 10010);
  1241. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1242. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1243. rouleur_init_reg(component);
  1244. regcache_mark_dirty(rouleur->regmap);
  1245. regcache_sync(rouleur->regmap);
  1246. /* Initialize MBHC module */
  1247. mbhc = &rouleur->mbhc->wcd_mbhc;
  1248. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1249. if (ret) {
  1250. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1251. __func__);
  1252. } else {
  1253. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1254. }
  1255. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1256. rouleur->dev_up = true;
  1257. break;
  1258. default:
  1259. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1260. event);
  1261. break;
  1262. }
  1263. return 0;
  1264. }
  1265. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1266. int event)
  1267. {
  1268. struct snd_soc_component *component =
  1269. snd_soc_dapm_to_component(w->dapm);
  1270. int micb_num;
  1271. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1272. __func__, w->name, event);
  1273. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1274. micb_num = MIC_BIAS_1;
  1275. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1276. micb_num = MIC_BIAS_2;
  1277. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1278. micb_num = MIC_BIAS_3;
  1279. else
  1280. return -EINVAL;
  1281. switch (event) {
  1282. case SND_SOC_DAPM_PRE_PMU:
  1283. /* Micbias LD0 enable not supported for MicBias 3*/
  1284. if (micb_num == MIC_BIAS_3)
  1285. rouleur_micbias_control(component, micb_num,
  1286. MICB_PULLUP_ENABLE, true);
  1287. else
  1288. rouleur_micbias_control(component, micb_num,
  1289. MICB_ENABLE, true);
  1290. break;
  1291. case SND_SOC_DAPM_POST_PMU:
  1292. usleep_range(1000, 1100);
  1293. break;
  1294. case SND_SOC_DAPM_POST_PMD:
  1295. if (micb_num == MIC_BIAS_3)
  1296. rouleur_micbias_control(component, micb_num,
  1297. MICB_PULLUP_DISABLE, true);
  1298. else
  1299. rouleur_micbias_control(component, micb_num,
  1300. MICB_DISABLE, true);
  1301. break;
  1302. };
  1303. return 0;
  1304. }
  1305. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1306. struct snd_kcontrol *kcontrol,
  1307. int event)
  1308. {
  1309. return __rouleur_codec_enable_micbias(w, event);
  1310. }
  1311. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1312. int event)
  1313. {
  1314. struct snd_soc_component *component =
  1315. snd_soc_dapm_to_component(w->dapm);
  1316. int micb_num;
  1317. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1318. __func__, w->name, event);
  1319. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1320. micb_num = MIC_BIAS_1;
  1321. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1322. micb_num = MIC_BIAS_2;
  1323. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1324. micb_num = MIC_BIAS_3;
  1325. else
  1326. return -EINVAL;
  1327. switch (event) {
  1328. case SND_SOC_DAPM_PRE_PMU:
  1329. rouleur_micbias_control(component, micb_num,
  1330. MICB_PULLUP_ENABLE, true);
  1331. break;
  1332. case SND_SOC_DAPM_POST_PMU:
  1333. /* 1 msec delay as per HW requirement */
  1334. usleep_range(1000, 1100);
  1335. break;
  1336. case SND_SOC_DAPM_POST_PMD:
  1337. rouleur_micbias_control(component, micb_num,
  1338. MICB_PULLUP_DISABLE, true);
  1339. break;
  1340. };
  1341. return 0;
  1342. }
  1343. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1344. struct snd_kcontrol *kcontrol,
  1345. int event)
  1346. {
  1347. return __rouleur_codec_enable_micbias_pullup(w, event);
  1348. }
  1349. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1350. struct snd_ctl_elem_value *ucontrol)
  1351. {
  1352. struct snd_soc_component *component =
  1353. snd_soc_kcontrol_component(kcontrol);
  1354. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1355. bool hphr;
  1356. struct soc_multi_mixer_control *mc;
  1357. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1358. hphr = mc->shift;
  1359. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1360. rouleur->comp1_enable;
  1361. return 0;
  1362. }
  1363. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1364. struct snd_ctl_elem_value *ucontrol)
  1365. {
  1366. struct snd_soc_component *component =
  1367. snd_soc_kcontrol_component(kcontrol);
  1368. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1369. int value = ucontrol->value.integer.value[0];
  1370. bool hphr;
  1371. struct soc_multi_mixer_control *mc;
  1372. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1373. hphr = mc->shift;
  1374. if (hphr)
  1375. rouleur->comp2_enable = value;
  1376. else
  1377. rouleur->comp1_enable = value;
  1378. return 0;
  1379. }
  1380. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1381. struct snd_kcontrol *kcontrol,
  1382. int event)
  1383. {
  1384. struct snd_soc_component *component =
  1385. snd_soc_dapm_to_component(w->dapm);
  1386. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1387. struct rouleur_pdata *pdata = NULL;
  1388. int ret = 0;
  1389. pdata = dev_get_platdata(rouleur->dev);
  1390. if (!pdata) {
  1391. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1392. return -EINVAL;
  1393. }
  1394. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1395. w->name, event);
  1396. switch (event) {
  1397. case SND_SOC_DAPM_PRE_PMU:
  1398. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1399. dev_dbg(component->dev,
  1400. "%s: vpos already in enabled state\n",
  1401. __func__);
  1402. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1403. return 0;
  1404. }
  1405. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1406. rouleur->supplies,
  1407. pdata->regulator,
  1408. pdata->num_supplies,
  1409. "cdc-pa-vpos");
  1410. if (ret == -EINVAL) {
  1411. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1412. __func__);
  1413. return ret;
  1414. }
  1415. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1416. /*
  1417. * 200us sleep is required after LDO15 is enabled as per
  1418. * HW requirement
  1419. */
  1420. usleep_range(200, 250);
  1421. break;
  1422. case SND_SOC_DAPM_POST_PMD:
  1423. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1424. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1425. rouleur->rx_swr_dev->dev_num,
  1426. false);
  1427. break;
  1428. }
  1429. return 0;
  1430. }
  1431. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1432. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1433. rouleur_get_compander, rouleur_set_compander),
  1434. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1435. rouleur_get_compander, rouleur_set_compander),
  1436. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1437. line_gain),
  1438. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1439. line_gain),
  1440. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1441. analog_gain),
  1442. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1443. analog_gain),
  1444. };
  1445. static const struct snd_kcontrol_new adc1_switch[] = {
  1446. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1447. };
  1448. static const struct snd_kcontrol_new adc2_switch[] = {
  1449. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1450. };
  1451. static const struct snd_kcontrol_new dmic1_switch[] = {
  1452. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1453. };
  1454. static const struct snd_kcontrol_new dmic2_switch[] = {
  1455. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1456. };
  1457. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1458. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1459. };
  1460. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1461. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1462. };
  1463. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1464. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1465. };
  1466. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1467. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1468. };
  1469. static const char * const adc2_mux_text[] = {
  1470. "INP2", "INP3"
  1471. };
  1472. static const struct soc_enum adc2_enum =
  1473. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1474. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1475. static const struct snd_kcontrol_new tx_adc2_mux =
  1476. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1477. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1478. /*input widgets*/
  1479. SND_SOC_DAPM_INPUT("AMIC1"),
  1480. SND_SOC_DAPM_INPUT("AMIC2"),
  1481. SND_SOC_DAPM_INPUT("AMIC3"),
  1482. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1483. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1484. /*tx widgets*/
  1485. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1486. rouleur_codec_enable_adc,
  1487. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1488. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1489. rouleur_codec_enable_adc,
  1490. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1491. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1492. &tx_adc2_mux),
  1493. /*tx mixers*/
  1494. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1495. adc1_switch, ARRAY_SIZE(adc1_switch),
  1496. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1497. SND_SOC_DAPM_POST_PMD),
  1498. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1499. adc2_switch, ARRAY_SIZE(adc2_switch),
  1500. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1501. SND_SOC_DAPM_POST_PMD),
  1502. /* micbias widgets*/
  1503. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1504. rouleur_codec_enable_micbias,
  1505. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1506. SND_SOC_DAPM_POST_PMD),
  1507. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1508. rouleur_codec_enable_micbias,
  1509. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1510. SND_SOC_DAPM_POST_PMD),
  1511. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1512. rouleur_codec_enable_micbias,
  1513. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1514. SND_SOC_DAPM_POST_PMD),
  1515. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1516. rouleur_codec_enable_pa_vpos,
  1517. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1518. /*rx widgets*/
  1519. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1520. rouleur_codec_enable_ear_pa,
  1521. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1522. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1523. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1524. rouleur_codec_enable_lo_pa,
  1525. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1526. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1527. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1528. 0, rouleur_codec_enable_hphl_pa,
  1529. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1530. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1531. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1532. 0, rouleur_codec_enable_hphr_pa,
  1533. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1534. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1535. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1536. rouleur_codec_hphl_dac_event,
  1537. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1538. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1539. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1540. rouleur_codec_hphr_dac_event,
  1541. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1542. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1543. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1544. rouleur_codec_ear_lo_dac_event,
  1545. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1546. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1547. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1548. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1549. SND_SOC_DAPM_POST_PMD),
  1550. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1551. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1552. SND_SOC_DAPM_POST_PMD),
  1553. /* rx mixer widgets*/
  1554. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1555. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1556. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1557. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1558. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1559. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1560. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1561. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1562. /*output widgets tx*/
  1563. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1564. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1565. /*output widgets rx*/
  1566. SND_SOC_DAPM_OUTPUT("EAR"),
  1567. SND_SOC_DAPM_OUTPUT("LO"),
  1568. SND_SOC_DAPM_OUTPUT("HPHL"),
  1569. SND_SOC_DAPM_OUTPUT("HPHR"),
  1570. /* micbias pull up widgets*/
  1571. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1572. rouleur_codec_enable_micbias_pullup,
  1573. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1574. SND_SOC_DAPM_POST_PMD),
  1575. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1576. rouleur_codec_enable_micbias_pullup,
  1577. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1578. SND_SOC_DAPM_POST_PMD),
  1579. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1580. rouleur_codec_enable_micbias_pullup,
  1581. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1582. SND_SOC_DAPM_POST_PMD),
  1583. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1584. rouleur_codec_enable_dmic,
  1585. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1586. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1587. rouleur_codec_enable_dmic,
  1588. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1589. /*tx mixer widgets*/
  1590. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1591. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1592. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1593. SND_SOC_DAPM_POST_PMD),
  1594. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1595. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1596. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1597. SND_SOC_DAPM_POST_PMD),
  1598. /*output widgets*/
  1599. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1600. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1601. };
  1602. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1603. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1604. {"ADC1_MIXER", "Switch", "ADC1"},
  1605. {"ADC1", NULL, "AMIC1"},
  1606. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1607. {"ADC2_MIXER", "Switch", "ADC2"},
  1608. {"ADC2", NULL, "ADC2 MUX"},
  1609. {"ADC2 MUX", "INP3", "AMIC3"},
  1610. {"ADC2 MUX", "INP2", "AMIC2"},
  1611. {"IN1_HPHL", NULL, "PA_VPOS"},
  1612. {"RX1", NULL, "IN1_HPHL"},
  1613. {"RDAC1", NULL, "RX1"},
  1614. {"HPHL_RDAC", "Switch", "RDAC1"},
  1615. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1616. {"HPHL", NULL, "HPHL PGA"},
  1617. {"IN2_HPHR", NULL, "PA_VPOS"},
  1618. {"RX2", NULL, "IN2_HPHR"},
  1619. {"RDAC2", NULL, "RX2"},
  1620. {"HPHR_RDAC", "Switch", "RDAC2"},
  1621. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1622. {"HPHR", NULL, "HPHR PGA"},
  1623. {"RDAC3", NULL, "RX1"},
  1624. {"EAR_RDAC", "Switch", "RDAC3"},
  1625. {"EAR PGA", NULL, "EAR_RDAC"},
  1626. {"EAR", NULL, "EAR PGA"},
  1627. {"RDAC3", NULL, "RX1"},
  1628. {"LO_RDAC", "Switch", "RDAC3"},
  1629. {"LO PGA", NULL, "LO_RDAC"},
  1630. {"LO", NULL, "LO PGA"},
  1631. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1632. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1633. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1634. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1635. };
  1636. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1637. void *file_private_data,
  1638. struct file *file,
  1639. char __user *buf, size_t count,
  1640. loff_t pos)
  1641. {
  1642. struct rouleur_priv *priv;
  1643. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1644. int len = 0;
  1645. priv = (struct rouleur_priv *) entry->private_data;
  1646. if (!priv) {
  1647. pr_err("%s: rouleur priv is null\n", __func__);
  1648. return -EINVAL;
  1649. }
  1650. switch (priv->version) {
  1651. case ROULEUR_VERSION_1_0:
  1652. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1653. break;
  1654. default:
  1655. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1656. }
  1657. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1658. }
  1659. static struct snd_info_entry_ops rouleur_info_ops = {
  1660. .read = rouleur_version_read,
  1661. };
  1662. /*
  1663. * rouleur_info_create_codec_entry - creates rouleur module
  1664. * @codec_root: The parent directory
  1665. * @component: component instance
  1666. *
  1667. * Creates rouleur module and version entry under the given
  1668. * parent directory.
  1669. *
  1670. * Return: 0 on success or negative error code on failure.
  1671. */
  1672. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1673. struct snd_soc_component *component)
  1674. {
  1675. struct snd_info_entry *version_entry;
  1676. struct rouleur_priv *priv;
  1677. struct snd_soc_card *card;
  1678. if (!codec_root || !component)
  1679. return -EINVAL;
  1680. priv = snd_soc_component_get_drvdata(component);
  1681. if (priv->entry) {
  1682. dev_dbg(priv->dev,
  1683. "%s:rouleur module already created\n", __func__);
  1684. return 0;
  1685. }
  1686. card = component->card;
  1687. priv->entry = snd_info_create_subdir(codec_root->module,
  1688. "rouleur", codec_root);
  1689. if (!priv->entry) {
  1690. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1691. __func__);
  1692. return -ENOMEM;
  1693. }
  1694. version_entry = snd_info_create_card_entry(card->snd_card,
  1695. "version",
  1696. priv->entry);
  1697. if (!version_entry) {
  1698. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1699. __func__);
  1700. return -ENOMEM;
  1701. }
  1702. version_entry->private_data = priv;
  1703. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1704. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1705. version_entry->c.ops = &rouleur_info_ops;
  1706. if (snd_info_register(version_entry) < 0) {
  1707. snd_info_free_entry(version_entry);
  1708. return -ENOMEM;
  1709. }
  1710. priv->version_entry = version_entry;
  1711. return 0;
  1712. }
  1713. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1714. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1715. struct rouleur_pdata *pdata)
  1716. {
  1717. int vout_ctl = 0;
  1718. int rc = 0;
  1719. if (!pdata) {
  1720. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1721. return -ENODEV;
  1722. }
  1723. /* set micbias voltage */
  1724. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1725. if (vout_ctl < 0) {
  1726. rc = -EINVAL;
  1727. goto done;
  1728. }
  1729. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1730. 0xF8, vout_ctl << 3);
  1731. done:
  1732. return rc;
  1733. }
  1734. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1735. {
  1736. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1737. struct snd_soc_dapm_context *dapm =
  1738. snd_soc_component_get_dapm(component);
  1739. int ret = -EINVAL;
  1740. dev_info(component->dev, "%s()\n", __func__);
  1741. rouleur = snd_soc_component_get_drvdata(component);
  1742. if (!rouleur)
  1743. return -EINVAL;
  1744. rouleur->component = component;
  1745. snd_soc_component_init_regmap(component, rouleur->regmap);
  1746. rouleur->fw_data = devm_kzalloc(component->dev,
  1747. sizeof(*(rouleur->fw_data)),
  1748. GFP_KERNEL);
  1749. if (!rouleur->fw_data) {
  1750. dev_err(component->dev, "Failed to allocate fw_data\n");
  1751. ret = -ENOMEM;
  1752. goto done;
  1753. }
  1754. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1755. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1756. WCD9XXX_CODEC_HWDEP_NODE, component);
  1757. if (ret < 0) {
  1758. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1759. goto done;
  1760. }
  1761. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1762. if (ret) {
  1763. pr_err("%s: mbhc initialization failed\n", __func__);
  1764. goto done;
  1765. }
  1766. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1767. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1768. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1769. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1770. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1771. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1772. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1773. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1774. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1775. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1776. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1777. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1778. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1779. snd_soc_dapm_sync(dapm);
  1780. rouleur_init_reg(component);
  1781. rouleur->version = ROULEUR_VERSION_1_0;
  1782. /* Register event notifier */
  1783. rouleur->nblock.notifier_call = rouleur_event_notify;
  1784. if (rouleur->register_notifier) {
  1785. ret = rouleur->register_notifier(rouleur->handle,
  1786. &rouleur->nblock,
  1787. true);
  1788. if (ret) {
  1789. dev_err(component->dev,
  1790. "%s: Failed to register notifier %d\n",
  1791. __func__, ret);
  1792. return ret;
  1793. }
  1794. }
  1795. rouleur->dev_up = true;
  1796. done:
  1797. return ret;
  1798. }
  1799. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1800. {
  1801. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1802. if (!rouleur)
  1803. return;
  1804. if (rouleur->register_notifier)
  1805. rouleur->register_notifier(rouleur->handle,
  1806. &rouleur->nblock,
  1807. false);
  1808. }
  1809. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1810. .name = DRV_NAME,
  1811. .probe = rouleur_soc_codec_probe,
  1812. .remove = rouleur_soc_codec_remove,
  1813. .controls = rouleur_snd_controls,
  1814. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1815. .dapm_widgets = rouleur_dapm_widgets,
  1816. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1817. .dapm_routes = rouleur_audio_map,
  1818. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1819. };
  1820. #ifdef CONFIG_PM_SLEEP
  1821. static int rouleur_suspend(struct device *dev)
  1822. {
  1823. struct rouleur_priv *rouleur = NULL;
  1824. int ret = 0;
  1825. struct rouleur_pdata *pdata = NULL;
  1826. if (!dev)
  1827. return -ENODEV;
  1828. rouleur = dev_get_drvdata(dev);
  1829. if (!rouleur)
  1830. return -EINVAL;
  1831. pdata = dev_get_platdata(rouleur->dev);
  1832. if (!pdata) {
  1833. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1834. return -EINVAL;
  1835. }
  1836. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1837. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1838. rouleur->supplies,
  1839. pdata->regulator,
  1840. pdata->num_supplies,
  1841. "cdc-pa-vpos");
  1842. if (ret == -EINVAL) {
  1843. dev_err(dev, "%s: pa vpos is not disabled\n",
  1844. __func__);
  1845. return 0;
  1846. }
  1847. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1848. }
  1849. return 0;
  1850. }
  1851. static int rouleur_resume(struct device *dev)
  1852. {
  1853. return 0;
  1854. }
  1855. #endif
  1856. static int rouleur_reset(struct device *dev, int reset_val)
  1857. {
  1858. struct rouleur_priv *rouleur = NULL;
  1859. if (!dev)
  1860. return -ENODEV;
  1861. rouleur = dev_get_drvdata(dev);
  1862. if (!rouleur)
  1863. return -EINVAL;
  1864. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1865. return 0;
  1866. }
  1867. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1868. u32 *val)
  1869. {
  1870. int rc = 0;
  1871. rc = of_property_read_u32(dev->of_node, name, val);
  1872. if (rc)
  1873. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1874. __func__, name, dev->of_node->full_name);
  1875. return rc;
  1876. }
  1877. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1878. struct rouleur_micbias_setting *mb)
  1879. {
  1880. u32 prop_val = 0;
  1881. int rc = 0;
  1882. /* MB1 */
  1883. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1884. NULL)) {
  1885. rc = rouleur_read_of_property_u32(dev,
  1886. "qcom,cdc-micbias1-mv",
  1887. &prop_val);
  1888. if (!rc)
  1889. mb->micb1_mv = prop_val;
  1890. } else {
  1891. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1892. __func__);
  1893. }
  1894. /* MB2 */
  1895. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1896. NULL)) {
  1897. rc = rouleur_read_of_property_u32(dev,
  1898. "qcom,cdc-micbias2-mv",
  1899. &prop_val);
  1900. if (!rc)
  1901. mb->micb2_mv = prop_val;
  1902. } else {
  1903. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1904. __func__);
  1905. }
  1906. /* MB3 */
  1907. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1908. NULL)) {
  1909. rc = rouleur_read_of_property_u32(dev,
  1910. "qcom,cdc-micbias3-mv",
  1911. &prop_val);
  1912. if (!rc)
  1913. mb->micb3_mv = prop_val;
  1914. } else {
  1915. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1916. __func__);
  1917. }
  1918. }
  1919. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  1920. {
  1921. struct rouleur_pdata *pdata = NULL;
  1922. u32 reg;
  1923. int ret = 0;
  1924. pdata = kzalloc(sizeof(struct rouleur_pdata),
  1925. GFP_KERNEL);
  1926. if (!pdata)
  1927. return NULL;
  1928. pdata->spmi_np = of_parse_phandle(dev->of_node,
  1929. "qcom,pmic-spmi-node", 0);
  1930. if (!pdata->spmi_np) {
  1931. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1932. __func__, "qcom,pmic-spmi-node",
  1933. dev->of_node->full_name);
  1934. kfree(pdata);
  1935. return NULL;
  1936. }
  1937. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  1938. if (ret) {
  1939. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  1940. __func__, ret);
  1941. kfree(pdata);
  1942. return NULL;
  1943. }
  1944. pdata->reset_reg = reg;
  1945. /* Parse power supplies */
  1946. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1947. &pdata->num_supplies);
  1948. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1949. dev_err(dev, "%s: no power supplies defined for codec\n",
  1950. __func__);
  1951. kfree(pdata);
  1952. return NULL;
  1953. }
  1954. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1955. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1956. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  1957. return pdata;
  1958. }
  1959. static int rouleur_wakeup(void *handle, bool enable)
  1960. {
  1961. struct rouleur_priv *priv;
  1962. if (!handle) {
  1963. pr_err("%s: NULL handle\n", __func__);
  1964. return -EINVAL;
  1965. }
  1966. priv = (struct rouleur_priv *)handle;
  1967. if (!priv->tx_swr_dev) {
  1968. pr_err("%s: tx swr dev is NULL\n", __func__);
  1969. return -EINVAL;
  1970. }
  1971. if (enable)
  1972. return swr_device_wakeup_vote(priv->tx_swr_dev);
  1973. else
  1974. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  1975. }
  1976. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  1977. {
  1978. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  1979. __func__, irq);
  1980. return IRQ_HANDLED;
  1981. }
  1982. static int rouleur_bind(struct device *dev)
  1983. {
  1984. int ret = 0, i = 0;
  1985. struct rouleur_priv *rouleur = NULL;
  1986. struct rouleur_pdata *pdata = NULL;
  1987. struct wcd_ctrl_platform_data *plat_data = NULL;
  1988. struct platform_device *pdev = NULL;
  1989. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  1990. if (!rouleur)
  1991. return -ENOMEM;
  1992. dev_set_drvdata(dev, rouleur);
  1993. pdata = rouleur_populate_dt_data(dev);
  1994. if (!pdata) {
  1995. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1996. kfree(rouleur);
  1997. return -EINVAL;
  1998. }
  1999. rouleur->dev = dev;
  2000. rouleur->dev->platform_data = pdata;
  2001. pdev = of_find_device_by_node(pdata->spmi_np);
  2002. if (!pdev) {
  2003. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2004. __func__);
  2005. ret = -EINVAL;
  2006. goto err_bind_all;
  2007. }
  2008. rouleur->spmi_dev = &pdev->dev;
  2009. rouleur->reset_reg = pdata->reset_reg;
  2010. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2011. pdata->regulator, pdata->num_supplies);
  2012. if (!rouleur->supplies) {
  2013. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2014. __func__);
  2015. goto err_bind_all;
  2016. }
  2017. plat_data = dev_get_platdata(dev->parent);
  2018. if (!plat_data) {
  2019. dev_err(dev, "%s: platform data from parent is NULL\n",
  2020. __func__);
  2021. ret = -EINVAL;
  2022. goto err_bind_all;
  2023. }
  2024. rouleur->handle = (void *)plat_data->handle;
  2025. if (!rouleur->handle) {
  2026. dev_err(dev, "%s: handle is NULL\n", __func__);
  2027. ret = -EINVAL;
  2028. goto err_bind_all;
  2029. }
  2030. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2031. if (!rouleur->update_wcd_event) {
  2032. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2033. __func__);
  2034. ret = -EINVAL;
  2035. goto err_bind_all;
  2036. }
  2037. rouleur->register_notifier = plat_data->register_notifier;
  2038. if (!rouleur->register_notifier) {
  2039. dev_err(dev, "%s: register_notifier api is null!\n",
  2040. __func__);
  2041. ret = -EINVAL;
  2042. goto err_bind_all;
  2043. }
  2044. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2045. pdata->regulator,
  2046. pdata->num_supplies);
  2047. if (ret) {
  2048. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2049. __func__);
  2050. goto err_bind_all;
  2051. }
  2052. rouleur_reset(dev, 0x01);
  2053. usleep_range(20, 30);
  2054. rouleur_reset(dev, 0x00);
  2055. /*
  2056. * Add 5msec delay to provide sufficient time for
  2057. * soundwire auto enumeration of slave devices as
  2058. * as per HW requirement.
  2059. */
  2060. usleep_range(5000, 5010);
  2061. rouleur->wakeup = rouleur_wakeup;
  2062. ret = component_bind_all(dev, rouleur);
  2063. if (ret) {
  2064. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2065. __func__, ret);
  2066. goto err_bind_all;
  2067. }
  2068. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2069. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2070. if (ret) {
  2071. dev_err(dev, "Failed to read port mapping\n");
  2072. goto err;
  2073. }
  2074. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2075. if (!rouleur->rx_swr_dev) {
  2076. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2077. __func__);
  2078. ret = -ENODEV;
  2079. goto err;
  2080. }
  2081. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2082. if (!rouleur->tx_swr_dev) {
  2083. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2084. __func__);
  2085. ret = -ENODEV;
  2086. goto err;
  2087. }
  2088. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2089. &rouleur_regmap_config);
  2090. if (!rouleur->regmap) {
  2091. dev_err(dev, "%s: Regmap init failed\n",
  2092. __func__);
  2093. goto err;
  2094. }
  2095. /* Set all interupts as edge triggered */
  2096. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2097. regmap_write(rouleur->regmap,
  2098. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2099. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2100. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2101. rouleur->irq_info.codec_name = "rouleur";
  2102. rouleur->irq_info.regmap = rouleur->regmap;
  2103. rouleur->irq_info.dev = dev;
  2104. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2105. if (ret) {
  2106. dev_err(dev, "%s: IRQ init failed: %d\n",
  2107. __func__, ret);
  2108. goto err;
  2109. }
  2110. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2111. mutex_init(&rouleur->micb_lock);
  2112. mutex_init(&rouleur->main_bias_lock);
  2113. mutex_init(&rouleur->rx_clk_lock);
  2114. ret = rouleur_set_micbias_data(rouleur, pdata);
  2115. if (ret < 0) {
  2116. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2117. goto err_irq;
  2118. }
  2119. /* Request for watchdog interrupt */
  2120. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2121. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2122. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2123. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2124. /* Disable watchdog interrupt for HPH */
  2125. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2126. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2127. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2128. NULL, 0);
  2129. if (ret) {
  2130. dev_err(dev, "%s: Codec registration failed\n",
  2131. __func__);
  2132. goto err_irq;
  2133. }
  2134. return ret;
  2135. err_irq:
  2136. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2137. mutex_destroy(&rouleur->micb_lock);
  2138. mutex_destroy(&rouleur->main_bias_lock);
  2139. mutex_destroy(&rouleur->rx_clk_lock);
  2140. err:
  2141. component_unbind_all(dev, rouleur);
  2142. err_bind_all:
  2143. dev_set_drvdata(dev, NULL);
  2144. kfree(pdata);
  2145. kfree(rouleur);
  2146. return ret;
  2147. }
  2148. static void rouleur_unbind(struct device *dev)
  2149. {
  2150. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2151. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2152. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2153. snd_soc_unregister_component(dev);
  2154. component_unbind_all(dev, rouleur);
  2155. mutex_destroy(&rouleur->micb_lock);
  2156. mutex_destroy(&rouleur->main_bias_lock);
  2157. mutex_destroy(&rouleur->rx_clk_lock);
  2158. dev_set_drvdata(dev, NULL);
  2159. kfree(pdata);
  2160. kfree(rouleur);
  2161. }
  2162. static const struct of_device_id rouleur_dt_match[] = {
  2163. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2164. {}
  2165. };
  2166. static const struct component_master_ops rouleur_comp_ops = {
  2167. .bind = rouleur_bind,
  2168. .unbind = rouleur_unbind,
  2169. };
  2170. static int rouleur_compare_of(struct device *dev, void *data)
  2171. {
  2172. return dev->of_node == data;
  2173. }
  2174. static void rouleur_release_of(struct device *dev, void *data)
  2175. {
  2176. of_node_put(data);
  2177. }
  2178. static int rouleur_add_slave_components(struct device *dev,
  2179. struct component_match **matchptr)
  2180. {
  2181. struct device_node *np, *rx_node, *tx_node;
  2182. np = dev->of_node;
  2183. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2184. if (!rx_node) {
  2185. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2186. return -ENODEV;
  2187. }
  2188. of_node_get(rx_node);
  2189. component_match_add_release(dev, matchptr,
  2190. rouleur_release_of,
  2191. rouleur_compare_of,
  2192. rx_node);
  2193. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2194. if (!tx_node) {
  2195. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2196. return -ENODEV;
  2197. }
  2198. of_node_get(tx_node);
  2199. component_match_add_release(dev, matchptr,
  2200. rouleur_release_of,
  2201. rouleur_compare_of,
  2202. tx_node);
  2203. return 0;
  2204. }
  2205. static int rouleur_probe(struct platform_device *pdev)
  2206. {
  2207. struct component_match *match = NULL;
  2208. int ret;
  2209. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2210. if (ret)
  2211. return ret;
  2212. return component_master_add_with_match(&pdev->dev,
  2213. &rouleur_comp_ops, match);
  2214. }
  2215. static int rouleur_remove(struct platform_device *pdev)
  2216. {
  2217. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2218. dev_set_drvdata(&pdev->dev, NULL);
  2219. return 0;
  2220. }
  2221. #ifdef CONFIG_PM_SLEEP
  2222. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2223. SET_SYSTEM_SLEEP_PM_OPS(
  2224. rouleur_suspend,
  2225. rouleur_resume
  2226. )
  2227. };
  2228. #endif
  2229. static struct platform_driver rouleur_codec_driver = {
  2230. .probe = rouleur_probe,
  2231. .remove = rouleur_remove,
  2232. .driver = {
  2233. .name = "rouleur_codec",
  2234. .owner = THIS_MODULE,
  2235. .of_match_table = of_match_ptr(rouleur_dt_match),
  2236. #ifdef CONFIG_PM_SLEEP
  2237. .pm = &rouleur_dev_pm_ops,
  2238. #endif
  2239. .suppress_bind_attrs = true,
  2240. },
  2241. };
  2242. module_platform_driver(rouleur_codec_driver);
  2243. MODULE_DESCRIPTION("Rouleur Codec driver");
  2244. MODULE_LICENSE("GPL v2");