internal.h 4.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /* Copyright (c) 2020, The Linux Foundation. All rights reserved.
  3. */
  4. #ifndef _ROULEUR_INTERNAL_H
  5. #define _ROULEUR_INTERNAL_H
  6. #include <asoc/wcd-clsh.h>
  7. #include <asoc/wcd-mbhc-v2.h>
  8. #include <asoc/wcd-irq.h>
  9. #include "rouleur-mbhc.h"
  10. #define ROULEUR_MAX_MICBIAS 3
  11. /* Convert from vout ctl to micbias voltage in mV */
  12. #define WCD_VOUT_CTL_TO_MICB(v) (1600 + v * 50)
  13. #define MAX_PORT 8
  14. #define MAX_CH_PER_PORT 8
  15. extern struct regmap_config rouleur_regmap_config;
  16. struct codec_port_info {
  17. u32 slave_port_type;
  18. u32 master_port_type;
  19. u32 ch_mask;
  20. u32 num_ch;
  21. u32 ch_rate;
  22. };
  23. struct rouleur_priv {
  24. struct device *dev;
  25. int variant;
  26. struct snd_soc_component *component;
  27. struct device_node *spmi_np;
  28. struct regmap *regmap;
  29. struct swr_device *rx_swr_dev;
  30. struct swr_device *tx_swr_dev;
  31. s32 micb_ref[ROULEUR_MAX_MICBIAS];
  32. s32 pullup_ref[ROULEUR_MAX_MICBIAS];
  33. struct fw_info *fw_data;
  34. struct mutex micb_lock;
  35. s32 dmic_0_1_clk_cnt;
  36. /* mbhc module */
  37. struct rouleur_mbhc *mbhc;
  38. bool comp1_enable;
  39. bool comp2_enable;
  40. struct irq_domain *virq;
  41. struct wcd_irq_info irq_info;
  42. u32 rx_clk_cnt;
  43. int num_irq_regs;
  44. /* to track the status */
  45. unsigned long status_mask;
  46. u8 num_tx_ports;
  47. u8 num_rx_ports;
  48. struct codec_port_info
  49. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  50. struct codec_port_info
  51. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  52. struct regulator_bulk_data *supplies;
  53. struct notifier_block nblock;
  54. /* wcd callback to bolero */
  55. void *handle;
  56. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  57. int (*register_notifier)(void *handle,
  58. struct notifier_block *nblock,
  59. bool enable);
  60. int (*wakeup)(void *handle, bool enable);
  61. u32 version;
  62. /* Entry for version info */
  63. struct snd_info_entry *entry;
  64. struct snd_info_entry *version_entry;
  65. struct device *spmi_dev;
  66. int reset_reg;
  67. int mbias_cnt;
  68. struct mutex rx_clk_lock;
  69. struct mutex main_bias_lock;
  70. bool dev_up;
  71. };
  72. struct rouleur_micbias_setting {
  73. u32 micb1_mv;
  74. u32 micb2_mv;
  75. u32 micb3_mv;
  76. };
  77. struct rouleur_pdata {
  78. struct device_node *spmi_np;
  79. struct device_node *rx_slave;
  80. struct device_node *tx_slave;
  81. struct rouleur_micbias_setting micbias;
  82. struct cdc_regulator *regulator;
  83. int num_supplies;
  84. int reset_reg;
  85. };
  86. struct wcd_ctrl_platform_data {
  87. void *handle;
  88. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  89. int (*register_notifier)(void *handle,
  90. struct notifier_block *nblock,
  91. bool enable);
  92. };
  93. enum {
  94. WCD_RX1,
  95. WCD_RX2,
  96. WCD_RX3
  97. };
  98. enum {
  99. BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR = 1,
  100. BOLERO_WCD_EVT_PA_OFF_PRE_SSR,
  101. BOLERO_WCD_EVT_SSR_DOWN,
  102. BOLERO_WCD_EVT_SSR_UP,
  103. };
  104. enum {
  105. WCD_BOLERO_EVT_RX_MUTE = 1, /* for RX mute/unmute */
  106. WCD_BOLERO_EVT_IMPED_TRUE, /* for imped true */
  107. WCD_BOLERO_EVT_IMPED_FALSE, /* for imped false */
  108. WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST,
  109. WCD_BOLERO_EVT_BCS_CLK_OFF,
  110. };
  111. enum {
  112. /* INTR_CTRL_INT_MASK_0 */
  113. ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET = 0,
  114. ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET,
  115. ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET,
  116. ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  117. ROULEUR_IRQ_MBHC_SW_DET,
  118. ROULEUR_IRQ_HPHR_OCP_INT,
  119. ROULEUR_IRQ_HPHR_CNP_INT,
  120. ROULEUR_IRQ_HPHL_OCP_INT,
  121. /* INTR_CTRL_INT_MASK_1 */
  122. ROULEUR_IRQ_HPHL_CNP_INT,
  123. ROULEUR_IRQ_EAR_CNP_INT,
  124. ROULEUR_IRQ_EAR_OCP_INT,
  125. ROULEUR_IRQ_LO_CNP_INT,
  126. ROULEUR_IRQ_LO_OCP_INT,
  127. ROULEUR_IRQ_HPHL_PDM_WD_INT,
  128. ROULEUR_IRQ_HPHR_PDM_WD_INT,
  129. ROULEUR_IRQ_RESERVED_0,
  130. /* INTR_CTRL_INT_MASK_2 */
  131. ROULEUR_IRQ_RESERVED_1,
  132. ROULEUR_IRQ_RESERVED_2,
  133. ROULEUR_IRQ_HPHL_SURGE_DET_INT,
  134. ROULEUR_IRQ_HPHR_SURGE_DET_INT,
  135. ROULEUR_NUM_IRQS,
  136. };
  137. extern void rouleur_disable_bcs_before_slow_insert(
  138. struct snd_soc_component *component,
  139. bool bcs_disable);
  140. extern struct rouleur_mbhc *rouleur_soc_get_mbhc(
  141. struct snd_soc_component *component);
  142. extern int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  143. int volt, int micb_num);
  144. extern int rouleur_get_micb_vout_ctl_val(u32 micb_mv);
  145. extern int rouleur_micbias_control(struct snd_soc_component *component,
  146. int micb_num, int req, bool is_dapm);
  147. extern int rouleur_global_mbias_enable(struct snd_soc_component *component);
  148. extern int rouleur_global_mbias_disable(struct snd_soc_component *component);
  149. #endif