kona.c 153 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <sound/core.h>
  16. #include <sound/soc.h>
  17. #include <sound/soc-dapm.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/info.h>
  21. #include <soc/snd_event.h>
  22. #include <dsp/audio_notifier.h>
  23. #include <dsp/q6afe-v2.h>
  24. #include <dsp/q6core.h>
  25. #include "device_event.h"
  26. #include "msm-pcm-routing-v2.h"
  27. #include "asoc/msm-cdc-pinctrl.h"
  28. #include "asoc/wcd-mbhc-v2.h"
  29. #include "codecs/wsa881x.h"
  30. #include "codecs/bolero/bolero-cdc.h"
  31. #include <dt-bindings/sound/audio-codec-port-types.h>
  32. #include "codecs/bolero/wsa-macro.h"
  33. #define DRV_NAME "kona-asoc-snd"
  34. #define __CHIPSET__ "KONA "
  35. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  36. #define SAMPLING_RATE_8KHZ 8000
  37. #define SAMPLING_RATE_11P025KHZ 11025
  38. #define SAMPLING_RATE_16KHZ 16000
  39. #define SAMPLING_RATE_22P05KHZ 22050
  40. #define SAMPLING_RATE_32KHZ 32000
  41. #define SAMPLING_RATE_44P1KHZ 44100
  42. #define SAMPLING_RATE_48KHZ 48000
  43. #define SAMPLING_RATE_88P2KHZ 88200
  44. #define SAMPLING_RATE_96KHZ 96000
  45. #define SAMPLING_RATE_176P4KHZ 176400
  46. #define SAMPLING_RATE_192KHZ 192000
  47. #define SAMPLING_RATE_352P8KHZ 352800
  48. #define SAMPLING_RATE_384KHZ 384000
  49. #define TDM_CHANNEL_MAX 8
  50. #define DEV_NAME_STR_LEN 32
  51. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  52. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  53. #define WSA8810_NAME_1 "wsa881x.20170211"
  54. #define WSA8810_NAME_2 "wsa881x.20170212"
  55. enum {
  56. TDM_0 = 0,
  57. TDM_1,
  58. TDM_2,
  59. TDM_3,
  60. TDM_4,
  61. TDM_5,
  62. TDM_6,
  63. TDM_7,
  64. TDM_PORT_MAX,
  65. };
  66. enum {
  67. TDM_PRI = 0,
  68. TDM_SEC,
  69. TDM_TERT,
  70. TDM_INTERFACE_MAX,
  71. };
  72. enum {
  73. PRIM_AUX_PCM = 0,
  74. SEC_AUX_PCM,
  75. TERT_AUX_PCM,
  76. AUX_PCM_MAX,
  77. };
  78. enum {
  79. PRIM_MI2S = 0,
  80. SEC_MI2S,
  81. TERT_MI2S,
  82. MI2S_MAX,
  83. };
  84. enum {
  85. WSA_CDC_DMA_RX_0 = 0,
  86. WSA_CDC_DMA_RX_1,
  87. RX_CDC_DMA_RX_0,
  88. RX_CDC_DMA_RX_1,
  89. RX_CDC_DMA_RX_2,
  90. RX_CDC_DMA_RX_3,
  91. RX_CDC_DMA_RX_5,
  92. CDC_DMA_RX_MAX,
  93. };
  94. enum {
  95. WSA_CDC_DMA_TX_0 = 0,
  96. WSA_CDC_DMA_TX_1,
  97. WSA_CDC_DMA_TX_2,
  98. TX_CDC_DMA_TX_0,
  99. TX_CDC_DMA_TX_3,
  100. TX_CDC_DMA_TX_4,
  101. CDC_DMA_TX_MAX,
  102. };
  103. struct msm_asoc_mach_data {
  104. struct snd_info_entry *codec_root;
  105. int usbc_en2_gpio; /* used by gpio driver API */
  106. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  107. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  108. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  109. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  110. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  111. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  112. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  113. bool is_afe_config_done;
  114. };
  115. struct tdm_port {
  116. u32 mode;
  117. u32 channel;
  118. };
  119. struct msm_wsa881x_dev_info {
  120. struct device_node *of_node;
  121. u32 index;
  122. };
  123. struct aux_codec_dev_info {
  124. struct device_node *of_node;
  125. u32 index;
  126. };
  127. struct dev_config {
  128. u32 sample_rate;
  129. u32 bit_format;
  130. u32 channels;
  131. };
  132. static struct dev_config usb_rx_cfg = {
  133. .sample_rate = SAMPLING_RATE_48KHZ,
  134. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  135. .channels = 2,
  136. };
  137. static struct dev_config usb_tx_cfg = {
  138. .sample_rate = SAMPLING_RATE_48KHZ,
  139. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  140. .channels = 1,
  141. };
  142. static struct dev_config proxy_rx_cfg = {
  143. .sample_rate = SAMPLING_RATE_48KHZ,
  144. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  145. .channels = 2,
  146. };
  147. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  148. {
  149. AFE_API_VERSION_I2S_CONFIG,
  150. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  151. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  152. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  153. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  154. 0,
  155. },
  156. {
  157. AFE_API_VERSION_I2S_CONFIG,
  158. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  159. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  160. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  161. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  162. 0,
  163. },
  164. {
  165. AFE_API_VERSION_I2S_CONFIG,
  166. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  167. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  168. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  169. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  170. 0,
  171. },
  172. };
  173. struct mi2s_conf {
  174. struct mutex lock;
  175. u32 ref_cnt;
  176. u32 msm_is_mi2s_master;
  177. };
  178. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  179. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  180. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  181. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  182. };
  183. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  184. /* Default configuration of TDM channels */
  185. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  186. { /* PRI TDM */
  187. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  188. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  189. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  190. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  191. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  192. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  193. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  194. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  195. },
  196. { /* SEC TDM */
  197. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  198. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  199. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  200. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  201. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  205. },
  206. { /* TERT TDM */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  210. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  211. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  215. },
  216. };
  217. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  218. { /* PRI TDM */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  227. },
  228. { /* SEC TDM */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  237. },
  238. { /* TERT TDM */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  247. },
  248. };
  249. /* Default configuration of AUX PCM channels */
  250. static struct dev_config aux_pcm_rx_cfg[] = {
  251. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  252. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  253. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  254. };
  255. static struct dev_config aux_pcm_tx_cfg[] = {
  256. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  257. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  258. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  259. };
  260. /* Default configuration of MI2S channels */
  261. static struct dev_config mi2s_rx_cfg[] = {
  262. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  263. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  264. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  265. };
  266. static struct dev_config mi2s_tx_cfg[] = {
  267. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  268. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  269. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  270. };
  271. /* Default configuration of Codec DMA Interface RX */
  272. static struct dev_config cdc_dma_rx_cfg[] = {
  273. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  274. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  275. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  276. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  277. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  278. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  279. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  280. };
  281. /* Default configuration of Codec DMA Interface TX */
  282. static struct dev_config cdc_dma_tx_cfg[] = {
  283. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  284. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  285. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  286. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  287. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  288. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  289. };
  290. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  291. "S32_LE"};
  292. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  293. "Six", "Seven", "Eight"};
  294. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  295. "KHZ_16", "KHZ_22P05",
  296. "KHZ_32", "KHZ_44P1", "KHZ_48",
  297. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  298. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  299. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  300. "Five", "Six", "Seven",
  301. "Eight"};
  302. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  303. "KHZ_48", "KHZ_176P4",
  304. "KHZ_352P8"};
  305. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  306. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  307. "Five", "Six", "Seven", "Eight"};
  308. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  309. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  310. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  311. "KHZ_48", "KHZ_96", "KHZ_192"};
  312. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  313. "Five", "Six", "Seven",
  314. "Eight"};
  315. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  316. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  317. "Five", "Six", "Seven",
  318. "Eight"};
  319. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  320. "KHZ_16", "KHZ_22P05",
  321. "KHZ_32", "KHZ_44P1", "KHZ_48",
  322. "KHZ_88P2", "KHZ_96",
  323. "KHZ_176P4", "KHZ_192",
  324. "KHZ_352P8", "KHZ_384"};
  325. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  326. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  327. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  328. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  329. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  330. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  331. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  332. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  333. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  334. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  335. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  336. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  337. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  338. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  339. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  340. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  341. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  342. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  343. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  344. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  345. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  346. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  347. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  348. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  349. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  350. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  351. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  352. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  353. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  354. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  355. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  356. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  357. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  358. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  359. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  360. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  361. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  362. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  363. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  364. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  365. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  366. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  367. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  368. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  369. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  370. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  371. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  372. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  373. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  374. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  375. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  376. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  377. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  378. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  379. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  380. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  381. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  382. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  386. cdc_dma_sample_rate_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  388. cdc_dma_sample_rate_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  390. cdc_dma_sample_rate_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  392. cdc_dma_sample_rate_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  394. cdc_dma_sample_rate_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  396. cdc_dma_sample_rate_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  398. cdc_dma_sample_rate_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  400. cdc_dma_sample_rate_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  402. cdc_dma_sample_rate_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  404. cdc_dma_sample_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  406. cdc_dma_sample_rate_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  408. cdc_dma_sample_rate_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  410. cdc_dma_sample_rate_text);
  411. static bool is_initial_boot;
  412. static bool codec_reg_done;
  413. static struct snd_soc_aux_dev *msm_aux_dev;
  414. static struct snd_soc_codec_conf *msm_codec_conf;
  415. static struct snd_soc_card snd_soc_card_kona_msm;
  416. static int dmic_0_1_gpio_cnt;
  417. static int dmic_2_3_gpio_cnt;
  418. static int dmic_4_5_gpio_cnt;
  419. static int msm_vi_feed_tx_ch = 2;
  420. /*
  421. * Need to report LINEIN
  422. * if R/L channel impedance is larger than 5K ohm
  423. */
  424. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  425. .read_fw_bin = false,
  426. .calibration = NULL,
  427. .detect_extn_cable = true,
  428. .mono_stero_detection = false,
  429. .swap_gnd_mic = NULL,
  430. .hs_ext_micbias = true,
  431. .key_code[0] = KEY_MEDIA,
  432. .key_code[1] = KEY_VOICECOMMAND,
  433. .key_code[2] = KEY_VOLUMEUP,
  434. .key_code[3] = KEY_VOLUMEDOWN,
  435. .key_code[4] = 0,
  436. .key_code[5] = 0,
  437. .key_code[6] = 0,
  438. .key_code[7] = 0,
  439. .linein_th = 5000,
  440. .moisture_en = true,
  441. .mbhc_micbias = MIC_BIAS_2,
  442. .anc_micbias = MIC_BIAS_2,
  443. .enable_anc_mic_detect = false,
  444. };
  445. static inline int param_is_mask(int p)
  446. {
  447. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  448. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  449. }
  450. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  451. int n)
  452. {
  453. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  454. }
  455. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  456. unsigned int bit)
  457. {
  458. if (bit >= SNDRV_MASK_MAX)
  459. return;
  460. if (param_is_mask(n)) {
  461. struct snd_mask *m = param_to_mask(p, n);
  462. m->bits[0] = 0;
  463. m->bits[1] = 0;
  464. m->bits[bit >> 5] |= (1 << (bit & 31));
  465. }
  466. }
  467. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  468. struct snd_ctl_elem_value *ucontrol)
  469. {
  470. int sample_rate_val = 0;
  471. switch (usb_rx_cfg.sample_rate) {
  472. case SAMPLING_RATE_384KHZ:
  473. sample_rate_val = 12;
  474. break;
  475. case SAMPLING_RATE_352P8KHZ:
  476. sample_rate_val = 11;
  477. break;
  478. case SAMPLING_RATE_192KHZ:
  479. sample_rate_val = 10;
  480. break;
  481. case SAMPLING_RATE_176P4KHZ:
  482. sample_rate_val = 9;
  483. break;
  484. case SAMPLING_RATE_96KHZ:
  485. sample_rate_val = 8;
  486. break;
  487. case SAMPLING_RATE_88P2KHZ:
  488. sample_rate_val = 7;
  489. break;
  490. case SAMPLING_RATE_48KHZ:
  491. sample_rate_val = 6;
  492. break;
  493. case SAMPLING_RATE_44P1KHZ:
  494. sample_rate_val = 5;
  495. break;
  496. case SAMPLING_RATE_32KHZ:
  497. sample_rate_val = 4;
  498. break;
  499. case SAMPLING_RATE_22P05KHZ:
  500. sample_rate_val = 3;
  501. break;
  502. case SAMPLING_RATE_16KHZ:
  503. sample_rate_val = 2;
  504. break;
  505. case SAMPLING_RATE_11P025KHZ:
  506. sample_rate_val = 1;
  507. break;
  508. case SAMPLING_RATE_8KHZ:
  509. default:
  510. sample_rate_val = 0;
  511. break;
  512. }
  513. ucontrol->value.integer.value[0] = sample_rate_val;
  514. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  515. usb_rx_cfg.sample_rate);
  516. return 0;
  517. }
  518. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  519. struct snd_ctl_elem_value *ucontrol)
  520. {
  521. switch (ucontrol->value.integer.value[0]) {
  522. case 12:
  523. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  524. break;
  525. case 11:
  526. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  527. break;
  528. case 10:
  529. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  530. break;
  531. case 9:
  532. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  533. break;
  534. case 8:
  535. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  536. break;
  537. case 7:
  538. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  539. break;
  540. case 6:
  541. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  542. break;
  543. case 5:
  544. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  545. break;
  546. case 4:
  547. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  548. break;
  549. case 3:
  550. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  551. break;
  552. case 2:
  553. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  554. break;
  555. case 1:
  556. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  557. break;
  558. case 0:
  559. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  560. break;
  561. default:
  562. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  563. break;
  564. }
  565. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  566. __func__, ucontrol->value.integer.value[0],
  567. usb_rx_cfg.sample_rate);
  568. return 0;
  569. }
  570. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  571. struct snd_ctl_elem_value *ucontrol)
  572. {
  573. int sample_rate_val = 0;
  574. switch (usb_tx_cfg.sample_rate) {
  575. case SAMPLING_RATE_384KHZ:
  576. sample_rate_val = 12;
  577. break;
  578. case SAMPLING_RATE_352P8KHZ:
  579. sample_rate_val = 11;
  580. break;
  581. case SAMPLING_RATE_192KHZ:
  582. sample_rate_val = 10;
  583. break;
  584. case SAMPLING_RATE_176P4KHZ:
  585. sample_rate_val = 9;
  586. break;
  587. case SAMPLING_RATE_96KHZ:
  588. sample_rate_val = 8;
  589. break;
  590. case SAMPLING_RATE_88P2KHZ:
  591. sample_rate_val = 7;
  592. break;
  593. case SAMPLING_RATE_48KHZ:
  594. sample_rate_val = 6;
  595. break;
  596. case SAMPLING_RATE_44P1KHZ:
  597. sample_rate_val = 5;
  598. break;
  599. case SAMPLING_RATE_32KHZ:
  600. sample_rate_val = 4;
  601. break;
  602. case SAMPLING_RATE_22P05KHZ:
  603. sample_rate_val = 3;
  604. break;
  605. case SAMPLING_RATE_16KHZ:
  606. sample_rate_val = 2;
  607. break;
  608. case SAMPLING_RATE_11P025KHZ:
  609. sample_rate_val = 1;
  610. break;
  611. case SAMPLING_RATE_8KHZ:
  612. sample_rate_val = 0;
  613. break;
  614. default:
  615. sample_rate_val = 6;
  616. break;
  617. }
  618. ucontrol->value.integer.value[0] = sample_rate_val;
  619. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  620. usb_tx_cfg.sample_rate);
  621. return 0;
  622. }
  623. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  624. struct snd_ctl_elem_value *ucontrol)
  625. {
  626. switch (ucontrol->value.integer.value[0]) {
  627. case 12:
  628. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  629. break;
  630. case 11:
  631. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  632. break;
  633. case 10:
  634. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  635. break;
  636. case 9:
  637. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  638. break;
  639. case 8:
  640. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  641. break;
  642. case 7:
  643. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  644. break;
  645. case 6:
  646. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  647. break;
  648. case 5:
  649. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  650. break;
  651. case 4:
  652. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  653. break;
  654. case 3:
  655. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  656. break;
  657. case 2:
  658. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  659. break;
  660. case 1:
  661. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  662. break;
  663. case 0:
  664. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  665. break;
  666. default:
  667. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  668. break;
  669. }
  670. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  671. __func__, ucontrol->value.integer.value[0],
  672. usb_tx_cfg.sample_rate);
  673. return 0;
  674. }
  675. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  676. struct snd_ctl_elem_value *ucontrol)
  677. {
  678. switch (usb_rx_cfg.bit_format) {
  679. case SNDRV_PCM_FORMAT_S32_LE:
  680. ucontrol->value.integer.value[0] = 3;
  681. break;
  682. case SNDRV_PCM_FORMAT_S24_3LE:
  683. ucontrol->value.integer.value[0] = 2;
  684. break;
  685. case SNDRV_PCM_FORMAT_S24_LE:
  686. ucontrol->value.integer.value[0] = 1;
  687. break;
  688. case SNDRV_PCM_FORMAT_S16_LE:
  689. default:
  690. ucontrol->value.integer.value[0] = 0;
  691. break;
  692. }
  693. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  694. __func__, usb_rx_cfg.bit_format,
  695. ucontrol->value.integer.value[0]);
  696. return 0;
  697. }
  698. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  699. struct snd_ctl_elem_value *ucontrol)
  700. {
  701. int rc = 0;
  702. switch (ucontrol->value.integer.value[0]) {
  703. case 3:
  704. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  705. break;
  706. case 2:
  707. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  708. break;
  709. case 1:
  710. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  711. break;
  712. case 0:
  713. default:
  714. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  715. break;
  716. }
  717. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  718. __func__, usb_rx_cfg.bit_format,
  719. ucontrol->value.integer.value[0]);
  720. return rc;
  721. }
  722. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  723. struct snd_ctl_elem_value *ucontrol)
  724. {
  725. switch (usb_tx_cfg.bit_format) {
  726. case SNDRV_PCM_FORMAT_S32_LE:
  727. ucontrol->value.integer.value[0] = 3;
  728. break;
  729. case SNDRV_PCM_FORMAT_S24_3LE:
  730. ucontrol->value.integer.value[0] = 2;
  731. break;
  732. case SNDRV_PCM_FORMAT_S24_LE:
  733. ucontrol->value.integer.value[0] = 1;
  734. break;
  735. case SNDRV_PCM_FORMAT_S16_LE:
  736. default:
  737. ucontrol->value.integer.value[0] = 0;
  738. break;
  739. }
  740. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  741. __func__, usb_tx_cfg.bit_format,
  742. ucontrol->value.integer.value[0]);
  743. return 0;
  744. }
  745. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  746. struct snd_ctl_elem_value *ucontrol)
  747. {
  748. int rc = 0;
  749. switch (ucontrol->value.integer.value[0]) {
  750. case 3:
  751. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  752. break;
  753. case 2:
  754. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  755. break;
  756. case 1:
  757. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  758. break;
  759. case 0:
  760. default:
  761. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  762. break;
  763. }
  764. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  765. __func__, usb_tx_cfg.bit_format,
  766. ucontrol->value.integer.value[0]);
  767. return rc;
  768. }
  769. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  770. struct snd_ctl_elem_value *ucontrol)
  771. {
  772. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  773. usb_rx_cfg.channels);
  774. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  775. return 0;
  776. }
  777. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  778. struct snd_ctl_elem_value *ucontrol)
  779. {
  780. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  781. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  782. return 1;
  783. }
  784. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  785. struct snd_ctl_elem_value *ucontrol)
  786. {
  787. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  788. usb_tx_cfg.channels);
  789. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  790. return 0;
  791. }
  792. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  793. struct snd_ctl_elem_value *ucontrol)
  794. {
  795. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  796. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  797. return 1;
  798. }
  799. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  800. struct snd_ctl_elem_value *ucontrol)
  801. {
  802. pr_debug("%s: proxy_rx channels = %d\n",
  803. __func__, proxy_rx_cfg.channels);
  804. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  805. return 0;
  806. }
  807. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_value *ucontrol)
  809. {
  810. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  811. pr_debug("%s: proxy_rx channels = %d\n",
  812. __func__, proxy_rx_cfg.channels);
  813. return 1;
  814. }
  815. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  816. struct tdm_port *port)
  817. {
  818. if (port) {
  819. if (strnstr(kcontrol->id.name, "PRI",
  820. sizeof(kcontrol->id.name))) {
  821. port->mode = TDM_PRI;
  822. } else if (strnstr(kcontrol->id.name, "SEC",
  823. sizeof(kcontrol->id.name))) {
  824. port->mode = TDM_SEC;
  825. } else if (strnstr(kcontrol->id.name, "TERT",
  826. sizeof(kcontrol->id.name))) {
  827. port->mode = TDM_TERT;
  828. } else {
  829. pr_err("%s: unsupported mode in: %s\n",
  830. __func__, kcontrol->id.name);
  831. return -EINVAL;
  832. }
  833. if (strnstr(kcontrol->id.name, "RX_0",
  834. sizeof(kcontrol->id.name)) ||
  835. strnstr(kcontrol->id.name, "TX_0",
  836. sizeof(kcontrol->id.name))) {
  837. port->channel = TDM_0;
  838. } else if (strnstr(kcontrol->id.name, "RX_1",
  839. sizeof(kcontrol->id.name)) ||
  840. strnstr(kcontrol->id.name, "TX_1",
  841. sizeof(kcontrol->id.name))) {
  842. port->channel = TDM_1;
  843. } else if (strnstr(kcontrol->id.name, "RX_2",
  844. sizeof(kcontrol->id.name)) ||
  845. strnstr(kcontrol->id.name, "TX_2",
  846. sizeof(kcontrol->id.name))) {
  847. port->channel = TDM_2;
  848. } else if (strnstr(kcontrol->id.name, "RX_3",
  849. sizeof(kcontrol->id.name)) ||
  850. strnstr(kcontrol->id.name, "TX_3",
  851. sizeof(kcontrol->id.name))) {
  852. port->channel = TDM_3;
  853. } else if (strnstr(kcontrol->id.name, "RX_4",
  854. sizeof(kcontrol->id.name)) ||
  855. strnstr(kcontrol->id.name, "TX_4",
  856. sizeof(kcontrol->id.name))) {
  857. port->channel = TDM_4;
  858. } else if (strnstr(kcontrol->id.name, "RX_5",
  859. sizeof(kcontrol->id.name)) ||
  860. strnstr(kcontrol->id.name, "TX_5",
  861. sizeof(kcontrol->id.name))) {
  862. port->channel = TDM_5;
  863. } else if (strnstr(kcontrol->id.name, "RX_6",
  864. sizeof(kcontrol->id.name)) ||
  865. strnstr(kcontrol->id.name, "TX_6",
  866. sizeof(kcontrol->id.name))) {
  867. port->channel = TDM_6;
  868. } else if (strnstr(kcontrol->id.name, "RX_7",
  869. sizeof(kcontrol->id.name)) ||
  870. strnstr(kcontrol->id.name, "TX_7",
  871. sizeof(kcontrol->id.name))) {
  872. port->channel = TDM_7;
  873. } else {
  874. pr_err("%s: unsupported channel in: %s\n",
  875. __func__, kcontrol->id.name);
  876. return -EINVAL;
  877. }
  878. } else {
  879. return -EINVAL;
  880. }
  881. return 0;
  882. }
  883. static int tdm_get_sample_rate(int value)
  884. {
  885. int sample_rate = 0;
  886. switch (value) {
  887. case 0:
  888. sample_rate = SAMPLING_RATE_8KHZ;
  889. break;
  890. case 1:
  891. sample_rate = SAMPLING_RATE_16KHZ;
  892. break;
  893. case 2:
  894. sample_rate = SAMPLING_RATE_32KHZ;
  895. break;
  896. case 3:
  897. sample_rate = SAMPLING_RATE_48KHZ;
  898. break;
  899. case 4:
  900. sample_rate = SAMPLING_RATE_176P4KHZ;
  901. break;
  902. case 5:
  903. sample_rate = SAMPLING_RATE_352P8KHZ;
  904. break;
  905. default:
  906. sample_rate = SAMPLING_RATE_48KHZ;
  907. break;
  908. }
  909. return sample_rate;
  910. }
  911. static int tdm_get_sample_rate_val(int sample_rate)
  912. {
  913. int sample_rate_val = 0;
  914. switch (sample_rate) {
  915. case SAMPLING_RATE_8KHZ:
  916. sample_rate_val = 0;
  917. break;
  918. case SAMPLING_RATE_16KHZ:
  919. sample_rate_val = 1;
  920. break;
  921. case SAMPLING_RATE_32KHZ:
  922. sample_rate_val = 2;
  923. break;
  924. case SAMPLING_RATE_48KHZ:
  925. sample_rate_val = 3;
  926. break;
  927. case SAMPLING_RATE_176P4KHZ:
  928. sample_rate_val = 4;
  929. break;
  930. case SAMPLING_RATE_352P8KHZ:
  931. sample_rate_val = 5;
  932. break;
  933. default:
  934. sample_rate_val = 3;
  935. break;
  936. }
  937. return sample_rate_val;
  938. }
  939. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  940. struct snd_ctl_elem_value *ucontrol)
  941. {
  942. struct tdm_port port;
  943. int ret = tdm_get_port_idx(kcontrol, &port);
  944. if (ret) {
  945. pr_err("%s: unsupported control: %s\n",
  946. __func__, kcontrol->id.name);
  947. } else {
  948. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  949. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  950. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  951. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  952. ucontrol->value.enumerated.item[0]);
  953. }
  954. return ret;
  955. }
  956. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  957. struct snd_ctl_elem_value *ucontrol)
  958. {
  959. struct tdm_port port;
  960. int ret = tdm_get_port_idx(kcontrol, &port);
  961. if (ret) {
  962. pr_err("%s: unsupported control: %s\n",
  963. __func__, kcontrol->id.name);
  964. } else {
  965. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  966. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  967. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  968. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  969. ucontrol->value.enumerated.item[0]);
  970. }
  971. return ret;
  972. }
  973. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  974. struct snd_ctl_elem_value *ucontrol)
  975. {
  976. struct tdm_port port;
  977. int ret = tdm_get_port_idx(kcontrol, &port);
  978. if (ret) {
  979. pr_err("%s: unsupported control: %s\n",
  980. __func__, kcontrol->id.name);
  981. } else {
  982. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  983. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  984. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  985. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  986. ucontrol->value.enumerated.item[0]);
  987. }
  988. return ret;
  989. }
  990. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  991. struct snd_ctl_elem_value *ucontrol)
  992. {
  993. struct tdm_port port;
  994. int ret = tdm_get_port_idx(kcontrol, &port);
  995. if (ret) {
  996. pr_err("%s: unsupported control: %s\n",
  997. __func__, kcontrol->id.name);
  998. } else {
  999. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1000. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1001. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1002. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1003. ucontrol->value.enumerated.item[0]);
  1004. }
  1005. return ret;
  1006. }
  1007. static int tdm_get_format(int value)
  1008. {
  1009. int format = 0;
  1010. switch (value) {
  1011. case 0:
  1012. format = SNDRV_PCM_FORMAT_S16_LE;
  1013. break;
  1014. case 1:
  1015. format = SNDRV_PCM_FORMAT_S24_LE;
  1016. break;
  1017. case 2:
  1018. format = SNDRV_PCM_FORMAT_S32_LE;
  1019. break;
  1020. default:
  1021. format = SNDRV_PCM_FORMAT_S16_LE;
  1022. break;
  1023. }
  1024. return format;
  1025. }
  1026. static int tdm_get_format_val(int format)
  1027. {
  1028. int value = 0;
  1029. switch (format) {
  1030. case SNDRV_PCM_FORMAT_S16_LE:
  1031. value = 0;
  1032. break;
  1033. case SNDRV_PCM_FORMAT_S24_LE:
  1034. value = 1;
  1035. break;
  1036. case SNDRV_PCM_FORMAT_S32_LE:
  1037. value = 2;
  1038. break;
  1039. default:
  1040. value = 0;
  1041. break;
  1042. }
  1043. return value;
  1044. }
  1045. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1046. struct snd_ctl_elem_value *ucontrol)
  1047. {
  1048. struct tdm_port port;
  1049. int ret = tdm_get_port_idx(kcontrol, &port);
  1050. if (ret) {
  1051. pr_err("%s: unsupported control: %s\n",
  1052. __func__, kcontrol->id.name);
  1053. } else {
  1054. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1055. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1056. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1057. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1058. ucontrol->value.enumerated.item[0]);
  1059. }
  1060. return ret;
  1061. }
  1062. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1063. struct snd_ctl_elem_value *ucontrol)
  1064. {
  1065. struct tdm_port port;
  1066. int ret = tdm_get_port_idx(kcontrol, &port);
  1067. if (ret) {
  1068. pr_err("%s: unsupported control: %s\n",
  1069. __func__, kcontrol->id.name);
  1070. } else {
  1071. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1072. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1073. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1074. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1075. ucontrol->value.enumerated.item[0]);
  1076. }
  1077. return ret;
  1078. }
  1079. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1080. struct snd_ctl_elem_value *ucontrol)
  1081. {
  1082. struct tdm_port port;
  1083. int ret = tdm_get_port_idx(kcontrol, &port);
  1084. if (ret) {
  1085. pr_err("%s: unsupported control: %s\n",
  1086. __func__, kcontrol->id.name);
  1087. } else {
  1088. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1089. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1090. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1091. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1092. ucontrol->value.enumerated.item[0]);
  1093. }
  1094. return ret;
  1095. }
  1096. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1097. struct snd_ctl_elem_value *ucontrol)
  1098. {
  1099. struct tdm_port port;
  1100. int ret = tdm_get_port_idx(kcontrol, &port);
  1101. if (ret) {
  1102. pr_err("%s: unsupported control: %s\n",
  1103. __func__, kcontrol->id.name);
  1104. } else {
  1105. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1106. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1107. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1108. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1109. ucontrol->value.enumerated.item[0]);
  1110. }
  1111. return ret;
  1112. }
  1113. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1114. struct snd_ctl_elem_value *ucontrol)
  1115. {
  1116. struct tdm_port port;
  1117. int ret = tdm_get_port_idx(kcontrol, &port);
  1118. if (ret) {
  1119. pr_err("%s: unsupported control: %s\n",
  1120. __func__, kcontrol->id.name);
  1121. } else {
  1122. ucontrol->value.enumerated.item[0] =
  1123. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1124. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1125. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1126. ucontrol->value.enumerated.item[0]);
  1127. }
  1128. return ret;
  1129. }
  1130. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1131. struct snd_ctl_elem_value *ucontrol)
  1132. {
  1133. struct tdm_port port;
  1134. int ret = tdm_get_port_idx(kcontrol, &port);
  1135. if (ret) {
  1136. pr_err("%s: unsupported control: %s\n",
  1137. __func__, kcontrol->id.name);
  1138. } else {
  1139. tdm_rx_cfg[port.mode][port.channel].channels =
  1140. ucontrol->value.enumerated.item[0] + 1;
  1141. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1142. tdm_rx_cfg[port.mode][port.channel].channels,
  1143. ucontrol->value.enumerated.item[0] + 1);
  1144. }
  1145. return ret;
  1146. }
  1147. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1148. struct snd_ctl_elem_value *ucontrol)
  1149. {
  1150. struct tdm_port port;
  1151. int ret = tdm_get_port_idx(kcontrol, &port);
  1152. if (ret) {
  1153. pr_err("%s: unsupported control: %s\n",
  1154. __func__, kcontrol->id.name);
  1155. } else {
  1156. ucontrol->value.enumerated.item[0] =
  1157. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1158. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1159. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1160. ucontrol->value.enumerated.item[0]);
  1161. }
  1162. return ret;
  1163. }
  1164. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1165. struct snd_ctl_elem_value *ucontrol)
  1166. {
  1167. struct tdm_port port;
  1168. int ret = tdm_get_port_idx(kcontrol, &port);
  1169. if (ret) {
  1170. pr_err("%s: unsupported control: %s\n",
  1171. __func__, kcontrol->id.name);
  1172. } else {
  1173. tdm_tx_cfg[port.mode][port.channel].channels =
  1174. ucontrol->value.enumerated.item[0] + 1;
  1175. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1176. tdm_tx_cfg[port.mode][port.channel].channels,
  1177. ucontrol->value.enumerated.item[0] + 1);
  1178. }
  1179. return ret;
  1180. }
  1181. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1182. {
  1183. int idx = 0;
  1184. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1185. sizeof("PRIM_AUX_PCM"))) {
  1186. idx = PRIM_AUX_PCM;
  1187. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1188. sizeof("SEC_AUX_PCM"))) {
  1189. idx = SEC_AUX_PCM;
  1190. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1191. sizeof("TERT_AUX_PCM"))) {
  1192. idx = TERT_AUX_PCM;
  1193. } else {
  1194. pr_err("%s: unsupported port: %s\n",
  1195. __func__, kcontrol->id.name);
  1196. idx = -EINVAL;
  1197. }
  1198. return idx;
  1199. }
  1200. static int aux_pcm_get_sample_rate(int value)
  1201. {
  1202. int sample_rate = 0;
  1203. switch (value) {
  1204. case 1:
  1205. sample_rate = SAMPLING_RATE_16KHZ;
  1206. break;
  1207. case 0:
  1208. default:
  1209. sample_rate = SAMPLING_RATE_8KHZ;
  1210. break;
  1211. }
  1212. return sample_rate;
  1213. }
  1214. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1215. {
  1216. int sample_rate_val = 0;
  1217. switch (sample_rate) {
  1218. case SAMPLING_RATE_16KHZ:
  1219. sample_rate_val = 1;
  1220. break;
  1221. case SAMPLING_RATE_8KHZ:
  1222. default:
  1223. sample_rate_val = 0;
  1224. break;
  1225. }
  1226. return sample_rate_val;
  1227. }
  1228. static int mi2s_auxpcm_get_format(int value)
  1229. {
  1230. int format = 0;
  1231. switch (value) {
  1232. case 0:
  1233. format = SNDRV_PCM_FORMAT_S16_LE;
  1234. break;
  1235. case 1:
  1236. format = SNDRV_PCM_FORMAT_S24_LE;
  1237. break;
  1238. case 2:
  1239. format = SNDRV_PCM_FORMAT_S24_3LE;
  1240. break;
  1241. case 3:
  1242. format = SNDRV_PCM_FORMAT_S32_LE;
  1243. break;
  1244. default:
  1245. format = SNDRV_PCM_FORMAT_S16_LE;
  1246. break;
  1247. }
  1248. return format;
  1249. }
  1250. static int mi2s_auxpcm_get_format_value(int format)
  1251. {
  1252. int value = 0;
  1253. switch (format) {
  1254. case SNDRV_PCM_FORMAT_S16_LE:
  1255. value = 0;
  1256. break;
  1257. case SNDRV_PCM_FORMAT_S24_LE:
  1258. value = 1;
  1259. break;
  1260. case SNDRV_PCM_FORMAT_S24_3LE:
  1261. value = 2;
  1262. break;
  1263. case SNDRV_PCM_FORMAT_S32_LE:
  1264. value = 3;
  1265. break;
  1266. default:
  1267. value = 0;
  1268. break;
  1269. }
  1270. return value;
  1271. }
  1272. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1273. struct snd_ctl_elem_value *ucontrol)
  1274. {
  1275. int idx = aux_pcm_get_port_idx(kcontrol);
  1276. if (idx < 0)
  1277. return idx;
  1278. ucontrol->value.enumerated.item[0] =
  1279. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1280. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1281. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1282. ucontrol->value.enumerated.item[0]);
  1283. return 0;
  1284. }
  1285. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1286. struct snd_ctl_elem_value *ucontrol)
  1287. {
  1288. int idx = aux_pcm_get_port_idx(kcontrol);
  1289. if (idx < 0)
  1290. return idx;
  1291. aux_pcm_rx_cfg[idx].sample_rate =
  1292. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1293. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1294. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1295. ucontrol->value.enumerated.item[0]);
  1296. return 0;
  1297. }
  1298. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1299. struct snd_ctl_elem_value *ucontrol)
  1300. {
  1301. int idx = aux_pcm_get_port_idx(kcontrol);
  1302. if (idx < 0)
  1303. return idx;
  1304. ucontrol->value.enumerated.item[0] =
  1305. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1306. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1307. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1308. ucontrol->value.enumerated.item[0]);
  1309. return 0;
  1310. }
  1311. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1312. struct snd_ctl_elem_value *ucontrol)
  1313. {
  1314. int idx = aux_pcm_get_port_idx(kcontrol);
  1315. if (idx < 0)
  1316. return idx;
  1317. aux_pcm_tx_cfg[idx].sample_rate =
  1318. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1319. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1320. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1321. ucontrol->value.enumerated.item[0]);
  1322. return 0;
  1323. }
  1324. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1325. struct snd_ctl_elem_value *ucontrol)
  1326. {
  1327. int idx = aux_pcm_get_port_idx(kcontrol);
  1328. if (idx < 0)
  1329. return idx;
  1330. ucontrol->value.enumerated.item[0] =
  1331. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1332. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1333. idx, aux_pcm_rx_cfg[idx].bit_format,
  1334. ucontrol->value.enumerated.item[0]);
  1335. return 0;
  1336. }
  1337. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1338. struct snd_ctl_elem_value *ucontrol)
  1339. {
  1340. int idx = aux_pcm_get_port_idx(kcontrol);
  1341. if (idx < 0)
  1342. return idx;
  1343. aux_pcm_rx_cfg[idx].bit_format =
  1344. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1345. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1346. idx, aux_pcm_rx_cfg[idx].bit_format,
  1347. ucontrol->value.enumerated.item[0]);
  1348. return 0;
  1349. }
  1350. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1351. struct snd_ctl_elem_value *ucontrol)
  1352. {
  1353. int idx = aux_pcm_get_port_idx(kcontrol);
  1354. if (idx < 0)
  1355. return idx;
  1356. ucontrol->value.enumerated.item[0] =
  1357. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1358. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1359. idx, aux_pcm_tx_cfg[idx].bit_format,
  1360. ucontrol->value.enumerated.item[0]);
  1361. return 0;
  1362. }
  1363. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1364. struct snd_ctl_elem_value *ucontrol)
  1365. {
  1366. int idx = aux_pcm_get_port_idx(kcontrol);
  1367. if (idx < 0)
  1368. return idx;
  1369. aux_pcm_tx_cfg[idx].bit_format =
  1370. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1371. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1372. idx, aux_pcm_tx_cfg[idx].bit_format,
  1373. ucontrol->value.enumerated.item[0]);
  1374. return 0;
  1375. }
  1376. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1377. {
  1378. int idx = 0;
  1379. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1380. sizeof("PRIM_MI2S_RX"))) {
  1381. idx = PRIM_MI2S;
  1382. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1383. sizeof("SEC_MI2S_RX"))) {
  1384. idx = SEC_MI2S;
  1385. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1386. sizeof("TERT_MI2S_RX"))) {
  1387. idx = TERT_MI2S;
  1388. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1389. sizeof("PRIM_MI2S_TX"))) {
  1390. idx = PRIM_MI2S;
  1391. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1392. sizeof("SEC_MI2S_TX"))) {
  1393. idx = SEC_MI2S;
  1394. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1395. sizeof("TERT_MI2S_TX"))) {
  1396. idx = TERT_MI2S;
  1397. } else {
  1398. pr_err("%s: unsupported channel: %s\n",
  1399. __func__, kcontrol->id.name);
  1400. idx = -EINVAL;
  1401. }
  1402. return idx;
  1403. }
  1404. static int mi2s_get_sample_rate(int value)
  1405. {
  1406. int sample_rate = 0;
  1407. switch (value) {
  1408. case 0:
  1409. sample_rate = SAMPLING_RATE_8KHZ;
  1410. break;
  1411. case 1:
  1412. sample_rate = SAMPLING_RATE_11P025KHZ;
  1413. break;
  1414. case 2:
  1415. sample_rate = SAMPLING_RATE_16KHZ;
  1416. break;
  1417. case 3:
  1418. sample_rate = SAMPLING_RATE_22P05KHZ;
  1419. break;
  1420. case 4:
  1421. sample_rate = SAMPLING_RATE_32KHZ;
  1422. break;
  1423. case 5:
  1424. sample_rate = SAMPLING_RATE_44P1KHZ;
  1425. break;
  1426. case 6:
  1427. sample_rate = SAMPLING_RATE_48KHZ;
  1428. break;
  1429. case 7:
  1430. sample_rate = SAMPLING_RATE_96KHZ;
  1431. break;
  1432. case 8:
  1433. sample_rate = SAMPLING_RATE_192KHZ;
  1434. break;
  1435. default:
  1436. sample_rate = SAMPLING_RATE_48KHZ;
  1437. break;
  1438. }
  1439. return sample_rate;
  1440. }
  1441. static int mi2s_get_sample_rate_val(int sample_rate)
  1442. {
  1443. int sample_rate_val = 0;
  1444. switch (sample_rate) {
  1445. case SAMPLING_RATE_8KHZ:
  1446. sample_rate_val = 0;
  1447. break;
  1448. case SAMPLING_RATE_11P025KHZ:
  1449. sample_rate_val = 1;
  1450. break;
  1451. case SAMPLING_RATE_16KHZ:
  1452. sample_rate_val = 2;
  1453. break;
  1454. case SAMPLING_RATE_22P05KHZ:
  1455. sample_rate_val = 3;
  1456. break;
  1457. case SAMPLING_RATE_32KHZ:
  1458. sample_rate_val = 4;
  1459. break;
  1460. case SAMPLING_RATE_44P1KHZ:
  1461. sample_rate_val = 5;
  1462. break;
  1463. case SAMPLING_RATE_48KHZ:
  1464. sample_rate_val = 6;
  1465. break;
  1466. case SAMPLING_RATE_96KHZ:
  1467. sample_rate_val = 7;
  1468. break;
  1469. case SAMPLING_RATE_192KHZ:
  1470. sample_rate_val = 8;
  1471. break;
  1472. default:
  1473. sample_rate_val = 6;
  1474. break;
  1475. }
  1476. return sample_rate_val;
  1477. }
  1478. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1479. struct snd_ctl_elem_value *ucontrol)
  1480. {
  1481. int idx = mi2s_get_port_idx(kcontrol);
  1482. if (idx < 0)
  1483. return idx;
  1484. ucontrol->value.enumerated.item[0] =
  1485. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1486. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1487. idx, mi2s_rx_cfg[idx].sample_rate,
  1488. ucontrol->value.enumerated.item[0]);
  1489. return 0;
  1490. }
  1491. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1492. struct snd_ctl_elem_value *ucontrol)
  1493. {
  1494. int idx = mi2s_get_port_idx(kcontrol);
  1495. if (idx < 0)
  1496. return idx;
  1497. mi2s_rx_cfg[idx].sample_rate =
  1498. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1499. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1500. idx, mi2s_rx_cfg[idx].sample_rate,
  1501. ucontrol->value.enumerated.item[0]);
  1502. return 0;
  1503. }
  1504. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1505. struct snd_ctl_elem_value *ucontrol)
  1506. {
  1507. int idx = mi2s_get_port_idx(kcontrol);
  1508. if (idx < 0)
  1509. return idx;
  1510. ucontrol->value.enumerated.item[0] =
  1511. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1512. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1513. idx, mi2s_tx_cfg[idx].sample_rate,
  1514. ucontrol->value.enumerated.item[0]);
  1515. return 0;
  1516. }
  1517. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1518. struct snd_ctl_elem_value *ucontrol)
  1519. {
  1520. int idx = mi2s_get_port_idx(kcontrol);
  1521. if (idx < 0)
  1522. return idx;
  1523. mi2s_tx_cfg[idx].sample_rate =
  1524. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1525. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1526. idx, mi2s_tx_cfg[idx].sample_rate,
  1527. ucontrol->value.enumerated.item[0]);
  1528. return 0;
  1529. }
  1530. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1531. struct snd_ctl_elem_value *ucontrol)
  1532. {
  1533. int idx = mi2s_get_port_idx(kcontrol);
  1534. if (idx < 0)
  1535. return idx;
  1536. ucontrol->value.enumerated.item[0] =
  1537. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1538. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1539. idx, mi2s_rx_cfg[idx].bit_format,
  1540. ucontrol->value.enumerated.item[0]);
  1541. return 0;
  1542. }
  1543. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1544. struct snd_ctl_elem_value *ucontrol)
  1545. {
  1546. int idx = mi2s_get_port_idx(kcontrol);
  1547. if (idx < 0)
  1548. return idx;
  1549. mi2s_rx_cfg[idx].bit_format =
  1550. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1551. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1552. idx, mi2s_rx_cfg[idx].bit_format,
  1553. ucontrol->value.enumerated.item[0]);
  1554. return 0;
  1555. }
  1556. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1557. struct snd_ctl_elem_value *ucontrol)
  1558. {
  1559. int idx = mi2s_get_port_idx(kcontrol);
  1560. if (idx < 0)
  1561. return idx;
  1562. ucontrol->value.enumerated.item[0] =
  1563. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1564. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1565. idx, mi2s_tx_cfg[idx].bit_format,
  1566. ucontrol->value.enumerated.item[0]);
  1567. return 0;
  1568. }
  1569. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1570. struct snd_ctl_elem_value *ucontrol)
  1571. {
  1572. int idx = mi2s_get_port_idx(kcontrol);
  1573. if (idx < 0)
  1574. return idx;
  1575. mi2s_tx_cfg[idx].bit_format =
  1576. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1577. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1578. idx, mi2s_tx_cfg[idx].bit_format,
  1579. ucontrol->value.enumerated.item[0]);
  1580. return 0;
  1581. }
  1582. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1583. struct snd_ctl_elem_value *ucontrol)
  1584. {
  1585. int idx = mi2s_get_port_idx(kcontrol);
  1586. if (idx < 0)
  1587. return idx;
  1588. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1589. idx, mi2s_rx_cfg[idx].channels);
  1590. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1591. return 0;
  1592. }
  1593. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1594. struct snd_ctl_elem_value *ucontrol)
  1595. {
  1596. int idx = mi2s_get_port_idx(kcontrol);
  1597. if (idx < 0)
  1598. return idx;
  1599. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1600. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1601. idx, mi2s_rx_cfg[idx].channels);
  1602. return 1;
  1603. }
  1604. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1605. struct snd_ctl_elem_value *ucontrol)
  1606. {
  1607. int idx = mi2s_get_port_idx(kcontrol);
  1608. if (idx < 0)
  1609. return idx;
  1610. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1611. idx, mi2s_tx_cfg[idx].channels);
  1612. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1613. return 0;
  1614. }
  1615. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1616. struct snd_ctl_elem_value *ucontrol)
  1617. {
  1618. int idx = mi2s_get_port_idx(kcontrol);
  1619. if (idx < 0)
  1620. return idx;
  1621. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1622. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1623. idx, mi2s_tx_cfg[idx].channels);
  1624. return 1;
  1625. }
  1626. static int msm_get_port_id(int be_id)
  1627. {
  1628. int afe_port_id = 0;
  1629. switch (be_id) {
  1630. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1631. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1632. break;
  1633. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1634. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1635. break;
  1636. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1637. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1638. break;
  1639. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1640. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1641. break;
  1642. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1643. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1644. break;
  1645. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1646. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1647. break;
  1648. default:
  1649. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1650. afe_port_id = -EINVAL;
  1651. }
  1652. return afe_port_id;
  1653. }
  1654. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1655. {
  1656. u32 bit_per_sample = 0;
  1657. switch (bit_format) {
  1658. case SNDRV_PCM_FORMAT_S32_LE:
  1659. case SNDRV_PCM_FORMAT_S24_3LE:
  1660. case SNDRV_PCM_FORMAT_S24_LE:
  1661. bit_per_sample = 32;
  1662. break;
  1663. case SNDRV_PCM_FORMAT_S16_LE:
  1664. default:
  1665. bit_per_sample = 16;
  1666. break;
  1667. }
  1668. return bit_per_sample;
  1669. }
  1670. static void update_mi2s_clk_val(int dai_id, int stream)
  1671. {
  1672. u32 bit_per_sample = 0;
  1673. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1674. bit_per_sample =
  1675. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1676. mi2s_clk[dai_id].clk_freq_in_hz =
  1677. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1678. } else {
  1679. bit_per_sample =
  1680. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1681. mi2s_clk[dai_id].clk_freq_in_hz =
  1682. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1683. }
  1684. }
  1685. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1686. {
  1687. int ret = 0;
  1688. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1689. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1690. int port_id = 0;
  1691. int index = cpu_dai->id;
  1692. port_id = msm_get_port_id(rtd->dai_link->id);
  1693. if (port_id < 0) {
  1694. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1695. ret = port_id;
  1696. goto err;
  1697. }
  1698. if (enable) {
  1699. update_mi2s_clk_val(index, substream->stream);
  1700. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1701. mi2s_clk[index].clk_freq_in_hz);
  1702. }
  1703. mi2s_clk[index].enable = enable;
  1704. ret = afe_set_lpass_clock_v2(port_id,
  1705. &mi2s_clk[index]);
  1706. if (ret < 0) {
  1707. dev_err(rtd->card->dev,
  1708. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1709. __func__, port_id, ret);
  1710. goto err;
  1711. }
  1712. err:
  1713. return ret;
  1714. }
  1715. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1716. {
  1717. int idx = 0;
  1718. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1719. sizeof("WSA_CDC_DMA_RX_0")))
  1720. idx = WSA_CDC_DMA_RX_0;
  1721. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1722. sizeof("WSA_CDC_DMA_RX_0")))
  1723. idx = WSA_CDC_DMA_RX_1;
  1724. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1725. sizeof("RX_CDC_DMA_RX_0")))
  1726. idx = RX_CDC_DMA_RX_0;
  1727. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1728. sizeof("RX_CDC_DMA_RX_1")))
  1729. idx = RX_CDC_DMA_RX_1;
  1730. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1731. sizeof("RX_CDC_DMA_RX_2")))
  1732. idx = RX_CDC_DMA_RX_2;
  1733. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1734. sizeof("RX_CDC_DMA_RX_3")))
  1735. idx = RX_CDC_DMA_RX_3;
  1736. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1737. sizeof("RX_CDC_DMA_RX_5")))
  1738. idx = RX_CDC_DMA_RX_5;
  1739. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1740. sizeof("WSA_CDC_DMA_TX_0")))
  1741. idx = WSA_CDC_DMA_TX_0;
  1742. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1743. sizeof("WSA_CDC_DMA_TX_1")))
  1744. idx = WSA_CDC_DMA_TX_1;
  1745. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1746. sizeof("WSA_CDC_DMA_TX_2")))
  1747. idx = WSA_CDC_DMA_TX_2;
  1748. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1749. sizeof("TX_CDC_DMA_TX_0")))
  1750. idx = TX_CDC_DMA_TX_0;
  1751. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1752. sizeof("TX_CDC_DMA_TX_3")))
  1753. idx = TX_CDC_DMA_TX_3;
  1754. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1755. sizeof("TX_CDC_DMA_TX_4")))
  1756. idx = TX_CDC_DMA_TX_4;
  1757. else {
  1758. pr_err("%s: unsupported channel: %s\n",
  1759. __func__, kcontrol->id.name);
  1760. return -EINVAL;
  1761. }
  1762. return idx;
  1763. }
  1764. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1765. struct snd_ctl_elem_value *ucontrol)
  1766. {
  1767. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1768. if (ch_num < 0) {
  1769. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1770. return ch_num;
  1771. }
  1772. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1773. cdc_dma_rx_cfg[ch_num].channels - 1);
  1774. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1775. return 0;
  1776. }
  1777. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1778. struct snd_ctl_elem_value *ucontrol)
  1779. {
  1780. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1781. if (ch_num < 0) {
  1782. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1783. return ch_num;
  1784. }
  1785. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1786. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1787. cdc_dma_rx_cfg[ch_num].channels);
  1788. return 1;
  1789. }
  1790. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1791. struct snd_ctl_elem_value *ucontrol)
  1792. {
  1793. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1794. if (ch_num < 0) {
  1795. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1796. return ch_num;
  1797. }
  1798. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1799. case SNDRV_PCM_FORMAT_S32_LE:
  1800. ucontrol->value.integer.value[0] = 3;
  1801. break;
  1802. case SNDRV_PCM_FORMAT_S24_3LE:
  1803. ucontrol->value.integer.value[0] = 2;
  1804. break;
  1805. case SNDRV_PCM_FORMAT_S24_LE:
  1806. ucontrol->value.integer.value[0] = 1;
  1807. break;
  1808. case SNDRV_PCM_FORMAT_S16_LE:
  1809. default:
  1810. ucontrol->value.integer.value[0] = 0;
  1811. break;
  1812. }
  1813. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1814. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1815. ucontrol->value.integer.value[0]);
  1816. return 0;
  1817. }
  1818. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1819. struct snd_ctl_elem_value *ucontrol)
  1820. {
  1821. int rc = 0;
  1822. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1823. if (ch_num < 0) {
  1824. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1825. return ch_num;
  1826. }
  1827. switch (ucontrol->value.integer.value[0]) {
  1828. case 3:
  1829. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1830. break;
  1831. case 2:
  1832. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1833. break;
  1834. case 1:
  1835. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1836. break;
  1837. case 0:
  1838. default:
  1839. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1840. break;
  1841. }
  1842. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1843. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1844. ucontrol->value.integer.value[0]);
  1845. return rc;
  1846. }
  1847. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1848. {
  1849. int sample_rate_val = 0;
  1850. switch (sample_rate) {
  1851. case SAMPLING_RATE_8KHZ:
  1852. sample_rate_val = 0;
  1853. break;
  1854. case SAMPLING_RATE_11P025KHZ:
  1855. sample_rate_val = 1;
  1856. break;
  1857. case SAMPLING_RATE_16KHZ:
  1858. sample_rate_val = 2;
  1859. break;
  1860. case SAMPLING_RATE_22P05KHZ:
  1861. sample_rate_val = 3;
  1862. break;
  1863. case SAMPLING_RATE_32KHZ:
  1864. sample_rate_val = 4;
  1865. break;
  1866. case SAMPLING_RATE_44P1KHZ:
  1867. sample_rate_val = 5;
  1868. break;
  1869. case SAMPLING_RATE_48KHZ:
  1870. sample_rate_val = 6;
  1871. break;
  1872. case SAMPLING_RATE_88P2KHZ:
  1873. sample_rate_val = 7;
  1874. break;
  1875. case SAMPLING_RATE_96KHZ:
  1876. sample_rate_val = 8;
  1877. break;
  1878. case SAMPLING_RATE_176P4KHZ:
  1879. sample_rate_val = 9;
  1880. break;
  1881. case SAMPLING_RATE_192KHZ:
  1882. sample_rate_val = 10;
  1883. break;
  1884. case SAMPLING_RATE_352P8KHZ:
  1885. sample_rate_val = 11;
  1886. break;
  1887. case SAMPLING_RATE_384KHZ:
  1888. sample_rate_val = 12;
  1889. break;
  1890. default:
  1891. sample_rate_val = 6;
  1892. break;
  1893. }
  1894. return sample_rate_val;
  1895. }
  1896. static int cdc_dma_get_sample_rate(int value)
  1897. {
  1898. int sample_rate = 0;
  1899. switch (value) {
  1900. case 0:
  1901. sample_rate = SAMPLING_RATE_8KHZ;
  1902. break;
  1903. case 1:
  1904. sample_rate = SAMPLING_RATE_11P025KHZ;
  1905. break;
  1906. case 2:
  1907. sample_rate = SAMPLING_RATE_16KHZ;
  1908. break;
  1909. case 3:
  1910. sample_rate = SAMPLING_RATE_22P05KHZ;
  1911. break;
  1912. case 4:
  1913. sample_rate = SAMPLING_RATE_32KHZ;
  1914. break;
  1915. case 5:
  1916. sample_rate = SAMPLING_RATE_44P1KHZ;
  1917. break;
  1918. case 6:
  1919. sample_rate = SAMPLING_RATE_48KHZ;
  1920. break;
  1921. case 7:
  1922. sample_rate = SAMPLING_RATE_88P2KHZ;
  1923. break;
  1924. case 8:
  1925. sample_rate = SAMPLING_RATE_96KHZ;
  1926. break;
  1927. case 9:
  1928. sample_rate = SAMPLING_RATE_176P4KHZ;
  1929. break;
  1930. case 10:
  1931. sample_rate = SAMPLING_RATE_192KHZ;
  1932. break;
  1933. case 11:
  1934. sample_rate = SAMPLING_RATE_352P8KHZ;
  1935. break;
  1936. case 12:
  1937. sample_rate = SAMPLING_RATE_384KHZ;
  1938. break;
  1939. default:
  1940. sample_rate = SAMPLING_RATE_48KHZ;
  1941. break;
  1942. }
  1943. return sample_rate;
  1944. }
  1945. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1946. struct snd_ctl_elem_value *ucontrol)
  1947. {
  1948. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1949. if (ch_num < 0) {
  1950. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1951. return ch_num;
  1952. }
  1953. ucontrol->value.enumerated.item[0] =
  1954. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1955. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1956. cdc_dma_rx_cfg[ch_num].sample_rate);
  1957. return 0;
  1958. }
  1959. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1960. struct snd_ctl_elem_value *ucontrol)
  1961. {
  1962. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1963. if (ch_num < 0) {
  1964. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1965. return ch_num;
  1966. }
  1967. cdc_dma_rx_cfg[ch_num].sample_rate =
  1968. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1969. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1970. __func__, ucontrol->value.enumerated.item[0],
  1971. cdc_dma_rx_cfg[ch_num].sample_rate);
  1972. return 0;
  1973. }
  1974. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1975. struct snd_ctl_elem_value *ucontrol)
  1976. {
  1977. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1978. if (ch_num < 0) {
  1979. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1980. return ch_num;
  1981. }
  1982. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1983. cdc_dma_tx_cfg[ch_num].channels);
  1984. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1985. return 0;
  1986. }
  1987. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1988. struct snd_ctl_elem_value *ucontrol)
  1989. {
  1990. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1991. if (ch_num < 0) {
  1992. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1993. return ch_num;
  1994. }
  1995. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1996. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1997. cdc_dma_tx_cfg[ch_num].channels);
  1998. return 1;
  1999. }
  2000. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2001. struct snd_ctl_elem_value *ucontrol)
  2002. {
  2003. int sample_rate_val;
  2004. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2005. if (ch_num < 0) {
  2006. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2007. return ch_num;
  2008. }
  2009. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2010. case SAMPLING_RATE_384KHZ:
  2011. sample_rate_val = 12;
  2012. break;
  2013. case SAMPLING_RATE_352P8KHZ:
  2014. sample_rate_val = 11;
  2015. break;
  2016. case SAMPLING_RATE_192KHZ:
  2017. sample_rate_val = 10;
  2018. break;
  2019. case SAMPLING_RATE_176P4KHZ:
  2020. sample_rate_val = 9;
  2021. break;
  2022. case SAMPLING_RATE_96KHZ:
  2023. sample_rate_val = 8;
  2024. break;
  2025. case SAMPLING_RATE_88P2KHZ:
  2026. sample_rate_val = 7;
  2027. break;
  2028. case SAMPLING_RATE_48KHZ:
  2029. sample_rate_val = 6;
  2030. break;
  2031. case SAMPLING_RATE_44P1KHZ:
  2032. sample_rate_val = 5;
  2033. break;
  2034. case SAMPLING_RATE_32KHZ:
  2035. sample_rate_val = 4;
  2036. break;
  2037. case SAMPLING_RATE_22P05KHZ:
  2038. sample_rate_val = 3;
  2039. break;
  2040. case SAMPLING_RATE_16KHZ:
  2041. sample_rate_val = 2;
  2042. break;
  2043. case SAMPLING_RATE_11P025KHZ:
  2044. sample_rate_val = 1;
  2045. break;
  2046. case SAMPLING_RATE_8KHZ:
  2047. sample_rate_val = 0;
  2048. break;
  2049. default:
  2050. sample_rate_val = 6;
  2051. break;
  2052. }
  2053. ucontrol->value.integer.value[0] = sample_rate_val;
  2054. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2055. cdc_dma_tx_cfg[ch_num].sample_rate);
  2056. return 0;
  2057. }
  2058. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2059. struct snd_ctl_elem_value *ucontrol)
  2060. {
  2061. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2062. if (ch_num < 0) {
  2063. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2064. return ch_num;
  2065. }
  2066. switch (ucontrol->value.integer.value[0]) {
  2067. case 12:
  2068. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2069. break;
  2070. case 11:
  2071. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2072. break;
  2073. case 10:
  2074. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2075. break;
  2076. case 9:
  2077. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2078. break;
  2079. case 8:
  2080. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2081. break;
  2082. case 7:
  2083. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2084. break;
  2085. case 6:
  2086. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2087. break;
  2088. case 5:
  2089. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2090. break;
  2091. case 4:
  2092. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2093. break;
  2094. case 3:
  2095. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2096. break;
  2097. case 2:
  2098. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2099. break;
  2100. case 1:
  2101. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2102. break;
  2103. case 0:
  2104. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2105. break;
  2106. default:
  2107. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2108. break;
  2109. }
  2110. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2111. __func__, ucontrol->value.integer.value[0],
  2112. cdc_dma_tx_cfg[ch_num].sample_rate);
  2113. return 0;
  2114. }
  2115. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2116. struct snd_ctl_elem_value *ucontrol)
  2117. {
  2118. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2119. if (ch_num < 0) {
  2120. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2121. return ch_num;
  2122. }
  2123. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2124. case SNDRV_PCM_FORMAT_S32_LE:
  2125. ucontrol->value.integer.value[0] = 3;
  2126. break;
  2127. case SNDRV_PCM_FORMAT_S24_3LE:
  2128. ucontrol->value.integer.value[0] = 2;
  2129. break;
  2130. case SNDRV_PCM_FORMAT_S24_LE:
  2131. ucontrol->value.integer.value[0] = 1;
  2132. break;
  2133. case SNDRV_PCM_FORMAT_S16_LE:
  2134. default:
  2135. ucontrol->value.integer.value[0] = 0;
  2136. break;
  2137. }
  2138. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2139. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2140. ucontrol->value.integer.value[0]);
  2141. return 0;
  2142. }
  2143. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2144. struct snd_ctl_elem_value *ucontrol)
  2145. {
  2146. int rc = 0;
  2147. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2148. if (ch_num < 0) {
  2149. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2150. return ch_num;
  2151. }
  2152. switch (ucontrol->value.integer.value[0]) {
  2153. case 3:
  2154. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2155. break;
  2156. case 2:
  2157. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2158. break;
  2159. case 1:
  2160. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2161. break;
  2162. case 0:
  2163. default:
  2164. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2165. break;
  2166. }
  2167. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2168. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2169. ucontrol->value.integer.value[0]);
  2170. return rc;
  2171. }
  2172. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2173. {
  2174. int idx = 0;
  2175. switch (be_id) {
  2176. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2177. idx = WSA_CDC_DMA_RX_0;
  2178. break;
  2179. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2180. idx = WSA_CDC_DMA_TX_0;
  2181. break;
  2182. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2183. idx = WSA_CDC_DMA_RX_1;
  2184. break;
  2185. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2186. idx = WSA_CDC_DMA_TX_1;
  2187. break;
  2188. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2189. idx = WSA_CDC_DMA_TX_2;
  2190. break;
  2191. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2192. idx = RX_CDC_DMA_RX_0;
  2193. break;
  2194. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2195. idx = RX_CDC_DMA_RX_1;
  2196. break;
  2197. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2198. idx = RX_CDC_DMA_RX_2;
  2199. break;
  2200. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2201. idx = RX_CDC_DMA_RX_3;
  2202. break;
  2203. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2204. idx = RX_CDC_DMA_RX_5;
  2205. break;
  2206. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2207. idx = TX_CDC_DMA_TX_0;
  2208. break;
  2209. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2210. idx = TX_CDC_DMA_TX_3;
  2211. break;
  2212. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2213. idx = TX_CDC_DMA_TX_4;
  2214. break;
  2215. default:
  2216. idx = RX_CDC_DMA_RX_0;
  2217. break;
  2218. }
  2219. return idx;
  2220. }
  2221. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2222. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2223. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2224. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2225. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2226. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2227. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2228. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2229. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2230. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2231. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2232. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2233. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2234. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2235. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2236. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2237. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2238. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2239. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2240. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2241. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2242. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2243. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2244. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2245. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2246. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2247. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2248. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2249. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2250. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2251. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2252. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2253. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2254. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2255. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2256. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2257. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2258. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2259. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2260. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2261. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2262. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2263. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2264. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2265. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2266. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2267. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2268. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2269. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2270. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2271. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2272. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2273. wsa_cdc_dma_rx_0_sample_rate,
  2274. cdc_dma_rx_sample_rate_get,
  2275. cdc_dma_rx_sample_rate_put),
  2276. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2277. wsa_cdc_dma_rx_1_sample_rate,
  2278. cdc_dma_rx_sample_rate_get,
  2279. cdc_dma_rx_sample_rate_put),
  2280. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2281. rx_cdc_dma_rx_0_sample_rate,
  2282. cdc_dma_rx_sample_rate_get,
  2283. cdc_dma_rx_sample_rate_put),
  2284. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2285. rx_cdc_dma_rx_1_sample_rate,
  2286. cdc_dma_rx_sample_rate_get,
  2287. cdc_dma_rx_sample_rate_put),
  2288. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2289. rx_cdc_dma_rx_2_sample_rate,
  2290. cdc_dma_rx_sample_rate_get,
  2291. cdc_dma_rx_sample_rate_put),
  2292. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2293. rx_cdc_dma_rx_3_sample_rate,
  2294. cdc_dma_rx_sample_rate_get,
  2295. cdc_dma_rx_sample_rate_put),
  2296. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2297. rx_cdc_dma_rx_5_sample_rate,
  2298. cdc_dma_rx_sample_rate_get,
  2299. cdc_dma_rx_sample_rate_put),
  2300. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2301. wsa_cdc_dma_tx_0_sample_rate,
  2302. cdc_dma_tx_sample_rate_get,
  2303. cdc_dma_tx_sample_rate_put),
  2304. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2305. wsa_cdc_dma_tx_1_sample_rate,
  2306. cdc_dma_tx_sample_rate_get,
  2307. cdc_dma_tx_sample_rate_put),
  2308. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2309. wsa_cdc_dma_tx_2_sample_rate,
  2310. cdc_dma_tx_sample_rate_get,
  2311. cdc_dma_tx_sample_rate_put),
  2312. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2313. tx_cdc_dma_tx_0_sample_rate,
  2314. cdc_dma_tx_sample_rate_get,
  2315. cdc_dma_tx_sample_rate_put),
  2316. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2317. tx_cdc_dma_tx_3_sample_rate,
  2318. cdc_dma_tx_sample_rate_get,
  2319. cdc_dma_tx_sample_rate_put),
  2320. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2321. tx_cdc_dma_tx_4_sample_rate,
  2322. cdc_dma_tx_sample_rate_get,
  2323. cdc_dma_tx_sample_rate_put),
  2324. };
  2325. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2326. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2327. usb_audio_rx_sample_rate_get,
  2328. usb_audio_rx_sample_rate_put),
  2329. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2330. usb_audio_tx_sample_rate_get,
  2331. usb_audio_tx_sample_rate_put),
  2332. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2333. tdm_rx_sample_rate_get,
  2334. tdm_rx_sample_rate_put),
  2335. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2336. tdm_rx_sample_rate_get,
  2337. tdm_rx_sample_rate_put),
  2338. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2339. tdm_rx_sample_rate_get,
  2340. tdm_rx_sample_rate_put),
  2341. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2342. tdm_tx_sample_rate_get,
  2343. tdm_tx_sample_rate_put),
  2344. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2345. tdm_tx_sample_rate_get,
  2346. tdm_tx_sample_rate_put),
  2347. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2348. tdm_tx_sample_rate_get,
  2349. tdm_tx_sample_rate_put),
  2350. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2351. aux_pcm_rx_sample_rate_get,
  2352. aux_pcm_rx_sample_rate_put),
  2353. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2354. aux_pcm_rx_sample_rate_get,
  2355. aux_pcm_rx_sample_rate_put),
  2356. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2357. aux_pcm_rx_sample_rate_get,
  2358. aux_pcm_rx_sample_rate_put),
  2359. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2360. aux_pcm_tx_sample_rate_get,
  2361. aux_pcm_tx_sample_rate_put),
  2362. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2363. aux_pcm_tx_sample_rate_get,
  2364. aux_pcm_tx_sample_rate_put),
  2365. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2366. aux_pcm_tx_sample_rate_get,
  2367. aux_pcm_tx_sample_rate_put),
  2368. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2369. mi2s_rx_sample_rate_get,
  2370. mi2s_rx_sample_rate_put),
  2371. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2372. mi2s_rx_sample_rate_get,
  2373. mi2s_rx_sample_rate_put),
  2374. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2375. mi2s_rx_sample_rate_get,
  2376. mi2s_rx_sample_rate_put),
  2377. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2378. mi2s_tx_sample_rate_get,
  2379. mi2s_tx_sample_rate_put),
  2380. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2381. mi2s_tx_sample_rate_get,
  2382. mi2s_tx_sample_rate_put),
  2383. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2384. mi2s_tx_sample_rate_get,
  2385. mi2s_tx_sample_rate_put),
  2386. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2387. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2388. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2389. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2390. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2391. tdm_rx_format_get,
  2392. tdm_rx_format_put),
  2393. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2394. tdm_rx_format_get,
  2395. tdm_rx_format_put),
  2396. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2397. tdm_rx_format_get,
  2398. tdm_rx_format_put),
  2399. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2400. tdm_tx_format_get,
  2401. tdm_tx_format_put),
  2402. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2403. tdm_tx_format_get,
  2404. tdm_tx_format_put),
  2405. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2406. tdm_tx_format_get,
  2407. tdm_tx_format_put),
  2408. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2409. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2410. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2411. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2412. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2413. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2414. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2415. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2416. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2417. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2418. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2419. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2420. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2421. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2422. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2423. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2424. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2425. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2426. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2427. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2428. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2429. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2430. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2431. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2432. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2433. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2434. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2435. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2436. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2437. proxy_rx_ch_get, proxy_rx_ch_put),
  2438. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2439. tdm_rx_ch_get,
  2440. tdm_rx_ch_put),
  2441. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2442. tdm_rx_ch_get,
  2443. tdm_rx_ch_put),
  2444. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2445. tdm_rx_ch_get,
  2446. tdm_rx_ch_put),
  2447. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2448. tdm_tx_ch_get,
  2449. tdm_tx_ch_put),
  2450. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2451. tdm_tx_ch_get,
  2452. tdm_tx_ch_put),
  2453. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2454. tdm_tx_ch_get,
  2455. tdm_tx_ch_put),
  2456. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2457. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2458. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2459. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2460. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2461. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2462. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2463. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2464. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2465. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2466. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2467. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2468. };
  2469. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2470. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2471. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2472. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2473. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2474. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2475. aux_pcm_rx_sample_rate_get,
  2476. aux_pcm_rx_sample_rate_put),
  2477. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2478. aux_pcm_tx_sample_rate_get,
  2479. aux_pcm_tx_sample_rate_put),
  2480. };
  2481. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2482. struct snd_pcm_hw_params *params)
  2483. {
  2484. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2485. struct snd_interval *rate = hw_param_interval(params,
  2486. SNDRV_PCM_HW_PARAM_RATE);
  2487. struct snd_interval *channels = hw_param_interval(params,
  2488. SNDRV_PCM_HW_PARAM_CHANNELS);
  2489. int rc = 0;
  2490. pr_debug("%s: format = %d, rate = %d\n",
  2491. __func__, params_format(params), params_rate(params));
  2492. switch (dai_link->id) {
  2493. case MSM_BACKEND_DAI_USB_RX:
  2494. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2495. usb_rx_cfg.bit_format);
  2496. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2497. channels->min = channels->max = usb_rx_cfg.channels;
  2498. break;
  2499. case MSM_BACKEND_DAI_USB_TX:
  2500. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2501. usb_tx_cfg.bit_format);
  2502. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2503. channels->min = channels->max = usb_tx_cfg.channels;
  2504. break;
  2505. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2506. channels->min = channels->max = proxy_rx_cfg.channels;
  2507. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2508. break;
  2509. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2510. channels->min = channels->max =
  2511. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2512. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2513. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2514. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2515. break;
  2516. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2517. channels->min = channels->max =
  2518. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2519. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2520. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2521. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2522. break;
  2523. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2524. channels->min = channels->max =
  2525. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2526. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2527. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2528. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2529. break;
  2530. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2531. channels->min = channels->max =
  2532. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2533. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2534. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2535. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2536. break;
  2537. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2538. channels->min = channels->max =
  2539. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2540. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2541. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2542. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2543. break;
  2544. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2545. channels->min = channels->max =
  2546. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2547. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2548. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2549. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2550. break;
  2551. case MSM_BACKEND_DAI_AUXPCM_RX:
  2552. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2553. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2554. rate->min = rate->max =
  2555. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2556. channels->min = channels->max =
  2557. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2558. break;
  2559. case MSM_BACKEND_DAI_AUXPCM_TX:
  2560. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2561. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2562. rate->min = rate->max =
  2563. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2564. channels->min = channels->max =
  2565. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2566. break;
  2567. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2568. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2569. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2570. rate->min = rate->max =
  2571. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2572. channels->min = channels->max =
  2573. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2574. break;
  2575. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2576. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2577. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2578. rate->min = rate->max =
  2579. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2580. channels->min = channels->max =
  2581. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2582. break;
  2583. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2584. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2585. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2586. rate->min = rate->max =
  2587. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2588. channels->min = channels->max =
  2589. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2590. break;
  2591. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2592. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2593. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  2594. rate->min = rate->max =
  2595. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  2596. channels->min = channels->max =
  2597. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  2598. break;
  2599. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2600. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2601. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  2602. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  2603. channels->min = channels->max =
  2604. mi2s_rx_cfg[PRIM_MI2S].channels;
  2605. break;
  2606. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2607. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2608. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  2609. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  2610. channels->min = channels->max =
  2611. mi2s_tx_cfg[PRIM_MI2S].channels;
  2612. break;
  2613. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2614. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2615. mi2s_rx_cfg[SEC_MI2S].bit_format);
  2616. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  2617. channels->min = channels->max =
  2618. mi2s_rx_cfg[SEC_MI2S].channels;
  2619. break;
  2620. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2621. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2622. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2623. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  2624. channels->min = channels->max =
  2625. mi2s_tx_cfg[SEC_MI2S].channels;
  2626. break;
  2627. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2628. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2629. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2630. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2631. channels->min = channels->max =
  2632. mi2s_rx_cfg[TERT_MI2S].channels;
  2633. break;
  2634. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2635. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2636. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2637. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2638. channels->min = channels->max =
  2639. mi2s_tx_cfg[TERT_MI2S].channels;
  2640. break;
  2641. default:
  2642. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  2643. break;
  2644. }
  2645. return rc;
  2646. }
  2647. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  2648. struct snd_pcm_hw_params *params)
  2649. {
  2650. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2651. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2652. int ret = 0;
  2653. int slot_width = 32;
  2654. int channels, slots;
  2655. unsigned int slot_mask, rate, clk_freq;
  2656. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  2657. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  2658. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  2659. switch (cpu_dai->id) {
  2660. case AFE_PORT_ID_PRIMARY_TDM_RX:
  2661. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2662. break;
  2663. case AFE_PORT_ID_SECONDARY_TDM_RX:
  2664. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2665. break;
  2666. case AFE_PORT_ID_TERTIARY_TDM_RX:
  2667. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2668. break;
  2669. case AFE_PORT_ID_PRIMARY_TDM_TX:
  2670. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2671. break;
  2672. case AFE_PORT_ID_SECONDARY_TDM_TX:
  2673. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2674. break;
  2675. case AFE_PORT_ID_TERTIARY_TDM_TX:
  2676. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2677. break;
  2678. default:
  2679. pr_err("%s: dai id 0x%x not supported\n",
  2680. __func__, cpu_dai->id);
  2681. return -EINVAL;
  2682. }
  2683. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2684. /*2 slot config - bits 0 and 1 set for the first two slots */
  2685. slot_mask = 0x0000FFFF >> (16 - slots);
  2686. channels = slots;
  2687. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  2688. __func__, slot_width, slots);
  2689. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  2690. slots, slot_width);
  2691. if (ret < 0) {
  2692. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  2693. __func__, ret);
  2694. goto end;
  2695. }
  2696. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2697. 0, NULL, channels, slot_offset);
  2698. if (ret < 0) {
  2699. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  2700. __func__, ret);
  2701. goto end;
  2702. }
  2703. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  2704. /*2 slot config - bits 0 and 1 set for the first two slots */
  2705. slot_mask = 0x0000FFFF >> (16 - slots);
  2706. channels = slots;
  2707. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  2708. __func__, slot_width, slots);
  2709. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  2710. slots, slot_width);
  2711. if (ret < 0) {
  2712. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  2713. __func__, ret);
  2714. goto end;
  2715. }
  2716. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2717. channels, slot_offset, 0, NULL);
  2718. if (ret < 0) {
  2719. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  2720. __func__, ret);
  2721. goto end;
  2722. }
  2723. } else {
  2724. ret = -EINVAL;
  2725. pr_err("%s: invalid use case, err:%d\n",
  2726. __func__, ret);
  2727. goto end;
  2728. }
  2729. rate = params_rate(params);
  2730. clk_freq = rate * slot_width * slots;
  2731. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  2732. if (ret < 0)
  2733. pr_err("%s: failed to set tdm clk, err:%d\n",
  2734. __func__, ret);
  2735. end:
  2736. return ret;
  2737. }
  2738. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  2739. struct snd_pcm_hw_params *params)
  2740. {
  2741. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2742. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  2743. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2744. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2745. int ret = 0;
  2746. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  2747. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  2748. u32 user_set_tx_ch = 0;
  2749. u32 user_set_rx_ch = 0;
  2750. u32 ch_id;
  2751. ret = snd_soc_dai_get_channel_map(codec_dai,
  2752. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  2753. &rx_ch_cdc_dma);
  2754. if (ret < 0) {
  2755. pr_err("%s: failed to get codec chan map, err:%d\n",
  2756. __func__, ret);
  2757. goto err;
  2758. }
  2759. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2760. switch (dai_link->id) {
  2761. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2762. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2763. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2764. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2765. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2766. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2767. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  2768. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2769. {
  2770. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2771. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  2772. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  2773. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  2774. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  2775. user_set_rx_ch, &rx_ch_cdc_dma);
  2776. if (ret < 0) {
  2777. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2778. __func__, ret);
  2779. goto err;
  2780. }
  2781. }
  2782. break;
  2783. }
  2784. } else {
  2785. switch (dai_link->id) {
  2786. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2787. {
  2788. user_set_tx_ch = msm_vi_feed_tx_ch;
  2789. }
  2790. break;
  2791. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2792. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2793. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2794. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2795. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2796. {
  2797. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2798. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  2799. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  2800. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  2801. }
  2802. break;
  2803. }
  2804. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  2805. &tx_ch_cdc_dma, 0, 0);
  2806. if (ret < 0) {
  2807. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2808. __func__, ret);
  2809. goto err;
  2810. }
  2811. }
  2812. err:
  2813. return ret;
  2814. }
  2815. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  2816. {
  2817. cpumask_t mask;
  2818. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  2819. pm_qos_remove_request(&substream->latency_pm_qos_req);
  2820. cpumask_clear(&mask);
  2821. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  2822. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  2823. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  2824. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  2825. pm_qos_add_request(&substream->latency_pm_qos_req,
  2826. PM_QOS_CPU_DMA_LATENCY,
  2827. MSM_LL_QOS_VALUE);
  2828. return 0;
  2829. }
  2830. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  2831. {
  2832. int ret = 0;
  2833. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2834. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2835. int index = cpu_dai->id;
  2836. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  2837. dev_dbg(rtd->card->dev,
  2838. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2839. __func__, substream->name, substream->stream,
  2840. cpu_dai->name, cpu_dai->id);
  2841. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2842. ret = -EINVAL;
  2843. dev_err(rtd->card->dev,
  2844. "%s: CPU DAI id (%d) out of range\n",
  2845. __func__, cpu_dai->id);
  2846. goto err;
  2847. }
  2848. /*
  2849. * Mutex protection in case the same MI2S
  2850. * interface using for both TX and RX so
  2851. * that the same clock won't be enable twice.
  2852. */
  2853. mutex_lock(&mi2s_intf_conf[index].lock);
  2854. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  2855. /* Check if msm needs to provide the clock to the interface */
  2856. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  2857. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  2858. fmt = SND_SOC_DAIFMT_CBM_CFM;
  2859. }
  2860. ret = msm_mi2s_set_sclk(substream, true);
  2861. if (ret < 0) {
  2862. dev_err(rtd->card->dev,
  2863. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  2864. __func__, ret);
  2865. goto clean_up;
  2866. }
  2867. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  2868. if (ret < 0) {
  2869. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  2870. __func__, index, ret);
  2871. goto clk_off;
  2872. }
  2873. }
  2874. clk_off:
  2875. if (ret < 0)
  2876. msm_mi2s_set_sclk(substream, false);
  2877. clean_up:
  2878. if (ret < 0)
  2879. mi2s_intf_conf[index].ref_cnt--;
  2880. mutex_unlock(&mi2s_intf_conf[index].lock);
  2881. err:
  2882. return ret;
  2883. }
  2884. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  2885. {
  2886. int ret = 0;
  2887. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2888. int index = rtd->cpu_dai->id;
  2889. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  2890. substream->name, substream->stream);
  2891. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2892. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  2893. return;
  2894. }
  2895. mutex_lock(&mi2s_intf_conf[index].lock);
  2896. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  2897. ret = msm_mi2s_set_sclk(substream, false);
  2898. if (ret < 0)
  2899. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  2900. __func__, index, ret);
  2901. }
  2902. mutex_unlock(&mi2s_intf_conf[index].lock);
  2903. }
  2904. static struct snd_soc_ops kona_tdm_be_ops = {
  2905. .hw_params = kona_tdm_snd_hw_params,
  2906. };
  2907. static struct snd_soc_ops msm_mi2s_be_ops = {
  2908. .startup = msm_mi2s_snd_startup,
  2909. .shutdown = msm_mi2s_snd_shutdown,
  2910. };
  2911. static struct snd_soc_ops msm_fe_qos_ops = {
  2912. .prepare = msm_fe_qos_prepare,
  2913. };
  2914. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  2915. .hw_params = msm_snd_cdc_dma_hw_params,
  2916. };
  2917. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  2918. struct snd_kcontrol *kcontrol, int event)
  2919. {
  2920. struct msm_asoc_mach_data *pdata = NULL;
  2921. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  2922. int ret = 0;
  2923. u32 dmic_idx;
  2924. int *dmic_gpio_cnt;
  2925. struct device_node *dmic_gpio;
  2926. char *wname;
  2927. wname = strpbrk(w->name, "012345");
  2928. if (!wname) {
  2929. dev_err(component->dev, "%s: widget not found\n", __func__);
  2930. return -EINVAL;
  2931. }
  2932. ret = kstrtouint(wname, 10, &dmic_idx);
  2933. if (ret < 0) {
  2934. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  2935. __func__);
  2936. return -EINVAL;
  2937. }
  2938. pdata = snd_soc_card_get_drvdata(component->card);
  2939. switch (dmic_idx) {
  2940. case 0:
  2941. case 1:
  2942. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  2943. dmic_gpio = pdata->dmic01_gpio_p;
  2944. break;
  2945. case 2:
  2946. case 3:
  2947. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  2948. dmic_gpio = pdata->dmic23_gpio_p;
  2949. break;
  2950. case 4:
  2951. case 5:
  2952. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  2953. dmic_gpio = pdata->dmic45_gpio_p;
  2954. break;
  2955. default:
  2956. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  2957. __func__);
  2958. return -EINVAL;
  2959. }
  2960. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  2961. __func__, event, dmic_idx, *dmic_gpio_cnt);
  2962. switch (event) {
  2963. case SND_SOC_DAPM_PRE_PMU:
  2964. (*dmic_gpio_cnt)++;
  2965. if (*dmic_gpio_cnt == 1) {
  2966. ret = msm_cdc_pinctrl_select_active_state(
  2967. dmic_gpio);
  2968. if (ret < 0) {
  2969. pr_err("%s: gpio set cannot be activated %sd",
  2970. __func__, "dmic_gpio");
  2971. return ret;
  2972. }
  2973. }
  2974. break;
  2975. case SND_SOC_DAPM_POST_PMD:
  2976. (*dmic_gpio_cnt)--;
  2977. if (*dmic_gpio_cnt == 0) {
  2978. ret = msm_cdc_pinctrl_select_sleep_state(
  2979. dmic_gpio);
  2980. if (ret < 0) {
  2981. pr_err("%s: gpio set cannot be de-activated %sd",
  2982. __func__, "dmic_gpio");
  2983. return ret;
  2984. }
  2985. }
  2986. break;
  2987. default:
  2988. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  2989. return -EINVAL;
  2990. }
  2991. return 0;
  2992. }
  2993. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  2994. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  2995. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  2996. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  2997. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  2998. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  2999. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3000. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3001. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3002. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3003. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3004. };
  3005. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3006. {
  3007. int ret = -EINVAL;
  3008. struct snd_soc_component *component;
  3009. struct snd_soc_dapm_context *dapm;
  3010. struct snd_card *card;
  3011. struct snd_info_entry *entry;
  3012. struct snd_soc_component *aux_comp;
  3013. struct msm_asoc_mach_data *pdata =
  3014. snd_soc_card_get_drvdata(rtd->card);
  3015. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3016. if (!component) {
  3017. pr_err("%s: could not find component for bolero_codec\n",
  3018. __func__);
  3019. return ret;
  3020. }
  3021. dapm = snd_soc_component_get_dapm(component);
  3022. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3023. ARRAY_SIZE(msm_int_snd_controls));
  3024. if (ret < 0) {
  3025. pr_err("%s: add_component_controls failed: %d\n",
  3026. __func__, ret);
  3027. return ret;
  3028. }
  3029. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3030. ARRAY_SIZE(msm_common_snd_controls));
  3031. if (ret < 0) {
  3032. pr_err("%s: add common snd controls failed: %d\n",
  3033. __func__, ret);
  3034. return ret;
  3035. }
  3036. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3037. ARRAY_SIZE(msm_int_dapm_widgets));
  3038. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3039. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3040. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3041. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3042. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3043. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3044. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3045. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3046. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3047. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3048. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3049. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3050. snd_soc_dapm_sync(dapm);
  3051. /*
  3052. * Send speaker configuration only for WSA8810.
  3053. * Default configuration is for WSA8815.
  3054. */
  3055. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3056. __func__, rtd->card->num_aux_devs);
  3057. if (rtd->card->num_aux_devs &&
  3058. !list_empty(&rtd->card->component_dev_list)) {
  3059. aux_comp = list_first_entry(
  3060. &rtd->card->component_dev_list,
  3061. struct snd_soc_component,
  3062. card_aux_list);
  3063. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3064. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3065. wsa_macro_set_spkr_mode(component,
  3066. WSA_MACRO_SPKR_MODE_1);
  3067. wsa_macro_set_spkr_gain_offset(component,
  3068. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3069. }
  3070. }
  3071. card = rtd->card->snd_card;
  3072. if (!pdata->codec_root) {
  3073. entry = snd_info_create_subdir(card->module, "codecs",
  3074. card->proc_root);
  3075. if (!entry) {
  3076. pr_debug("%s: Cannot create codecs module entry\n",
  3077. __func__);
  3078. ret = 0;
  3079. goto err;
  3080. }
  3081. pdata->codec_root = entry;
  3082. }
  3083. bolero_info_create_codec_entry(pdata->codec_root, component);
  3084. codec_reg_done = true;
  3085. return 0;
  3086. err:
  3087. return ret;
  3088. }
  3089. /* Digital audio interface glue - connects codec <---> CPU */
  3090. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3091. /* FrontEnd DAI Links */
  3092. {/* hw:x,0 */
  3093. .name = MSM_DAILINK_NAME(Media1),
  3094. .stream_name = "MultiMedia1",
  3095. .cpu_dai_name = "MultiMedia1",
  3096. .platform_name = "msm-pcm-dsp.0",
  3097. .dynamic = 1,
  3098. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3099. .dpcm_playback = 1,
  3100. .dpcm_capture = 1,
  3101. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3102. SND_SOC_DPCM_TRIGGER_POST},
  3103. .codec_dai_name = "snd-soc-dummy-dai",
  3104. .codec_name = "snd-soc-dummy",
  3105. .ignore_suspend = 1,
  3106. /* this dainlink has playback support */
  3107. .ignore_pmdown_time = 1,
  3108. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3109. },
  3110. {/* hw:x,1 */
  3111. .name = MSM_DAILINK_NAME(Media2),
  3112. .stream_name = "MultiMedia2",
  3113. .cpu_dai_name = "MultiMedia2",
  3114. .platform_name = "msm-pcm-dsp.0",
  3115. .dynamic = 1,
  3116. .dpcm_playback = 1,
  3117. .dpcm_capture = 1,
  3118. .codec_dai_name = "snd-soc-dummy-dai",
  3119. .codec_name = "snd-soc-dummy",
  3120. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3121. SND_SOC_DPCM_TRIGGER_POST},
  3122. .ignore_suspend = 1,
  3123. /* this dainlink has playback support */
  3124. .ignore_pmdown_time = 1,
  3125. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3126. },
  3127. {/* hw:x,2 */
  3128. .name = "VoiceMMode1",
  3129. .stream_name = "VoiceMMode1",
  3130. .cpu_dai_name = "VoiceMMode1",
  3131. .platform_name = "msm-pcm-voice",
  3132. .dynamic = 1,
  3133. .dpcm_playback = 1,
  3134. .dpcm_capture = 1,
  3135. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3136. SND_SOC_DPCM_TRIGGER_POST},
  3137. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3138. .ignore_suspend = 1,
  3139. .ignore_pmdown_time = 1,
  3140. .codec_dai_name = "snd-soc-dummy-dai",
  3141. .codec_name = "snd-soc-dummy",
  3142. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3143. },
  3144. {/* hw:x,3 */
  3145. .name = "MSM VoIP",
  3146. .stream_name = "VoIP",
  3147. .cpu_dai_name = "VoIP",
  3148. .platform_name = "msm-voip-dsp",
  3149. .dynamic = 1,
  3150. .dpcm_playback = 1,
  3151. .dpcm_capture = 1,
  3152. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3153. SND_SOC_DPCM_TRIGGER_POST},
  3154. .codec_dai_name = "snd-soc-dummy-dai",
  3155. .codec_name = "snd-soc-dummy",
  3156. .ignore_suspend = 1,
  3157. /* this dainlink has playback support */
  3158. .ignore_pmdown_time = 1,
  3159. .id = MSM_FRONTEND_DAI_VOIP,
  3160. },
  3161. {/* hw:x,4 */
  3162. .name = MSM_DAILINK_NAME(ULL),
  3163. .stream_name = "MultiMedia3",
  3164. .cpu_dai_name = "MultiMedia3",
  3165. .platform_name = "msm-pcm-dsp.2",
  3166. .dynamic = 1,
  3167. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3168. .dpcm_playback = 1,
  3169. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3170. SND_SOC_DPCM_TRIGGER_POST},
  3171. .codec_dai_name = "snd-soc-dummy-dai",
  3172. .codec_name = "snd-soc-dummy",
  3173. .ignore_suspend = 1,
  3174. /* this dainlink has playback support */
  3175. .ignore_pmdown_time = 1,
  3176. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3177. },
  3178. /* Hostless PCM purpose */
  3179. {/* hw:x,5 */
  3180. .name = "MSM AFE-PCM RX",
  3181. .stream_name = "AFE-PROXY RX",
  3182. .cpu_dai_name = "msm-dai-q6-dev.241",
  3183. .codec_name = "msm-stub-codec.1",
  3184. .codec_dai_name = "msm-stub-rx",
  3185. .platform_name = "msm-pcm-afe",
  3186. .dpcm_playback = 1,
  3187. .ignore_suspend = 1,
  3188. /* this dainlink has playback support */
  3189. .ignore_pmdown_time = 1,
  3190. },
  3191. {/* hw:x,6 */
  3192. .name = "MSM AFE-PCM TX",
  3193. .stream_name = "AFE-PROXY TX",
  3194. .cpu_dai_name = "msm-dai-q6-dev.240",
  3195. .codec_name = "msm-stub-codec.1",
  3196. .codec_dai_name = "msm-stub-tx",
  3197. .platform_name = "msm-pcm-afe",
  3198. .dpcm_capture = 1,
  3199. .ignore_suspend = 1,
  3200. },
  3201. {/* hw:x,7 */
  3202. .name = MSM_DAILINK_NAME(Compress1),
  3203. .stream_name = "Compress1",
  3204. .cpu_dai_name = "MultiMedia4",
  3205. .platform_name = "msm-compress-dsp",
  3206. .dynamic = 1,
  3207. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3208. .dpcm_playback = 1,
  3209. .dpcm_capture = 1,
  3210. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3211. SND_SOC_DPCM_TRIGGER_POST},
  3212. .codec_dai_name = "snd-soc-dummy-dai",
  3213. .codec_name = "snd-soc-dummy",
  3214. .ignore_suspend = 1,
  3215. .ignore_pmdown_time = 1,
  3216. /* this dainlink has playback support */
  3217. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3218. },
  3219. {/* hw:x,8 */
  3220. .name = "AUXPCM Hostless",
  3221. .stream_name = "AUXPCM Hostless",
  3222. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3223. .platform_name = "msm-pcm-hostless",
  3224. .dynamic = 1,
  3225. .dpcm_playback = 1,
  3226. .dpcm_capture = 1,
  3227. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3228. SND_SOC_DPCM_TRIGGER_POST},
  3229. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3230. .ignore_suspend = 1,
  3231. /* this dainlink has playback support */
  3232. .ignore_pmdown_time = 1,
  3233. .codec_dai_name = "snd-soc-dummy-dai",
  3234. .codec_name = "snd-soc-dummy",
  3235. },
  3236. {/* hw:x,9 */
  3237. .name = MSM_DAILINK_NAME(LowLatency),
  3238. .stream_name = "MultiMedia5",
  3239. .cpu_dai_name = "MultiMedia5",
  3240. .platform_name = "msm-pcm-dsp.1",
  3241. .dynamic = 1,
  3242. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3243. .dpcm_playback = 1,
  3244. .dpcm_capture = 1,
  3245. .codec_dai_name = "snd-soc-dummy-dai",
  3246. .codec_name = "snd-soc-dummy",
  3247. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3248. SND_SOC_DPCM_TRIGGER_POST},
  3249. .ignore_suspend = 1,
  3250. /* this dainlink has playback support */
  3251. .ignore_pmdown_time = 1,
  3252. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3253. .ops = &msm_fe_qos_ops,
  3254. },
  3255. {/* hw:x,10 */
  3256. .name = "Listen 1 Audio Service",
  3257. .stream_name = "Listen 1 Audio Service",
  3258. .cpu_dai_name = "LSM1",
  3259. .platform_name = "msm-lsm-client",
  3260. .dynamic = 1,
  3261. .dpcm_capture = 1,
  3262. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3263. SND_SOC_DPCM_TRIGGER_POST },
  3264. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3265. .ignore_suspend = 1,
  3266. .codec_dai_name = "snd-soc-dummy-dai",
  3267. .codec_name = "snd-soc-dummy",
  3268. .id = MSM_FRONTEND_DAI_LSM1,
  3269. },
  3270. /* Multiple Tunnel instances */
  3271. {/* hw:x,11 */
  3272. .name = MSM_DAILINK_NAME(Compress2),
  3273. .stream_name = "Compress2",
  3274. .cpu_dai_name = "MultiMedia7",
  3275. .platform_name = "msm-compress-dsp",
  3276. .dynamic = 1,
  3277. .dpcm_playback = 1,
  3278. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3279. SND_SOC_DPCM_TRIGGER_POST},
  3280. .codec_dai_name = "snd-soc-dummy-dai",
  3281. .codec_name = "snd-soc-dummy",
  3282. .ignore_suspend = 1,
  3283. .ignore_pmdown_time = 1,
  3284. /* this dainlink has playback support */
  3285. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3286. },
  3287. {/* hw:x,12 */
  3288. .name = MSM_DAILINK_NAME(MultiMedia10),
  3289. .stream_name = "MultiMedia10",
  3290. .cpu_dai_name = "MultiMedia10",
  3291. .platform_name = "msm-pcm-dsp.1",
  3292. .dynamic = 1,
  3293. .dpcm_playback = 1,
  3294. .dpcm_capture = 1,
  3295. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3296. SND_SOC_DPCM_TRIGGER_POST},
  3297. .codec_dai_name = "snd-soc-dummy-dai",
  3298. .codec_name = "snd-soc-dummy",
  3299. .ignore_suspend = 1,
  3300. .ignore_pmdown_time = 1,
  3301. /* this dainlink has playback support */
  3302. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  3303. },
  3304. {/* hw:x,13 */
  3305. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  3306. .stream_name = "MM_NOIRQ",
  3307. .cpu_dai_name = "MultiMedia8",
  3308. .platform_name = "msm-pcm-dsp-noirq",
  3309. .dynamic = 1,
  3310. .dpcm_playback = 1,
  3311. .dpcm_capture = 1,
  3312. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3313. SND_SOC_DPCM_TRIGGER_POST},
  3314. .codec_dai_name = "snd-soc-dummy-dai",
  3315. .codec_name = "snd-soc-dummy",
  3316. .ignore_suspend = 1,
  3317. .ignore_pmdown_time = 1,
  3318. /* this dainlink has playback support */
  3319. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  3320. .ops = &msm_fe_qos_ops,
  3321. },
  3322. /* HDMI Hostless */
  3323. {/* hw:x,14 */
  3324. .name = "HDMI_RX_HOSTLESS",
  3325. .stream_name = "HDMI_RX_HOSTLESS",
  3326. .cpu_dai_name = "HDMI_HOSTLESS",
  3327. .platform_name = "msm-pcm-hostless",
  3328. .dynamic = 1,
  3329. .dpcm_playback = 1,
  3330. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3331. SND_SOC_DPCM_TRIGGER_POST},
  3332. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3333. .ignore_suspend = 1,
  3334. .ignore_pmdown_time = 1,
  3335. .codec_dai_name = "snd-soc-dummy-dai",
  3336. .codec_name = "snd-soc-dummy",
  3337. },
  3338. {/* hw:x,15 */
  3339. .name = "VoiceMMode2",
  3340. .stream_name = "VoiceMMode2",
  3341. .cpu_dai_name = "VoiceMMode2",
  3342. .platform_name = "msm-pcm-voice",
  3343. .dynamic = 1,
  3344. .dpcm_playback = 1,
  3345. .dpcm_capture = 1,
  3346. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3347. SND_SOC_DPCM_TRIGGER_POST},
  3348. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3349. .ignore_suspend = 1,
  3350. .ignore_pmdown_time = 1,
  3351. .codec_dai_name = "snd-soc-dummy-dai",
  3352. .codec_name = "snd-soc-dummy",
  3353. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  3354. },
  3355. /* LSM FE */
  3356. {/* hw:x,16 */
  3357. .name = "Listen 2 Audio Service",
  3358. .stream_name = "Listen 2 Audio Service",
  3359. .cpu_dai_name = "LSM2",
  3360. .platform_name = "msm-lsm-client",
  3361. .dynamic = 1,
  3362. .dpcm_capture = 1,
  3363. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3364. SND_SOC_DPCM_TRIGGER_POST },
  3365. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3366. .ignore_suspend = 1,
  3367. .codec_dai_name = "snd-soc-dummy-dai",
  3368. .codec_name = "snd-soc-dummy",
  3369. .id = MSM_FRONTEND_DAI_LSM2,
  3370. },
  3371. {/* hw:x,17 */
  3372. .name = "Listen 3 Audio Service",
  3373. .stream_name = "Listen 3 Audio Service",
  3374. .cpu_dai_name = "LSM3",
  3375. .platform_name = "msm-lsm-client",
  3376. .dynamic = 1,
  3377. .dpcm_capture = 1,
  3378. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3379. SND_SOC_DPCM_TRIGGER_POST },
  3380. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3381. .ignore_suspend = 1,
  3382. .codec_dai_name = "snd-soc-dummy-dai",
  3383. .codec_name = "snd-soc-dummy",
  3384. .id = MSM_FRONTEND_DAI_LSM3,
  3385. },
  3386. {/* hw:x,18 */
  3387. .name = "Listen 4 Audio Service",
  3388. .stream_name = "Listen 4 Audio Service",
  3389. .cpu_dai_name = "LSM4",
  3390. .platform_name = "msm-lsm-client",
  3391. .dynamic = 1,
  3392. .dpcm_capture = 1,
  3393. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3394. SND_SOC_DPCM_TRIGGER_POST },
  3395. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3396. .ignore_suspend = 1,
  3397. .codec_dai_name = "snd-soc-dummy-dai",
  3398. .codec_name = "snd-soc-dummy",
  3399. .id = MSM_FRONTEND_DAI_LSM4,
  3400. },
  3401. {/* hw:x,19 */
  3402. .name = "Listen 5 Audio Service",
  3403. .stream_name = "Listen 5 Audio Service",
  3404. .cpu_dai_name = "LSM5",
  3405. .platform_name = "msm-lsm-client",
  3406. .dynamic = 1,
  3407. .dpcm_capture = 1,
  3408. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3409. SND_SOC_DPCM_TRIGGER_POST },
  3410. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3411. .ignore_suspend = 1,
  3412. .codec_dai_name = "snd-soc-dummy-dai",
  3413. .codec_name = "snd-soc-dummy",
  3414. .id = MSM_FRONTEND_DAI_LSM5,
  3415. },
  3416. {/* hw:x,20 */
  3417. .name = "Listen 6 Audio Service",
  3418. .stream_name = "Listen 6 Audio Service",
  3419. .cpu_dai_name = "LSM6",
  3420. .platform_name = "msm-lsm-client",
  3421. .dynamic = 1,
  3422. .dpcm_capture = 1,
  3423. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3424. SND_SOC_DPCM_TRIGGER_POST },
  3425. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3426. .ignore_suspend = 1,
  3427. .codec_dai_name = "snd-soc-dummy-dai",
  3428. .codec_name = "snd-soc-dummy",
  3429. .id = MSM_FRONTEND_DAI_LSM6,
  3430. },
  3431. {/* hw:x,21 */
  3432. .name = "Listen 7 Audio Service",
  3433. .stream_name = "Listen 7 Audio Service",
  3434. .cpu_dai_name = "LSM7",
  3435. .platform_name = "msm-lsm-client",
  3436. .dynamic = 1,
  3437. .dpcm_capture = 1,
  3438. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3439. SND_SOC_DPCM_TRIGGER_POST },
  3440. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3441. .ignore_suspend = 1,
  3442. .codec_dai_name = "snd-soc-dummy-dai",
  3443. .codec_name = "snd-soc-dummy",
  3444. .id = MSM_FRONTEND_DAI_LSM7,
  3445. },
  3446. {/* hw:x,22 */
  3447. .name = "Listen 8 Audio Service",
  3448. .stream_name = "Listen 8 Audio Service",
  3449. .cpu_dai_name = "LSM8",
  3450. .platform_name = "msm-lsm-client",
  3451. .dynamic = 1,
  3452. .dpcm_capture = 1,
  3453. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3454. SND_SOC_DPCM_TRIGGER_POST },
  3455. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3456. .ignore_suspend = 1,
  3457. .codec_dai_name = "snd-soc-dummy-dai",
  3458. .codec_name = "snd-soc-dummy",
  3459. .id = MSM_FRONTEND_DAI_LSM8,
  3460. },
  3461. {/* hw:x,23 */
  3462. .name = MSM_DAILINK_NAME(Media9),
  3463. .stream_name = "MultiMedia9",
  3464. .cpu_dai_name = "MultiMedia9",
  3465. .platform_name = "msm-pcm-dsp.0",
  3466. .dynamic = 1,
  3467. .dpcm_playback = 1,
  3468. .dpcm_capture = 1,
  3469. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3470. SND_SOC_DPCM_TRIGGER_POST},
  3471. .codec_dai_name = "snd-soc-dummy-dai",
  3472. .codec_name = "snd-soc-dummy",
  3473. .ignore_suspend = 1,
  3474. /* this dainlink has playback support */
  3475. .ignore_pmdown_time = 1,
  3476. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  3477. },
  3478. {/* hw:x,24 */
  3479. .name = MSM_DAILINK_NAME(Compress4),
  3480. .stream_name = "Compress4",
  3481. .cpu_dai_name = "MultiMedia11",
  3482. .platform_name = "msm-compress-dsp",
  3483. .dynamic = 1,
  3484. .dpcm_playback = 1,
  3485. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3486. SND_SOC_DPCM_TRIGGER_POST},
  3487. .codec_dai_name = "snd-soc-dummy-dai",
  3488. .codec_name = "snd-soc-dummy",
  3489. .ignore_suspend = 1,
  3490. .ignore_pmdown_time = 1,
  3491. /* this dainlink has playback support */
  3492. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  3493. },
  3494. {/* hw:x,25 */
  3495. .name = MSM_DAILINK_NAME(Compress5),
  3496. .stream_name = "Compress5",
  3497. .cpu_dai_name = "MultiMedia12",
  3498. .platform_name = "msm-compress-dsp",
  3499. .dynamic = 1,
  3500. .dpcm_playback = 1,
  3501. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3502. SND_SOC_DPCM_TRIGGER_POST},
  3503. .codec_dai_name = "snd-soc-dummy-dai",
  3504. .codec_name = "snd-soc-dummy",
  3505. .ignore_suspend = 1,
  3506. .ignore_pmdown_time = 1,
  3507. /* this dainlink has playback support */
  3508. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  3509. },
  3510. {/* hw:x,26 */
  3511. .name = MSM_DAILINK_NAME(Compress6),
  3512. .stream_name = "Compress6",
  3513. .cpu_dai_name = "MultiMedia13",
  3514. .platform_name = "msm-compress-dsp",
  3515. .dynamic = 1,
  3516. .dpcm_playback = 1,
  3517. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3518. SND_SOC_DPCM_TRIGGER_POST},
  3519. .codec_dai_name = "snd-soc-dummy-dai",
  3520. .codec_name = "snd-soc-dummy",
  3521. .ignore_suspend = 1,
  3522. .ignore_pmdown_time = 1,
  3523. /* this dainlink has playback support */
  3524. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  3525. },
  3526. {/* hw:x,27 */
  3527. .name = MSM_DAILINK_NAME(Compress7),
  3528. .stream_name = "Compress7",
  3529. .cpu_dai_name = "MultiMedia14",
  3530. .platform_name = "msm-compress-dsp",
  3531. .dynamic = 1,
  3532. .dpcm_playback = 1,
  3533. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3534. SND_SOC_DPCM_TRIGGER_POST},
  3535. .codec_dai_name = "snd-soc-dummy-dai",
  3536. .codec_name = "snd-soc-dummy",
  3537. .ignore_suspend = 1,
  3538. .ignore_pmdown_time = 1,
  3539. /* this dainlink has playback support */
  3540. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  3541. },
  3542. {/* hw:x,28 */
  3543. .name = MSM_DAILINK_NAME(Compress8),
  3544. .stream_name = "Compress8",
  3545. .cpu_dai_name = "MultiMedia15",
  3546. .platform_name = "msm-compress-dsp",
  3547. .dynamic = 1,
  3548. .dpcm_playback = 1,
  3549. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3550. SND_SOC_DPCM_TRIGGER_POST},
  3551. .codec_dai_name = "snd-soc-dummy-dai",
  3552. .codec_name = "snd-soc-dummy",
  3553. .ignore_suspend = 1,
  3554. .ignore_pmdown_time = 1,
  3555. /* this dainlink has playback support */
  3556. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  3557. },
  3558. {/* hw:x,29 */
  3559. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  3560. .stream_name = "MM_NOIRQ_2",
  3561. .cpu_dai_name = "MultiMedia16",
  3562. .platform_name = "msm-pcm-dsp-noirq",
  3563. .dynamic = 1,
  3564. .dpcm_playback = 1,
  3565. .dpcm_capture = 1,
  3566. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3567. SND_SOC_DPCM_TRIGGER_POST},
  3568. .codec_dai_name = "snd-soc-dummy-dai",
  3569. .codec_name = "snd-soc-dummy",
  3570. .ignore_suspend = 1,
  3571. .ignore_pmdown_time = 1,
  3572. /* this dainlink has playback support */
  3573. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  3574. },
  3575. {/* hw:x,30 */
  3576. .name = "CDC_DMA Hostless",
  3577. .stream_name = "CDC_DMA Hostless",
  3578. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  3579. .platform_name = "msm-pcm-hostless",
  3580. .dynamic = 1,
  3581. .dpcm_playback = 1,
  3582. .dpcm_capture = 1,
  3583. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3584. SND_SOC_DPCM_TRIGGER_POST},
  3585. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3586. .ignore_suspend = 1,
  3587. /* this dailink has playback support */
  3588. .ignore_pmdown_time = 1,
  3589. .codec_dai_name = "snd-soc-dummy-dai",
  3590. .codec_name = "snd-soc-dummy",
  3591. },
  3592. {/* hw:x,31 */
  3593. .name = "TX3_CDC_DMA Hostless",
  3594. .stream_name = "TX3_CDC_DMA Hostless",
  3595. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  3596. .platform_name = "msm-pcm-hostless",
  3597. .dynamic = 1,
  3598. .dpcm_capture = 1,
  3599. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3600. SND_SOC_DPCM_TRIGGER_POST},
  3601. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3602. .ignore_suspend = 1,
  3603. .codec_dai_name = "snd-soc-dummy-dai",
  3604. .codec_name = "snd-soc-dummy",
  3605. },
  3606. };
  3607. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  3608. {/* hw:x,37 */
  3609. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  3610. .stream_name = "WSA CDC DMA0 Capture",
  3611. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  3612. .platform_name = "msm-pcm-hostless",
  3613. .codec_name = "bolero_codec",
  3614. .codec_dai_name = "wsa_macro_vifeedback",
  3615. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  3616. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3617. .ignore_suspend = 1,
  3618. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3619. .ops = &msm_cdc_dma_be_ops,
  3620. },
  3621. };
  3622. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  3623. {
  3624. .name = MSM_DAILINK_NAME(ASM Loopback),
  3625. .stream_name = "MultiMedia6",
  3626. .cpu_dai_name = "MultiMedia6",
  3627. .platform_name = "msm-pcm-loopback",
  3628. .dynamic = 1,
  3629. .dpcm_playback = 1,
  3630. .dpcm_capture = 1,
  3631. .codec_dai_name = "snd-soc-dummy-dai",
  3632. .codec_name = "snd-soc-dummy",
  3633. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3634. SND_SOC_DPCM_TRIGGER_POST},
  3635. .ignore_suspend = 1,
  3636. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3637. .ignore_pmdown_time = 1,
  3638. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  3639. },
  3640. {
  3641. .name = "USB Audio Hostless",
  3642. .stream_name = "USB Audio Hostless",
  3643. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  3644. .platform_name = "msm-pcm-hostless",
  3645. .dynamic = 1,
  3646. .dpcm_playback = 1,
  3647. .dpcm_capture = 1,
  3648. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3649. SND_SOC_DPCM_TRIGGER_POST},
  3650. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3651. .ignore_suspend = 1,
  3652. .ignore_pmdown_time = 1,
  3653. .codec_dai_name = "snd-soc-dummy-dai",
  3654. .codec_name = "snd-soc-dummy",
  3655. },
  3656. {
  3657. .name = "SLIMBUS_7 Hostless",
  3658. .stream_name = "SLIMBUS_7 Hostless",
  3659. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  3660. .platform_name = "msm-pcm-hostless",
  3661. .dynamic = 1,
  3662. .dpcm_capture = 1,
  3663. .dpcm_playback = 1,
  3664. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3665. SND_SOC_DPCM_TRIGGER_POST},
  3666. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3667. .ignore_suspend = 1,
  3668. .ignore_pmdown_time = 1,
  3669. .codec_dai_name = "snd-soc-dummy-dai",
  3670. .codec_name = "snd-soc-dummy",
  3671. },
  3672. };
  3673. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  3674. /* Backend AFE DAI Links */
  3675. {
  3676. .name = LPASS_BE_AFE_PCM_RX,
  3677. .stream_name = "AFE Playback",
  3678. .cpu_dai_name = "msm-dai-q6-dev.224",
  3679. .platform_name = "msm-pcm-routing",
  3680. .codec_name = "msm-stub-codec.1",
  3681. .codec_dai_name = "msm-stub-rx",
  3682. .no_pcm = 1,
  3683. .dpcm_playback = 1,
  3684. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  3685. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3686. /* this dainlink has playback support */
  3687. .ignore_pmdown_time = 1,
  3688. .ignore_suspend = 1,
  3689. },
  3690. {
  3691. .name = LPASS_BE_AFE_PCM_TX,
  3692. .stream_name = "AFE Capture",
  3693. .cpu_dai_name = "msm-dai-q6-dev.225",
  3694. .platform_name = "msm-pcm-routing",
  3695. .codec_name = "msm-stub-codec.1",
  3696. .codec_dai_name = "msm-stub-tx",
  3697. .no_pcm = 1,
  3698. .dpcm_capture = 1,
  3699. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  3700. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3701. .ignore_suspend = 1,
  3702. },
  3703. /* Incall Record Uplink BACK END DAI Link */
  3704. {
  3705. .name = LPASS_BE_INCALL_RECORD_TX,
  3706. .stream_name = "Voice Uplink Capture",
  3707. .cpu_dai_name = "msm-dai-q6-dev.32772",
  3708. .platform_name = "msm-pcm-routing",
  3709. .codec_name = "msm-stub-codec.1",
  3710. .codec_dai_name = "msm-stub-tx",
  3711. .no_pcm = 1,
  3712. .dpcm_capture = 1,
  3713. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  3714. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3715. .ignore_suspend = 1,
  3716. },
  3717. /* Incall Record Downlink BACK END DAI Link */
  3718. {
  3719. .name = LPASS_BE_INCALL_RECORD_RX,
  3720. .stream_name = "Voice Downlink Capture",
  3721. .cpu_dai_name = "msm-dai-q6-dev.32771",
  3722. .platform_name = "msm-pcm-routing",
  3723. .codec_name = "msm-stub-codec.1",
  3724. .codec_dai_name = "msm-stub-tx",
  3725. .no_pcm = 1,
  3726. .dpcm_capture = 1,
  3727. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  3728. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3729. .ignore_suspend = 1,
  3730. },
  3731. /* Incall Music BACK END DAI Link */
  3732. {
  3733. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  3734. .stream_name = "Voice Farend Playback",
  3735. .cpu_dai_name = "msm-dai-q6-dev.32773",
  3736. .platform_name = "msm-pcm-routing",
  3737. .codec_name = "msm-stub-codec.1",
  3738. .codec_dai_name = "msm-stub-rx",
  3739. .no_pcm = 1,
  3740. .dpcm_playback = 1,
  3741. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  3742. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3743. .ignore_suspend = 1,
  3744. .ignore_pmdown_time = 1,
  3745. },
  3746. /* Incall Music 2 BACK END DAI Link */
  3747. {
  3748. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  3749. .stream_name = "Voice2 Farend Playback",
  3750. .cpu_dai_name = "msm-dai-q6-dev.32770",
  3751. .platform_name = "msm-pcm-routing",
  3752. .codec_name = "msm-stub-codec.1",
  3753. .codec_dai_name = "msm-stub-rx",
  3754. .no_pcm = 1,
  3755. .dpcm_playback = 1,
  3756. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  3757. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3758. .ignore_suspend = 1,
  3759. .ignore_pmdown_time = 1,
  3760. },
  3761. {
  3762. .name = LPASS_BE_USB_AUDIO_RX,
  3763. .stream_name = "USB Audio Playback",
  3764. .cpu_dai_name = "msm-dai-q6-dev.28672",
  3765. .platform_name = "msm-pcm-routing",
  3766. .codec_name = "msm-stub-codec.1",
  3767. .codec_dai_name = "msm-stub-rx",
  3768. .no_pcm = 1,
  3769. .dpcm_playback = 1,
  3770. .id = MSM_BACKEND_DAI_USB_RX,
  3771. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3772. .ignore_pmdown_time = 1,
  3773. .ignore_suspend = 1,
  3774. },
  3775. {
  3776. .name = LPASS_BE_USB_AUDIO_TX,
  3777. .stream_name = "USB Audio Capture",
  3778. .cpu_dai_name = "msm-dai-q6-dev.28673",
  3779. .platform_name = "msm-pcm-routing",
  3780. .codec_name = "msm-stub-codec.1",
  3781. .codec_dai_name = "msm-stub-tx",
  3782. .no_pcm = 1,
  3783. .dpcm_capture = 1,
  3784. .id = MSM_BACKEND_DAI_USB_TX,
  3785. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3786. .ignore_suspend = 1,
  3787. },
  3788. {
  3789. .name = LPASS_BE_PRI_TDM_RX_0,
  3790. .stream_name = "Primary TDM0 Playback",
  3791. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  3792. .platform_name = "msm-pcm-routing",
  3793. .codec_name = "msm-stub-codec.1",
  3794. .codec_dai_name = "msm-stub-rx",
  3795. .no_pcm = 1,
  3796. .dpcm_playback = 1,
  3797. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  3798. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3799. .ops = &kona_tdm_be_ops,
  3800. .ignore_suspend = 1,
  3801. .ignore_pmdown_time = 1,
  3802. },
  3803. {
  3804. .name = LPASS_BE_PRI_TDM_TX_0,
  3805. .stream_name = "Primary TDM0 Capture",
  3806. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  3807. .platform_name = "msm-pcm-routing",
  3808. .codec_name = "msm-stub-codec.1",
  3809. .codec_dai_name = "msm-stub-tx",
  3810. .no_pcm = 1,
  3811. .dpcm_capture = 1,
  3812. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  3813. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3814. .ops = &kona_tdm_be_ops,
  3815. .ignore_suspend = 1,
  3816. },
  3817. {
  3818. .name = LPASS_BE_SEC_TDM_RX_0,
  3819. .stream_name = "Secondary TDM0 Playback",
  3820. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  3821. .platform_name = "msm-pcm-routing",
  3822. .codec_name = "msm-stub-codec.1",
  3823. .codec_dai_name = "msm-stub-rx",
  3824. .no_pcm = 1,
  3825. .dpcm_playback = 1,
  3826. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  3827. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3828. .ops = &kona_tdm_be_ops,
  3829. .ignore_suspend = 1,
  3830. .ignore_pmdown_time = 1,
  3831. },
  3832. {
  3833. .name = LPASS_BE_SEC_TDM_TX_0,
  3834. .stream_name = "Secondary TDM0 Capture",
  3835. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  3836. .platform_name = "msm-pcm-routing",
  3837. .codec_name = "msm-stub-codec.1",
  3838. .codec_dai_name = "msm-stub-tx",
  3839. .no_pcm = 1,
  3840. .dpcm_capture = 1,
  3841. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  3842. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3843. .ops = &kona_tdm_be_ops,
  3844. .ignore_suspend = 1,
  3845. },
  3846. {
  3847. .name = LPASS_BE_TERT_TDM_RX_0,
  3848. .stream_name = "Tertiary TDM0 Playback",
  3849. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  3850. .platform_name = "msm-pcm-routing",
  3851. .codec_name = "msm-stub-codec.1",
  3852. .codec_dai_name = "msm-stub-rx",
  3853. .no_pcm = 1,
  3854. .dpcm_playback = 1,
  3855. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  3856. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3857. .ops = &kona_tdm_be_ops,
  3858. .ignore_suspend = 1,
  3859. .ignore_pmdown_time = 1,
  3860. },
  3861. {
  3862. .name = LPASS_BE_TERT_TDM_TX_0,
  3863. .stream_name = "Tertiary TDM0 Capture",
  3864. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  3865. .platform_name = "msm-pcm-routing",
  3866. .codec_name = "msm-stub-codec.1",
  3867. .codec_dai_name = "msm-stub-tx",
  3868. .no_pcm = 1,
  3869. .dpcm_capture = 1,
  3870. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  3871. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3872. .ops = &kona_tdm_be_ops,
  3873. .ignore_suspend = 1,
  3874. },
  3875. };
  3876. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  3877. {
  3878. .name = LPASS_BE_PRI_MI2S_RX,
  3879. .stream_name = "Primary MI2S Playback",
  3880. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  3881. .platform_name = "msm-pcm-routing",
  3882. .codec_name = "msm-stub-codec.1",
  3883. .codec_dai_name = "msm-stub-rx",
  3884. .no_pcm = 1,
  3885. .dpcm_playback = 1,
  3886. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  3887. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3888. .ops = &msm_mi2s_be_ops,
  3889. .ignore_suspend = 1,
  3890. .ignore_pmdown_time = 1,
  3891. },
  3892. {
  3893. .name = LPASS_BE_PRI_MI2S_TX,
  3894. .stream_name = "Primary MI2S Capture",
  3895. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  3896. .platform_name = "msm-pcm-routing",
  3897. .codec_name = "msm-stub-codec.1",
  3898. .codec_dai_name = "msm-stub-tx",
  3899. .no_pcm = 1,
  3900. .dpcm_capture = 1,
  3901. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  3902. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3903. .ops = &msm_mi2s_be_ops,
  3904. .ignore_suspend = 1,
  3905. },
  3906. {
  3907. .name = LPASS_BE_SEC_MI2S_RX,
  3908. .stream_name = "Secondary MI2S Playback",
  3909. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  3910. .platform_name = "msm-pcm-routing",
  3911. .codec_name = "msm-stub-codec.1",
  3912. .codec_dai_name = "msm-stub-rx",
  3913. .no_pcm = 1,
  3914. .dpcm_playback = 1,
  3915. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  3916. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3917. .ops = &msm_mi2s_be_ops,
  3918. .ignore_suspend = 1,
  3919. .ignore_pmdown_time = 1,
  3920. },
  3921. {
  3922. .name = LPASS_BE_SEC_MI2S_TX,
  3923. .stream_name = "Secondary MI2S Capture",
  3924. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  3925. .platform_name = "msm-pcm-routing",
  3926. .codec_name = "msm-stub-codec.1",
  3927. .codec_dai_name = "msm-stub-tx",
  3928. .no_pcm = 1,
  3929. .dpcm_capture = 1,
  3930. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  3931. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3932. .ops = &msm_mi2s_be_ops,
  3933. .ignore_suspend = 1,
  3934. },
  3935. {
  3936. .name = LPASS_BE_TERT_MI2S_RX,
  3937. .stream_name = "Tertiary MI2S Playback",
  3938. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  3939. .platform_name = "msm-pcm-routing",
  3940. .codec_name = "msm-stub-codec.1",
  3941. .codec_dai_name = "msm-stub-rx",
  3942. .no_pcm = 1,
  3943. .dpcm_playback = 1,
  3944. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  3945. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3946. .ops = &msm_mi2s_be_ops,
  3947. .ignore_suspend = 1,
  3948. .ignore_pmdown_time = 1,
  3949. },
  3950. {
  3951. .name = LPASS_BE_TERT_MI2S_TX,
  3952. .stream_name = "Tertiary MI2S Capture",
  3953. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  3954. .platform_name = "msm-pcm-routing",
  3955. .codec_name = "msm-stub-codec.1",
  3956. .codec_dai_name = "msm-stub-tx",
  3957. .no_pcm = 1,
  3958. .dpcm_capture = 1,
  3959. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  3960. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3961. .ops = &msm_mi2s_be_ops,
  3962. .ignore_suspend = 1,
  3963. },
  3964. };
  3965. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  3966. /* Primary AUX PCM Backend DAI Links */
  3967. {
  3968. .name = LPASS_BE_AUXPCM_RX,
  3969. .stream_name = "AUX PCM Playback",
  3970. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  3971. .platform_name = "msm-pcm-routing",
  3972. .codec_name = "msm-stub-codec.1",
  3973. .codec_dai_name = "msm-stub-rx",
  3974. .no_pcm = 1,
  3975. .dpcm_playback = 1,
  3976. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  3977. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3978. .ignore_pmdown_time = 1,
  3979. .ignore_suspend = 1,
  3980. },
  3981. {
  3982. .name = LPASS_BE_AUXPCM_TX,
  3983. .stream_name = "AUX PCM Capture",
  3984. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  3985. .platform_name = "msm-pcm-routing",
  3986. .codec_name = "msm-stub-codec.1",
  3987. .codec_dai_name = "msm-stub-tx",
  3988. .no_pcm = 1,
  3989. .dpcm_capture = 1,
  3990. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  3991. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3992. .ignore_suspend = 1,
  3993. },
  3994. /* Secondary AUX PCM Backend DAI Links */
  3995. {
  3996. .name = LPASS_BE_SEC_AUXPCM_RX,
  3997. .stream_name = "Sec AUX PCM Playback",
  3998. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  3999. .platform_name = "msm-pcm-routing",
  4000. .codec_name = "msm-stub-codec.1",
  4001. .codec_dai_name = "msm-stub-rx",
  4002. .no_pcm = 1,
  4003. .dpcm_playback = 1,
  4004. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4005. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4006. .ignore_pmdown_time = 1,
  4007. .ignore_suspend = 1,
  4008. },
  4009. {
  4010. .name = LPASS_BE_SEC_AUXPCM_TX,
  4011. .stream_name = "Sec AUX PCM Capture",
  4012. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4013. .platform_name = "msm-pcm-routing",
  4014. .codec_name = "msm-stub-codec.1",
  4015. .codec_dai_name = "msm-stub-tx",
  4016. .no_pcm = 1,
  4017. .dpcm_capture = 1,
  4018. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4019. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4020. .ignore_suspend = 1,
  4021. },
  4022. /* Tertiary AUX PCM Backend DAI Links */
  4023. {
  4024. .name = LPASS_BE_TERT_AUXPCM_RX,
  4025. .stream_name = "Tert AUX PCM Playback",
  4026. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4027. .platform_name = "msm-pcm-routing",
  4028. .codec_name = "msm-stub-codec.1",
  4029. .codec_dai_name = "msm-stub-rx",
  4030. .no_pcm = 1,
  4031. .dpcm_playback = 1,
  4032. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4033. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4034. .ignore_suspend = 1,
  4035. },
  4036. {
  4037. .name = LPASS_BE_TERT_AUXPCM_TX,
  4038. .stream_name = "Tert AUX PCM Capture",
  4039. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4040. .platform_name = "msm-pcm-routing",
  4041. .codec_name = "msm-stub-codec.1",
  4042. .codec_dai_name = "msm-stub-tx",
  4043. .no_pcm = 1,
  4044. .dpcm_capture = 1,
  4045. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4046. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4047. .ignore_suspend = 1,
  4048. },
  4049. };
  4050. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4051. /* WSA CDC DMA Backend DAI Links */
  4052. {
  4053. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4054. .stream_name = "WSA CDC DMA0 Playback",
  4055. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4056. .platform_name = "msm-pcm-routing",
  4057. .codec_name = "bolero_codec",
  4058. .codec_dai_name = "wsa_macro_rx1",
  4059. .no_pcm = 1,
  4060. .dpcm_playback = 1,
  4061. .init = &msm_int_audrx_init,
  4062. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4063. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4064. .ignore_pmdown_time = 1,
  4065. .ignore_suspend = 1,
  4066. .ops = &msm_cdc_dma_be_ops,
  4067. },
  4068. {
  4069. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4070. .stream_name = "WSA CDC DMA1 Playback",
  4071. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4072. .platform_name = "msm-pcm-routing",
  4073. .codec_name = "bolero_codec",
  4074. .codec_dai_name = "wsa_macro_rx_mix",
  4075. .no_pcm = 1,
  4076. .dpcm_playback = 1,
  4077. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4078. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4079. .ignore_pmdown_time = 1,
  4080. .ignore_suspend = 1,
  4081. .ops = &msm_cdc_dma_be_ops,
  4082. },
  4083. {
  4084. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4085. .stream_name = "WSA CDC DMA1 Capture",
  4086. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4087. .platform_name = "msm-pcm-routing",
  4088. .codec_name = "bolero_codec",
  4089. .codec_dai_name = "wsa_macro_echo",
  4090. .no_pcm = 1,
  4091. .dpcm_capture = 1,
  4092. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4093. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4094. .ignore_suspend = 1,
  4095. .ops = &msm_cdc_dma_be_ops,
  4096. },
  4097. };
  4098. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4099. /* RX CDC DMA Backend DAI Links */
  4100. {
  4101. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4102. .stream_name = "RX CDC DMA0 Playback",
  4103. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4104. .platform_name = "msm-pcm-routing",
  4105. .codec_name = "bolero_codec",
  4106. .codec_dai_name = "rx_macro_rx1",
  4107. .no_pcm = 1,
  4108. .dpcm_playback = 1,
  4109. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4110. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4111. .ignore_pmdown_time = 1,
  4112. .ignore_suspend = 1,
  4113. .ops = &msm_cdc_dma_be_ops,
  4114. },
  4115. {
  4116. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4117. .stream_name = "RX CDC DMA1 Playback",
  4118. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4119. .platform_name = "msm-pcm-routing",
  4120. .codec_name = "bolero_codec",
  4121. .codec_dai_name = "rx_macro_rx2",
  4122. .no_pcm = 1,
  4123. .dpcm_playback = 1,
  4124. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4125. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4126. .ignore_pmdown_time = 1,
  4127. .ignore_suspend = 1,
  4128. .ops = &msm_cdc_dma_be_ops,
  4129. },
  4130. {
  4131. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4132. .stream_name = "RX CDC DMA2 Playback",
  4133. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4134. .platform_name = "msm-pcm-routing",
  4135. .codec_name = "bolero_codec",
  4136. .codec_dai_name = "rx_macro_rx3",
  4137. .no_pcm = 1,
  4138. .dpcm_playback = 1,
  4139. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4140. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4141. .ignore_pmdown_time = 1,
  4142. .ignore_suspend = 1,
  4143. .ops = &msm_cdc_dma_be_ops,
  4144. },
  4145. {
  4146. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4147. .stream_name = "RX CDC DMA3 Playback",
  4148. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4149. .platform_name = "msm-pcm-routing",
  4150. .codec_name = "bolero_codec",
  4151. .codec_dai_name = "rx_macro_rx4",
  4152. .no_pcm = 1,
  4153. .dpcm_playback = 1,
  4154. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4155. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4156. .ignore_pmdown_time = 1,
  4157. .ignore_suspend = 1,
  4158. .ops = &msm_cdc_dma_be_ops,
  4159. },
  4160. /* TX CDC DMA Backend DAI Links */
  4161. {
  4162. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4163. .stream_name = "TX CDC DMA3 Capture",
  4164. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4165. .platform_name = "msm-pcm-routing",
  4166. .codec_name = "bolero_codec",
  4167. .codec_dai_name = "tx_macro_tx1",
  4168. .no_pcm = 1,
  4169. .dpcm_capture = 1,
  4170. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4171. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4172. .ignore_suspend = 1,
  4173. .ops = &msm_cdc_dma_be_ops,
  4174. },
  4175. {
  4176. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4177. .stream_name = "TX CDC DMA4 Capture",
  4178. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4179. .platform_name = "msm-pcm-routing",
  4180. .codec_name = "bolero_codec",
  4181. .codec_dai_name = "tx_macro_tx2",
  4182. .no_pcm = 1,
  4183. .dpcm_capture = 1,
  4184. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4185. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4186. .ignore_suspend = 1,
  4187. .ops = &msm_cdc_dma_be_ops,
  4188. },
  4189. };
  4190. static struct snd_soc_dai_link msm_kona_dai_links[
  4191. ARRAY_SIZE(msm_common_dai_links) +
  4192. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  4193. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  4194. ARRAY_SIZE(msm_common_be_dai_links) +
  4195. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  4196. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  4197. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  4198. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  4199. static int msm_populate_dai_link_component_of_node(
  4200. struct snd_soc_card *card)
  4201. {
  4202. int i, index, ret = 0;
  4203. struct device *cdev = card->dev;
  4204. struct snd_soc_dai_link *dai_link = card->dai_link;
  4205. struct device_node *np;
  4206. if (!cdev) {
  4207. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  4208. return -ENODEV;
  4209. }
  4210. for (i = 0; i < card->num_links; i++) {
  4211. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  4212. continue;
  4213. /* populate platform_of_node for snd card dai links */
  4214. if (dai_link[i].platform_name &&
  4215. !dai_link[i].platform_of_node) {
  4216. index = of_property_match_string(cdev->of_node,
  4217. "asoc-platform-names",
  4218. dai_link[i].platform_name);
  4219. if (index < 0) {
  4220. dev_err(cdev, "%s: No match found for platform name: %s\n",
  4221. __func__, dai_link[i].platform_name);
  4222. ret = index;
  4223. goto err;
  4224. }
  4225. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  4226. index);
  4227. if (!np) {
  4228. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  4229. __func__, dai_link[i].platform_name,
  4230. index);
  4231. ret = -ENODEV;
  4232. goto err;
  4233. }
  4234. dai_link[i].platform_of_node = np;
  4235. dai_link[i].platform_name = NULL;
  4236. }
  4237. /* populate cpu_of_node for snd card dai links */
  4238. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  4239. index = of_property_match_string(cdev->of_node,
  4240. "asoc-cpu-names",
  4241. dai_link[i].cpu_dai_name);
  4242. if (index >= 0) {
  4243. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  4244. index);
  4245. if (!np) {
  4246. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  4247. __func__,
  4248. dai_link[i].cpu_dai_name);
  4249. ret = -ENODEV;
  4250. goto err;
  4251. }
  4252. dai_link[i].cpu_of_node = np;
  4253. dai_link[i].cpu_dai_name = NULL;
  4254. }
  4255. }
  4256. /* populate codec_of_node for snd card dai links */
  4257. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  4258. index = of_property_match_string(cdev->of_node,
  4259. "asoc-codec-names",
  4260. dai_link[i].codec_name);
  4261. if (index < 0)
  4262. continue;
  4263. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  4264. index);
  4265. if (!np) {
  4266. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  4267. __func__, dai_link[i].codec_name);
  4268. ret = -ENODEV;
  4269. goto err;
  4270. }
  4271. dai_link[i].codec_of_node = np;
  4272. dai_link[i].codec_name = NULL;
  4273. }
  4274. }
  4275. err:
  4276. return ret;
  4277. }
  4278. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  4279. {
  4280. int ret = -EINVAL;
  4281. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  4282. if (!component) {
  4283. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  4284. return ret;
  4285. }
  4286. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  4287. ARRAY_SIZE(msm_snd_controls));
  4288. if (ret < 0) {
  4289. dev_err(component->dev,
  4290. "%s: add_codec_controls failed, err = %d\n",
  4291. __func__, ret);
  4292. return ret;
  4293. }
  4294. return ret;
  4295. }
  4296. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  4297. struct snd_pcm_hw_params *params)
  4298. {
  4299. return 0;
  4300. }
  4301. static struct snd_soc_ops msm_stub_be_ops = {
  4302. .hw_params = msm_snd_stub_hw_params,
  4303. };
  4304. struct snd_soc_card snd_soc_card_stub_msm = {
  4305. .name = "kona-stub-snd-card",
  4306. };
  4307. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  4308. /* FrontEnd DAI Links */
  4309. {
  4310. .name = "MSMSTUB Media1",
  4311. .stream_name = "MultiMedia1",
  4312. .cpu_dai_name = "MultiMedia1",
  4313. .platform_name = "msm-pcm-dsp.0",
  4314. .dynamic = 1,
  4315. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4316. .dpcm_playback = 1,
  4317. .dpcm_capture = 1,
  4318. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4319. SND_SOC_DPCM_TRIGGER_POST},
  4320. .codec_dai_name = "snd-soc-dummy-dai",
  4321. .codec_name = "snd-soc-dummy",
  4322. .ignore_suspend = 1,
  4323. /* this dainlink has playback support */
  4324. .ignore_pmdown_time = 1,
  4325. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4326. },
  4327. };
  4328. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  4329. /* Backend DAI Links */
  4330. {
  4331. .name = LPASS_BE_AUXPCM_RX,
  4332. .stream_name = "AUX PCM Playback",
  4333. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4334. .platform_name = "msm-pcm-routing",
  4335. .codec_name = "msm-stub-codec.1",
  4336. .codec_dai_name = "msm-stub-rx",
  4337. .no_pcm = 1,
  4338. .dpcm_playback = 1,
  4339. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4340. .init = &msm_audrx_stub_init,
  4341. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4342. .ignore_pmdown_time = 1,
  4343. .ignore_suspend = 1,
  4344. .ops = &msm_stub_be_ops,
  4345. },
  4346. {
  4347. .name = LPASS_BE_AUXPCM_TX,
  4348. .stream_name = "AUX PCM Capture",
  4349. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4350. .platform_name = "msm-pcm-routing",
  4351. .codec_name = "msm-stub-codec.1",
  4352. .codec_dai_name = "msm-stub-tx",
  4353. .no_pcm = 1,
  4354. .dpcm_capture = 1,
  4355. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4356. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4357. .ignore_suspend = 1,
  4358. .ops = &msm_stub_be_ops,
  4359. },
  4360. };
  4361. static struct snd_soc_dai_link msm_stub_dai_links[
  4362. ARRAY_SIZE(msm_stub_fe_dai_links) +
  4363. ARRAY_SIZE(msm_stub_be_dai_links)];
  4364. static const struct of_device_id kona_asoc_machine_of_match[] = {
  4365. { .compatible = "qcom,kona-asoc-snd",
  4366. .data = "codec"},
  4367. { .compatible = "qcom,kona-asoc-snd-stub",
  4368. .data = "stub_codec"},
  4369. {},
  4370. };
  4371. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  4372. {
  4373. struct snd_soc_card *card = NULL;
  4374. struct snd_soc_dai_link *dailink = NULL;
  4375. int len_1 = 0;
  4376. int len_2 = 0;
  4377. int total_links = 0;
  4378. int rc = 0;
  4379. u32 mi2s_audio_intf = 0;
  4380. u32 auxpcm_audio_intf = 0;
  4381. const struct of_device_id *match;
  4382. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  4383. if (!match) {
  4384. dev_err(dev, "%s: No DT match found for sound card\n",
  4385. __func__);
  4386. return NULL;
  4387. }
  4388. if (!strcmp(match->data, "codec")) {
  4389. card = &snd_soc_card_kona_msm;
  4390. memcpy(msm_kona_dai_links + total_links,
  4391. msm_common_dai_links,
  4392. sizeof(msm_common_dai_links));
  4393. total_links += ARRAY_SIZE(msm_common_dai_links);
  4394. memcpy(msm_kona_dai_links + total_links,
  4395. msm_bolero_fe_dai_links,
  4396. sizeof(msm_bolero_fe_dai_links));
  4397. total_links +=
  4398. ARRAY_SIZE(msm_bolero_fe_dai_links);
  4399. memcpy(msm_kona_dai_links + total_links,
  4400. msm_common_misc_fe_dai_links,
  4401. sizeof(msm_common_misc_fe_dai_links));
  4402. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  4403. memcpy(msm_kona_dai_links + total_links,
  4404. msm_common_be_dai_links,
  4405. sizeof(msm_common_be_dai_links));
  4406. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  4407. memcpy(msm_kona_dai_links + total_links,
  4408. msm_wsa_cdc_dma_be_dai_links,
  4409. sizeof(msm_wsa_cdc_dma_be_dai_links));
  4410. total_links +=
  4411. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  4412. memcpy(msm_kona_dai_links + total_links,
  4413. msm_rx_tx_cdc_dma_be_dai_links,
  4414. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  4415. total_links +=
  4416. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  4417. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  4418. &mi2s_audio_intf);
  4419. if (rc) {
  4420. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  4421. __func__);
  4422. } else {
  4423. if (mi2s_audio_intf) {
  4424. memcpy(msm_kona_dai_links + total_links,
  4425. msm_mi2s_be_dai_links,
  4426. sizeof(msm_mi2s_be_dai_links));
  4427. total_links +=
  4428. ARRAY_SIZE(msm_mi2s_be_dai_links);
  4429. }
  4430. }
  4431. rc = of_property_read_u32(dev->of_node,
  4432. "qcom,auxpcm-audio-intf",
  4433. &auxpcm_audio_intf);
  4434. if (rc) {
  4435. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  4436. __func__);
  4437. } else {
  4438. if (auxpcm_audio_intf) {
  4439. memcpy(msm_kona_dai_links + total_links,
  4440. msm_auxpcm_be_dai_links,
  4441. sizeof(msm_auxpcm_be_dai_links));
  4442. total_links +=
  4443. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  4444. }
  4445. }
  4446. dailink = msm_kona_dai_links;
  4447. } else if(!strcmp(match->data, "stub_codec")) {
  4448. card = &snd_soc_card_stub_msm;
  4449. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  4450. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  4451. memcpy(msm_stub_dai_links,
  4452. msm_stub_fe_dai_links,
  4453. sizeof(msm_stub_fe_dai_links));
  4454. memcpy(msm_stub_dai_links + len_1,
  4455. msm_stub_be_dai_links,
  4456. sizeof(msm_stub_be_dai_links));
  4457. dailink = msm_stub_dai_links;
  4458. total_links = len_2;
  4459. }
  4460. if (card) {
  4461. card->dai_link = dailink;
  4462. card->num_links = total_links;
  4463. }
  4464. return card;
  4465. }
  4466. static int msm_wsa881x_init(struct snd_soc_component *component)
  4467. {
  4468. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4469. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4470. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  4471. SPKR_L_BOOST, SPKR_L_VI};
  4472. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  4473. SPKR_R_BOOST, SPKR_R_VI};
  4474. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  4475. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  4476. struct msm_asoc_mach_data *pdata;
  4477. struct snd_soc_dapm_context *dapm;
  4478. struct snd_card *card;
  4479. struct snd_info_entry *entry;
  4480. int ret = 0;
  4481. if (!component) {
  4482. pr_err("%s component is NULL\n", __func__);
  4483. return -EINVAL;
  4484. }
  4485. card = component->card->snd_card;
  4486. dapm = snd_soc_component_get_dapm(component);
  4487. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  4488. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  4489. __func__, component->name);
  4490. wsa881x_set_channel_map(component, &spkleft_ports[0],
  4491. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4492. &ch_rate[0], &spkleft_port_types[0]);
  4493. if (dapm->component) {
  4494. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  4495. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  4496. }
  4497. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  4498. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  4499. __func__, component->name);
  4500. wsa881x_set_channel_map(component, &spkright_ports[0],
  4501. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4502. &ch_rate[0], &spkright_port_types[0]);
  4503. if (dapm->component) {
  4504. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  4505. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  4506. }
  4507. } else {
  4508. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  4509. component->name);
  4510. ret = -EINVAL;
  4511. goto err;
  4512. }
  4513. pdata = snd_soc_card_get_drvdata(component->card);
  4514. if (!pdata->codec_root) {
  4515. entry = snd_info_create_subdir(card->module, "codecs",
  4516. card->proc_root);
  4517. if (!entry) {
  4518. pr_err("%s: Cannot create codecs module entry\n",
  4519. __func__);
  4520. ret = 0;
  4521. goto err;
  4522. }
  4523. pdata->codec_root = entry;
  4524. }
  4525. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  4526. component);
  4527. err:
  4528. return ret;
  4529. }
  4530. static int msm_aux_codec_init(struct snd_soc_component *component)
  4531. {
  4532. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  4533. int ret = 0;
  4534. struct snd_info_entry *entry;
  4535. struct snd_card *card = component->card->snd_card;
  4536. struct msm_asoc_mach_data *pdata;
  4537. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4538. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  4539. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4540. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4541. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  4542. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  4543. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  4544. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  4545. snd_soc_dapm_sync(dapm);
  4546. pdata = snd_soc_card_get_drvdata(component->card);
  4547. if (!pdata->codec_root) {
  4548. entry = snd_info_create_subdir(card->module, "codecs",
  4549. card->proc_root);
  4550. if (!entry) {
  4551. pr_err("%s: Cannot create codecs module entry\n",
  4552. __func__);
  4553. ret = 0;
  4554. goto codec_root_err;
  4555. }
  4556. pdata->codec_root = entry;
  4557. }
  4558. codec_root_err:
  4559. return ret;
  4560. }
  4561. static int msm_init_aux_dev(struct platform_device *pdev,
  4562. struct snd_soc_card *card)
  4563. {
  4564. struct device_node *wsa_of_node;
  4565. struct device_node *aux_codec_of_node;
  4566. u32 wsa_max_devs;
  4567. u32 wsa_dev_cnt;
  4568. u32 codec_aux_dev_cnt = 0;
  4569. u32 bolero_codec = 0;
  4570. int i;
  4571. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  4572. struct aux_codec_dev_info *aux_cdc_dev_info;
  4573. const char *auxdev_name_prefix[1];
  4574. char *dev_name_str = NULL;
  4575. int found = 0;
  4576. int codecs_found = 0;
  4577. int ret = 0;
  4578. /* Get maximum WSA device count for this platform */
  4579. ret = of_property_read_u32(pdev->dev.of_node,
  4580. "qcom,wsa-max-devs", &wsa_max_devs);
  4581. if (ret) {
  4582. dev_info(&pdev->dev,
  4583. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  4584. __func__, pdev->dev.of_node->full_name, ret);
  4585. wsa_max_devs = 0;
  4586. goto codec_aux_dev;
  4587. }
  4588. if (wsa_max_devs == 0) {
  4589. dev_warn(&pdev->dev,
  4590. "%s: Max WSA devices is 0 for this target?\n",
  4591. __func__);
  4592. goto codec_aux_dev;
  4593. }
  4594. /* Get count of WSA device phandles for this platform */
  4595. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  4596. "qcom,wsa-devs", NULL);
  4597. if (wsa_dev_cnt == -ENOENT) {
  4598. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  4599. __func__);
  4600. goto err;
  4601. } else if (wsa_dev_cnt <= 0) {
  4602. dev_err(&pdev->dev,
  4603. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  4604. __func__, wsa_dev_cnt);
  4605. ret = -EINVAL;
  4606. goto err;
  4607. }
  4608. /*
  4609. * Expect total phandles count to be NOT less than maximum possible
  4610. * WSA count. However, if it is less, then assign same value to
  4611. * max count as well.
  4612. */
  4613. if (wsa_dev_cnt < wsa_max_devs) {
  4614. dev_dbg(&pdev->dev,
  4615. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  4616. __func__, wsa_max_devs, wsa_dev_cnt);
  4617. wsa_max_devs = wsa_dev_cnt;
  4618. }
  4619. /* Make sure prefix string passed for each WSA device */
  4620. ret = of_property_count_strings(pdev->dev.of_node,
  4621. "qcom,wsa-aux-dev-prefix");
  4622. if (ret != wsa_dev_cnt) {
  4623. dev_err(&pdev->dev,
  4624. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  4625. __func__, wsa_dev_cnt, ret);
  4626. ret = -EINVAL;
  4627. goto err;
  4628. }
  4629. /*
  4630. * Alloc mem to store phandle and index info of WSA device, if already
  4631. * registered with ALSA core
  4632. */
  4633. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  4634. sizeof(struct msm_wsa881x_dev_info),
  4635. GFP_KERNEL);
  4636. if (!wsa881x_dev_info) {
  4637. ret = -ENOMEM;
  4638. goto err;
  4639. }
  4640. /*
  4641. * search and check whether all WSA devices are already
  4642. * registered with ALSA core or not. If found a node, store
  4643. * the node and the index in a local array of struct for later
  4644. * use.
  4645. */
  4646. for (i = 0; i < wsa_dev_cnt; i++) {
  4647. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  4648. "qcom,wsa-devs", i);
  4649. if (unlikely(!wsa_of_node)) {
  4650. /* we should not be here */
  4651. dev_err(&pdev->dev,
  4652. "%s: wsa dev node is not present\n",
  4653. __func__);
  4654. ret = -EINVAL;
  4655. goto err;
  4656. }
  4657. if (soc_find_component(wsa_of_node, NULL)) {
  4658. /* WSA device registered with ALSA core */
  4659. wsa881x_dev_info[found].of_node = wsa_of_node;
  4660. wsa881x_dev_info[found].index = i;
  4661. found++;
  4662. if (found == wsa_max_devs)
  4663. break;
  4664. }
  4665. }
  4666. if (found < wsa_max_devs) {
  4667. dev_dbg(&pdev->dev,
  4668. "%s: failed to find %d components. Found only %d\n",
  4669. __func__, wsa_max_devs, found);
  4670. return -EPROBE_DEFER;
  4671. }
  4672. dev_info(&pdev->dev,
  4673. "%s: found %d wsa881x devices registered with ALSA core\n",
  4674. __func__, found);
  4675. codec_aux_dev:
  4676. ret = of_property_read_u32(pdev->dev.of_node, "qcom,bolero-codec", &bolero_codec);
  4677. if (ret)
  4678. dev_dbg(&pdev->dev, "%s: No DT match for bolero codec\n", __func__);
  4679. if (bolero_codec) {
  4680. /* Get count of aux codec device phandles for this platform */
  4681. codec_aux_dev_cnt = of_count_phandle_with_args(
  4682. pdev->dev.of_node,
  4683. "qcom,codec-aux-devs", NULL);
  4684. if (codec_aux_dev_cnt == -ENOENT) {
  4685. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  4686. __func__);
  4687. goto err;
  4688. } else if (codec_aux_dev_cnt <= 0) {
  4689. dev_err(&pdev->dev,
  4690. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  4691. __func__, codec_aux_dev_cnt);
  4692. ret = -EINVAL;
  4693. goto err;
  4694. }
  4695. /*
  4696. * Alloc mem to store phandle and index info of aux codec
  4697. * if already registered with ALSA core
  4698. */
  4699. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  4700. sizeof(struct aux_codec_dev_info),
  4701. GFP_KERNEL);
  4702. if (!aux_cdc_dev_info) {
  4703. ret = -ENOMEM;
  4704. goto err;
  4705. }
  4706. /*
  4707. * search and check whether all aux codecs are already
  4708. * registered with ALSA core or not. If found a node, store
  4709. * the node and the index in a local array of struct for later
  4710. * use.
  4711. */
  4712. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4713. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  4714. "qcom,codec-aux-devs", i);
  4715. if (unlikely(!aux_codec_of_node)) {
  4716. /* we should not be here */
  4717. dev_err(&pdev->dev,
  4718. "%s: aux codec dev node is not present\n",
  4719. __func__);
  4720. ret = -EINVAL;
  4721. goto err;
  4722. }
  4723. if (soc_find_component(aux_codec_of_node, NULL)) {
  4724. /* AUX codec registered with ALSA core */
  4725. aux_cdc_dev_info[codecs_found].of_node =
  4726. aux_codec_of_node;
  4727. aux_cdc_dev_info[codecs_found].index = i;
  4728. codecs_found++;
  4729. }
  4730. }
  4731. if (codecs_found < codec_aux_dev_cnt) {
  4732. dev_dbg(&pdev->dev,
  4733. "%s: failed to find %d components. Found only %d\n",
  4734. __func__, codec_aux_dev_cnt, codecs_found);
  4735. return -EPROBE_DEFER;
  4736. }
  4737. dev_info(&pdev->dev,
  4738. "%s: found %d AUX codecs registered with ALSA core\n",
  4739. __func__, codecs_found);
  4740. }
  4741. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  4742. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  4743. /* Alloc array of AUX devs struct */
  4744. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  4745. sizeof(struct snd_soc_aux_dev),
  4746. GFP_KERNEL);
  4747. if (!msm_aux_dev) {
  4748. ret = -ENOMEM;
  4749. goto err;
  4750. }
  4751. /* Alloc array of codec conf struct */
  4752. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  4753. sizeof(struct snd_soc_codec_conf),
  4754. GFP_KERNEL);
  4755. if (!msm_codec_conf) {
  4756. ret = -ENOMEM;
  4757. goto err;
  4758. }
  4759. for (i = 0; i < wsa_max_devs; i++) {
  4760. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  4761. GFP_KERNEL);
  4762. if (!dev_name_str) {
  4763. ret = -ENOMEM;
  4764. goto err;
  4765. }
  4766. ret = of_property_read_string_index(pdev->dev.of_node,
  4767. "qcom,wsa-aux-dev-prefix",
  4768. wsa881x_dev_info[i].index,
  4769. auxdev_name_prefix);
  4770. if (ret) {
  4771. dev_err(&pdev->dev,
  4772. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  4773. __func__, ret);
  4774. ret = -EINVAL;
  4775. goto err;
  4776. }
  4777. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  4778. msm_aux_dev[i].name = dev_name_str;
  4779. msm_aux_dev[i].codec_name = NULL;
  4780. msm_aux_dev[i].codec_of_node =
  4781. wsa881x_dev_info[i].of_node;
  4782. msm_aux_dev[i].init = msm_wsa881x_init;
  4783. msm_codec_conf[i].dev_name = NULL;
  4784. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  4785. msm_codec_conf[i].of_node =
  4786. wsa881x_dev_info[i].of_node;
  4787. }
  4788. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4789. msm_aux_dev[wsa_max_devs + i].name = NULL;
  4790. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  4791. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  4792. aux_cdc_dev_info[i].of_node;
  4793. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  4794. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  4795. msm_codec_conf[wsa_max_devs + i].name_prefix =
  4796. NULL;
  4797. msm_codec_conf[wsa_max_devs + i].of_node =
  4798. aux_cdc_dev_info[i].of_node;
  4799. }
  4800. card->codec_conf = msm_codec_conf;
  4801. card->aux_dev = msm_aux_dev;
  4802. err:
  4803. return ret;
  4804. }
  4805. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  4806. {
  4807. int count = 0;
  4808. u32 mi2s_master_slave[MI2S_MAX];
  4809. int ret = 0;
  4810. for (count = 0; count < MI2S_MAX; count++) {
  4811. mutex_init(&mi2s_intf_conf[count].lock);
  4812. mi2s_intf_conf[count].ref_cnt = 0;
  4813. }
  4814. ret = of_property_read_u32_array(pdev->dev.of_node,
  4815. "qcom,msm-mi2s-master",
  4816. mi2s_master_slave, MI2S_MAX);
  4817. if (ret) {
  4818. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  4819. __func__);
  4820. } else {
  4821. for (count = 0; count < MI2S_MAX; count++) {
  4822. mi2s_intf_conf[count].msm_is_mi2s_master =
  4823. mi2s_master_slave[count];
  4824. }
  4825. }
  4826. }
  4827. static void msm_i2s_auxpcm_deinit(void)
  4828. {
  4829. int count = 0;
  4830. for (count = 0; count < MI2S_MAX; count++) {
  4831. mutex_destroy(&mi2s_intf_conf[count].lock);
  4832. mi2s_intf_conf[count].ref_cnt = 0;
  4833. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  4834. }
  4835. }
  4836. static int kona_ssr_enable(struct device *dev, void *data)
  4837. {
  4838. struct platform_device *pdev = to_platform_device(dev);
  4839. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4840. int ret = 0;
  4841. if (!card) {
  4842. dev_err(dev, "%s: card is NULL\n", __func__);
  4843. ret = -EINVAL;
  4844. goto err;
  4845. }
  4846. if (!strcmp(card->name, "kona-stub-snd-card")) {
  4847. /* TODO */
  4848. dev_dbg(dev, "%s: TODO \n", __func__);
  4849. }
  4850. snd_soc_card_change_online_state(card, 1);
  4851. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  4852. err:
  4853. return ret;
  4854. }
  4855. static void kona_ssr_disable(struct device *dev, void *data)
  4856. {
  4857. struct platform_device *pdev = to_platform_device(dev);
  4858. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4859. if (!card) {
  4860. dev_err(dev, "%s: card is NULL\n", __func__);
  4861. return;
  4862. }
  4863. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  4864. snd_soc_card_change_online_state(card, 0);
  4865. if (!strcmp(card->name, "kona-stub-snd-card")) {
  4866. /* TODO */
  4867. dev_dbg(dev, "%s: TODO \n", __func__);
  4868. }
  4869. }
  4870. static const struct snd_event_ops kona_ssr_ops = {
  4871. .enable = kona_ssr_enable,
  4872. .disable = kona_ssr_disable,
  4873. };
  4874. static int msm_audio_ssr_compare(struct device *dev, void *data)
  4875. {
  4876. struct device_node *node = data;
  4877. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  4878. __func__, dev->of_node, node);
  4879. return (dev->of_node && dev->of_node == node);
  4880. }
  4881. static int msm_audio_ssr_register(struct device *dev)
  4882. {
  4883. struct device_node *np = dev->of_node;
  4884. struct snd_event_clients *ssr_clients = NULL;
  4885. struct device_node *node = NULL;
  4886. int ret = 0;
  4887. int i = 0;
  4888. for (i = 0; ; i++) {
  4889. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  4890. if (!node)
  4891. break;
  4892. snd_event_mstr_add_client(&ssr_clients,
  4893. msm_audio_ssr_compare, node);
  4894. }
  4895. ret = snd_event_master_register(dev, &kona_ssr_ops,
  4896. ssr_clients, NULL);
  4897. if (!ret)
  4898. snd_event_notify(dev, SND_EVENT_UP);
  4899. return ret;
  4900. }
  4901. static int msm_asoc_machine_probe(struct platform_device *pdev)
  4902. {
  4903. struct snd_soc_card *card = NULL;
  4904. struct msm_asoc_mach_data *pdata = NULL;
  4905. const char *mbhc_audio_jack_type = NULL;
  4906. int ret = 0;
  4907. if (!pdev->dev.of_node) {
  4908. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  4909. return -EINVAL;
  4910. }
  4911. pdata = devm_kzalloc(&pdev->dev,
  4912. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  4913. if (!pdata)
  4914. return -ENOMEM;
  4915. card = populate_snd_card_dailinks(&pdev->dev);
  4916. if (!card) {
  4917. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  4918. ret = -EINVAL;
  4919. goto err;
  4920. }
  4921. card->dev = &pdev->dev;
  4922. platform_set_drvdata(pdev, card);
  4923. snd_soc_card_set_drvdata(card, pdata);
  4924. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  4925. if (ret) {
  4926. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  4927. __func__, ret);
  4928. goto err;
  4929. }
  4930. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  4931. if (ret) {
  4932. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  4933. __func__, ret);
  4934. goto err;
  4935. }
  4936. ret = msm_populate_dai_link_component_of_node(card);
  4937. if (ret) {
  4938. ret = -EPROBE_DEFER;
  4939. goto err;
  4940. }
  4941. ret = msm_init_aux_dev(pdev, card);
  4942. if (ret)
  4943. goto err;
  4944. ret = devm_snd_soc_register_card(&pdev->dev, card);
  4945. if (ret == -EPROBE_DEFER) {
  4946. if (codec_reg_done)
  4947. ret = -EINVAL;
  4948. goto err;
  4949. } else if (ret) {
  4950. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  4951. __func__, ret);
  4952. goto err;
  4953. }
  4954. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  4955. __func__, card->name);
  4956. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4957. "qcom,hph-en1-gpio", 0);
  4958. if (!pdata->hph_en1_gpio_p) {
  4959. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  4960. __func__, "qcom,hph-en1-gpio",
  4961. pdev->dev.of_node->full_name);
  4962. }
  4963. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4964. "qcom,hph-en0-gpio", 0);
  4965. if (!pdata->hph_en0_gpio_p) {
  4966. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  4967. __func__, "qcom,hph-en0-gpio",
  4968. pdev->dev.of_node->full_name);
  4969. }
  4970. ret = of_property_read_string(pdev->dev.of_node,
  4971. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  4972. if (ret) {
  4973. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  4974. __func__, "qcom,mbhc-audio-jack-type",
  4975. pdev->dev.of_node->full_name);
  4976. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  4977. } else {
  4978. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  4979. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  4980. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  4981. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  4982. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  4983. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  4984. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  4985. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  4986. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  4987. } else {
  4988. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  4989. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  4990. }
  4991. }
  4992. msm_i2s_auxpcm_init(pdev);
  4993. if (strcmp(card->name, "kona-mtp-snd-card")) {
  4994. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4995. "qcom,cdc-dmic01-gpios",
  4996. 0);
  4997. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4998. "qcom,cdc-dmic23-gpios",
  4999. 0);
  5000. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5001. "qcom,cdc-dmic45-gpios",
  5002. 0);
  5003. }
  5004. ret = msm_audio_ssr_register(&pdev->dev);
  5005. if (ret)
  5006. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5007. __func__, ret);
  5008. is_initial_boot = true;
  5009. return 0;
  5010. err:
  5011. devm_kfree(&pdev->dev, pdata);
  5012. return ret;
  5013. }
  5014. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5015. {
  5016. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5017. snd_event_master_deregister(&pdev->dev);
  5018. snd_soc_unregister_card(card);
  5019. msm_i2s_auxpcm_deinit();
  5020. return 0;
  5021. }
  5022. static struct platform_driver kona_asoc_machine_driver = {
  5023. .driver = {
  5024. .name = DRV_NAME,
  5025. .owner = THIS_MODULE,
  5026. .pm = &snd_soc_pm_ops,
  5027. .of_match_table = kona_asoc_machine_of_match,
  5028. },
  5029. .probe = msm_asoc_machine_probe,
  5030. .remove = msm_asoc_machine_remove,
  5031. };
  5032. module_platform_driver(kona_asoc_machine_driver);
  5033. MODULE_DESCRIPTION("ALSA SoC msm");
  5034. MODULE_LICENSE("GPL v2");
  5035. MODULE_ALIAS("platform:" DRV_NAME);
  5036. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);