dsi_panel.c 124 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. /**
  19. * topology is currently defined by a set of following 3 values:
  20. * 1. num of layer mixers
  21. * 2. num of compression encoders
  22. * 3. num of interfaces
  23. */
  24. #define TOPOLOGY_SET_LEN 3
  25. #define MAX_TOPOLOGY 5
  26. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  27. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  28. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  29. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  30. #define MAX_PANEL_JITTER 10
  31. #define DEFAULT_PANEL_PREFILL_LINES 25
  32. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  33. #define MIN_PREFILL_LINES 40
  34. #define RSCC_MODE_THRESHOLD_TIME_US 40
  35. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  36. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  37. {
  38. char *bp;
  39. bp = buf;
  40. /* First 7 bytes are cmd header */
  41. *bp++ = 0x0A;
  42. *bp++ = 1;
  43. *bp++ = 0;
  44. *bp++ = 0;
  45. *bp++ = pps_delay_ms;
  46. *bp++ = 0;
  47. *bp++ = 128;
  48. }
  49. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  50. char *buf, int pps_id, u32 size)
  51. {
  52. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  53. buf += DSI_CMD_PPS_HDR_SIZE;
  54. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  55. size);
  56. }
  57. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  58. char *buf, int pps_id, u32 size)
  59. {
  60. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  61. buf += DSI_CMD_PPS_HDR_SIZE;
  62. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  63. size);
  64. }
  65. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  66. {
  67. int rc = 0;
  68. int i;
  69. struct regulator *vreg = NULL;
  70. for (i = 0; i < panel->power_info.count; i++) {
  71. vreg = devm_regulator_get(panel->parent,
  72. panel->power_info.vregs[i].vreg_name);
  73. rc = PTR_ERR_OR_ZERO(vreg);
  74. if (rc) {
  75. DSI_ERR("failed to get %s regulator\n",
  76. panel->power_info.vregs[i].vreg_name);
  77. goto error_put;
  78. }
  79. panel->power_info.vregs[i].vreg = vreg;
  80. }
  81. return rc;
  82. error_put:
  83. for (i = i - 1; i >= 0; i--) {
  84. devm_regulator_put(panel->power_info.vregs[i].vreg);
  85. panel->power_info.vregs[i].vreg = NULL;
  86. }
  87. return rc;
  88. }
  89. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  90. {
  91. int rc = 0;
  92. int i;
  93. for (i = panel->power_info.count - 1; i >= 0; i--)
  94. devm_regulator_put(panel->power_info.vregs[i].vreg);
  95. return rc;
  96. }
  97. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  98. {
  99. int rc = 0;
  100. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  101. if (gpio_is_valid(r_config->reset_gpio)) {
  102. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  103. if (rc) {
  104. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  105. goto error;
  106. }
  107. }
  108. if (gpio_is_valid(r_config->disp_en_gpio)) {
  109. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  110. if (rc) {
  111. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  112. goto error_release_reset;
  113. }
  114. }
  115. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  116. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  117. if (rc) {
  118. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  119. goto error_release_disp_en;
  120. }
  121. }
  122. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  123. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  124. if (rc) {
  125. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  126. goto error_release_mode_sel;
  127. }
  128. }
  129. if (gpio_is_valid(panel->panel_test_gpio)) {
  130. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  131. if (rc) {
  132. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  133. rc);
  134. panel->panel_test_gpio = -1;
  135. rc = 0;
  136. }
  137. }
  138. goto error;
  139. error_release_mode_sel:
  140. if (gpio_is_valid(panel->bl_config.en_gpio))
  141. gpio_free(panel->bl_config.en_gpio);
  142. error_release_disp_en:
  143. if (gpio_is_valid(r_config->disp_en_gpio))
  144. gpio_free(r_config->disp_en_gpio);
  145. error_release_reset:
  146. if (gpio_is_valid(r_config->reset_gpio))
  147. gpio_free(r_config->reset_gpio);
  148. error:
  149. return rc;
  150. }
  151. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  152. {
  153. int rc = 0;
  154. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  155. if (gpio_is_valid(r_config->reset_gpio))
  156. gpio_free(r_config->reset_gpio);
  157. if (gpio_is_valid(r_config->disp_en_gpio))
  158. gpio_free(r_config->disp_en_gpio);
  159. if (gpio_is_valid(panel->bl_config.en_gpio))
  160. gpio_free(panel->bl_config.en_gpio);
  161. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  162. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  163. if (gpio_is_valid(panel->panel_test_gpio))
  164. gpio_free(panel->panel_test_gpio);
  165. return rc;
  166. }
  167. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  168. {
  169. if (!gpio_is_valid(reset_gpio)) {
  170. DSI_INFO("failed to pull down the reset gpio\n");
  171. return -EINVAL;
  172. }
  173. gpio_set_value(reset_gpio, 0);
  174. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  175. DSI_INFO("GPIO pulled low to simulate ESD\n");
  176. return 0;
  177. }
  178. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  179. {
  180. struct dsi_parser_utils *utils = &panel->utils;
  181. int reset_gpio;
  182. int rc = 0;
  183. reset_gpio = utils->get_named_gpio(utils->data,
  184. "qcom,platform-reset-gpio", 0);
  185. if (!gpio_is_valid(reset_gpio)) {
  186. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  187. return -EINVAL;
  188. }
  189. rc = gpio_request(reset_gpio, "reset_gpio");
  190. if (rc) {
  191. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  192. return rc;
  193. }
  194. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  195. gpio_free(reset_gpio);
  196. return rc;
  197. }
  198. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  199. {
  200. struct dsi_panel_reset_config *r_config;
  201. if (!panel) {
  202. DSI_ERR("Invalid panel param\n");
  203. return -EINVAL;
  204. }
  205. r_config = &panel->reset_config;
  206. if (!r_config) {
  207. DSI_ERR("Invalid panel reset configuration\n");
  208. return -EINVAL;
  209. }
  210. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  211. }
  212. static int dsi_panel_reset(struct dsi_panel *panel)
  213. {
  214. int rc = 0;
  215. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  216. int i;
  217. if (!gpio_is_valid(r_config->reset_gpio))
  218. goto skip_reset_gpio;
  219. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  220. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. if (r_config->count) {
  227. rc = gpio_direction_output(r_config->reset_gpio,
  228. r_config->sequence[0].level);
  229. if (rc) {
  230. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  231. goto exit;
  232. }
  233. }
  234. for (i = 0; i < r_config->count; i++) {
  235. gpio_set_value(r_config->reset_gpio,
  236. r_config->sequence[i].level);
  237. if (r_config->sequence[i].sleep_ms)
  238. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  239. (r_config->sequence[i].sleep_ms * 1000) + 100);
  240. }
  241. skip_reset_gpio:
  242. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  243. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  244. if (rc)
  245. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  246. }
  247. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  248. bool out = true;
  249. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  250. || (panel->reset_config.mode_sel_state
  251. == MODE_GPIO_LOW))
  252. out = false;
  253. else if ((panel->reset_config.mode_sel_state
  254. == MODE_SEL_SINGLE_PORT) ||
  255. (panel->reset_config.mode_sel_state
  256. == MODE_GPIO_HIGH))
  257. out = true;
  258. rc = gpio_direction_output(
  259. panel->reset_config.lcd_mode_sel_gpio, out);
  260. if (rc)
  261. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  262. }
  263. if (gpio_is_valid(panel->panel_test_gpio)) {
  264. rc = gpio_direction_input(panel->panel_test_gpio);
  265. if (rc)
  266. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  267. rc);
  268. }
  269. exit:
  270. return rc;
  271. }
  272. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  273. {
  274. int rc = 0;
  275. struct pinctrl_state *state;
  276. if (panel->host_config.ext_bridge_mode)
  277. return 0;
  278. if (!panel->pinctrl.pinctrl)
  279. return 0;
  280. if (enable)
  281. state = panel->pinctrl.active;
  282. else
  283. state = panel->pinctrl.suspend;
  284. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  285. if (rc)
  286. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  287. panel->name, rc);
  288. return rc;
  289. }
  290. static int dsi_panel_power_on(struct dsi_panel *panel)
  291. {
  292. int rc = 0;
  293. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  296. panel->name, rc);
  297. goto exit;
  298. }
  299. rc = dsi_panel_set_pinctrl_state(panel, true);
  300. if (rc) {
  301. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  302. goto error_disable_vregs;
  303. }
  304. rc = dsi_panel_reset(panel);
  305. if (rc) {
  306. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  307. goto error_disable_gpio;
  308. }
  309. goto exit;
  310. error_disable_gpio:
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->bl_config.en_gpio))
  314. gpio_set_value(panel->bl_config.en_gpio, 0);
  315. (void)dsi_panel_set_pinctrl_state(panel, false);
  316. error_disable_vregs:
  317. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  318. exit:
  319. return rc;
  320. }
  321. static int dsi_panel_power_off(struct dsi_panel *panel)
  322. {
  323. int rc = 0;
  324. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  325. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  326. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  327. !panel->reset_gpio_always_on)
  328. gpio_set_value(panel->reset_config.reset_gpio, 0);
  329. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  330. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  331. if (gpio_is_valid(panel->panel_test_gpio)) {
  332. rc = gpio_direction_input(panel->panel_test_gpio);
  333. if (rc)
  334. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  335. rc);
  336. }
  337. rc = dsi_panel_set_pinctrl_state(panel, false);
  338. if (rc) {
  339. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  340. rc);
  341. }
  342. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  343. if (rc)
  344. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  345. panel->name, rc);
  346. return rc;
  347. }
  348. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  349. enum dsi_cmd_set_type type)
  350. {
  351. int rc = 0, i = 0;
  352. ssize_t len;
  353. struct dsi_cmd_desc *cmds;
  354. u32 count;
  355. enum dsi_cmd_set_state state;
  356. struct dsi_display_mode *mode;
  357. if (!panel || !panel->cur_mode)
  358. return -EINVAL;
  359. mode = panel->cur_mode;
  360. cmds = mode->priv_info->cmd_sets[type].cmds;
  361. count = mode->priv_info->cmd_sets[type].count;
  362. state = mode->priv_info->cmd_sets[type].state;
  363. SDE_EVT32(type, state, count);
  364. if (count == 0) {
  365. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  366. panel->name, type);
  367. goto error;
  368. }
  369. for (i = 0; i < count; i++) {
  370. cmds->ctrl_flags = 0;
  371. if (state == DSI_CMD_SET_STATE_LP)
  372. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  373. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  374. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  375. len = dsi_host_transfer_sub(panel->host, cmds);
  376. if (len < 0) {
  377. rc = len;
  378. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  379. goto error;
  380. }
  381. if (cmds->post_wait_ms)
  382. usleep_range(cmds->post_wait_ms*1000,
  383. ((cmds->post_wait_ms*1000)+10));
  384. cmds++;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  390. {
  391. int rc = 0;
  392. if (panel->host_config.ext_bridge_mode)
  393. return 0;
  394. devm_pinctrl_put(panel->pinctrl.pinctrl);
  395. return rc;
  396. }
  397. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (panel->host_config.ext_bridge_mode)
  401. return 0;
  402. /* TODO: pinctrl is defined in dsi dt node */
  403. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  404. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  405. rc = PTR_ERR(panel->pinctrl.pinctrl);
  406. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  410. "panel_active");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  412. rc = PTR_ERR(panel->pinctrl.active);
  413. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  414. goto error;
  415. }
  416. panel->pinctrl.suspend =
  417. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  418. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  419. rc = PTR_ERR(panel->pinctrl.suspend);
  420. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  421. goto error;
  422. }
  423. panel->pinctrl.pwm_pin =
  424. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  425. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  426. panel->pinctrl.pwm_pin = NULL;
  427. DSI_DEBUG("failed to get pinctrl pwm_pin");
  428. }
  429. error:
  430. return rc;
  431. }
  432. static int dsi_panel_wled_register(struct dsi_panel *panel,
  433. struct dsi_backlight_config *bl)
  434. {
  435. struct backlight_device *bd;
  436. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  437. if (!bd) {
  438. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  439. panel->name, -EPROBE_DEFER);
  440. return -EPROBE_DEFER;
  441. }
  442. bl->raw_bd = bd;
  443. return 0;
  444. }
  445. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  446. u32 bl_lvl)
  447. {
  448. int rc = 0;
  449. unsigned long mode_flags = 0;
  450. struct mipi_dsi_device *dsi = NULL;
  451. if (!panel || (bl_lvl > 0xffff)) {
  452. DSI_ERR("invalid params\n");
  453. return -EINVAL;
  454. }
  455. dsi = &panel->mipi_device;
  456. if (unlikely(panel->bl_config.lp_mode)) {
  457. mode_flags = dsi->mode_flags;
  458. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  459. }
  460. if (panel->bl_config.bl_inverted_dbv)
  461. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  462. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  463. if (rc < 0)
  464. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  465. if (unlikely(panel->bl_config.lp_mode))
  466. dsi->mode_flags = mode_flags;
  467. return rc;
  468. }
  469. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  470. u32 bl_lvl)
  471. {
  472. int rc = 0;
  473. u32 duty = 0;
  474. u32 period_ns = 0;
  475. struct dsi_backlight_config *bl;
  476. if (!panel) {
  477. DSI_ERR("Invalid Params\n");
  478. return -EINVAL;
  479. }
  480. bl = &panel->bl_config;
  481. if (!bl->pwm_bl) {
  482. DSI_ERR("pwm device not found\n");
  483. return -EINVAL;
  484. }
  485. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  486. duty = bl_lvl * period_ns;
  487. duty /= bl->bl_max_level;
  488. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  489. if (rc) {
  490. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  491. rc);
  492. goto error;
  493. }
  494. if (bl_lvl == 0 && bl->pwm_enabled) {
  495. pwm_disable(bl->pwm_bl);
  496. bl->pwm_enabled = false;
  497. return 0;
  498. }
  499. if (bl_lvl != 0 && !bl->pwm_enabled) {
  500. rc = pwm_enable(bl->pwm_bl);
  501. if (rc) {
  502. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  503. rc);
  504. goto error;
  505. }
  506. bl->pwm_enabled = true;
  507. }
  508. error:
  509. return rc;
  510. }
  511. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  512. {
  513. int rc = 0;
  514. struct dsi_backlight_config *bl = &panel->bl_config;
  515. if (panel->host_config.ext_bridge_mode)
  516. return 0;
  517. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  518. switch (bl->type) {
  519. case DSI_BACKLIGHT_WLED:
  520. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  521. break;
  522. case DSI_BACKLIGHT_DCS:
  523. rc = dsi_panel_update_backlight(panel, bl_lvl);
  524. break;
  525. case DSI_BACKLIGHT_EXTERNAL:
  526. break;
  527. case DSI_BACKLIGHT_PWM:
  528. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  529. break;
  530. default:
  531. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  532. rc = -ENOTSUPP;
  533. }
  534. return rc;
  535. }
  536. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  537. {
  538. u32 cur_bl_level;
  539. struct backlight_device *bd = bl->raw_bd;
  540. /* default the brightness level to 50% */
  541. cur_bl_level = bl->bl_max_level >> 1;
  542. switch (bl->type) {
  543. case DSI_BACKLIGHT_WLED:
  544. /* Try to query the backlight level from the backlight device */
  545. if (bd->ops && bd->ops->get_brightness)
  546. cur_bl_level = bd->ops->get_brightness(bd);
  547. break;
  548. case DSI_BACKLIGHT_DCS:
  549. case DSI_BACKLIGHT_EXTERNAL:
  550. case DSI_BACKLIGHT_PWM:
  551. default:
  552. /*
  553. * Ideally, we should read the backlight level from the
  554. * panel. For now, just set it default value.
  555. */
  556. break;
  557. }
  558. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  559. return cur_bl_level;
  560. }
  561. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  562. {
  563. struct dsi_backlight_config *bl = &panel->bl_config;
  564. bl->bl_level = dsi_panel_get_brightness(bl);
  565. }
  566. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  567. {
  568. int rc = 0;
  569. struct dsi_backlight_config *bl = &panel->bl_config;
  570. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  571. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  572. rc = PTR_ERR(bl->pwm_bl);
  573. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  574. rc);
  575. return rc;
  576. }
  577. if (panel->pinctrl.pwm_pin) {
  578. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  579. panel->pinctrl.pwm_pin);
  580. if (rc)
  581. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  582. panel->name, rc);
  583. }
  584. return 0;
  585. }
  586. static int dsi_panel_bl_register(struct dsi_panel *panel)
  587. {
  588. int rc = 0;
  589. struct dsi_backlight_config *bl = &panel->bl_config;
  590. if (panel->host_config.ext_bridge_mode)
  591. return 0;
  592. switch (bl->type) {
  593. case DSI_BACKLIGHT_WLED:
  594. rc = dsi_panel_wled_register(panel, bl);
  595. break;
  596. case DSI_BACKLIGHT_DCS:
  597. break;
  598. case DSI_BACKLIGHT_EXTERNAL:
  599. break;
  600. case DSI_BACKLIGHT_PWM:
  601. rc = dsi_panel_pwm_register(panel);
  602. break;
  603. default:
  604. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  605. rc = -ENOTSUPP;
  606. goto error;
  607. }
  608. error:
  609. return rc;
  610. }
  611. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  612. {
  613. int rc = 0;
  614. struct dsi_backlight_config *bl = &panel->bl_config;
  615. if (panel->host_config.ext_bridge_mode)
  616. return 0;
  617. switch (bl->type) {
  618. case DSI_BACKLIGHT_WLED:
  619. break;
  620. case DSI_BACKLIGHT_DCS:
  621. break;
  622. case DSI_BACKLIGHT_EXTERNAL:
  623. break;
  624. case DSI_BACKLIGHT_PWM:
  625. break;
  626. default:
  627. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  628. rc = -ENOTSUPP;
  629. goto error;
  630. }
  631. error:
  632. return rc;
  633. }
  634. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  635. struct dsi_parser_utils *utils)
  636. {
  637. int rc = 0;
  638. u64 tmp64 = 0;
  639. struct dsi_display_mode *display_mode;
  640. struct dsi_display_mode_priv_info *priv_info;
  641. u32 usecs_fps = 0;
  642. display_mode = container_of(mode, struct dsi_display_mode, timing);
  643. priv_info = display_mode->priv_info;
  644. rc = utils->read_u64(utils->data,
  645. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  646. if (rc == -EOVERFLOW) {
  647. tmp64 = 0;
  648. rc = utils->read_u32(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  650. }
  651. mode->clk_rate_hz = !rc ? tmp64 : 0;
  652. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  653. mode->pclk_scale.numer = 1;
  654. mode->pclk_scale.denom = 1;
  655. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  656. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  657. &mode->mdp_transfer_time_us);
  658. if (rc)
  659. mode->mdp_transfer_time_us = 0;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-min",
  661. &priv_info->mdp_transfer_time_us_min);
  662. if (rc)
  663. priv_info->mdp_transfer_time_us_min = 0;
  664. else if (!rc && mode->mdp_transfer_time_us < priv_info->mdp_transfer_time_us_min)
  665. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_min;
  666. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-max",
  667. &priv_info->mdp_transfer_time_us_max);
  668. if (rc)
  669. priv_info->mdp_transfer_time_us_max = 0;
  670. else if (!rc && mode->mdp_transfer_time_us > priv_info->mdp_transfer_time_us_max)
  671. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_max;
  672. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  673. rc = utils->read_u32(utils->data,
  674. "qcom,mdss-dsi-panel-framerate",
  675. &mode->refresh_rate);
  676. if (rc) {
  677. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  678. rc);
  679. goto error;
  680. }
  681. usecs_fps = DIV_ROUND_UP((1 * 1000 * 1000), mode->refresh_rate);
  682. if (mode->mdp_transfer_time_us > usecs_fps)
  683. mode->mdp_transfer_time_us = 0;
  684. priv_info->mdp_transfer_time_us = mode->mdp_transfer_time_us;
  685. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  686. &mode->h_active);
  687. if (rc) {
  688. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  689. rc);
  690. goto error;
  691. }
  692. rc = utils->read_u32(utils->data,
  693. "qcom,mdss-dsi-h-front-porch",
  694. &mode->h_front_porch);
  695. if (rc) {
  696. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  697. rc);
  698. goto error;
  699. }
  700. rc = utils->read_u32(utils->data,
  701. "qcom,mdss-dsi-h-back-porch",
  702. &mode->h_back_porch);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data,
  709. "qcom,mdss-dsi-h-pulse-width",
  710. &mode->h_sync_width);
  711. if (rc) {
  712. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  713. rc);
  714. goto error;
  715. }
  716. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  717. &mode->h_skew);
  718. if (rc)
  719. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  720. rc);
  721. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  722. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  723. mode->h_sync_width);
  724. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  725. &mode->v_active);
  726. if (rc) {
  727. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  728. rc);
  729. goto error;
  730. }
  731. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  732. &mode->v_back_porch);
  733. if (rc) {
  734. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  735. rc);
  736. goto error;
  737. }
  738. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  739. &mode->v_front_porch);
  740. if (rc) {
  741. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  742. rc);
  743. goto error;
  744. }
  745. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  746. &mode->v_sync_width);
  747. if (rc) {
  748. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  749. rc);
  750. goto error;
  751. }
  752. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  753. if (rc) {
  754. DSI_DEBUG("qsync min fps not defined in timing node\n");
  755. rc = 0;
  756. }
  757. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  758. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  759. mode->v_sync_width);
  760. error:
  761. return rc;
  762. }
  763. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  764. struct dsi_parser_utils *utils,
  765. const char *name)
  766. {
  767. int rc = 0;
  768. u32 bpp = 0;
  769. enum dsi_pixel_format fmt;
  770. const char *packing;
  771. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  772. if (rc) {
  773. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  774. name, rc);
  775. return rc;
  776. }
  777. host->bpp = bpp;
  778. switch (bpp) {
  779. case 3:
  780. fmt = DSI_PIXEL_FORMAT_RGB111;
  781. break;
  782. case 8:
  783. fmt = DSI_PIXEL_FORMAT_RGB332;
  784. break;
  785. case 12:
  786. fmt = DSI_PIXEL_FORMAT_RGB444;
  787. break;
  788. case 16:
  789. fmt = DSI_PIXEL_FORMAT_RGB565;
  790. break;
  791. case 18:
  792. fmt = DSI_PIXEL_FORMAT_RGB666;
  793. break;
  794. case 30:
  795. fmt = DSI_PIXEL_FORMAT_RGB101010;
  796. break;
  797. case 24:
  798. default:
  799. fmt = DSI_PIXEL_FORMAT_RGB888;
  800. break;
  801. }
  802. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  803. packing = utils->get_property(utils->data,
  804. "qcom,mdss-dsi-pixel-packing",
  805. NULL);
  806. if (packing && !strcmp(packing, "loose"))
  807. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  808. }
  809. host->dst_format = fmt;
  810. return rc;
  811. }
  812. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  813. struct dsi_parser_utils *utils,
  814. const char *name)
  815. {
  816. int rc = 0;
  817. bool lane_enabled;
  818. u32 num_of_lanes = 0;
  819. lane_enabled = utils->read_bool(utils->data,
  820. "qcom,mdss-dsi-lane-0-state");
  821. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  822. lane_enabled = utils->read_bool(utils->data,
  823. "qcom,mdss-dsi-lane-1-state");
  824. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  825. lane_enabled = utils->read_bool(utils->data,
  826. "qcom,mdss-dsi-lane-2-state");
  827. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  828. lane_enabled = utils->read_bool(utils->data,
  829. "qcom,mdss-dsi-lane-3-state");
  830. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  831. if (host->data_lanes & DSI_DATA_LANE_0)
  832. num_of_lanes++;
  833. if (host->data_lanes & DSI_DATA_LANE_1)
  834. num_of_lanes++;
  835. if (host->data_lanes & DSI_DATA_LANE_2)
  836. num_of_lanes++;
  837. if (host->data_lanes & DSI_DATA_LANE_3)
  838. num_of_lanes++;
  839. host->num_data_lanes = num_of_lanes;
  840. if (host->data_lanes == 0) {
  841. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  842. rc = -EINVAL;
  843. }
  844. return rc;
  845. }
  846. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  847. struct dsi_parser_utils *utils,
  848. const char *name)
  849. {
  850. int rc = 0;
  851. const char *swap_mode;
  852. swap_mode = utils->get_property(utils->data,
  853. "qcom,mdss-dsi-color-order", NULL);
  854. if (swap_mode) {
  855. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  856. host->swap_mode = DSI_COLOR_SWAP_RGB;
  857. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  858. host->swap_mode = DSI_COLOR_SWAP_RBG;
  859. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  860. host->swap_mode = DSI_COLOR_SWAP_BRG;
  861. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  862. host->swap_mode = DSI_COLOR_SWAP_GRB;
  863. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  864. host->swap_mode = DSI_COLOR_SWAP_GBR;
  865. } else {
  866. DSI_ERR("[%s] Unrecognized color order-%s\n",
  867. name, swap_mode);
  868. rc = -EINVAL;
  869. }
  870. } else {
  871. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  872. host->swap_mode = DSI_COLOR_SWAP_RGB;
  873. }
  874. /* bit swap on color channel is not defined in dt */
  875. host->bit_swap_red = false;
  876. host->bit_swap_green = false;
  877. host->bit_swap_blue = false;
  878. return rc;
  879. }
  880. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  881. struct dsi_parser_utils *utils,
  882. const char *name)
  883. {
  884. const char *trig;
  885. int rc = 0;
  886. trig = utils->get_property(utils->data,
  887. "qcom,mdss-dsi-mdp-trigger", NULL);
  888. if (trig) {
  889. if (!strcmp(trig, "none")) {
  890. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  891. } else if (!strcmp(trig, "trigger_te")) {
  892. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  893. } else if (!strcmp(trig, "trigger_sw")) {
  894. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  895. } else if (!strcmp(trig, "trigger_sw_te")) {
  896. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  897. } else {
  898. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  899. name, trig);
  900. rc = -EINVAL;
  901. }
  902. } else {
  903. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  904. name);
  905. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  906. }
  907. trig = utils->get_property(utils->data,
  908. "qcom,mdss-dsi-dma-trigger", NULL);
  909. if (trig) {
  910. if (!strcmp(trig, "none")) {
  911. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  912. } else if (!strcmp(trig, "trigger_te")) {
  913. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  914. } else if (!strcmp(trig, "trigger_sw")) {
  915. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  916. } else if (!strcmp(trig, "trigger_sw_seof")) {
  917. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  918. } else if (!strcmp(trig, "trigger_sw_te")) {
  919. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  920. } else {
  921. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  922. name, trig);
  923. rc = -EINVAL;
  924. }
  925. } else {
  926. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  927. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  928. }
  929. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  930. &host->te_mode);
  931. if (rc) {
  932. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  933. host->te_mode = 1;
  934. rc = 0;
  935. }
  936. return rc;
  937. }
  938. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  939. struct dsi_parser_utils *utils,
  940. const char *name)
  941. {
  942. u32 val = 0, line_no = 0, window = 0;
  943. int rc = 0;
  944. bool panel_cphy_mode = false;
  945. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  946. if (!rc) {
  947. host->t_clk_post = val;
  948. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  949. }
  950. val = 0;
  951. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  952. if (!rc) {
  953. host->t_clk_pre = val;
  954. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  955. }
  956. host->ignore_rx_eot = utils->read_bool(utils->data,
  957. "qcom,mdss-dsi-rx-eot-ignore");
  958. host->append_tx_eot = utils->read_bool(utils->data,
  959. "qcom,mdss-dsi-tx-eot-append");
  960. host->ext_bridge_mode = utils->read_bool(utils->data,
  961. "qcom,mdss-dsi-ext-bridge-mode");
  962. host->force_hs_clk_lane = utils->read_bool(utils->data,
  963. "qcom,mdss-dsi-force-clock-lane-hs");
  964. panel_cphy_mode = utils->read_bool(utils->data,
  965. "qcom,panel-cphy-mode");
  966. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  967. : DSI_PHY_TYPE_DPHY;
  968. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  969. &line_no);
  970. if (rc)
  971. host->dma_sched_line = 0;
  972. else
  973. host->dma_sched_line = line_no;
  974. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  975. &window);
  976. if (rc)
  977. host->dma_sched_window = 0;
  978. else
  979. host->dma_sched_window = window;
  980. rc = utils->read_u32(utils->data, "qcom,vert-padding-value", &host->vpadding);
  981. host->line_insertion_enable = (rc || host->vpadding <= 0) ? false : true;
  982. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  983. host->dma_sched_line, host->dma_sched_window);
  984. return 0;
  985. }
  986. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  987. struct dsi_parser_utils *utils,
  988. const char *name)
  989. {
  990. int rc = 0;
  991. u32 val = 0;
  992. bool supported = false;
  993. struct dsi_split_link_config *split_link = &host->split_link;
  994. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  995. if (!supported) {
  996. DSI_DEBUG("[%s] Split link is not supported\n", name);
  997. split_link->enabled = false;
  998. return;
  999. }
  1000. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1001. if (rc || val < 1) {
  1002. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1003. split_link->num_sublinks = 2;
  1004. } else {
  1005. split_link->num_sublinks = val;
  1006. }
  1007. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1008. if (rc || val < 1) {
  1009. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1010. split_link->lanes_per_sublink = 2;
  1011. } else {
  1012. split_link->lanes_per_sublink = val;
  1013. }
  1014. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1015. if (!supported)
  1016. split_link->sublink_swap = false;
  1017. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1018. split_link->num_sublinks, split_link->lanes_per_sublink);
  1019. split_link->enabled = true;
  1020. }
  1021. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1022. {
  1023. int rc = 0;
  1024. struct dsi_parser_utils *utils = &panel->utils;
  1025. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1026. panel->name);
  1027. if (rc) {
  1028. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1029. panel->name, rc);
  1030. goto error;
  1031. }
  1032. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1033. panel->name);
  1034. if (rc) {
  1035. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1036. panel->name, rc);
  1037. goto error;
  1038. }
  1039. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1040. panel->name);
  1041. if (rc) {
  1042. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1043. panel->name, rc);
  1044. goto error;
  1045. }
  1046. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1047. panel->name);
  1048. if (rc) {
  1049. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1050. panel->name, rc);
  1051. goto error;
  1052. }
  1053. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1054. panel->name);
  1055. if (rc) {
  1056. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1057. panel->name, rc);
  1058. goto error;
  1059. }
  1060. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1061. panel->name);
  1062. error:
  1063. return rc;
  1064. }
  1065. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1066. struct device_node *of_node)
  1067. {
  1068. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1069. struct dsi_parser_utils *utils = &panel->utils;
  1070. int val, rc = 0;
  1071. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1072. if (val <= 0) {
  1073. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1074. return rc;
  1075. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1076. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1077. val, panel->dfps_caps.dfps_list_len);
  1078. return -EINVAL;
  1079. }
  1080. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1081. if (!avr_caps->avr_step_fps_list)
  1082. return -ENOMEM;
  1083. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1084. avr_caps->avr_step_fps_list, val);
  1085. if (rc) {
  1086. kfree(avr_caps->avr_step_fps_list);
  1087. return rc;
  1088. }
  1089. avr_caps->avr_step_fps_list_len = val;
  1090. return rc;
  1091. }
  1092. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1093. struct device_node *of_node)
  1094. {
  1095. int rc = 0;
  1096. u32 val = 0, i;
  1097. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1098. struct dsi_parser_utils *utils = &panel->utils;
  1099. const char *name = panel->name;
  1100. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1101. if (!qsync_caps->qsync_support) {
  1102. DSI_DEBUG("qsync feature not enabled\n");
  1103. goto error;
  1104. }
  1105. /**
  1106. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1107. * video mode when there is only one qsync min fps present.
  1108. */
  1109. rc = of_property_read_u32(of_node,
  1110. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1111. &val);
  1112. if (rc)
  1113. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1114. panel->name, rc);
  1115. qsync_caps->qsync_min_fps = val;
  1116. /**
  1117. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1118. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1119. * is defined.
  1120. */
  1121. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1122. "qcom,dsi-supported-qsync-min-fps-list");
  1123. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1124. qsync_caps->qsync_min_fps_list_len = 0;
  1125. goto qsync_support;
  1126. }
  1127. /**
  1128. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1129. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1130. */
  1131. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1132. qsync_caps->qsync_min_fps) {
  1133. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1134. name);
  1135. rc = -EINVAL;
  1136. goto error;
  1137. }
  1138. if (panel->dfps_caps.dfps_list_len !=
  1139. qsync_caps->qsync_min_fps_list_len) {
  1140. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1141. rc = -EINVAL;
  1142. goto error;
  1143. }
  1144. qsync_caps->qsync_min_fps_list =
  1145. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1146. GFP_KERNEL);
  1147. if (!qsync_caps->qsync_min_fps_list) {
  1148. rc = -ENOMEM;
  1149. goto error;
  1150. }
  1151. rc = utils->read_u32_array(utils->data,
  1152. "qcom,dsi-supported-qsync-min-fps-list",
  1153. qsync_caps->qsync_min_fps_list,
  1154. qsync_caps->qsync_min_fps_list_len);
  1155. if (rc) {
  1156. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1157. rc = -EINVAL;
  1158. goto error;
  1159. }
  1160. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1161. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1162. if (qsync_caps->qsync_min_fps_list[i] <
  1163. qsync_caps->qsync_min_fps)
  1164. qsync_caps->qsync_min_fps =
  1165. qsync_caps->qsync_min_fps_list[i];
  1166. }
  1167. qsync_support:
  1168. /* allow qsync support only if DFPS is with VFP approach */
  1169. if ((panel->dfps_caps.dfps_support) &&
  1170. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1171. qsync_caps->qsync_support = false;
  1172. qsync_caps->qsync_min_fps = 0;
  1173. }
  1174. error:
  1175. if (rc < 0) {
  1176. qsync_caps->qsync_min_fps = 0;
  1177. qsync_caps->qsync_min_fps_list_len = 0;
  1178. }
  1179. return rc;
  1180. }
  1181. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1182. struct dsi_parser_utils *utils)
  1183. {
  1184. int i, rc = 0;
  1185. struct msm_dyn_clk_list *bit_clk_list;
  1186. if (!mode || !mode->priv_info) {
  1187. DSI_ERR("invalid arguments\n");
  1188. return -EINVAL;
  1189. }
  1190. bit_clk_list = &mode->priv_info->bit_clk_list;
  1191. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1192. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1193. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1194. return -EINVAL;
  1195. }
  1196. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1197. if (!bit_clk_list->rates) {
  1198. DSI_ERR("failed to allocate space for bit clock list\n");
  1199. rc = -ENOMEM;
  1200. goto error;
  1201. }
  1202. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1203. if (!bit_clk_list->front_porches) {
  1204. DSI_ERR("failed to allocate space for front porch list\n");
  1205. rc = -ENOMEM;
  1206. goto error;
  1207. }
  1208. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1209. if (!bit_clk_list->pixel_clks_khz) {
  1210. DSI_ERR("failed to allocate space for pclk list\n");
  1211. rc = -ENOMEM;
  1212. goto error;
  1213. }
  1214. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1215. bit_clk_list->rates, bit_clk_list->count);
  1216. if (rc) {
  1217. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1218. goto error;
  1219. }
  1220. for (i = 0; i < bit_clk_list->count; i++)
  1221. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1222. return 0;
  1223. error:
  1224. bit_clk_list->count = 0;
  1225. kfree(bit_clk_list->rates);
  1226. kfree(bit_clk_list->front_porches);
  1227. kfree(bit_clk_list->pixel_clks_khz);
  1228. return rc;
  1229. }
  1230. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1231. {
  1232. int rc = 0;
  1233. bool supported = false;
  1234. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1235. struct dsi_parser_utils *utils = &panel->utils;
  1236. const char *type;
  1237. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1238. if (!supported) {
  1239. dyn_clk_caps->dyn_clk_support = false;
  1240. return rc;
  1241. }
  1242. dyn_clk_caps->dyn_clk_support = true;
  1243. type = utils->get_property(utils->data,
  1244. "qcom,dsi-dyn-clk-type", NULL);
  1245. if (!type) {
  1246. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1247. dyn_clk_caps->maintain_const_fps = false;
  1248. return 0;
  1249. }
  1250. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1251. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1252. dyn_clk_caps->maintain_const_fps = true;
  1253. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1254. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1255. dyn_clk_caps->maintain_const_fps = true;
  1256. } else {
  1257. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1258. dyn_clk_caps->maintain_const_fps = false;
  1259. }
  1260. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1261. return 0;
  1262. }
  1263. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1264. {
  1265. int rc = 0;
  1266. bool supported = false;
  1267. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1268. struct dsi_parser_utils *utils = &panel->utils;
  1269. const char *name = panel->name;
  1270. const char *type;
  1271. u32 i;
  1272. supported = utils->read_bool(utils->data,
  1273. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1274. if (!supported) {
  1275. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1276. dfps_caps->dfps_support = false;
  1277. return rc;
  1278. }
  1279. type = utils->get_property(utils->data,
  1280. "qcom,mdss-dsi-pan-fps-update", NULL);
  1281. if (!type) {
  1282. DSI_ERR("[%s] dfps type not defined\n", name);
  1283. rc = -EINVAL;
  1284. goto error;
  1285. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1286. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1287. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1288. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1289. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1290. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1291. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1292. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1293. } else {
  1294. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1295. rc = -EINVAL;
  1296. goto error;
  1297. }
  1298. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1299. "qcom,dsi-supported-dfps-list");
  1300. if (dfps_caps->dfps_list_len < 1) {
  1301. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1302. rc = -EINVAL;
  1303. goto error;
  1304. }
  1305. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1306. GFP_KERNEL);
  1307. if (!dfps_caps->dfps_list) {
  1308. rc = -ENOMEM;
  1309. goto error;
  1310. }
  1311. rc = utils->read_u32_array(utils->data,
  1312. "qcom,dsi-supported-dfps-list",
  1313. dfps_caps->dfps_list,
  1314. dfps_caps->dfps_list_len);
  1315. if (rc) {
  1316. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1317. rc = -EINVAL;
  1318. goto error;
  1319. }
  1320. dfps_caps->dfps_support = true;
  1321. /* calculate max and min fps */
  1322. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1323. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1324. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1325. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1326. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1327. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1328. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1329. }
  1330. error:
  1331. return rc;
  1332. }
  1333. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1334. struct dsi_parser_utils *utils,
  1335. const char *name)
  1336. {
  1337. int rc = 0;
  1338. const char *traffic_mode;
  1339. u32 vc_id = 0;
  1340. u32 val = 0;
  1341. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1342. if (rc) {
  1343. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1344. cfg->pulse_mode_hsa_he = false;
  1345. } else if (val == 1) {
  1346. cfg->pulse_mode_hsa_he = true;
  1347. } else if (val == 0) {
  1348. cfg->pulse_mode_hsa_he = false;
  1349. } else {
  1350. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1351. name);
  1352. rc = -EINVAL;
  1353. goto error;
  1354. }
  1355. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1356. "qcom,mdss-dsi-hfp-power-mode");
  1357. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1358. "qcom,mdss-dsi-hbp-power-mode");
  1359. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1360. "qcom,mdss-dsi-hsa-power-mode");
  1361. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1362. "qcom,mdss-dsi-last-line-interleave");
  1363. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1364. "qcom,mdss-dsi-bllp-eof-power-mode");
  1365. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1366. "qcom,mdss-dsi-bllp-power-mode");
  1367. traffic_mode = utils->get_property(utils->data,
  1368. "qcom,mdss-dsi-traffic-mode",
  1369. NULL);
  1370. if (!traffic_mode) {
  1371. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1372. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1373. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1374. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1375. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1376. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1377. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1378. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1379. } else {
  1380. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1381. traffic_mode);
  1382. rc = -EINVAL;
  1383. goto error;
  1384. }
  1385. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1386. &vc_id);
  1387. if (rc) {
  1388. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1389. cfg->vc_id = 0;
  1390. } else {
  1391. cfg->vc_id = vc_id;
  1392. }
  1393. error:
  1394. return rc;
  1395. }
  1396. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1397. struct dsi_parser_utils *utils,
  1398. const char *name)
  1399. {
  1400. u32 val = 0;
  1401. int rc = 0;
  1402. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1403. if (rc) {
  1404. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1405. cfg->wr_mem_start = 0x2C;
  1406. } else {
  1407. cfg->wr_mem_start = val;
  1408. }
  1409. val = 0;
  1410. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1411. &val);
  1412. if (rc) {
  1413. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1414. cfg->wr_mem_continue = 0x3C;
  1415. } else {
  1416. cfg->wr_mem_continue = val;
  1417. }
  1418. /* TODO: fix following */
  1419. cfg->max_cmd_packets_interleave = 0;
  1420. val = 0;
  1421. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1422. &val);
  1423. if (rc) {
  1424. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1425. cfg->insert_dcs_command = true;
  1426. } else if (val == 1) {
  1427. cfg->insert_dcs_command = true;
  1428. } else if (val == 0) {
  1429. cfg->insert_dcs_command = false;
  1430. } else {
  1431. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1432. name);
  1433. rc = -EINVAL;
  1434. goto error;
  1435. }
  1436. cfg->mdp_idle_ctrl_en =
  1437. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1438. if (cfg->mdp_idle_ctrl_en) {
  1439. val = 0;
  1440. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1441. if (rc) {
  1442. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1443. cfg->mdp_idle_ctrl_len = 0;
  1444. cfg->mdp_idle_ctrl_en = false;
  1445. rc = 0;
  1446. } else {
  1447. cfg->mdp_idle_ctrl_len = val;
  1448. }
  1449. }
  1450. error:
  1451. return rc;
  1452. }
  1453. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1454. {
  1455. int rc = 0;
  1456. struct dsi_parser_utils *utils = &panel->utils;
  1457. bool panel_mode_switch_enabled;
  1458. enum dsi_op_mode panel_mode;
  1459. const char *mode;
  1460. mode = utils->get_property(utils->data,
  1461. "qcom,mdss-dsi-panel-type", NULL);
  1462. if (!mode) {
  1463. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1464. panel_mode = DSI_OP_VIDEO_MODE;
  1465. } else if (!strcmp(mode, "dsi_video_mode")) {
  1466. panel_mode = DSI_OP_VIDEO_MODE;
  1467. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1468. panel_mode = DSI_OP_CMD_MODE;
  1469. } else {
  1470. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1471. rc = -EINVAL;
  1472. goto error;
  1473. }
  1474. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1475. "qcom,mdss-dsi-panel-mode-switch");
  1476. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1477. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1478. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1479. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1480. utils,
  1481. panel->name);
  1482. if (rc) {
  1483. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1484. panel->name, rc);
  1485. goto error;
  1486. }
  1487. }
  1488. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1489. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1490. utils,
  1491. panel->name);
  1492. if (rc) {
  1493. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1494. panel->name, rc);
  1495. goto error;
  1496. }
  1497. }
  1498. panel->poms_align_vsync = utils->read_bool(utils->data,
  1499. "qcom,poms-align-panel-vsync");
  1500. panel->panel_mode = panel_mode;
  1501. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1502. error:
  1503. return rc;
  1504. }
  1505. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1506. {
  1507. int rc = 0;
  1508. u32 val = 0;
  1509. const char *str;
  1510. struct dsi_panel_phy_props *props = &panel->phy_props;
  1511. struct dsi_parser_utils *utils = &panel->utils;
  1512. const char *name = panel->name;
  1513. rc = utils->read_u32(utils->data,
  1514. "qcom,mdss-pan-physical-width-dimension", &val);
  1515. if (rc) {
  1516. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1517. props->panel_width_mm = 0;
  1518. rc = 0;
  1519. } else {
  1520. props->panel_width_mm = val;
  1521. }
  1522. rc = utils->read_u32(utils->data,
  1523. "qcom,mdss-pan-physical-height-dimension",
  1524. &val);
  1525. if (rc) {
  1526. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1527. props->panel_height_mm = 0;
  1528. rc = 0;
  1529. } else {
  1530. props->panel_height_mm = val;
  1531. }
  1532. str = utils->get_property(utils->data,
  1533. "qcom,mdss-dsi-panel-orientation", NULL);
  1534. if (!str) {
  1535. props->rotation = DSI_PANEL_ROTATE_NONE;
  1536. } else if (!strcmp(str, "180")) {
  1537. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1538. } else if (!strcmp(str, "hflip")) {
  1539. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1540. } else if (!strcmp(str, "vflip")) {
  1541. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1542. } else {
  1543. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1544. rc = -EINVAL;
  1545. goto error;
  1546. }
  1547. error:
  1548. return rc;
  1549. }
  1550. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1551. "qcom,mdss-dsi-pre-on-command",
  1552. "qcom,mdss-dsi-on-command",
  1553. "qcom,vid-on-commands",
  1554. "qcom,cmd-on-commands",
  1555. "qcom,mdss-dsi-post-panel-on-command",
  1556. "qcom,mdss-dsi-pre-off-command",
  1557. "qcom,mdss-dsi-off-command",
  1558. "qcom,mdss-dsi-post-off-command",
  1559. "qcom,mdss-dsi-pre-res-switch",
  1560. "qcom,mdss-dsi-res-switch",
  1561. "qcom,mdss-dsi-post-res-switch",
  1562. "qcom,video-mode-switch-in-commands",
  1563. "qcom,video-mode-switch-out-commands",
  1564. "qcom,cmd-mode-switch-in-commands",
  1565. "qcom,cmd-mode-switch-out-commands",
  1566. "qcom,mdss-dsi-panel-status-command",
  1567. "qcom,mdss-dsi-lp1-command",
  1568. "qcom,mdss-dsi-lp2-command",
  1569. "qcom,mdss-dsi-nolp-command",
  1570. "PPS not parsed from DTSI, generated dynamically",
  1571. "ROI not parsed from DTSI, generated dynamically",
  1572. "qcom,mdss-dsi-timing-switch-command",
  1573. "qcom,mdss-dsi-post-mode-switch-on-command",
  1574. "qcom,mdss-dsi-qsync-on-commands",
  1575. "qcom,mdss-dsi-qsync-off-commands",
  1576. };
  1577. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1578. "qcom,mdss-dsi-pre-on-command-state",
  1579. "qcom,mdss-dsi-on-command-state",
  1580. "qcom,vid-on-commands-state",
  1581. "qcom,cmd-on-commands-state",
  1582. "qcom,mdss-dsi-post-on-command-state",
  1583. "qcom,mdss-dsi-pre-off-command-state",
  1584. "qcom,mdss-dsi-off-command-state",
  1585. "qcom,mdss-dsi-post-off-command-state",
  1586. "qcom,mdss-dsi-pre-res-switch-state",
  1587. "qcom,mdss-dsi-res-switch-state",
  1588. "qcom,mdss-dsi-post-res-switch-state",
  1589. "qcom,video-mode-switch-in-commands-state",
  1590. "qcom,video-mode-switch-out-commands-state",
  1591. "qcom,cmd-mode-switch-in-commands-state",
  1592. "qcom,cmd-mode-switch-out-commands-state",
  1593. "qcom,mdss-dsi-panel-status-command-state",
  1594. "qcom,mdss-dsi-lp1-command-state",
  1595. "qcom,mdss-dsi-lp2-command-state",
  1596. "qcom,mdss-dsi-nolp-command-state",
  1597. "PPS not parsed from DTSI, generated dynamically",
  1598. "ROI not parsed from DTSI, generated dynamically",
  1599. "qcom,mdss-dsi-timing-switch-command-state",
  1600. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1601. "qcom,mdss-dsi-qsync-on-commands-state",
  1602. "qcom,mdss-dsi-qsync-off-commands-state",
  1603. };
  1604. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1605. {
  1606. const u32 cmd_set_min_size = 7;
  1607. u32 count = 0;
  1608. u32 packet_length;
  1609. u32 tmp;
  1610. while (length >= cmd_set_min_size) {
  1611. packet_length = cmd_set_min_size;
  1612. tmp = ((data[5] << 8) | (data[6]));
  1613. packet_length += tmp;
  1614. if (packet_length > length) {
  1615. DSI_ERR("format error\n");
  1616. return -EINVAL;
  1617. }
  1618. length -= packet_length;
  1619. data += packet_length;
  1620. count++;
  1621. }
  1622. *cnt = count;
  1623. return 0;
  1624. }
  1625. int dsi_panel_create_cmd_packets(const char *data,
  1626. u32 length,
  1627. u32 count,
  1628. struct dsi_cmd_desc *cmd)
  1629. {
  1630. int rc = 0;
  1631. int i, j;
  1632. u8 *payload;
  1633. for (i = 0; i < count; i++) {
  1634. u32 size;
  1635. cmd[i].msg.type = data[0];
  1636. cmd[i].msg.channel = data[2];
  1637. cmd[i].msg.flags |= data[3];
  1638. cmd[i].ctrl = 0;
  1639. cmd[i].post_wait_ms = data[4];
  1640. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1641. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1642. cmd[i].last_command = false;
  1643. else
  1644. cmd[i].last_command = true;
  1645. size = cmd[i].msg.tx_len * sizeof(u8);
  1646. payload = kzalloc(size, GFP_KERNEL);
  1647. if (!payload) {
  1648. rc = -ENOMEM;
  1649. goto error_free_payloads;
  1650. }
  1651. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1652. payload[j] = data[7 + j];
  1653. cmd[i].msg.tx_buf = payload;
  1654. data += (7 + cmd[i].msg.tx_len);
  1655. }
  1656. return rc;
  1657. error_free_payloads:
  1658. for (i = i - 1; i >= 0; i--) {
  1659. cmd--;
  1660. kfree(cmd->msg.tx_buf);
  1661. }
  1662. return rc;
  1663. }
  1664. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1665. {
  1666. u32 i = 0;
  1667. struct dsi_cmd_desc *cmd;
  1668. for (i = 0; i < set->count; i++) {
  1669. cmd = &set->cmds[i];
  1670. kfree(cmd->msg.tx_buf);
  1671. }
  1672. }
  1673. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1674. {
  1675. kfree(set->cmds);
  1676. }
  1677. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1678. u32 packet_count)
  1679. {
  1680. u32 size;
  1681. size = packet_count * sizeof(*cmd->cmds);
  1682. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1683. if (!cmd->cmds)
  1684. return -ENOMEM;
  1685. cmd->count = packet_count;
  1686. return 0;
  1687. }
  1688. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1689. enum dsi_cmd_set_type type,
  1690. struct dsi_parser_utils *utils)
  1691. {
  1692. int rc = 0;
  1693. u32 length = 0;
  1694. const char *data;
  1695. const char *state;
  1696. u32 packet_count = 0;
  1697. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1698. &length);
  1699. if (!data) {
  1700. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1701. rc = -ENOTSUPP;
  1702. goto error;
  1703. }
  1704. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1705. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1706. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1707. if (rc) {
  1708. DSI_ERR("commands failed, rc=%d\n", rc);
  1709. goto error;
  1710. }
  1711. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1712. packet_count, length);
  1713. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1714. if (rc) {
  1715. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1716. goto error;
  1717. }
  1718. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1719. cmd->cmds);
  1720. if (rc) {
  1721. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1722. goto error_free_mem;
  1723. }
  1724. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1725. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1726. cmd->state = DSI_CMD_SET_STATE_LP;
  1727. } else if (!strcmp(state, "dsi_hs_mode")) {
  1728. cmd->state = DSI_CMD_SET_STATE_HS;
  1729. } else {
  1730. DSI_ERR("[%s] command state unrecognized-%s\n",
  1731. cmd_set_state_map[type], state);
  1732. goto error_free_mem;
  1733. }
  1734. return rc;
  1735. error_free_mem:
  1736. kfree(cmd->cmds);
  1737. cmd->cmds = NULL;
  1738. error:
  1739. return rc;
  1740. }
  1741. static int dsi_panel_parse_cmd_sets(
  1742. struct dsi_display_mode_priv_info *priv_info,
  1743. struct dsi_parser_utils *utils)
  1744. {
  1745. int rc = 0;
  1746. struct dsi_panel_cmd_set *set;
  1747. u32 i;
  1748. if (!priv_info) {
  1749. DSI_ERR("invalid mode priv info\n");
  1750. return -EINVAL;
  1751. }
  1752. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1753. set = &priv_info->cmd_sets[i];
  1754. set->type = i;
  1755. set->count = 0;
  1756. if (i == DSI_CMD_SET_PPS) {
  1757. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1758. if (rc)
  1759. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1760. i, rc);
  1761. set->state = DSI_CMD_SET_STATE_LP;
  1762. } else {
  1763. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1764. if (rc)
  1765. DSI_DEBUG("failed to parse set %d\n", i);
  1766. }
  1767. }
  1768. rc = 0;
  1769. return rc;
  1770. }
  1771. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1772. {
  1773. int rc = 0;
  1774. int i;
  1775. u32 length = 0;
  1776. u32 count = 0;
  1777. u32 size = 0;
  1778. u32 *arr_32 = NULL;
  1779. const u32 *arr;
  1780. struct dsi_parser_utils *utils = &panel->utils;
  1781. struct dsi_reset_seq *seq;
  1782. if (panel->host_config.ext_bridge_mode)
  1783. return 0;
  1784. arr = utils->get_property(utils->data,
  1785. "qcom,mdss-dsi-reset-sequence", &length);
  1786. if (!arr) {
  1787. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1788. rc = -EINVAL;
  1789. goto error;
  1790. }
  1791. if (length & 0x1) {
  1792. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1793. panel->name);
  1794. rc = -EINVAL;
  1795. goto error;
  1796. }
  1797. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1798. length = length / sizeof(u32);
  1799. size = length * sizeof(u32);
  1800. arr_32 = kzalloc(size, GFP_KERNEL);
  1801. if (!arr_32) {
  1802. rc = -ENOMEM;
  1803. goto error;
  1804. }
  1805. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1806. arr_32, length);
  1807. if (rc) {
  1808. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1809. goto error_free_arr_32;
  1810. }
  1811. count = length / 2;
  1812. size = count * sizeof(*seq);
  1813. seq = kzalloc(size, GFP_KERNEL);
  1814. if (!seq) {
  1815. rc = -ENOMEM;
  1816. goto error_free_arr_32;
  1817. }
  1818. panel->reset_config.sequence = seq;
  1819. panel->reset_config.count = count;
  1820. for (i = 0; i < length; i += 2) {
  1821. seq->level = arr_32[i];
  1822. seq->sleep_ms = arr_32[i + 1];
  1823. seq++;
  1824. }
  1825. error_free_arr_32:
  1826. kfree(arr_32);
  1827. error:
  1828. return rc;
  1829. }
  1830. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1831. {
  1832. struct dsi_parser_utils *utils = &panel->utils;
  1833. const char *string;
  1834. int i, rc = 0;
  1835. panel->ulps_feature_enabled =
  1836. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1837. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1838. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1839. panel->ulps_suspend_enabled =
  1840. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1841. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1842. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1843. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1844. "qcom,mdss-dsi-te-using-wd");
  1845. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1846. "qcom,cmd-sync-wait-broadcast");
  1847. panel->lp11_init = utils->read_bool(utils->data,
  1848. "qcom,mdss-dsi-lp11-init");
  1849. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1850. "qcom,platform-reset-gpio-always-on");
  1851. panel->spr_info.enable = false;
  1852. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1853. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1854. if (!rc) {
  1855. // find match for pack-type string
  1856. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1857. if (msm_spr_pack_type_str[i] &&
  1858. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1859. panel->spr_info.enable = true;
  1860. panel->spr_info.pack_type = i;
  1861. break;
  1862. }
  1863. }
  1864. }
  1865. pr_debug("%s source side spr packing, pack-type %s\n",
  1866. panel->spr_info.enable ? "enable" : "disable",
  1867. panel->spr_info.enable ?
  1868. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1869. return 0;
  1870. }
  1871. static int dsi_panel_parse_wd_jitter_config(struct dsi_display_mode_priv_info *priv_info,
  1872. struct dsi_parser_utils *utils, u32 *jitter)
  1873. {
  1874. int rc = 0;
  1875. struct msm_display_wd_jitter_config *wd_jitter = &priv_info->wd_jitter;
  1876. u32 ltj[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 1};
  1877. u32 ltj_time = 0;
  1878. const u32 max_ltj = 10;
  1879. if (!(utils->read_bool(utils->data, "qcom,dsi-wd-jitter-enable"))) {
  1880. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1881. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1882. return 0;
  1883. }
  1884. rc = utils->read_u32_array(utils->data, "qcom,dsi-wd-ltj-max-jitter", ltj,
  1885. DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1886. rc |= utils->read_u32(utils->data, "qcom,dsi-wd-ltj-time-sec", &ltj_time);
  1887. if (rc || !ltj[1] || !ltj_time || (ltj[0] / ltj[1] >= max_ltj)) {
  1888. DSI_DEBUG("No valid long term jitter defined\n");
  1889. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1890. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1891. rc = -EINVAL;
  1892. } else {
  1893. wd_jitter->ltj_max_numer = ltj[0];
  1894. wd_jitter->ltj_max_denom = ltj[1];
  1895. wd_jitter->ltj_time_sec = ltj_time;
  1896. wd_jitter->jitter_type = MSM_DISPLAY_WD_LTJ_JITTER;
  1897. }
  1898. if (jitter[0] && jitter[1]) {
  1899. if (jitter[0] / jitter[1] > MAX_PANEL_JITTER) {
  1900. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1901. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1902. } else {
  1903. wd_jitter->inst_jitter_numer = jitter[0];
  1904. wd_jitter->inst_jitter_denom = jitter[1];
  1905. }
  1906. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1907. } else if (rc) {
  1908. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1909. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1910. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1911. }
  1912. priv_info->panel_jitter_numer = rc ?
  1913. wd_jitter->inst_jitter_numer : wd_jitter->ltj_max_numer;
  1914. priv_info->panel_jitter_denom = rc ?
  1915. wd_jitter->inst_jitter_denom : wd_jitter->ltj_max_denom;
  1916. return 0;
  1917. }
  1918. static int dsi_panel_parse_jitter_config(
  1919. struct dsi_display_mode *mode,
  1920. struct dsi_parser_utils *utils)
  1921. {
  1922. int rc;
  1923. struct dsi_display_mode_priv_info *priv_info;
  1924. struct dsi_panel *panel;
  1925. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1926. u64 jitter_val = 0;
  1927. priv_info = mode->priv_info;
  1928. panel = container_of(utils, struct dsi_panel, utils);
  1929. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1930. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1931. if (rc) {
  1932. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1933. } else {
  1934. jitter_val = jitter[0];
  1935. jitter_val = div_u64(jitter_val, jitter[1]);
  1936. }
  1937. if (panel->te_using_watchdog_timer) {
  1938. dsi_panel_parse_wd_jitter_config(priv_info, utils, jitter);
  1939. } else if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1940. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1941. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1942. } else {
  1943. priv_info->panel_jitter_numer = jitter[0];
  1944. priv_info->panel_jitter_denom = jitter[1];
  1945. }
  1946. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1947. &priv_info->panel_prefill_lines);
  1948. if (rc) {
  1949. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1950. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1951. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1952. } else if (priv_info->panel_prefill_lines >=
  1953. DSI_V_TOTAL(&mode->timing)) {
  1954. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1955. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1956. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1957. }
  1958. return 0;
  1959. }
  1960. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1961. {
  1962. int rc = 0;
  1963. char *supply_name;
  1964. if (panel->host_config.ext_bridge_mode)
  1965. return 0;
  1966. if (!strcmp(panel->type, "primary"))
  1967. supply_name = "qcom,panel-supply-entries";
  1968. else
  1969. supply_name = "qcom,panel-sec-supply-entries";
  1970. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1971. &panel->power_info, supply_name);
  1972. if (rc) {
  1973. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1974. goto error;
  1975. }
  1976. error:
  1977. return rc;
  1978. }
  1979. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1980. struct msm_io_res *io_res)
  1981. {
  1982. struct dsi_parser_utils *utils = &panel->utils;
  1983. struct list_head *mem_list = &io_res->mem;
  1984. int reset_gpio;
  1985. int rc = 0;
  1986. reset_gpio = utils->get_named_gpio(utils->data,
  1987. "qcom,platform-reset-gpio", 0);
  1988. if (gpio_is_valid(reset_gpio)) {
  1989. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1990. if (rc) {
  1991. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1992. goto end;
  1993. }
  1994. }
  1995. end:
  1996. return rc;
  1997. }
  1998. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1999. {
  2000. int rc = 0;
  2001. const char *data;
  2002. struct dsi_parser_utils *utils = &panel->utils;
  2003. char *reset_gpio_name, *mode_set_gpio_name;
  2004. if (!strcmp(panel->type, "primary")) {
  2005. reset_gpio_name = "qcom,platform-reset-gpio";
  2006. mode_set_gpio_name = "qcom,panel-mode-gpio";
  2007. } else {
  2008. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  2009. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  2010. }
  2011. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  2012. reset_gpio_name, 0);
  2013. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  2014. !panel->host_config.ext_bridge_mode) {
  2015. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  2016. panel->reset_config.reset_gpio);
  2017. }
  2018. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  2019. "qcom,5v-boost-gpio",
  2020. 0);
  2021. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2022. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  2023. panel->name, rc);
  2024. panel->reset_config.disp_en_gpio =
  2025. utils->get_named_gpio(utils->data,
  2026. "qcom,platform-en-gpio", 0);
  2027. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2028. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  2029. panel->name, rc);
  2030. }
  2031. }
  2032. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  2033. utils->data, mode_set_gpio_name, 0);
  2034. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  2035. DSI_DEBUG("mode gpio not specified\n");
  2036. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  2037. data = utils->get_property(utils->data,
  2038. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  2039. if (data) {
  2040. if (!strcmp(data, "single_port"))
  2041. panel->reset_config.mode_sel_state =
  2042. MODE_SEL_SINGLE_PORT;
  2043. else if (!strcmp(data, "dual_port"))
  2044. panel->reset_config.mode_sel_state =
  2045. MODE_SEL_DUAL_PORT;
  2046. else if (!strcmp(data, "high"))
  2047. panel->reset_config.mode_sel_state =
  2048. MODE_GPIO_HIGH;
  2049. else if (!strcmp(data, "low"))
  2050. panel->reset_config.mode_sel_state =
  2051. MODE_GPIO_LOW;
  2052. } else {
  2053. /* Set default mode as SPLIT mode */
  2054. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  2055. }
  2056. /* TODO: release memory */
  2057. rc = dsi_panel_parse_reset_sequence(panel);
  2058. if (rc) {
  2059. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2060. panel->name, rc);
  2061. goto error;
  2062. }
  2063. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2064. "qcom,mdss-dsi-panel-test-pin",
  2065. 0);
  2066. if (!gpio_is_valid(panel->panel_test_gpio))
  2067. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2068. __LINE__);
  2069. error:
  2070. return rc;
  2071. }
  2072. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2073. {
  2074. int rc = 0;
  2075. u32 val;
  2076. struct dsi_backlight_config *config = &panel->bl_config;
  2077. struct dsi_parser_utils *utils = &panel->utils;
  2078. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2079. &val);
  2080. if (rc) {
  2081. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2082. goto error;
  2083. }
  2084. config->pwm_period_usecs = val;
  2085. error:
  2086. return rc;
  2087. }
  2088. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2089. {
  2090. int rc = 0;
  2091. u32 val = 0;
  2092. const char *bl_type = NULL;
  2093. const char *data = NULL;
  2094. const char *state = NULL;
  2095. struct dsi_parser_utils *utils = &panel->utils;
  2096. char *bl_name = NULL;
  2097. if (!strcmp(panel->type, "primary"))
  2098. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2099. else
  2100. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2101. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2102. if (!bl_type) {
  2103. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2104. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2105. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2106. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2107. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2108. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2109. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2110. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2111. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2112. } else {
  2113. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2114. panel->name, bl_type);
  2115. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2116. }
  2117. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2118. if (!data) {
  2119. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2120. } else if (!strcmp(data, "delay_until_first_frame")) {
  2121. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2122. } else {
  2123. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2124. panel->name, data);
  2125. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2126. }
  2127. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2128. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2129. panel->bl_config.dimming_min_bl = 0;
  2130. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2131. panel->bl_config.user_disable_notification = false;
  2132. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2133. if (rc) {
  2134. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2135. panel->name);
  2136. panel->bl_config.bl_min_level = 0;
  2137. } else {
  2138. panel->bl_config.bl_min_level = val;
  2139. }
  2140. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2141. if (rc) {
  2142. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2143. panel->name);
  2144. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2145. } else {
  2146. panel->bl_config.bl_max_level = val;
  2147. }
  2148. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2149. &val);
  2150. if (rc) {
  2151. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2152. panel->name);
  2153. panel->bl_config.brightness_max_level = 255;
  2154. rc = 0;
  2155. } else {
  2156. panel->bl_config.brightness_max_level = val;
  2157. }
  2158. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2159. "qcom,mdss-dsi-bl-inverted-dbv");
  2160. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2161. if (!state || !strcmp(state, "dsi_hs_mode"))
  2162. panel->bl_config.lp_mode = false;
  2163. else if (!strcmp(state, "dsi_lp_mode"))
  2164. panel->bl_config.lp_mode = true;
  2165. else
  2166. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2167. state);
  2168. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2169. rc = dsi_panel_parse_bl_pwm_config(panel);
  2170. if (rc) {
  2171. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2172. panel->name, rc);
  2173. goto error;
  2174. }
  2175. }
  2176. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2177. "qcom,platform-bklight-en-gpio",
  2178. 0);
  2179. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2180. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2181. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2182. panel->name, rc);
  2183. rc = -EPROBE_DEFER;
  2184. goto error;
  2185. } else {
  2186. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2187. panel->name, rc);
  2188. rc = 0;
  2189. goto error;
  2190. }
  2191. }
  2192. error:
  2193. return rc;
  2194. }
  2195. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2196. struct dsi_parser_utils *utils)
  2197. {
  2198. const char *data;
  2199. u32 len, i;
  2200. int rc = 0;
  2201. struct dsi_display_mode_priv_info *priv_info;
  2202. u64 pixel_clk_khz;
  2203. if (!mode || !mode->priv_info)
  2204. return -EINVAL;
  2205. priv_info = mode->priv_info;
  2206. data = utils->get_property(utils->data,
  2207. "qcom,mdss-dsi-panel-phy-timings", &len);
  2208. if (!data) {
  2209. DSI_DEBUG("Unable to read Phy timing settings\n");
  2210. } else {
  2211. priv_info->phy_timing_val =
  2212. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2213. if (!priv_info->phy_timing_val)
  2214. return -EINVAL;
  2215. for (i = 0; i < len; i++)
  2216. priv_info->phy_timing_val[i] = data[i];
  2217. priv_info->phy_timing_len = len;
  2218. }
  2219. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2220. /*
  2221. * For command mode we update the pclk as part of
  2222. * function dsi_panel_calc_dsi_transfer_time( )
  2223. * as we set it based on dsi clock or mdp transfer time.
  2224. */
  2225. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2226. DSI_V_TOTAL(&mode->timing) *
  2227. mode->timing.refresh_rate);
  2228. do_div(pixel_clk_khz, 1000);
  2229. mode->pixel_clk_khz = pixel_clk_khz;
  2230. }
  2231. return rc;
  2232. }
  2233. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2234. struct dsi_parser_utils *utils)
  2235. {
  2236. u32 data;
  2237. int rc = -EINVAL;
  2238. int intf_width;
  2239. const char *compression;
  2240. struct dsi_display_mode_priv_info *priv_info;
  2241. if (!mode || !mode->priv_info)
  2242. return -EINVAL;
  2243. priv_info = mode->priv_info;
  2244. priv_info->dsc_enabled = false;
  2245. compression = utils->get_property(utils->data,
  2246. "qcom,compression-mode", NULL);
  2247. if (compression && !strcmp(compression, "dsc"))
  2248. priv_info->dsc_enabled = true;
  2249. if (!priv_info->dsc_enabled) {
  2250. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2251. return 0;
  2252. }
  2253. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2254. if (rc) {
  2255. priv_info->dsc.config.dsc_version_major = 0x1;
  2256. priv_info->dsc.config.dsc_version_minor = 0x1;
  2257. rc = 0;
  2258. } else {
  2259. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2260. * major version information
  2261. */
  2262. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2263. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2264. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2265. ((priv_info->dsc.config.dsc_version_minor
  2266. != 0x1) &&
  2267. (priv_info->dsc.config.dsc_version_minor
  2268. != 0x2))) {
  2269. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2270. __func__,
  2271. priv_info->dsc.config.dsc_version_major,
  2272. priv_info->dsc.config.dsc_version_minor
  2273. );
  2274. rc = -EINVAL;
  2275. goto error;
  2276. }
  2277. }
  2278. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2279. if (rc) {
  2280. priv_info->dsc.scr_rev = 0x0;
  2281. rc = 0;
  2282. } else {
  2283. priv_info->dsc.scr_rev = data & 0xff;
  2284. /* only one scr rev supported */
  2285. if (priv_info->dsc.scr_rev > 0x1) {
  2286. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2287. __func__, priv_info->dsc.scr_rev);
  2288. rc = -EINVAL;
  2289. goto error;
  2290. }
  2291. }
  2292. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2293. if (rc) {
  2294. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2295. goto error;
  2296. }
  2297. priv_info->dsc.config.slice_height = data;
  2298. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2299. if (rc) {
  2300. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2301. goto error;
  2302. }
  2303. priv_info->dsc.config.slice_width = data;
  2304. intf_width = mode->timing.h_active;
  2305. if (intf_width % priv_info->dsc.config.slice_width) {
  2306. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2307. intf_width, priv_info->dsc.config.slice_width);
  2308. rc = -EINVAL;
  2309. goto error;
  2310. }
  2311. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2312. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2313. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2314. if (rc) {
  2315. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2316. goto error;
  2317. } else if (!data || (data > 2)) {
  2318. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2319. goto error;
  2320. }
  2321. priv_info->dsc.slice_per_pkt = data;
  2322. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2323. &data);
  2324. if (rc) {
  2325. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2326. goto error;
  2327. }
  2328. priv_info->dsc.config.bits_per_component = data;
  2329. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2330. if (rc) {
  2331. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2332. data = 0;
  2333. }
  2334. priv_info->dsc.pps_delay_ms = data;
  2335. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2336. &data);
  2337. if (rc) {
  2338. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2339. goto error;
  2340. }
  2341. priv_info->dsc.config.bits_per_pixel = data << 4;
  2342. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2343. &data);
  2344. if (rc) {
  2345. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2346. rc = 0;
  2347. data = MSM_CHROMA_444;
  2348. } else if (data == MSM_CHROMA_422) {
  2349. priv_info->dsc.config.native_422 = 1;
  2350. } else if (data == MSM_CHROMA_420) {
  2351. priv_info->dsc.config.native_420 = 1;
  2352. }
  2353. priv_info->dsc.chroma_format = data;
  2354. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2355. &data);
  2356. if (rc) {
  2357. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2358. rc = 0;
  2359. data = MSM_RGB;
  2360. }
  2361. priv_info->dsc.source_color_space = data;
  2362. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2363. "qcom,mdss-dsc-block-prediction-enable");
  2364. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2365. priv_info->dsc.config.slice_width);
  2366. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2367. priv_info->dsc.scr_rev);
  2368. if (rc) {
  2369. DSI_DEBUG("failed populating dsc params\n");
  2370. rc = -EINVAL;
  2371. goto error;
  2372. }
  2373. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2374. if (rc) {
  2375. DSI_DEBUG("failed populating other dsc params\n");
  2376. rc = -EINVAL;
  2377. goto error;
  2378. }
  2379. priv_info->pclk_scale.numer =
  2380. priv_info->dsc.config.bits_per_pixel >> 4;
  2381. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2382. priv_info->dsc.chroma_format,
  2383. priv_info->dsc.config.bits_per_component);
  2384. mode->timing.dsc_enabled = true;
  2385. mode->timing.dsc = &priv_info->dsc;
  2386. mode->timing.pclk_scale = priv_info->pclk_scale;
  2387. error:
  2388. return rc;
  2389. }
  2390. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2391. struct dsi_parser_utils *utils, int traffic_mode)
  2392. {
  2393. u32 data;
  2394. int rc = -EINVAL;
  2395. const char *compression;
  2396. struct dsi_display_mode_priv_info *priv_info;
  2397. int intf_width;
  2398. if (!mode || !mode->priv_info)
  2399. return -EINVAL;
  2400. priv_info = mode->priv_info;
  2401. priv_info->vdc_enabled = false;
  2402. compression = utils->get_property(utils->data,
  2403. "qcom,compression-mode", NULL);
  2404. if (compression && !strcmp(compression, "vdc"))
  2405. priv_info->vdc_enabled = true;
  2406. if (!priv_info->vdc_enabled) {
  2407. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2408. return 0;
  2409. }
  2410. priv_info->vdc.traffic_mode = traffic_mode;
  2411. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2412. if (rc) {
  2413. priv_info->vdc.version_major = 0x1;
  2414. priv_info->vdc.version_minor = 0x2;
  2415. priv_info->vdc.version_release = 0x0;
  2416. rc = 0;
  2417. } else {
  2418. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2419. * major version information
  2420. */
  2421. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2422. priv_info->vdc.version_minor = data & 0x0F;
  2423. if ((priv_info->vdc.version_major != 0x1) &&
  2424. ((priv_info->vdc.version_minor
  2425. != 0x2))) {
  2426. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2427. __func__,
  2428. priv_info->vdc.version_major,
  2429. priv_info->vdc.version_minor
  2430. );
  2431. rc = -EINVAL;
  2432. goto error;
  2433. }
  2434. }
  2435. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2436. if (rc) {
  2437. priv_info->vdc.version_release = 0x0;
  2438. rc = 0;
  2439. } else {
  2440. priv_info->vdc.version_release = data & 0xff;
  2441. /* only one release version is supported */
  2442. if (priv_info->vdc.version_release != 0x0) {
  2443. DSI_ERR("unsupported vdc release version %d\n",
  2444. priv_info->vdc.version_release);
  2445. rc = -EINVAL;
  2446. goto error;
  2447. }
  2448. }
  2449. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2450. priv_info->vdc.version_major,
  2451. priv_info->vdc.version_minor,
  2452. priv_info->vdc.version_release);
  2453. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2454. if (rc) {
  2455. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2456. goto error;
  2457. }
  2458. priv_info->vdc.slice_height = data;
  2459. /* slice height should be atleast 16 lines */
  2460. if (priv_info->vdc.slice_height < 16) {
  2461. DSI_ERR("invalid slice height %d\n",
  2462. priv_info->vdc.slice_height);
  2463. rc = -EINVAL;
  2464. goto error;
  2465. }
  2466. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2467. if (rc) {
  2468. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2469. goto error;
  2470. }
  2471. priv_info->vdc.slice_width = data;
  2472. /*
  2473. * slide-width should be multiple of 8
  2474. * slice-width should be atlease 64 pixels
  2475. */
  2476. if ((priv_info->vdc.slice_width & 7) ||
  2477. (priv_info->vdc.slice_width < 64)) {
  2478. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2479. rc = -EINVAL;
  2480. goto error;
  2481. }
  2482. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2483. if (rc) {
  2484. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2485. goto error;
  2486. } else if (!data || (data > 2)) {
  2487. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2488. rc = -EINVAL;
  2489. goto error;
  2490. }
  2491. intf_width = mode->timing.h_active;
  2492. priv_info->vdc.slice_per_pkt = data;
  2493. priv_info->vdc.frame_width = mode->timing.h_active;
  2494. priv_info->vdc.frame_height = mode->timing.v_active;
  2495. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2496. &data);
  2497. if (rc) {
  2498. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2499. goto error;
  2500. }
  2501. priv_info->vdc.bits_per_component = data;
  2502. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2503. if (rc) {
  2504. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2505. data = 0;
  2506. }
  2507. priv_info->vdc.pps_delay_ms = data;
  2508. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2509. &data);
  2510. if (rc) {
  2511. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2512. goto error;
  2513. }
  2514. priv_info->vdc.bits_per_pixel = data << 4;
  2515. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2516. &data);
  2517. if (rc) {
  2518. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2519. rc = 0;
  2520. data = MSM_CHROMA_444;
  2521. }
  2522. priv_info->vdc.chroma_format = data;
  2523. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2524. &data);
  2525. if (rc) {
  2526. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2527. rc = 0;
  2528. data = MSM_RGB;
  2529. }
  2530. priv_info->vdc.source_color_space = data;
  2531. rc = sde_vdc_populate_config(&priv_info->vdc,
  2532. intf_width, traffic_mode);
  2533. if (rc) {
  2534. DSI_DEBUG("failed populating vdc config\n");
  2535. rc = -EINVAL;
  2536. goto error;
  2537. }
  2538. priv_info->pclk_scale.numer =
  2539. priv_info->vdc.bits_per_pixel >> 4;
  2540. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2541. priv_info->vdc.chroma_format,
  2542. priv_info->vdc.bits_per_component);
  2543. mode->timing.vdc_enabled = true;
  2544. mode->timing.vdc = &priv_info->vdc;
  2545. mode->timing.pclk_scale = priv_info->pclk_scale;
  2546. error:
  2547. return rc;
  2548. }
  2549. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2550. {
  2551. int rc = 0;
  2552. struct drm_panel_hdr_properties *hdr_prop;
  2553. struct dsi_parser_utils *utils = &panel->utils;
  2554. hdr_prop = &panel->hdr_props;
  2555. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2556. "qcom,mdss-dsi-panel-hdr-enabled");
  2557. if (hdr_prop->hdr_enabled) {
  2558. rc = utils->read_u32_array(utils->data,
  2559. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2560. hdr_prop->display_primaries,
  2561. DISPLAY_PRIMARIES_MAX);
  2562. if (rc) {
  2563. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2564. __func__, __LINE__, rc);
  2565. hdr_prop->hdr_enabled = false;
  2566. return rc;
  2567. }
  2568. rc = utils->read_u32(utils->data,
  2569. "qcom,mdss-dsi-panel-peak-brightness",
  2570. &(hdr_prop->peak_brightness));
  2571. if (rc) {
  2572. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2573. __func__, __LINE__, rc);
  2574. hdr_prop->hdr_enabled = false;
  2575. return rc;
  2576. }
  2577. rc = utils->read_u32(utils->data,
  2578. "qcom,mdss-dsi-panel-blackness-level",
  2579. &(hdr_prop->blackness_level));
  2580. if (rc) {
  2581. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2582. __func__, __LINE__, rc);
  2583. hdr_prop->hdr_enabled = false;
  2584. return rc;
  2585. }
  2586. }
  2587. return 0;
  2588. }
  2589. static int dsi_panel_parse_topology(
  2590. struct dsi_display_mode_priv_info *priv_info,
  2591. struct dsi_parser_utils *utils,
  2592. int topology_override)
  2593. {
  2594. struct msm_display_topology *topology;
  2595. u32 top_count, top_sel, *array = NULL;
  2596. int i, len = 0;
  2597. int rc = -EINVAL;
  2598. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2599. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2600. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2601. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2602. return rc;
  2603. }
  2604. top_count = len / TOPOLOGY_SET_LEN;
  2605. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2606. if (!array)
  2607. return -ENOMEM;
  2608. rc = utils->read_u32_array(utils->data,
  2609. "qcom,display-topology", array, len);
  2610. if (rc) {
  2611. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2612. goto read_fail;
  2613. }
  2614. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2615. if (!topology) {
  2616. rc = -ENOMEM;
  2617. goto read_fail;
  2618. }
  2619. for (i = 0; i < top_count; i++) {
  2620. struct msm_display_topology *top = &topology[i];
  2621. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2622. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2623. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2624. }
  2625. if (topology_override >= 0 && topology_override < top_count) {
  2626. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2627. topology_override,
  2628. topology[topology_override].num_lm,
  2629. topology[topology_override].num_enc,
  2630. topology[topology_override].num_intf);
  2631. top_sel = topology_override;
  2632. goto parse_done;
  2633. }
  2634. rc = utils->read_u32(utils->data,
  2635. "qcom,default-topology-index", &top_sel);
  2636. if (rc) {
  2637. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2638. goto parse_fail;
  2639. }
  2640. if (top_sel >= top_count) {
  2641. rc = -EINVAL;
  2642. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2643. rc);
  2644. goto parse_fail;
  2645. }
  2646. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2647. !topology[top_sel].num_enc) {
  2648. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2649. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2650. topology[top_sel].num_enc);
  2651. goto parse_fail;
  2652. }
  2653. if (priv_info->dsc_enabled)
  2654. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2655. else if (priv_info->vdc_enabled)
  2656. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2657. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2658. topology[top_sel].num_lm,
  2659. topology[top_sel].num_enc,
  2660. topology[top_sel].num_intf);
  2661. parse_done:
  2662. memcpy(&priv_info->topology, &topology[top_sel],
  2663. sizeof(struct msm_display_topology));
  2664. parse_fail:
  2665. kfree(topology);
  2666. read_fail:
  2667. kfree(array);
  2668. return rc;
  2669. }
  2670. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2671. struct msm_roi_alignment *align)
  2672. {
  2673. int len = 0, rc = 0;
  2674. u32 value[6];
  2675. struct property *data;
  2676. if (!align)
  2677. return -EINVAL;
  2678. memset(align, 0, sizeof(*align));
  2679. data = utils->find_property(utils->data,
  2680. "qcom,panel-roi-alignment", &len);
  2681. len /= sizeof(u32);
  2682. if (!data) {
  2683. DSI_ERR("panel roi alignment not found\n");
  2684. rc = -EINVAL;
  2685. } else if (len != 6) {
  2686. DSI_ERR("incorrect roi alignment len %d\n", len);
  2687. rc = -EINVAL;
  2688. } else {
  2689. rc = utils->read_u32_array(utils->data,
  2690. "qcom,panel-roi-alignment", value, len);
  2691. if (rc)
  2692. DSI_DEBUG("error reading panel roi alignment values\n");
  2693. else {
  2694. align->xstart_pix_align = value[0];
  2695. align->ystart_pix_align = value[1];
  2696. align->width_pix_align = value[2];
  2697. align->height_pix_align = value[3];
  2698. align->min_width = value[4];
  2699. align->min_height = value[5];
  2700. }
  2701. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2702. align->xstart_pix_align,
  2703. align->width_pix_align,
  2704. align->ystart_pix_align,
  2705. align->height_pix_align,
  2706. align->min_width,
  2707. align->min_height);
  2708. }
  2709. return rc;
  2710. }
  2711. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2712. struct dsi_parser_utils *utils)
  2713. {
  2714. struct msm_roi_caps *roi_caps = NULL;
  2715. const char *data;
  2716. int rc = 0;
  2717. if (!mode || !mode->priv_info) {
  2718. DSI_ERR("invalid arguments\n");
  2719. return -EINVAL;
  2720. }
  2721. roi_caps = &mode->priv_info->roi_caps;
  2722. memset(roi_caps, 0, sizeof(*roi_caps));
  2723. data = utils->get_property(utils->data,
  2724. "qcom,partial-update-enabled", NULL);
  2725. if (data) {
  2726. if (!strcmp(data, "dual_roi"))
  2727. roi_caps->num_roi = 2;
  2728. else if (!strcmp(data, "single_roi"))
  2729. roi_caps->num_roi = 1;
  2730. else {
  2731. DSI_INFO(
  2732. "invalid value for qcom,partial-update-enabled: %s\n",
  2733. data);
  2734. return 0;
  2735. }
  2736. } else {
  2737. DSI_DEBUG("partial update disabled as the property is not set\n");
  2738. return 0;
  2739. }
  2740. roi_caps->merge_rois = utils->read_bool(utils->data,
  2741. "qcom,partial-update-roi-merge");
  2742. roi_caps->enabled = roi_caps->num_roi > 0;
  2743. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2744. roi_caps->enabled);
  2745. if (roi_caps->enabled)
  2746. rc = dsi_panel_parse_roi_alignment(utils,
  2747. &roi_caps->align);
  2748. if (rc)
  2749. memset(roi_caps, 0, sizeof(*roi_caps));
  2750. return rc;
  2751. }
  2752. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2753. struct dsi_parser_utils *utils)
  2754. {
  2755. if (!mode || !mode->priv_info) {
  2756. DSI_ERR("invalid arguments\n");
  2757. return false;
  2758. }
  2759. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2760. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2761. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2762. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2763. if (!mode->panel_mode_caps)
  2764. return false;
  2765. return true;
  2766. };
  2767. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2768. {
  2769. int dms_enabled;
  2770. const char *data;
  2771. struct dsi_parser_utils *utils = &panel->utils;
  2772. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2773. dms_enabled = utils->read_bool(utils->data,
  2774. "qcom,dynamic-mode-switch-enabled");
  2775. if (!dms_enabled)
  2776. return 0;
  2777. data = utils->get_property(utils->data,
  2778. "qcom,dynamic-mode-switch-type", NULL);
  2779. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2780. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2781. } else {
  2782. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2783. panel->name, data);
  2784. return -EINVAL;
  2785. }
  2786. return 0;
  2787. };
  2788. /*
  2789. * The length of all the valid values to be checked should not be greater
  2790. * than the length of returned data from read command.
  2791. */
  2792. static bool
  2793. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2794. {
  2795. int i;
  2796. struct drm_panel_esd_config *config = &panel->esd_config;
  2797. for (i = 0; i < count; ++i) {
  2798. if (config->status_valid_params[i] >
  2799. config->status_cmds_rlen[i]) {
  2800. DSI_DEBUG("ignore valid params\n");
  2801. return false;
  2802. }
  2803. }
  2804. return true;
  2805. }
  2806. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2807. char *prop_key, u32 **target, u32 cmd_cnt)
  2808. {
  2809. int tmp;
  2810. if (!utils->find_property(utils->data, prop_key, &tmp))
  2811. return false;
  2812. tmp /= sizeof(u32);
  2813. if (tmp != cmd_cnt) {
  2814. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2815. tmp, cmd_cnt);
  2816. return false;
  2817. }
  2818. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2819. if (IS_ERR_OR_NULL(*target)) {
  2820. DSI_ERR("Error allocating memory for property\n");
  2821. return false;
  2822. }
  2823. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2824. DSI_ERR("cannot get values from dts\n");
  2825. kfree(*target);
  2826. *target = NULL;
  2827. return false;
  2828. }
  2829. return true;
  2830. }
  2831. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2832. {
  2833. kfree(esd_config->status_buf);
  2834. kfree(esd_config->return_buf);
  2835. kfree(esd_config->status_value);
  2836. kfree(esd_config->status_valid_params);
  2837. kfree(esd_config->status_cmds_rlen);
  2838. kfree(esd_config->status_cmd.cmds);
  2839. }
  2840. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2841. {
  2842. struct drm_panel_esd_config *esd_config;
  2843. int rc = 0;
  2844. u32 tmp;
  2845. u32 i, status_len, *lenp;
  2846. struct property *data;
  2847. struct dsi_parser_utils *utils = &panel->utils;
  2848. if (!panel) {
  2849. DSI_ERR("Invalid Params\n");
  2850. return -EINVAL;
  2851. }
  2852. esd_config = &panel->esd_config;
  2853. if (!esd_config)
  2854. return -EINVAL;
  2855. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2856. DSI_CMD_SET_PANEL_STATUS, utils);
  2857. if (!esd_config->status_cmd.count) {
  2858. DSI_ERR("panel status command parsing failed\n");
  2859. rc = -EINVAL;
  2860. goto error;
  2861. }
  2862. if (!dsi_panel_parse_esd_status_len(utils,
  2863. "qcom,mdss-dsi-panel-status-read-length",
  2864. &panel->esd_config.status_cmds_rlen,
  2865. esd_config->status_cmd.count)) {
  2866. DSI_ERR("Invalid status read length\n");
  2867. rc = -EINVAL;
  2868. goto error1;
  2869. }
  2870. if (dsi_panel_parse_esd_status_len(utils,
  2871. "qcom,mdss-dsi-panel-status-valid-params",
  2872. &panel->esd_config.status_valid_params,
  2873. esd_config->status_cmd.count)) {
  2874. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2875. esd_config->status_cmd.count)) {
  2876. rc = -EINVAL;
  2877. goto error2;
  2878. }
  2879. }
  2880. status_len = 0;
  2881. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2882. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2883. status_len += lenp[i];
  2884. if (!status_len) {
  2885. rc = -EINVAL;
  2886. goto error2;
  2887. }
  2888. /*
  2889. * Some panel may need multiple read commands to properly
  2890. * check panel status. Do a sanity check for proper status
  2891. * value which will be compared with the value read by dsi
  2892. * controller during ESD check. Also check if multiple read
  2893. * commands are there then, there should be corresponding
  2894. * status check values for each read command.
  2895. */
  2896. data = utils->find_property(utils->data,
  2897. "qcom,mdss-dsi-panel-status-value", &tmp);
  2898. tmp /= sizeof(u32);
  2899. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2900. esd_config->groups = tmp / status_len;
  2901. } else {
  2902. DSI_ERR("error parse panel-status-value\n");
  2903. rc = -EINVAL;
  2904. goto error2;
  2905. }
  2906. esd_config->status_value =
  2907. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2908. GFP_KERNEL);
  2909. if (!esd_config->status_value) {
  2910. rc = -ENOMEM;
  2911. goto error2;
  2912. }
  2913. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2914. sizeof(unsigned char), GFP_KERNEL);
  2915. if (!esd_config->return_buf) {
  2916. rc = -ENOMEM;
  2917. goto error3;
  2918. }
  2919. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2920. if (!esd_config->status_buf) {
  2921. rc = -ENOMEM;
  2922. goto error4;
  2923. }
  2924. rc = utils->read_u32_array(utils->data,
  2925. "qcom,mdss-dsi-panel-status-value",
  2926. esd_config->status_value, esd_config->groups * status_len);
  2927. if (rc) {
  2928. DSI_DEBUG("error reading panel status values\n");
  2929. memset(esd_config->status_value, 0,
  2930. esd_config->groups * status_len);
  2931. }
  2932. return 0;
  2933. error4:
  2934. kfree(esd_config->return_buf);
  2935. error3:
  2936. kfree(esd_config->status_value);
  2937. error2:
  2938. kfree(esd_config->status_valid_params);
  2939. kfree(esd_config->status_cmds_rlen);
  2940. error1:
  2941. kfree(esd_config->status_cmd.cmds);
  2942. error:
  2943. return rc;
  2944. }
  2945. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2946. {
  2947. int rc = 0;
  2948. const char *string;
  2949. struct drm_panel_esd_config *esd_config;
  2950. struct dsi_parser_utils *utils = &panel->utils;
  2951. u8 *esd_mode = NULL;
  2952. esd_config = &panel->esd_config;
  2953. esd_config->status_mode = ESD_MODE_MAX;
  2954. esd_config->esd_enabled = utils->read_bool(utils->data,
  2955. "qcom,esd-check-enabled");
  2956. if (!esd_config->esd_enabled)
  2957. return 0;
  2958. rc = utils->read_string(utils->data,
  2959. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2960. if (!rc) {
  2961. if (!strcmp(string, "bta_check")) {
  2962. esd_config->status_mode = ESD_MODE_SW_BTA;
  2963. } else if (!strcmp(string, "reg_read")) {
  2964. esd_config->status_mode = ESD_MODE_REG_READ;
  2965. } else if (!strcmp(string, "te_signal_check")) {
  2966. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2967. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2968. } else {
  2969. DSI_ERR("TE-ESD not valid for video mode\n");
  2970. rc = -EINVAL;
  2971. goto error;
  2972. }
  2973. } else {
  2974. DSI_ERR("No valid panel-status-check-mode string\n");
  2975. rc = -EINVAL;
  2976. goto error;
  2977. }
  2978. } else {
  2979. DSI_DEBUG("status check method not defined!\n");
  2980. rc = -EINVAL;
  2981. goto error;
  2982. }
  2983. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2984. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2985. if (rc) {
  2986. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2987. rc);
  2988. goto error;
  2989. }
  2990. esd_mode = "register_read";
  2991. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2992. esd_mode = "bta_trigger";
  2993. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2994. esd_mode = "te_check";
  2995. }
  2996. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2997. return 0;
  2998. error:
  2999. panel->esd_config.esd_enabled = false;
  3000. return rc;
  3001. }
  3002. static void dsi_panel_update_util(struct dsi_panel *panel,
  3003. struct device_node *parser_node)
  3004. {
  3005. struct dsi_parser_utils *utils = &panel->utils;
  3006. if (parser_node) {
  3007. *utils = *dsi_parser_get_parser_utils();
  3008. utils->data = parser_node;
  3009. DSI_DEBUG("switching to parser APIs\n");
  3010. goto end;
  3011. }
  3012. *utils = *dsi_parser_get_of_utils();
  3013. utils->data = panel->panel_of_node;
  3014. end:
  3015. utils->node = panel->panel_of_node;
  3016. }
  3017. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  3018. {
  3019. return 0;
  3020. }
  3021. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  3022. {
  3023. if (trusted_vm_env) {
  3024. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  3025. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  3026. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  3027. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  3028. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  3029. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  3030. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  3031. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  3032. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  3033. } else {
  3034. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  3035. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  3036. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  3037. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  3038. panel->panel_ops.bl_register = dsi_panel_bl_register;
  3039. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  3040. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  3041. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  3042. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  3043. }
  3044. }
  3045. struct dsi_panel *dsi_panel_get(struct device *parent,
  3046. struct device_node *of_node,
  3047. struct device_node *parser_node,
  3048. const char *type,
  3049. int topology_override,
  3050. bool trusted_vm_env)
  3051. {
  3052. struct dsi_panel *panel;
  3053. struct dsi_parser_utils *utils;
  3054. const char *panel_physical_type;
  3055. int rc = 0;
  3056. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  3057. if (!panel)
  3058. return ERR_PTR(-ENOMEM);
  3059. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3060. panel->panel_of_node = of_node;
  3061. panel->parent = parent;
  3062. panel->type = type;
  3063. dsi_panel_update_util(panel, parser_node);
  3064. utils = &panel->utils;
  3065. panel->name = utils->get_property(utils->data,
  3066. "qcom,mdss-dsi-panel-name", NULL);
  3067. if (!panel->name)
  3068. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3069. /*
  3070. * Set panel type to LCD as default.
  3071. */
  3072. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3073. panel_physical_type = utils->get_property(utils->data,
  3074. "qcom,mdss-dsi-panel-physical-type", NULL);
  3075. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3076. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3077. rc = dsi_panel_parse_host_config(panel);
  3078. if (rc) {
  3079. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3080. rc);
  3081. goto error;
  3082. }
  3083. rc = dsi_panel_parse_panel_mode(panel);
  3084. if (rc) {
  3085. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3086. rc);
  3087. goto error;
  3088. }
  3089. rc = dsi_panel_parse_dfps_caps(panel);
  3090. if (rc)
  3091. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3092. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3093. if (rc)
  3094. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3095. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3096. if (rc)
  3097. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3098. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3099. if (rc)
  3100. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3101. rc = dsi_panel_parse_phy_props(panel);
  3102. if (rc) {
  3103. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3104. rc);
  3105. goto error;
  3106. }
  3107. rc = panel->panel_ops.parse_gpios(panel);
  3108. if (rc) {
  3109. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3110. goto error;
  3111. }
  3112. rc = panel->panel_ops.parse_power_cfg(panel);
  3113. if (rc)
  3114. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3115. rc = dsi_panel_parse_bl_config(panel);
  3116. if (rc) {
  3117. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3118. if (rc == -EPROBE_DEFER)
  3119. goto error;
  3120. }
  3121. rc = dsi_panel_parse_misc_features(panel);
  3122. if (rc)
  3123. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3124. rc = dsi_panel_parse_hdr_config(panel);
  3125. if (rc)
  3126. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3127. rc = dsi_panel_get_mode_count(panel);
  3128. if (rc) {
  3129. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3130. goto error;
  3131. }
  3132. rc = dsi_panel_parse_dms_info(panel);
  3133. if (rc)
  3134. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3135. rc = dsi_panel_parse_esd_config(panel);
  3136. if (rc)
  3137. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3138. rc = dsi_panel_vreg_get(panel);
  3139. if (rc) {
  3140. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3141. panel->name, rc);
  3142. goto error;
  3143. }
  3144. panel->power_mode = SDE_MODE_DPMS_OFF;
  3145. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3146. NULL, DRM_MODE_CONNECTOR_DSI);
  3147. panel->mipi_device.dev.of_node = of_node;
  3148. drm_panel_add(&panel->drm_panel);
  3149. mutex_init(&panel->panel_lock);
  3150. return panel;
  3151. error:
  3152. kfree(panel);
  3153. return ERR_PTR(rc);
  3154. }
  3155. void dsi_panel_put(struct dsi_panel *panel)
  3156. {
  3157. drm_panel_remove(&panel->drm_panel);
  3158. /* free resources allocated for ESD check */
  3159. dsi_panel_esd_config_deinit(&panel->esd_config);
  3160. kfree(panel->avr_caps.avr_step_fps_list);
  3161. kfree(panel);
  3162. }
  3163. int dsi_panel_drv_init(struct dsi_panel *panel,
  3164. struct mipi_dsi_host *host)
  3165. {
  3166. int rc = 0;
  3167. struct mipi_dsi_device *dev;
  3168. if (!panel || !host) {
  3169. DSI_ERR("invalid params\n");
  3170. return -EINVAL;
  3171. }
  3172. mutex_lock(&panel->panel_lock);
  3173. dev = &panel->mipi_device;
  3174. dev->host = host;
  3175. /*
  3176. * We dont have device structure since panel is not a device node.
  3177. * When using drm panel framework, the device is probed when the host is
  3178. * create.
  3179. */
  3180. dev->channel = 0;
  3181. dev->lanes = 4;
  3182. panel->host = host;
  3183. rc = panel->panel_ops.pinctrl_init(panel);
  3184. if (rc) {
  3185. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3186. panel->name, rc);
  3187. goto exit;
  3188. }
  3189. rc = panel->panel_ops.gpio_request(panel);
  3190. if (rc) {
  3191. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3192. rc);
  3193. goto error_pinctrl_deinit;
  3194. }
  3195. rc = panel->panel_ops.bl_register(panel);
  3196. if (rc) {
  3197. if (rc != -EPROBE_DEFER)
  3198. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3199. panel->name, rc);
  3200. goto error_gpio_release;
  3201. }
  3202. goto exit;
  3203. error_gpio_release:
  3204. (void)dsi_panel_gpio_release(panel);
  3205. error_pinctrl_deinit:
  3206. (void)dsi_panel_pinctrl_deinit(panel);
  3207. exit:
  3208. mutex_unlock(&panel->panel_lock);
  3209. return rc;
  3210. }
  3211. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3212. {
  3213. int rc = 0;
  3214. if (!panel) {
  3215. DSI_ERR("invalid params\n");
  3216. return -EINVAL;
  3217. }
  3218. mutex_lock(&panel->panel_lock);
  3219. rc = panel->panel_ops.bl_unregister(panel);
  3220. if (rc)
  3221. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3222. panel->name, rc);
  3223. rc = panel->panel_ops.gpio_release(panel);
  3224. if (rc)
  3225. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3226. rc);
  3227. rc = panel->panel_ops.pinctrl_deinit(panel);
  3228. if (rc)
  3229. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3230. rc);
  3231. rc = dsi_panel_vreg_put(panel);
  3232. if (rc)
  3233. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3234. panel->host = NULL;
  3235. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3236. mutex_unlock(&panel->panel_lock);
  3237. return rc;
  3238. }
  3239. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3240. struct dsi_display_mode *mode)
  3241. {
  3242. return 0;
  3243. }
  3244. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3245. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3246. {
  3247. const char *compression;
  3248. u32 *array = NULL, top_count, len, i;
  3249. int rc = -EINVAL;
  3250. bool dsc_enable = false;
  3251. *dsc_count = 0;
  3252. *lm_count = 0;
  3253. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3254. if (compression && !strcmp(compression, "dsc"))
  3255. dsc_enable = true;
  3256. len = utils->count_u32_elems(node, "qcom,display-topology");
  3257. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3258. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3259. return rc;
  3260. top_count = len / TOPOLOGY_SET_LEN;
  3261. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3262. if (!array)
  3263. return -ENOMEM;
  3264. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3265. if (rc) {
  3266. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3267. goto read_fail;
  3268. }
  3269. for (i = 0; i < top_count; i++) {
  3270. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3271. if (dsc_enable)
  3272. *dsc_count = max(*dsc_count,
  3273. array[i * TOPOLOGY_SET_LEN + 1]);
  3274. }
  3275. read_fail:
  3276. kfree(array);
  3277. return 0;
  3278. }
  3279. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3280. {
  3281. const u32 SINGLE_MODE_SUPPORT = 1;
  3282. struct dsi_parser_utils *utils;
  3283. struct device_node *timings_np, *child_np;
  3284. int num_dfps_rates;
  3285. int num_video_modes = 0, num_cmd_modes = 0;
  3286. int count, rc = 0;
  3287. u32 dsc_count = 0, lm_count = 0;
  3288. if (!panel) {
  3289. DSI_ERR("invalid params\n");
  3290. return -EINVAL;
  3291. }
  3292. utils = &panel->utils;
  3293. panel->num_timing_nodes = 0;
  3294. timings_np = utils->get_child_by_name(utils->data,
  3295. "qcom,mdss-dsi-display-timings");
  3296. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3297. DSI_ERR("no display timing nodes defined\n");
  3298. rc = -EINVAL;
  3299. goto error;
  3300. }
  3301. count = utils->get_child_count(timings_np);
  3302. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3303. count > DSI_MODE_MAX) {
  3304. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3305. rc = -EINVAL;
  3306. goto error;
  3307. }
  3308. /* No multiresolution support is available for video mode panels.
  3309. * Multi-mode is supported for video mode during POMS is enabled.
  3310. */
  3311. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3312. !panel->host_config.ext_bridge_mode &&
  3313. !panel->panel_mode_switch_enabled)
  3314. count = SINGLE_MODE_SUPPORT;
  3315. panel->num_timing_nodes = count;
  3316. dsi_for_each_child_node(timings_np, child_np) {
  3317. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3318. num_video_modes++;
  3319. else if (utils->read_bool(child_np,
  3320. "qcom,mdss-dsi-cmd-mode"))
  3321. num_cmd_modes++;
  3322. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3323. num_video_modes++;
  3324. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3325. num_cmd_modes++;
  3326. dsi_panel_get_max_res_count(utils, child_np,
  3327. &dsc_count, &lm_count);
  3328. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3329. panel->lm_count = max(lm_count, panel->lm_count);
  3330. }
  3331. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3332. panel->dfps_caps.dfps_list_len;
  3333. /*
  3334. * Inflate num_of_modes by fps in dfps.
  3335. * Single command mode for video mode panels supporting
  3336. * panel operating mode switch.
  3337. */
  3338. num_video_modes = num_video_modes * num_dfps_rates;
  3339. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3340. (panel->panel_mode_switch_enabled))
  3341. num_cmd_modes = 1;
  3342. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3343. error:
  3344. return rc;
  3345. }
  3346. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3347. struct dsi_panel_phy_props *phy_props)
  3348. {
  3349. int rc = 0;
  3350. if (!panel || !phy_props) {
  3351. DSI_ERR("invalid params\n");
  3352. return -EINVAL;
  3353. }
  3354. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3355. return rc;
  3356. }
  3357. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3358. struct dsi_dfps_capabilities *dfps_caps)
  3359. {
  3360. int rc = 0;
  3361. if (!panel || !dfps_caps) {
  3362. DSI_ERR("invalid params\n");
  3363. return -EINVAL;
  3364. }
  3365. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3366. return rc;
  3367. }
  3368. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3369. {
  3370. int i;
  3371. if (!mode->priv_info)
  3372. return;
  3373. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3374. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3375. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3376. }
  3377. kfree(mode->priv_info);
  3378. }
  3379. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3380. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3381. {
  3382. u32 frame_time_us, nslices;
  3383. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3384. dsi_transfer_time_us, pixel_clk_khz;
  3385. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3386. struct dsi_mode_info *timing = &mode->timing;
  3387. struct dsi_display_mode *display_mode;
  3388. u32 jitter_numer, jitter_denom, prefill_lines;
  3389. u32 default_prefill_lines, actual_prefill_lines, vtotal;
  3390. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3391. u16 bpp;
  3392. /* Packet overhead in bits,
  3393. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3394. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3395. * 1 byte dcs data command.
  3396. */
  3397. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3398. packet_overhead = 120;
  3399. else
  3400. packet_overhead = 56;
  3401. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3402. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3403. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3404. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3405. if (timing->refresh_rate >= 120)
  3406. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3407. if (timing->dsc_enabled) {
  3408. nslices = (timing->h_active)/(dsc->config.slice_width);
  3409. /* (slice width x bit-per-pixel + packet overhead) x
  3410. * number of slices x height x fps / lane
  3411. */
  3412. bpp = DSC_BPP(dsc->config);
  3413. bits_per_line = ((dsc->config.slice_width * bpp) +
  3414. packet_overhead) * nslices;
  3415. bits_per_line = bits_per_line / (config->num_data_lanes);
  3416. min_bitclk_hz = (bits_per_line * timing->v_active *
  3417. timing->refresh_rate);
  3418. } else {
  3419. total_active_pixels = ((dsi_h_active_dce(timing)
  3420. * timing->v_active));
  3421. /* calculate the actual bitclk needed to transfer the frame */
  3422. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3423. (config->bpp));
  3424. do_div(min_bitclk_hz, config->num_data_lanes);
  3425. }
  3426. timing->min_dsi_clk_hz = min_bitclk_hz;
  3427. /*
  3428. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3429. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3430. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3431. * threshold time are configured to 40us.
  3432. */
  3433. if (mode->priv_info->disable_rsc_solver) {
  3434. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3435. } else {
  3436. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3437. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3438. }
  3439. /*
  3440. * Increase the prefill_lines proportionately as recommended
  3441. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3442. */
  3443. default_prefill_lines = mult_frac(MIN_PREFILL_LINES, timing->refresh_rate, 60);
  3444. actual_prefill_lines = timing->v_back_porch + timing->v_front_porch + timing->v_sync_width;
  3445. vtotal = actual_prefill_lines + timing->v_active;
  3446. /* consider the max of default prefill lines and actual prefill lines */
  3447. prefill_lines = max(actual_prefill_lines, default_prefill_lines);
  3448. prefill_time_us = mult_frac(frame_time_us, prefill_lines, vtotal);
  3449. min_threshold_us = min_threshold_us + prefill_time_us;
  3450. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3451. if (timing->clk_rate_hz) {
  3452. /* adjust the transfer time proportionately for bit clk*/
  3453. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3454. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3455. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3456. } else if (mode->priv_info->mdp_transfer_time_us) {
  3457. max_transfer_us = frame_time_us - min_threshold_us;
  3458. mode->priv_info->mdp_transfer_time_us = min(
  3459. mode->priv_info->mdp_transfer_time_us,
  3460. max_transfer_us);
  3461. timing->dsi_transfer_time_us =
  3462. mode->priv_info->mdp_transfer_time_us;
  3463. } else {
  3464. if ((min_threshold_us > frame_threshold_us) ||
  3465. (mode->priv_info->disable_rsc_solver))
  3466. frame_threshold_us = min_threshold_us;
  3467. timing->dsi_transfer_time_us = frame_time_us -
  3468. frame_threshold_us;
  3469. }
  3470. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3471. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3472. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3473. timing->mdp_transfer_time_us =
  3474. mode->priv_info->mdp_transfer_time_us;
  3475. }
  3476. /* Calculate pclk_khz to update modeinfo */
  3477. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3478. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3479. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3480. do_div(pixel_clk_khz, config->bpp);
  3481. display_mode->pixel_clk_khz = pixel_clk_khz;
  3482. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3483. }
  3484. int dsi_panel_get_mode(struct dsi_panel *panel,
  3485. u32 index, struct dsi_display_mode *mode,
  3486. int topology_override)
  3487. {
  3488. struct device_node *timings_np, *child_np;
  3489. struct dsi_parser_utils *utils;
  3490. struct dsi_display_mode_priv_info *prv_info;
  3491. u32 child_idx = 0;
  3492. int rc = 0, num_timings;
  3493. int traffic_mode;
  3494. void *utils_data = NULL;
  3495. if (!panel || !mode) {
  3496. DSI_ERR("invalid params\n");
  3497. return -EINVAL;
  3498. }
  3499. mutex_lock(&panel->panel_lock);
  3500. utils = &panel->utils;
  3501. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3502. if (!mode->priv_info) {
  3503. rc = -ENOMEM;
  3504. goto done;
  3505. }
  3506. prv_info = mode->priv_info;
  3507. timings_np = utils->get_child_by_name(utils->data,
  3508. "qcom,mdss-dsi-display-timings");
  3509. if (!timings_np) {
  3510. DSI_ERR("no display timing nodes defined\n");
  3511. rc = -EINVAL;
  3512. goto parse_fail;
  3513. }
  3514. num_timings = utils->get_child_count(timings_np);
  3515. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3516. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3517. rc = -EINVAL;
  3518. goto parse_fail;
  3519. }
  3520. utils_data = utils->data;
  3521. traffic_mode = panel->video_config.traffic_mode;
  3522. dsi_for_each_child_node(timings_np, child_np) {
  3523. if (index != child_idx++)
  3524. continue;
  3525. utils->data = child_np;
  3526. if (panel->panel_mode_switch_enabled) {
  3527. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3528. mode->panel_mode_caps = panel->panel_mode;
  3529. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3530. child_idx);
  3531. }
  3532. } else {
  3533. mode->panel_mode_caps = panel->panel_mode;
  3534. }
  3535. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3536. if (rc)
  3537. mode->mode_idx = index;
  3538. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3539. if (rc) {
  3540. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3541. goto parse_fail;
  3542. }
  3543. if (panel->dyn_clk_caps.dyn_clk_support) {
  3544. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3545. if (rc)
  3546. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3547. }
  3548. rc = dsi_panel_parse_dsc_params(mode, utils);
  3549. if (rc) {
  3550. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3551. goto parse_fail;
  3552. }
  3553. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3554. if (rc) {
  3555. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3556. goto parse_fail;
  3557. }
  3558. rc = dsi_panel_parse_topology(prv_info, utils,
  3559. topology_override);
  3560. if (rc) {
  3561. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3562. goto parse_fail;
  3563. }
  3564. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3565. if (rc) {
  3566. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3567. goto parse_fail;
  3568. }
  3569. rc = dsi_panel_parse_jitter_config(mode, utils);
  3570. if (rc)
  3571. DSI_ERR(
  3572. "failed to parse panel jitter config, rc=%d\n", rc);
  3573. rc = dsi_panel_parse_phy_timing(mode, utils);
  3574. if (rc) {
  3575. DSI_ERR(
  3576. "failed to parse panel phy timings, rc=%d\n", rc);
  3577. goto parse_fail;
  3578. }
  3579. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3580. if (rc)
  3581. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3582. }
  3583. goto done;
  3584. parse_fail:
  3585. kfree(mode->priv_info);
  3586. mode->priv_info = NULL;
  3587. done:
  3588. utils->data = utils_data;
  3589. mutex_unlock(&panel->panel_lock);
  3590. return rc;
  3591. }
  3592. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3593. struct dsi_display_mode *mode,
  3594. struct dsi_host_config *config)
  3595. {
  3596. int rc = 0;
  3597. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3598. if (!panel || !mode || !config) {
  3599. DSI_ERR("invalid params\n");
  3600. return -EINVAL;
  3601. }
  3602. mutex_lock(&panel->panel_lock);
  3603. config->panel_mode = panel->panel_mode;
  3604. memcpy(&config->common_config, &panel->host_config,
  3605. sizeof(config->common_config));
  3606. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3607. memcpy(&config->u.video_engine, &panel->video_config,
  3608. sizeof(config->u.video_engine));
  3609. } else {
  3610. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3611. sizeof(config->u.cmd_engine));
  3612. }
  3613. memcpy(&config->video_timing, &mode->timing,
  3614. sizeof(config->video_timing));
  3615. config->video_timing.mdp_transfer_time_us =
  3616. mode->priv_info->mdp_transfer_time_us;
  3617. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3618. config->video_timing.dsc = &mode->priv_info->dsc;
  3619. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3620. config->video_timing.vdc = &mode->priv_info->vdc;
  3621. if (dyn_clk_caps->dyn_clk_support)
  3622. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3623. else
  3624. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3625. config->esc_clk_rate_hz = 19200000;
  3626. mutex_unlock(&panel->panel_lock);
  3627. return rc;
  3628. }
  3629. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3630. {
  3631. int rc = 0;
  3632. if (!panel) {
  3633. DSI_ERR("invalid params\n");
  3634. return -EINVAL;
  3635. }
  3636. mutex_lock(&panel->panel_lock);
  3637. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3638. if (panel->lp11_init)
  3639. goto error;
  3640. rc = dsi_panel_power_on(panel);
  3641. if (rc) {
  3642. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3643. goto error;
  3644. }
  3645. error:
  3646. mutex_unlock(&panel->panel_lock);
  3647. return rc;
  3648. }
  3649. int dsi_panel_update_pps(struct dsi_panel *panel)
  3650. {
  3651. int rc = 0;
  3652. struct dsi_panel_cmd_set *set = NULL;
  3653. struct dsi_display_mode_priv_info *priv_info = NULL;
  3654. if (!panel || !panel->cur_mode) {
  3655. DSI_ERR("invalid params\n");
  3656. return -EINVAL;
  3657. }
  3658. mutex_lock(&panel->panel_lock);
  3659. priv_info = panel->cur_mode->priv_info;
  3660. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3661. if (priv_info->dsc_enabled)
  3662. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3663. panel->dce_pps_cmd, 0,
  3664. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3665. else if (priv_info->vdc_enabled)
  3666. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3667. panel->dce_pps_cmd, 0,
  3668. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3669. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3670. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3671. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3672. if (rc) {
  3673. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3674. goto error;
  3675. }
  3676. }
  3677. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3678. if (rc) {
  3679. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3680. panel->name, rc);
  3681. }
  3682. dsi_panel_destroy_cmd_packets(set);
  3683. error:
  3684. mutex_unlock(&panel->panel_lock);
  3685. return rc;
  3686. }
  3687. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3688. {
  3689. int rc = 0;
  3690. if (!panel) {
  3691. DSI_ERR("invalid params\n");
  3692. return -EINVAL;
  3693. }
  3694. mutex_lock(&panel->panel_lock);
  3695. if (!panel->panel_initialized)
  3696. goto exit;
  3697. /*
  3698. * Consider LP1->LP2->LP1.
  3699. * If the panel is already in LP mode, do not need to
  3700. * set the regulator.
  3701. * IBB and AB power mode would be set at the same time
  3702. * in PMIC driver, so we only call ibb setting that is enough.
  3703. */
  3704. if (dsi_panel_is_type_oled(panel) &&
  3705. panel->power_mode != SDE_MODE_DPMS_LP2)
  3706. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3707. "ibb", REGULATOR_MODE_IDLE);
  3708. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3709. if (rc)
  3710. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3711. panel->name, rc);
  3712. exit:
  3713. mutex_unlock(&panel->panel_lock);
  3714. return rc;
  3715. }
  3716. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3717. {
  3718. int rc = 0;
  3719. if (!panel) {
  3720. DSI_ERR("invalid params\n");
  3721. return -EINVAL;
  3722. }
  3723. mutex_lock(&panel->panel_lock);
  3724. if (!panel->panel_initialized)
  3725. goto exit;
  3726. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3727. if (rc)
  3728. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3729. panel->name, rc);
  3730. exit:
  3731. mutex_unlock(&panel->panel_lock);
  3732. return rc;
  3733. }
  3734. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3735. {
  3736. int rc = 0;
  3737. if (!panel) {
  3738. DSI_ERR("invalid params\n");
  3739. return -EINVAL;
  3740. }
  3741. mutex_lock(&panel->panel_lock);
  3742. if (!panel->panel_initialized)
  3743. goto exit;
  3744. /*
  3745. * Consider about LP1->LP2->NOLP.
  3746. */
  3747. if (dsi_panel_is_type_oled(panel) &&
  3748. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3749. panel->power_mode == SDE_MODE_DPMS_LP2))
  3750. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3751. "ibb", REGULATOR_MODE_NORMAL);
  3752. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3753. if (rc)
  3754. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3755. panel->name, rc);
  3756. exit:
  3757. mutex_unlock(&panel->panel_lock);
  3758. return rc;
  3759. }
  3760. int dsi_panel_prepare(struct dsi_panel *panel)
  3761. {
  3762. int rc = 0;
  3763. if (!panel) {
  3764. DSI_ERR("invalid params\n");
  3765. return -EINVAL;
  3766. }
  3767. mutex_lock(&panel->panel_lock);
  3768. if (panel->lp11_init) {
  3769. rc = dsi_panel_power_on(panel);
  3770. if (rc) {
  3771. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3772. panel->name, rc);
  3773. goto error;
  3774. }
  3775. }
  3776. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3777. if (rc) {
  3778. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3779. panel->name, rc);
  3780. goto error;
  3781. }
  3782. error:
  3783. mutex_unlock(&panel->panel_lock);
  3784. return rc;
  3785. }
  3786. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3787. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3788. {
  3789. static const int ROI_CMD_LEN = 5;
  3790. int rc = 0;
  3791. /* DTYPE_DCS_LWRITE */
  3792. char *caset, *paset;
  3793. set->cmds = NULL;
  3794. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3795. if (!caset) {
  3796. rc = -ENOMEM;
  3797. goto exit;
  3798. }
  3799. caset[0] = 0x2a;
  3800. caset[1] = (roi->x & 0xFF00) >> 8;
  3801. caset[2] = roi->x & 0xFF;
  3802. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3803. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3804. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3805. if (!paset) {
  3806. rc = -ENOMEM;
  3807. goto error_free_mem;
  3808. }
  3809. paset[0] = 0x2b;
  3810. paset[1] = (roi->y & 0xFF00) >> 8;
  3811. paset[2] = roi->y & 0xFF;
  3812. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3813. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3814. set->type = DSI_CMD_SET_ROI;
  3815. set->state = DSI_CMD_SET_STATE_LP;
  3816. set->count = 2; /* send caset + paset together */
  3817. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3818. if (!set->cmds) {
  3819. rc = -ENOMEM;
  3820. goto error_free_mem;
  3821. }
  3822. set->cmds[0].msg.channel = 0;
  3823. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3824. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3825. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3826. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3827. set->cmds[0].msg.tx_buf = caset;
  3828. set->cmds[0].msg.rx_len = 0;
  3829. set->cmds[0].msg.rx_buf = 0;
  3830. set->cmds[0].last_command = 0;
  3831. set->cmds[0].post_wait_ms = 0;
  3832. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3833. set->cmds[1].msg.channel = 0;
  3834. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3835. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3836. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3837. set->cmds[1].msg.tx_buf = paset;
  3838. set->cmds[1].msg.rx_len = 0;
  3839. set->cmds[1].msg.rx_buf = 0;
  3840. set->cmds[1].last_command = 1;
  3841. set->cmds[1].post_wait_ms = 0;
  3842. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3843. goto exit;
  3844. error_free_mem:
  3845. kfree(caset);
  3846. kfree(paset);
  3847. kfree(set->cmds);
  3848. exit:
  3849. return rc;
  3850. }
  3851. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3852. int ctrl_idx)
  3853. {
  3854. int rc = 0;
  3855. if (!panel) {
  3856. DSI_ERR("invalid params\n");
  3857. return -EINVAL;
  3858. }
  3859. mutex_lock(&panel->panel_lock);
  3860. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3861. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3862. if (rc)
  3863. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3864. panel->name, rc);
  3865. mutex_unlock(&panel->panel_lock);
  3866. return rc;
  3867. }
  3868. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3869. int ctrl_idx)
  3870. {
  3871. int rc = 0;
  3872. if (!panel) {
  3873. DSI_ERR("invalid params\n");
  3874. return -EINVAL;
  3875. }
  3876. mutex_lock(&panel->panel_lock);
  3877. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3878. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3879. if (rc)
  3880. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3881. panel->name, rc);
  3882. mutex_unlock(&panel->panel_lock);
  3883. return rc;
  3884. }
  3885. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3886. struct dsi_rect *roi)
  3887. {
  3888. int rc = 0;
  3889. struct dsi_panel_cmd_set *set;
  3890. struct dsi_display_mode_priv_info *priv_info;
  3891. if (!panel || !panel->cur_mode) {
  3892. DSI_ERR("Invalid params\n");
  3893. return -EINVAL;
  3894. }
  3895. priv_info = panel->cur_mode->priv_info;
  3896. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3897. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3898. if (rc) {
  3899. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3900. panel->name, rc);
  3901. return rc;
  3902. }
  3903. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3904. roi->x, roi->y, roi->w, roi->h);
  3905. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3906. mutex_lock(&panel->panel_lock);
  3907. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3908. if (rc)
  3909. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3910. panel->name, rc);
  3911. mutex_unlock(&panel->panel_lock);
  3912. dsi_panel_destroy_cmd_packets(set);
  3913. dsi_panel_dealloc_cmd_packets(set);
  3914. return rc;
  3915. }
  3916. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3917. {
  3918. int rc = 0;
  3919. if (!panel) {
  3920. DSI_ERR("Invalid params\n");
  3921. return -EINVAL;
  3922. }
  3923. mutex_lock(&panel->panel_lock);
  3924. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3925. if (rc)
  3926. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3927. panel->name, rc);
  3928. mutex_unlock(&panel->panel_lock);
  3929. return rc;
  3930. }
  3931. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3932. {
  3933. int rc = 0;
  3934. if (!panel) {
  3935. DSI_ERR("Invalid params\n");
  3936. return -EINVAL;
  3937. }
  3938. mutex_lock(&panel->panel_lock);
  3939. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3940. if (rc)
  3941. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3942. panel->name, rc);
  3943. mutex_unlock(&panel->panel_lock);
  3944. return rc;
  3945. }
  3946. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3947. {
  3948. int rc = 0;
  3949. if (!panel) {
  3950. DSI_ERR("Invalid params\n");
  3951. return -EINVAL;
  3952. }
  3953. mutex_lock(&panel->panel_lock);
  3954. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3955. if (rc)
  3956. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3957. panel->name, rc);
  3958. mutex_unlock(&panel->panel_lock);
  3959. return rc;
  3960. }
  3961. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3962. {
  3963. int rc = 0;
  3964. if (!panel) {
  3965. DSI_ERR("Invalid params\n");
  3966. return -EINVAL;
  3967. }
  3968. mutex_lock(&panel->panel_lock);
  3969. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3970. if (rc)
  3971. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3972. panel->name, rc);
  3973. mutex_unlock(&panel->panel_lock);
  3974. return rc;
  3975. }
  3976. int dsi_panel_switch(struct dsi_panel *panel)
  3977. {
  3978. int rc = 0;
  3979. if (!panel) {
  3980. DSI_ERR("Invalid params\n");
  3981. return -EINVAL;
  3982. }
  3983. mutex_lock(&panel->panel_lock);
  3984. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3985. if (rc)
  3986. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3987. panel->name, rc);
  3988. mutex_unlock(&panel->panel_lock);
  3989. return rc;
  3990. }
  3991. int dsi_panel_post_switch(struct dsi_panel *panel)
  3992. {
  3993. int rc = 0;
  3994. if (!panel) {
  3995. DSI_ERR("Invalid params\n");
  3996. return -EINVAL;
  3997. }
  3998. mutex_lock(&panel->panel_lock);
  3999. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  4000. if (rc)
  4001. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  4002. panel->name, rc);
  4003. mutex_unlock(&panel->panel_lock);
  4004. return rc;
  4005. }
  4006. int dsi_panel_enable(struct dsi_panel *panel)
  4007. {
  4008. int rc = 0;
  4009. if (!panel) {
  4010. DSI_ERR("Invalid params\n");
  4011. return -EINVAL;
  4012. }
  4013. mutex_lock(&panel->panel_lock);
  4014. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  4015. if (rc) {
  4016. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  4017. panel->name, rc);
  4018. goto error;
  4019. }
  4020. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  4021. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  4022. if (rc) {
  4023. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  4024. panel->name, rc);
  4025. goto error;
  4026. }
  4027. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  4028. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  4029. if (rc) {
  4030. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  4031. panel->name, rc);
  4032. goto error;
  4033. }
  4034. }
  4035. panel->panel_initialized = true;
  4036. error:
  4037. mutex_unlock(&panel->panel_lock);
  4038. return rc;
  4039. }
  4040. int dsi_panel_post_enable(struct dsi_panel *panel)
  4041. {
  4042. int rc = 0;
  4043. if (!panel) {
  4044. DSI_ERR("invalid params\n");
  4045. return -EINVAL;
  4046. }
  4047. mutex_lock(&panel->panel_lock);
  4048. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  4049. if (rc) {
  4050. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  4051. panel->name, rc);
  4052. goto error;
  4053. }
  4054. error:
  4055. mutex_unlock(&panel->panel_lock);
  4056. return rc;
  4057. }
  4058. int dsi_panel_pre_disable(struct dsi_panel *panel)
  4059. {
  4060. int rc = 0;
  4061. if (!panel) {
  4062. DSI_ERR("invalid params\n");
  4063. return -EINVAL;
  4064. }
  4065. mutex_lock(&panel->panel_lock);
  4066. if (gpio_is_valid(panel->bl_config.en_gpio))
  4067. gpio_set_value(panel->bl_config.en_gpio, 0);
  4068. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4069. if (rc) {
  4070. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4071. panel->name, rc);
  4072. goto error;
  4073. }
  4074. error:
  4075. mutex_unlock(&panel->panel_lock);
  4076. return rc;
  4077. }
  4078. int dsi_panel_disable(struct dsi_panel *panel)
  4079. {
  4080. int rc = 0;
  4081. if (!panel) {
  4082. DSI_ERR("invalid params\n");
  4083. return -EINVAL;
  4084. }
  4085. mutex_lock(&panel->panel_lock);
  4086. /* Avoid sending panel off commands when ESD recovery is underway */
  4087. if (!atomic_read(&panel->esd_recovery_pending)) {
  4088. /*
  4089. * Need to set IBB/AB regulator mode to STANDBY,
  4090. * if panel is going off from AOD mode.
  4091. */
  4092. if (dsi_panel_is_type_oled(panel) &&
  4093. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4094. panel->power_mode == SDE_MODE_DPMS_LP2))
  4095. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4096. "ibb", REGULATOR_MODE_STANDBY);
  4097. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4098. if (rc) {
  4099. /*
  4100. * Sending panel off commands may fail when DSI
  4101. * controller is in a bad state. These failures can be
  4102. * ignored since controller will go for full reset on
  4103. * subsequent display enable anyway.
  4104. */
  4105. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4106. panel->name, rc);
  4107. rc = 0;
  4108. }
  4109. }
  4110. panel->panel_initialized = false;
  4111. panel->power_mode = SDE_MODE_DPMS_OFF;
  4112. mutex_unlock(&panel->panel_lock);
  4113. return rc;
  4114. }
  4115. int dsi_panel_unprepare(struct dsi_panel *panel)
  4116. {
  4117. int rc = 0;
  4118. if (!panel) {
  4119. DSI_ERR("invalid params\n");
  4120. return -EINVAL;
  4121. }
  4122. mutex_lock(&panel->panel_lock);
  4123. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4124. if (rc) {
  4125. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4126. panel->name, rc);
  4127. goto error;
  4128. }
  4129. error:
  4130. mutex_unlock(&panel->panel_lock);
  4131. return rc;
  4132. }
  4133. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4134. {
  4135. int rc = 0;
  4136. if (!panel) {
  4137. DSI_ERR("invalid params\n");
  4138. return -EINVAL;
  4139. }
  4140. mutex_lock(&panel->panel_lock);
  4141. rc = dsi_panel_power_off(panel);
  4142. if (rc) {
  4143. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4144. panel->name, rc);
  4145. goto error;
  4146. }
  4147. error:
  4148. mutex_unlock(&panel->panel_lock);
  4149. return rc;
  4150. }