debug.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */
  3. #include <linux/err.h>
  4. #include <linux/seq_file.h>
  5. #include <linux/debugfs.h>
  6. #include "main.h"
  7. #include "bus.h"
  8. #include "debug.h"
  9. #include "pci.h"
  10. #define MMIO_REG_ACCESS_MEM_TYPE 0xFF
  11. #define MMIO_REG_RAW_ACCESS_MEM_TYPE 0xFE
  12. #if IS_ENABLED(CONFIG_IPC_LOGGING)
  13. void *cnss_ipc_log_context;
  14. void *cnss_ipc_log_long_context;
  15. #endif
  16. static int cnss_pin_connect_show(struct seq_file *s, void *data)
  17. {
  18. struct cnss_plat_data *cnss_priv = s->private;
  19. seq_puts(s, "Pin connect results\n");
  20. seq_printf(s, "FW power pin result: %04x\n",
  21. cnss_priv->pin_result.fw_pwr_pin_result);
  22. seq_printf(s, "FW PHY IO pin result: %04x\n",
  23. cnss_priv->pin_result.fw_phy_io_pin_result);
  24. seq_printf(s, "FW RF pin result: %04x\n",
  25. cnss_priv->pin_result.fw_rf_pin_result);
  26. seq_printf(s, "Host pin result: %04x\n",
  27. cnss_priv->pin_result.host_pin_result);
  28. seq_puts(s, "\n");
  29. return 0;
  30. }
  31. static int cnss_pin_connect_open(struct inode *inode, struct file *file)
  32. {
  33. return single_open(file, cnss_pin_connect_show, inode->i_private);
  34. }
  35. static const struct file_operations cnss_pin_connect_fops = {
  36. .read = seq_read,
  37. .release = single_release,
  38. .open = cnss_pin_connect_open,
  39. .owner = THIS_MODULE,
  40. .llseek = seq_lseek,
  41. };
  42. static int cnss_stats_show_state(struct seq_file *s,
  43. struct cnss_plat_data *plat_priv)
  44. {
  45. enum cnss_driver_state i;
  46. int skip = 0;
  47. unsigned long state;
  48. seq_printf(s, "\nState: 0x%lx(", plat_priv->driver_state);
  49. for (i = 0, state = plat_priv->driver_state; state != 0;
  50. state >>= 1, i++) {
  51. if (!(state & 0x1))
  52. continue;
  53. if (skip++)
  54. seq_puts(s, " | ");
  55. switch (i) {
  56. case CNSS_QMI_WLFW_CONNECTED:
  57. seq_puts(s, "QMI_WLFW_CONNECTED");
  58. continue;
  59. case CNSS_FW_MEM_READY:
  60. seq_puts(s, "FW_MEM_READY");
  61. continue;
  62. case CNSS_FW_READY:
  63. seq_puts(s, "FW_READY");
  64. continue;
  65. case CNSS_IN_COLD_BOOT_CAL:
  66. seq_puts(s, "IN_COLD_BOOT_CAL");
  67. continue;
  68. case CNSS_DRIVER_LOADING:
  69. seq_puts(s, "DRIVER_LOADING");
  70. continue;
  71. case CNSS_DRIVER_UNLOADING:
  72. seq_puts(s, "DRIVER_UNLOADING");
  73. continue;
  74. case CNSS_DRIVER_IDLE_RESTART:
  75. seq_puts(s, "IDLE_RESTART");
  76. continue;
  77. case CNSS_DRIVER_IDLE_SHUTDOWN:
  78. seq_puts(s, "IDLE_SHUTDOWN");
  79. continue;
  80. case CNSS_DRIVER_PROBED:
  81. seq_puts(s, "DRIVER_PROBED");
  82. continue;
  83. case CNSS_DRIVER_RECOVERY:
  84. seq_puts(s, "DRIVER_RECOVERY");
  85. continue;
  86. case CNSS_FW_BOOT_RECOVERY:
  87. seq_puts(s, "FW_BOOT_RECOVERY");
  88. continue;
  89. case CNSS_DEV_ERR_NOTIFY:
  90. seq_puts(s, "DEV_ERR");
  91. continue;
  92. case CNSS_DRIVER_DEBUG:
  93. seq_puts(s, "DRIVER_DEBUG");
  94. continue;
  95. case CNSS_COEX_CONNECTED:
  96. seq_puts(s, "COEX_CONNECTED");
  97. continue;
  98. case CNSS_IMS_CONNECTED:
  99. seq_puts(s, "IMS_CONNECTED");
  100. continue;
  101. case CNSS_IN_SUSPEND_RESUME:
  102. seq_puts(s, "IN_SUSPEND_RESUME");
  103. continue;
  104. case CNSS_IN_REBOOT:
  105. seq_puts(s, "IN_REBOOT");
  106. continue;
  107. case CNSS_COLD_BOOT_CAL_DONE:
  108. seq_puts(s, "COLD_BOOT_CAL_DONE");
  109. continue;
  110. case CNSS_IN_PANIC:
  111. seq_puts(s, "IN_PANIC");
  112. continue;
  113. case CNSS_QMI_DEL_SERVER:
  114. seq_puts(s, "DEL_SERVER_IN_PROGRESS");
  115. continue;
  116. case CNSS_QMI_DMS_CONNECTED:
  117. seq_puts(s, "DMS_CONNECTED");
  118. continue;
  119. case CNSS_DAEMON_CONNECTED:
  120. seq_puts(s, "DAEMON_CONNECTED");
  121. continue;
  122. case CNSS_PCI_PROBE_DONE:
  123. seq_puts(s, "PCI PROBE DONE");
  124. continue;
  125. }
  126. seq_printf(s, "UNKNOWN-%d", i);
  127. }
  128. seq_puts(s, ")\n");
  129. return 0;
  130. }
  131. static int cnss_stats_show_gpio_state(struct seq_file *s,
  132. struct cnss_plat_data *plat_priv)
  133. {
  134. seq_printf(s, "\nHost SOL: %d", cnss_get_host_sol_value(plat_priv));
  135. seq_printf(s, "\nDev SOL: %d", cnss_get_dev_sol_value(plat_priv));
  136. return 0;
  137. }
  138. static int cnss_stats_show(struct seq_file *s, void *data)
  139. {
  140. struct cnss_plat_data *plat_priv = s->private;
  141. cnss_stats_show_state(s, plat_priv);
  142. cnss_stats_show_gpio_state(s, plat_priv);
  143. return 0;
  144. }
  145. static int cnss_stats_open(struct inode *inode, struct file *file)
  146. {
  147. return single_open(file, cnss_stats_show, inode->i_private);
  148. }
  149. static const struct file_operations cnss_stats_fops = {
  150. .read = seq_read,
  151. .release = single_release,
  152. .open = cnss_stats_open,
  153. .owner = THIS_MODULE,
  154. .llseek = seq_lseek,
  155. };
  156. static ssize_t cnss_dev_boot_debug_write(struct file *fp,
  157. const char __user *user_buf,
  158. size_t count, loff_t *off)
  159. {
  160. struct cnss_plat_data *plat_priv =
  161. ((struct seq_file *)fp->private_data)->private;
  162. struct cnss_pci_data *pci_priv;
  163. char buf[64];
  164. char *cmd;
  165. unsigned int len = 0;
  166. int ret = 0;
  167. if (!plat_priv)
  168. return -ENODEV;
  169. len = min(count, sizeof(buf) - 1);
  170. if (copy_from_user(buf, user_buf, len))
  171. return -EFAULT;
  172. buf[len] = '\0';
  173. cmd = buf;
  174. cnss_pr_dbg("Received dev_boot debug command: %s\n", cmd);
  175. if (sysfs_streq(cmd, "on")) {
  176. ret = cnss_power_on_device(plat_priv);
  177. } else if (sysfs_streq(cmd, "off")) {
  178. cnss_power_off_device(plat_priv);
  179. } else if (sysfs_streq(cmd, "enumerate")) {
  180. ret = cnss_pci_init(plat_priv);
  181. } else if (sysfs_streq(cmd, "powerup")) {
  182. set_bit(CNSS_DRIVER_DEBUG, &plat_priv->driver_state);
  183. ret = cnss_driver_event_post(plat_priv,
  184. CNSS_DRIVER_EVENT_POWER_UP,
  185. CNSS_EVENT_SYNC, NULL);
  186. } else if (sysfs_streq(cmd, "shutdown")) {
  187. ret = cnss_driver_event_post(plat_priv,
  188. CNSS_DRIVER_EVENT_POWER_DOWN,
  189. 0, NULL);
  190. clear_bit(CNSS_DRIVER_DEBUG, &plat_priv->driver_state);
  191. } else if (sysfs_streq(cmd, "assert_host_sol")) {
  192. ret = cnss_set_host_sol_value(plat_priv, 1);
  193. } else if (sysfs_streq(cmd, "deassert_host_sol")) {
  194. ret = cnss_set_host_sol_value(plat_priv, 0);
  195. } else {
  196. pci_priv = plat_priv->bus_priv;
  197. if (!pci_priv)
  198. return -ENODEV;
  199. if (sysfs_streq(cmd, "download")) {
  200. set_bit(CNSS_DRIVER_DEBUG, &plat_priv->driver_state);
  201. ret = cnss_pci_start_mhi(pci_priv);
  202. } else if (sysfs_streq(cmd, "linkup")) {
  203. ret = cnss_resume_pci_link(pci_priv);
  204. } else if (sysfs_streq(cmd, "linkdown")) {
  205. ret = cnss_suspend_pci_link(pci_priv);
  206. } else if (sysfs_streq(cmd, "assert")) {
  207. cnss_pr_info("FW Assert triggered for debug\n");
  208. ret = cnss_force_fw_assert(&pci_priv->pci_dev->dev);
  209. } else if (sysfs_streq(cmd, "set_cbc_done")) {
  210. cnss_pr_dbg("Force set cold boot cal done status\n");
  211. set_bit(CNSS_COLD_BOOT_CAL_DONE,
  212. &plat_priv->driver_state);
  213. } else {
  214. cnss_pr_err("Device boot debugfs command is invalid\n");
  215. ret = -EINVAL;
  216. }
  217. }
  218. if (ret < 0)
  219. return ret;
  220. return count;
  221. }
  222. static int cnss_dev_boot_debug_show(struct seq_file *s, void *data)
  223. {
  224. seq_puts(s, "\nUsage: echo <action> > <debugfs_path>/cnss/dev_boot\n");
  225. seq_puts(s, "<action> can be one of below:\n");
  226. seq_puts(s, "on: turn on device power, assert WLAN_EN\n");
  227. seq_puts(s, "off: de-assert WLAN_EN, turn off device power\n");
  228. seq_puts(s, "enumerate: de-assert PERST, enumerate PCIe\n");
  229. seq_puts(s, "download: download FW and do QMI handshake with FW\n");
  230. seq_puts(s, "linkup: bring up PCIe link\n");
  231. seq_puts(s, "linkdown: bring down PCIe link\n");
  232. seq_puts(s, "powerup: full power on sequence to boot device, download FW and do QMI handshake with FW\n");
  233. seq_puts(s, "shutdown: full power off sequence to shutdown device\n");
  234. seq_puts(s, "assert: trigger firmware assert\n");
  235. seq_puts(s, "set_cbc_done: Set cold boot calibration done status\n");
  236. return 0;
  237. }
  238. static int cnss_dev_boot_debug_open(struct inode *inode, struct file *file)
  239. {
  240. return single_open(file, cnss_dev_boot_debug_show, inode->i_private);
  241. }
  242. static const struct file_operations cnss_dev_boot_debug_fops = {
  243. .read = seq_read,
  244. .write = cnss_dev_boot_debug_write,
  245. .release = single_release,
  246. .open = cnss_dev_boot_debug_open,
  247. .owner = THIS_MODULE,
  248. .llseek = seq_lseek,
  249. };
  250. static int cnss_reg_read_debug_show(struct seq_file *s, void *data)
  251. {
  252. struct cnss_plat_data *plat_priv = s->private;
  253. mutex_lock(&plat_priv->dev_lock);
  254. if (!plat_priv->diag_reg_read_buf) {
  255. seq_puts(s, "\nUsage: echo <mem_type> <offset> <data_len> > <debugfs_path>/cnss/reg_read\n");
  256. seq_puts(s, "Use mem_type = 0xff for register read by IO access, data_len will be ignored\n");
  257. seq_puts(s, "Use mem_type = 0xfe for register read by raw IO access which skips sanity checks, data_len will be ignored\n");
  258. seq_puts(s, "Use other mem_type for register read by QMI\n");
  259. mutex_unlock(&plat_priv->dev_lock);
  260. return 0;
  261. }
  262. seq_printf(s, "\nRegister read, address: 0x%x memory type: 0x%x length: 0x%x\n\n",
  263. plat_priv->diag_reg_read_addr,
  264. plat_priv->diag_reg_read_mem_type,
  265. plat_priv->diag_reg_read_len);
  266. seq_hex_dump(s, "", DUMP_PREFIX_OFFSET, 32, 4,
  267. plat_priv->diag_reg_read_buf,
  268. plat_priv->diag_reg_read_len, false);
  269. plat_priv->diag_reg_read_len = 0;
  270. kfree(plat_priv->diag_reg_read_buf);
  271. plat_priv->diag_reg_read_buf = NULL;
  272. mutex_unlock(&plat_priv->dev_lock);
  273. return 0;
  274. }
  275. static ssize_t cnss_reg_read_debug_write(struct file *fp,
  276. const char __user *user_buf,
  277. size_t count, loff_t *off)
  278. {
  279. struct cnss_plat_data *plat_priv =
  280. ((struct seq_file *)fp->private_data)->private;
  281. char buf[64];
  282. char *sptr, *token;
  283. unsigned int len = 0;
  284. u32 reg_offset, mem_type;
  285. u32 data_len = 0, reg_val = 0;
  286. u8 *reg_buf = NULL;
  287. const char *delim = " ";
  288. int ret = 0;
  289. len = min(count, sizeof(buf) - 1);
  290. if (copy_from_user(buf, user_buf, len))
  291. return -EFAULT;
  292. buf[len] = '\0';
  293. sptr = buf;
  294. token = strsep(&sptr, delim);
  295. if (!token)
  296. return -EINVAL;
  297. if (!sptr)
  298. return -EINVAL;
  299. if (kstrtou32(token, 0, &mem_type))
  300. return -EINVAL;
  301. token = strsep(&sptr, delim);
  302. if (!token)
  303. return -EINVAL;
  304. if (!sptr)
  305. return -EINVAL;
  306. if (kstrtou32(token, 0, &reg_offset))
  307. return -EINVAL;
  308. token = strsep(&sptr, delim);
  309. if (!token)
  310. return -EINVAL;
  311. if (kstrtou32(token, 0, &data_len))
  312. return -EINVAL;
  313. if (mem_type == MMIO_REG_ACCESS_MEM_TYPE ||
  314. mem_type == MMIO_REG_RAW_ACCESS_MEM_TYPE) {
  315. ret = cnss_bus_debug_reg_read(plat_priv, reg_offset, &reg_val,
  316. mem_type ==
  317. MMIO_REG_RAW_ACCESS_MEM_TYPE);
  318. if (ret)
  319. return ret;
  320. cnss_pr_dbg("Read 0x%x from register offset 0x%x\n", reg_val,
  321. reg_offset);
  322. return count;
  323. }
  324. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  325. cnss_pr_err("Firmware is not ready yet\n");
  326. return -EINVAL;
  327. }
  328. mutex_lock(&plat_priv->dev_lock);
  329. kfree(plat_priv->diag_reg_read_buf);
  330. plat_priv->diag_reg_read_buf = NULL;
  331. reg_buf = kzalloc(data_len, GFP_KERNEL);
  332. if (!reg_buf) {
  333. mutex_unlock(&plat_priv->dev_lock);
  334. return -ENOMEM;
  335. }
  336. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, reg_offset,
  337. mem_type, data_len,
  338. reg_buf);
  339. if (ret) {
  340. kfree(reg_buf);
  341. mutex_unlock(&plat_priv->dev_lock);
  342. return ret;
  343. }
  344. plat_priv->diag_reg_read_addr = reg_offset;
  345. plat_priv->diag_reg_read_mem_type = mem_type;
  346. plat_priv->diag_reg_read_len = data_len;
  347. plat_priv->diag_reg_read_buf = reg_buf;
  348. mutex_unlock(&plat_priv->dev_lock);
  349. return count;
  350. }
  351. static int cnss_reg_read_debug_open(struct inode *inode, struct file *file)
  352. {
  353. return single_open(file, cnss_reg_read_debug_show, inode->i_private);
  354. }
  355. static const struct file_operations cnss_reg_read_debug_fops = {
  356. .read = seq_read,
  357. .write = cnss_reg_read_debug_write,
  358. .open = cnss_reg_read_debug_open,
  359. .owner = THIS_MODULE,
  360. .llseek = seq_lseek,
  361. };
  362. static int cnss_reg_write_debug_show(struct seq_file *s, void *data)
  363. {
  364. seq_puts(s, "\nUsage: echo <mem_type> <offset> <reg_val> > <debugfs_path>/cnss/reg_write\n");
  365. seq_puts(s, "Use mem_type = 0xff for register write by IO access\n");
  366. seq_puts(s, "Use mem_type = 0xfe for register write by raw IO access which skips sanity checks\n");
  367. seq_puts(s, "Use other mem_type for register write by QMI\n");
  368. return 0;
  369. }
  370. static ssize_t cnss_reg_write_debug_write(struct file *fp,
  371. const char __user *user_buf,
  372. size_t count, loff_t *off)
  373. {
  374. struct cnss_plat_data *plat_priv =
  375. ((struct seq_file *)fp->private_data)->private;
  376. char buf[64];
  377. char *sptr, *token;
  378. unsigned int len = 0;
  379. u32 reg_offset, mem_type, reg_val;
  380. const char *delim = " ";
  381. int ret = 0;
  382. len = min(count, sizeof(buf) - 1);
  383. if (copy_from_user(buf, user_buf, len))
  384. return -EFAULT;
  385. buf[len] = '\0';
  386. sptr = buf;
  387. token = strsep(&sptr, delim);
  388. if (!token)
  389. return -EINVAL;
  390. if (!sptr)
  391. return -EINVAL;
  392. if (kstrtou32(token, 0, &mem_type))
  393. return -EINVAL;
  394. token = strsep(&sptr, delim);
  395. if (!token)
  396. return -EINVAL;
  397. if (!sptr)
  398. return -EINVAL;
  399. if (kstrtou32(token, 0, &reg_offset))
  400. return -EINVAL;
  401. token = strsep(&sptr, delim);
  402. if (!token)
  403. return -EINVAL;
  404. if (kstrtou32(token, 0, &reg_val))
  405. return -EINVAL;
  406. if (mem_type == MMIO_REG_ACCESS_MEM_TYPE ||
  407. mem_type == MMIO_REG_RAW_ACCESS_MEM_TYPE) {
  408. ret = cnss_bus_debug_reg_write(plat_priv, reg_offset, reg_val,
  409. mem_type ==
  410. MMIO_REG_RAW_ACCESS_MEM_TYPE);
  411. if (ret)
  412. return ret;
  413. cnss_pr_dbg("Wrote 0x%x to register offset 0x%x\n", reg_val,
  414. reg_offset);
  415. return count;
  416. }
  417. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  418. cnss_pr_err("Firmware is not ready yet\n");
  419. return -EINVAL;
  420. }
  421. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, reg_offset, mem_type,
  422. sizeof(u32),
  423. (u8 *)&reg_val);
  424. if (ret)
  425. return ret;
  426. return count;
  427. }
  428. static int cnss_reg_write_debug_open(struct inode *inode, struct file *file)
  429. {
  430. return single_open(file, cnss_reg_write_debug_show, inode->i_private);
  431. }
  432. static const struct file_operations cnss_reg_write_debug_fops = {
  433. .read = seq_read,
  434. .write = cnss_reg_write_debug_write,
  435. .open = cnss_reg_write_debug_open,
  436. .owner = THIS_MODULE,
  437. .llseek = seq_lseek,
  438. };
  439. static ssize_t cnss_runtime_pm_debug_write(struct file *fp,
  440. const char __user *user_buf,
  441. size_t count, loff_t *off)
  442. {
  443. struct cnss_plat_data *plat_priv =
  444. ((struct seq_file *)fp->private_data)->private;
  445. struct cnss_pci_data *pci_priv;
  446. char buf[64];
  447. char *cmd;
  448. unsigned int len = 0;
  449. int ret = 0;
  450. if (!plat_priv)
  451. return -ENODEV;
  452. pci_priv = plat_priv->bus_priv;
  453. if (!pci_priv)
  454. return -ENODEV;
  455. len = min(count, sizeof(buf) - 1);
  456. if (copy_from_user(buf, user_buf, len))
  457. return -EFAULT;
  458. buf[len] = '\0';
  459. cmd = buf;
  460. if (sysfs_streq(cmd, "usage_count")) {
  461. cnss_pci_pm_runtime_show_usage_count(pci_priv);
  462. } else if (sysfs_streq(cmd, "request_resume")) {
  463. ret = cnss_pci_pm_request_resume(pci_priv);
  464. } else if (sysfs_streq(cmd, "resume")) {
  465. ret = cnss_pci_pm_runtime_resume(pci_priv);
  466. } else if (sysfs_streq(cmd, "get")) {
  467. ret = cnss_pci_pm_runtime_get(pci_priv, RTPM_ID_CNSS);
  468. } else if (sysfs_streq(cmd, "get_noresume")) {
  469. cnss_pci_pm_runtime_get_noresume(pci_priv, RTPM_ID_CNSS);
  470. } else if (sysfs_streq(cmd, "put_autosuspend")) {
  471. ret = cnss_pci_pm_runtime_put_autosuspend(pci_priv,
  472. RTPM_ID_CNSS);
  473. } else if (sysfs_streq(cmd, "put_noidle")) {
  474. cnss_pci_pm_runtime_put_noidle(pci_priv, RTPM_ID_CNSS);
  475. } else if (sysfs_streq(cmd, "mark_last_busy")) {
  476. cnss_pci_pm_runtime_mark_last_busy(pci_priv);
  477. } else if (sysfs_streq(cmd, "resume_bus")) {
  478. cnss_pci_resume_bus(pci_priv);
  479. } else if (sysfs_streq(cmd, "suspend_bus")) {
  480. cnss_pci_suspend_bus(pci_priv);
  481. } else {
  482. cnss_pr_err("Runtime PM debugfs command is invalid\n");
  483. ret = -EINVAL;
  484. }
  485. if (ret < 0)
  486. return ret;
  487. return count;
  488. }
  489. static int cnss_runtime_pm_debug_show(struct seq_file *s, void *data)
  490. {
  491. struct cnss_plat_data *plat_priv = s->private;
  492. struct cnss_pci_data *pci_priv;
  493. int i;
  494. if (!plat_priv)
  495. return -ENODEV;
  496. pci_priv = plat_priv->bus_priv;
  497. if (!pci_priv)
  498. return -ENODEV;
  499. seq_puts(s, "\nUsage: echo <action> > <debugfs_path>/cnss/runtime_pm\n");
  500. seq_puts(s, "<action> can be one of below:\n");
  501. seq_puts(s, "usage_count: get runtime PM usage count\n");
  502. seq_puts(s, "reques_resume: do async runtime PM resume\n");
  503. seq_puts(s, "resume: do sync runtime PM resume\n");
  504. seq_puts(s, "get: do runtime PM get\n");
  505. seq_puts(s, "get_noresume: do runtime PM get noresume\n");
  506. seq_puts(s, "put_noidle: do runtime PM put noidle\n");
  507. seq_puts(s, "put_autosuspend: do runtime PM put autosuspend\n");
  508. seq_puts(s, "mark_last_busy: do runtime PM mark last busy\n");
  509. seq_puts(s, "resume_bus: do bus resume only\n");
  510. seq_puts(s, "suspend_bus: do bus suspend only\n");
  511. seq_puts(s, "\nStats:\n");
  512. seq_printf(s, "%s: %u\n", "get count",
  513. atomic_read(&pci_priv->pm_stats.runtime_get));
  514. seq_printf(s, "%s: %u\n", "put count",
  515. atomic_read(&pci_priv->pm_stats.runtime_put));
  516. seq_printf(s, "%-10s%-10s%-10s%-15s%-15s\n",
  517. "id:", "get", "put", "get time(us)", "put time(us)");
  518. for (i = 0; i < RTPM_ID_MAX; i++) {
  519. seq_printf(s, "%d%-9s", i, ":");
  520. seq_printf(s, "%-10d",
  521. atomic_read(&pci_priv->pm_stats.runtime_get_id[i]));
  522. seq_printf(s, "%-10d",
  523. atomic_read(&pci_priv->pm_stats.runtime_put_id[i]));
  524. seq_printf(s, "%-15llu",
  525. pci_priv->pm_stats.runtime_get_timestamp_id[i]);
  526. seq_printf(s, "%-15llu\n",
  527. pci_priv->pm_stats.runtime_put_timestamp_id[i]);
  528. }
  529. return 0;
  530. }
  531. static int cnss_runtime_pm_debug_open(struct inode *inode, struct file *file)
  532. {
  533. return single_open(file, cnss_runtime_pm_debug_show, inode->i_private);
  534. }
  535. static const struct file_operations cnss_runtime_pm_debug_fops = {
  536. .read = seq_read,
  537. .write = cnss_runtime_pm_debug_write,
  538. .open = cnss_runtime_pm_debug_open,
  539. .owner = THIS_MODULE,
  540. .llseek = seq_lseek,
  541. };
  542. static ssize_t cnss_control_params_debug_write(struct file *fp,
  543. const char __user *user_buf,
  544. size_t count, loff_t *off)
  545. {
  546. struct cnss_plat_data *plat_priv =
  547. ((struct seq_file *)fp->private_data)->private;
  548. char buf[64];
  549. char *sptr, *token;
  550. char *cmd;
  551. u32 val;
  552. unsigned int len = 0;
  553. const char *delim = " ";
  554. if (!plat_priv)
  555. return -ENODEV;
  556. len = min(count, sizeof(buf) - 1);
  557. if (copy_from_user(buf, user_buf, len))
  558. return -EFAULT;
  559. buf[len] = '\0';
  560. sptr = buf;
  561. token = strsep(&sptr, delim);
  562. if (!token)
  563. return -EINVAL;
  564. if (!sptr)
  565. return -EINVAL;
  566. cmd = token;
  567. token = strsep(&sptr, delim);
  568. if (!token)
  569. return -EINVAL;
  570. if (kstrtou32(token, 0, &val))
  571. return -EINVAL;
  572. if (strcmp(cmd, "quirks") == 0)
  573. plat_priv->ctrl_params.quirks = val;
  574. else if (strcmp(cmd, "mhi_timeout") == 0)
  575. plat_priv->ctrl_params.mhi_timeout = val;
  576. else if (strcmp(cmd, "mhi_m2_timeout") == 0)
  577. plat_priv->ctrl_params.mhi_m2_timeout = val;
  578. else if (strcmp(cmd, "qmi_timeout") == 0)
  579. plat_priv->ctrl_params.qmi_timeout = val;
  580. else if (strcmp(cmd, "bdf_type") == 0)
  581. plat_priv->ctrl_params.bdf_type = val;
  582. else if (strcmp(cmd, "time_sync_period") == 0)
  583. plat_priv->ctrl_params.time_sync_period = val;
  584. else
  585. return -EINVAL;
  586. return count;
  587. }
  588. static int cnss_show_quirks_state(struct seq_file *s,
  589. struct cnss_plat_data *plat_priv)
  590. {
  591. enum cnss_debug_quirks i;
  592. int skip = 0;
  593. unsigned long state;
  594. seq_printf(s, "quirks: 0x%lx (", plat_priv->ctrl_params.quirks);
  595. for (i = 0, state = plat_priv->ctrl_params.quirks;
  596. state != 0; state >>= 1, i++) {
  597. if (!(state & 0x1))
  598. continue;
  599. if (skip++)
  600. seq_puts(s, " | ");
  601. switch (i) {
  602. case LINK_DOWN_SELF_RECOVERY:
  603. seq_puts(s, "LINK_DOWN_SELF_RECOVERY");
  604. continue;
  605. case SKIP_DEVICE_BOOT:
  606. seq_puts(s, "SKIP_DEVICE_BOOT");
  607. continue;
  608. case USE_CORE_ONLY_FW:
  609. seq_puts(s, "USE_CORE_ONLY_FW");
  610. continue;
  611. case SKIP_RECOVERY:
  612. seq_puts(s, "SKIP_RECOVERY");
  613. continue;
  614. case QMI_BYPASS:
  615. seq_puts(s, "QMI_BYPASS");
  616. continue;
  617. case ENABLE_WALTEST:
  618. seq_puts(s, "WALTEST");
  619. continue;
  620. case ENABLE_PCI_LINK_DOWN_PANIC:
  621. seq_puts(s, "PCI_LINK_DOWN_PANIC");
  622. continue;
  623. case FBC_BYPASS:
  624. seq_puts(s, "FBC_BYPASS");
  625. continue;
  626. case ENABLE_DAEMON_SUPPORT:
  627. seq_puts(s, "DAEMON_SUPPORT");
  628. continue;
  629. case DISABLE_DRV:
  630. seq_puts(s, "DISABLE_DRV");
  631. continue;
  632. case DISABLE_IO_COHERENCY:
  633. seq_puts(s, "DISABLE_IO_COHERENCY");
  634. continue;
  635. case IGNORE_PCI_LINK_FAILURE:
  636. seq_puts(s, "IGNORE_PCI_LINK_FAILURE");
  637. continue;
  638. case DISABLE_TIME_SYNC:
  639. seq_puts(s, "DISABLE_TIME_SYNC");
  640. continue;
  641. }
  642. seq_printf(s, "UNKNOWN-%d", i);
  643. }
  644. seq_puts(s, ")\n");
  645. return 0;
  646. }
  647. static int cnss_control_params_debug_show(struct seq_file *s, void *data)
  648. {
  649. struct cnss_plat_data *cnss_priv = s->private;
  650. seq_puts(s, "\nUsage: echo <params_name> <value> > <debugfs_path>/cnss/control_params\n");
  651. seq_puts(s, "<params_name> can be one of below:\n");
  652. seq_puts(s, "quirks: Debug quirks for driver\n");
  653. seq_puts(s, "mhi_timeout: Timeout for MHI operation in milliseconds\n");
  654. seq_puts(s, "qmi_timeout: Timeout for QMI message in milliseconds\n");
  655. seq_puts(s, "bdf_type: Type of board data file to be downloaded\n");
  656. seq_puts(s, "time_sync_period: Time period to do time sync with device in milliseconds\n");
  657. seq_puts(s, "\nCurrent value:\n");
  658. cnss_show_quirks_state(s, cnss_priv);
  659. seq_printf(s, "mhi_timeout: %u\n", cnss_priv->ctrl_params.mhi_timeout);
  660. seq_printf(s, "mhi_m2_timeout: %u\n",
  661. cnss_priv->ctrl_params.mhi_m2_timeout);
  662. seq_printf(s, "qmi_timeout: %u\n", cnss_priv->ctrl_params.qmi_timeout);
  663. seq_printf(s, "bdf_type: %u\n", cnss_priv->ctrl_params.bdf_type);
  664. seq_printf(s, "time_sync_period: %u\n",
  665. cnss_priv->ctrl_params.time_sync_period);
  666. return 0;
  667. }
  668. static int cnss_control_params_debug_open(struct inode *inode,
  669. struct file *file)
  670. {
  671. return single_open(file, cnss_control_params_debug_show,
  672. inode->i_private);
  673. }
  674. static const struct file_operations cnss_control_params_debug_fops = {
  675. .read = seq_read,
  676. .write = cnss_control_params_debug_write,
  677. .open = cnss_control_params_debug_open,
  678. .owner = THIS_MODULE,
  679. .llseek = seq_lseek,
  680. };
  681. static ssize_t cnss_dynamic_feature_write(struct file *fp,
  682. const char __user *user_buf,
  683. size_t count, loff_t *off)
  684. {
  685. struct cnss_plat_data *plat_priv =
  686. ((struct seq_file *)fp->private_data)->private;
  687. int ret = 0;
  688. u64 val;
  689. ret = kstrtou64_from_user(user_buf, count, 0, &val);
  690. if (ret)
  691. return ret;
  692. plat_priv->dynamic_feature = val;
  693. ret = cnss_wlfw_dynamic_feature_mask_send_sync(plat_priv);
  694. if (ret < 0)
  695. return ret;
  696. return count;
  697. }
  698. static int cnss_dynamic_feature_show(struct seq_file *s, void *data)
  699. {
  700. struct cnss_plat_data *cnss_priv = s->private;
  701. seq_printf(s, "dynamic_feature: 0x%llx\n", cnss_priv->dynamic_feature);
  702. return 0;
  703. }
  704. static int cnss_dynamic_feature_open(struct inode *inode,
  705. struct file *file)
  706. {
  707. return single_open(file, cnss_dynamic_feature_show,
  708. inode->i_private);
  709. }
  710. static const struct file_operations cnss_dynamic_feature_fops = {
  711. .read = seq_read,
  712. .write = cnss_dynamic_feature_write,
  713. .open = cnss_dynamic_feature_open,
  714. .owner = THIS_MODULE,
  715. .llseek = seq_lseek,
  716. };
  717. #ifdef CONFIG_DEBUG_FS
  718. #ifdef CONFIG_CNSS2_DEBUG
  719. static int cnss_create_debug_only_node(struct cnss_plat_data *plat_priv)
  720. {
  721. struct dentry *root_dentry = plat_priv->root_dentry;
  722. debugfs_create_file("dev_boot", 0600, root_dentry, plat_priv,
  723. &cnss_dev_boot_debug_fops);
  724. debugfs_create_file("reg_read", 0600, root_dentry, plat_priv,
  725. &cnss_reg_read_debug_fops);
  726. debugfs_create_file("reg_write", 0600, root_dentry, plat_priv,
  727. &cnss_reg_write_debug_fops);
  728. debugfs_create_file("runtime_pm", 0600, root_dentry, plat_priv,
  729. &cnss_runtime_pm_debug_fops);
  730. debugfs_create_file("control_params", 0600, root_dentry, plat_priv,
  731. &cnss_control_params_debug_fops);
  732. debugfs_create_file("dynamic_feature", 0600, root_dentry, plat_priv,
  733. &cnss_dynamic_feature_fops);
  734. return 0;
  735. }
  736. #else
  737. static int cnss_create_debug_only_node(struct cnss_plat_data *plat_priv)
  738. {
  739. return 0;
  740. }
  741. #endif
  742. int cnss_debugfs_create(struct cnss_plat_data *plat_priv)
  743. {
  744. int ret = 0;
  745. struct dentry *root_dentry;
  746. root_dentry = debugfs_create_dir("cnss", 0);
  747. if (IS_ERR(root_dentry)) {
  748. ret = PTR_ERR(root_dentry);
  749. cnss_pr_err("Unable to create debugfs %d\n", ret);
  750. goto out;
  751. }
  752. plat_priv->root_dentry = root_dentry;
  753. debugfs_create_file("pin_connect_result", 0644, root_dentry, plat_priv,
  754. &cnss_pin_connect_fops);
  755. debugfs_create_file("stats", 0644, root_dentry, plat_priv,
  756. &cnss_stats_fops);
  757. cnss_create_debug_only_node(plat_priv);
  758. out:
  759. return ret;
  760. }
  761. void cnss_debugfs_destroy(struct cnss_plat_data *plat_priv)
  762. {
  763. debugfs_remove_recursive(plat_priv->root_dentry);
  764. }
  765. #else
  766. int cnss_debugfs_create(struct cnss_plat_data *plat_priv)
  767. {
  768. plat_priv->root_dentry = NULL;
  769. return 0;
  770. }
  771. void cnss_debugfs_destroy(struct cnss_plat_data *plat_priv)
  772. {
  773. }
  774. #endif
  775. #if IS_ENABLED(CONFIG_IPC_LOGGING)
  776. void cnss_debug_ipc_log_print(void *log_ctx, char *process, const char *fn,
  777. const char *log_level, char *fmt, ...)
  778. {
  779. struct va_format vaf;
  780. va_list va_args;
  781. va_start(va_args, fmt);
  782. vaf.fmt = fmt;
  783. vaf.va = &va_args;
  784. if (log_level)
  785. printk("%scnss: %pV", log_level, &vaf);
  786. ipc_log_string(log_ctx, "[%s] %s: %pV", process, fn, &vaf);
  787. va_end(va_args);
  788. }
  789. static int cnss_ipc_logging_init(void)
  790. {
  791. cnss_ipc_log_context = ipc_log_context_create(CNSS_IPC_LOG_PAGES,
  792. "cnss", 0);
  793. if (!cnss_ipc_log_context) {
  794. cnss_pr_err("Unable to create IPC log context\n");
  795. return -EINVAL;
  796. }
  797. cnss_ipc_log_long_context = ipc_log_context_create(CNSS_IPC_LOG_PAGES,
  798. "cnss-long", 0);
  799. if (!cnss_ipc_log_long_context) {
  800. cnss_pr_err("Unable to create IPC long log context\n");
  801. ipc_log_context_destroy(cnss_ipc_log_context);
  802. return -EINVAL;
  803. }
  804. return 0;
  805. }
  806. static void cnss_ipc_logging_deinit(void)
  807. {
  808. if (cnss_ipc_log_long_context) {
  809. ipc_log_context_destroy(cnss_ipc_log_long_context);
  810. cnss_ipc_log_long_context = NULL;
  811. }
  812. if (cnss_ipc_log_context) {
  813. ipc_log_context_destroy(cnss_ipc_log_context);
  814. cnss_ipc_log_context = NULL;
  815. }
  816. }
  817. #else
  818. static int cnss_ipc_logging_init(void) { return 0; }
  819. static void cnss_ipc_logging_deinit(void) {}
  820. void cnss_debug_ipc_log_print(void *log_ctx, char *process, const char *fn,
  821. const char *log_level, char *fmt, ...)
  822. {
  823. struct va_format vaf;
  824. va_list va_args;
  825. va_start(va_args, fmt);
  826. vaf.fmt = fmt;
  827. vaf.va = &va_args;
  828. if (log_level)
  829. printk("%scnss: %pV", log_level, &vaf);
  830. va_end(va_args);
  831. }
  832. #endif
  833. int cnss_debug_init(void)
  834. {
  835. return cnss_ipc_logging_init();
  836. }
  837. void cnss_debug_deinit(void)
  838. {
  839. cnss_ipc_logging_deinit();
  840. }