qcs405.c 215 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590759175927593759475957596759775987599760076017602760376047605760676077608760976107611761276137614761576167617761876197620762176227623762476257626762776287629763076317632763376347635763676377638763976407641764276437644764576467647764876497650765176527653765476557656765776587659766076617662766376647665766676677668766976707671767276737674767576767677767876797680768176827683768476857686768776887689769076917692769376947695769676977698769977007701770277037704770577067707770877097710771177127713771477157716771777187719772077217722772377247725772677277728772977307731773277337734773577367737773877397740774177427743774477457746774777487749
  1. /* Copyright (c) 2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/input.h>
  21. #include <linux/of_device.h>
  22. #include <linux/pm_qos.h>
  23. #include <sound/core.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/info.h>
  29. #include <dsp/audio_notifier.h>
  30. #include <dsp/q6afe-v2.h>
  31. #include <dsp/q6core.h>
  32. #include "device_event.h"
  33. #include "msm-pcm-routing-v2.h"
  34. #include "codecs/msm-cdc-pinctrl.h"
  35. #include "codecs/wcd9335.h"
  36. #include "codecs/wsa881x.h"
  37. #include "codecs/csra66x0/csra66x0.h"
  38. #include <dt-bindings/sound/audio-codec-port-types.h>
  39. #include "codecs/bolero/bolero-cdc.h"
  40. #define DRV_NAME "qcs405-asoc-snd"
  41. #define __CHIPSET__ "QCS405 "
  42. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  43. #define DEV_NAME_STR_LEN 32
  44. #define SAMPLING_RATE_8KHZ 8000
  45. #define SAMPLING_RATE_11P025KHZ 11025
  46. #define SAMPLING_RATE_16KHZ 16000
  47. #define SAMPLING_RATE_22P05KHZ 22050
  48. #define SAMPLING_RATE_32KHZ 32000
  49. #define SAMPLING_RATE_44P1KHZ 44100
  50. #define SAMPLING_RATE_48KHZ 48000
  51. #define SAMPLING_RATE_88P2KHZ 88200
  52. #define SAMPLING_RATE_96KHZ 96000
  53. #define SAMPLING_RATE_176P4KHZ 176400
  54. #define SAMPLING_RATE_192KHZ 192000
  55. #define SAMPLING_RATE_352P8KHZ 352800
  56. #define SAMPLING_RATE_384KHZ 384000
  57. #define WSA8810_NAME_1 "wsa881x.20170211"
  58. #define WSA8810_NAME_2 "wsa881x.20170212"
  59. #define WCN_CDC_SLIM_RX_CH_MAX 2
  60. #define WCN_CDC_SLIM_TX_CH_MAX 3
  61. #define TDM_CHANNEL_MAX 8
  62. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  63. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  64. enum {
  65. SLIM_RX_0 = 0,
  66. SLIM_RX_1,
  67. SLIM_RX_2,
  68. SLIM_RX_3,
  69. SLIM_RX_4,
  70. SLIM_RX_5,
  71. SLIM_RX_6,
  72. SLIM_RX_7,
  73. SLIM_RX_MAX,
  74. };
  75. enum {
  76. SLIM_TX_0 = 0,
  77. SLIM_TX_1,
  78. SLIM_TX_2,
  79. SLIM_TX_3,
  80. SLIM_TX_4,
  81. SLIM_TX_5,
  82. SLIM_TX_6,
  83. SLIM_TX_7,
  84. SLIM_TX_8,
  85. SLIM_TX_MAX,
  86. };
  87. enum {
  88. PRIM_MI2S = 0,
  89. SEC_MI2S,
  90. TERT_MI2S,
  91. QUAT_MI2S,
  92. QUIN_MI2S,
  93. MI2S_MAX,
  94. };
  95. enum {
  96. PRIM_AUX_PCM = 0,
  97. SEC_AUX_PCM,
  98. TERT_AUX_PCM,
  99. QUAT_AUX_PCM,
  100. QUIN_AUX_PCM,
  101. AUX_PCM_MAX,
  102. };
  103. enum {
  104. WSA_CDC_DMA_RX_0 = 0,
  105. WSA_CDC_DMA_RX_1,
  106. CDC_DMA_RX_MAX,
  107. };
  108. enum {
  109. WSA_CDC_DMA_TX_0 = 0,
  110. WSA_CDC_DMA_TX_1,
  111. WSA_CDC_DMA_TX_2,
  112. VA_CDC_DMA_TX_0,
  113. VA_CDC_DMA_TX_1,
  114. CDC_DMA_TX_MAX,
  115. };
  116. struct mi2s_conf {
  117. struct mutex lock;
  118. u32 ref_cnt;
  119. u32 msm_is_mi2s_master;
  120. };
  121. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  122. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  123. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  124. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  125. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  126. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  127. };
  128. struct dev_config {
  129. u32 sample_rate;
  130. u32 bit_format;
  131. u32 channels;
  132. };
  133. struct msm_wsa881x_dev_info {
  134. struct device_node *of_node;
  135. u32 index;
  136. };
  137. struct msm_csra66x0_dev_info {
  138. struct device_node *of_node;
  139. u32 index;
  140. };
  141. enum pinctrl_pin_state {
  142. STATE_DISABLE = 0, /* All pins are in sleep state */
  143. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  144. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  145. };
  146. struct msm_pinctrl_info {
  147. struct pinctrl *pinctrl;
  148. struct pinctrl_state *mi2s_disable;
  149. struct pinctrl_state *tdm_disable;
  150. struct pinctrl_state *mi2s_active;
  151. struct pinctrl_state *tdm_active;
  152. enum pinctrl_pin_state curr_state;
  153. };
  154. struct msm_asoc_mach_data {
  155. struct snd_info_entry *codec_root;
  156. struct msm_pinctrl_info pinctrl_info;
  157. struct device_node *dmic_01_gpio_p; /* used by pinctrl API */
  158. struct device_node *dmic_23_gpio_p; /* used by pinctrl API */
  159. struct device_node *dmic_45_gpio_p; /* used by pinctrl API */
  160. struct device_node *dmic_67_gpio_p; /* used by pinctrl API */
  161. int dmic_01_gpio_cnt;
  162. int dmic_23_gpio_cnt;
  163. int dmic_45_gpio_cnt;
  164. int dmic_67_gpio_cnt;
  165. };
  166. struct msm_asoc_wcd93xx_codec {
  167. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  168. enum afe_config_type config_type);
  169. };
  170. static const char *const pin_states[] = {"sleep", "i2s-active",
  171. "tdm-active"};
  172. enum {
  173. TDM_0 = 0,
  174. TDM_1,
  175. TDM_2,
  176. TDM_3,
  177. TDM_4,
  178. TDM_5,
  179. TDM_6,
  180. TDM_7,
  181. TDM_PORT_MAX,
  182. };
  183. enum {
  184. TDM_PRI = 0,
  185. TDM_SEC,
  186. TDM_TERT,
  187. TDM_QUAT,
  188. TDM_QUIN,
  189. TDM_INTERFACE_MAX,
  190. };
  191. struct tdm_port {
  192. u32 mode;
  193. u32 channel;
  194. };
  195. /* TDM default config */
  196. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  197. { /* PRI TDM */
  198. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  199. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  200. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  201. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  206. },
  207. { /* SEC TDM */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  210. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  211. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  216. },
  217. { /* TERT TDM */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  226. },
  227. { /* QUAT TDM */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  236. },
  237. { /* QUIN TDM */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  246. }
  247. };
  248. /* TDM default config */
  249. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  250. { /* PRI TDM */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  259. },
  260. { /* SEC TDM */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  269. },
  270. { /* TERT TDM */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  279. },
  280. { /* QUAT TDM */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  289. },
  290. { /* QUIN TDM */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  299. }
  300. };
  301. /* Default configuration of slimbus channels */
  302. static struct dev_config slim_rx_cfg[] = {
  303. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  304. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  305. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  306. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  307. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  308. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  309. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  311. };
  312. static struct dev_config slim_tx_cfg[] = {
  313. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  314. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  316. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  318. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  319. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  320. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  322. };
  323. /* Default configuration of Codec DMA Interface Tx */
  324. static struct dev_config cdc_dma_rx_cfg[] = {
  325. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  326. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  327. };
  328. /* Default configuration of Codec DMA Interface Rx */
  329. static struct dev_config cdc_dma_tx_cfg[] = {
  330. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  331. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  334. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  335. };
  336. static struct dev_config usb_rx_cfg = {
  337. .sample_rate = SAMPLING_RATE_48KHZ,
  338. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  339. .channels = 2,
  340. };
  341. static struct dev_config usb_tx_cfg = {
  342. .sample_rate = SAMPLING_RATE_48KHZ,
  343. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  344. .channels = 1,
  345. };
  346. static struct dev_config proxy_rx_cfg = {
  347. .sample_rate = SAMPLING_RATE_48KHZ,
  348. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  349. .channels = 2,
  350. };
  351. /* Default configuration of MI2S channels */
  352. static struct dev_config mi2s_rx_cfg[] = {
  353. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. };
  359. static struct dev_config mi2s_tx_cfg[] = {
  360. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  361. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  362. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  363. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  364. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  365. };
  366. static struct dev_config aux_pcm_rx_cfg[] = {
  367. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  368. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  369. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  370. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  371. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  372. };
  373. static struct dev_config aux_pcm_tx_cfg[] = {
  374. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  375. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  376. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  377. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  378. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  379. };
  380. static int msm_vi_feed_tx_ch = 2;
  381. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  382. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  383. "Five", "Six", "Seven",
  384. "Eight"};
  385. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  386. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  387. "S32_LE"};
  388. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  389. "KHZ_32", "KHZ_44P1", "KHZ_48",
  390. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  391. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  392. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  393. "KHZ_44P1", "KHZ_48",
  394. "KHZ_88P2", "KHZ_96"};
  395. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  396. "Five", "Six", "Seven",
  397. "Eight"};
  398. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  399. "Six", "Seven", "Eight"};
  400. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  401. "KHZ_16", "KHZ_22P05",
  402. "KHZ_32", "KHZ_44P1", "KHZ_48",
  403. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  404. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  405. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  406. "Five", "Six", "Seven", "Eight"};
  407. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  408. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  409. "KHZ_48", "KHZ_176P4",
  410. "KHZ_352P8"};
  411. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  412. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  413. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  414. "KHZ_48", "KHZ_96", "KHZ_192"};
  415. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  416. "Five", "Six", "Seven",
  417. "Eight"};
  418. static const char *const qos_text[] = {"Disable", "Enable"};
  419. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  420. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  421. "Five", "Six", "Seven",
  422. "Eight"};
  423. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  424. "KHZ_16", "KHZ_22P05",
  425. "KHZ_32", "KHZ_44P1", "KHZ_48",
  426. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  427. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  428. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  506. cdc_dma_sample_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  508. cdc_dma_sample_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  510. cdc_dma_sample_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  512. cdc_dma_sample_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  514. cdc_dma_sample_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  516. cdc_dma_sample_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  518. cdc_dma_sample_rate_text);
  519. static struct platform_device *spdev;
  520. static bool is_initial_boot;
  521. static bool codec_reg_done;
  522. static struct snd_soc_aux_dev *msm_aux_dev;
  523. static struct snd_soc_codec_conf *msm_codec_conf;
  524. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  525. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  526. int enable, bool dapm);
  527. static int msm_wsa881x_init(struct snd_soc_component *component);
  528. static int msm_snd_vad_cfg_put(struct snd_kcontrol *kcontrol,
  529. struct snd_ctl_elem_value *ucontrol);
  530. static struct snd_soc_dapm_route wcd_audio_paths[] = {
  531. {"MIC BIAS1", NULL, "MCLK TX"},
  532. {"MIC BIAS2", NULL, "MCLK TX"},
  533. {"MIC BIAS3", NULL, "MCLK TX"},
  534. {"MIC BIAS4", NULL, "MCLK TX"},
  535. };
  536. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  537. {
  538. AFE_API_VERSION_I2S_CONFIG,
  539. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  540. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  541. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  542. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  543. 0,
  544. },
  545. {
  546. AFE_API_VERSION_I2S_CONFIG,
  547. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  548. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  549. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  550. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  551. 0,
  552. },
  553. {
  554. AFE_API_VERSION_I2S_CONFIG,
  555. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  556. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  557. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  558. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  559. 0,
  560. },
  561. {
  562. AFE_API_VERSION_I2S_CONFIG,
  563. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  564. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  565. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  566. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  567. 0,
  568. },
  569. {
  570. AFE_API_VERSION_I2S_CONFIG,
  571. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  572. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  573. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  574. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  575. 0,
  576. }
  577. };
  578. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  579. static int slim_get_sample_rate_val(int sample_rate)
  580. {
  581. int sample_rate_val = 0;
  582. switch (sample_rate) {
  583. case SAMPLING_RATE_8KHZ:
  584. sample_rate_val = 0;
  585. break;
  586. case SAMPLING_RATE_16KHZ:
  587. sample_rate_val = 1;
  588. break;
  589. case SAMPLING_RATE_32KHZ:
  590. sample_rate_val = 2;
  591. break;
  592. case SAMPLING_RATE_44P1KHZ:
  593. sample_rate_val = 3;
  594. break;
  595. case SAMPLING_RATE_48KHZ:
  596. sample_rate_val = 4;
  597. break;
  598. case SAMPLING_RATE_88P2KHZ:
  599. sample_rate_val = 5;
  600. break;
  601. case SAMPLING_RATE_96KHZ:
  602. sample_rate_val = 6;
  603. break;
  604. case SAMPLING_RATE_176P4KHZ:
  605. sample_rate_val = 7;
  606. break;
  607. case SAMPLING_RATE_192KHZ:
  608. sample_rate_val = 8;
  609. break;
  610. case SAMPLING_RATE_352P8KHZ:
  611. sample_rate_val = 9;
  612. break;
  613. case SAMPLING_RATE_384KHZ:
  614. sample_rate_val = 10;
  615. break;
  616. default:
  617. sample_rate_val = 4;
  618. break;
  619. }
  620. return sample_rate_val;
  621. }
  622. static int slim_get_sample_rate(int value)
  623. {
  624. int sample_rate = 0;
  625. switch (value) {
  626. case 0:
  627. sample_rate = SAMPLING_RATE_8KHZ;
  628. break;
  629. case 1:
  630. sample_rate = SAMPLING_RATE_16KHZ;
  631. break;
  632. case 2:
  633. sample_rate = SAMPLING_RATE_32KHZ;
  634. break;
  635. case 3:
  636. sample_rate = SAMPLING_RATE_44P1KHZ;
  637. break;
  638. case 4:
  639. sample_rate = SAMPLING_RATE_48KHZ;
  640. break;
  641. case 5:
  642. sample_rate = SAMPLING_RATE_88P2KHZ;
  643. break;
  644. case 6:
  645. sample_rate = SAMPLING_RATE_96KHZ;
  646. break;
  647. case 7:
  648. sample_rate = SAMPLING_RATE_176P4KHZ;
  649. break;
  650. case 8:
  651. sample_rate = SAMPLING_RATE_192KHZ;
  652. break;
  653. case 9:
  654. sample_rate = SAMPLING_RATE_352P8KHZ;
  655. break;
  656. case 10:
  657. sample_rate = SAMPLING_RATE_384KHZ;
  658. break;
  659. default:
  660. sample_rate = SAMPLING_RATE_48KHZ;
  661. break;
  662. }
  663. return sample_rate;
  664. }
  665. static int slim_get_bit_format_val(int bit_format)
  666. {
  667. int val = 0;
  668. switch (bit_format) {
  669. case SNDRV_PCM_FORMAT_S32_LE:
  670. val = 3;
  671. break;
  672. case SNDRV_PCM_FORMAT_S24_3LE:
  673. val = 2;
  674. break;
  675. case SNDRV_PCM_FORMAT_S24_LE:
  676. val = 1;
  677. break;
  678. case SNDRV_PCM_FORMAT_S16_LE:
  679. default:
  680. val = 0;
  681. break;
  682. }
  683. return val;
  684. }
  685. static int slim_get_bit_format(int val)
  686. {
  687. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  688. switch (val) {
  689. case 0:
  690. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  691. break;
  692. case 1:
  693. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  694. break;
  695. case 2:
  696. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  697. break;
  698. case 3:
  699. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  700. break;
  701. default:
  702. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  703. break;
  704. }
  705. return bit_fmt;
  706. }
  707. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  708. {
  709. int port_id = 0;
  710. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  711. port_id = SLIM_RX_0;
  712. } else if (strnstr(kcontrol->id.name,
  713. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  714. port_id = SLIM_RX_2;
  715. } else if (strnstr(kcontrol->id.name,
  716. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  717. port_id = SLIM_RX_5;
  718. } else if (strnstr(kcontrol->id.name,
  719. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  720. port_id = SLIM_RX_6;
  721. } else if (strnstr(kcontrol->id.name,
  722. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  723. port_id = SLIM_TX_0;
  724. } else if (strnstr(kcontrol->id.name,
  725. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  726. port_id = SLIM_TX_1;
  727. } else {
  728. pr_err("%s: unsupported channel: %s",
  729. __func__, kcontrol->id.name);
  730. return -EINVAL;
  731. }
  732. return port_id;
  733. }
  734. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  735. struct snd_ctl_elem_value *ucontrol)
  736. {
  737. int ch_num = slim_get_port_idx(kcontrol);
  738. if (ch_num < 0)
  739. return ch_num;
  740. ucontrol->value.enumerated.item[0] =
  741. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  742. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  743. ch_num, slim_rx_cfg[ch_num].sample_rate,
  744. ucontrol->value.enumerated.item[0]);
  745. return 0;
  746. }
  747. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  748. struct snd_ctl_elem_value *ucontrol)
  749. {
  750. int ch_num = slim_get_port_idx(kcontrol);
  751. if (ch_num < 0)
  752. return ch_num;
  753. slim_rx_cfg[ch_num].sample_rate =
  754. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  755. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  756. ch_num, slim_rx_cfg[ch_num].sample_rate,
  757. ucontrol->value.enumerated.item[0]);
  758. return 0;
  759. }
  760. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  761. struct snd_ctl_elem_value *ucontrol)
  762. {
  763. int ch_num = slim_get_port_idx(kcontrol);
  764. if (ch_num < 0)
  765. return ch_num;
  766. ucontrol->value.enumerated.item[0] =
  767. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  768. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  769. ch_num, slim_tx_cfg[ch_num].sample_rate,
  770. ucontrol->value.enumerated.item[0]);
  771. return 0;
  772. }
  773. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  774. struct snd_ctl_elem_value *ucontrol)
  775. {
  776. int sample_rate = 0;
  777. int ch_num = slim_get_port_idx(kcontrol);
  778. if (ch_num < 0)
  779. return ch_num;
  780. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  781. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  782. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  783. __func__, sample_rate);
  784. return -EINVAL;
  785. }
  786. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  787. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  788. ch_num, slim_tx_cfg[ch_num].sample_rate,
  789. ucontrol->value.enumerated.item[0]);
  790. return 0;
  791. }
  792. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  793. struct snd_ctl_elem_value *ucontrol)
  794. {
  795. int ch_num = slim_get_port_idx(kcontrol);
  796. if (ch_num < 0)
  797. return ch_num;
  798. ucontrol->value.enumerated.item[0] =
  799. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  800. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  801. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  802. ucontrol->value.enumerated.item[0]);
  803. return 0;
  804. }
  805. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  806. struct snd_ctl_elem_value *ucontrol)
  807. {
  808. int ch_num = slim_get_port_idx(kcontrol);
  809. if (ch_num < 0)
  810. return ch_num;
  811. slim_rx_cfg[ch_num].bit_format =
  812. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  813. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  814. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  815. ucontrol->value.enumerated.item[0]);
  816. return 0;
  817. }
  818. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  819. struct snd_ctl_elem_value *ucontrol)
  820. {
  821. int ch_num = slim_get_port_idx(kcontrol);
  822. if (ch_num < 0)
  823. return ch_num;
  824. ucontrol->value.enumerated.item[0] =
  825. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  826. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  827. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  828. ucontrol->value.enumerated.item[0]);
  829. return 0;
  830. }
  831. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  832. struct snd_ctl_elem_value *ucontrol)
  833. {
  834. int ch_num = slim_get_port_idx(kcontrol);
  835. if (ch_num < 0)
  836. return ch_num;
  837. slim_tx_cfg[ch_num].bit_format =
  838. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  839. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  840. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  841. ucontrol->value.enumerated.item[0]);
  842. return 0;
  843. }
  844. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  845. struct snd_ctl_elem_value *ucontrol)
  846. {
  847. int ch_num = slim_get_port_idx(kcontrol);
  848. if (ch_num < 0)
  849. return ch_num;
  850. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  851. ch_num, slim_rx_cfg[ch_num].channels);
  852. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  853. return 0;
  854. }
  855. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  856. struct snd_ctl_elem_value *ucontrol)
  857. {
  858. int ch_num = slim_get_port_idx(kcontrol);
  859. if (ch_num < 0)
  860. return ch_num;
  861. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  862. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  863. ch_num, slim_rx_cfg[ch_num].channels);
  864. return 1;
  865. }
  866. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  867. struct snd_ctl_elem_value *ucontrol)
  868. {
  869. int ch_num = slim_get_port_idx(kcontrol);
  870. if (ch_num < 0)
  871. return ch_num;
  872. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  873. ch_num, slim_tx_cfg[ch_num].channels);
  874. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  875. return 0;
  876. }
  877. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  878. struct snd_ctl_elem_value *ucontrol)
  879. {
  880. int ch_num = slim_get_port_idx(kcontrol);
  881. if (ch_num < 0)
  882. return ch_num;
  883. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  884. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  885. ch_num, slim_tx_cfg[ch_num].channels);
  886. return 1;
  887. }
  888. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  889. struct snd_ctl_elem_value *ucontrol)
  890. {
  891. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  892. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  893. ucontrol->value.integer.value[0]);
  894. return 0;
  895. }
  896. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  897. struct snd_ctl_elem_value *ucontrol)
  898. {
  899. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  900. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  901. return 1;
  902. }
  903. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  904. struct snd_ctl_elem_value *ucontrol)
  905. {
  906. /*
  907. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  908. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  909. * value.
  910. */
  911. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  912. case SAMPLING_RATE_96KHZ:
  913. ucontrol->value.integer.value[0] = 5;
  914. break;
  915. case SAMPLING_RATE_88P2KHZ:
  916. ucontrol->value.integer.value[0] = 4;
  917. break;
  918. case SAMPLING_RATE_48KHZ:
  919. ucontrol->value.integer.value[0] = 3;
  920. break;
  921. case SAMPLING_RATE_44P1KHZ:
  922. ucontrol->value.integer.value[0] = 2;
  923. break;
  924. case SAMPLING_RATE_16KHZ:
  925. ucontrol->value.integer.value[0] = 1;
  926. break;
  927. case SAMPLING_RATE_8KHZ:
  928. default:
  929. ucontrol->value.integer.value[0] = 0;
  930. break;
  931. }
  932. pr_debug("%s: sample rate = %d", __func__,
  933. slim_rx_cfg[SLIM_RX_7].sample_rate);
  934. return 0;
  935. }
  936. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. switch (ucontrol->value.integer.value[0]) {
  940. case 1:
  941. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  942. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  943. break;
  944. case 2:
  945. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  946. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  947. break;
  948. case 3:
  949. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  950. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  951. break;
  952. case 4:
  953. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  954. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  955. break;
  956. case 5:
  957. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  958. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  959. break;
  960. case 0:
  961. default:
  962. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  963. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  964. break;
  965. }
  966. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  967. __func__,
  968. slim_rx_cfg[SLIM_RX_7].sample_rate,
  969. slim_tx_cfg[SLIM_TX_7].sample_rate,
  970. ucontrol->value.enumerated.item[0]);
  971. return 0;
  972. }
  973. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  974. {
  975. int idx = 0;
  976. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  977. sizeof("WSA_CDC_DMA_RX_0")))
  978. idx = WSA_CDC_DMA_RX_0;
  979. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  980. sizeof("WSA_CDC_DMA_RX_0")))
  981. idx = WSA_CDC_DMA_RX_1;
  982. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  983. sizeof("WSA_CDC_DMA_TX_0")))
  984. idx = WSA_CDC_DMA_TX_0;
  985. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  986. sizeof("WSA_CDC_DMA_TX_1")))
  987. idx = WSA_CDC_DMA_TX_1;
  988. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  989. sizeof("WSA_CDC_DMA_TX_2")))
  990. idx = WSA_CDC_DMA_TX_2;
  991. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  992. sizeof("VA_CDC_DMA_TX_0")))
  993. idx = VA_CDC_DMA_TX_0;
  994. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  995. sizeof("VA_CDC_DMA_TX_1")))
  996. idx = VA_CDC_DMA_TX_1;
  997. else {
  998. pr_err("%s: unsupported port: %s\n",
  999. __func__, kcontrol->id.name);
  1000. return -EINVAL;
  1001. }
  1002. return idx;
  1003. }
  1004. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1005. struct snd_ctl_elem_value *ucontrol)
  1006. {
  1007. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1008. if (ch_num < 0)
  1009. return ch_num;
  1010. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1011. cdc_dma_rx_cfg[ch_num].channels - 1);
  1012. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1013. return 0;
  1014. }
  1015. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1016. struct snd_ctl_elem_value *ucontrol)
  1017. {
  1018. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1019. if (ch_num < 0)
  1020. return ch_num;
  1021. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1022. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1023. cdc_dma_rx_cfg[ch_num].channels);
  1024. return 1;
  1025. }
  1026. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1027. struct snd_ctl_elem_value *ucontrol)
  1028. {
  1029. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1030. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1031. case SNDRV_PCM_FORMAT_S32_LE:
  1032. ucontrol->value.integer.value[0] = 3;
  1033. break;
  1034. case SNDRV_PCM_FORMAT_S24_3LE:
  1035. ucontrol->value.integer.value[0] = 2;
  1036. break;
  1037. case SNDRV_PCM_FORMAT_S24_LE:
  1038. ucontrol->value.integer.value[0] = 1;
  1039. break;
  1040. case SNDRV_PCM_FORMAT_S16_LE:
  1041. default:
  1042. ucontrol->value.integer.value[0] = 0;
  1043. break;
  1044. }
  1045. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1046. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1047. ucontrol->value.integer.value[0]);
  1048. return 0;
  1049. }
  1050. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1051. struct snd_ctl_elem_value *ucontrol)
  1052. {
  1053. int rc = 0;
  1054. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1055. switch (ucontrol->value.integer.value[0]) {
  1056. case 3:
  1057. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1058. break;
  1059. case 2:
  1060. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1061. break;
  1062. case 1:
  1063. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1064. break;
  1065. case 0:
  1066. default:
  1067. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1068. break;
  1069. }
  1070. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1071. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1072. ucontrol->value.integer.value[0]);
  1073. return rc;
  1074. }
  1075. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1076. {
  1077. int sample_rate_val = 0;
  1078. switch (sample_rate) {
  1079. case SAMPLING_RATE_8KHZ:
  1080. sample_rate_val = 0;
  1081. break;
  1082. case SAMPLING_RATE_16KHZ:
  1083. sample_rate_val = 1;
  1084. break;
  1085. case SAMPLING_RATE_32KHZ:
  1086. sample_rate_val = 2;
  1087. break;
  1088. case SAMPLING_RATE_44P1KHZ:
  1089. sample_rate_val = 3;
  1090. break;
  1091. case SAMPLING_RATE_48KHZ:
  1092. sample_rate_val = 4;
  1093. break;
  1094. case SAMPLING_RATE_88P2KHZ:
  1095. sample_rate_val = 5;
  1096. break;
  1097. case SAMPLING_RATE_96KHZ:
  1098. sample_rate_val = 6;
  1099. break;
  1100. case SAMPLING_RATE_176P4KHZ:
  1101. sample_rate_val = 7;
  1102. break;
  1103. case SAMPLING_RATE_192KHZ:
  1104. sample_rate_val = 8;
  1105. break;
  1106. case SAMPLING_RATE_352P8KHZ:
  1107. sample_rate_val = 9;
  1108. break;
  1109. case SAMPLING_RATE_384KHZ:
  1110. sample_rate_val = 10;
  1111. break;
  1112. default:
  1113. sample_rate_val = 4;
  1114. break;
  1115. }
  1116. return sample_rate_val;
  1117. }
  1118. static int cdc_dma_get_sample_rate(int value)
  1119. {
  1120. int sample_rate = 0;
  1121. switch (value) {
  1122. case 0:
  1123. sample_rate = SAMPLING_RATE_8KHZ;
  1124. break;
  1125. case 1:
  1126. sample_rate = SAMPLING_RATE_16KHZ;
  1127. break;
  1128. case 2:
  1129. sample_rate = SAMPLING_RATE_32KHZ;
  1130. break;
  1131. case 3:
  1132. sample_rate = SAMPLING_RATE_44P1KHZ;
  1133. break;
  1134. case 4:
  1135. sample_rate = SAMPLING_RATE_48KHZ;
  1136. break;
  1137. case 5:
  1138. sample_rate = SAMPLING_RATE_88P2KHZ;
  1139. break;
  1140. case 6:
  1141. sample_rate = SAMPLING_RATE_96KHZ;
  1142. break;
  1143. case 7:
  1144. sample_rate = SAMPLING_RATE_176P4KHZ;
  1145. break;
  1146. case 8:
  1147. sample_rate = SAMPLING_RATE_192KHZ;
  1148. break;
  1149. case 9:
  1150. sample_rate = SAMPLING_RATE_352P8KHZ;
  1151. break;
  1152. case 10:
  1153. sample_rate = SAMPLING_RATE_384KHZ;
  1154. break;
  1155. default:
  1156. sample_rate = SAMPLING_RATE_48KHZ;
  1157. break;
  1158. }
  1159. return sample_rate;
  1160. }
  1161. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1162. struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1165. if (ch_num < 0)
  1166. return ch_num;
  1167. ucontrol->value.enumerated.item[0] =
  1168. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1169. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1170. cdc_dma_rx_cfg[ch_num].sample_rate);
  1171. return 0;
  1172. }
  1173. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1174. struct snd_ctl_elem_value *ucontrol)
  1175. {
  1176. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1177. if (ch_num < 0)
  1178. return ch_num;
  1179. cdc_dma_rx_cfg[ch_num].sample_rate =
  1180. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1181. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1182. __func__, ucontrol->value.enumerated.item[0],
  1183. cdc_dma_rx_cfg[ch_num].sample_rate);
  1184. return 0;
  1185. }
  1186. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1187. struct snd_ctl_elem_value *ucontrol)
  1188. {
  1189. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1190. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1191. cdc_dma_tx_cfg[ch_num].channels);
  1192. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1193. return 0;
  1194. }
  1195. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1196. struct snd_ctl_elem_value *ucontrol)
  1197. {
  1198. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1199. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1200. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1201. cdc_dma_tx_cfg[ch_num].channels);
  1202. return 1;
  1203. }
  1204. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1205. struct snd_ctl_elem_value *ucontrol)
  1206. {
  1207. int sample_rate_val;
  1208. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1209. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1210. case SAMPLING_RATE_384KHZ:
  1211. sample_rate_val = 12;
  1212. break;
  1213. case SAMPLING_RATE_352P8KHZ:
  1214. sample_rate_val = 11;
  1215. break;
  1216. case SAMPLING_RATE_192KHZ:
  1217. sample_rate_val = 10;
  1218. break;
  1219. case SAMPLING_RATE_176P4KHZ:
  1220. sample_rate_val = 9;
  1221. break;
  1222. case SAMPLING_RATE_96KHZ:
  1223. sample_rate_val = 8;
  1224. break;
  1225. case SAMPLING_RATE_88P2KHZ:
  1226. sample_rate_val = 7;
  1227. break;
  1228. case SAMPLING_RATE_48KHZ:
  1229. sample_rate_val = 6;
  1230. break;
  1231. case SAMPLING_RATE_44P1KHZ:
  1232. sample_rate_val = 5;
  1233. break;
  1234. case SAMPLING_RATE_32KHZ:
  1235. sample_rate_val = 4;
  1236. break;
  1237. case SAMPLING_RATE_22P05KHZ:
  1238. sample_rate_val = 3;
  1239. break;
  1240. case SAMPLING_RATE_16KHZ:
  1241. sample_rate_val = 2;
  1242. break;
  1243. case SAMPLING_RATE_11P025KHZ:
  1244. sample_rate_val = 1;
  1245. break;
  1246. case SAMPLING_RATE_8KHZ:
  1247. sample_rate_val = 0;
  1248. break;
  1249. default:
  1250. sample_rate_val = 6;
  1251. break;
  1252. }
  1253. ucontrol->value.integer.value[0] = sample_rate_val;
  1254. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1255. cdc_dma_tx_cfg[ch_num].sample_rate);
  1256. return 0;
  1257. }
  1258. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1259. struct snd_ctl_elem_value *ucontrol)
  1260. {
  1261. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1262. switch (ucontrol->value.integer.value[0]) {
  1263. case 12:
  1264. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1265. break;
  1266. case 11:
  1267. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1268. break;
  1269. case 10:
  1270. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1271. break;
  1272. case 9:
  1273. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1274. break;
  1275. case 8:
  1276. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1277. break;
  1278. case 7:
  1279. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1280. break;
  1281. case 6:
  1282. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1283. break;
  1284. case 5:
  1285. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1286. break;
  1287. case 4:
  1288. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1289. break;
  1290. case 3:
  1291. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1292. break;
  1293. case 2:
  1294. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1295. break;
  1296. case 1:
  1297. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1298. break;
  1299. case 0:
  1300. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1301. break;
  1302. default:
  1303. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1304. break;
  1305. }
  1306. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1307. __func__, ucontrol->value.integer.value[0],
  1308. cdc_dma_tx_cfg[ch_num].sample_rate);
  1309. return 0;
  1310. }
  1311. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1312. struct snd_ctl_elem_value *ucontrol)
  1313. {
  1314. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1315. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1316. case SNDRV_PCM_FORMAT_S32_LE:
  1317. ucontrol->value.integer.value[0] = 3;
  1318. break;
  1319. case SNDRV_PCM_FORMAT_S24_3LE:
  1320. ucontrol->value.integer.value[0] = 2;
  1321. break;
  1322. case SNDRV_PCM_FORMAT_S24_LE:
  1323. ucontrol->value.integer.value[0] = 1;
  1324. break;
  1325. case SNDRV_PCM_FORMAT_S16_LE:
  1326. default:
  1327. ucontrol->value.integer.value[0] = 0;
  1328. break;
  1329. }
  1330. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1331. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1332. ucontrol->value.integer.value[0]);
  1333. return 0;
  1334. }
  1335. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1336. struct snd_ctl_elem_value *ucontrol)
  1337. {
  1338. int rc = 0;
  1339. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1340. switch (ucontrol->value.integer.value[0]) {
  1341. case 3:
  1342. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1343. break;
  1344. case 2:
  1345. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1346. break;
  1347. case 1:
  1348. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1349. break;
  1350. case 0:
  1351. default:
  1352. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1353. break;
  1354. }
  1355. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1356. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1357. ucontrol->value.integer.value[0]);
  1358. return rc;
  1359. }
  1360. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1361. struct snd_ctl_elem_value *ucontrol)
  1362. {
  1363. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1364. usb_rx_cfg.channels);
  1365. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1366. return 0;
  1367. }
  1368. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1369. struct snd_ctl_elem_value *ucontrol)
  1370. {
  1371. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1372. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1373. return 1;
  1374. }
  1375. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1376. struct snd_ctl_elem_value *ucontrol)
  1377. {
  1378. int sample_rate_val;
  1379. switch (usb_rx_cfg.sample_rate) {
  1380. case SAMPLING_RATE_384KHZ:
  1381. sample_rate_val = 12;
  1382. break;
  1383. case SAMPLING_RATE_352P8KHZ:
  1384. sample_rate_val = 11;
  1385. break;
  1386. case SAMPLING_RATE_192KHZ:
  1387. sample_rate_val = 10;
  1388. break;
  1389. case SAMPLING_RATE_176P4KHZ:
  1390. sample_rate_val = 9;
  1391. break;
  1392. case SAMPLING_RATE_96KHZ:
  1393. sample_rate_val = 8;
  1394. break;
  1395. case SAMPLING_RATE_88P2KHZ:
  1396. sample_rate_val = 7;
  1397. break;
  1398. case SAMPLING_RATE_48KHZ:
  1399. sample_rate_val = 6;
  1400. break;
  1401. case SAMPLING_RATE_44P1KHZ:
  1402. sample_rate_val = 5;
  1403. break;
  1404. case SAMPLING_RATE_32KHZ:
  1405. sample_rate_val = 4;
  1406. break;
  1407. case SAMPLING_RATE_22P05KHZ:
  1408. sample_rate_val = 3;
  1409. break;
  1410. case SAMPLING_RATE_16KHZ:
  1411. sample_rate_val = 2;
  1412. break;
  1413. case SAMPLING_RATE_11P025KHZ:
  1414. sample_rate_val = 1;
  1415. break;
  1416. case SAMPLING_RATE_8KHZ:
  1417. default:
  1418. sample_rate_val = 0;
  1419. break;
  1420. }
  1421. ucontrol->value.integer.value[0] = sample_rate_val;
  1422. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1423. usb_rx_cfg.sample_rate);
  1424. return 0;
  1425. }
  1426. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1427. struct snd_ctl_elem_value *ucontrol)
  1428. {
  1429. switch (ucontrol->value.integer.value[0]) {
  1430. case 12:
  1431. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1432. break;
  1433. case 11:
  1434. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1435. break;
  1436. case 10:
  1437. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1438. break;
  1439. case 9:
  1440. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1441. break;
  1442. case 8:
  1443. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1444. break;
  1445. case 7:
  1446. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1447. break;
  1448. case 6:
  1449. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1450. break;
  1451. case 5:
  1452. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1453. break;
  1454. case 4:
  1455. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1456. break;
  1457. case 3:
  1458. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1459. break;
  1460. case 2:
  1461. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1462. break;
  1463. case 1:
  1464. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1465. break;
  1466. case 0:
  1467. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1468. break;
  1469. default:
  1470. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1471. break;
  1472. }
  1473. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1474. __func__, ucontrol->value.integer.value[0],
  1475. usb_rx_cfg.sample_rate);
  1476. return 0;
  1477. }
  1478. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1479. struct snd_ctl_elem_value *ucontrol)
  1480. {
  1481. switch (usb_rx_cfg.bit_format) {
  1482. case SNDRV_PCM_FORMAT_S32_LE:
  1483. ucontrol->value.integer.value[0] = 3;
  1484. break;
  1485. case SNDRV_PCM_FORMAT_S24_3LE:
  1486. ucontrol->value.integer.value[0] = 2;
  1487. break;
  1488. case SNDRV_PCM_FORMAT_S24_LE:
  1489. ucontrol->value.integer.value[0] = 1;
  1490. break;
  1491. case SNDRV_PCM_FORMAT_S16_LE:
  1492. default:
  1493. ucontrol->value.integer.value[0] = 0;
  1494. break;
  1495. }
  1496. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1497. __func__, usb_rx_cfg.bit_format,
  1498. ucontrol->value.integer.value[0]);
  1499. return 0;
  1500. }
  1501. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1502. struct snd_ctl_elem_value *ucontrol)
  1503. {
  1504. int rc = 0;
  1505. switch (ucontrol->value.integer.value[0]) {
  1506. case 3:
  1507. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1508. break;
  1509. case 2:
  1510. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1511. break;
  1512. case 1:
  1513. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1514. break;
  1515. case 0:
  1516. default:
  1517. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1518. break;
  1519. }
  1520. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1521. __func__, usb_rx_cfg.bit_format,
  1522. ucontrol->value.integer.value[0]);
  1523. return rc;
  1524. }
  1525. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1526. struct snd_ctl_elem_value *ucontrol)
  1527. {
  1528. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1529. usb_tx_cfg.channels);
  1530. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1531. return 0;
  1532. }
  1533. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1534. struct snd_ctl_elem_value *ucontrol)
  1535. {
  1536. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1537. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1538. return 1;
  1539. }
  1540. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1541. struct snd_ctl_elem_value *ucontrol)
  1542. {
  1543. int sample_rate_val;
  1544. switch (usb_tx_cfg.sample_rate) {
  1545. case SAMPLING_RATE_384KHZ:
  1546. sample_rate_val = 12;
  1547. break;
  1548. case SAMPLING_RATE_352P8KHZ:
  1549. sample_rate_val = 11;
  1550. break;
  1551. case SAMPLING_RATE_192KHZ:
  1552. sample_rate_val = 10;
  1553. break;
  1554. case SAMPLING_RATE_176P4KHZ:
  1555. sample_rate_val = 9;
  1556. break;
  1557. case SAMPLING_RATE_96KHZ:
  1558. sample_rate_val = 8;
  1559. break;
  1560. case SAMPLING_RATE_88P2KHZ:
  1561. sample_rate_val = 7;
  1562. break;
  1563. case SAMPLING_RATE_48KHZ:
  1564. sample_rate_val = 6;
  1565. break;
  1566. case SAMPLING_RATE_44P1KHZ:
  1567. sample_rate_val = 5;
  1568. break;
  1569. case SAMPLING_RATE_32KHZ:
  1570. sample_rate_val = 4;
  1571. break;
  1572. case SAMPLING_RATE_22P05KHZ:
  1573. sample_rate_val = 3;
  1574. break;
  1575. case SAMPLING_RATE_16KHZ:
  1576. sample_rate_val = 2;
  1577. break;
  1578. case SAMPLING_RATE_11P025KHZ:
  1579. sample_rate_val = 1;
  1580. break;
  1581. case SAMPLING_RATE_8KHZ:
  1582. sample_rate_val = 0;
  1583. break;
  1584. default:
  1585. sample_rate_val = 6;
  1586. break;
  1587. }
  1588. ucontrol->value.integer.value[0] = sample_rate_val;
  1589. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1590. usb_tx_cfg.sample_rate);
  1591. return 0;
  1592. }
  1593. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1594. struct snd_ctl_elem_value *ucontrol)
  1595. {
  1596. switch (ucontrol->value.integer.value[0]) {
  1597. case 12:
  1598. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1599. break;
  1600. case 11:
  1601. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1602. break;
  1603. case 10:
  1604. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1605. break;
  1606. case 9:
  1607. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1608. break;
  1609. case 8:
  1610. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1611. break;
  1612. case 7:
  1613. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1614. break;
  1615. case 6:
  1616. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1617. break;
  1618. case 5:
  1619. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1620. break;
  1621. case 4:
  1622. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1623. break;
  1624. case 3:
  1625. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1626. break;
  1627. case 2:
  1628. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1629. break;
  1630. case 1:
  1631. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1632. break;
  1633. case 0:
  1634. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1635. break;
  1636. default:
  1637. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1638. break;
  1639. }
  1640. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1641. __func__, ucontrol->value.integer.value[0],
  1642. usb_tx_cfg.sample_rate);
  1643. return 0;
  1644. }
  1645. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1646. struct snd_ctl_elem_value *ucontrol)
  1647. {
  1648. switch (usb_tx_cfg.bit_format) {
  1649. case SNDRV_PCM_FORMAT_S32_LE:
  1650. ucontrol->value.integer.value[0] = 3;
  1651. break;
  1652. case SNDRV_PCM_FORMAT_S24_3LE:
  1653. ucontrol->value.integer.value[0] = 2;
  1654. break;
  1655. case SNDRV_PCM_FORMAT_S24_LE:
  1656. ucontrol->value.integer.value[0] = 1;
  1657. break;
  1658. case SNDRV_PCM_FORMAT_S16_LE:
  1659. default:
  1660. ucontrol->value.integer.value[0] = 0;
  1661. break;
  1662. }
  1663. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1664. __func__, usb_tx_cfg.bit_format,
  1665. ucontrol->value.integer.value[0]);
  1666. return 0;
  1667. }
  1668. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1669. struct snd_ctl_elem_value *ucontrol)
  1670. {
  1671. int rc = 0;
  1672. switch (ucontrol->value.integer.value[0]) {
  1673. case 3:
  1674. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1675. break;
  1676. case 2:
  1677. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1678. break;
  1679. case 1:
  1680. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1681. break;
  1682. case 0:
  1683. default:
  1684. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1685. break;
  1686. }
  1687. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1688. __func__, usb_tx_cfg.bit_format,
  1689. ucontrol->value.integer.value[0]);
  1690. return rc;
  1691. }
  1692. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1693. struct snd_ctl_elem_value *ucontrol)
  1694. {
  1695. pr_debug("%s: proxy_rx channels = %d\n",
  1696. __func__, proxy_rx_cfg.channels);
  1697. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1698. return 0;
  1699. }
  1700. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1701. struct snd_ctl_elem_value *ucontrol)
  1702. {
  1703. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1704. pr_debug("%s: proxy_rx channels = %d\n",
  1705. __func__, proxy_rx_cfg.channels);
  1706. return 1;
  1707. }
  1708. static int tdm_get_sample_rate(int value)
  1709. {
  1710. int sample_rate = 0;
  1711. switch (value) {
  1712. case 0:
  1713. sample_rate = SAMPLING_RATE_8KHZ;
  1714. break;
  1715. case 1:
  1716. sample_rate = SAMPLING_RATE_16KHZ;
  1717. break;
  1718. case 2:
  1719. sample_rate = SAMPLING_RATE_32KHZ;
  1720. break;
  1721. case 3:
  1722. sample_rate = SAMPLING_RATE_48KHZ;
  1723. break;
  1724. case 4:
  1725. sample_rate = SAMPLING_RATE_176P4KHZ;
  1726. break;
  1727. case 5:
  1728. sample_rate = SAMPLING_RATE_352P8KHZ;
  1729. break;
  1730. default:
  1731. sample_rate = SAMPLING_RATE_48KHZ;
  1732. break;
  1733. }
  1734. return sample_rate;
  1735. }
  1736. static int aux_pcm_get_sample_rate(int value)
  1737. {
  1738. int sample_rate;
  1739. switch (value) {
  1740. case 1:
  1741. sample_rate = SAMPLING_RATE_16KHZ;
  1742. break;
  1743. case 0:
  1744. default:
  1745. sample_rate = SAMPLING_RATE_8KHZ;
  1746. break;
  1747. }
  1748. return sample_rate;
  1749. }
  1750. static int tdm_get_sample_rate_val(int sample_rate)
  1751. {
  1752. int sample_rate_val = 0;
  1753. switch (sample_rate) {
  1754. case SAMPLING_RATE_8KHZ:
  1755. sample_rate_val = 0;
  1756. break;
  1757. case SAMPLING_RATE_16KHZ:
  1758. sample_rate_val = 1;
  1759. break;
  1760. case SAMPLING_RATE_32KHZ:
  1761. sample_rate_val = 2;
  1762. break;
  1763. case SAMPLING_RATE_48KHZ:
  1764. sample_rate_val = 3;
  1765. break;
  1766. case SAMPLING_RATE_176P4KHZ:
  1767. sample_rate_val = 4;
  1768. break;
  1769. case SAMPLING_RATE_352P8KHZ:
  1770. sample_rate_val = 5;
  1771. break;
  1772. default:
  1773. sample_rate_val = 3;
  1774. break;
  1775. }
  1776. return sample_rate_val;
  1777. }
  1778. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1779. {
  1780. int sample_rate_val;
  1781. switch (sample_rate) {
  1782. case SAMPLING_RATE_16KHZ:
  1783. sample_rate_val = 1;
  1784. break;
  1785. case SAMPLING_RATE_8KHZ:
  1786. default:
  1787. sample_rate_val = 0;
  1788. break;
  1789. }
  1790. return sample_rate_val;
  1791. }
  1792. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1793. struct tdm_port *port)
  1794. {
  1795. if (port) {
  1796. if (strnstr(kcontrol->id.name, "PRI",
  1797. sizeof(kcontrol->id.name))) {
  1798. port->mode = TDM_PRI;
  1799. } else if (strnstr(kcontrol->id.name, "SEC",
  1800. sizeof(kcontrol->id.name))) {
  1801. port->mode = TDM_SEC;
  1802. } else if (strnstr(kcontrol->id.name, "TERT",
  1803. sizeof(kcontrol->id.name))) {
  1804. port->mode = TDM_TERT;
  1805. } else if (strnstr(kcontrol->id.name, "QUAT",
  1806. sizeof(kcontrol->id.name))) {
  1807. port->mode = TDM_QUAT;
  1808. } else if (strnstr(kcontrol->id.name, "QUIN",
  1809. sizeof(kcontrol->id.name))) {
  1810. port->mode = TDM_QUIN;
  1811. } else {
  1812. pr_err("%s: unsupported mode in: %s",
  1813. __func__, kcontrol->id.name);
  1814. return -EINVAL;
  1815. }
  1816. if (strnstr(kcontrol->id.name, "RX_0",
  1817. sizeof(kcontrol->id.name)) ||
  1818. strnstr(kcontrol->id.name, "TX_0",
  1819. sizeof(kcontrol->id.name))) {
  1820. port->channel = TDM_0;
  1821. } else if (strnstr(kcontrol->id.name, "RX_1",
  1822. sizeof(kcontrol->id.name)) ||
  1823. strnstr(kcontrol->id.name, "TX_1",
  1824. sizeof(kcontrol->id.name))) {
  1825. port->channel = TDM_1;
  1826. } else if (strnstr(kcontrol->id.name, "RX_2",
  1827. sizeof(kcontrol->id.name)) ||
  1828. strnstr(kcontrol->id.name, "TX_2",
  1829. sizeof(kcontrol->id.name))) {
  1830. port->channel = TDM_2;
  1831. } else if (strnstr(kcontrol->id.name, "RX_3",
  1832. sizeof(kcontrol->id.name)) ||
  1833. strnstr(kcontrol->id.name, "TX_3",
  1834. sizeof(kcontrol->id.name))) {
  1835. port->channel = TDM_3;
  1836. } else if (strnstr(kcontrol->id.name, "RX_4",
  1837. sizeof(kcontrol->id.name)) ||
  1838. strnstr(kcontrol->id.name, "TX_4",
  1839. sizeof(kcontrol->id.name))) {
  1840. port->channel = TDM_4;
  1841. } else if (strnstr(kcontrol->id.name, "RX_5",
  1842. sizeof(kcontrol->id.name)) ||
  1843. strnstr(kcontrol->id.name, "TX_5",
  1844. sizeof(kcontrol->id.name))) {
  1845. port->channel = TDM_5;
  1846. } else if (strnstr(kcontrol->id.name, "RX_6",
  1847. sizeof(kcontrol->id.name)) ||
  1848. strnstr(kcontrol->id.name, "TX_6",
  1849. sizeof(kcontrol->id.name))) {
  1850. port->channel = TDM_6;
  1851. } else if (strnstr(kcontrol->id.name, "RX_7",
  1852. sizeof(kcontrol->id.name)) ||
  1853. strnstr(kcontrol->id.name, "TX_7",
  1854. sizeof(kcontrol->id.name))) {
  1855. port->channel = TDM_7;
  1856. } else {
  1857. pr_err("%s: unsupported channel in: %s",
  1858. __func__, kcontrol->id.name);
  1859. return -EINVAL;
  1860. }
  1861. } else
  1862. return -EINVAL;
  1863. return 0;
  1864. }
  1865. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1866. struct snd_ctl_elem_value *ucontrol)
  1867. {
  1868. struct tdm_port port;
  1869. int ret = tdm_get_port_idx(kcontrol, &port);
  1870. if (ret) {
  1871. pr_err("%s: unsupported control: %s",
  1872. __func__, kcontrol->id.name);
  1873. } else {
  1874. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1875. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1876. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1877. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1878. ucontrol->value.enumerated.item[0]);
  1879. }
  1880. return ret;
  1881. }
  1882. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1883. struct snd_ctl_elem_value *ucontrol)
  1884. {
  1885. struct tdm_port port;
  1886. int ret = tdm_get_port_idx(kcontrol, &port);
  1887. if (ret) {
  1888. pr_err("%s: unsupported control: %s",
  1889. __func__, kcontrol->id.name);
  1890. } else {
  1891. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1892. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1893. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1894. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1895. ucontrol->value.enumerated.item[0]);
  1896. }
  1897. return ret;
  1898. }
  1899. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1900. struct snd_ctl_elem_value *ucontrol)
  1901. {
  1902. struct tdm_port port;
  1903. int ret = tdm_get_port_idx(kcontrol, &port);
  1904. if (ret) {
  1905. pr_err("%s: unsupported control: %s",
  1906. __func__, kcontrol->id.name);
  1907. } else {
  1908. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1909. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1910. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1911. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1912. ucontrol->value.enumerated.item[0]);
  1913. }
  1914. return ret;
  1915. }
  1916. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1917. struct snd_ctl_elem_value *ucontrol)
  1918. {
  1919. struct tdm_port port;
  1920. int ret = tdm_get_port_idx(kcontrol, &port);
  1921. if (ret) {
  1922. pr_err("%s: unsupported control: %s",
  1923. __func__, kcontrol->id.name);
  1924. } else {
  1925. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1926. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1927. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1928. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1929. ucontrol->value.enumerated.item[0]);
  1930. }
  1931. return ret;
  1932. }
  1933. static int tdm_get_format(int value)
  1934. {
  1935. int format = 0;
  1936. switch (value) {
  1937. case 0:
  1938. format = SNDRV_PCM_FORMAT_S16_LE;
  1939. break;
  1940. case 1:
  1941. format = SNDRV_PCM_FORMAT_S24_LE;
  1942. break;
  1943. case 2:
  1944. format = SNDRV_PCM_FORMAT_S32_LE;
  1945. break;
  1946. default:
  1947. format = SNDRV_PCM_FORMAT_S16_LE;
  1948. break;
  1949. }
  1950. return format;
  1951. }
  1952. static int tdm_get_format_val(int format)
  1953. {
  1954. int value = 0;
  1955. switch (format) {
  1956. case SNDRV_PCM_FORMAT_S16_LE:
  1957. value = 0;
  1958. break;
  1959. case SNDRV_PCM_FORMAT_S24_LE:
  1960. value = 1;
  1961. break;
  1962. case SNDRV_PCM_FORMAT_S32_LE:
  1963. value = 2;
  1964. break;
  1965. default:
  1966. value = 0;
  1967. break;
  1968. }
  1969. return value;
  1970. }
  1971. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1972. struct snd_ctl_elem_value *ucontrol)
  1973. {
  1974. struct tdm_port port;
  1975. int ret = tdm_get_port_idx(kcontrol, &port);
  1976. if (ret) {
  1977. pr_err("%s: unsupported control: %s",
  1978. __func__, kcontrol->id.name);
  1979. } else {
  1980. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1981. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1982. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1983. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1984. ucontrol->value.enumerated.item[0]);
  1985. }
  1986. return ret;
  1987. }
  1988. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1989. struct snd_ctl_elem_value *ucontrol)
  1990. {
  1991. struct tdm_port port;
  1992. int ret = tdm_get_port_idx(kcontrol, &port);
  1993. if (ret) {
  1994. pr_err("%s: unsupported control: %s",
  1995. __func__, kcontrol->id.name);
  1996. } else {
  1997. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1998. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1999. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2000. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2001. ucontrol->value.enumerated.item[0]);
  2002. }
  2003. return ret;
  2004. }
  2005. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2006. struct snd_ctl_elem_value *ucontrol)
  2007. {
  2008. struct tdm_port port;
  2009. int ret = tdm_get_port_idx(kcontrol, &port);
  2010. if (ret) {
  2011. pr_err("%s: unsupported control: %s",
  2012. __func__, kcontrol->id.name);
  2013. } else {
  2014. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2015. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2016. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2017. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2018. ucontrol->value.enumerated.item[0]);
  2019. }
  2020. return ret;
  2021. }
  2022. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2023. struct snd_ctl_elem_value *ucontrol)
  2024. {
  2025. struct tdm_port port;
  2026. int ret = tdm_get_port_idx(kcontrol, &port);
  2027. if (ret) {
  2028. pr_err("%s: unsupported control: %s",
  2029. __func__, kcontrol->id.name);
  2030. } else {
  2031. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2032. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2033. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2034. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2035. ucontrol->value.enumerated.item[0]);
  2036. }
  2037. return ret;
  2038. }
  2039. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2040. struct snd_ctl_elem_value *ucontrol)
  2041. {
  2042. struct tdm_port port;
  2043. int ret = tdm_get_port_idx(kcontrol, &port);
  2044. if (ret) {
  2045. pr_err("%s: unsupported control: %s",
  2046. __func__, kcontrol->id.name);
  2047. } else {
  2048. ucontrol->value.enumerated.item[0] =
  2049. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2050. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2051. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2052. ucontrol->value.enumerated.item[0]);
  2053. }
  2054. return ret;
  2055. }
  2056. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2057. struct snd_ctl_elem_value *ucontrol)
  2058. {
  2059. struct tdm_port port;
  2060. int ret = tdm_get_port_idx(kcontrol, &port);
  2061. if (ret) {
  2062. pr_err("%s: unsupported control: %s",
  2063. __func__, kcontrol->id.name);
  2064. } else {
  2065. tdm_rx_cfg[port.mode][port.channel].channels =
  2066. ucontrol->value.enumerated.item[0] + 1;
  2067. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2068. tdm_rx_cfg[port.mode][port.channel].channels,
  2069. ucontrol->value.enumerated.item[0] + 1);
  2070. }
  2071. return ret;
  2072. }
  2073. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2074. struct snd_ctl_elem_value *ucontrol)
  2075. {
  2076. struct tdm_port port;
  2077. int ret = tdm_get_port_idx(kcontrol, &port);
  2078. if (ret) {
  2079. pr_err("%s: unsupported control: %s",
  2080. __func__, kcontrol->id.name);
  2081. } else {
  2082. ucontrol->value.enumerated.item[0] =
  2083. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2084. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2085. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2086. ucontrol->value.enumerated.item[0]);
  2087. }
  2088. return ret;
  2089. }
  2090. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2091. struct snd_ctl_elem_value *ucontrol)
  2092. {
  2093. struct tdm_port port;
  2094. int ret = tdm_get_port_idx(kcontrol, &port);
  2095. if (ret) {
  2096. pr_err("%s: unsupported control: %s",
  2097. __func__, kcontrol->id.name);
  2098. } else {
  2099. tdm_tx_cfg[port.mode][port.channel].channels =
  2100. ucontrol->value.enumerated.item[0] + 1;
  2101. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2102. tdm_tx_cfg[port.mode][port.channel].channels,
  2103. ucontrol->value.enumerated.item[0] + 1);
  2104. }
  2105. return ret;
  2106. }
  2107. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2108. {
  2109. int idx;
  2110. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2111. sizeof("PRIM_AUX_PCM")))
  2112. idx = PRIM_AUX_PCM;
  2113. else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2114. sizeof("SEC_AUX_PCM")))
  2115. idx = SEC_AUX_PCM;
  2116. else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2117. sizeof("TERT_AUX_PCM")))
  2118. idx = TERT_AUX_PCM;
  2119. else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2120. sizeof("QUAT_AUX_PCM")))
  2121. idx = QUAT_AUX_PCM;
  2122. else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2123. sizeof("QUIN_AUX_PCM")))
  2124. idx = QUIN_AUX_PCM;
  2125. else {
  2126. pr_err("%s: unsupported port: %s",
  2127. __func__, kcontrol->id.name);
  2128. idx = -EINVAL;
  2129. }
  2130. return idx;
  2131. }
  2132. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2133. struct snd_ctl_elem_value *ucontrol)
  2134. {
  2135. int idx = aux_pcm_get_port_idx(kcontrol);
  2136. if (idx < 0)
  2137. return idx;
  2138. aux_pcm_rx_cfg[idx].sample_rate =
  2139. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2140. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2141. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2142. ucontrol->value.enumerated.item[0]);
  2143. return 0;
  2144. }
  2145. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2146. struct snd_ctl_elem_value *ucontrol)
  2147. {
  2148. int idx = aux_pcm_get_port_idx(kcontrol);
  2149. if (idx < 0)
  2150. return idx;
  2151. ucontrol->value.enumerated.item[0] =
  2152. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2153. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2154. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2155. ucontrol->value.enumerated.item[0]);
  2156. return 0;
  2157. }
  2158. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2159. struct snd_ctl_elem_value *ucontrol)
  2160. {
  2161. int idx = aux_pcm_get_port_idx(kcontrol);
  2162. if (idx < 0)
  2163. return idx;
  2164. aux_pcm_tx_cfg[idx].sample_rate =
  2165. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2166. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2167. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2168. ucontrol->value.enumerated.item[0]);
  2169. return 0;
  2170. }
  2171. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2172. struct snd_ctl_elem_value *ucontrol)
  2173. {
  2174. int idx = aux_pcm_get_port_idx(kcontrol);
  2175. if (idx < 0)
  2176. return idx;
  2177. ucontrol->value.enumerated.item[0] =
  2178. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2179. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2180. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2181. ucontrol->value.enumerated.item[0]);
  2182. return 0;
  2183. }
  2184. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2185. {
  2186. int idx;
  2187. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2188. sizeof("PRIM_MI2S_RX")))
  2189. idx = PRIM_MI2S;
  2190. else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2191. sizeof("SEC_MI2S_RX")))
  2192. idx = SEC_MI2S;
  2193. else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2194. sizeof("TERT_MI2S_RX")))
  2195. idx = TERT_MI2S;
  2196. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2197. sizeof("QUAT_MI2S_RX")))
  2198. idx = QUAT_MI2S;
  2199. else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2200. sizeof("QUIN_MI2S_RX")))
  2201. idx = QUIN_MI2S;
  2202. else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2203. sizeof("PRIM_MI2S_TX")))
  2204. idx = PRIM_MI2S;
  2205. else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2206. sizeof("SEC_MI2S_TX")))
  2207. idx = SEC_MI2S;
  2208. else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2209. sizeof("TERT_MI2S_TX")))
  2210. idx = TERT_MI2S;
  2211. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2212. sizeof("QUAT_MI2S_TX")))
  2213. idx = QUAT_MI2S;
  2214. else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2215. sizeof("QUIN_MI2S_TX")))
  2216. idx = QUIN_MI2S;
  2217. else {
  2218. pr_err("%s: unsupported channel: %s",
  2219. __func__, kcontrol->id.name);
  2220. idx = -EINVAL;
  2221. }
  2222. return idx;
  2223. }
  2224. static int mi2s_get_sample_rate_val(int sample_rate)
  2225. {
  2226. int sample_rate_val;
  2227. switch (sample_rate) {
  2228. case SAMPLING_RATE_8KHZ:
  2229. sample_rate_val = 0;
  2230. break;
  2231. case SAMPLING_RATE_11P025KHZ:
  2232. sample_rate_val = 1;
  2233. break;
  2234. case SAMPLING_RATE_16KHZ:
  2235. sample_rate_val = 2;
  2236. break;
  2237. case SAMPLING_RATE_22P05KHZ:
  2238. sample_rate_val = 3;
  2239. break;
  2240. case SAMPLING_RATE_32KHZ:
  2241. sample_rate_val = 4;
  2242. break;
  2243. case SAMPLING_RATE_44P1KHZ:
  2244. sample_rate_val = 5;
  2245. break;
  2246. case SAMPLING_RATE_48KHZ:
  2247. sample_rate_val = 6;
  2248. break;
  2249. case SAMPLING_RATE_96KHZ:
  2250. sample_rate_val = 7;
  2251. break;
  2252. case SAMPLING_RATE_192KHZ:
  2253. sample_rate_val = 8;
  2254. break;
  2255. default:
  2256. sample_rate_val = 6;
  2257. break;
  2258. }
  2259. return sample_rate_val;
  2260. }
  2261. static int mi2s_get_sample_rate(int value)
  2262. {
  2263. int sample_rate;
  2264. switch (value) {
  2265. case 0:
  2266. sample_rate = SAMPLING_RATE_8KHZ;
  2267. break;
  2268. case 1:
  2269. sample_rate = SAMPLING_RATE_11P025KHZ;
  2270. break;
  2271. case 2:
  2272. sample_rate = SAMPLING_RATE_16KHZ;
  2273. break;
  2274. case 3:
  2275. sample_rate = SAMPLING_RATE_22P05KHZ;
  2276. break;
  2277. case 4:
  2278. sample_rate = SAMPLING_RATE_32KHZ;
  2279. break;
  2280. case 5:
  2281. sample_rate = SAMPLING_RATE_44P1KHZ;
  2282. break;
  2283. case 6:
  2284. sample_rate = SAMPLING_RATE_48KHZ;
  2285. break;
  2286. case 7:
  2287. sample_rate = SAMPLING_RATE_96KHZ;
  2288. break;
  2289. case 8:
  2290. sample_rate = SAMPLING_RATE_192KHZ;
  2291. break;
  2292. default:
  2293. sample_rate = SAMPLING_RATE_48KHZ;
  2294. break;
  2295. }
  2296. return sample_rate;
  2297. }
  2298. static int mi2s_auxpcm_get_format(int value)
  2299. {
  2300. int format;
  2301. switch (value) {
  2302. case 0:
  2303. format = SNDRV_PCM_FORMAT_S16_LE;
  2304. break;
  2305. case 1:
  2306. format = SNDRV_PCM_FORMAT_S24_LE;
  2307. break;
  2308. case 2:
  2309. format = SNDRV_PCM_FORMAT_S24_3LE;
  2310. break;
  2311. case 3:
  2312. format = SNDRV_PCM_FORMAT_S32_LE;
  2313. break;
  2314. default:
  2315. format = SNDRV_PCM_FORMAT_S16_LE;
  2316. break;
  2317. }
  2318. return format;
  2319. }
  2320. static int mi2s_auxpcm_get_format_value(int format)
  2321. {
  2322. int value;
  2323. switch (format) {
  2324. case SNDRV_PCM_FORMAT_S16_LE:
  2325. value = 0;
  2326. break;
  2327. case SNDRV_PCM_FORMAT_S24_LE:
  2328. value = 1;
  2329. break;
  2330. case SNDRV_PCM_FORMAT_S24_3LE:
  2331. value = 2;
  2332. break;
  2333. case SNDRV_PCM_FORMAT_S32_LE:
  2334. value = 3;
  2335. break;
  2336. default:
  2337. value = 0;
  2338. break;
  2339. }
  2340. return value;
  2341. }
  2342. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2343. struct snd_ctl_elem_value *ucontrol)
  2344. {
  2345. int idx = mi2s_get_port_idx(kcontrol);
  2346. if (idx < 0)
  2347. return idx;
  2348. mi2s_rx_cfg[idx].sample_rate =
  2349. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2350. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2351. idx, mi2s_rx_cfg[idx].sample_rate,
  2352. ucontrol->value.enumerated.item[0]);
  2353. return 0;
  2354. }
  2355. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2356. struct snd_ctl_elem_value *ucontrol)
  2357. {
  2358. int idx = mi2s_get_port_idx(kcontrol);
  2359. if (idx < 0)
  2360. return idx;
  2361. ucontrol->value.enumerated.item[0] =
  2362. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2363. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2364. idx, mi2s_rx_cfg[idx].sample_rate,
  2365. ucontrol->value.enumerated.item[0]);
  2366. return 0;
  2367. }
  2368. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2369. struct snd_ctl_elem_value *ucontrol)
  2370. {
  2371. int idx = mi2s_get_port_idx(kcontrol);
  2372. if (idx < 0)
  2373. return idx;
  2374. mi2s_tx_cfg[idx].sample_rate =
  2375. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2376. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2377. idx, mi2s_tx_cfg[idx].sample_rate,
  2378. ucontrol->value.enumerated.item[0]);
  2379. return 0;
  2380. }
  2381. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2382. struct snd_ctl_elem_value *ucontrol)
  2383. {
  2384. int idx = mi2s_get_port_idx(kcontrol);
  2385. if (idx < 0)
  2386. return idx;
  2387. ucontrol->value.enumerated.item[0] =
  2388. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2389. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2390. idx, mi2s_tx_cfg[idx].sample_rate,
  2391. ucontrol->value.enumerated.item[0]);
  2392. return 0;
  2393. }
  2394. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2395. struct snd_ctl_elem_value *ucontrol)
  2396. {
  2397. int idx = mi2s_get_port_idx(kcontrol);
  2398. if (idx < 0)
  2399. return idx;
  2400. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2401. idx, mi2s_rx_cfg[idx].channels);
  2402. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2403. return 0;
  2404. }
  2405. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2406. struct snd_ctl_elem_value *ucontrol)
  2407. {
  2408. int idx = mi2s_get_port_idx(kcontrol);
  2409. if (idx < 0)
  2410. return idx;
  2411. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2412. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2413. idx, mi2s_rx_cfg[idx].channels);
  2414. return 1;
  2415. }
  2416. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2417. struct snd_ctl_elem_value *ucontrol)
  2418. {
  2419. int idx = mi2s_get_port_idx(kcontrol);
  2420. if (idx < 0)
  2421. return idx;
  2422. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2423. idx, mi2s_tx_cfg[idx].channels);
  2424. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2425. return 0;
  2426. }
  2427. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2428. struct snd_ctl_elem_value *ucontrol)
  2429. {
  2430. int idx = mi2s_get_port_idx(kcontrol);
  2431. if (idx < 0)
  2432. return idx;
  2433. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2434. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2435. idx, mi2s_tx_cfg[idx].channels);
  2436. return 1;
  2437. }
  2438. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2439. struct snd_ctl_elem_value *ucontrol)
  2440. {
  2441. int idx = mi2s_get_port_idx(kcontrol);
  2442. if (idx < 0)
  2443. return idx;
  2444. ucontrol->value.enumerated.item[0] =
  2445. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2446. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2447. idx, mi2s_rx_cfg[idx].bit_format,
  2448. ucontrol->value.enumerated.item[0]);
  2449. return 0;
  2450. }
  2451. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2452. struct snd_ctl_elem_value *ucontrol)
  2453. {
  2454. int idx = mi2s_get_port_idx(kcontrol);
  2455. if (idx < 0)
  2456. return idx;
  2457. mi2s_rx_cfg[idx].bit_format =
  2458. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2459. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2460. idx, mi2s_rx_cfg[idx].bit_format,
  2461. ucontrol->value.enumerated.item[0]);
  2462. return 0;
  2463. }
  2464. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2465. struct snd_ctl_elem_value *ucontrol)
  2466. {
  2467. int idx = mi2s_get_port_idx(kcontrol);
  2468. if (idx < 0)
  2469. return idx;
  2470. ucontrol->value.enumerated.item[0] =
  2471. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2472. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2473. idx, mi2s_tx_cfg[idx].bit_format,
  2474. ucontrol->value.enumerated.item[0]);
  2475. return 0;
  2476. }
  2477. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2478. struct snd_ctl_elem_value *ucontrol)
  2479. {
  2480. int idx = mi2s_get_port_idx(kcontrol);
  2481. if (idx < 0)
  2482. return idx;
  2483. mi2s_tx_cfg[idx].bit_format =
  2484. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2485. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2486. idx, mi2s_tx_cfg[idx].bit_format,
  2487. ucontrol->value.enumerated.item[0]);
  2488. return 0;
  2489. }
  2490. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2491. struct snd_ctl_elem_value *ucontrol)
  2492. {
  2493. int idx = aux_pcm_get_port_idx(kcontrol);
  2494. if (idx < 0)
  2495. return idx;
  2496. ucontrol->value.enumerated.item[0] =
  2497. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2498. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2499. idx, aux_pcm_rx_cfg[idx].bit_format,
  2500. ucontrol->value.enumerated.item[0]);
  2501. return 0;
  2502. }
  2503. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2504. struct snd_ctl_elem_value *ucontrol)
  2505. {
  2506. int idx = aux_pcm_get_port_idx(kcontrol);
  2507. if (idx < 0)
  2508. return idx;
  2509. aux_pcm_rx_cfg[idx].bit_format =
  2510. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2511. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2512. idx, aux_pcm_rx_cfg[idx].bit_format,
  2513. ucontrol->value.enumerated.item[0]);
  2514. return 0;
  2515. }
  2516. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2517. struct snd_ctl_elem_value *ucontrol)
  2518. {
  2519. int idx = aux_pcm_get_port_idx(kcontrol);
  2520. if (idx < 0)
  2521. return idx;
  2522. ucontrol->value.enumerated.item[0] =
  2523. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2524. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2525. idx, aux_pcm_tx_cfg[idx].bit_format,
  2526. ucontrol->value.enumerated.item[0]);
  2527. return 0;
  2528. }
  2529. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2530. struct snd_ctl_elem_value *ucontrol)
  2531. {
  2532. int idx = aux_pcm_get_port_idx(kcontrol);
  2533. if (idx < 0)
  2534. return idx;
  2535. aux_pcm_tx_cfg[idx].bit_format =
  2536. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2537. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2538. idx, aux_pcm_tx_cfg[idx].bit_format,
  2539. ucontrol->value.enumerated.item[0]);
  2540. return 0;
  2541. }
  2542. static const struct snd_kcontrol_new msm_snd_sb_controls[] = {
  2543. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2544. slim_rx_ch_get, slim_rx_ch_put),
  2545. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2546. slim_rx_ch_get, slim_rx_ch_put),
  2547. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2548. slim_tx_ch_get, slim_tx_ch_put),
  2549. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2550. slim_tx_ch_get, slim_tx_ch_put),
  2551. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2552. slim_rx_ch_get, slim_rx_ch_put),
  2553. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2554. slim_rx_ch_get, slim_rx_ch_put),
  2555. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2556. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2557. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2558. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2559. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2560. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2561. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2562. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2563. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2564. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2565. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2566. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2567. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2568. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2569. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2570. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2571. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2572. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2573. };
  2574. static const struct snd_kcontrol_new msm_snd_va_controls[] = {
  2575. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2576. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2577. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2578. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2579. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2580. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2581. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2582. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2583. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2584. va_cdc_dma_tx_0_sample_rate,
  2585. cdc_dma_tx_sample_rate_get,
  2586. cdc_dma_tx_sample_rate_put),
  2587. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2588. va_cdc_dma_tx_1_sample_rate,
  2589. cdc_dma_tx_sample_rate_get,
  2590. cdc_dma_tx_sample_rate_put),
  2591. };
  2592. static const struct snd_kcontrol_new msm_snd_wsa_controls[] = {
  2593. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2594. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2595. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2596. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2597. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2598. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2599. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2600. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2601. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2602. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2603. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2604. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2605. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2606. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2607. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2608. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2609. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2610. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2611. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2612. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2613. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2614. wsa_cdc_dma_rx_0_sample_rate,
  2615. cdc_dma_rx_sample_rate_get,
  2616. cdc_dma_rx_sample_rate_put),
  2617. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2618. wsa_cdc_dma_rx_1_sample_rate,
  2619. cdc_dma_rx_sample_rate_get,
  2620. cdc_dma_rx_sample_rate_put),
  2621. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2622. wsa_cdc_dma_tx_0_sample_rate,
  2623. cdc_dma_tx_sample_rate_get,
  2624. cdc_dma_tx_sample_rate_put),
  2625. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2626. wsa_cdc_dma_tx_1_sample_rate,
  2627. cdc_dma_tx_sample_rate_get,
  2628. cdc_dma_tx_sample_rate_put),
  2629. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2630. wsa_cdc_dma_tx_2_sample_rate,
  2631. cdc_dma_tx_sample_rate_get,
  2632. cdc_dma_tx_sample_rate_put),
  2633. };
  2634. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2635. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2636. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2637. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2638. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2639. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2640. proxy_rx_ch_get, proxy_rx_ch_put),
  2641. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2642. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2643. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2644. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2645. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2646. msm_bt_sample_rate_get,
  2647. msm_bt_sample_rate_put),
  2648. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2649. usb_audio_rx_sample_rate_get,
  2650. usb_audio_rx_sample_rate_put),
  2651. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2652. usb_audio_tx_sample_rate_get,
  2653. usb_audio_tx_sample_rate_put),
  2654. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2655. tdm_rx_sample_rate_get,
  2656. tdm_rx_sample_rate_put),
  2657. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2658. tdm_tx_sample_rate_get,
  2659. tdm_tx_sample_rate_put),
  2660. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2661. tdm_rx_format_get,
  2662. tdm_rx_format_put),
  2663. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2664. tdm_tx_format_get,
  2665. tdm_tx_format_put),
  2666. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2667. tdm_rx_ch_get,
  2668. tdm_rx_ch_put),
  2669. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2670. tdm_tx_ch_get,
  2671. tdm_tx_ch_put),
  2672. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2673. tdm_rx_sample_rate_get,
  2674. tdm_rx_sample_rate_put),
  2675. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2676. tdm_tx_sample_rate_get,
  2677. tdm_tx_sample_rate_put),
  2678. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2679. tdm_rx_format_get,
  2680. tdm_rx_format_put),
  2681. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2682. tdm_tx_format_get,
  2683. tdm_tx_format_put),
  2684. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2685. tdm_rx_ch_get,
  2686. tdm_rx_ch_put),
  2687. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2688. tdm_tx_ch_get,
  2689. tdm_tx_ch_put),
  2690. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2691. tdm_rx_sample_rate_get,
  2692. tdm_rx_sample_rate_put),
  2693. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2694. tdm_tx_sample_rate_get,
  2695. tdm_tx_sample_rate_put),
  2696. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2697. tdm_rx_format_get,
  2698. tdm_rx_format_put),
  2699. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2700. tdm_tx_format_get,
  2701. tdm_tx_format_put),
  2702. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2703. tdm_rx_ch_get,
  2704. tdm_rx_ch_put),
  2705. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2706. tdm_tx_ch_get,
  2707. tdm_tx_ch_put),
  2708. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2709. tdm_rx_sample_rate_get,
  2710. tdm_rx_sample_rate_put),
  2711. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2712. tdm_tx_sample_rate_get,
  2713. tdm_tx_sample_rate_put),
  2714. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  2715. tdm_rx_format_get,
  2716. tdm_rx_format_put),
  2717. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  2718. tdm_tx_format_get,
  2719. tdm_tx_format_put),
  2720. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  2721. tdm_rx_ch_get,
  2722. tdm_rx_ch_put),
  2723. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  2724. tdm_tx_ch_get,
  2725. tdm_tx_ch_put),
  2726. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2727. tdm_rx_sample_rate_get,
  2728. tdm_rx_sample_rate_put),
  2729. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2730. tdm_tx_sample_rate_get,
  2731. tdm_tx_sample_rate_put),
  2732. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  2733. tdm_rx_format_get,
  2734. tdm_rx_format_put),
  2735. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  2736. tdm_tx_format_get,
  2737. tdm_tx_format_put),
  2738. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  2739. tdm_rx_ch_get,
  2740. tdm_rx_ch_put),
  2741. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  2742. tdm_tx_ch_get,
  2743. tdm_tx_ch_put),
  2744. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2745. aux_pcm_rx_sample_rate_get,
  2746. aux_pcm_rx_sample_rate_put),
  2747. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2748. aux_pcm_rx_sample_rate_get,
  2749. aux_pcm_rx_sample_rate_put),
  2750. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2751. aux_pcm_rx_sample_rate_get,
  2752. aux_pcm_rx_sample_rate_put),
  2753. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  2754. aux_pcm_rx_sample_rate_get,
  2755. aux_pcm_rx_sample_rate_put),
  2756. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  2757. aux_pcm_rx_sample_rate_get,
  2758. aux_pcm_rx_sample_rate_put),
  2759. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2760. aux_pcm_tx_sample_rate_get,
  2761. aux_pcm_tx_sample_rate_put),
  2762. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2763. aux_pcm_tx_sample_rate_get,
  2764. aux_pcm_tx_sample_rate_put),
  2765. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2766. aux_pcm_tx_sample_rate_get,
  2767. aux_pcm_tx_sample_rate_put),
  2768. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  2769. aux_pcm_tx_sample_rate_get,
  2770. aux_pcm_tx_sample_rate_put),
  2771. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  2772. aux_pcm_tx_sample_rate_get,
  2773. aux_pcm_tx_sample_rate_put),
  2774. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2775. mi2s_rx_sample_rate_get,
  2776. mi2s_rx_sample_rate_put),
  2777. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2778. mi2s_rx_sample_rate_get,
  2779. mi2s_rx_sample_rate_put),
  2780. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2781. mi2s_rx_sample_rate_get,
  2782. mi2s_rx_sample_rate_put),
  2783. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  2784. mi2s_rx_sample_rate_get,
  2785. mi2s_rx_sample_rate_put),
  2786. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  2787. mi2s_rx_sample_rate_get,
  2788. mi2s_rx_sample_rate_put),
  2789. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2790. mi2s_tx_sample_rate_get,
  2791. mi2s_tx_sample_rate_put),
  2792. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2793. mi2s_tx_sample_rate_get,
  2794. mi2s_tx_sample_rate_put),
  2795. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2796. mi2s_tx_sample_rate_get,
  2797. mi2s_tx_sample_rate_put),
  2798. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  2799. mi2s_tx_sample_rate_get,
  2800. mi2s_tx_sample_rate_put),
  2801. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  2802. mi2s_tx_sample_rate_get,
  2803. mi2s_tx_sample_rate_put),
  2804. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2805. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2806. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2807. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2808. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2809. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2810. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2811. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2812. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2813. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2814. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2815. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2816. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  2817. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2818. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  2819. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2820. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  2821. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2822. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  2823. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2824. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2825. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2826. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2827. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2828. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2829. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2830. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2831. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2832. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2833. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2834. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2835. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2836. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  2837. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2838. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  2839. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2840. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  2841. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2842. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  2843. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2844. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2845. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2846. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2847. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2848. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2849. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2850. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2851. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2852. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2853. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2854. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2855. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2856. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2857. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2858. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2859. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2860. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  2861. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2862. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  2863. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2864. SOC_SINGLE_MULTI_EXT("VAD CFG", SND_SOC_NOPM, 0, 1000, 0, 3, NULL,
  2865. msm_snd_vad_cfg_put),
  2866. };
  2867. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  2868. int enable, bool dapm)
  2869. {
  2870. int ret = 0;
  2871. if (!strcmp(dev_name(codec->dev), "tasha_codec")) {
  2872. ret = tasha_cdc_mclk_enable(codec, enable, dapm);
  2873. } else {
  2874. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  2875. __func__);
  2876. ret = -EINVAL;
  2877. }
  2878. return ret;
  2879. }
  2880. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  2881. int enable, bool dapm)
  2882. {
  2883. int ret = 0;
  2884. if (!strcmp(dev_name(codec->dev), "tasha_codec")) {
  2885. ret = tasha_cdc_mclk_tx_enable(codec, enable, dapm);
  2886. } else {
  2887. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  2888. __func__);
  2889. ret = -EINVAL;
  2890. }
  2891. return ret;
  2892. }
  2893. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  2894. struct snd_kcontrol *kcontrol, int event)
  2895. {
  2896. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2897. pr_debug("%s: event = %d\n", __func__, event);
  2898. switch (event) {
  2899. case SND_SOC_DAPM_PRE_PMU:
  2900. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  2901. case SND_SOC_DAPM_POST_PMD:
  2902. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  2903. }
  2904. return 0;
  2905. }
  2906. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  2907. struct snd_kcontrol *kcontrol, int event)
  2908. {
  2909. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2910. pr_debug("%s: event = %d\n", __func__, event);
  2911. switch (event) {
  2912. case SND_SOC_DAPM_PRE_PMU:
  2913. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  2914. case SND_SOC_DAPM_POST_PMD:
  2915. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  2916. }
  2917. return 0;
  2918. }
  2919. static const struct snd_soc_dapm_widget msm_dapm_widgets[] = {
  2920. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  2921. msm_mclk_event,
  2922. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2923. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  2924. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2925. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  2926. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  2927. };
  2928. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  2929. struct snd_kcontrol *kcontrol, int event)
  2930. {
  2931. struct msm_asoc_mach_data *pdata = NULL;
  2932. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2933. int ret = 0;
  2934. uint32_t dmic_idx;
  2935. int *dmic_gpio_cnt;
  2936. struct device_node *dmic_gpio;
  2937. char *wname;
  2938. wname = strpbrk(w->name, "01234567");
  2939. if (!wname) {
  2940. dev_err(codec->dev, "%s: widget not found\n", __func__);
  2941. return -EINVAL;
  2942. }
  2943. ret = kstrtouint(wname, 10, &dmic_idx);
  2944. if (ret < 0) {
  2945. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  2946. __func__);
  2947. return -EINVAL;
  2948. }
  2949. pdata = snd_soc_card_get_drvdata(codec->component.card);
  2950. switch (dmic_idx) {
  2951. case 0:
  2952. case 1:
  2953. dmic_gpio_cnt = &pdata->dmic_01_gpio_cnt;
  2954. dmic_gpio = pdata->dmic_01_gpio_p;
  2955. break;
  2956. case 2:
  2957. case 3:
  2958. dmic_gpio_cnt = &pdata->dmic_23_gpio_cnt;
  2959. dmic_gpio = pdata->dmic_23_gpio_p;
  2960. break;
  2961. case 4:
  2962. case 5:
  2963. dmic_gpio_cnt = &pdata->dmic_45_gpio_cnt;
  2964. dmic_gpio = pdata->dmic_45_gpio_p;
  2965. break;
  2966. case 6:
  2967. case 7:
  2968. dmic_gpio_cnt = &pdata->dmic_67_gpio_cnt;
  2969. dmic_gpio = pdata->dmic_67_gpio_p;
  2970. break;
  2971. default:
  2972. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  2973. __func__);
  2974. return -EINVAL;
  2975. }
  2976. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  2977. __func__, event, dmic_idx, *dmic_gpio_cnt);
  2978. switch (event) {
  2979. case SND_SOC_DAPM_PRE_PMU:
  2980. (*dmic_gpio_cnt)++;
  2981. if (*dmic_gpio_cnt == 1) {
  2982. ret = msm_cdc_pinctrl_select_active_state(
  2983. dmic_gpio);
  2984. if (ret < 0) {
  2985. dev_err(codec->dev, "%s: gpio set cannot be activated %sd\n",
  2986. __func__, "dmic_gpio");
  2987. return ret;
  2988. }
  2989. }
  2990. break;
  2991. case SND_SOC_DAPM_POST_PMD:
  2992. (*dmic_gpio_cnt)--;
  2993. if (*dmic_gpio_cnt == 0) {
  2994. ret = msm_cdc_pinctrl_select_sleep_state(
  2995. dmic_gpio);
  2996. if (ret < 0) {
  2997. dev_err(codec->dev, "%s: gpio set cannot be de-activated %sd\n",
  2998. __func__, "dmic_gpio");
  2999. return ret;
  3000. }
  3001. }
  3002. break;
  3003. default:
  3004. dev_err(codec->dev, "%s: invalid DAPM event %d\n",
  3005. __func__, event);
  3006. return -EINVAL;
  3007. }
  3008. return 0;
  3009. }
  3010. static const struct snd_soc_dapm_widget msm_va_dapm_widgets[] = {
  3011. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3012. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3013. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3014. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3015. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3016. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3017. SND_SOC_DAPM_MIC("Digital Mic6", msm_dmic_event),
  3018. SND_SOC_DAPM_MIC("Digital Mic7", msm_dmic_event),
  3019. };
  3020. static const struct snd_soc_dapm_widget msm_wsa_dapm_widgets[] = {
  3021. };
  3022. static inline int param_is_mask(int p)
  3023. {
  3024. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3025. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3026. }
  3027. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3028. int n)
  3029. {
  3030. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3031. }
  3032. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3033. unsigned int bit)
  3034. {
  3035. if (bit >= SNDRV_MASK_MAX)
  3036. return;
  3037. if (param_is_mask(n)) {
  3038. struct snd_mask *m = param_to_mask(p, n);
  3039. m->bits[0] = 0;
  3040. m->bits[1] = 0;
  3041. m->bits[bit >> 5] |= (1 << (bit & 31));
  3042. }
  3043. }
  3044. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3045. {
  3046. int ch_id = 0;
  3047. switch (be_id) {
  3048. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3049. ch_id = SLIM_RX_0;
  3050. break;
  3051. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3052. ch_id = SLIM_RX_1;
  3053. break;
  3054. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3055. ch_id = SLIM_RX_2;
  3056. break;
  3057. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3058. ch_id = SLIM_RX_3;
  3059. break;
  3060. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3061. ch_id = SLIM_RX_4;
  3062. break;
  3063. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3064. ch_id = SLIM_RX_6;
  3065. break;
  3066. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3067. ch_id = SLIM_TX_0;
  3068. break;
  3069. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3070. ch_id = SLIM_TX_3;
  3071. break;
  3072. default:
  3073. ch_id = SLIM_RX_0;
  3074. break;
  3075. }
  3076. return ch_id;
  3077. }
  3078. static int msm_vad_get_portid_from_beid(int32_t be_id, int *port_id)
  3079. {
  3080. *port_id = 0xFFFF;
  3081. switch (be_id) {
  3082. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3083. *port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
  3084. break;
  3085. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3086. *port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  3087. break;
  3088. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3089. *port_id = AFE_PORT_ID_QUINARY_TDM_TX;
  3090. break;
  3091. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3092. *port_id = AFE_PORT_ID_QUINARY_PCM_TX;
  3093. break;
  3094. default:
  3095. return -EINVAL;
  3096. }
  3097. return 0;
  3098. }
  3099. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3100. {
  3101. int idx = 0;
  3102. switch (be_id) {
  3103. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3104. idx = WSA_CDC_DMA_RX_0;
  3105. break;
  3106. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3107. idx = WSA_CDC_DMA_TX_0;
  3108. break;
  3109. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3110. idx = WSA_CDC_DMA_RX_1;
  3111. break;
  3112. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3113. idx = WSA_CDC_DMA_TX_1;
  3114. break;
  3115. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3116. idx = WSA_CDC_DMA_TX_2;
  3117. break;
  3118. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3119. idx = VA_CDC_DMA_TX_0;
  3120. break;
  3121. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3122. idx = VA_CDC_DMA_TX_1;
  3123. break;
  3124. default:
  3125. idx = VA_CDC_DMA_TX_0;
  3126. break;
  3127. }
  3128. return idx;
  3129. }
  3130. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3131. struct snd_pcm_hw_params *params)
  3132. {
  3133. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3134. struct snd_interval *rate = hw_param_interval(params,
  3135. SNDRV_PCM_HW_PARAM_RATE);
  3136. struct snd_interval *channels = hw_param_interval(params,
  3137. SNDRV_PCM_HW_PARAM_CHANNELS);
  3138. int rc = 0;
  3139. int idx;
  3140. void *config = NULL;
  3141. struct snd_soc_codec *codec = NULL;
  3142. pr_debug("%s: format = %d, rate = %d\n",
  3143. __func__, params_format(params), params_rate(params));
  3144. switch (dai_link->id) {
  3145. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3146. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3147. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3148. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3149. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3150. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3151. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3152. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3153. slim_rx_cfg[idx].bit_format);
  3154. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3155. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3156. break;
  3157. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3158. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3159. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3160. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3161. slim_tx_cfg[idx].bit_format);
  3162. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3163. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3164. break;
  3165. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3166. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3167. slim_tx_cfg[1].bit_format);
  3168. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3169. channels->min = channels->max = slim_tx_cfg[1].channels;
  3170. break;
  3171. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3172. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3173. SNDRV_PCM_FORMAT_S32_LE);
  3174. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3175. channels->min = channels->max = msm_vi_feed_tx_ch;
  3176. break;
  3177. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3178. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3179. slim_rx_cfg[5].bit_format);
  3180. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3181. channels->min = channels->max = slim_rx_cfg[5].channels;
  3182. break;
  3183. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3184. codec = rtd->codec;
  3185. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3186. channels->min = channels->max = 1;
  3187. config = msm_codec_fn.get_afe_config_fn(codec,
  3188. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3189. if (config) {
  3190. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3191. config, SLIMBUS_5_TX);
  3192. if (rc)
  3193. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3194. __func__, rc);
  3195. }
  3196. break;
  3197. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3198. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3199. slim_rx_cfg[SLIM_RX_7].bit_format);
  3200. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3201. channels->min = channels->max =
  3202. slim_rx_cfg[SLIM_RX_7].channels;
  3203. break;
  3204. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3205. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3206. channels->min = channels->max =
  3207. slim_tx_cfg[SLIM_TX_7].channels;
  3208. break;
  3209. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3210. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3211. channels->min = channels->max =
  3212. slim_tx_cfg[SLIM_TX_8].channels;
  3213. break;
  3214. case MSM_BACKEND_DAI_USB_RX:
  3215. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3216. usb_rx_cfg.bit_format);
  3217. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3218. channels->min = channels->max = usb_rx_cfg.channels;
  3219. break;
  3220. case MSM_BACKEND_DAI_USB_TX:
  3221. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3222. usb_tx_cfg.bit_format);
  3223. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3224. channels->min = channels->max = usb_tx_cfg.channels;
  3225. break;
  3226. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3227. channels->min = channels->max = proxy_rx_cfg.channels;
  3228. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3229. break;
  3230. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3231. channels->min = channels->max =
  3232. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3233. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3234. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3235. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3236. break;
  3237. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3238. channels->min = channels->max =
  3239. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3240. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3241. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3242. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3243. break;
  3244. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3245. channels->min = channels->max =
  3246. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3247. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3248. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3249. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3250. break;
  3251. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3252. channels->min = channels->max =
  3253. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3254. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3255. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3256. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3257. break;
  3258. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3259. channels->min = channels->max =
  3260. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3261. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3262. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3263. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3264. break;
  3265. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3266. channels->min = channels->max =
  3267. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3268. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3269. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3270. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3271. break;
  3272. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3273. channels->min = channels->max =
  3274. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3275. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3276. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3277. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3278. break;
  3279. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3280. channels->min = channels->max =
  3281. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3282. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3283. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3284. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3285. break;
  3286. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3287. channels->min = channels->max =
  3288. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3289. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3290. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3291. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3292. break;
  3293. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3294. channels->min = channels->max =
  3295. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3296. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3297. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3298. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3299. break;
  3300. case MSM_BACKEND_DAI_AUXPCM_RX:
  3301. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3302. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3303. rate->min = rate->max =
  3304. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3305. channels->min = channels->max =
  3306. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3307. break;
  3308. case MSM_BACKEND_DAI_AUXPCM_TX:
  3309. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3310. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3311. rate->min = rate->max =
  3312. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3313. channels->min = channels->max =
  3314. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3315. break;
  3316. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3317. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3318. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3319. rate->min = rate->max =
  3320. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3321. channels->min = channels->max =
  3322. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3323. break;
  3324. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3325. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3326. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3327. rate->min = rate->max =
  3328. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3329. channels->min = channels->max =
  3330. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3331. break;
  3332. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3333. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3334. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3335. rate->min = rate->max =
  3336. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3337. channels->min = channels->max =
  3338. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3339. break;
  3340. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3341. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3342. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3343. rate->min = rate->max =
  3344. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3345. channels->min = channels->max =
  3346. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3347. break;
  3348. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3349. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3350. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3351. rate->min = rate->max =
  3352. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3353. channels->min = channels->max =
  3354. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3355. break;
  3356. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3357. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3358. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3359. rate->min = rate->max =
  3360. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3361. channels->min = channels->max =
  3362. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3363. break;
  3364. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3365. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3366. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3367. rate->min = rate->max =
  3368. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3369. channels->min = channels->max =
  3370. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3371. break;
  3372. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3373. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3374. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3375. rate->min = rate->max =
  3376. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3377. channels->min = channels->max =
  3378. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3379. break;
  3380. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3381. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3382. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3383. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3384. channels->min = channels->max =
  3385. mi2s_rx_cfg[PRIM_MI2S].channels;
  3386. break;
  3387. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3388. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3389. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3390. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3391. channels->min = channels->max =
  3392. mi2s_tx_cfg[PRIM_MI2S].channels;
  3393. break;
  3394. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3395. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3396. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3397. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3398. channels->min = channels->max =
  3399. mi2s_rx_cfg[SEC_MI2S].channels;
  3400. break;
  3401. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3402. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3403. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3404. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3405. channels->min = channels->max =
  3406. mi2s_tx_cfg[SEC_MI2S].channels;
  3407. break;
  3408. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3409. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3410. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3411. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3412. channels->min = channels->max =
  3413. mi2s_rx_cfg[TERT_MI2S].channels;
  3414. break;
  3415. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3416. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3417. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3418. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3419. channels->min = channels->max =
  3420. mi2s_tx_cfg[TERT_MI2S].channels;
  3421. break;
  3422. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3423. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3424. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3425. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3426. channels->min = channels->max =
  3427. mi2s_rx_cfg[QUAT_MI2S].channels;
  3428. break;
  3429. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3430. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3431. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3432. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3433. channels->min = channels->max =
  3434. mi2s_tx_cfg[QUAT_MI2S].channels;
  3435. break;
  3436. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3437. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3438. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3439. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3440. channels->min = channels->max =
  3441. mi2s_rx_cfg[QUIN_MI2S].channels;
  3442. break;
  3443. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3444. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3445. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3446. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3447. channels->min = channels->max =
  3448. mi2s_tx_cfg[QUIN_MI2S].channels;
  3449. break;
  3450. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3451. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3452. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3453. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3454. cdc_dma_rx_cfg[idx].bit_format);
  3455. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3456. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3457. break;
  3458. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3459. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3460. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3461. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3462. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3463. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3464. cdc_dma_tx_cfg[idx].bit_format);
  3465. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3466. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3467. break;
  3468. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3469. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3470. SNDRV_PCM_FORMAT_S32_LE);
  3471. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3472. channels->min = channels->max = msm_vi_feed_tx_ch;
  3473. break;
  3474. default:
  3475. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3476. break;
  3477. }
  3478. return rc;
  3479. }
  3480. static int msm_afe_set_config(struct snd_soc_codec *codec)
  3481. {
  3482. int ret = 0;
  3483. void *config_data = NULL;
  3484. if (!msm_codec_fn.get_afe_config_fn) {
  3485. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  3486. __func__);
  3487. return -EINVAL;
  3488. }
  3489. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3490. AFE_CDC_REGISTERS_CONFIG);
  3491. if (config_data) {
  3492. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  3493. if (ret) {
  3494. dev_err(codec->dev,
  3495. "%s: Failed to set codec registers config %d\n",
  3496. __func__, ret);
  3497. return ret;
  3498. }
  3499. }
  3500. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3501. AFE_CDC_REGISTER_PAGE_CONFIG);
  3502. if (config_data) {
  3503. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  3504. 0);
  3505. if (ret)
  3506. dev_err(codec->dev,
  3507. "%s: Failed to set cdc register page config\n",
  3508. __func__);
  3509. }
  3510. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3511. AFE_SLIMBUS_SLAVE_CONFIG);
  3512. if (config_data) {
  3513. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  3514. if (ret) {
  3515. dev_err(codec->dev,
  3516. "%s: Failed to set slimbus slave config %d\n",
  3517. __func__, ret);
  3518. return ret;
  3519. }
  3520. }
  3521. return 0;
  3522. }
  3523. static void msm_afe_clear_config(void)
  3524. {
  3525. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  3526. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  3527. }
  3528. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  3529. struct snd_card *card)
  3530. {
  3531. int ret = 0;
  3532. unsigned long timeout;
  3533. int adsp_ready = 0;
  3534. bool snd_card_online = 0;
  3535. timeout = jiffies +
  3536. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  3537. do {
  3538. if (!snd_card_online) {
  3539. snd_card_online = snd_card_is_online_state(card);
  3540. pr_debug("%s: Sound card is %s\n", __func__,
  3541. snd_card_online ? "Online" : "Offline");
  3542. }
  3543. if (!adsp_ready) {
  3544. adsp_ready = q6core_is_adsp_ready();
  3545. pr_debug("%s: ADSP Audio is %s\n", __func__,
  3546. adsp_ready ? "ready" : "not ready");
  3547. }
  3548. if (snd_card_online && adsp_ready)
  3549. break;
  3550. /*
  3551. * Sound card/ADSP will be coming up after subsystem restart and
  3552. * it might not be fully up when the control reaches
  3553. * here. So, wait for 50msec before checking ADSP state
  3554. */
  3555. msleep(50);
  3556. } while (time_after(timeout, jiffies));
  3557. if (!snd_card_online || !adsp_ready) {
  3558. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  3559. __func__,
  3560. snd_card_online ? "Online" : "Offline",
  3561. adsp_ready ? "ready" : "not ready");
  3562. ret = -ETIMEDOUT;
  3563. goto err;
  3564. }
  3565. ret = msm_afe_set_config(codec);
  3566. if (ret)
  3567. pr_err("%s: Failed to set AFE config. err %d\n",
  3568. __func__, ret);
  3569. return 0;
  3570. err:
  3571. return ret;
  3572. }
  3573. static int qcs405_notifier_service_cb(struct notifier_block *this,
  3574. unsigned long opcode, void *ptr)
  3575. {
  3576. int ret;
  3577. struct snd_soc_card *card = NULL;
  3578. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  3579. struct snd_soc_pcm_runtime *rtd;
  3580. struct snd_soc_codec *codec;
  3581. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  3582. switch (opcode) {
  3583. case AUDIO_NOTIFIER_SERVICE_DOWN:
  3584. /*
  3585. * Use flag to ignore initial boot notifications
  3586. * On initial boot msm_adsp_power_up_config is
  3587. * called on init. There is no need to clear
  3588. * and set the config again on initial boot.
  3589. */
  3590. if (is_initial_boot)
  3591. break;
  3592. msm_afe_clear_config();
  3593. break;
  3594. case AUDIO_NOTIFIER_SERVICE_UP:
  3595. if (is_initial_boot) {
  3596. is_initial_boot = false;
  3597. break;
  3598. }
  3599. if (!spdev)
  3600. return -EINVAL;
  3601. card = platform_get_drvdata(spdev);
  3602. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  3603. if (!rtd) {
  3604. dev_err(card->dev,
  3605. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  3606. __func__, be_dl_name);
  3607. ret = -EINVAL;
  3608. goto err;
  3609. }
  3610. codec = rtd->codec;
  3611. ret = msm_adsp_power_up_config(codec, card->snd_card);
  3612. if (ret < 0) {
  3613. dev_err(card->dev,
  3614. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  3615. __func__, ret);
  3616. goto err;
  3617. }
  3618. break;
  3619. default:
  3620. break;
  3621. }
  3622. err:
  3623. return NOTIFY_OK;
  3624. }
  3625. static struct notifier_block service_nb = {
  3626. .notifier_call = qcs405_notifier_service_cb,
  3627. .priority = -INT_MAX,
  3628. };
  3629. static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3630. {
  3631. int ret = 0;
  3632. void *config_data;
  3633. struct snd_soc_codec *codec = rtd->codec;
  3634. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3635. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3636. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3637. struct snd_card *card;
  3638. struct msm_asoc_mach_data *pdata =
  3639. snd_soc_card_get_drvdata(rtd->card);
  3640. /*
  3641. * Codec SLIMBUS configuration
  3642. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  3643. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  3644. * TX14, TX15, TX16
  3645. */
  3646. unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
  3647. 151, 152, 153, 154, 155, 156};
  3648. unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
  3649. 134, 135, 136, 137, 138, 139,
  3650. 140, 141, 142, 143};
  3651. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  3652. rtd->pmdown_time = 0;
  3653. ret = snd_soc_add_codec_controls(codec, msm_snd_sb_controls,
  3654. ARRAY_SIZE(msm_snd_sb_controls));
  3655. if (ret < 0) {
  3656. pr_err("%s: add_codec_controls failed, err %d\n",
  3657. __func__, ret);
  3658. return ret;
  3659. }
  3660. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
  3661. ARRAY_SIZE(msm_dapm_widgets));
  3662. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  3663. ARRAY_SIZE(wcd_audio_paths));
  3664. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  3665. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  3666. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3667. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3668. snd_soc_dapm_sync(dapm);
  3669. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3670. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3671. msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
  3672. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  3673. if (ret) {
  3674. dev_err(codec->dev, "%s: Failed to set AFE config %d\n",
  3675. __func__, ret);
  3676. goto err;
  3677. }
  3678. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3679. AFE_AANC_VERSION);
  3680. if (config_data) {
  3681. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  3682. if (ret) {
  3683. dev_err(codec->dev, "%s: Failed to set aanc version %d\n",
  3684. __func__, ret);
  3685. goto err;
  3686. }
  3687. }
  3688. card = rtd->card->snd_card;
  3689. if (!pdata->codec_root)
  3690. pdata->codec_root = snd_info_create_subdir(card->module,
  3691. "codecs", card->proc_root);
  3692. if (!pdata->codec_root) {
  3693. dev_dbg(codec->dev, "%s: Cannot create codecs module entry\n",
  3694. __func__);
  3695. ret = 0;
  3696. goto err;
  3697. }
  3698. tasha_codec_info_create_codec_entry(pdata->codec_root, codec);
  3699. codec_reg_done = true;
  3700. return 0;
  3701. err:
  3702. return ret;
  3703. }
  3704. static int msm_va_cdc_dma_init(struct snd_soc_pcm_runtime *rtd)
  3705. {
  3706. int ret = 0;
  3707. struct snd_soc_codec *codec = rtd->codec;
  3708. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3709. struct snd_card *card;
  3710. struct msm_asoc_mach_data *pdata =
  3711. snd_soc_card_get_drvdata(rtd->card);
  3712. ret = snd_soc_add_codec_controls(codec, msm_snd_va_controls,
  3713. ARRAY_SIZE(msm_snd_va_controls));
  3714. if (ret < 0) {
  3715. dev_err(codec->dev, "%s: add_codec_controls for va failed, err %d\n",
  3716. __func__, ret);
  3717. return ret;
  3718. }
  3719. snd_soc_dapm_new_controls(dapm, msm_va_dapm_widgets,
  3720. ARRAY_SIZE(msm_va_dapm_widgets));
  3721. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3722. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3723. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3724. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3725. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  3726. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  3727. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
  3728. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
  3729. snd_soc_dapm_sync(dapm);
  3730. card = rtd->card->snd_card;
  3731. if (!pdata->codec_root)
  3732. pdata->codec_root = snd_info_create_subdir(card->module,
  3733. "codecs", card->proc_root);
  3734. if (!pdata->codec_root) {
  3735. dev_dbg(codec->dev, "%s: Cannot create codecs module entry\n",
  3736. __func__);
  3737. ret = 0;
  3738. goto done;
  3739. }
  3740. bolero_info_create_codec_entry(pdata->codec_root, codec);
  3741. done:
  3742. return ret;
  3743. }
  3744. static int msm_wsa_cdc_dma_init(struct snd_soc_pcm_runtime *rtd)
  3745. {
  3746. int ret = 0;
  3747. struct snd_soc_codec *codec = rtd->codec;
  3748. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3749. struct snd_card *card;
  3750. struct msm_asoc_mach_data *pdata =
  3751. snd_soc_card_get_drvdata(rtd->card);
  3752. ret = snd_soc_add_codec_controls(codec, msm_snd_wsa_controls,
  3753. ARRAY_SIZE(msm_snd_wsa_controls));
  3754. if (ret < 0) {
  3755. dev_err(codec->dev, "%s: add_codec_controls for wsa failed, err %d\n",
  3756. __func__, ret);
  3757. return ret;
  3758. }
  3759. snd_soc_dapm_new_controls(dapm, msm_wsa_dapm_widgets,
  3760. ARRAY_SIZE(msm_wsa_dapm_widgets));
  3761. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3762. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3763. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3764. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3765. snd_soc_dapm_sync(dapm);
  3766. card = rtd->card->snd_card;
  3767. if (!pdata->codec_root)
  3768. pdata->codec_root = snd_info_create_subdir(card->module,
  3769. "codecs", card->proc_root);
  3770. if (!pdata->codec_root) {
  3771. dev_dbg(codec->dev, "%s: Cannot create codecs module entry\n",
  3772. __func__);
  3773. ret = 0;
  3774. goto done;
  3775. }
  3776. bolero_info_create_codec_entry(pdata->codec_root, codec);
  3777. done:
  3778. return ret;
  3779. }
  3780. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3781. {
  3782. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3783. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  3784. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3785. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3786. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3787. }
  3788. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  3789. struct snd_pcm_hw_params *params)
  3790. {
  3791. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3792. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3793. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3794. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3795. int ret = 0;
  3796. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  3797. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3798. u32 user_set_tx_ch = 0;
  3799. u32 rx_ch_count;
  3800. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3801. ret = snd_soc_dai_get_channel_map(codec_dai,
  3802. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3803. if (ret < 0) {
  3804. pr_err("%s: failed to get codec chan map, err:%d\n",
  3805. __func__, ret);
  3806. goto err;
  3807. }
  3808. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  3809. pr_debug("%s: rx_5_ch=%d\n", __func__,
  3810. slim_rx_cfg[5].channels);
  3811. rx_ch_count = slim_rx_cfg[5].channels;
  3812. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  3813. pr_debug("%s: rx_2_ch=%d\n", __func__,
  3814. slim_rx_cfg[2].channels);
  3815. rx_ch_count = slim_rx_cfg[2].channels;
  3816. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  3817. pr_debug("%s: rx_6_ch=%d\n", __func__,
  3818. slim_rx_cfg[6].channels);
  3819. rx_ch_count = slim_rx_cfg[6].channels;
  3820. } else {
  3821. pr_debug("%s: rx_0_ch=%d\n", __func__,
  3822. slim_rx_cfg[0].channels);
  3823. rx_ch_count = slim_rx_cfg[0].channels;
  3824. }
  3825. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3826. rx_ch_count, rx_ch);
  3827. if (ret < 0) {
  3828. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3829. __func__, ret);
  3830. goto err;
  3831. }
  3832. } else {
  3833. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  3834. codec_dai->name, codec_dai->id, user_set_tx_ch);
  3835. ret = snd_soc_dai_get_channel_map(codec_dai,
  3836. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3837. if (ret < 0) {
  3838. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  3839. __func__, ret);
  3840. goto err;
  3841. }
  3842. /* For <codec>_tx1 case */
  3843. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  3844. user_set_tx_ch = slim_tx_cfg[0].channels;
  3845. /* For <codec>_tx3 case */
  3846. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  3847. user_set_tx_ch = slim_tx_cfg[1].channels;
  3848. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  3849. user_set_tx_ch = msm_vi_feed_tx_ch;
  3850. else
  3851. user_set_tx_ch = tx_ch_cnt;
  3852. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  3853. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  3854. tx_ch_cnt, dai_link->id);
  3855. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3856. user_set_tx_ch, tx_ch, 0, 0);
  3857. if (ret < 0)
  3858. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  3859. __func__, ret);
  3860. }
  3861. err:
  3862. return ret;
  3863. }
  3864. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3865. struct snd_pcm_hw_params *params)
  3866. {
  3867. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3868. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3869. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3870. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3871. int ret = 0;
  3872. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3873. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3874. u32 user_set_tx_ch = 0;
  3875. u32 user_set_rx_ch = 0;
  3876. u32 ch_id;
  3877. ret = snd_soc_dai_get_channel_map(codec_dai,
  3878. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3879. &rx_ch_cdc_dma);
  3880. if (ret < 0) {
  3881. pr_err("%s: failed to get codec chan map, err:%d\n",
  3882. __func__, ret);
  3883. goto err;
  3884. }
  3885. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3886. switch (dai_link->id) {
  3887. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3888. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3889. {
  3890. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3891. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3892. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3893. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3894. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3895. user_set_rx_ch, &rx_ch_cdc_dma);
  3896. if (ret < 0) {
  3897. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3898. __func__, ret);
  3899. goto err;
  3900. }
  3901. }
  3902. break;
  3903. }
  3904. } else {
  3905. switch (dai_link->id) {
  3906. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3907. {
  3908. user_set_tx_ch = msm_vi_feed_tx_ch;
  3909. }
  3910. break;
  3911. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3912. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3913. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3914. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3915. {
  3916. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3917. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3918. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3919. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3920. }
  3921. break;
  3922. }
  3923. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3924. &tx_ch_cdc_dma, 0, 0);
  3925. if (ret < 0) {
  3926. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3927. __func__, ret);
  3928. goto err;
  3929. }
  3930. }
  3931. err:
  3932. return ret;
  3933. }
  3934. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  3935. struct snd_pcm_hw_params *params)
  3936. {
  3937. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3938. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3939. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3940. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  3941. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  3942. unsigned int num_tx_ch = 0;
  3943. unsigned int num_rx_ch = 0;
  3944. int ret = 0;
  3945. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3946. num_rx_ch = params_channels(params);
  3947. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  3948. codec_dai->name, codec_dai->id, num_rx_ch);
  3949. ret = snd_soc_dai_get_channel_map(codec_dai,
  3950. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3951. if (ret < 0) {
  3952. pr_err("%s: failed to get codec chan map, err:%d\n",
  3953. __func__, ret);
  3954. goto err;
  3955. }
  3956. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3957. num_rx_ch, rx_ch);
  3958. if (ret < 0) {
  3959. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3960. __func__, ret);
  3961. goto err;
  3962. }
  3963. } else {
  3964. num_tx_ch = params_channels(params);
  3965. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  3966. codec_dai->name, codec_dai->id, num_tx_ch);
  3967. ret = snd_soc_dai_get_channel_map(codec_dai,
  3968. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3969. if (ret < 0) {
  3970. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  3971. __func__, ret);
  3972. goto err;
  3973. }
  3974. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3975. num_tx_ch, tx_ch, 0, 0);
  3976. if (ret < 0) {
  3977. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  3978. __func__, ret);
  3979. goto err;
  3980. }
  3981. }
  3982. err:
  3983. return ret;
  3984. }
  3985. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3986. struct snd_pcm_hw_params *params)
  3987. {
  3988. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3989. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3990. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3991. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3992. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3993. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3994. int ret;
  3995. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3996. codec_dai->name, codec_dai->id);
  3997. ret = snd_soc_dai_get_channel_map(codec_dai,
  3998. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3999. if (ret) {
  4000. dev_err(rtd->dev,
  4001. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4002. __func__, ret);
  4003. goto err;
  4004. }
  4005. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4006. __func__, tx_ch_cnt, dai_link->id);
  4007. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4008. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4009. if (ret)
  4010. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4011. __func__, ret);
  4012. err:
  4013. return ret;
  4014. }
  4015. static int msm_get_port_id(int be_id)
  4016. {
  4017. int afe_port_id;
  4018. switch (be_id) {
  4019. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4020. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4021. break;
  4022. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4023. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4024. break;
  4025. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4026. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4027. break;
  4028. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4029. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4030. break;
  4031. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4032. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4033. break;
  4034. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4035. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4036. break;
  4037. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4038. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4039. break;
  4040. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4041. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4042. break;
  4043. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4044. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4045. break;
  4046. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4047. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4048. break;
  4049. default:
  4050. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4051. afe_port_id = -EINVAL;
  4052. }
  4053. return afe_port_id;
  4054. }
  4055. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4056. {
  4057. u32 bit_per_sample;
  4058. switch (bit_format) {
  4059. case SNDRV_PCM_FORMAT_S32_LE:
  4060. case SNDRV_PCM_FORMAT_S24_3LE:
  4061. case SNDRV_PCM_FORMAT_S24_LE:
  4062. bit_per_sample = 32;
  4063. break;
  4064. case SNDRV_PCM_FORMAT_S16_LE:
  4065. default:
  4066. bit_per_sample = 16;
  4067. break;
  4068. }
  4069. return bit_per_sample;
  4070. }
  4071. static void update_mi2s_clk_val(int dai_id, int stream)
  4072. {
  4073. u32 bit_per_sample;
  4074. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4075. bit_per_sample =
  4076. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4077. mi2s_clk[dai_id].clk_freq_in_hz =
  4078. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4079. } else {
  4080. bit_per_sample =
  4081. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4082. mi2s_clk[dai_id].clk_freq_in_hz =
  4083. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4084. }
  4085. }
  4086. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4087. {
  4088. int ret = 0;
  4089. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4090. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4091. int port_id = 0;
  4092. int index = cpu_dai->id;
  4093. port_id = msm_get_port_id(rtd->dai_link->id);
  4094. if (port_id < 0) {
  4095. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4096. ret = port_id;
  4097. goto err;
  4098. }
  4099. if (enable) {
  4100. update_mi2s_clk_val(index, substream->stream);
  4101. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4102. mi2s_clk[index].clk_freq_in_hz);
  4103. }
  4104. mi2s_clk[index].enable = enable;
  4105. ret = afe_set_lpass_clock_v2(port_id,
  4106. &mi2s_clk[index]);
  4107. if (ret < 0) {
  4108. dev_err(rtd->card->dev,
  4109. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4110. __func__, port_id, ret);
  4111. goto err;
  4112. }
  4113. err:
  4114. return ret;
  4115. }
  4116. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4117. enum pinctrl_pin_state new_state)
  4118. {
  4119. int ret = 0;
  4120. int curr_state = 0;
  4121. if (pinctrl_info == NULL) {
  4122. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4123. ret = -EINVAL;
  4124. goto err;
  4125. }
  4126. if (pinctrl_info->pinctrl == NULL) {
  4127. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4128. ret = -EINVAL;
  4129. goto err;
  4130. }
  4131. curr_state = pinctrl_info->curr_state;
  4132. pinctrl_info->curr_state = new_state;
  4133. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4134. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4135. if (curr_state == pinctrl_info->curr_state) {
  4136. pr_debug("%s: Already in same state\n", __func__);
  4137. goto err;
  4138. }
  4139. if (curr_state != STATE_DISABLE &&
  4140. pinctrl_info->curr_state != STATE_DISABLE) {
  4141. pr_debug("%s: state already active cannot switch\n", __func__);
  4142. ret = -EIO;
  4143. goto err;
  4144. }
  4145. switch (pinctrl_info->curr_state) {
  4146. case STATE_MI2S_ACTIVE:
  4147. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4148. pinctrl_info->mi2s_active);
  4149. if (ret) {
  4150. pr_err("%s: MI2S state select failed with %d\n",
  4151. __func__, ret);
  4152. ret = -EIO;
  4153. goto err;
  4154. }
  4155. break;
  4156. case STATE_TDM_ACTIVE:
  4157. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4158. pinctrl_info->tdm_active);
  4159. if (ret) {
  4160. pr_err("%s: TDM state select failed with %d\n",
  4161. __func__, ret);
  4162. ret = -EIO;
  4163. goto err;
  4164. }
  4165. break;
  4166. case STATE_DISABLE:
  4167. if (curr_state == STATE_MI2S_ACTIVE) {
  4168. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4169. pinctrl_info->mi2s_disable);
  4170. } else {
  4171. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4172. pinctrl_info->tdm_disable);
  4173. }
  4174. if (ret) {
  4175. pr_err("%s: state disable failed with %d\n",
  4176. __func__, ret);
  4177. ret = -EIO;
  4178. goto err;
  4179. }
  4180. break;
  4181. default:
  4182. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4183. return -EINVAL;
  4184. }
  4185. err:
  4186. return ret;
  4187. }
  4188. static void msm_release_pinctrl(struct platform_device *pdev)
  4189. {
  4190. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4191. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4192. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4193. if (pinctrl_info->pinctrl) {
  4194. devm_pinctrl_put(pinctrl_info->pinctrl);
  4195. pinctrl_info->pinctrl = NULL;
  4196. }
  4197. }
  4198. static int msm_get_pinctrl(struct platform_device *pdev)
  4199. {
  4200. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4201. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4202. struct msm_pinctrl_info *pinctrl_info = NULL;
  4203. struct pinctrl *pinctrl;
  4204. int ret;
  4205. pinctrl_info = &pdata->pinctrl_info;
  4206. if (pinctrl_info == NULL) {
  4207. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4208. return -EINVAL;
  4209. }
  4210. pinctrl = devm_pinctrl_get(&pdev->dev);
  4211. if (IS_ERR_OR_NULL(pinctrl)) {
  4212. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4213. return -EINVAL;
  4214. }
  4215. pinctrl_info->pinctrl = pinctrl;
  4216. /* get all the states handles from Device Tree */
  4217. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4218. "quat-mi2s-sleep");
  4219. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4220. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4221. goto err;
  4222. }
  4223. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4224. "quat-mi2s-active");
  4225. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4226. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4227. goto err;
  4228. }
  4229. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4230. "quat-tdm-sleep");
  4231. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4232. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4233. goto err;
  4234. }
  4235. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4236. "quat-tdm-active");
  4237. if (IS_ERR(pinctrl_info->tdm_active)) {
  4238. pr_err("%s: could not get tdm_active pinstate\n",
  4239. __func__);
  4240. goto err;
  4241. }
  4242. /* Reset the TLMM pins to a default state */
  4243. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4244. pinctrl_info->mi2s_disable);
  4245. if (ret != 0) {
  4246. pr_err("%s: Disable TLMM pins failed with %d\n",
  4247. __func__, ret);
  4248. ret = -EIO;
  4249. goto err;
  4250. }
  4251. pinctrl_info->curr_state = STATE_DISABLE;
  4252. return 0;
  4253. err:
  4254. devm_pinctrl_put(pinctrl);
  4255. pinctrl_info->pinctrl = NULL;
  4256. return -EINVAL;
  4257. }
  4258. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4259. struct snd_pcm_hw_params *params)
  4260. {
  4261. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4262. struct snd_interval *rate = hw_param_interval(params,
  4263. SNDRV_PCM_HW_PARAM_RATE);
  4264. struct snd_interval *channels = hw_param_interval(params,
  4265. SNDRV_PCM_HW_PARAM_CHANNELS);
  4266. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4267. channels->min = channels->max =
  4268. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4269. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4270. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4271. rate->min = rate->max =
  4272. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4273. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4274. channels->min = channels->max =
  4275. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4276. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4277. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4278. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4279. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4280. channels->min = channels->max =
  4281. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4282. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4283. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4284. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4285. } else {
  4286. pr_err("%s: dai id 0x%x not supported\n",
  4287. __func__, cpu_dai->id);
  4288. return -EINVAL;
  4289. }
  4290. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4291. __func__, cpu_dai->id, channels->max, rate->max,
  4292. params_format(params));
  4293. return 0;
  4294. }
  4295. static int qcs405_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4296. struct snd_pcm_hw_params *params)
  4297. {
  4298. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4299. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4300. int ret = 0;
  4301. int slot_width = 32;
  4302. int channels, slots;
  4303. unsigned int slot_mask, rate, clk_freq;
  4304. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4305. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4306. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4307. switch (cpu_dai->id) {
  4308. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4309. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4310. break;
  4311. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4312. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4313. break;
  4314. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4315. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4316. break;
  4317. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4318. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4319. break;
  4320. case AFE_PORT_ID_QUINARY_TDM_RX:
  4321. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4322. break;
  4323. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4324. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4325. break;
  4326. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4327. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4328. break;
  4329. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4330. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4331. break;
  4332. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4333. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4334. break;
  4335. case AFE_PORT_ID_QUINARY_TDM_TX:
  4336. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4337. break;
  4338. default:
  4339. pr_err("%s: dai id 0x%x not supported\n",
  4340. __func__, cpu_dai->id);
  4341. return -EINVAL;
  4342. }
  4343. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4344. /*2 slot config - bits 0 and 1 set for the first two slots */
  4345. slot_mask = 0x0000FFFF >> (16-slots);
  4346. channels = slots;
  4347. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4348. __func__, slot_width, slots);
  4349. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4350. slots, slot_width);
  4351. if (ret < 0) {
  4352. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4353. __func__, ret);
  4354. goto end;
  4355. }
  4356. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4357. 0, NULL, channels, slot_offset);
  4358. if (ret < 0) {
  4359. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4360. __func__, ret);
  4361. goto end;
  4362. }
  4363. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4364. /*2 slot config - bits 0 and 1 set for the first two slots */
  4365. slot_mask = 0x0000FFFF >> (16-slots);
  4366. channels = slots;
  4367. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4368. __func__, slot_width, slots);
  4369. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4370. slots, slot_width);
  4371. if (ret < 0) {
  4372. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4373. __func__, ret);
  4374. goto end;
  4375. }
  4376. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4377. channels, slot_offset, 0, NULL);
  4378. if (ret < 0) {
  4379. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4380. __func__, ret);
  4381. goto end;
  4382. }
  4383. } else {
  4384. ret = -EINVAL;
  4385. pr_err("%s: invalid use case, err:%d\n",
  4386. __func__, ret);
  4387. goto end;
  4388. }
  4389. rate = params_rate(params);
  4390. clk_freq = rate * slot_width * slots;
  4391. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4392. if (ret < 0)
  4393. pr_err("%s: failed to set tdm clk, err:%d\n",
  4394. __func__, ret);
  4395. end:
  4396. return ret;
  4397. }
  4398. static int qcs405_tdm_snd_startup(struct snd_pcm_substream *substream)
  4399. {
  4400. int ret = 0;
  4401. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4402. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4403. struct snd_soc_card *card = rtd->card;
  4404. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4405. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4406. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4407. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4408. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4409. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  4410. if (ret)
  4411. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4412. __func__, ret);
  4413. }
  4414. return ret;
  4415. }
  4416. static void qcs405_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  4417. {
  4418. int ret = 0;
  4419. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4420. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4421. struct snd_soc_card *card = rtd->card;
  4422. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4423. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4424. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4425. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4426. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4427. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  4428. if (ret)
  4429. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4430. __func__, ret);
  4431. }
  4432. }
  4433. static struct snd_soc_ops qcs405_tdm_be_ops = {
  4434. .hw_params = qcs405_tdm_snd_hw_params,
  4435. .startup = qcs405_tdm_snd_startup,
  4436. .shutdown = qcs405_tdm_snd_shutdown
  4437. };
  4438. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  4439. {
  4440. cpumask_t mask;
  4441. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  4442. pm_qos_remove_request(&substream->latency_pm_qos_req);
  4443. cpumask_clear(&mask);
  4444. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  4445. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  4446. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  4447. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  4448. pm_qos_add_request(&substream->latency_pm_qos_req,
  4449. PM_QOS_CPU_DMA_LATENCY,
  4450. MSM_LL_QOS_VALUE);
  4451. return 0;
  4452. }
  4453. static struct snd_soc_ops msm_fe_qos_ops = {
  4454. .prepare = msm_fe_qos_prepare,
  4455. };
  4456. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  4457. {
  4458. int ret = 0;
  4459. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4460. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4461. int index = cpu_dai->id;
  4462. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  4463. struct snd_soc_card *card = rtd->card;
  4464. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4465. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4466. int ret_pinctrl = 0;
  4467. dev_dbg(rtd->card->dev,
  4468. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  4469. __func__, substream->name, substream->stream,
  4470. cpu_dai->name, cpu_dai->id);
  4471. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  4472. ret = -EINVAL;
  4473. dev_err(rtd->card->dev,
  4474. "%s: CPU DAI id (%d) out of range\n",
  4475. __func__, cpu_dai->id);
  4476. goto err;
  4477. }
  4478. /*
  4479. * Mutex protection in case the same MI2S
  4480. * interface using for both TX and RX so
  4481. * that the same clock won't be enable twice.
  4482. */
  4483. mutex_lock(&mi2s_intf_conf[index].lock);
  4484. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  4485. /* Check if msm needs to provide the clock to the interface */
  4486. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  4487. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  4488. fmt = SND_SOC_DAIFMT_CBM_CFM;
  4489. }
  4490. ret = msm_mi2s_set_sclk(substream, true);
  4491. if (ret < 0) {
  4492. dev_err(rtd->card->dev,
  4493. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  4494. __func__, ret);
  4495. goto clean_up;
  4496. }
  4497. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  4498. if (ret < 0) {
  4499. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  4500. __func__, index, ret);
  4501. goto clk_off;
  4502. }
  4503. if (index == QUAT_MI2S) {
  4504. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  4505. STATE_MI2S_ACTIVE);
  4506. if (ret_pinctrl)
  4507. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  4508. __func__, ret_pinctrl);
  4509. }
  4510. }
  4511. clk_off:
  4512. if (ret < 0)
  4513. msm_mi2s_set_sclk(substream, false);
  4514. clean_up:
  4515. if (ret < 0)
  4516. mi2s_intf_conf[index].ref_cnt--;
  4517. mutex_unlock(&mi2s_intf_conf[index].lock);
  4518. err:
  4519. return ret;
  4520. }
  4521. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  4522. {
  4523. int ret;
  4524. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4525. int index = rtd->cpu_dai->id;
  4526. struct snd_soc_card *card = rtd->card;
  4527. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4528. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4529. int ret_pinctrl = 0;
  4530. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  4531. substream->name, substream->stream);
  4532. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  4533. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  4534. return;
  4535. }
  4536. mutex_lock(&mi2s_intf_conf[index].lock);
  4537. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  4538. ret = msm_mi2s_set_sclk(substream, false);
  4539. if (ret < 0)
  4540. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  4541. __func__, index, ret);
  4542. if (index == QUAT_MI2S) {
  4543. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  4544. STATE_DISABLE);
  4545. if (ret_pinctrl)
  4546. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  4547. __func__, ret_pinctrl);
  4548. }
  4549. }
  4550. mutex_unlock(&mi2s_intf_conf[index].lock);
  4551. }
  4552. static struct snd_soc_ops msm_mi2s_be_ops = {
  4553. .startup = msm_mi2s_snd_startup,
  4554. .shutdown = msm_mi2s_snd_shutdown,
  4555. };
  4556. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  4557. .hw_params = msm_snd_cdc_dma_hw_params,
  4558. };
  4559. static struct snd_soc_ops msm_be_ops = {
  4560. .hw_params = msm_snd_hw_params,
  4561. };
  4562. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  4563. .hw_params = msm_slimbus_2_hw_params,
  4564. };
  4565. static struct snd_soc_ops msm_wcn_ops = {
  4566. .hw_params = msm_wcn_hw_params,
  4567. };
  4568. /* Digital audio interface glue - connects codec <---> CPU */
  4569. static struct snd_soc_dai_link msm_common_dai_links[] = {
  4570. /* FrontEnd DAI Links */
  4571. {
  4572. .name = MSM_DAILINK_NAME(Media1),
  4573. .stream_name = "MultiMedia1",
  4574. .cpu_dai_name = "MultiMedia1",
  4575. .platform_name = "msm-pcm-dsp.0",
  4576. .dynamic = 1,
  4577. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4578. .dpcm_playback = 1,
  4579. .dpcm_capture = 1,
  4580. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4581. SND_SOC_DPCM_TRIGGER_POST},
  4582. .codec_dai_name = "snd-soc-dummy-dai",
  4583. .codec_name = "snd-soc-dummy",
  4584. .ignore_suspend = 1,
  4585. /* this dainlink has playback support */
  4586. .ignore_pmdown_time = 1,
  4587. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4588. },
  4589. {
  4590. .name = MSM_DAILINK_NAME(Media2),
  4591. .stream_name = "MultiMedia2",
  4592. .cpu_dai_name = "MultiMedia2",
  4593. .platform_name = "msm-pcm-dsp.0",
  4594. .dynamic = 1,
  4595. .dpcm_playback = 1,
  4596. .dpcm_capture = 1,
  4597. .codec_dai_name = "snd-soc-dummy-dai",
  4598. .codec_name = "snd-soc-dummy",
  4599. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4600. SND_SOC_DPCM_TRIGGER_POST},
  4601. .ignore_suspend = 1,
  4602. /* this dainlink has playback support */
  4603. .ignore_pmdown_time = 1,
  4604. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  4605. },
  4606. {
  4607. .name = "VoiceMMode1",
  4608. .stream_name = "VoiceMMode1",
  4609. .cpu_dai_name = "VoiceMMode1",
  4610. .platform_name = "msm-pcm-voice",
  4611. .dynamic = 1,
  4612. .dpcm_playback = 1,
  4613. .dpcm_capture = 1,
  4614. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4615. SND_SOC_DPCM_TRIGGER_POST},
  4616. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4617. .ignore_suspend = 1,
  4618. .ignore_pmdown_time = 1,
  4619. .codec_dai_name = "snd-soc-dummy-dai",
  4620. .codec_name = "snd-soc-dummy",
  4621. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  4622. },
  4623. {
  4624. .name = "MSM VoIP",
  4625. .stream_name = "VoIP",
  4626. .cpu_dai_name = "VoIP",
  4627. .platform_name = "msm-voip-dsp",
  4628. .dynamic = 1,
  4629. .dpcm_playback = 1,
  4630. .dpcm_capture = 1,
  4631. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4632. SND_SOC_DPCM_TRIGGER_POST},
  4633. .codec_dai_name = "snd-soc-dummy-dai",
  4634. .codec_name = "snd-soc-dummy",
  4635. .ignore_suspend = 1,
  4636. /* this dainlink has playback support */
  4637. .ignore_pmdown_time = 1,
  4638. .id = MSM_FRONTEND_DAI_VOIP,
  4639. },
  4640. {
  4641. .name = MSM_DAILINK_NAME(ULL),
  4642. .stream_name = "MultiMedia3",
  4643. .cpu_dai_name = "MultiMedia3",
  4644. .platform_name = "msm-pcm-dsp.2",
  4645. .dynamic = 1,
  4646. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4647. .dpcm_playback = 1,
  4648. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4649. SND_SOC_DPCM_TRIGGER_POST},
  4650. .codec_dai_name = "snd-soc-dummy-dai",
  4651. .codec_name = "snd-soc-dummy",
  4652. .ignore_suspend = 1,
  4653. /* this dainlink has playback support */
  4654. .ignore_pmdown_time = 1,
  4655. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  4656. },
  4657. /* Hostless PCM purpose */
  4658. {
  4659. .name = "SLIMBUS_0 Hostless",
  4660. .stream_name = "SLIMBUS_0 Hostless",
  4661. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  4662. .platform_name = "msm-pcm-hostless",
  4663. .dynamic = 1,
  4664. .dpcm_playback = 1,
  4665. .dpcm_capture = 1,
  4666. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4667. SND_SOC_DPCM_TRIGGER_POST},
  4668. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4669. .ignore_suspend = 1,
  4670. /* this dailink has playback support */
  4671. .ignore_pmdown_time = 1,
  4672. .codec_dai_name = "snd-soc-dummy-dai",
  4673. .codec_name = "snd-soc-dummy",
  4674. },
  4675. /* Hostless PCM purpose */
  4676. {
  4677. .name = "CDC_DMA Hostless",
  4678. .stream_name = "CDC_DMA Hostless",
  4679. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4680. .platform_name = "msm-pcm-hostless",
  4681. .dynamic = 1,
  4682. .dpcm_playback = 1,
  4683. .dpcm_capture = 1,
  4684. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4685. SND_SOC_DPCM_TRIGGER_POST},
  4686. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4687. .ignore_suspend = 1,
  4688. /* this dailink has playback support */
  4689. .ignore_pmdown_time = 1,
  4690. .codec_dai_name = "snd-soc-dummy-dai",
  4691. .codec_name = "snd-soc-dummy",
  4692. },
  4693. {
  4694. .name = "MSM AFE-PCM RX",
  4695. .stream_name = "AFE-PROXY RX",
  4696. .cpu_dai_name = "msm-dai-q6-dev.241",
  4697. .codec_name = "msm-stub-codec.1",
  4698. .codec_dai_name = "msm-stub-rx",
  4699. .platform_name = "msm-pcm-afe",
  4700. .dpcm_playback = 1,
  4701. .ignore_suspend = 1,
  4702. /* this dainlink has playback support */
  4703. .ignore_pmdown_time = 1,
  4704. },
  4705. {
  4706. .name = "MSM AFE-PCM TX",
  4707. .stream_name = "AFE-PROXY TX",
  4708. .cpu_dai_name = "msm-dai-q6-dev.240",
  4709. .codec_name = "msm-stub-codec.1",
  4710. .codec_dai_name = "msm-stub-tx",
  4711. .platform_name = "msm-pcm-afe",
  4712. .dpcm_capture = 1,
  4713. .ignore_suspend = 1,
  4714. },
  4715. {
  4716. .name = MSM_DAILINK_NAME(Compress1),
  4717. .stream_name = "Compress1",
  4718. .cpu_dai_name = "MultiMedia4",
  4719. .platform_name = "msm-compress-dsp",
  4720. .dynamic = 1,
  4721. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  4722. .dpcm_playback = 1,
  4723. .dpcm_capture = 1,
  4724. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4725. SND_SOC_DPCM_TRIGGER_POST},
  4726. .codec_dai_name = "snd-soc-dummy-dai",
  4727. .codec_name = "snd-soc-dummy",
  4728. .ignore_suspend = 1,
  4729. .ignore_pmdown_time = 1,
  4730. /* this dainlink has playback support */
  4731. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  4732. },
  4733. {
  4734. .name = "AUXPCM Hostless",
  4735. .stream_name = "AUXPCM Hostless",
  4736. .cpu_dai_name = "AUXPCM_HOSTLESS",
  4737. .platform_name = "msm-pcm-hostless",
  4738. .dynamic = 1,
  4739. .dpcm_playback = 1,
  4740. .dpcm_capture = 1,
  4741. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4742. SND_SOC_DPCM_TRIGGER_POST},
  4743. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4744. .ignore_suspend = 1,
  4745. /* this dainlink has playback support */
  4746. .ignore_pmdown_time = 1,
  4747. .codec_dai_name = "snd-soc-dummy-dai",
  4748. .codec_name = "snd-soc-dummy",
  4749. },
  4750. {
  4751. .name = "SLIMBUS_1 Hostless",
  4752. .stream_name = "SLIMBUS_1 Hostless",
  4753. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  4754. .platform_name = "msm-pcm-hostless",
  4755. .dynamic = 1,
  4756. .dpcm_playback = 1,
  4757. .dpcm_capture = 1,
  4758. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4759. SND_SOC_DPCM_TRIGGER_POST},
  4760. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4761. .ignore_suspend = 1,
  4762. /* this dailink has playback support */
  4763. .ignore_pmdown_time = 1,
  4764. .codec_dai_name = "snd-soc-dummy-dai",
  4765. .codec_name = "snd-soc-dummy",
  4766. },
  4767. {
  4768. .name = "SLIMBUS_3 Hostless",
  4769. .stream_name = "SLIMBUS_3 Hostless",
  4770. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  4771. .platform_name = "msm-pcm-hostless",
  4772. .dynamic = 1,
  4773. .dpcm_playback = 1,
  4774. .dpcm_capture = 1,
  4775. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4776. SND_SOC_DPCM_TRIGGER_POST},
  4777. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4778. .ignore_suspend = 1,
  4779. /* this dailink has playback support */
  4780. .ignore_pmdown_time = 1,
  4781. .codec_dai_name = "snd-soc-dummy-dai",
  4782. .codec_name = "snd-soc-dummy",
  4783. },
  4784. {
  4785. .name = "SLIMBUS_4 Hostless",
  4786. .stream_name = "SLIMBUS_4 Hostless",
  4787. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  4788. .platform_name = "msm-pcm-hostless",
  4789. .dynamic = 1,
  4790. .dpcm_playback = 1,
  4791. .dpcm_capture = 1,
  4792. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4793. SND_SOC_DPCM_TRIGGER_POST},
  4794. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4795. .ignore_suspend = 1,
  4796. /* this dailink has playback support */
  4797. .ignore_pmdown_time = 1,
  4798. .codec_dai_name = "snd-soc-dummy-dai",
  4799. .codec_name = "snd-soc-dummy",
  4800. },
  4801. {
  4802. .name = MSM_DAILINK_NAME(LowLatency),
  4803. .stream_name = "MultiMedia5",
  4804. .cpu_dai_name = "MultiMedia5",
  4805. .platform_name = "msm-pcm-dsp.1",
  4806. .dynamic = 1,
  4807. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4808. .dpcm_playback = 1,
  4809. .dpcm_capture = 1,
  4810. .codec_dai_name = "snd-soc-dummy-dai",
  4811. .codec_name = "snd-soc-dummy",
  4812. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4813. SND_SOC_DPCM_TRIGGER_POST},
  4814. .ignore_suspend = 1,
  4815. /* this dainlink has playback support */
  4816. .ignore_pmdown_time = 1,
  4817. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4818. .ops = &msm_fe_qos_ops,
  4819. },
  4820. {
  4821. .name = "Listen 1 Audio Service",
  4822. .stream_name = "Listen 1 Audio Service",
  4823. .cpu_dai_name = "LSM1",
  4824. .platform_name = "msm-lsm-client",
  4825. .dynamic = 1,
  4826. .dpcm_capture = 1,
  4827. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4828. SND_SOC_DPCM_TRIGGER_POST },
  4829. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4830. .ignore_suspend = 1,
  4831. .codec_dai_name = "snd-soc-dummy-dai",
  4832. .codec_name = "snd-soc-dummy",
  4833. .id = MSM_FRONTEND_DAI_LSM1,
  4834. },
  4835. /* Multiple Tunnel instances */
  4836. {
  4837. .name = MSM_DAILINK_NAME(Compress2),
  4838. .stream_name = "Compress2",
  4839. .cpu_dai_name = "MultiMedia7",
  4840. .platform_name = "msm-compress-dsp",
  4841. .dynamic = 1,
  4842. .dpcm_playback = 1,
  4843. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4844. SND_SOC_DPCM_TRIGGER_POST},
  4845. .codec_dai_name = "snd-soc-dummy-dai",
  4846. .codec_name = "snd-soc-dummy",
  4847. .ignore_suspend = 1,
  4848. .ignore_pmdown_time = 1,
  4849. /* this dainlink has playback support */
  4850. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4851. },
  4852. {
  4853. .name = MSM_DAILINK_NAME(MultiMedia10),
  4854. .stream_name = "MultiMedia10",
  4855. .cpu_dai_name = "MultiMedia10",
  4856. .platform_name = "msm-pcm-dsp.1",
  4857. .dynamic = 1,
  4858. .dpcm_playback = 1,
  4859. .dpcm_capture = 1,
  4860. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4861. SND_SOC_DPCM_TRIGGER_POST},
  4862. .codec_dai_name = "snd-soc-dummy-dai",
  4863. .codec_name = "snd-soc-dummy",
  4864. .ignore_suspend = 1,
  4865. .ignore_pmdown_time = 1,
  4866. /* this dainlink has playback support */
  4867. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4868. },
  4869. {
  4870. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4871. .stream_name = "MM_NOIRQ",
  4872. .cpu_dai_name = "MultiMedia8",
  4873. .platform_name = "msm-pcm-dsp-noirq",
  4874. .dynamic = 1,
  4875. .dpcm_playback = 1,
  4876. .dpcm_capture = 1,
  4877. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4878. SND_SOC_DPCM_TRIGGER_POST},
  4879. .codec_dai_name = "snd-soc-dummy-dai",
  4880. .codec_name = "snd-soc-dummy",
  4881. .ignore_suspend = 1,
  4882. .ignore_pmdown_time = 1,
  4883. /* this dainlink has playback support */
  4884. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4885. .ops = &msm_fe_qos_ops,
  4886. },
  4887. /* HDMI Hostless */
  4888. {
  4889. .name = "HDMI_RX_HOSTLESS",
  4890. .stream_name = "HDMI_RX_HOSTLESS",
  4891. .cpu_dai_name = "HDMI_HOSTLESS",
  4892. .platform_name = "msm-pcm-hostless",
  4893. .dynamic = 1,
  4894. .dpcm_playback = 1,
  4895. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4896. SND_SOC_DPCM_TRIGGER_POST},
  4897. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4898. .ignore_suspend = 1,
  4899. .ignore_pmdown_time = 1,
  4900. .codec_dai_name = "snd-soc-dummy-dai",
  4901. .codec_name = "snd-soc-dummy",
  4902. },
  4903. {
  4904. .name = "VoiceMMode2",
  4905. .stream_name = "VoiceMMode2",
  4906. .cpu_dai_name = "VoiceMMode2",
  4907. .platform_name = "msm-pcm-voice",
  4908. .dynamic = 1,
  4909. .dpcm_playback = 1,
  4910. .dpcm_capture = 1,
  4911. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4912. SND_SOC_DPCM_TRIGGER_POST},
  4913. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4914. .ignore_suspend = 1,
  4915. .ignore_pmdown_time = 1,
  4916. .codec_dai_name = "snd-soc-dummy-dai",
  4917. .codec_name = "snd-soc-dummy",
  4918. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4919. },
  4920. /* LSM FE */
  4921. {
  4922. .name = "Listen 2 Audio Service",
  4923. .stream_name = "Listen 2 Audio Service",
  4924. .cpu_dai_name = "LSM2",
  4925. .platform_name = "msm-lsm-client",
  4926. .dynamic = 1,
  4927. .dpcm_capture = 1,
  4928. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4929. SND_SOC_DPCM_TRIGGER_POST },
  4930. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4931. .ignore_suspend = 1,
  4932. .codec_dai_name = "snd-soc-dummy-dai",
  4933. .codec_name = "snd-soc-dummy",
  4934. .id = MSM_FRONTEND_DAI_LSM2,
  4935. },
  4936. {
  4937. .name = "Listen 3 Audio Service",
  4938. .stream_name = "Listen 3 Audio Service",
  4939. .cpu_dai_name = "LSM3",
  4940. .platform_name = "msm-lsm-client",
  4941. .dynamic = 1,
  4942. .dpcm_capture = 1,
  4943. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4944. SND_SOC_DPCM_TRIGGER_POST },
  4945. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4946. .ignore_suspend = 1,
  4947. .codec_dai_name = "snd-soc-dummy-dai",
  4948. .codec_name = "snd-soc-dummy",
  4949. .id = MSM_FRONTEND_DAI_LSM3,
  4950. },
  4951. {
  4952. .name = "Listen 4 Audio Service",
  4953. .stream_name = "Listen 4 Audio Service",
  4954. .cpu_dai_name = "LSM4",
  4955. .platform_name = "msm-lsm-client",
  4956. .dynamic = 1,
  4957. .dpcm_capture = 1,
  4958. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4959. SND_SOC_DPCM_TRIGGER_POST },
  4960. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4961. .ignore_suspend = 1,
  4962. .codec_dai_name = "snd-soc-dummy-dai",
  4963. .codec_name = "snd-soc-dummy",
  4964. .id = MSM_FRONTEND_DAI_LSM4,
  4965. },
  4966. {
  4967. .name = "Listen 5 Audio Service",
  4968. .stream_name = "Listen 5 Audio Service",
  4969. .cpu_dai_name = "LSM5",
  4970. .platform_name = "msm-lsm-client",
  4971. .dynamic = 1,
  4972. .dpcm_capture = 1,
  4973. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4974. SND_SOC_DPCM_TRIGGER_POST },
  4975. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4976. .ignore_suspend = 1,
  4977. .codec_dai_name = "snd-soc-dummy-dai",
  4978. .codec_name = "snd-soc-dummy",
  4979. .id = MSM_FRONTEND_DAI_LSM5,
  4980. },
  4981. {
  4982. .name = "Listen 6 Audio Service",
  4983. .stream_name = "Listen 6 Audio Service",
  4984. .cpu_dai_name = "LSM6",
  4985. .platform_name = "msm-lsm-client",
  4986. .dynamic = 1,
  4987. .dpcm_capture = 1,
  4988. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4989. SND_SOC_DPCM_TRIGGER_POST },
  4990. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4991. .ignore_suspend = 1,
  4992. .codec_dai_name = "snd-soc-dummy-dai",
  4993. .codec_name = "snd-soc-dummy",
  4994. .id = MSM_FRONTEND_DAI_LSM6,
  4995. },
  4996. {
  4997. .name = "Listen 7 Audio Service",
  4998. .stream_name = "Listen 7 Audio Service",
  4999. .cpu_dai_name = "LSM7",
  5000. .platform_name = "msm-lsm-client",
  5001. .dynamic = 1,
  5002. .dpcm_capture = 1,
  5003. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5004. SND_SOC_DPCM_TRIGGER_POST },
  5005. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5006. .ignore_suspend = 1,
  5007. .codec_dai_name = "snd-soc-dummy-dai",
  5008. .codec_name = "snd-soc-dummy",
  5009. .id = MSM_FRONTEND_DAI_LSM7,
  5010. },
  5011. {
  5012. .name = "Listen 8 Audio Service",
  5013. .stream_name = "Listen 8 Audio Service",
  5014. .cpu_dai_name = "LSM8",
  5015. .platform_name = "msm-lsm-client",
  5016. .dynamic = 1,
  5017. .dpcm_capture = 1,
  5018. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5019. SND_SOC_DPCM_TRIGGER_POST },
  5020. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5021. .ignore_suspend = 1,
  5022. .codec_dai_name = "snd-soc-dummy-dai",
  5023. .codec_name = "snd-soc-dummy",
  5024. .id = MSM_FRONTEND_DAI_LSM8,
  5025. },
  5026. {
  5027. .name = MSM_DAILINK_NAME(Media9),
  5028. .stream_name = "MultiMedia9",
  5029. .cpu_dai_name = "MultiMedia9",
  5030. .platform_name = "msm-pcm-dsp.0",
  5031. .dynamic = 1,
  5032. .dpcm_playback = 1,
  5033. .dpcm_capture = 1,
  5034. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5035. SND_SOC_DPCM_TRIGGER_POST},
  5036. .codec_dai_name = "snd-soc-dummy-dai",
  5037. .codec_name = "snd-soc-dummy",
  5038. .ignore_suspend = 1,
  5039. /* this dainlink has playback support */
  5040. .ignore_pmdown_time = 1,
  5041. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5042. },
  5043. {
  5044. .name = MSM_DAILINK_NAME(Compress4),
  5045. .stream_name = "Compress4",
  5046. .cpu_dai_name = "MultiMedia11",
  5047. .platform_name = "msm-compress-dsp",
  5048. .dynamic = 1,
  5049. .dpcm_playback = 1,
  5050. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5051. SND_SOC_DPCM_TRIGGER_POST},
  5052. .codec_dai_name = "snd-soc-dummy-dai",
  5053. .codec_name = "snd-soc-dummy",
  5054. .ignore_suspend = 1,
  5055. .ignore_pmdown_time = 1,
  5056. /* this dainlink has playback support */
  5057. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5058. },
  5059. {
  5060. .name = MSM_DAILINK_NAME(Compress5),
  5061. .stream_name = "Compress5",
  5062. .cpu_dai_name = "MultiMedia12",
  5063. .platform_name = "msm-compress-dsp",
  5064. .dynamic = 1,
  5065. .dpcm_playback = 1,
  5066. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5067. SND_SOC_DPCM_TRIGGER_POST},
  5068. .codec_dai_name = "snd-soc-dummy-dai",
  5069. .codec_name = "snd-soc-dummy",
  5070. .ignore_suspend = 1,
  5071. .ignore_pmdown_time = 1,
  5072. /* this dainlink has playback support */
  5073. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5074. },
  5075. {
  5076. .name = MSM_DAILINK_NAME(Compress6),
  5077. .stream_name = "Compress6",
  5078. .cpu_dai_name = "MultiMedia13",
  5079. .platform_name = "msm-compress-dsp",
  5080. .dynamic = 1,
  5081. .dpcm_playback = 1,
  5082. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5083. SND_SOC_DPCM_TRIGGER_POST},
  5084. .codec_dai_name = "snd-soc-dummy-dai",
  5085. .codec_name = "snd-soc-dummy",
  5086. .ignore_suspend = 1,
  5087. .ignore_pmdown_time = 1,
  5088. /* this dainlink has playback support */
  5089. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5090. },
  5091. {
  5092. .name = MSM_DAILINK_NAME(Compress7),
  5093. .stream_name = "Compress7",
  5094. .cpu_dai_name = "MultiMedia14",
  5095. .platform_name = "msm-compress-dsp",
  5096. .dynamic = 1,
  5097. .dpcm_playback = 1,
  5098. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5099. SND_SOC_DPCM_TRIGGER_POST},
  5100. .codec_dai_name = "snd-soc-dummy-dai",
  5101. .codec_name = "snd-soc-dummy",
  5102. .ignore_suspend = 1,
  5103. .ignore_pmdown_time = 1,
  5104. /* this dainlink has playback support */
  5105. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5106. },
  5107. {
  5108. .name = MSM_DAILINK_NAME(Compress8),
  5109. .stream_name = "Compress8",
  5110. .cpu_dai_name = "MultiMedia15",
  5111. .platform_name = "msm-compress-dsp",
  5112. .dynamic = 1,
  5113. .dpcm_playback = 1,
  5114. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5115. SND_SOC_DPCM_TRIGGER_POST},
  5116. .codec_dai_name = "snd-soc-dummy-dai",
  5117. .codec_name = "snd-soc-dummy",
  5118. .ignore_suspend = 1,
  5119. .ignore_pmdown_time = 1,
  5120. /* this dainlink has playback support */
  5121. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5122. },
  5123. {
  5124. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5125. .stream_name = "MM_NOIRQ_2",
  5126. .cpu_dai_name = "MultiMedia16",
  5127. .platform_name = "msm-pcm-dsp-noirq",
  5128. .dynamic = 1,
  5129. .dpcm_playback = 1,
  5130. .dpcm_capture = 1,
  5131. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5132. SND_SOC_DPCM_TRIGGER_POST},
  5133. .codec_dai_name = "snd-soc-dummy-dai",
  5134. .codec_name = "snd-soc-dummy",
  5135. .ignore_suspend = 1,
  5136. .ignore_pmdown_time = 1,
  5137. /* this dainlink has playback support */
  5138. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5139. },
  5140. {
  5141. .name = "SLIMBUS_8 Hostless",
  5142. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5143. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5144. .platform_name = "msm-pcm-hostless",
  5145. .dynamic = 1,
  5146. .dpcm_capture = 1,
  5147. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5148. SND_SOC_DPCM_TRIGGER_POST},
  5149. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5150. .ignore_suspend = 1,
  5151. .codec_dai_name = "snd-soc-dummy-dai",
  5152. .codec_name = "snd-soc-dummy",
  5153. },
  5154. };
  5155. static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
  5156. /* Ultrasound RX DAI Link */
  5157. {
  5158. .name = "SLIMBUS_2 Hostless Playback",
  5159. .stream_name = "SLIMBUS_2 Hostless Playback",
  5160. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5161. .platform_name = "msm-pcm-hostless",
  5162. .codec_name = "tasha_codec",
  5163. .codec_dai_name = "tasha_rx2",
  5164. .ignore_suspend = 1,
  5165. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5166. .ops = &msm_slimbus_2_be_ops,
  5167. },
  5168. /* Ultrasound TX DAI Link */
  5169. {
  5170. .name = "SLIMBUS_2 Hostless Capture",
  5171. .stream_name = "SLIMBUS_2 Hostless Capture",
  5172. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5173. .platform_name = "msm-pcm-hostless",
  5174. .codec_name = "tasha_codec",
  5175. .codec_dai_name = "tasha_tx2",
  5176. .ignore_suspend = 1,
  5177. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5178. .ops = &msm_slimbus_2_be_ops,
  5179. },
  5180. {
  5181. .name = "SLIMBUS_6 Hostless Playback",
  5182. .stream_name = "SLIMBUS_6 Hostless",
  5183. .cpu_dai_name = "SLIMBUS6_HOSTLESS",
  5184. .platform_name = "msm-pcm-hostless",
  5185. .dynamic = 1,
  5186. .dpcm_playback = 1,
  5187. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5188. SND_SOC_DPCM_TRIGGER_POST},
  5189. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5190. .ignore_suspend = 1,
  5191. /* this dailink has playback support */
  5192. .ignore_pmdown_time = 1,
  5193. .codec_dai_name = "snd-soc-dummy-dai",
  5194. .codec_name = "snd-soc-dummy",
  5195. },
  5196. };
  5197. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5198. {
  5199. .name = MSM_DAILINK_NAME(ASM Loopback),
  5200. .stream_name = "MultiMedia6",
  5201. .cpu_dai_name = "MultiMedia6",
  5202. .platform_name = "msm-pcm-loopback",
  5203. .dynamic = 1,
  5204. .dpcm_playback = 1,
  5205. .dpcm_capture = 1,
  5206. .codec_dai_name = "snd-soc-dummy-dai",
  5207. .codec_name = "snd-soc-dummy",
  5208. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5209. SND_SOC_DPCM_TRIGGER_POST},
  5210. .ignore_suspend = 1,
  5211. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5212. .ignore_pmdown_time = 1,
  5213. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5214. },
  5215. {
  5216. .name = "USB Audio Hostless",
  5217. .stream_name = "USB Audio Hostless",
  5218. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5219. .platform_name = "msm-pcm-hostless",
  5220. .dynamic = 1,
  5221. .dpcm_playback = 1,
  5222. .dpcm_capture = 1,
  5223. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5224. SND_SOC_DPCM_TRIGGER_POST},
  5225. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5226. .ignore_suspend = 1,
  5227. .ignore_pmdown_time = 1,
  5228. .codec_dai_name = "snd-soc-dummy-dai",
  5229. .codec_name = "snd-soc-dummy",
  5230. },
  5231. {
  5232. .name = "SLIMBUS_7 Hostless",
  5233. .stream_name = "SLIMBUS_7 Hostless",
  5234. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5235. .platform_name = "msm-pcm-hostless",
  5236. .dynamic = 1,
  5237. .dpcm_capture = 1,
  5238. .dpcm_playback = 1,
  5239. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5240. SND_SOC_DPCM_TRIGGER_POST},
  5241. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5242. .ignore_suspend = 1,
  5243. .ignore_pmdown_time = 1,
  5244. .codec_dai_name = "snd-soc-dummy-dai",
  5245. .codec_name = "snd-soc-dummy",
  5246. },
  5247. };
  5248. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5249. /* Backend AFE DAI Links */
  5250. {
  5251. .name = LPASS_BE_AFE_PCM_RX,
  5252. .stream_name = "AFE Playback",
  5253. .cpu_dai_name = "msm-dai-q6-dev.224",
  5254. .platform_name = "msm-pcm-routing",
  5255. .codec_name = "msm-stub-codec.1",
  5256. .codec_dai_name = "msm-stub-rx",
  5257. .no_pcm = 1,
  5258. .dpcm_playback = 1,
  5259. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5260. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5261. /* this dainlink has playback support */
  5262. .ignore_pmdown_time = 1,
  5263. .ignore_suspend = 1,
  5264. },
  5265. {
  5266. .name = LPASS_BE_AFE_PCM_TX,
  5267. .stream_name = "AFE Capture",
  5268. .cpu_dai_name = "msm-dai-q6-dev.225",
  5269. .platform_name = "msm-pcm-routing",
  5270. .codec_name = "msm-stub-codec.1",
  5271. .codec_dai_name = "msm-stub-tx",
  5272. .no_pcm = 1,
  5273. .dpcm_capture = 1,
  5274. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5275. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5276. .ignore_suspend = 1,
  5277. },
  5278. /* Incall Record Uplink BACK END DAI Link */
  5279. {
  5280. .name = LPASS_BE_INCALL_RECORD_TX,
  5281. .stream_name = "Voice Uplink Capture",
  5282. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5283. .platform_name = "msm-pcm-routing",
  5284. .codec_name = "msm-stub-codec.1",
  5285. .codec_dai_name = "msm-stub-tx",
  5286. .no_pcm = 1,
  5287. .dpcm_capture = 1,
  5288. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5289. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5290. .ignore_suspend = 1,
  5291. },
  5292. /* Incall Record Downlink BACK END DAI Link */
  5293. {
  5294. .name = LPASS_BE_INCALL_RECORD_RX,
  5295. .stream_name = "Voice Downlink Capture",
  5296. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5297. .platform_name = "msm-pcm-routing",
  5298. .codec_name = "msm-stub-codec.1",
  5299. .codec_dai_name = "msm-stub-tx",
  5300. .no_pcm = 1,
  5301. .dpcm_capture = 1,
  5302. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5303. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5304. .ignore_suspend = 1,
  5305. },
  5306. /* Incall Music BACK END DAI Link */
  5307. {
  5308. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5309. .stream_name = "Voice Farend Playback",
  5310. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5311. .platform_name = "msm-pcm-routing",
  5312. .codec_name = "msm-stub-codec.1",
  5313. .codec_dai_name = "msm-stub-rx",
  5314. .no_pcm = 1,
  5315. .dpcm_playback = 1,
  5316. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5317. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5318. .ignore_suspend = 1,
  5319. .ignore_pmdown_time = 1,
  5320. },
  5321. /* Incall Music 2 BACK END DAI Link */
  5322. {
  5323. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5324. .stream_name = "Voice2 Farend Playback",
  5325. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5326. .platform_name = "msm-pcm-routing",
  5327. .codec_name = "msm-stub-codec.1",
  5328. .codec_dai_name = "msm-stub-rx",
  5329. .no_pcm = 1,
  5330. .dpcm_playback = 1,
  5331. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5332. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5333. .ignore_suspend = 1,
  5334. .ignore_pmdown_time = 1,
  5335. },
  5336. {
  5337. .name = LPASS_BE_USB_AUDIO_RX,
  5338. .stream_name = "USB Audio Playback",
  5339. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5340. .platform_name = "msm-pcm-routing",
  5341. .codec_name = "msm-stub-codec.1",
  5342. .codec_dai_name = "msm-stub-rx",
  5343. .no_pcm = 1,
  5344. .dpcm_playback = 1,
  5345. .id = MSM_BACKEND_DAI_USB_RX,
  5346. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5347. .ignore_pmdown_time = 1,
  5348. .ignore_suspend = 1,
  5349. },
  5350. {
  5351. .name = LPASS_BE_USB_AUDIO_TX,
  5352. .stream_name = "USB Audio Capture",
  5353. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5354. .platform_name = "msm-pcm-routing",
  5355. .codec_name = "msm-stub-codec.1",
  5356. .codec_dai_name = "msm-stub-tx",
  5357. .no_pcm = 1,
  5358. .dpcm_capture = 1,
  5359. .id = MSM_BACKEND_DAI_USB_TX,
  5360. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5361. .ignore_suspend = 1,
  5362. },
  5363. {
  5364. .name = LPASS_BE_PRI_TDM_RX_0,
  5365. .stream_name = "Primary TDM0 Playback",
  5366. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5367. .platform_name = "msm-pcm-routing",
  5368. .codec_name = "msm-stub-codec.1",
  5369. .codec_dai_name = "msm-stub-rx",
  5370. .no_pcm = 1,
  5371. .dpcm_playback = 1,
  5372. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5373. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5374. .ops = &qcs405_tdm_be_ops,
  5375. .ignore_suspend = 1,
  5376. .ignore_pmdown_time = 1,
  5377. },
  5378. {
  5379. .name = LPASS_BE_PRI_TDM_TX_0,
  5380. .stream_name = "Primary TDM0 Capture",
  5381. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5382. .platform_name = "msm-pcm-routing",
  5383. .codec_name = "msm-stub-codec.1",
  5384. .codec_dai_name = "msm-stub-tx",
  5385. .no_pcm = 1,
  5386. .dpcm_capture = 1,
  5387. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5388. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5389. .ops = &qcs405_tdm_be_ops,
  5390. .ignore_suspend = 1,
  5391. },
  5392. {
  5393. .name = LPASS_BE_SEC_TDM_RX_0,
  5394. .stream_name = "Secondary TDM0 Playback",
  5395. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5396. .platform_name = "msm-pcm-routing",
  5397. .codec_name = "msm-stub-codec.1",
  5398. .codec_dai_name = "msm-stub-rx",
  5399. .no_pcm = 1,
  5400. .dpcm_playback = 1,
  5401. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5402. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5403. .ops = &qcs405_tdm_be_ops,
  5404. .ignore_suspend = 1,
  5405. .ignore_pmdown_time = 1,
  5406. },
  5407. {
  5408. .name = LPASS_BE_SEC_TDM_TX_0,
  5409. .stream_name = "Secondary TDM0 Capture",
  5410. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5411. .platform_name = "msm-pcm-routing",
  5412. .codec_name = "msm-stub-codec.1",
  5413. .codec_dai_name = "msm-stub-tx",
  5414. .no_pcm = 1,
  5415. .dpcm_capture = 1,
  5416. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  5417. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5418. .ops = &qcs405_tdm_be_ops,
  5419. .ignore_suspend = 1,
  5420. },
  5421. {
  5422. .name = LPASS_BE_TERT_TDM_RX_0,
  5423. .stream_name = "Tertiary TDM0 Playback",
  5424. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  5425. .platform_name = "msm-pcm-routing",
  5426. .codec_name = "msm-stub-codec.1",
  5427. .codec_dai_name = "msm-stub-rx",
  5428. .no_pcm = 1,
  5429. .dpcm_playback = 1,
  5430. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  5431. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5432. .ops = &qcs405_tdm_be_ops,
  5433. .ignore_suspend = 1,
  5434. .ignore_pmdown_time = 1,
  5435. },
  5436. {
  5437. .name = LPASS_BE_TERT_TDM_TX_0,
  5438. .stream_name = "Tertiary TDM0 Capture",
  5439. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  5440. .platform_name = "msm-pcm-routing",
  5441. .codec_name = "msm-stub-codec.1",
  5442. .codec_dai_name = "msm-stub-tx",
  5443. .no_pcm = 1,
  5444. .dpcm_capture = 1,
  5445. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  5446. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5447. .ops = &qcs405_tdm_be_ops,
  5448. .ignore_suspend = 1,
  5449. },
  5450. {
  5451. .name = LPASS_BE_QUAT_TDM_RX_0,
  5452. .stream_name = "Quaternary TDM0 Playback",
  5453. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  5454. .platform_name = "msm-pcm-routing",
  5455. .codec_name = "msm-stub-codec.1",
  5456. .codec_dai_name = "msm-stub-rx",
  5457. .no_pcm = 1,
  5458. .dpcm_playback = 1,
  5459. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  5460. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  5461. .ops = &qcs405_tdm_be_ops,
  5462. .ignore_suspend = 1,
  5463. .ignore_pmdown_time = 1,
  5464. },
  5465. {
  5466. .name = LPASS_BE_QUAT_TDM_TX_0,
  5467. .stream_name = "Quaternary TDM0 Capture",
  5468. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  5469. .platform_name = "msm-pcm-routing",
  5470. .codec_name = "msm-stub-codec.1",
  5471. .codec_dai_name = "msm-stub-tx",
  5472. .no_pcm = 1,
  5473. .dpcm_capture = 1,
  5474. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  5475. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5476. .ops = &qcs405_tdm_be_ops,
  5477. .ignore_suspend = 1,
  5478. },
  5479. {
  5480. .name = LPASS_BE_QUIN_TDM_RX_0,
  5481. .stream_name = "Quinary TDM0 Playback",
  5482. .cpu_dai_name = "msm-dai-q6-tdm.36928",
  5483. .platform_name = "msm-pcm-routing",
  5484. .codec_name = "msm-stub-codec.1",
  5485. .codec_dai_name = "msm-stub-rx",
  5486. .no_pcm = 1,
  5487. .dpcm_playback = 1,
  5488. .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
  5489. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  5490. .ops = &qcs405_tdm_be_ops,
  5491. .ignore_suspend = 1,
  5492. .ignore_pmdown_time = 1,
  5493. },
  5494. {
  5495. .name = LPASS_BE_QUIN_TDM_TX_0,
  5496. .stream_name = "Quinary TDM0 Capture",
  5497. .cpu_dai_name = "msm-dai-q6-tdm.36929",
  5498. .platform_name = "msm-pcm-routing",
  5499. .codec_name = "msm-stub-codec.1",
  5500. .codec_dai_name = "msm-stub-tx",
  5501. .no_pcm = 1,
  5502. .dpcm_capture = 1,
  5503. .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
  5504. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5505. .ops = &qcs405_tdm_be_ops,
  5506. .ignore_suspend = 1,
  5507. },
  5508. };
  5509. static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
  5510. {
  5511. .name = LPASS_BE_SLIMBUS_0_RX,
  5512. .stream_name = "Slimbus Playback",
  5513. .cpu_dai_name = "msm-dai-q6-dev.16384",
  5514. .platform_name = "msm-pcm-routing",
  5515. .codec_name = "tasha_codec",
  5516. .codec_dai_name = "tasha_mix_rx1",
  5517. .no_pcm = 1,
  5518. .dpcm_playback = 1,
  5519. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  5520. .init = &msm_audrx_init,
  5521. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5522. /* this dainlink has playback support */
  5523. .ignore_pmdown_time = 1,
  5524. .ignore_suspend = 1,
  5525. .ops = &msm_be_ops,
  5526. },
  5527. {
  5528. .name = LPASS_BE_SLIMBUS_0_TX,
  5529. .stream_name = "Slimbus Capture",
  5530. .cpu_dai_name = "msm-dai-q6-dev.16385",
  5531. .platform_name = "msm-pcm-routing",
  5532. .codec_name = "tasha_codec",
  5533. .codec_dai_name = "tasha_tx1",
  5534. .no_pcm = 1,
  5535. .dpcm_capture = 1,
  5536. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  5537. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5538. .ignore_suspend = 1,
  5539. .ops = &msm_be_ops,
  5540. },
  5541. {
  5542. .name = LPASS_BE_SLIMBUS_1_RX,
  5543. .stream_name = "Slimbus1 Playback",
  5544. .cpu_dai_name = "msm-dai-q6-dev.16386",
  5545. .platform_name = "msm-pcm-routing",
  5546. .codec_name = "tasha_codec",
  5547. .codec_dai_name = "tasha_mix_rx1",
  5548. .no_pcm = 1,
  5549. .dpcm_playback = 1,
  5550. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  5551. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5552. .ops = &msm_be_ops,
  5553. /* dai link has playback support */
  5554. .ignore_pmdown_time = 1,
  5555. .ignore_suspend = 1,
  5556. },
  5557. {
  5558. .name = LPASS_BE_SLIMBUS_1_TX,
  5559. .stream_name = "Slimbus1 Capture",
  5560. .cpu_dai_name = "msm-dai-q6-dev.16387",
  5561. .platform_name = "msm-pcm-routing",
  5562. .codec_name = "tasha_codec",
  5563. .codec_dai_name = "tasha_tx3",
  5564. .no_pcm = 1,
  5565. .dpcm_capture = 1,
  5566. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  5567. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5568. .ops = &msm_be_ops,
  5569. .ignore_suspend = 1,
  5570. },
  5571. {
  5572. .name = LPASS_BE_SLIMBUS_2_RX,
  5573. .stream_name = "Slimbus2 Playback",
  5574. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5575. .platform_name = "msm-pcm-routing",
  5576. .codec_name = "tasha_codec",
  5577. .codec_dai_name = "tasha_rx2",
  5578. .no_pcm = 1,
  5579. .dpcm_playback = 1,
  5580. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  5581. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5582. .ops = &msm_be_ops,
  5583. .ignore_pmdown_time = 1,
  5584. .ignore_suspend = 1,
  5585. },
  5586. {
  5587. .name = LPASS_BE_SLIMBUS_3_RX,
  5588. .stream_name = "Slimbus3 Playback",
  5589. .cpu_dai_name = "msm-dai-q6-dev.16390",
  5590. .platform_name = "msm-pcm-routing",
  5591. .codec_name = "tasha_codec",
  5592. .codec_dai_name = "tasha_mix_rx1",
  5593. .no_pcm = 1,
  5594. .dpcm_playback = 1,
  5595. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  5596. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5597. .ops = &msm_be_ops,
  5598. /* dai link has playback support */
  5599. .ignore_pmdown_time = 1,
  5600. .ignore_suspend = 1,
  5601. },
  5602. {
  5603. .name = LPASS_BE_SLIMBUS_3_TX,
  5604. .stream_name = "Slimbus3 Capture",
  5605. .cpu_dai_name = "msm-dai-q6-dev.16391",
  5606. .platform_name = "msm-pcm-routing",
  5607. .codec_name = "tasha_codec",
  5608. .codec_dai_name = "tasha_tx1",
  5609. .no_pcm = 1,
  5610. .dpcm_capture = 1,
  5611. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  5612. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5613. .ops = &msm_be_ops,
  5614. .ignore_suspend = 1,
  5615. },
  5616. {
  5617. .name = LPASS_BE_SLIMBUS_4_RX,
  5618. .stream_name = "Slimbus4 Playback",
  5619. .cpu_dai_name = "msm-dai-q6-dev.16392",
  5620. .platform_name = "msm-pcm-routing",
  5621. .codec_name = "tasha_codec",
  5622. .codec_dai_name = "tasha_mix_rx1",
  5623. .no_pcm = 1,
  5624. .dpcm_playback = 1,
  5625. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  5626. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5627. .ops = &msm_be_ops,
  5628. /* dai link has playback support */
  5629. .ignore_pmdown_time = 1,
  5630. .ignore_suspend = 1,
  5631. },
  5632. {
  5633. .name = LPASS_BE_SLIMBUS_5_RX,
  5634. .stream_name = "Slimbus5 Playback",
  5635. .cpu_dai_name = "msm-dai-q6-dev.16394",
  5636. .platform_name = "msm-pcm-routing",
  5637. .codec_name = "tasha_codec",
  5638. .codec_dai_name = "tasha_rx3",
  5639. .no_pcm = 1,
  5640. .dpcm_playback = 1,
  5641. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  5642. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5643. .ops = &msm_be_ops,
  5644. /* dai link has playback support */
  5645. .ignore_pmdown_time = 1,
  5646. .ignore_suspend = 1,
  5647. },
  5648. {
  5649. .name = LPASS_BE_SLIMBUS_6_RX,
  5650. .stream_name = "Slimbus6 Playback",
  5651. .cpu_dai_name = "msm-dai-q6-dev.16396",
  5652. .platform_name = "msm-pcm-routing",
  5653. .codec_name = "tasha_codec",
  5654. .codec_dai_name = "tasha_rx4",
  5655. .no_pcm = 1,
  5656. .dpcm_playback = 1,
  5657. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  5658. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5659. .ops = &msm_be_ops,
  5660. /* dai link has playback support */
  5661. .ignore_pmdown_time = 1,
  5662. .ignore_suspend = 1,
  5663. },
  5664. /* Slimbus VI Recording */
  5665. {
  5666. .name = LPASS_BE_SLIMBUS_TX_VI,
  5667. .stream_name = "Slimbus4 Capture",
  5668. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5669. .platform_name = "msm-pcm-routing",
  5670. .codec_name = "tasha_codec",
  5671. .codec_dai_name = "tasha_vifeedback",
  5672. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5673. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5674. .ops = &msm_be_ops,
  5675. .ignore_suspend = 1,
  5676. .no_pcm = 1,
  5677. .dpcm_capture = 1,
  5678. .ignore_pmdown_time = 1,
  5679. },
  5680. };
  5681. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  5682. {
  5683. .name = LPASS_BE_SLIMBUS_7_RX,
  5684. .stream_name = "Slimbus7 Playback",
  5685. .cpu_dai_name = "msm-dai-q6-dev.16398",
  5686. .platform_name = "msm-pcm-routing",
  5687. .codec_name = "btfmslim_slave",
  5688. /* BT codec driver determines capabilities based on
  5689. * dai name, bt codecdai name should always contains
  5690. * supported usecase information
  5691. */
  5692. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  5693. .no_pcm = 1,
  5694. .dpcm_playback = 1,
  5695. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  5696. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5697. .ops = &msm_wcn_ops,
  5698. /* dai link has playback support */
  5699. .ignore_pmdown_time = 1,
  5700. .ignore_suspend = 1,
  5701. },
  5702. {
  5703. .name = LPASS_BE_SLIMBUS_7_TX,
  5704. .stream_name = "Slimbus7 Capture",
  5705. .cpu_dai_name = "msm-dai-q6-dev.16399",
  5706. .platform_name = "msm-pcm-routing",
  5707. .codec_name = "btfmslim_slave",
  5708. .codec_dai_name = "btfm_bt_sco_slim_tx",
  5709. .no_pcm = 1,
  5710. .dpcm_capture = 1,
  5711. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  5712. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5713. .ops = &msm_wcn_ops,
  5714. .ignore_suspend = 1,
  5715. },
  5716. {
  5717. .name = LPASS_BE_SLIMBUS_8_TX,
  5718. .stream_name = "Slimbus8 Capture",
  5719. .cpu_dai_name = "msm-dai-q6-dev.16401",
  5720. .platform_name = "msm-pcm-routing",
  5721. .codec_name = "btfmslim_slave",
  5722. .codec_dai_name = "btfm_fm_slim_tx",
  5723. .no_pcm = 1,
  5724. .dpcm_capture = 1,
  5725. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  5726. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5727. .init = &msm_wcn_init,
  5728. .ops = &msm_wcn_ops,
  5729. .ignore_suspend = 1,
  5730. },
  5731. };
  5732. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  5733. {
  5734. .name = LPASS_BE_PRI_MI2S_RX,
  5735. .stream_name = "Primary MI2S Playback",
  5736. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  5737. .platform_name = "msm-pcm-routing",
  5738. .codec_name = "msm-stub-codec.1",
  5739. .codec_dai_name = "msm-stub-rx",
  5740. .no_pcm = 1,
  5741. .dpcm_playback = 1,
  5742. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  5743. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5744. .ops = &msm_mi2s_be_ops,
  5745. .ignore_suspend = 1,
  5746. .ignore_pmdown_time = 1,
  5747. },
  5748. {
  5749. .name = LPASS_BE_PRI_MI2S_TX,
  5750. .stream_name = "Primary MI2S Capture",
  5751. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  5752. .platform_name = "msm-pcm-routing",
  5753. .codec_name = "msm-stub-codec.1",
  5754. .codec_dai_name = "msm-stub-tx",
  5755. .no_pcm = 1,
  5756. .dpcm_capture = 1,
  5757. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  5758. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5759. .ops = &msm_mi2s_be_ops,
  5760. .ignore_suspend = 1,
  5761. },
  5762. {
  5763. .name = LPASS_BE_SEC_MI2S_RX,
  5764. .stream_name = "Secondary MI2S Playback",
  5765. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  5766. .platform_name = "msm-pcm-routing",
  5767. .codec_name = "msm-stub-codec.1",
  5768. .codec_dai_name = "msm-stub-rx",
  5769. .no_pcm = 1,
  5770. .dpcm_playback = 1,
  5771. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  5772. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5773. .ops = &msm_mi2s_be_ops,
  5774. .ignore_suspend = 1,
  5775. .ignore_pmdown_time = 1,
  5776. },
  5777. {
  5778. .name = LPASS_BE_SEC_MI2S_TX,
  5779. .stream_name = "Secondary MI2S Capture",
  5780. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  5781. .platform_name = "msm-pcm-routing",
  5782. .codec_name = "msm-stub-codec.1",
  5783. .codec_dai_name = "msm-stub-tx",
  5784. .no_pcm = 1,
  5785. .dpcm_capture = 1,
  5786. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  5787. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5788. .ops = &msm_mi2s_be_ops,
  5789. .ignore_suspend = 1,
  5790. },
  5791. {
  5792. .name = LPASS_BE_TERT_MI2S_RX,
  5793. .stream_name = "Tertiary MI2S Playback",
  5794. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  5795. .platform_name = "msm-pcm-routing",
  5796. .codec_name = "msm-stub-codec.1",
  5797. .codec_dai_name = "msm-stub-rx",
  5798. .no_pcm = 1,
  5799. .dpcm_playback = 1,
  5800. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  5801. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5802. .ops = &msm_mi2s_be_ops,
  5803. .ignore_suspend = 1,
  5804. .ignore_pmdown_time = 1,
  5805. },
  5806. {
  5807. .name = LPASS_BE_TERT_MI2S_TX,
  5808. .stream_name = "Tertiary MI2S Capture",
  5809. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  5810. .platform_name = "msm-pcm-routing",
  5811. .codec_name = "msm-stub-codec.1",
  5812. .codec_dai_name = "msm-stub-tx",
  5813. .no_pcm = 1,
  5814. .dpcm_capture = 1,
  5815. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  5816. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5817. .ops = &msm_mi2s_be_ops,
  5818. .ignore_suspend = 1,
  5819. },
  5820. {
  5821. .name = LPASS_BE_QUAT_MI2S_RX,
  5822. .stream_name = "Quaternary MI2S Playback",
  5823. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5824. .platform_name = "msm-pcm-routing",
  5825. .codec_name = "msm-stub-codec.1",
  5826. .codec_dai_name = "msm-stub-rx",
  5827. .no_pcm = 1,
  5828. .dpcm_playback = 1,
  5829. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  5830. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5831. .ops = &msm_mi2s_be_ops,
  5832. .ignore_suspend = 1,
  5833. .ignore_pmdown_time = 1,
  5834. },
  5835. {
  5836. .name = LPASS_BE_QUAT_MI2S_TX,
  5837. .stream_name = "Quaternary MI2S Capture",
  5838. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5839. .platform_name = "msm-pcm-routing",
  5840. .codec_name = "msm-stub-codec.1",
  5841. .codec_dai_name = "msm-stub-tx",
  5842. .no_pcm = 1,
  5843. .dpcm_capture = 1,
  5844. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  5845. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5846. .ops = &msm_mi2s_be_ops,
  5847. .ignore_suspend = 1,
  5848. },
  5849. {
  5850. .name = LPASS_BE_QUIN_MI2S_RX,
  5851. .stream_name = "Quinary MI2S Playback",
  5852. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  5853. .platform_name = "msm-pcm-routing",
  5854. .codec_name = "msm-stub-codec.1",
  5855. .codec_dai_name = "msm-stub-rx",
  5856. .no_pcm = 1,
  5857. .dpcm_playback = 1,
  5858. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  5859. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5860. .ops = &msm_mi2s_be_ops,
  5861. .ignore_suspend = 1,
  5862. .ignore_pmdown_time = 1,
  5863. },
  5864. {
  5865. .name = LPASS_BE_QUIN_MI2S_TX,
  5866. .stream_name = "Quinary MI2S Capture",
  5867. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  5868. .platform_name = "msm-pcm-routing",
  5869. .codec_name = "msm-stub-codec.1",
  5870. .codec_dai_name = "msm-stub-tx",
  5871. .no_pcm = 1,
  5872. .dpcm_capture = 1,
  5873. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  5874. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5875. .ops = &msm_mi2s_be_ops,
  5876. .ignore_suspend = 1,
  5877. },
  5878. };
  5879. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  5880. /* Primary AUX PCM Backend DAI Links */
  5881. {
  5882. .name = LPASS_BE_AUXPCM_RX,
  5883. .stream_name = "AUX PCM Playback",
  5884. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5885. .platform_name = "msm-pcm-routing",
  5886. .codec_name = "msm-stub-codec.1",
  5887. .codec_dai_name = "msm-stub-rx",
  5888. .no_pcm = 1,
  5889. .dpcm_playback = 1,
  5890. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5891. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5892. .ignore_pmdown_time = 1,
  5893. .ignore_suspend = 1,
  5894. },
  5895. {
  5896. .name = LPASS_BE_AUXPCM_TX,
  5897. .stream_name = "AUX PCM Capture",
  5898. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5899. .platform_name = "msm-pcm-routing",
  5900. .codec_name = "msm-stub-codec.1",
  5901. .codec_dai_name = "msm-stub-tx",
  5902. .no_pcm = 1,
  5903. .dpcm_capture = 1,
  5904. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5905. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5906. .ignore_suspend = 1,
  5907. },
  5908. /* Secondary AUX PCM Backend DAI Links */
  5909. {
  5910. .name = LPASS_BE_SEC_AUXPCM_RX,
  5911. .stream_name = "Sec AUX PCM Playback",
  5912. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5913. .platform_name = "msm-pcm-routing",
  5914. .codec_name = "msm-stub-codec.1",
  5915. .codec_dai_name = "msm-stub-rx",
  5916. .no_pcm = 1,
  5917. .dpcm_playback = 1,
  5918. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  5919. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5920. .ignore_pmdown_time = 1,
  5921. .ignore_suspend = 1,
  5922. },
  5923. {
  5924. .name = LPASS_BE_SEC_AUXPCM_TX,
  5925. .stream_name = "Sec AUX PCM Capture",
  5926. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5927. .platform_name = "msm-pcm-routing",
  5928. .codec_name = "msm-stub-codec.1",
  5929. .codec_dai_name = "msm-stub-tx",
  5930. .no_pcm = 1,
  5931. .dpcm_capture = 1,
  5932. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  5933. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5934. .ignore_suspend = 1,
  5935. },
  5936. /* Tertiary AUX PCM Backend DAI Links */
  5937. {
  5938. .name = LPASS_BE_TERT_AUXPCM_RX,
  5939. .stream_name = "Tert AUX PCM Playback",
  5940. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5941. .platform_name = "msm-pcm-routing",
  5942. .codec_name = "msm-stub-codec.1",
  5943. .codec_dai_name = "msm-stub-rx",
  5944. .no_pcm = 1,
  5945. .dpcm_playback = 1,
  5946. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5947. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5948. .ignore_suspend = 1,
  5949. },
  5950. {
  5951. .name = LPASS_BE_TERT_AUXPCM_TX,
  5952. .stream_name = "Tert AUX PCM Capture",
  5953. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5954. .platform_name = "msm-pcm-routing",
  5955. .codec_name = "msm-stub-codec.1",
  5956. .codec_dai_name = "msm-stub-tx",
  5957. .no_pcm = 1,
  5958. .dpcm_capture = 1,
  5959. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5960. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5961. .ignore_suspend = 1,
  5962. },
  5963. /* Quaternary AUX PCM Backend DAI Links */
  5964. {
  5965. .name = LPASS_BE_QUAT_AUXPCM_RX,
  5966. .stream_name = "Quat AUX PCM Playback",
  5967. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5968. .platform_name = "msm-pcm-routing",
  5969. .codec_name = "msm-stub-codec.1",
  5970. .codec_dai_name = "msm-stub-rx",
  5971. .no_pcm = 1,
  5972. .dpcm_playback = 1,
  5973. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  5974. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5975. .ignore_pmdown_time = 1,
  5976. .ignore_suspend = 1,
  5977. },
  5978. {
  5979. .name = LPASS_BE_QUAT_AUXPCM_TX,
  5980. .stream_name = "Quat AUX PCM Capture",
  5981. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5982. .platform_name = "msm-pcm-routing",
  5983. .codec_name = "msm-stub-codec.1",
  5984. .codec_dai_name = "msm-stub-tx",
  5985. .no_pcm = 1,
  5986. .dpcm_capture = 1,
  5987. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  5988. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5989. .ignore_suspend = 1,
  5990. },
  5991. /* Quinary AUX PCM Backend DAI Links */
  5992. {
  5993. .name = LPASS_BE_QUIN_AUXPCM_RX,
  5994. .stream_name = "Quin AUX PCM Playback",
  5995. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  5996. .platform_name = "msm-pcm-routing",
  5997. .codec_name = "msm-stub-codec.1",
  5998. .codec_dai_name = "msm-stub-rx",
  5999. .no_pcm = 1,
  6000. .dpcm_playback = 1,
  6001. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6002. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6003. .ignore_pmdown_time = 1,
  6004. .ignore_suspend = 1,
  6005. },
  6006. {
  6007. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6008. .stream_name = "Quin AUX PCM Capture",
  6009. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6010. .platform_name = "msm-pcm-routing",
  6011. .codec_name = "msm-stub-codec.1",
  6012. .codec_dai_name = "msm-stub-tx",
  6013. .no_pcm = 1,
  6014. .dpcm_capture = 1,
  6015. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6016. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6017. .ignore_suspend = 1,
  6018. },
  6019. };
  6020. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6021. /* WSA CDC DMA Backend DAI Links */
  6022. {
  6023. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6024. .stream_name = "WSA CDC DMA0 Playback",
  6025. .cpu_dai_name = "msm-dai-cdc-dma.45056",
  6026. .platform_name = "msm-pcm-routing",
  6027. .codec_name = "bolero_codec",
  6028. .codec_dai_name = "wsa_macro_rx1",
  6029. .no_pcm = 1,
  6030. .dpcm_playback = 1,
  6031. .init = &msm_wsa_cdc_dma_init,
  6032. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6033. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6034. .ignore_pmdown_time = 1,
  6035. .ignore_suspend = 1,
  6036. .ops = &msm_cdc_dma_be_ops,
  6037. },
  6038. {
  6039. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  6040. .stream_name = "WSA CDC DMA0 Capture",
  6041. .cpu_dai_name = "msm-dai-cdc-dma.45057",
  6042. .platform_name = "msm-pcm-hostless",
  6043. .codec_name = "bolero_codec",
  6044. .codec_dai_name = "wsa_macro_vifeedback",
  6045. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  6046. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6047. .ignore_suspend = 1,
  6048. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6049. .ops = &msm_cdc_dma_be_ops,
  6050. },
  6051. {
  6052. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6053. .stream_name = "WSA CDC DMA1 Playback",
  6054. .cpu_dai_name = "msm-dai-cdc-dma.45058",
  6055. .platform_name = "msm-pcm-routing",
  6056. .codec_name = "bolero_codec",
  6057. .codec_dai_name = "wsa_macro_rx_mix",
  6058. .no_pcm = 1,
  6059. .dpcm_playback = 1,
  6060. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6061. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6062. .ignore_pmdown_time = 1,
  6063. .ignore_suspend = 1,
  6064. .ops = &msm_cdc_dma_be_ops,
  6065. },
  6066. {
  6067. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6068. .stream_name = "WSA CDC DMA1 Capture",
  6069. .cpu_dai_name = "msm-dai-cdc-dma.45059",
  6070. .platform_name = "msm-pcm-routing",
  6071. .codec_name = "bolero_codec",
  6072. .codec_dai_name = "wsa_macro_echo",
  6073. .no_pcm = 1,
  6074. .dpcm_capture = 1,
  6075. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6076. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6077. .ignore_suspend = 1,
  6078. .ops = &msm_cdc_dma_be_ops,
  6079. },
  6080. {
  6081. .name = LPASS_BE_WSA_CDC_DMA_TX_2,
  6082. .stream_name = "WSA CDC DMA2 Capture",
  6083. .cpu_dai_name = "msm-dai-cdc-dma.45061",
  6084. .platform_name = "msm-pcm-routing",
  6085. .codec_name = "bolero_codec",
  6086. .codec_dai_name = "msm-stub-tx",
  6087. .no_pcm = 1,
  6088. .dpcm_capture = 1,
  6089. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2,
  6090. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6091. .ignore_suspend = 1,
  6092. .ops = &msm_cdc_dma_be_ops,
  6093. },
  6094. };
  6095. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  6096. {
  6097. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  6098. .stream_name = "VA CDC DMA0 Capture",
  6099. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  6100. .platform_name = "msm-pcm-routing",
  6101. .codec_name = "bolero_codec",
  6102. .codec_dai_name = "va_macro_tx1",
  6103. .no_pcm = 1,
  6104. .dpcm_capture = 1,
  6105. .init = &msm_va_cdc_dma_init,
  6106. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  6107. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6108. .ignore_suspend = 1,
  6109. .ops = &msm_cdc_dma_be_ops,
  6110. },
  6111. {
  6112. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  6113. .stream_name = "VA CDC DMA1 Capture",
  6114. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  6115. .platform_name = "msm-pcm-routing",
  6116. .codec_name = "bolero_codec",
  6117. .codec_dai_name = "va_macro_tx2",
  6118. .no_pcm = 1,
  6119. .dpcm_capture = 1,
  6120. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  6121. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6122. .ignore_suspend = 1,
  6123. .ops = &msm_cdc_dma_be_ops,
  6124. },
  6125. };
  6126. static struct snd_soc_dai_link msm_qcs405_dai_links[
  6127. ARRAY_SIZE(msm_common_dai_links) +
  6128. ARRAY_SIZE(msm_tasha_fe_dai_links) +
  6129. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6130. ARRAY_SIZE(msm_common_be_dai_links) +
  6131. ARRAY_SIZE(msm_tasha_be_dai_links) +
  6132. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6133. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6134. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6135. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  6136. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links)];
  6137. static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card)
  6138. {
  6139. int ret = 0;
  6140. ret = audio_notifier_register("qcs405", AUDIO_NOTIFIER_ADSP_DOMAIN,
  6141. &service_nb);
  6142. if (ret < 0)
  6143. pr_err("%s: Audio notifier register failed ret = %d\n",
  6144. __func__, ret);
  6145. return ret;
  6146. }
  6147. static int msm_snd_vad_cfg_put(struct snd_kcontrol *kcontrol,
  6148. struct snd_ctl_elem_value *ucontrol)
  6149. {
  6150. int ret = 0;
  6151. int port_id;
  6152. uint32_t vad_enable = ucontrol->value.integer.value[0];
  6153. uint32_t preroll_config = ucontrol->value.integer.value[1];
  6154. uint32_t vad_intf = ucontrol->value.integer.value[2];
  6155. if ((preroll_config < 0) || (preroll_config > 1000) ||
  6156. (vad_enable < 0) || (vad_enable > 1) ||
  6157. (vad_intf > MSM_BACKEND_DAI_MAX)) {
  6158. pr_err("%s: Invalid arguments\n", __func__);
  6159. ret = -EINVAL;
  6160. goto done;
  6161. }
  6162. pr_debug("%s: vad_enable=%d preroll_config=%d vad_intf=%d\n", __func__,
  6163. vad_enable, preroll_config, vad_intf);
  6164. ret = msm_vad_get_portid_from_beid(vad_intf, &port_id);
  6165. if (ret) {
  6166. pr_err("%s: Invalid vad interface\n", __func__);
  6167. goto done;
  6168. }
  6169. afe_set_vad_cfg(vad_enable, preroll_config, port_id);
  6170. done:
  6171. return ret;
  6172. }
  6173. static int msm_snd_card_codec_late_probe(struct snd_soc_card *card)
  6174. {
  6175. int ret = 0;
  6176. uint32_t tasha_codec = 0;
  6177. ret = afe_cal_init_hwdep(card);
  6178. if (ret) {
  6179. dev_err(card->dev, "afe cal hwdep init failed (%d)\n", ret);
  6180. ret = 0;
  6181. }
  6182. /* tasha late probe when it is present */
  6183. ret = of_property_read_u32(card->dev->of_node, "qcom,tasha-codec",
  6184. &tasha_codec);
  6185. if (ret) {
  6186. dev_err(card->dev, "%s: No DT match tasha codec\n", __func__);
  6187. ret = 0;
  6188. } else {
  6189. if (tasha_codec) {
  6190. ret = msm_snd_card_tasha_late_probe(card);
  6191. if (ret)
  6192. dev_err(card->dev, "%s: tasha late probe err\n",
  6193. __func__);
  6194. }
  6195. }
  6196. return ret;
  6197. }
  6198. struct snd_soc_card snd_soc_card_qcs405_msm = {
  6199. .name = "qcs405-snd-card",
  6200. .controls = msm_snd_controls,
  6201. .num_controls = ARRAY_SIZE(msm_snd_controls),
  6202. .late_probe = msm_snd_card_codec_late_probe,
  6203. };
  6204. static int msm_populate_dai_link_component_of_node(
  6205. struct snd_soc_card *card)
  6206. {
  6207. int i, index, ret = 0;
  6208. struct device *cdev = card->dev;
  6209. struct snd_soc_dai_link *dai_link = card->dai_link;
  6210. struct device_node *np;
  6211. if (!cdev) {
  6212. pr_err("%s: Sound card device memory NULL\n", __func__);
  6213. return -ENODEV;
  6214. }
  6215. for (i = 0; i < card->num_links; i++) {
  6216. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6217. continue;
  6218. /* populate platform_of_node for snd card dai links */
  6219. if (dai_link[i].platform_name &&
  6220. !dai_link[i].platform_of_node) {
  6221. index = of_property_match_string(cdev->of_node,
  6222. "asoc-platform-names",
  6223. dai_link[i].platform_name);
  6224. if (index < 0) {
  6225. pr_err("%s: No match found for platform name: %s\n",
  6226. __func__, dai_link[i].platform_name);
  6227. ret = index;
  6228. goto err;
  6229. }
  6230. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6231. index);
  6232. if (!np) {
  6233. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6234. __func__, dai_link[i].platform_name,
  6235. index);
  6236. ret = -ENODEV;
  6237. goto err;
  6238. }
  6239. dai_link[i].platform_of_node = np;
  6240. dai_link[i].platform_name = NULL;
  6241. }
  6242. /* populate cpu_of_node for snd card dai links */
  6243. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6244. index = of_property_match_string(cdev->of_node,
  6245. "asoc-cpu-names",
  6246. dai_link[i].cpu_dai_name);
  6247. if (index >= 0) {
  6248. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6249. index);
  6250. if (!np) {
  6251. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6252. __func__,
  6253. dai_link[i].cpu_dai_name);
  6254. ret = -ENODEV;
  6255. goto err;
  6256. }
  6257. dai_link[i].cpu_of_node = np;
  6258. dai_link[i].cpu_dai_name = NULL;
  6259. }
  6260. }
  6261. /* populate codec_of_node for snd card dai links */
  6262. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6263. index = of_property_match_string(cdev->of_node,
  6264. "asoc-codec-names",
  6265. dai_link[i].codec_name);
  6266. if (index < 0)
  6267. continue;
  6268. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6269. index);
  6270. if (!np) {
  6271. pr_err("%s: retrieving phandle for codec %s failed\n",
  6272. __func__, dai_link[i].codec_name);
  6273. ret = -ENODEV;
  6274. goto err;
  6275. }
  6276. dai_link[i].codec_of_node = np;
  6277. dai_link[i].codec_name = NULL;
  6278. }
  6279. }
  6280. err:
  6281. return ret;
  6282. }
  6283. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6284. /* FrontEnd DAI Links */
  6285. {
  6286. .name = "MSMSTUB Media1",
  6287. .stream_name = "MultiMedia1",
  6288. .cpu_dai_name = "MultiMedia1",
  6289. .platform_name = "msm-pcm-dsp.0",
  6290. .dynamic = 1,
  6291. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6292. .dpcm_playback = 1,
  6293. .dpcm_capture = 1,
  6294. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6295. SND_SOC_DPCM_TRIGGER_POST},
  6296. .codec_dai_name = "snd-soc-dummy-dai",
  6297. .codec_name = "snd-soc-dummy",
  6298. .ignore_suspend = 1,
  6299. /* this dainlink has playback support */
  6300. .ignore_pmdown_time = 1,
  6301. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6302. },
  6303. };
  6304. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6305. /* Backend DAI Links */
  6306. {
  6307. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  6308. .stream_name = "VA CDC DMA0 Capture",
  6309. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  6310. .platform_name = "msm-pcm-routing",
  6311. .codec_name = "bolero_codec",
  6312. .codec_dai_name = "va_macro_tx1",
  6313. .no_pcm = 1,
  6314. .dpcm_capture = 1,
  6315. .init = &msm_va_cdc_dma_init,
  6316. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  6317. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6318. .ignore_suspend = 1,
  6319. .ops = &msm_cdc_dma_be_ops,
  6320. },
  6321. {
  6322. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  6323. .stream_name = "VA CDC DMA1 Capture",
  6324. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  6325. .platform_name = "msm-pcm-routing",
  6326. .codec_name = "bolero_codec",
  6327. .codec_dai_name = "va_macro_tx2",
  6328. .no_pcm = 1,
  6329. .dpcm_capture = 1,
  6330. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  6331. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6332. .ignore_suspend = 1,
  6333. .ops = &msm_cdc_dma_be_ops,
  6334. },
  6335. };
  6336. static struct snd_soc_dai_link msm_stub_dai_links[
  6337. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6338. ARRAY_SIZE(msm_stub_be_dai_links)];
  6339. struct snd_soc_card snd_soc_card_stub_msm = {
  6340. .name = "qcs405-stub-snd-card",
  6341. };
  6342. static const struct of_device_id qcs405_asoc_machine_of_match[] = {
  6343. { .compatible = "qcom,qcs405-asoc-snd",
  6344. .data = "codec"},
  6345. { .compatible = "qcom,qcs405-asoc-snd-stub",
  6346. .data = "stub_codec"},
  6347. {},
  6348. };
  6349. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6350. {
  6351. struct snd_soc_card *card = NULL;
  6352. struct snd_soc_dai_link *dailink;
  6353. int total_links = 0;
  6354. uint32_t tasha_codec = 0, auxpcm_audio_intf = 0;
  6355. uint32_t va_bolero_codec = 0, wsa_bolero_codec = 0, mi2s_audio_intf = 0;
  6356. const struct of_device_id *match;
  6357. int rc = 0;
  6358. match = of_match_node(qcs405_asoc_machine_of_match, dev->of_node);
  6359. if (!match) {
  6360. dev_err(dev, "%s: No DT match found for sound card\n",
  6361. __func__);
  6362. return NULL;
  6363. }
  6364. if (!strcmp(match->data, "codec")) {
  6365. card = &snd_soc_card_qcs405_msm;
  6366. memcpy(msm_qcs405_dai_links + total_links,
  6367. msm_common_dai_links,
  6368. sizeof(msm_common_dai_links));
  6369. total_links += ARRAY_SIZE(msm_common_dai_links);
  6370. rc = of_property_read_u32(dev->of_node, "qcom,tasha-codec",
  6371. &tasha_codec);
  6372. if (rc) {
  6373. dev_dbg(dev, "%s: No DT match tasha codec\n",
  6374. __func__);
  6375. } else {
  6376. if (tasha_codec) {
  6377. dev_dbg(dev, "%s(): Tasha codec is present\n",
  6378. __func__);
  6379. memcpy(msm_qcs405_dai_links + total_links,
  6380. msm_tasha_fe_dai_links,
  6381. sizeof(msm_tasha_fe_dai_links));
  6382. total_links +=
  6383. ARRAY_SIZE(msm_tasha_fe_dai_links);
  6384. }
  6385. }
  6386. memcpy(msm_qcs405_dai_links + total_links,
  6387. msm_common_misc_fe_dai_links,
  6388. sizeof(msm_common_misc_fe_dai_links));
  6389. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  6390. memcpy(msm_qcs405_dai_links + total_links,
  6391. msm_common_be_dai_links,
  6392. sizeof(msm_common_be_dai_links));
  6393. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  6394. if (tasha_codec) {
  6395. memcpy(msm_qcs405_dai_links + total_links,
  6396. msm_tasha_be_dai_links,
  6397. sizeof(msm_tasha_be_dai_links));
  6398. total_links += ARRAY_SIZE(msm_tasha_be_dai_links);
  6399. }
  6400. rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
  6401. &va_bolero_codec);
  6402. if (rc) {
  6403. dev_dbg(dev, "%s: No DT match VA Macro codec\n",
  6404. __func__);
  6405. } else {
  6406. if (va_bolero_codec) {
  6407. dev_dbg(dev, "%s(): VA macro in bolero codec present\n",
  6408. __func__);
  6409. memcpy(msm_qcs405_dai_links + total_links,
  6410. msm_va_cdc_dma_be_dai_links,
  6411. sizeof(msm_va_cdc_dma_be_dai_links));
  6412. total_links +=
  6413. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  6414. }
  6415. }
  6416. rc = of_property_read_u32(dev->of_node, "qcom,wsa-bolero-codec",
  6417. &wsa_bolero_codec);
  6418. if (rc) {
  6419. dev_dbg(dev, "%s: No DT match WSA Macro codec\n",
  6420. __func__);
  6421. } else {
  6422. if (wsa_bolero_codec) {
  6423. dev_dbg(dev, "%s(): WSAmacro in bolero codec present\n",
  6424. __func__);
  6425. memcpy(msm_qcs405_dai_links + total_links,
  6426. msm_wsa_cdc_dma_be_dai_links,
  6427. sizeof(msm_wsa_cdc_dma_be_dai_links));
  6428. total_links +=
  6429. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  6430. }
  6431. }
  6432. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  6433. &mi2s_audio_intf);
  6434. if (rc) {
  6435. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  6436. __func__);
  6437. } else {
  6438. if (mi2s_audio_intf) {
  6439. memcpy(msm_qcs405_dai_links + total_links,
  6440. msm_mi2s_be_dai_links,
  6441. sizeof(msm_mi2s_be_dai_links));
  6442. total_links +=
  6443. ARRAY_SIZE(msm_mi2s_be_dai_links);
  6444. }
  6445. }
  6446. rc = of_property_read_u32(dev->of_node,
  6447. "qcom,auxpcm-audio-intf",
  6448. &auxpcm_audio_intf);
  6449. if (rc) {
  6450. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  6451. __func__);
  6452. } else {
  6453. if (auxpcm_audio_intf) {
  6454. memcpy(msm_qcs405_dai_links + total_links,
  6455. msm_auxpcm_be_dai_links,
  6456. sizeof(msm_auxpcm_be_dai_links));
  6457. total_links +=
  6458. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  6459. }
  6460. }
  6461. dailink = msm_qcs405_dai_links;
  6462. } else if (!strcmp(match->data, "stub_codec")) {
  6463. card = &snd_soc_card_stub_msm;
  6464. memcpy(msm_stub_dai_links + total_links,
  6465. msm_stub_fe_dai_links,
  6466. sizeof(msm_stub_fe_dai_links));
  6467. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  6468. memcpy(msm_stub_dai_links + total_links,
  6469. msm_stub_be_dai_links,
  6470. sizeof(msm_stub_be_dai_links));
  6471. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  6472. dailink = msm_stub_dai_links;
  6473. }
  6474. if (card) {
  6475. card->dai_link = dailink;
  6476. card->num_links = total_links;
  6477. }
  6478. return card;
  6479. }
  6480. static int msm_wsa881x_init(struct snd_soc_component *component)
  6481. {
  6482. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  6483. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  6484. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  6485. SPKR_L_BOOST, SPKR_L_VI};
  6486. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  6487. SPKR_R_BOOST, SPKR_R_VI};
  6488. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  6489. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  6490. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  6491. struct msm_asoc_mach_data *pdata;
  6492. struct snd_soc_dapm_context *dapm;
  6493. int ret = 0;
  6494. if (!codec) {
  6495. pr_err("%s codec is NULL\n", __func__);
  6496. return -EINVAL;
  6497. }
  6498. dapm = snd_soc_codec_get_dapm(codec);
  6499. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  6500. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  6501. __func__, codec->component.name);
  6502. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  6503. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  6504. &ch_rate[0], &spkleft_port_types[0]);
  6505. if (dapm->component) {
  6506. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  6507. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  6508. }
  6509. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  6510. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  6511. __func__, codec->component.name);
  6512. wsa881x_set_channel_map(codec, &spkright_ports[0],
  6513. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  6514. &ch_rate[0], &spkright_port_types[0]);
  6515. if (dapm->component) {
  6516. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  6517. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  6518. }
  6519. } else {
  6520. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  6521. codec->component.name);
  6522. ret = -EINVAL;
  6523. goto err;
  6524. }
  6525. pdata = snd_soc_card_get_drvdata(component->card);
  6526. if (pdata && pdata->codec_root)
  6527. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  6528. codec);
  6529. err:
  6530. return ret;
  6531. }
  6532. static int msm_init_wsa_dev(struct platform_device *pdev,
  6533. struct snd_soc_card *card)
  6534. {
  6535. struct device_node *wsa_of_node;
  6536. u32 wsa_max_devs;
  6537. u32 wsa_dev_cnt;
  6538. int i;
  6539. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  6540. const char *wsa_auxdev_name_prefix[1];
  6541. char *dev_name_str = NULL;
  6542. int found = 0;
  6543. int ret = 0;
  6544. /* Get maximum WSA device count for this platform */
  6545. ret = of_property_read_u32(pdev->dev.of_node,
  6546. "qcom,wsa-max-devs", &wsa_max_devs);
  6547. if (ret) {
  6548. dev_info(&pdev->dev,
  6549. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  6550. __func__, pdev->dev.of_node->full_name, ret);
  6551. card->num_aux_devs = 0;
  6552. return 0;
  6553. }
  6554. if (wsa_max_devs == 0) {
  6555. dev_warn(&pdev->dev,
  6556. "%s: Max WSA devices is 0 for this target?\n",
  6557. __func__);
  6558. card->num_aux_devs = 0;
  6559. return 0;
  6560. }
  6561. /* Get count of WSA device phandles for this platform */
  6562. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  6563. "qcom,wsa-devs", NULL);
  6564. if (wsa_dev_cnt == -ENOENT) {
  6565. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  6566. __func__);
  6567. goto err;
  6568. } else if (wsa_dev_cnt <= 0) {
  6569. dev_err(&pdev->dev,
  6570. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  6571. __func__, wsa_dev_cnt);
  6572. ret = -EINVAL;
  6573. goto err;
  6574. }
  6575. /*
  6576. * Expect total phandles count to be NOT less than maximum possible
  6577. * WSA count. However, if it is less, then assign same value to
  6578. * max count as well.
  6579. */
  6580. if (wsa_dev_cnt < wsa_max_devs) {
  6581. dev_dbg(&pdev->dev,
  6582. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  6583. __func__, wsa_max_devs, wsa_dev_cnt);
  6584. wsa_max_devs = wsa_dev_cnt;
  6585. }
  6586. /* Make sure prefix string passed for each WSA device */
  6587. ret = of_property_count_strings(pdev->dev.of_node,
  6588. "qcom,wsa-aux-dev-prefix");
  6589. if (ret != wsa_dev_cnt) {
  6590. dev_err(&pdev->dev,
  6591. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  6592. __func__, wsa_dev_cnt, ret);
  6593. ret = -EINVAL;
  6594. goto err;
  6595. }
  6596. /*
  6597. * Alloc mem to store phandle and index info of WSA device, if already
  6598. * registered with ALSA core
  6599. */
  6600. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  6601. sizeof(struct msm_wsa881x_dev_info),
  6602. GFP_KERNEL);
  6603. if (!wsa881x_dev_info) {
  6604. ret = -ENOMEM;
  6605. goto err;
  6606. }
  6607. /*
  6608. * search and check whether all WSA devices are already
  6609. * registered with ALSA core or not. If found a node, store
  6610. * the node and the index in a local array of struct for later
  6611. * use.
  6612. */
  6613. for (i = 0; i < wsa_dev_cnt; i++) {
  6614. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  6615. "qcom,wsa-devs", i);
  6616. if (unlikely(!wsa_of_node)) {
  6617. /* we should not be here */
  6618. dev_err(&pdev->dev,
  6619. "%s: wsa dev node is not present\n",
  6620. __func__);
  6621. ret = -EINVAL;
  6622. goto err_free_dev_info;
  6623. }
  6624. if (soc_find_component(wsa_of_node, NULL)) {
  6625. /* WSA device registered with ALSA core */
  6626. wsa881x_dev_info[found].of_node = wsa_of_node;
  6627. wsa881x_dev_info[found].index = i;
  6628. found++;
  6629. if (found == wsa_max_devs)
  6630. break;
  6631. }
  6632. }
  6633. if (found < wsa_max_devs) {
  6634. dev_dbg(&pdev->dev,
  6635. "%s: failed to find %d components. Found only %d\n",
  6636. __func__, wsa_max_devs, found);
  6637. return -EPROBE_DEFER;
  6638. }
  6639. dev_info(&pdev->dev,
  6640. "%s: found %d wsa881x devices registered with ALSA core\n",
  6641. __func__, found);
  6642. card->num_aux_devs = wsa_max_devs;
  6643. card->num_configs = wsa_max_devs;
  6644. /* Alloc array of AUX devs struct */
  6645. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  6646. sizeof(struct snd_soc_aux_dev),
  6647. GFP_KERNEL);
  6648. if (!msm_aux_dev) {
  6649. ret = -ENOMEM;
  6650. goto err_free_dev_info;
  6651. }
  6652. /* Alloc array of codec conf struct */
  6653. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  6654. sizeof(struct snd_soc_codec_conf),
  6655. GFP_KERNEL);
  6656. if (!msm_codec_conf) {
  6657. ret = -ENOMEM;
  6658. goto err_free_aux_dev;
  6659. }
  6660. for (i = 0; i < card->num_aux_devs; i++) {
  6661. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  6662. GFP_KERNEL);
  6663. if (!dev_name_str) {
  6664. ret = -ENOMEM;
  6665. goto err_free_cdc_conf;
  6666. }
  6667. ret = of_property_read_string_index(pdev->dev.of_node,
  6668. "qcom,wsa-aux-dev-prefix",
  6669. wsa881x_dev_info[i].index,
  6670. wsa_auxdev_name_prefix);
  6671. if (ret) {
  6672. dev_err(&pdev->dev,
  6673. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  6674. __func__, ret);
  6675. ret = -EINVAL;
  6676. goto err_free_dev_name_str;
  6677. }
  6678. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  6679. msm_aux_dev[i].name = dev_name_str;
  6680. msm_aux_dev[i].codec_name = NULL;
  6681. msm_aux_dev[i].codec_of_node =
  6682. wsa881x_dev_info[i].of_node;
  6683. msm_aux_dev[i].init = msm_wsa881x_init;
  6684. msm_codec_conf[i].dev_name = NULL;
  6685. msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
  6686. msm_codec_conf[i].of_node =
  6687. wsa881x_dev_info[i].of_node;
  6688. }
  6689. card->codec_conf = msm_codec_conf;
  6690. card->aux_dev = msm_aux_dev;
  6691. return 0;
  6692. err_free_dev_name_str:
  6693. devm_kfree(&pdev->dev, dev_name_str);
  6694. err_free_cdc_conf:
  6695. devm_kfree(&pdev->dev, msm_codec_conf);
  6696. err_free_aux_dev:
  6697. devm_kfree(&pdev->dev, msm_aux_dev);
  6698. err_free_dev_info:
  6699. devm_kfree(&pdev->dev, wsa881x_dev_info);
  6700. err:
  6701. return ret;
  6702. }
  6703. static int msm_csra66x0_init(struct snd_soc_component *component)
  6704. {
  6705. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  6706. if (!codec) {
  6707. pr_err("%s codec is NULL\n", __func__);
  6708. return -EINVAL;
  6709. }
  6710. return 0;
  6711. }
  6712. static int msm_init_csra_dev(struct platform_device *pdev,
  6713. struct snd_soc_card *card)
  6714. {
  6715. struct device_node *csra_of_node;
  6716. u32 csra_max_devs;
  6717. u32 csra_dev_cnt;
  6718. char *dev_name_str = NULL;
  6719. struct msm_csra66x0_dev_info *csra66x0_dev_info;
  6720. const char *csra_auxdev_name_prefix[1];
  6721. int i;
  6722. int found = 0;
  6723. int ret = 0;
  6724. /* Get maximum CSRA device count for this platform */
  6725. ret = of_property_read_u32(pdev->dev.of_node,
  6726. "qcom,csra-max-devs", &csra_max_devs);
  6727. if (ret) {
  6728. dev_info(&pdev->dev,
  6729. "%s: csra-max-devs property missing in DT %s, ret = %d\n",
  6730. __func__, pdev->dev.of_node->full_name, ret);
  6731. card->num_aux_devs = 0;
  6732. return 0;
  6733. }
  6734. if (csra_max_devs == 0) {
  6735. dev_warn(&pdev->dev,
  6736. "%s: Max CSRA devices is 0 for this target?\n",
  6737. __func__);
  6738. return 0;
  6739. }
  6740. /* Get count of CSRA device phandles for this platform */
  6741. csra_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  6742. "qcom,csra-devs", NULL);
  6743. if (csra_dev_cnt == -ENOENT) {
  6744. dev_warn(&pdev->dev, "%s: No csra device defined in DT.\n",
  6745. __func__);
  6746. goto err;
  6747. } else if (csra_dev_cnt <= 0) {
  6748. dev_err(&pdev->dev,
  6749. "%s: Error reading csra device from DT. csra_dev_cnt = %d\n",
  6750. __func__, csra_dev_cnt);
  6751. ret = -EINVAL;
  6752. goto err;
  6753. }
  6754. /*
  6755. * Expect total phandles count to be NOT less than maximum possible
  6756. * CSRA count. However, if it is less, then assign same value to
  6757. * max count as well.
  6758. */
  6759. if (csra_dev_cnt < csra_max_devs) {
  6760. dev_dbg(&pdev->dev,
  6761. "%s: csra_max_devs = %d cannot exceed csra_dev_cnt = %d\n",
  6762. __func__, csra_max_devs, csra_dev_cnt);
  6763. csra_max_devs = csra_dev_cnt;
  6764. }
  6765. /* Make sure prefix string passed for each CSRA device */
  6766. ret = of_property_count_strings(pdev->dev.of_node,
  6767. "qcom,csra-aux-dev-prefix");
  6768. if (ret != csra_dev_cnt) {
  6769. dev_err(&pdev->dev,
  6770. "%s: expecting %d csra prefix. Defined only %d in DT\n",
  6771. __func__, csra_dev_cnt, ret);
  6772. ret = -EINVAL;
  6773. goto err;
  6774. }
  6775. /*
  6776. * Alloc mem to store phandle and index info of CSRA device, if already
  6777. * registered with ALSA core
  6778. */
  6779. csra66x0_dev_info = devm_kcalloc(&pdev->dev, csra_max_devs,
  6780. sizeof(struct msm_csra66x0_dev_info),
  6781. GFP_KERNEL);
  6782. if (!csra66x0_dev_info) {
  6783. ret = -ENOMEM;
  6784. goto err;
  6785. }
  6786. /*
  6787. * search and check whether all CSRA devices are already
  6788. * registered with ALSA core or not. If found a node, store
  6789. * the node and the index in a local array of struct for later
  6790. * use.
  6791. */
  6792. for (i = 0; i < csra_dev_cnt; i++) {
  6793. csra_of_node = of_parse_phandle(pdev->dev.of_node,
  6794. "qcom,csra-devs", i);
  6795. if (unlikely(!csra_of_node)) {
  6796. /* we should not be here */
  6797. dev_err(&pdev->dev,
  6798. "%s: csra dev node is not present\n",
  6799. __func__);
  6800. ret = -EINVAL;
  6801. goto err_free_dev_info;
  6802. }
  6803. if (soc_find_component(csra_of_node, NULL)) {
  6804. /* CSRA device registered with ALSA core */
  6805. csra66x0_dev_info[found].of_node = csra_of_node;
  6806. csra66x0_dev_info[found].index = i;
  6807. found++;
  6808. if (found == csra_max_devs)
  6809. break;
  6810. }
  6811. }
  6812. if (found < csra_max_devs) {
  6813. dev_dbg(&pdev->dev,
  6814. "%s: failed to find %d components. Found only %d\n",
  6815. __func__, csra_max_devs, found);
  6816. return -EPROBE_DEFER;
  6817. }
  6818. dev_info(&pdev->dev,
  6819. "%s: found %d csra66x0 devices registered with ALSA core\n",
  6820. __func__, found);
  6821. card->num_aux_devs = csra_max_devs;
  6822. card->num_configs = csra_max_devs;
  6823. /* Alloc array of AUX devs struct */
  6824. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  6825. sizeof(struct snd_soc_aux_dev), GFP_KERNEL);
  6826. if (!msm_aux_dev) {
  6827. ret = -ENOMEM;
  6828. goto err_free_dev_info;
  6829. }
  6830. /* Alloc array of codec conf struct */
  6831. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  6832. sizeof(struct snd_soc_codec_conf), GFP_KERNEL);
  6833. if (!msm_codec_conf) {
  6834. ret = -ENOMEM;
  6835. goto err_free_aux_dev;
  6836. }
  6837. for (i = 0; i < card->num_aux_devs; i++) {
  6838. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  6839. GFP_KERNEL);
  6840. if (!dev_name_str) {
  6841. ret = -ENOMEM;
  6842. goto err_free_cdc_conf;
  6843. }
  6844. ret = of_property_read_string_index(pdev->dev.of_node,
  6845. "qcom,csra-aux-dev-prefix",
  6846. csra66x0_dev_info[i].index,
  6847. csra_auxdev_name_prefix);
  6848. if (ret) {
  6849. dev_err(&pdev->dev,
  6850. "%s: failed to read csra aux dev prefix, ret = %d\n",
  6851. __func__, ret);
  6852. ret = -EINVAL;
  6853. goto err_free_dev_name_str;
  6854. }
  6855. snprintf(dev_name_str, strlen("csra66x0.%d"), "csra66x0.%d", i);
  6856. msm_aux_dev[i].name = dev_name_str;
  6857. msm_aux_dev[i].codec_name = NULL;
  6858. msm_aux_dev[i].codec_of_node =
  6859. csra66x0_dev_info[i].of_node;
  6860. msm_aux_dev[i].init = msm_csra66x0_init; /* codec specific init */
  6861. msm_codec_conf[i].dev_name = NULL;
  6862. msm_codec_conf[i].name_prefix = csra_auxdev_name_prefix[0];
  6863. msm_codec_conf[i].of_node = csra66x0_dev_info[i].of_node;
  6864. }
  6865. card->codec_conf = msm_codec_conf;
  6866. card->aux_dev = msm_aux_dev;
  6867. return 0;
  6868. err_free_dev_name_str:
  6869. devm_kfree(&pdev->dev, dev_name_str);
  6870. err_free_cdc_conf:
  6871. devm_kfree(&pdev->dev, msm_codec_conf);
  6872. err_free_aux_dev:
  6873. devm_kfree(&pdev->dev, msm_aux_dev);
  6874. err_free_dev_info:
  6875. devm_kfree(&pdev->dev, csra66x0_dev_info);
  6876. err:
  6877. return ret;
  6878. }
  6879. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  6880. {
  6881. int count;
  6882. u32 mi2s_master_slave[MI2S_MAX];
  6883. int ret;
  6884. for (count = 0; count < MI2S_MAX; count++) {
  6885. mutex_init(&mi2s_intf_conf[count].lock);
  6886. mi2s_intf_conf[count].ref_cnt = 0;
  6887. }
  6888. ret = of_property_read_u32_array(pdev->dev.of_node,
  6889. "qcom,msm-mi2s-master",
  6890. mi2s_master_slave, MI2S_MAX);
  6891. if (ret) {
  6892. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  6893. __func__);
  6894. } else {
  6895. for (count = 0; count < MI2S_MAX; count++) {
  6896. mi2s_intf_conf[count].msm_is_mi2s_master =
  6897. mi2s_master_slave[count];
  6898. }
  6899. }
  6900. }
  6901. static void msm_i2s_auxpcm_deinit(void)
  6902. {
  6903. int count;
  6904. for (count = 0; count < MI2S_MAX; count++) {
  6905. mutex_destroy(&mi2s_intf_conf[count].lock);
  6906. mi2s_intf_conf[count].ref_cnt = 0;
  6907. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  6908. }
  6909. }
  6910. static int msm_asoc_machine_probe(struct platform_device *pdev)
  6911. {
  6912. struct snd_soc_card *card;
  6913. struct msm_asoc_mach_data *pdata;
  6914. int ret;
  6915. u32 val;
  6916. if (!pdev->dev.of_node) {
  6917. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  6918. return -EINVAL;
  6919. }
  6920. pdata = devm_kzalloc(&pdev->dev,
  6921. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  6922. if (!pdata)
  6923. return -ENOMEM;
  6924. card = populate_snd_card_dailinks(&pdev->dev);
  6925. if (!card) {
  6926. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  6927. ret = -EINVAL;
  6928. goto err;
  6929. }
  6930. card->dev = &pdev->dev;
  6931. platform_set_drvdata(pdev, card);
  6932. snd_soc_card_set_drvdata(card, pdata);
  6933. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  6934. if (ret) {
  6935. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  6936. ret);
  6937. goto err;
  6938. }
  6939. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  6940. if (ret) {
  6941. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  6942. ret);
  6943. goto err;
  6944. }
  6945. ret = msm_populate_dai_link_component_of_node(card);
  6946. if (ret) {
  6947. ret = -EPROBE_DEFER;
  6948. goto err;
  6949. }
  6950. ret = of_property_read_u32(pdev->dev.of_node, "qcom,csra-codec", &val);
  6951. if (ret) {
  6952. dev_info(&pdev->dev, "no 'qcom,csra-codec' in DT\n");
  6953. val = 0;
  6954. }
  6955. if (val) {
  6956. ret = msm_init_csra_dev(pdev, card);
  6957. if (ret)
  6958. goto err;
  6959. } else {
  6960. ret = msm_init_wsa_dev(pdev, card);
  6961. if (ret)
  6962. goto err;
  6963. }
  6964. pdata->dmic_01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6965. "qcom,cdc-dmic01-gpios",
  6966. 0);
  6967. pdata->dmic_23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6968. "qcom,cdc-dmic23-gpios",
  6969. 0);
  6970. pdata->dmic_45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6971. "qcom,cdc-dmic45-gpios",
  6972. 0);
  6973. pdata->dmic_67_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6974. "qcom,cdc-dmic67-gpios",
  6975. 0);
  6976. ret = devm_snd_soc_register_card(&pdev->dev, card);
  6977. if (ret == -EPROBE_DEFER) {
  6978. if (codec_reg_done)
  6979. ret = -EINVAL;
  6980. goto err;
  6981. } else if (ret) {
  6982. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  6983. ret);
  6984. goto err;
  6985. }
  6986. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  6987. spdev = pdev;
  6988. /* Parse pinctrl info from devicetree */
  6989. ret = msm_get_pinctrl(pdev);
  6990. if (!ret) {
  6991. pr_debug("%s: pinctrl parsing successful\n", __func__);
  6992. } else {
  6993. dev_dbg(&pdev->dev,
  6994. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  6995. __func__, ret);
  6996. ret = 0;
  6997. }
  6998. msm_i2s_auxpcm_init(pdev);
  6999. is_initial_boot = true;
  7000. return 0;
  7001. err:
  7002. msm_release_pinctrl(pdev);
  7003. return ret;
  7004. }
  7005. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7006. {
  7007. audio_notifier_deregister("qcs405");
  7008. msm_i2s_auxpcm_deinit();
  7009. msm_release_pinctrl(pdev);
  7010. return 0;
  7011. }
  7012. static struct platform_driver qcs405_asoc_machine_driver = {
  7013. .driver = {
  7014. .name = DRV_NAME,
  7015. .owner = THIS_MODULE,
  7016. .pm = &snd_soc_pm_ops,
  7017. .of_match_table = qcs405_asoc_machine_of_match,
  7018. },
  7019. .probe = msm_asoc_machine_probe,
  7020. .remove = msm_asoc_machine_remove,
  7021. };
  7022. module_platform_driver(qcs405_asoc_machine_driver);
  7023. MODULE_DESCRIPTION("ALSA SoC QCS405 Machine driver");
  7024. MODULE_LICENSE("GPL v2");
  7025. MODULE_ALIAS("platform:" DRV_NAME);
  7026. MODULE_DEVICE_TABLE(of, qcs405_asoc_machine_of_match);