dp_rx.c 96 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #include "enet.h"
  45. #ifndef WLAN_SOFTUMAC_SUPPORT /* WLAN_SOFTUMAC_SUPPORT */
  46. #ifdef DUP_RX_DESC_WAR
  47. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  48. hal_ring_handle_t hal_ring,
  49. hal_ring_desc_t ring_desc,
  50. struct dp_rx_desc *rx_desc)
  51. {
  52. void *hal_soc = soc->hal_soc;
  53. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  54. dp_rx_desc_dump(rx_desc);
  55. }
  56. #else
  57. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  58. hal_ring_handle_t hal_ring_hdl,
  59. hal_ring_desc_t ring_desc,
  60. struct dp_rx_desc *rx_desc)
  61. {
  62. hal_soc_handle_t hal_soc = soc->hal_soc;
  63. dp_rx_desc_dump(rx_desc);
  64. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  65. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  66. qdf_assert_always(0);
  67. }
  68. #endif
  69. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  70. #ifdef RX_DESC_SANITY_WAR
  71. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  72. hal_ring_handle_t hal_ring_hdl,
  73. hal_ring_desc_t ring_desc,
  74. struct dp_rx_desc *rx_desc)
  75. {
  76. uint8_t return_buffer_manager;
  77. if (qdf_unlikely(!rx_desc)) {
  78. /*
  79. * This is an unlikely case where the cookie obtained
  80. * from the ring_desc is invalid and hence we are not
  81. * able to find the corresponding rx_desc
  82. */
  83. goto fail;
  84. }
  85. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  86. if (qdf_unlikely(!(return_buffer_manager ==
  87. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  88. return_buffer_manager ==
  89. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  90. goto fail;
  91. }
  92. return QDF_STATUS_SUCCESS;
  93. fail:
  94. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  95. dp_err("Ring Desc:");
  96. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  97. ring_desc);
  98. return QDF_STATUS_E_NULL_VALUE;
  99. }
  100. #endif
  101. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  102. hal_ring_handle_t hal_ring_hdl,
  103. uint32_t num_entries,
  104. bool *near_full)
  105. {
  106. uint32_t num_pending = 0;
  107. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  108. hal_ring_hdl,
  109. true);
  110. if (num_entries && (num_pending >= num_entries >> 1))
  111. *near_full = true;
  112. else
  113. *near_full = false;
  114. return num_pending;
  115. }
  116. #ifdef RX_DESC_DEBUG_CHECK
  117. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  118. hal_ring_desc_t ring_desc,
  119. struct dp_rx_desc *rx_desc)
  120. {
  121. struct hal_buf_info hbi;
  122. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  123. /* Sanity check for possible buffer paddr corruption */
  124. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  125. return QDF_STATUS_SUCCESS;
  126. return QDF_STATUS_E_FAILURE;
  127. }
  128. /**
  129. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  130. * out of bound access from H.W
  131. *
  132. * @soc: DP soc
  133. * @pkt_len: Packet length received from H.W
  134. *
  135. * Return: NONE
  136. */
  137. static inline void
  138. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  139. uint32_t pkt_len)
  140. {
  141. struct rx_desc_pool *rx_desc_pool;
  142. rx_desc_pool = &soc->rx_desc_buf[0];
  143. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  144. }
  145. #else
  146. static inline void
  147. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  148. #endif
  149. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  150. void
  151. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  152. hal_ring_desc_t ring_desc)
  153. {
  154. struct dp_buf_info_record *record;
  155. struct hal_buf_info hbi;
  156. uint32_t idx;
  157. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  158. return;
  159. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  160. /* buffer_addr_info is the first element of ring_desc */
  161. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  162. &hbi);
  163. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  164. DP_RX_HIST_MAX);
  165. /* No NULL check needed for record since its an array */
  166. record = &soc->rx_ring_history[ring_num]->entry[idx];
  167. record->timestamp = qdf_get_log_timestamp();
  168. record->hbi.paddr = hbi.paddr;
  169. record->hbi.sw_cookie = hbi.sw_cookie;
  170. record->hbi.rbm = hbi.rbm;
  171. }
  172. #endif
  173. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  174. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  175. uint8_t *rx_tlv,
  176. qdf_nbuf_t nbuf)
  177. {
  178. struct dp_soc *soc;
  179. if (!pdev->is_first_wakeup_packet)
  180. return;
  181. soc = pdev->soc;
  182. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  183. qdf_nbuf_mark_wakeup_frame(nbuf);
  184. dp_info("First packet after WOW Wakeup rcvd");
  185. }
  186. }
  187. #endif
  188. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  189. #endif /* WLAN_SOFTUMAC_SUPPORT */
  190. /**
  191. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  192. *
  193. * @dp_soc: struct dp_soc *
  194. * @nbuf_frag_info_t: nbuf frag info
  195. * @dp_pdev: struct dp_pdev *
  196. * @rx_desc_pool: Rx desc pool
  197. *
  198. * Return: QDF_STATUS
  199. */
  200. #ifdef DP_RX_MON_MEM_FRAG
  201. static inline QDF_STATUS
  202. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  203. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  204. struct dp_pdev *dp_pdev,
  205. struct rx_desc_pool *rx_desc_pool)
  206. {
  207. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  208. (nbuf_frag_info_t->virt_addr).vaddr =
  209. qdf_frag_alloc(&rx_desc_pool->pf_cache, rx_desc_pool->buf_size);
  210. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  211. dp_err("Frag alloc failed");
  212. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  213. return QDF_STATUS_E_NOMEM;
  214. }
  215. ret = qdf_mem_map_page(dp_soc->osdev,
  216. (nbuf_frag_info_t->virt_addr).vaddr,
  217. QDF_DMA_FROM_DEVICE,
  218. rx_desc_pool->buf_size,
  219. &nbuf_frag_info_t->paddr);
  220. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  221. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  222. dp_err("Frag map failed");
  223. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  224. return QDF_STATUS_E_FAULT;
  225. }
  226. return QDF_STATUS_SUCCESS;
  227. }
  228. #else
  229. static inline QDF_STATUS
  230. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  231. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  232. struct dp_pdev *dp_pdev,
  233. struct rx_desc_pool *rx_desc_pool)
  234. {
  235. return QDF_STATUS_SUCCESS;
  236. }
  237. #endif /* DP_RX_MON_MEM_FRAG */
  238. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  239. /**
  240. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  241. * @soc: Datapath soc structure
  242. * @ring_num: Refill ring number
  243. * @hal_ring_hdl:
  244. * @num_req: number of buffers requested for refill
  245. * @num_refill: number of buffers refilled
  246. *
  247. * Return: None
  248. */
  249. static inline void
  250. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  251. hal_ring_handle_t hal_ring_hdl,
  252. uint32_t num_req, uint32_t num_refill)
  253. {
  254. struct dp_refill_info_record *record;
  255. uint32_t idx;
  256. uint32_t tp;
  257. uint32_t hp;
  258. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  259. !soc->rx_refill_ring_history[ring_num]))
  260. return;
  261. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  262. DP_RX_REFILL_HIST_MAX);
  263. /* No NULL check needed for record since its an array */
  264. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  265. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  266. record->timestamp = qdf_get_log_timestamp();
  267. record->num_req = num_req;
  268. record->num_refill = num_refill;
  269. record->hp = hp;
  270. record->tp = tp;
  271. }
  272. #else
  273. static inline void
  274. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  275. hal_ring_handle_t hal_ring_hdl,
  276. uint32_t num_req, uint32_t num_refill)
  277. {
  278. }
  279. #endif
  280. /**
  281. * dp_pdev_nbuf_alloc_and_map_replenish() - Allocate nbuf for desc buffer and
  282. * map
  283. * @dp_soc: struct dp_soc *
  284. * @mac_id: Mac id
  285. * @num_entries_avail: num_entries_avail
  286. * @nbuf_frag_info_t: nbuf frag info
  287. * @dp_pdev: struct dp_pdev *
  288. * @rx_desc_pool: Rx desc pool
  289. *
  290. * Return: QDF_STATUS
  291. */
  292. static inline QDF_STATUS
  293. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  294. uint32_t mac_id,
  295. uint32_t num_entries_avail,
  296. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  297. struct dp_pdev *dp_pdev,
  298. struct rx_desc_pool *rx_desc_pool)
  299. {
  300. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  301. (nbuf_frag_info_t->virt_addr).nbuf =
  302. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  303. mac_id,
  304. rx_desc_pool,
  305. num_entries_avail);
  306. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  307. dp_err("nbuf alloc failed");
  308. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  309. return QDF_STATUS_E_NOMEM;
  310. }
  311. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  312. nbuf_frag_info_t);
  313. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  314. dp_rx_buffer_pool_nbuf_free(dp_soc,
  315. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  316. dp_err("nbuf map failed");
  317. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  318. return QDF_STATUS_E_FAULT;
  319. }
  320. nbuf_frag_info_t->paddr =
  321. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  322. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, (qdf_nbuf_t)(
  323. (nbuf_frag_info_t->virt_addr).nbuf),
  324. rx_desc_pool->buf_size,
  325. true, __func__, __LINE__);
  326. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  327. &nbuf_frag_info_t->paddr,
  328. rx_desc_pool);
  329. if (ret == QDF_STATUS_E_FAILURE) {
  330. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  331. return QDF_STATUS_E_ADDRNOTAVAIL;
  332. }
  333. return QDF_STATUS_SUCCESS;
  334. }
  335. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  336. QDF_STATUS
  337. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  338. struct dp_srng *dp_rxdma_srng,
  339. struct rx_desc_pool *rx_desc_pool)
  340. {
  341. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  342. uint32_t count;
  343. void *rxdma_ring_entry;
  344. union dp_rx_desc_list_elem_t *next = NULL;
  345. void *rxdma_srng;
  346. qdf_nbuf_t nbuf;
  347. qdf_dma_addr_t paddr;
  348. uint16_t num_entries_avail = 0;
  349. uint16_t num_alloc_desc = 0;
  350. union dp_rx_desc_list_elem_t *desc_list = NULL;
  351. union dp_rx_desc_list_elem_t *tail = NULL;
  352. int sync_hw_ptr = 0;
  353. rxdma_srng = dp_rxdma_srng->hal_srng;
  354. if (qdf_unlikely(!dp_pdev)) {
  355. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  356. return QDF_STATUS_E_FAILURE;
  357. }
  358. if (qdf_unlikely(!rxdma_srng)) {
  359. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  360. return QDF_STATUS_E_FAILURE;
  361. }
  362. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  363. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  364. rxdma_srng,
  365. sync_hw_ptr);
  366. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  367. soc, num_entries_avail);
  368. if (qdf_unlikely(num_entries_avail <
  369. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  370. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  371. return QDF_STATUS_E_FAILURE;
  372. }
  373. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  374. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  375. rx_desc_pool,
  376. num_entries_avail,
  377. &desc_list,
  378. &tail);
  379. if (!num_alloc_desc) {
  380. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  381. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  382. num_entries_avail);
  383. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  384. return QDF_STATUS_E_NOMEM;
  385. }
  386. for (count = 0; count < num_alloc_desc; count++) {
  387. next = desc_list->next;
  388. qdf_prefetch(next);
  389. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  390. if (qdf_unlikely(!nbuf)) {
  391. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  392. break;
  393. }
  394. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  395. rx_desc_pool->buf_size);
  396. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  397. rxdma_srng);
  398. qdf_assert_always(rxdma_ring_entry);
  399. desc_list->rx_desc.nbuf = nbuf;
  400. dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
  401. desc_list->rx_desc.rx_buf_start = nbuf->data;
  402. desc_list->rx_desc.paddr_buf_start = paddr;
  403. desc_list->rx_desc.unmapped = 0;
  404. /* rx_desc.in_use should be zero at this time*/
  405. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  406. desc_list->rx_desc.in_use = 1;
  407. desc_list->rx_desc.in_err_state = 0;
  408. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  409. paddr,
  410. desc_list->rx_desc.cookie,
  411. rx_desc_pool->owner);
  412. desc_list = next;
  413. }
  414. qdf_dsb();
  415. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  416. /* No need to count the number of bytes received during replenish.
  417. * Therefore set replenish.pkts.bytes as 0.
  418. */
  419. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  420. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  421. /*
  422. * add any available free desc back to the free list
  423. */
  424. if (desc_list)
  425. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  426. mac_id, rx_desc_pool);
  427. return QDF_STATUS_SUCCESS;
  428. }
  429. QDF_STATUS
  430. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  431. struct dp_srng *dp_rxdma_srng,
  432. struct rx_desc_pool *rx_desc_pool,
  433. uint32_t num_req_buffers,
  434. union dp_rx_desc_list_elem_t **desc_list,
  435. union dp_rx_desc_list_elem_t **tail)
  436. {
  437. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  438. uint32_t count;
  439. void *rxdma_ring_entry;
  440. union dp_rx_desc_list_elem_t *next;
  441. void *rxdma_srng;
  442. qdf_nbuf_t nbuf;
  443. qdf_nbuf_t nbuf_next;
  444. qdf_nbuf_t nbuf_head = NULL;
  445. qdf_nbuf_t nbuf_tail = NULL;
  446. qdf_dma_addr_t paddr;
  447. rxdma_srng = dp_rxdma_srng->hal_srng;
  448. if (qdf_unlikely(!dp_pdev)) {
  449. dp_rx_err("%pK: pdev is null for mac_id = %d",
  450. soc, mac_id);
  451. return QDF_STATUS_E_FAILURE;
  452. }
  453. if (qdf_unlikely(!rxdma_srng)) {
  454. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  455. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  456. return QDF_STATUS_E_FAILURE;
  457. }
  458. /* Allocate required number of nbufs */
  459. for (count = 0; count < num_req_buffers; count++) {
  460. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  461. if (qdf_unlikely(!nbuf)) {
  462. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  463. /* Update num_req_buffers to nbufs allocated count */
  464. num_req_buffers = count;
  465. break;
  466. }
  467. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  468. rx_desc_pool->buf_size);
  469. QDF_NBUF_CB_PADDR(nbuf) = paddr;
  470. DP_RX_LIST_APPEND(nbuf_head,
  471. nbuf_tail,
  472. nbuf);
  473. }
  474. qdf_dsb();
  475. nbuf = nbuf_head;
  476. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  477. for (count = 0; count < num_req_buffers; count++) {
  478. next = (*desc_list)->next;
  479. nbuf_next = nbuf->next;
  480. qdf_prefetch(next);
  481. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  482. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  483. if (!rxdma_ring_entry)
  484. break;
  485. (*desc_list)->rx_desc.nbuf = nbuf;
  486. dp_rx_set_reuse_nbuf(&(*desc_list)->rx_desc, nbuf);
  487. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  488. (*desc_list)->rx_desc.paddr_buf_start = QDF_NBUF_CB_PADDR(nbuf);
  489. (*desc_list)->rx_desc.unmapped = 0;
  490. /* rx_desc.in_use should be zero at this time*/
  491. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  492. (*desc_list)->rx_desc.in_use = 1;
  493. (*desc_list)->rx_desc.in_err_state = 0;
  494. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  495. QDF_NBUF_CB_PADDR(nbuf),
  496. (*desc_list)->rx_desc.cookie,
  497. rx_desc_pool->owner);
  498. *desc_list = next;
  499. nbuf = nbuf_next;
  500. }
  501. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  502. /* No need to count the number of bytes received during replenish.
  503. * Therefore set replenish.pkts.bytes as 0.
  504. */
  505. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  506. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  507. /*
  508. * add any available free desc back to the free list
  509. */
  510. if (*desc_list)
  511. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  512. mac_id, rx_desc_pool);
  513. while (nbuf) {
  514. nbuf_next = nbuf->next;
  515. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  516. qdf_nbuf_free(nbuf);
  517. nbuf = nbuf_next;
  518. }
  519. return QDF_STATUS_SUCCESS;
  520. }
  521. #ifdef WLAN_SUPPORT_PPEDS
  522. QDF_STATUS
  523. __dp_rx_comp2refill_replenish(struct dp_soc *soc, uint32_t mac_id,
  524. struct dp_srng *dp_rxdma_srng,
  525. struct rx_desc_pool *rx_desc_pool,
  526. uint32_t num_req_buffers,
  527. union dp_rx_desc_list_elem_t **desc_list,
  528. union dp_rx_desc_list_elem_t **tail)
  529. {
  530. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  531. uint32_t count;
  532. void *rxdma_ring_entry;
  533. union dp_rx_desc_list_elem_t *next;
  534. union dp_rx_desc_list_elem_t *cur;
  535. void *rxdma_srng;
  536. qdf_nbuf_t nbuf;
  537. rxdma_srng = dp_rxdma_srng->hal_srng;
  538. if (qdf_unlikely(!dp_pdev)) {
  539. dp_rx_err("%pK: pdev is null for mac_id = %d",
  540. soc, mac_id);
  541. return QDF_STATUS_E_FAILURE;
  542. }
  543. if (qdf_unlikely(!rxdma_srng)) {
  544. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  545. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  546. return QDF_STATUS_E_FAILURE;
  547. }
  548. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  549. for (count = 0; count < num_req_buffers; count++) {
  550. next = (*desc_list)->next;
  551. qdf_prefetch(next);
  552. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  553. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  554. if (!rxdma_ring_entry)
  555. break;
  556. (*desc_list)->rx_desc.in_use = 1;
  557. (*desc_list)->rx_desc.in_err_state = 0;
  558. (*desc_list)->rx_desc.nbuf = (*desc_list)->rx_desc.reuse_nbuf;
  559. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  560. (*desc_list)->rx_desc.paddr_buf_start,
  561. (*desc_list)->rx_desc.cookie,
  562. rx_desc_pool->owner);
  563. *desc_list = next;
  564. }
  565. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  566. /* No need to count the number of bytes received during replenish.
  567. * Therefore set replenish.pkts.bytes as 0.
  568. */
  569. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  570. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  571. /*
  572. * add any available free desc back to the free list
  573. */
  574. cur = *desc_list;
  575. for ( ; count < num_req_buffers; count++) {
  576. next = cur->next;
  577. qdf_prefetch(next);
  578. nbuf = cur->rx_desc.reuse_nbuf;
  579. cur->rx_desc.nbuf = NULL;
  580. cur->rx_desc.in_use = 0;
  581. cur->rx_desc.has_reuse_nbuf = false;
  582. cur->rx_desc.reuse_nbuf = NULL;
  583. if (!nbuf->recycled_for_ds)
  584. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  585. nbuf->recycled_for_ds = 0;
  586. nbuf->fast_recycled = 0;
  587. qdf_nbuf_free(nbuf);
  588. cur = next;
  589. }
  590. if (*desc_list)
  591. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  592. mac_id, rx_desc_pool);
  593. return QDF_STATUS_SUCCESS;
  594. }
  595. #endif
  596. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  597. uint32_t mac_id,
  598. struct dp_srng *dp_rxdma_srng,
  599. struct rx_desc_pool *rx_desc_pool,
  600. uint32_t num_req_buffers)
  601. {
  602. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  603. uint32_t count;
  604. uint32_t nr_descs = 0;
  605. void *rxdma_ring_entry;
  606. union dp_rx_desc_list_elem_t *next;
  607. void *rxdma_srng;
  608. qdf_nbuf_t nbuf;
  609. qdf_dma_addr_t paddr;
  610. union dp_rx_desc_list_elem_t *desc_list = NULL;
  611. union dp_rx_desc_list_elem_t *tail = NULL;
  612. rxdma_srng = dp_rxdma_srng->hal_srng;
  613. if (qdf_unlikely(!dp_pdev)) {
  614. dp_rx_err("%pK: pdev is null for mac_id = %d",
  615. soc, mac_id);
  616. return QDF_STATUS_E_FAILURE;
  617. }
  618. if (qdf_unlikely(!rxdma_srng)) {
  619. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  620. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  621. return QDF_STATUS_E_FAILURE;
  622. }
  623. dp_rx_debug("%pK: requested %d buffers for replenish",
  624. soc, num_req_buffers);
  625. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  626. num_req_buffers, &desc_list, &tail);
  627. if (!nr_descs) {
  628. dp_err("no free rx_descs in freelist");
  629. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  630. return QDF_STATUS_E_NOMEM;
  631. }
  632. dp_debug("got %u RX descs for driver attach", nr_descs);
  633. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  634. for (count = 0; count < nr_descs; count++) {
  635. next = desc_list->next;
  636. qdf_prefetch(next);
  637. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  638. if (qdf_unlikely(!nbuf)) {
  639. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  640. break;
  641. }
  642. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  643. rx_desc_pool->buf_size);
  644. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  645. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  646. if (!rxdma_ring_entry) {
  647. qdf_nbuf_free(nbuf);
  648. break;
  649. }
  650. desc_list->rx_desc.nbuf = nbuf;
  651. dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
  652. desc_list->rx_desc.rx_buf_start = nbuf->data;
  653. desc_list->rx_desc.paddr_buf_start = paddr;
  654. desc_list->rx_desc.unmapped = 0;
  655. /* rx_desc.in_use should be zero at this time*/
  656. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  657. desc_list->rx_desc.in_use = 1;
  658. desc_list->rx_desc.in_err_state = 0;
  659. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  660. paddr,
  661. desc_list->rx_desc.cookie,
  662. rx_desc_pool->owner);
  663. desc_list = next;
  664. }
  665. qdf_dsb();
  666. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  667. /* No need to count the number of bytes received during replenish.
  668. * Therefore set replenish.pkts.bytes as 0.
  669. */
  670. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  671. return QDF_STATUS_SUCCESS;
  672. }
  673. #endif
  674. #ifdef DP_UMAC_HW_RESET_SUPPORT
  675. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  676. static inline
  677. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  678. uint32_t buf_size)
  679. {
  680. return dp_rx_nbuf_sync_no_dsb(dp_soc, nbuf, buf_size);
  681. }
  682. #else
  683. static inline
  684. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  685. uint32_t buf_size)
  686. {
  687. return qdf_nbuf_get_frag_paddr(nbuf, 0);
  688. }
  689. #endif
  690. /**
  691. * dp_rx_desc_replenish() - Replenish the rx descriptors one at a time
  692. * @soc: core txrx main context
  693. * @dp_rxdma_srng: rxdma ring
  694. * @rx_desc_pool: rx descriptor pool
  695. * @rx_desc:rx descriptor
  696. *
  697. * Return: void
  698. */
  699. static inline
  700. void dp_rx_desc_replenish(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  701. struct rx_desc_pool *rx_desc_pool,
  702. struct dp_rx_desc *rx_desc)
  703. {
  704. void *rxdma_srng;
  705. void *rxdma_ring_entry;
  706. qdf_dma_addr_t paddr;
  707. rxdma_srng = dp_rxdma_srng->hal_srng;
  708. /* No one else should be accessing the srng at this point */
  709. hal_srng_access_start_unlocked(soc->hal_soc, rxdma_srng);
  710. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  711. qdf_assert_always(rxdma_ring_entry);
  712. rx_desc->in_err_state = 0;
  713. paddr = dp_rx_rep_retrieve_paddr(soc, rx_desc->nbuf,
  714. rx_desc_pool->buf_size);
  715. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry, paddr,
  716. rx_desc->cookie, rx_desc_pool->owner);
  717. hal_srng_access_end_unlocked(soc->hal_soc, rxdma_srng);
  718. }
  719. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list)
  720. {
  721. int mac_id, i, j;
  722. union dp_rx_desc_list_elem_t *head = NULL;
  723. union dp_rx_desc_list_elem_t *tail = NULL;
  724. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  725. struct dp_srng *dp_rxdma_srng =
  726. &soc->rx_refill_buf_ring[mac_id];
  727. struct rx_desc_pool *rx_desc_pool = &soc->rx_desc_buf[mac_id];
  728. uint32_t rx_sw_desc_num = rx_desc_pool->pool_size;
  729. /* Only fill up 1/3 of the ring size */
  730. uint32_t num_req_decs;
  731. if (!dp_rxdma_srng || !dp_rxdma_srng->hal_srng ||
  732. !rx_desc_pool->array)
  733. continue;
  734. num_req_decs = dp_rxdma_srng->num_entries / 3;
  735. for (i = 0, j = 0; i < rx_sw_desc_num; i++) {
  736. struct dp_rx_desc *rx_desc =
  737. (struct dp_rx_desc *)&rx_desc_pool->array[i];
  738. if (rx_desc->in_use) {
  739. if (j < (dp_rxdma_srng->num_entries - 1)) {
  740. dp_rx_desc_replenish(soc, dp_rxdma_srng,
  741. rx_desc_pool,
  742. rx_desc);
  743. } else {
  744. dp_rx_nbuf_unmap(soc, rx_desc, 0);
  745. rx_desc->unmapped = 0;
  746. rx_desc->nbuf->next = *nbuf_list;
  747. *nbuf_list = rx_desc->nbuf;
  748. dp_rx_add_to_free_desc_list(&head,
  749. &tail,
  750. rx_desc);
  751. }
  752. j++;
  753. }
  754. }
  755. if (head)
  756. dp_rx_add_desc_list_to_free_list(soc, &head, &tail,
  757. mac_id, rx_desc_pool);
  758. /* If num of descs in use were less, then we need to replenish
  759. * the ring with some buffers
  760. */
  761. head = NULL;
  762. tail = NULL;
  763. if (j < (num_req_decs - 1))
  764. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  765. rx_desc_pool,
  766. ((num_req_decs - 1) - j),
  767. &head, &tail, true);
  768. }
  769. }
  770. #endif
  771. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  772. struct dp_srng *dp_rxdma_srng,
  773. struct rx_desc_pool *rx_desc_pool,
  774. uint32_t num_req_buffers,
  775. union dp_rx_desc_list_elem_t **desc_list,
  776. union dp_rx_desc_list_elem_t **tail,
  777. bool req_only, const char *func_name)
  778. {
  779. uint32_t num_alloc_desc;
  780. uint16_t num_desc_to_free = 0;
  781. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  782. uint32_t num_entries_avail;
  783. uint32_t count;
  784. uint32_t extra_buffers;
  785. int sync_hw_ptr = 1;
  786. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  787. void *rxdma_ring_entry;
  788. union dp_rx_desc_list_elem_t *next;
  789. QDF_STATUS ret;
  790. void *rxdma_srng;
  791. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  792. union dp_rx_desc_list_elem_t *tail_append = NULL;
  793. union dp_rx_desc_list_elem_t *temp_list = NULL;
  794. rxdma_srng = dp_rxdma_srng->hal_srng;
  795. if (qdf_unlikely(!dp_pdev)) {
  796. dp_rx_err("%pK: pdev is null for mac_id = %d",
  797. dp_soc, mac_id);
  798. return QDF_STATUS_E_FAILURE;
  799. }
  800. if (qdf_unlikely(!rxdma_srng)) {
  801. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  802. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  803. return QDF_STATUS_E_FAILURE;
  804. }
  805. dp_verbose_debug("%pK: requested %d buffers for replenish",
  806. dp_soc, num_req_buffers);
  807. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  808. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  809. rxdma_srng,
  810. sync_hw_ptr);
  811. dp_verbose_debug("%pK: no of available entries in rxdma ring: %d",
  812. dp_soc, num_entries_avail);
  813. if (!req_only && !(*desc_list) && (num_entries_avail >
  814. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  815. num_req_buffers = num_entries_avail;
  816. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  817. } else if (num_entries_avail < num_req_buffers) {
  818. num_desc_to_free = num_req_buffers - num_entries_avail;
  819. num_req_buffers = num_entries_avail;
  820. } else if ((*desc_list) &&
  821. dp_rxdma_srng->num_entries - num_entries_avail <
  822. CRITICAL_BUFFER_THRESHOLD) {
  823. /* set extra buffers to CRITICAL_BUFFER_THRESHOLD only if
  824. * total buff requested after adding extra buffers is less
  825. * than or equal to num entries available, else set it to max
  826. * possible additional buffers available at that moment
  827. */
  828. extra_buffers =
  829. ((num_req_buffers + CRITICAL_BUFFER_THRESHOLD) > num_entries_avail) ?
  830. (num_entries_avail - num_req_buffers) :
  831. CRITICAL_BUFFER_THRESHOLD;
  832. /* Append some free descriptors to tail */
  833. num_alloc_desc =
  834. dp_rx_get_free_desc_list(dp_soc, mac_id,
  835. rx_desc_pool,
  836. extra_buffers,
  837. &desc_list_append,
  838. &tail_append);
  839. if (num_alloc_desc) {
  840. temp_list = *desc_list;
  841. *desc_list = desc_list_append;
  842. tail_append->next = temp_list;
  843. num_req_buffers += num_alloc_desc;
  844. DP_STATS_DEC(dp_pdev,
  845. replenish.free_list,
  846. num_alloc_desc);
  847. } else
  848. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  849. }
  850. if (qdf_unlikely(!num_req_buffers)) {
  851. num_desc_to_free = num_req_buffers;
  852. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  853. goto free_descs;
  854. }
  855. /*
  856. * if desc_list is NULL, allocate the descs from freelist
  857. */
  858. if (!(*desc_list)) {
  859. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  860. rx_desc_pool,
  861. num_req_buffers,
  862. desc_list,
  863. tail);
  864. if (!num_alloc_desc) {
  865. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  866. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  867. num_req_buffers);
  868. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  869. return QDF_STATUS_E_NOMEM;
  870. }
  871. dp_verbose_debug("%pK: %d rx desc allocated", dp_soc,
  872. num_alloc_desc);
  873. num_req_buffers = num_alloc_desc;
  874. }
  875. count = 0;
  876. while (count < num_req_buffers) {
  877. /* Flag is set while pdev rx_desc_pool initialization */
  878. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  879. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  880. &nbuf_frag_info,
  881. dp_pdev,
  882. rx_desc_pool);
  883. else
  884. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  885. mac_id,
  886. num_entries_avail, &nbuf_frag_info,
  887. dp_pdev, rx_desc_pool);
  888. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  889. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  890. continue;
  891. break;
  892. }
  893. count++;
  894. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  895. rxdma_srng);
  896. qdf_assert_always(rxdma_ring_entry);
  897. next = (*desc_list)->next;
  898. /* Flag is set while pdev rx_desc_pool initialization */
  899. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  900. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  901. &nbuf_frag_info);
  902. else
  903. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  904. &nbuf_frag_info);
  905. /* rx_desc.in_use should be zero at this time*/
  906. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  907. (*desc_list)->rx_desc.in_use = 1;
  908. (*desc_list)->rx_desc.in_err_state = 0;
  909. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  910. func_name, RX_DESC_REPLENISHED);
  911. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  912. nbuf_frag_info.virt_addr.nbuf,
  913. (unsigned long long)(nbuf_frag_info.paddr),
  914. (*desc_list)->rx_desc.cookie);
  915. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  916. nbuf_frag_info.paddr,
  917. (*desc_list)->rx_desc.cookie,
  918. rx_desc_pool->owner);
  919. *desc_list = next;
  920. }
  921. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  922. num_req_buffers, count);
  923. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  924. dp_rx_schedule_refill_thread(dp_soc);
  925. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  926. count, num_desc_to_free);
  927. /* No need to count the number of bytes received during replenish.
  928. * Therefore set replenish.pkts.bytes as 0.
  929. */
  930. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  931. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  932. free_descs:
  933. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  934. /*
  935. * add any available free desc back to the free list
  936. */
  937. if (*desc_list)
  938. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  939. mac_id, rx_desc_pool);
  940. return QDF_STATUS_SUCCESS;
  941. }
  942. qdf_export_symbol(__dp_rx_buffers_replenish);
  943. void
  944. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  945. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  946. {
  947. qdf_nbuf_t deliver_list_head = NULL;
  948. qdf_nbuf_t deliver_list_tail = NULL;
  949. qdf_nbuf_t nbuf;
  950. nbuf = nbuf_list;
  951. while (nbuf) {
  952. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  953. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  954. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  955. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  956. qdf_nbuf_len(nbuf), link_id);
  957. nbuf = next;
  958. }
  959. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  960. &deliver_list_tail);
  961. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  962. }
  963. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  964. #ifndef FEATURE_WDS
  965. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  966. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  967. {
  968. }
  969. #endif
  970. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  971. /**
  972. * dp_classify_critical_pkts() - API for marking critical packets
  973. * @soc: dp_soc context
  974. * @vdev: vdev on which packet is to be sent
  975. * @nbuf: nbuf that has to be classified
  976. *
  977. * The function parses the packet, identifies whether its a critical frame and
  978. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  979. * Code for marking which frames are CRITICAL is accessed via callback.
  980. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  981. *
  982. * Return: None
  983. */
  984. static
  985. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  986. qdf_nbuf_t nbuf)
  987. {
  988. if (vdev->tx_classify_critical_pkt_cb)
  989. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  990. }
  991. #else
  992. static inline
  993. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  994. qdf_nbuf_t nbuf)
  995. {
  996. }
  997. #endif
  998. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  999. static inline
  1000. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  1001. {
  1002. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  1003. }
  1004. #else
  1005. static inline
  1006. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  1007. {
  1008. }
  1009. #endif
  1010. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1011. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1012. struct cdp_tid_rx_stats *tid_stats,
  1013. uint8_t link_id)
  1014. {
  1015. uint16_t len;
  1016. qdf_nbuf_t nbuf_copy;
  1017. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1018. nbuf))
  1019. return true;
  1020. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf, link_id))
  1021. return false;
  1022. /* If the source peer in the isolation list
  1023. * then dont forward instead push to bridge stack
  1024. */
  1025. if (dp_get_peer_isolation(ta_peer))
  1026. return false;
  1027. nbuf_copy = qdf_nbuf_copy(nbuf);
  1028. if (!nbuf_copy)
  1029. return false;
  1030. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1031. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  1032. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  1033. if (soc->arch_ops.dp_rx_intrabss_mcast_handler(soc, ta_peer,
  1034. nbuf_copy,
  1035. tid_stats,
  1036. link_id))
  1037. return false;
  1038. /* Don't send packets if tx is paused */
  1039. if (!soc->is_tx_pause &&
  1040. !dp_tx_send((struct cdp_soc_t *)soc,
  1041. ta_peer->vdev->vdev_id, nbuf_copy)) {
  1042. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1043. len, link_id);
  1044. tid_stats->intrabss_cnt++;
  1045. } else {
  1046. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1047. len, link_id);
  1048. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1049. dp_rx_nbuf_free(nbuf_copy);
  1050. }
  1051. return false;
  1052. }
  1053. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1054. uint8_t tx_vdev_id,
  1055. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1056. struct cdp_tid_rx_stats *tid_stats,
  1057. uint8_t link_id)
  1058. {
  1059. uint16_t len;
  1060. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1061. /* linearize the nbuf just before we send to
  1062. * dp_tx_send()
  1063. */
  1064. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1065. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  1066. return false;
  1067. nbuf = qdf_nbuf_unshare(nbuf);
  1068. if (!nbuf) {
  1069. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  1070. rx.intra_bss.fail,
  1071. 1, len, link_id);
  1072. /* return true even though the pkt is
  1073. * not forwarded. Basically skb_unshare
  1074. * failed and we want to continue with
  1075. * next nbuf.
  1076. */
  1077. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1078. return false;
  1079. }
  1080. }
  1081. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  1082. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  1083. /* Don't send packets if tx is paused */
  1084. if (!soc->is_tx_pause && !dp_tx_send((struct cdp_soc_t *)soc,
  1085. tx_vdev_id, nbuf)) {
  1086. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1087. len, link_id);
  1088. } else {
  1089. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1090. len, link_id);
  1091. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1092. return false;
  1093. }
  1094. return true;
  1095. }
  1096. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1097. #ifdef MESH_MODE_SUPPORT
  1098. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1099. uint8_t *rx_tlv_hdr,
  1100. struct dp_txrx_peer *txrx_peer)
  1101. {
  1102. struct mesh_recv_hdr_s *rx_info = NULL;
  1103. uint32_t pkt_type;
  1104. uint32_t nss;
  1105. uint32_t rate_mcs;
  1106. uint32_t bw;
  1107. uint8_t primary_chan_num;
  1108. uint32_t center_chan_freq;
  1109. struct dp_soc *soc = vdev->pdev->soc;
  1110. struct dp_peer *peer;
  1111. struct dp_peer *primary_link_peer;
  1112. struct dp_soc *link_peer_soc;
  1113. cdp_peer_stats_param_t buf = {0};
  1114. /* fill recv mesh stats */
  1115. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  1116. /* upper layers are responsible to free this memory */
  1117. if (!rx_info) {
  1118. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  1119. vdev->pdev->soc);
  1120. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  1121. return;
  1122. }
  1123. rx_info->rs_flags = MESH_RXHDR_VER1;
  1124. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1125. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  1126. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  1127. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  1128. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  1129. if (peer) {
  1130. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  1131. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  1132. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  1133. rx_tlv_hdr);
  1134. if (vdev->osif_get_key)
  1135. vdev->osif_get_key(vdev->osif_vdev,
  1136. &rx_info->rs_decryptkey[0],
  1137. &peer->mac_addr.raw[0],
  1138. rx_info->rs_keyix);
  1139. }
  1140. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  1141. }
  1142. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  1143. txrx_peer->peer_id,
  1144. DP_MOD_ID_MESH);
  1145. if (qdf_likely(primary_link_peer)) {
  1146. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  1147. dp_monitor_peer_get_stats_param(link_peer_soc,
  1148. primary_link_peer,
  1149. cdp_peer_rx_snr, &buf);
  1150. rx_info->rs_snr = buf.rx_snr;
  1151. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  1152. }
  1153. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  1154. soc = vdev->pdev->soc;
  1155. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  1156. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  1157. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  1158. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  1159. soc->ctrl_psoc,
  1160. vdev->pdev->pdev_id,
  1161. center_chan_freq);
  1162. }
  1163. rx_info->rs_channel = primary_chan_num;
  1164. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1165. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1166. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1167. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1168. /*
  1169. * The MCS index does not start with 0 when NSS>1 in HT mode.
  1170. * MCS params for optional 20/40MHz, NSS=1~3, EQM(NSS>1):
  1171. * ------------------------------------------------------
  1172. * NSS | 1 | 2 | 3 | 4
  1173. * ------------------------------------------------------
  1174. * MCS index: HT20 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  1175. * ------------------------------------------------------
  1176. * MCS index: HT40 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  1177. * ------------------------------------------------------
  1178. * Currently, the MAX_NSS=2. If NSS>2, MCS index = 8 * (NSS-1)
  1179. */
  1180. if ((pkt_type == DOT11_N) && (nss == 2))
  1181. rate_mcs += 8;
  1182. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  1183. (bw << 24);
  1184. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  1185. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  1186. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  1187. rx_info->rs_flags,
  1188. rx_info->rs_rssi,
  1189. rx_info->rs_channel,
  1190. rx_info->rs_ratephy1,
  1191. rx_info->rs_keyix,
  1192. rx_info->rs_snr);
  1193. }
  1194. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1195. uint8_t *rx_tlv_hdr)
  1196. {
  1197. union dp_align_mac_addr mac_addr;
  1198. struct dp_soc *soc = vdev->pdev->soc;
  1199. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  1200. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  1201. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1202. rx_tlv_hdr))
  1203. return QDF_STATUS_SUCCESS;
  1204. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  1205. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1206. rx_tlv_hdr))
  1207. return QDF_STATUS_SUCCESS;
  1208. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  1209. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1210. rx_tlv_hdr) &&
  1211. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1212. rx_tlv_hdr))
  1213. return QDF_STATUS_SUCCESS;
  1214. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  1215. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  1216. rx_tlv_hdr,
  1217. &mac_addr.raw[0]))
  1218. return QDF_STATUS_E_FAILURE;
  1219. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1220. &vdev->mac_addr.raw[0],
  1221. QDF_MAC_ADDR_SIZE))
  1222. return QDF_STATUS_SUCCESS;
  1223. }
  1224. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  1225. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  1226. rx_tlv_hdr,
  1227. &mac_addr.raw[0]))
  1228. return QDF_STATUS_E_FAILURE;
  1229. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1230. &vdev->mac_addr.raw[0],
  1231. QDF_MAC_ADDR_SIZE))
  1232. return QDF_STATUS_SUCCESS;
  1233. }
  1234. }
  1235. return QDF_STATUS_E_FAILURE;
  1236. }
  1237. #else
  1238. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1239. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1240. {
  1241. }
  1242. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1243. uint8_t *rx_tlv_hdr)
  1244. {
  1245. return QDF_STATUS_E_FAILURE;
  1246. }
  1247. #endif
  1248. #ifdef RX_PEER_INVALID_ENH
  1249. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1250. uint8_t mac_id)
  1251. {
  1252. struct dp_invalid_peer_msg msg;
  1253. struct dp_vdev *vdev = NULL;
  1254. struct dp_pdev *pdev = NULL;
  1255. struct ieee80211_frame *wh;
  1256. qdf_nbuf_t curr_nbuf, next_nbuf;
  1257. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1258. uint8_t *rx_pkt_hdr = NULL;
  1259. int i = 0;
  1260. uint32_t nbuf_len;
  1261. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1262. dp_rx_debug("%pK: Drop decapped frames", soc);
  1263. goto free;
  1264. }
  1265. /* In RAW packet, packet header will be part of data */
  1266. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1267. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1268. if (!DP_FRAME_IS_DATA(wh)) {
  1269. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1270. goto free;
  1271. }
  1272. nbuf_len = qdf_nbuf_len(mpdu);
  1273. if (nbuf_len < sizeof(struct ieee80211_frame)) {
  1274. dp_rx_err("%pK: Invalid nbuf length: %u", soc, nbuf_len);
  1275. goto free;
  1276. }
  1277. /* In DMAC case the rx_desc_pools are common across PDEVs
  1278. * so PDEV cannot be derived from the pool_id.
  1279. *
  1280. * link_id need to derived from the TLV tag word which is
  1281. * disabled by default. For now adding a WAR to get vdev
  1282. * with brute force this need to fixed with word based subscription
  1283. * support is added by enabling TLV tag word
  1284. */
  1285. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1286. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1287. pdev = soc->pdev_list[i];
  1288. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1289. continue;
  1290. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1291. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1292. QDF_MAC_ADDR_SIZE) == 0) {
  1293. goto out;
  1294. }
  1295. }
  1296. }
  1297. } else {
  1298. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1299. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1300. dp_rx_err("%pK: PDEV %s",
  1301. soc, !pdev ? "not found" : "down");
  1302. goto free;
  1303. }
  1304. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1305. QDF_STATUS_SUCCESS)
  1306. return 0;
  1307. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1308. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1309. QDF_MAC_ADDR_SIZE) == 0) {
  1310. goto out;
  1311. }
  1312. }
  1313. }
  1314. if (!vdev) {
  1315. dp_rx_err("%pK: VDEV not found", soc);
  1316. goto free;
  1317. }
  1318. out:
  1319. msg.wh = wh;
  1320. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1321. msg.nbuf = mpdu;
  1322. msg.vdev_id = vdev->vdev_id;
  1323. /*
  1324. * NOTE: Only valid for HKv1.
  1325. * If smart monitor mode is enabled on RE, we are getting invalid
  1326. * peer frames with RA as STA mac of RE and the TA not matching
  1327. * with any NAC list or the the BSSID.Such frames need to dropped
  1328. * in order to avoid HM_WDS false addition.
  1329. */
  1330. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1331. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1332. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1333. soc, wh->i_addr1);
  1334. goto free;
  1335. }
  1336. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1337. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1338. pdev->pdev_id, &msg);
  1339. }
  1340. free:
  1341. /* Drop and free packet */
  1342. curr_nbuf = mpdu;
  1343. while (curr_nbuf) {
  1344. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1345. dp_rx_nbuf_free(curr_nbuf);
  1346. curr_nbuf = next_nbuf;
  1347. }
  1348. return 0;
  1349. }
  1350. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1351. qdf_nbuf_t mpdu, bool mpdu_done,
  1352. uint8_t mac_id)
  1353. {
  1354. /* Only trigger the process when mpdu is completed */
  1355. if (mpdu_done)
  1356. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1357. }
  1358. #else
  1359. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1360. uint8_t mac_id)
  1361. {
  1362. qdf_nbuf_t curr_nbuf, next_nbuf;
  1363. struct dp_pdev *pdev;
  1364. struct dp_vdev *vdev = NULL;
  1365. struct ieee80211_frame *wh;
  1366. struct dp_peer *peer = NULL;
  1367. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1368. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1369. uint32_t nbuf_len;
  1370. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1371. if (!DP_FRAME_IS_DATA(wh)) {
  1372. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1373. "only for data frames");
  1374. goto free;
  1375. }
  1376. nbuf_len = qdf_nbuf_len(mpdu);
  1377. if (nbuf_len < sizeof(struct ieee80211_frame)) {
  1378. dp_rx_info_rl("%pK: Invalid nbuf length: %u", soc, nbuf_len);
  1379. goto free;
  1380. }
  1381. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1382. if (!pdev) {
  1383. dp_rx_info_rl("%pK: PDEV not found", soc);
  1384. goto free;
  1385. }
  1386. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1387. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1388. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1389. QDF_MAC_ADDR_SIZE) == 0) {
  1390. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1391. goto out;
  1392. }
  1393. }
  1394. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1395. if (!vdev) {
  1396. dp_rx_info_rl("%pK: VDEV not found", soc);
  1397. goto free;
  1398. }
  1399. out:
  1400. if (vdev->opmode == wlan_op_mode_ap) {
  1401. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  1402. vdev->vdev_id,
  1403. DP_MOD_ID_RX_ERR);
  1404. /* If SA is a valid peer in vdev,
  1405. * don't send disconnect
  1406. */
  1407. if (peer) {
  1408. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1409. DP_STATS_INC(soc, rx.err.decrypt_err_drop, 1);
  1410. dp_err_rl("invalid peer frame with correct SA/RA is freed");
  1411. goto free;
  1412. }
  1413. }
  1414. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1415. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1416. free:
  1417. /* Drop and free packet */
  1418. curr_nbuf = mpdu;
  1419. while (curr_nbuf) {
  1420. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1421. dp_rx_nbuf_free(curr_nbuf);
  1422. curr_nbuf = next_nbuf;
  1423. }
  1424. /* Reset the head and tail pointers */
  1425. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1426. if (pdev) {
  1427. pdev->invalid_peer_head_msdu = NULL;
  1428. pdev->invalid_peer_tail_msdu = NULL;
  1429. }
  1430. return 0;
  1431. }
  1432. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1433. qdf_nbuf_t mpdu, bool mpdu_done,
  1434. uint8_t mac_id)
  1435. {
  1436. /* Process the nbuf */
  1437. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1438. }
  1439. #endif
  1440. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1441. #ifdef RECEIVE_OFFLOAD
  1442. /**
  1443. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1444. * @soc: dp soc handle
  1445. * @msdu: MSDU for which the offload info is to be printed
  1446. * @ofl_info: offload info saved in hal_offload_info structure
  1447. *
  1448. * Return: None
  1449. */
  1450. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1451. qdf_nbuf_t msdu,
  1452. struct hal_offload_info *ofl_info)
  1453. {
  1454. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1455. dp_verbose_debug("lro_eligible 0x%x",
  1456. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1457. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1458. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1459. dp_verbose_debug("TCP seq num 0x%x", ofl_info->tcp_seq_num);
  1460. dp_verbose_debug("TCP ack num 0x%x", ofl_info->tcp_ack_num);
  1461. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1462. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1463. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1464. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1465. dp_verbose_debug("---------------------------------------------------------");
  1466. }
  1467. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1468. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1469. {
  1470. struct hal_offload_info offload_info;
  1471. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1472. return;
  1473. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1474. return;
  1475. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1476. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1477. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1478. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1479. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1480. rx_tlv);
  1481. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1482. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1483. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1484. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1485. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1486. dp_rx_print_offload_info(soc, msdu, &offload_info);
  1487. }
  1488. #endif /* RECEIVE_OFFLOAD */
  1489. /**
  1490. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1491. *
  1492. * @soc: DP soc handle
  1493. * @nbuf: pointer to msdu.
  1494. * @mpdu_len: mpdu length
  1495. * @l3_pad_len: L3 padding length by HW
  1496. *
  1497. * Return: returns true if nbuf is last msdu of mpdu else returns false.
  1498. */
  1499. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1500. qdf_nbuf_t nbuf,
  1501. uint16_t *mpdu_len,
  1502. uint32_t l3_pad_len)
  1503. {
  1504. bool last_nbuf;
  1505. uint32_t pkt_hdr_size;
  1506. uint16_t buf_size;
  1507. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1508. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1509. if ((*mpdu_len + pkt_hdr_size) > buf_size) {
  1510. qdf_nbuf_set_pktlen(nbuf, buf_size);
  1511. last_nbuf = false;
  1512. *mpdu_len -= (buf_size - pkt_hdr_size);
  1513. } else {
  1514. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1515. last_nbuf = true;
  1516. *mpdu_len = 0;
  1517. }
  1518. return last_nbuf;
  1519. }
  1520. /**
  1521. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1522. *
  1523. * @soc: DP soc handle
  1524. * @nbuf: pointer to msdu.
  1525. *
  1526. * Return: returns padding length in bytes.
  1527. */
  1528. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1529. qdf_nbuf_t nbuf)
  1530. {
  1531. uint32_t l3_hdr_pad = 0;
  1532. uint8_t *rx_tlv_hdr;
  1533. struct hal_rx_msdu_metadata msdu_metadata;
  1534. while (nbuf) {
  1535. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1536. /* scattered msdu end with continuation is 0 */
  1537. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1538. hal_rx_msdu_metadata_get(soc->hal_soc,
  1539. rx_tlv_hdr,
  1540. &msdu_metadata);
  1541. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1542. break;
  1543. }
  1544. nbuf = nbuf->next;
  1545. }
  1546. return l3_hdr_pad;
  1547. }
  1548. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1549. {
  1550. qdf_nbuf_t parent, frag_list, next = NULL;
  1551. uint16_t frag_list_len = 0;
  1552. uint16_t mpdu_len;
  1553. bool last_nbuf;
  1554. uint32_t l3_hdr_pad_offset = 0;
  1555. /*
  1556. * Use msdu len got from REO entry descriptor instead since
  1557. * there is case the RX PKT TLV is corrupted while msdu_len
  1558. * from REO descriptor is right for non-raw RX scatter msdu.
  1559. */
  1560. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1561. /*
  1562. * this is a case where the complete msdu fits in one single nbuf.
  1563. * in this case HW sets both start and end bit and we only need to
  1564. * reset these bits for RAW mode simulator to decap the pkt
  1565. */
  1566. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1567. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1568. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1569. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1570. return nbuf;
  1571. }
  1572. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1573. /*
  1574. * This is a case where we have multiple msdus (A-MSDU) spread across
  1575. * multiple nbufs. here we create a fraglist out of these nbufs.
  1576. *
  1577. * the moment we encounter a nbuf with continuation bit set we
  1578. * know for sure we have an MSDU which is spread across multiple
  1579. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1580. */
  1581. parent = nbuf;
  1582. frag_list = nbuf->next;
  1583. nbuf = nbuf->next;
  1584. /*
  1585. * set the start bit in the first nbuf we encounter with continuation
  1586. * bit set. This has the proper mpdu length set as it is the first
  1587. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1588. * nbufs will form the frag_list of the parent nbuf.
  1589. */
  1590. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1591. /*
  1592. * L3 header padding is only needed for the 1st buffer
  1593. * in a scattered msdu
  1594. */
  1595. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1596. l3_hdr_pad_offset);
  1597. /*
  1598. * MSDU cont bit is set but reported MPDU length can fit
  1599. * in to single buffer
  1600. *
  1601. * Increment error stats and avoid SG list creation
  1602. */
  1603. if (last_nbuf) {
  1604. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1605. qdf_nbuf_pull_head(parent,
  1606. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1607. return parent;
  1608. }
  1609. /*
  1610. * this is where we set the length of the fragments which are
  1611. * associated to the parent nbuf. We iterate through the frag_list
  1612. * till we hit the last_nbuf of the list.
  1613. */
  1614. do {
  1615. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1616. qdf_nbuf_pull_head(nbuf,
  1617. soc->rx_pkt_tlv_size);
  1618. frag_list_len += qdf_nbuf_len(nbuf);
  1619. if (last_nbuf) {
  1620. next = nbuf->next;
  1621. nbuf->next = NULL;
  1622. break;
  1623. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1624. dp_err("Invalid packet length");
  1625. qdf_assert_always(0);
  1626. }
  1627. nbuf = nbuf->next;
  1628. } while (!last_nbuf);
  1629. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1630. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1631. parent->next = next;
  1632. qdf_nbuf_pull_head(parent,
  1633. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1634. return parent;
  1635. }
  1636. #ifdef DP_RX_SG_FRAME_SUPPORT
  1637. bool dp_rx_is_sg_supported(void)
  1638. {
  1639. return true;
  1640. }
  1641. #else
  1642. bool dp_rx_is_sg_supported(void)
  1643. {
  1644. return false;
  1645. }
  1646. #endif
  1647. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1648. #ifdef QCA_PEER_EXT_STATS
  1649. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1650. qdf_nbuf_t nbuf)
  1651. {
  1652. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1653. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1654. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1655. }
  1656. #endif /* QCA_PEER_EXT_STATS */
  1657. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1658. {
  1659. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1660. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1661. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1662. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1663. uint32_t interframe_delay =
  1664. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1665. struct cdp_tid_rx_stats *rstats =
  1666. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1667. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1668. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1669. /*
  1670. * Update interframe delay stats calculated at deliver_data_ol point.
  1671. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1672. * interframe delay will not be calculate correctly for 1st frame.
  1673. * On the other side, this will help in avoiding extra per packet check
  1674. * of vdev->prev_rx_deliver_tstamp.
  1675. */
  1676. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1677. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1678. vdev->prev_rx_deliver_tstamp = current_ts;
  1679. }
  1680. /**
  1681. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1682. * @pdev: dp pdev reference
  1683. * @buf_list: buffer list to be dropepd
  1684. *
  1685. * Return: int (number of bufs dropped)
  1686. */
  1687. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1688. qdf_nbuf_t buf_list)
  1689. {
  1690. struct cdp_tid_rx_stats *stats = NULL;
  1691. uint8_t tid = 0, ring_id = 0;
  1692. int num_dropped = 0;
  1693. qdf_nbuf_t buf, next_buf;
  1694. buf = buf_list;
  1695. while (buf) {
  1696. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1697. next_buf = qdf_nbuf_queue_next(buf);
  1698. tid = qdf_nbuf_get_tid_val(buf);
  1699. if (qdf_likely(pdev)) {
  1700. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1701. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1702. stats->delivered_to_stack--;
  1703. }
  1704. dp_rx_nbuf_free(buf);
  1705. buf = next_buf;
  1706. num_dropped++;
  1707. }
  1708. return num_dropped;
  1709. }
  1710. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1711. /**
  1712. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1713. * @soc: core txrx main context
  1714. * @vdev: vdev
  1715. * @txrx_peer: txrx peer
  1716. * @nbuf_head: skb list head
  1717. *
  1718. * Return: true if packet is delivered to netdev per STA.
  1719. */
  1720. bool
  1721. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1722. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1723. {
  1724. /*
  1725. * When extended WDS is disabled, frames are sent to AP netdevice.
  1726. */
  1727. if (qdf_likely(!vdev->wds_ext_enabled))
  1728. return false;
  1729. /*
  1730. * There can be 2 cases:
  1731. * 1. Send frame to parent netdev if its not for netdev per STA
  1732. * 2. If frame is meant for netdev per STA:
  1733. * a. Send frame to appropriate netdev using registered fp.
  1734. * b. If fp is NULL, drop the frames.
  1735. */
  1736. if (!txrx_peer->wds_ext.init)
  1737. return false;
  1738. if (txrx_peer->osif_rx)
  1739. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1740. else
  1741. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1742. return true;
  1743. }
  1744. #else
  1745. static inline bool
  1746. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1747. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1748. {
  1749. return false;
  1750. }
  1751. #endif
  1752. #ifdef PEER_CACHE_RX_PKTS
  1753. #if defined(WLAN_FEATURE_11BE_MLO) && defined(DP_MLO_LINK_STATS_SUPPORT)
  1754. /**
  1755. * dp_set_nbuf_band() - Set band in nbuf cb
  1756. * @peer: dp_peer
  1757. * @nbuf: nbuf
  1758. *
  1759. * Return: None
  1760. */
  1761. static inline void
  1762. dp_set_nbuf_band(struct dp_peer *peer, qdf_nbuf_t nbuf)
  1763. {
  1764. uint8_t link_id = 0;
  1765. link_id = dp_rx_get_stats_arr_idx_from_link_id(nbuf, peer->txrx_peer);
  1766. dp_rx_set_nbuf_band(nbuf, peer->txrx_peer, link_id);
  1767. }
  1768. #else
  1769. static inline void
  1770. dp_set_nbuf_band(struct dp_peer *peer, qdf_nbuf_t nbuf)
  1771. {
  1772. }
  1773. #endif
  1774. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1775. {
  1776. struct dp_peer_cached_bufq *bufqi;
  1777. struct dp_rx_cached_buf *cache_buf = NULL;
  1778. ol_txrx_rx_fp data_rx = NULL;
  1779. int num_buff_elem;
  1780. QDF_STATUS status;
  1781. /*
  1782. * Flush dp cached frames only for mld peers and legacy peers, as
  1783. * link peers don't store cached frames
  1784. */
  1785. if (IS_MLO_DP_LINK_PEER(peer))
  1786. return;
  1787. if (!peer->txrx_peer) {
  1788. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1789. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1790. return;
  1791. }
  1792. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1793. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1794. return;
  1795. }
  1796. qdf_spin_lock_bh(&peer->peer_info_lock);
  1797. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1798. data_rx = peer->vdev->osif_rx;
  1799. else
  1800. drop = true;
  1801. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1802. bufqi = &peer->txrx_peer->bufq_info;
  1803. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1804. qdf_list_remove_front(&bufqi->cached_bufq,
  1805. (qdf_list_node_t **)&cache_buf);
  1806. while (cache_buf) {
  1807. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1808. cache_buf->buf);
  1809. bufqi->entries -= num_buff_elem;
  1810. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1811. if (drop) {
  1812. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1813. cache_buf->buf);
  1814. } else {
  1815. dp_set_nbuf_band(peer, cache_buf->buf);
  1816. /* Flush the cached frames to OSIF DEV */
  1817. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1818. if (status != QDF_STATUS_SUCCESS)
  1819. bufqi->dropped = dp_rx_drop_nbuf_list(
  1820. peer->vdev->pdev,
  1821. cache_buf->buf);
  1822. }
  1823. qdf_mem_free(cache_buf);
  1824. cache_buf = NULL;
  1825. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1826. qdf_list_remove_front(&bufqi->cached_bufq,
  1827. (qdf_list_node_t **)&cache_buf);
  1828. }
  1829. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1830. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1831. }
  1832. /**
  1833. * dp_rx_enqueue_rx() - cache rx frames
  1834. * @peer: peer
  1835. * @txrx_peer: DP txrx_peer
  1836. * @rx_buf_list: cache buffer list
  1837. *
  1838. * Return: None
  1839. */
  1840. static QDF_STATUS
  1841. dp_rx_enqueue_rx(struct dp_peer *peer,
  1842. struct dp_txrx_peer *txrx_peer,
  1843. qdf_nbuf_t rx_buf_list)
  1844. {
  1845. struct dp_rx_cached_buf *cache_buf;
  1846. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1847. int num_buff_elem;
  1848. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1849. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1850. struct dp_peer *ta_peer = NULL;
  1851. /*
  1852. * If peer id is invalid which likely peer map has not completed,
  1853. * then need caller provide dp_peer pointer, else it's ok to use
  1854. * txrx_peer->peer_id to get dp_peer.
  1855. */
  1856. if (peer) {
  1857. if (QDF_STATUS_SUCCESS ==
  1858. dp_peer_get_ref(soc, peer, DP_MOD_ID_RX))
  1859. ta_peer = peer;
  1860. } else {
  1861. ta_peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1862. DP_MOD_ID_RX);
  1863. }
  1864. if (!ta_peer) {
  1865. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1866. rx_buf_list);
  1867. return QDF_STATUS_E_INVAL;
  1868. }
  1869. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1870. bufqi->dropped);
  1871. if (!ta_peer->valid) {
  1872. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1873. rx_buf_list);
  1874. ret = QDF_STATUS_E_INVAL;
  1875. goto fail;
  1876. }
  1877. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1878. if (bufqi->entries >= bufqi->thresh) {
  1879. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1880. rx_buf_list);
  1881. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1882. ret = QDF_STATUS_E_RESOURCES;
  1883. goto fail;
  1884. }
  1885. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1886. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1887. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1888. if (!cache_buf) {
  1889. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1890. "Failed to allocate buf to cache rx frames");
  1891. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1892. rx_buf_list);
  1893. ret = QDF_STATUS_E_NOMEM;
  1894. goto fail;
  1895. }
  1896. cache_buf->buf = rx_buf_list;
  1897. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1898. qdf_list_insert_back(&bufqi->cached_bufq,
  1899. &cache_buf->node);
  1900. bufqi->entries += num_buff_elem;
  1901. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1902. fail:
  1903. dp_peer_unref_delete(ta_peer, DP_MOD_ID_RX);
  1904. return ret;
  1905. }
  1906. static inline
  1907. bool dp_rx_is_peer_cache_bufq_supported(void)
  1908. {
  1909. return true;
  1910. }
  1911. #else
  1912. static inline
  1913. bool dp_rx_is_peer_cache_bufq_supported(void)
  1914. {
  1915. return false;
  1916. }
  1917. static inline QDF_STATUS
  1918. dp_rx_enqueue_rx(struct dp_peer *peer,
  1919. struct dp_txrx_peer *txrx_peer,
  1920. qdf_nbuf_t rx_buf_list)
  1921. {
  1922. return QDF_STATUS_SUCCESS;
  1923. }
  1924. #endif
  1925. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1926. /**
  1927. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1928. * using the appropriate call back functions.
  1929. * @soc: soc
  1930. * @vdev: vdev
  1931. * @txrx_peer: peer
  1932. * @nbuf_head: skb list head
  1933. *
  1934. * Return: None
  1935. */
  1936. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1937. struct dp_vdev *vdev,
  1938. struct dp_txrx_peer *txrx_peer,
  1939. qdf_nbuf_t nbuf_head)
  1940. {
  1941. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1942. txrx_peer, nbuf_head)))
  1943. return;
  1944. /* Function pointer initialized only when FISA is enabled */
  1945. if (vdev->osif_fisa_rx)
  1946. /* on failure send it via regular path */
  1947. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1948. else
  1949. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1950. }
  1951. #else
  1952. /**
  1953. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1954. * using the appropriate call back functions.
  1955. * @soc: soc
  1956. * @vdev: vdev
  1957. * @txrx_peer: txrx peer
  1958. * @nbuf_head: skb list head
  1959. *
  1960. * Check the return status of the call back function and drop
  1961. * the packets if the return status indicates a failure.
  1962. *
  1963. * Return: None
  1964. */
  1965. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1966. struct dp_vdev *vdev,
  1967. struct dp_txrx_peer *txrx_peer,
  1968. qdf_nbuf_t nbuf_head)
  1969. {
  1970. int num_nbuf = 0;
  1971. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1972. /* Function pointer initialized only when FISA is enabled */
  1973. if (vdev->osif_fisa_rx)
  1974. /* on failure send it via regular path */
  1975. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1976. else if (vdev->osif_rx)
  1977. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1978. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1979. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1980. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1981. if (txrx_peer)
  1982. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1983. num_nbuf);
  1984. }
  1985. }
  1986. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1987. /**
  1988. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1989. * @soc: DP soc
  1990. * @vdev: DP vdev handle
  1991. * @txrx_peer: pointer to the txrx peer object
  1992. * @nbuf_head: skb list head
  1993. *
  1994. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1995. * QDF_STATUS_E_FAILURE
  1996. */
  1997. static inline QDF_STATUS
  1998. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1999. struct dp_vdev *vdev,
  2000. struct dp_txrx_peer *txrx_peer,
  2001. qdf_nbuf_t nbuf_head)
  2002. {
  2003. int num_nbuf;
  2004. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  2005. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  2006. /*
  2007. * This is a special case where vdev is invalid,
  2008. * so we cannot know the pdev to which this packet
  2009. * belonged. Hence we update the soc rx error stats.
  2010. */
  2011. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  2012. return QDF_STATUS_E_FAILURE;
  2013. }
  2014. /*
  2015. * highly unlikely to have a vdev without a registered rx
  2016. * callback function. if so let us free the nbuf_list.
  2017. */
  2018. if (qdf_unlikely(!vdev->osif_rx)) {
  2019. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  2020. dp_rx_enqueue_rx(NULL, txrx_peer, nbuf_head);
  2021. } else {
  2022. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  2023. nbuf_head);
  2024. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  2025. vdev->pdev->enhanced_stats_en);
  2026. }
  2027. return QDF_STATUS_E_FAILURE;
  2028. }
  2029. return QDF_STATUS_SUCCESS;
  2030. }
  2031. #if defined(WLAN_FEATURE_11BE_MLO) && defined(RAW_PKT_MLD_ADDR_CONVERSION)
  2032. static void dp_rx_raw_pkt_mld_addr_conv(struct dp_soc *soc,
  2033. struct dp_vdev *vdev,
  2034. struct dp_txrx_peer *txrx_peer,
  2035. qdf_nbuf_t nbuf_head)
  2036. {
  2037. qdf_nbuf_t nbuf, next;
  2038. struct dp_peer *peer = NULL;
  2039. struct ieee80211_frame *wh = NULL;
  2040. if (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)
  2041. return;
  2042. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  2043. DP_MOD_ID_RX);
  2044. if (!peer)
  2045. return;
  2046. if (!IS_MLO_DP_MLD_PEER(peer)) {
  2047. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2048. return;
  2049. }
  2050. nbuf = nbuf_head;
  2051. while (nbuf) {
  2052. next = nbuf->next;
  2053. wh = (struct ieee80211_frame *)qdf_nbuf_data(nbuf);
  2054. qdf_mem_copy(wh->i_addr1, vdev->mld_mac_addr.raw,
  2055. QDF_MAC_ADDR_SIZE);
  2056. qdf_mem_copy(wh->i_addr2, peer->mac_addr.raw,
  2057. QDF_MAC_ADDR_SIZE);
  2058. nbuf = next;
  2059. }
  2060. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2061. }
  2062. #else
  2063. static inline
  2064. void dp_rx_raw_pkt_mld_addr_conv(struct dp_soc *soc,
  2065. struct dp_vdev *vdev,
  2066. struct dp_txrx_peer *txrx_peer,
  2067. qdf_nbuf_t nbuf_head)
  2068. { }
  2069. #endif
  2070. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  2071. struct dp_vdev *vdev,
  2072. struct dp_txrx_peer *txrx_peer,
  2073. qdf_nbuf_t nbuf_head,
  2074. qdf_nbuf_t nbuf_tail)
  2075. {
  2076. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  2077. QDF_STATUS_SUCCESS)
  2078. return QDF_STATUS_E_FAILURE;
  2079. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  2080. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  2081. dp_rx_raw_pkt_mld_addr_conv(soc, vdev, txrx_peer, nbuf_head);
  2082. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  2083. &nbuf_tail);
  2084. }
  2085. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  2086. return QDF_STATUS_SUCCESS;
  2087. }
  2088. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  2089. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  2090. struct dp_vdev *vdev,
  2091. struct dp_txrx_peer *txrx_peer,
  2092. qdf_nbuf_t nbuf_head,
  2093. qdf_nbuf_t nbuf_tail)
  2094. {
  2095. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  2096. QDF_STATUS_SUCCESS)
  2097. return QDF_STATUS_E_FAILURE;
  2098. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  2099. return QDF_STATUS_SUCCESS;
  2100. }
  2101. #endif
  2102. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2103. #ifdef VDEV_PEER_PROTOCOL_COUNT
  2104. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  2105. { \
  2106. qdf_nbuf_t nbuf_local; \
  2107. struct dp_txrx_peer *txrx_peer_local; \
  2108. struct dp_vdev *vdev_local = vdev_hdl; \
  2109. do { \
  2110. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  2111. break; \
  2112. nbuf_local = nbuf; \
  2113. txrx_peer_local = txrx_peer; \
  2114. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  2115. break; \
  2116. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  2117. break; \
  2118. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  2119. (nbuf_local), \
  2120. (txrx_peer_local), 0, 1); \
  2121. } while (0); \
  2122. }
  2123. #else
  2124. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  2125. #endif
  2126. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  2127. /**
  2128. * dp_rx_rates_stats_update() - update rate stats
  2129. * from rx msdu.
  2130. * @soc: datapath soc handle
  2131. * @nbuf: received msdu buffer
  2132. * @rx_tlv_hdr: rx tlv header
  2133. * @txrx_peer: datapath txrx_peer handle
  2134. * @sgi: Short Guard Interval
  2135. * @mcs: Modulation and Coding Set
  2136. * @nss: Number of Spatial Streams
  2137. * @bw: BandWidth
  2138. * @pkt_type: Corresponds to preamble
  2139. * @link_id: Link Id on which packet is received
  2140. *
  2141. * To be precisely record rates, following factors are considered:
  2142. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  2143. * Make sure to affect rx throughput as least as possible.
  2144. *
  2145. * Return: void
  2146. */
  2147. static void
  2148. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2149. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2150. uint32_t sgi, uint32_t mcs,
  2151. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  2152. uint8_t link_id)
  2153. {
  2154. uint32_t rix;
  2155. uint16_t ratecode;
  2156. uint32_t avg_rx_rate;
  2157. uint32_t ratekbps;
  2158. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  2159. if (soc->high_throughput ||
  2160. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  2161. return;
  2162. }
  2163. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs, link_id);
  2164. /* In 11b mode, the nss we get from tlv is 0, invalid and should be 1 */
  2165. if (qdf_unlikely(pkt_type == DOT11_B))
  2166. nss = 1;
  2167. /* here pkt_type corresponds to preamble */
  2168. ratekbps = dp_getrateindex(sgi,
  2169. mcs,
  2170. nss - 1,
  2171. pkt_type,
  2172. bw,
  2173. punc_mode,
  2174. &rix,
  2175. &ratecode);
  2176. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps, link_id);
  2177. avg_rx_rate =
  2178. dp_ath_rate_lpf(
  2179. txrx_peer->stats[link_id].extd_stats.rx.avg_rx_rate,
  2180. ratekbps);
  2181. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate, link_id);
  2182. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss, link_id);
  2183. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs, link_id);
  2184. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw, link_id);
  2185. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi, link_id);
  2186. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type, link_id);
  2187. }
  2188. #else
  2189. static inline void
  2190. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2191. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2192. uint32_t sgi, uint32_t mcs,
  2193. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  2194. uint8_t link_id)
  2195. {
  2196. }
  2197. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  2198. #ifndef QCA_ENHANCED_STATS_SUPPORT
  2199. /**
  2200. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  2201. *
  2202. * @soc: datapath soc handle
  2203. * @nbuf: received msdu buffer
  2204. * @rx_tlv_hdr: rx tlv header
  2205. * @txrx_peer: datapath txrx_peer handle
  2206. * @link_id: link id on which the packet is received
  2207. *
  2208. * Return: void
  2209. */
  2210. static inline
  2211. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2212. uint8_t *rx_tlv_hdr,
  2213. struct dp_txrx_peer *txrx_peer,
  2214. uint8_t link_id)
  2215. {
  2216. bool is_ampdu;
  2217. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  2218. uint8_t dst_mcs_idx;
  2219. /*
  2220. * TODO - For KIWI this field is present in ring_desc
  2221. * Try to use ring desc instead of tlv.
  2222. */
  2223. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  2224. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu, link_id);
  2225. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu),
  2226. link_id);
  2227. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  2228. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  2229. tid = qdf_nbuf_get_tid_val(nbuf);
  2230. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  2231. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  2232. rx_tlv_hdr);
  2233. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  2234. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  2235. /* do HW to SW pkt type conversion */
  2236. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  2237. hal_2_dp_pkt_type_map[pkt_type]);
  2238. /*
  2239. * The MCS index does not start with 0 when NSS>1 in HT mode.
  2240. * MCS params for optional 20/40MHz, NSS=1~3, EQM(NSS>1):
  2241. * ------------------------------------------------------
  2242. * NSS | 1 | 2 | 3 | 4
  2243. * ------------------------------------------------------
  2244. * MCS index: HT20 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  2245. * ------------------------------------------------------
  2246. * MCS index: HT40 | 0 ~ 7 | 8 ~ 15 | 16 ~ 23 | 24 ~ 31
  2247. * ------------------------------------------------------
  2248. * Currently, the MAX_NSS=2. If NSS>2, MCS index = 8 * (NSS-1)
  2249. */
  2250. if ((pkt_type == DOT11_N) && (nss == 2))
  2251. mcs += 8;
  2252. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  2253. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2254. link_id);
  2255. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  2256. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2257. link_id);
  2258. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1, link_id);
  2259. /*
  2260. * only if nss > 0 and pkt_type is 11N/AC/AX,
  2261. * then increase index [nss - 1] in array counter.
  2262. */
  2263. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  2264. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1, link_id);
  2265. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1, link_id);
  2266. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  2267. hal_rx_tlv_mic_err_get(soc->hal_soc,
  2268. rx_tlv_hdr), link_id);
  2269. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  2270. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  2271. rx_tlv_hdr), link_id);
  2272. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1,
  2273. link_id);
  2274. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1,
  2275. link_id);
  2276. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  2277. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  2278. DP_PEER_EXTD_STATS_INC(txrx_peer,
  2279. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  2280. 1, link_id);
  2281. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  2282. sgi, mcs, nss, bw, pkt_type, link_id);
  2283. }
  2284. #else
  2285. static inline
  2286. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2287. uint8_t *rx_tlv_hdr,
  2288. struct dp_txrx_peer *txrx_peer,
  2289. uint8_t link_id)
  2290. {
  2291. }
  2292. #endif
  2293. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  2294. static inline void
  2295. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2296. qdf_nbuf_t nbuf, uint8_t link_id)
  2297. {
  2298. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  2299. if (qdf_unlikely(lmac_id >= CDP_MAX_LMACS)) {
  2300. dp_err_rl("Invalid lmac_id: %u vdev_id: %u",
  2301. lmac_id, QDF_NBUF_CB_RX_VDEV_ID(nbuf));
  2302. if (qdf_likely(txrx_peer))
  2303. dp_err_rl("peer_id: %u", txrx_peer->peer_id);
  2304. return;
  2305. }
  2306. /* only count stats per lmac for MLO connection*/
  2307. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  2308. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  2309. txrx_peer->is_mld_peer, link_id);
  2310. }
  2311. #else
  2312. static inline void
  2313. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2314. qdf_nbuf_t nbuf, uint8_t link_id)
  2315. {
  2316. }
  2317. #endif
  2318. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2319. uint8_t *rx_tlv_hdr,
  2320. struct dp_txrx_peer *txrx_peer,
  2321. uint8_t ring_id,
  2322. struct cdp_tid_rx_stats *tid_stats,
  2323. uint8_t link_id)
  2324. {
  2325. bool is_not_amsdu;
  2326. struct dp_vdev *vdev = txrx_peer->vdev;
  2327. uint8_t enh_flag;
  2328. qdf_ether_header_t *eh;
  2329. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2330. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2331. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2332. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2333. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2334. msdu_len, link_id);
  2335. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2336. is_not_amsdu, link_id);
  2337. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1,
  2338. !is_not_amsdu, link_id);
  2339. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2340. qdf_nbuf_is_rx_retry_flag(nbuf), link_id);
  2341. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf, link_id);
  2342. tid_stats->msdu_cnt++;
  2343. enh_flag = vdev->pdev->enhanced_stats_en;
  2344. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2345. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2346. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2347. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag, link_id);
  2348. tid_stats->mcast_msdu_cnt++;
  2349. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2350. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len,
  2351. enh_flag, link_id);
  2352. tid_stats->bcast_msdu_cnt++;
  2353. }
  2354. } else {
  2355. DP_PEER_UC_INCC_PKT(txrx_peer, 1, msdu_len,
  2356. enh_flag, link_id);
  2357. }
  2358. txrx_peer->stats[link_id].per_pkt_stats.rx.last_rx_ts =
  2359. qdf_system_ticks();
  2360. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr,
  2361. txrx_peer, link_id);
  2362. }
  2363. #ifndef WDS_VENDOR_EXTENSION
  2364. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2365. struct dp_vdev *vdev,
  2366. struct dp_txrx_peer *txrx_peer)
  2367. {
  2368. return 1;
  2369. }
  2370. #endif
  2371. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2372. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2373. /**
  2374. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2375. * during roaming
  2376. * @vdev: dp_vdev pointer
  2377. * @rx_tlv_hdr: rx tlv header
  2378. * @nbuf: pkt skb pointer
  2379. *
  2380. * This function will check if rx udp data is received from authorised
  2381. * roamed peer before peer map indication is received from FW after
  2382. * roaming. This is needed for VoIP scenarios in which packet loss
  2383. * expected during roaming is minimal.
  2384. *
  2385. * Return: bool
  2386. */
  2387. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2388. uint8_t *rx_tlv_hdr,
  2389. qdf_nbuf_t nbuf)
  2390. {
  2391. char *hdr_desc;
  2392. struct ieee80211_frame *wh = NULL;
  2393. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2394. rx_tlv_hdr);
  2395. wh = (struct ieee80211_frame *)hdr_desc;
  2396. if (vdev->roaming_peer_status ==
  2397. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2398. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2399. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2400. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2401. return true;
  2402. return false;
  2403. }
  2404. #else
  2405. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2406. uint8_t *rx_tlv_hdr,
  2407. qdf_nbuf_t nbuf)
  2408. {
  2409. return false;
  2410. }
  2411. #endif
  2412. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2413. {
  2414. uint16_t peer_id;
  2415. uint8_t vdev_id;
  2416. struct dp_vdev *vdev = NULL;
  2417. uint32_t l2_hdr_offset = 0;
  2418. uint16_t msdu_len = 0;
  2419. uint32_t pkt_len = 0;
  2420. uint8_t *rx_tlv_hdr;
  2421. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2422. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2423. bool is_special_frame = false;
  2424. struct dp_peer *peer = NULL;
  2425. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2426. if (peer_id > soc->max_peer_id)
  2427. goto deliver_fail;
  2428. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2429. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2430. if (!vdev || vdev->delete.pending)
  2431. goto deliver_fail;
  2432. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2433. goto deliver_fail;
  2434. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2435. l2_hdr_offset =
  2436. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2437. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2438. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2439. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2440. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2441. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2442. is_special_frame = dp_rx_is_special_frame(nbuf, frame_mask);
  2443. if (qdf_likely(vdev->osif_rx)) {
  2444. if (is_special_frame ||
  2445. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr,
  2446. nbuf)) {
  2447. qdf_nbuf_set_exc_frame(nbuf, 1);
  2448. if (QDF_STATUS_SUCCESS !=
  2449. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2450. goto deliver_fail;
  2451. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2452. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2453. return;
  2454. }
  2455. } else if (is_special_frame) {
  2456. /*
  2457. * If MLO connection, txrx_peer for link peer does not exist,
  2458. * try to store these RX packets to txrx_peer's bufq of MLD
  2459. * peer until vdev->osif_rx is registered from CP and flush
  2460. * them to stack.
  2461. */
  2462. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id,
  2463. DP_MOD_ID_RX);
  2464. if (!peer)
  2465. goto deliver_fail;
  2466. /* only check for MLO connection */
  2467. if (IS_MLO_DP_MLD_PEER(peer) && peer->txrx_peer &&
  2468. dp_rx_is_peer_cache_bufq_supported()) {
  2469. qdf_nbuf_set_exc_frame(nbuf, 1);
  2470. if (QDF_STATUS_SUCCESS ==
  2471. dp_rx_enqueue_rx(peer, peer->txrx_peer, nbuf)) {
  2472. DP_STATS_INC(soc,
  2473. rx.err.pkt_delivered_no_peer,
  2474. 1);
  2475. } else {
  2476. DP_STATS_INC(soc,
  2477. rx.err.rx_invalid_peer.num,
  2478. 1);
  2479. }
  2480. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2481. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2482. return;
  2483. }
  2484. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2485. }
  2486. deliver_fail:
  2487. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2488. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2489. dp_rx_nbuf_free(nbuf);
  2490. if (vdev)
  2491. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2492. }
  2493. #else
  2494. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2495. {
  2496. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2497. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2498. dp_rx_nbuf_free(nbuf);
  2499. }
  2500. #endif
  2501. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2502. #ifdef WLAN_SUPPORT_RX_FISA
  2503. QDF_STATUS dp_fisa_config(ol_txrx_soc_handle cdp_soc, uint8_t pdev_id,
  2504. enum cdp_fisa_config_id config_id,
  2505. union cdp_fisa_config *cfg)
  2506. {
  2507. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2508. struct dp_pdev *pdev;
  2509. QDF_STATUS status;
  2510. pdev = dp_get_pdev_from_soc_pdev_id_wifi3(soc, pdev_id);
  2511. if (!pdev) {
  2512. dp_err("pdev is NULL for pdev_id %u", pdev_id);
  2513. return QDF_STATUS_E_INVAL;
  2514. }
  2515. switch (config_id) {
  2516. case CDP_FISA_HTT_RX_FISA_CFG:
  2517. status = dp_htt_rx_fisa_config(pdev, cfg->fisa_config);
  2518. break;
  2519. case CDP_FISA_HTT_RX_FSE_OP_CFG:
  2520. status = dp_htt_rx_flow_fse_operation(pdev, cfg->fse_op_cmd);
  2521. break;
  2522. case CDP_FISA_HTT_RX_FSE_SETUP_CFG:
  2523. status = dp_htt_rx_flow_fst_setup(pdev, cfg->fse_setup_info);
  2524. break;
  2525. default:
  2526. status = QDF_STATUS_E_INVAL;
  2527. }
  2528. return status;
  2529. }
  2530. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2531. {
  2532. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2533. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2534. }
  2535. #else
  2536. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2537. {
  2538. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2539. }
  2540. #endif
  2541. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2542. #ifdef DP_RX_DROP_RAW_FRM
  2543. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2544. {
  2545. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2546. dp_rx_nbuf_free(nbuf);
  2547. return true;
  2548. }
  2549. return false;
  2550. }
  2551. #endif
  2552. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2553. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2554. {
  2555. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2556. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2557. }
  2558. #endif
  2559. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2560. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2561. uint16_t peer_id, uint32_t is_offload,
  2562. qdf_nbuf_t netbuf)
  2563. {
  2564. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2565. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2566. peer_id, is_offload, pdev->pdev_id);
  2567. }
  2568. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2569. uint32_t is_offload)
  2570. {
  2571. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2572. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2573. soc, nbuf, HTT_INVALID_VDEV,
  2574. is_offload, 0);
  2575. }
  2576. #endif
  2577. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2578. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2579. {
  2580. QDF_STATUS ret;
  2581. if (vdev->osif_rx_flush) {
  2582. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2583. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2584. dp_err("Failed to flush rx pkts for vdev %d",
  2585. vdev->vdev_id);
  2586. return ret;
  2587. }
  2588. }
  2589. return QDF_STATUS_SUCCESS;
  2590. }
  2591. static QDF_STATUS
  2592. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2593. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2594. struct dp_pdev *dp_pdev,
  2595. struct rx_desc_pool *rx_desc_pool,
  2596. bool dp_buf_page_frag_alloc_enable)
  2597. {
  2598. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2599. if (dp_buf_page_frag_alloc_enable) {
  2600. (nbuf_frag_info_t->virt_addr).nbuf =
  2601. qdf_nbuf_frag_alloc(dp_soc->osdev,
  2602. rx_desc_pool->buf_size,
  2603. RX_BUFFER_RESERVATION,
  2604. rx_desc_pool->buf_alignment, FALSE);
  2605. } else {
  2606. (nbuf_frag_info_t->virt_addr).nbuf =
  2607. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2608. RX_BUFFER_RESERVATION,
  2609. rx_desc_pool->buf_alignment, FALSE);
  2610. }
  2611. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2612. dp_err("nbuf alloc failed");
  2613. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2614. return ret;
  2615. }
  2616. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2617. (nbuf_frag_info_t->virt_addr).nbuf,
  2618. QDF_DMA_FROM_DEVICE,
  2619. rx_desc_pool->buf_size);
  2620. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2621. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2622. dp_err("nbuf map failed");
  2623. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2624. return ret;
  2625. }
  2626. nbuf_frag_info_t->paddr =
  2627. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2628. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2629. &nbuf_frag_info_t->paddr,
  2630. rx_desc_pool);
  2631. if (ret == QDF_STATUS_E_FAILURE) {
  2632. dp_err("nbuf check x86 failed");
  2633. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2634. return ret;
  2635. }
  2636. return QDF_STATUS_SUCCESS;
  2637. }
  2638. QDF_STATUS
  2639. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2640. struct dp_srng *dp_rxdma_srng,
  2641. struct rx_desc_pool *rx_desc_pool,
  2642. uint32_t num_req_buffers)
  2643. {
  2644. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2645. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2646. union dp_rx_desc_list_elem_t *next;
  2647. void *rxdma_ring_entry;
  2648. qdf_dma_addr_t paddr;
  2649. struct dp_rx_nbuf_frag_info *nf_info;
  2650. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2651. uint32_t buffer_index, nbuf_ptrs_per_page;
  2652. qdf_nbuf_t nbuf;
  2653. QDF_STATUS ret;
  2654. int page_idx, total_pages;
  2655. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2656. union dp_rx_desc_list_elem_t *tail = NULL;
  2657. int sync_hw_ptr = 1;
  2658. uint32_t num_entries_avail;
  2659. bool dp_buf_page_frag_alloc_enable;
  2660. if (qdf_unlikely(!dp_pdev)) {
  2661. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2662. dp_soc, mac_id);
  2663. return QDF_STATUS_E_FAILURE;
  2664. }
  2665. dp_buf_page_frag_alloc_enable =
  2666. wlan_cfg_is_dp_buf_page_frag_alloc_enable(dp_soc->wlan_cfg_ctx);
  2667. if (qdf_unlikely(!rxdma_srng)) {
  2668. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2669. return QDF_STATUS_E_FAILURE;
  2670. }
  2671. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2672. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2673. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2674. rxdma_srng,
  2675. sync_hw_ptr);
  2676. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2677. if (!num_entries_avail) {
  2678. dp_err("Num of available entries is zero, nothing to do");
  2679. return QDF_STATUS_E_NOMEM;
  2680. }
  2681. if (num_entries_avail < num_req_buffers)
  2682. num_req_buffers = num_entries_avail;
  2683. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2684. num_req_buffers, &desc_list, &tail);
  2685. if (!nr_descs) {
  2686. dp_err("no free rx_descs in freelist");
  2687. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2688. return QDF_STATUS_E_NOMEM;
  2689. }
  2690. dp_debug("got %u RX descs for driver attach", nr_descs);
  2691. /*
  2692. * Try to allocate pointers to the nbuf one page at a time.
  2693. * Take pointers that can fit in one page of memory and
  2694. * iterate through the total descriptors that need to be
  2695. * allocated in order of pages. Reuse the pointers that
  2696. * have been allocated to fit in one page across each
  2697. * iteration to index into the nbuf.
  2698. */
  2699. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2700. /*
  2701. * Add an extra page to store the remainder if any
  2702. */
  2703. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2704. total_pages++;
  2705. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2706. if (!nf_info) {
  2707. dp_err("failed to allocate nbuf array");
  2708. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2709. QDF_BUG(0);
  2710. return QDF_STATUS_E_NOMEM;
  2711. }
  2712. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2713. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2714. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2715. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2716. /*
  2717. * The last page of buffer pointers may not be required
  2718. * completely based on the number of descriptors. Below
  2719. * check will ensure we are allocating only the
  2720. * required number of descriptors.
  2721. */
  2722. if (nr_nbuf_total >= nr_descs)
  2723. break;
  2724. /* Flag is set while pdev rx_desc_pool initialization */
  2725. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2726. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2727. &nf_info[nr_nbuf], dp_pdev,
  2728. rx_desc_pool);
  2729. else
  2730. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2731. &nf_info[nr_nbuf], dp_pdev,
  2732. rx_desc_pool,
  2733. dp_buf_page_frag_alloc_enable);
  2734. if (QDF_IS_STATUS_ERROR(ret))
  2735. break;
  2736. nr_nbuf_total++;
  2737. }
  2738. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2739. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2740. rxdma_ring_entry =
  2741. hal_srng_src_get_next(dp_soc->hal_soc,
  2742. rxdma_srng);
  2743. qdf_assert_always(rxdma_ring_entry);
  2744. next = desc_list->next;
  2745. paddr = nf_info[buffer_index].paddr;
  2746. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2747. /* Flag is set while pdev rx_desc_pool initialization */
  2748. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2749. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2750. &nf_info[buffer_index]);
  2751. else
  2752. dp_rx_desc_prep(&desc_list->rx_desc,
  2753. &nf_info[buffer_index]);
  2754. desc_list->rx_desc.in_use = 1;
  2755. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2756. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2757. __func__,
  2758. RX_DESC_REPLENISHED);
  2759. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2760. desc_list->rx_desc.cookie,
  2761. rx_desc_pool->owner);
  2762. dp_ipa_handle_rx_buf_smmu_mapping(
  2763. dp_soc, nbuf,
  2764. rx_desc_pool->buf_size, true,
  2765. __func__, __LINE__);
  2766. dp_audio_smmu_map(dp_soc->osdev,
  2767. qdf_mem_paddr_from_dmaaddr(dp_soc->osdev,
  2768. QDF_NBUF_CB_PADDR(nbuf)),
  2769. QDF_NBUF_CB_PADDR(nbuf),
  2770. rx_desc_pool->buf_size);
  2771. desc_list = next;
  2772. }
  2773. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2774. rxdma_srng, nr_nbuf, nr_nbuf);
  2775. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2776. }
  2777. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2778. qdf_mem_free(nf_info);
  2779. if (!nr_nbuf_total) {
  2780. dp_err("No nbuf's allocated");
  2781. QDF_BUG(0);
  2782. return QDF_STATUS_E_RESOURCES;
  2783. }
  2784. /* No need to count the number of bytes received during replenish.
  2785. * Therefore set replenish.pkts.bytes as 0.
  2786. */
  2787. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2788. return QDF_STATUS_SUCCESS;
  2789. }
  2790. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2791. #ifdef DP_RX_MON_MEM_FRAG
  2792. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2793. bool is_mon_dest_desc)
  2794. {
  2795. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2796. if (is_mon_dest_desc)
  2797. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2798. else
  2799. qdf_frag_cache_drain(&rx_desc_pool->pf_cache);
  2800. }
  2801. #else
  2802. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2803. bool is_mon_dest_desc)
  2804. {
  2805. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2806. if (is_mon_dest_desc)
  2807. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2808. }
  2809. #endif
  2810. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2811. QDF_STATUS
  2812. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2813. {
  2814. struct dp_soc *soc = pdev->soc;
  2815. uint32_t rxdma_entries;
  2816. uint32_t rx_sw_desc_num;
  2817. struct dp_srng *dp_rxdma_srng;
  2818. struct rx_desc_pool *rx_desc_pool;
  2819. uint32_t status = QDF_STATUS_SUCCESS;
  2820. int mac_for_pdev;
  2821. mac_for_pdev = pdev->lmac_id;
  2822. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2823. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2824. soc, mac_for_pdev);
  2825. return status;
  2826. }
  2827. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2828. rxdma_entries = dp_rxdma_srng->num_entries;
  2829. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2830. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2831. rx_desc_pool->desc_type = QDF_DP_RX_DESC_BUF_TYPE;
  2832. status = dp_rx_desc_pool_alloc(soc,
  2833. rx_sw_desc_num,
  2834. rx_desc_pool);
  2835. if (status != QDF_STATUS_SUCCESS)
  2836. return status;
  2837. return status;
  2838. }
  2839. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2840. {
  2841. int mac_for_pdev = pdev->lmac_id;
  2842. struct dp_soc *soc = pdev->soc;
  2843. struct rx_desc_pool *rx_desc_pool;
  2844. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2845. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2846. }
  2847. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2848. {
  2849. int mac_for_pdev = pdev->lmac_id;
  2850. struct dp_soc *soc = pdev->soc;
  2851. uint32_t rxdma_entries;
  2852. uint32_t rx_sw_desc_num;
  2853. struct dp_srng *dp_rxdma_srng;
  2854. struct rx_desc_pool *rx_desc_pool;
  2855. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2856. uint16_t buf_size;
  2857. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  2858. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2859. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2860. /*
  2861. * If NSS is enabled, rx_desc_pool is already filled.
  2862. * Hence, just disable desc_pool frag flag.
  2863. */
  2864. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2865. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2866. soc, mac_for_pdev);
  2867. return QDF_STATUS_SUCCESS;
  2868. }
  2869. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2870. return QDF_STATUS_E_NOMEM;
  2871. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2872. rxdma_entries = dp_rxdma_srng->num_entries;
  2873. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2874. rx_sw_desc_num =
  2875. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2876. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2877. rx_desc_pool->buf_size = buf_size;
  2878. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2879. /* Disable monitor dest processing via frag */
  2880. if (target_type == TARGET_TYPE_QCN9160) {
  2881. rx_desc_pool->buf_size = RX_MONITOR_BUFFER_SIZE;
  2882. rx_desc_pool->buf_alignment = RX_MONITOR_BUFFER_ALIGNMENT;
  2883. dp_rx_enable_mon_dest_frag(rx_desc_pool, true);
  2884. } else {
  2885. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2886. }
  2887. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2888. rx_sw_desc_num, rx_desc_pool);
  2889. return QDF_STATUS_SUCCESS;
  2890. }
  2891. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2892. {
  2893. int mac_for_pdev = pdev->lmac_id;
  2894. struct dp_soc *soc = pdev->soc;
  2895. struct rx_desc_pool *rx_desc_pool;
  2896. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2897. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2898. }
  2899. QDF_STATUS
  2900. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2901. {
  2902. int mac_for_pdev = pdev->lmac_id;
  2903. struct dp_soc *soc = pdev->soc;
  2904. struct dp_srng *dp_rxdma_srng;
  2905. struct rx_desc_pool *rx_desc_pool;
  2906. uint32_t rxdma_entries;
  2907. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2908. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2909. rxdma_entries = dp_rxdma_srng->num_entries;
  2910. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2911. /* Initialize RX buffer pool which will be
  2912. * used during low memory conditions
  2913. */
  2914. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2915. if (target_type == TARGET_TYPE_QCN9160)
  2916. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev,
  2917. dp_rxdma_srng,
  2918. rx_desc_pool,
  2919. rxdma_entries - 1);
  2920. else
  2921. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2922. dp_rxdma_srng,
  2923. rx_desc_pool,
  2924. rxdma_entries - 1);
  2925. }
  2926. void
  2927. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2928. {
  2929. int mac_for_pdev = pdev->lmac_id;
  2930. struct dp_soc *soc = pdev->soc;
  2931. struct rx_desc_pool *rx_desc_pool;
  2932. uint32_t target_type = hal_get_target_type(soc->hal_soc);
  2933. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2934. if (target_type == TARGET_TYPE_QCN9160)
  2935. dp_rx_desc_frag_free(soc, rx_desc_pool);
  2936. else
  2937. dp_rx_desc_nbuf_free(soc, rx_desc_pool, false);
  2938. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2939. }
  2940. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2941. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2942. struct dp_txrx_peer *txrx_peer,
  2943. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2944. uint8_t *rx_tlv_hdr)
  2945. {
  2946. uint32_t l2_hdr_offset = 0;
  2947. uint16_t msdu_len = 0;
  2948. uint32_t skip_len;
  2949. l2_hdr_offset =
  2950. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2951. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2952. skip_len = l2_hdr_offset;
  2953. } else {
  2954. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2955. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2956. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2957. }
  2958. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2959. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2960. qdf_nbuf_pull_head(nbuf, skip_len);
  2961. if (txrx_peer->vdev) {
  2962. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2963. QDF_TX_RX_STATUS_OK);
  2964. }
  2965. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2966. dp_info("special frame, mpdu sn 0x%x",
  2967. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2968. qdf_nbuf_set_exc_frame(nbuf, 1);
  2969. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2970. nbuf, NULL);
  2971. return true;
  2972. }
  2973. return false;
  2974. }
  2975. #endif
  2976. #ifdef QCA_MULTIPASS_SUPPORT
  2977. bool dp_rx_multipass_process(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf,
  2978. uint8_t tid)
  2979. {
  2980. struct vlan_ethhdr *vethhdrp;
  2981. if (qdf_unlikely(!txrx_peer->vlan_id))
  2982. return true;
  2983. vethhdrp = (struct vlan_ethhdr *)qdf_nbuf_data(nbuf);
  2984. /*
  2985. * h_vlan_proto & h_vlan_TCI should be 0x8100 & zero respectively
  2986. * as it is expected to be padded by 0
  2987. * return false if frame doesn't have above tag so that caller will
  2988. * drop the frame.
  2989. */
  2990. if (qdf_unlikely(vethhdrp->h_vlan_proto != htons(QDF_ETH_TYPE_8021Q)) ||
  2991. qdf_unlikely(vethhdrp->h_vlan_TCI != 0))
  2992. return false;
  2993. vethhdrp->h_vlan_TCI = htons(((tid & 0x7) << VLAN_PRIO_SHIFT) |
  2994. (txrx_peer->vlan_id & VLAN_VID_MASK));
  2995. if (vethhdrp->h_vlan_encapsulated_proto == htons(ETHERTYPE_PAE))
  2996. dp_tx_remove_vlan_tag(txrx_peer->vdev, nbuf);
  2997. return true;
  2998. }
  2999. #endif /* QCA_MULTIPASS_SUPPORT */