hfi.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/io.h>
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/random.h>
  9. #include <asm/errno.h>
  10. #include <linux/timer.h>
  11. #include <media/cam_icp.h>
  12. #include <linux/iopoll.h>
  13. #include "cam_io_util.h"
  14. #include "hfi_reg.h"
  15. #include "hfi_sys_defs.h"
  16. #include "hfi_session_defs.h"
  17. #include "hfi_intf.h"
  18. #include "cam_icp_hw_mgr_intf.h"
  19. #include "cam_debug_util.h"
  20. #define HFI_VERSION_INFO_MAJOR_VAL 1
  21. #define HFI_VERSION_INFO_MINOR_VAL 1
  22. #define HFI_VERSION_INFO_STEP_VAL 0
  23. #define HFI_VERSION_INFO_STEP_VAL 0
  24. #define HFI_VERSION_INFO_MAJOR_BMSK 0xFF000000
  25. #define HFI_VERSION_INFO_MAJOR_SHFT 24
  26. #define HFI_VERSION_INFO_MINOR_BMSK 0xFFFF00
  27. #define HFI_VERSION_INFO_MINOR_SHFT 8
  28. #define HFI_VERSION_INFO_STEP_BMSK 0xFF
  29. #define HFI_VERSION_INFO_STEP_SHFT 0
  30. #define HFI_POLL_DELAY_US 100
  31. #define HFI_POLL_TIMEOUT_US 10000
  32. static struct hfi_info *g_hfi;
  33. unsigned int g_icp_mmu_hdl;
  34. static DEFINE_MUTEX(hfi_cmd_q_mutex);
  35. static DEFINE_MUTEX(hfi_msg_q_mutex);
  36. static void hfi_irq_raise(struct hfi_info *hfi)
  37. {
  38. if (hfi->ops.irq_raise)
  39. hfi->ops.irq_raise(hfi->priv);
  40. }
  41. static void hfi_irq_enable(struct hfi_info *hfi)
  42. {
  43. if (hfi->ops.irq_enable)
  44. hfi->ops.irq_enable(hfi->priv);
  45. }
  46. static void __iomem *hfi_iface_addr(struct hfi_info *hfi)
  47. {
  48. void __iomem *ret = NULL;
  49. if (hfi->ops.iface_addr)
  50. ret = hfi->ops.iface_addr(hfi->priv);
  51. return IS_ERR_OR_NULL(ret) ? NULL : ret;
  52. }
  53. void cam_hfi_queue_dump(void)
  54. {
  55. struct hfi_qtbl *qtbl;
  56. struct hfi_qtbl_hdr *qtbl_hdr;
  57. struct hfi_q_hdr *cmd_q_hdr, *msg_q_hdr;
  58. struct hfi_mem_info *hfi_mem = NULL;
  59. uint32_t *read_q, *read_ptr;
  60. int i;
  61. hfi_mem = &g_hfi->map;
  62. if (!hfi_mem) {
  63. CAM_ERR(CAM_HFI, "Unable to dump queues hfi memory is NULL");
  64. return;
  65. }
  66. qtbl = (struct hfi_qtbl *)hfi_mem->qtbl.kva;
  67. qtbl_hdr = &qtbl->q_tbl_hdr;
  68. CAM_DBG(CAM_HFI,
  69. "qtbl: version = %x size = %u num q = %u qhdr_size = %u",
  70. qtbl_hdr->qtbl_version, qtbl_hdr->qtbl_size,
  71. qtbl_hdr->qtbl_num_q, qtbl_hdr->qtbl_qhdr_size);
  72. cmd_q_hdr = &qtbl->q_hdr[Q_CMD];
  73. CAM_DBG(CAM_HFI, "cmd: size = %u r_idx = %u w_idx = %u addr = %x",
  74. cmd_q_hdr->qhdr_q_size, cmd_q_hdr->qhdr_read_idx,
  75. cmd_q_hdr->qhdr_write_idx, hfi_mem->cmd_q.iova);
  76. read_q = (uint32_t *)g_hfi->map.cmd_q.kva;
  77. read_ptr = (uint32_t *)(read_q + 0);
  78. CAM_DBG(CAM_HFI, "CMD Q START");
  79. for (i = 0; i < ICP_CMD_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT; i++)
  80. CAM_DBG(CAM_HFI, "Word: %d Data: 0x%08x ", i, read_ptr[i]);
  81. msg_q_hdr = &qtbl->q_hdr[Q_MSG];
  82. CAM_DBG(CAM_HFI, "msg: size = %u r_idx = %u w_idx = %u addr = %x",
  83. msg_q_hdr->qhdr_q_size, msg_q_hdr->qhdr_read_idx,
  84. msg_q_hdr->qhdr_write_idx, hfi_mem->msg_q.iova);
  85. read_q = (uint32_t *)g_hfi->map.msg_q.kva;
  86. read_ptr = (uint32_t *)(read_q + 0);
  87. CAM_DBG(CAM_HFI, "MSG Q START");
  88. for (i = 0; i < ICP_MSG_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT; i++)
  89. CAM_DBG(CAM_HFI, "Word: %d Data: 0x%08x ", i, read_ptr[i]);
  90. }
  91. int hfi_write_cmd(void *cmd_ptr)
  92. {
  93. uint32_t size_in_words, empty_space, new_write_idx, read_idx, temp;
  94. uint32_t *write_q, *write_ptr;
  95. struct hfi_qtbl *q_tbl;
  96. struct hfi_q_hdr *q;
  97. int rc = 0;
  98. if (!cmd_ptr) {
  99. CAM_ERR(CAM_HFI, "command is null");
  100. return -EINVAL;
  101. }
  102. mutex_lock(&hfi_cmd_q_mutex);
  103. if (!g_hfi) {
  104. CAM_ERR(CAM_HFI, "HFI interface not setup");
  105. rc = -ENODEV;
  106. goto err;
  107. }
  108. if (g_hfi->hfi_state != HFI_READY ||
  109. !g_hfi->cmd_q_state) {
  110. CAM_ERR(CAM_HFI, "HFI state: %u, cmd q state: %u",
  111. g_hfi->hfi_state, g_hfi->cmd_q_state);
  112. rc = -ENODEV;
  113. goto err;
  114. }
  115. q_tbl = (struct hfi_qtbl *)g_hfi->map.qtbl.kva;
  116. q = &q_tbl->q_hdr[Q_CMD];
  117. write_q = (uint32_t *)g_hfi->map.cmd_q.kva;
  118. size_in_words = (*(uint32_t *)cmd_ptr) >> BYTE_WORD_SHIFT;
  119. if (!size_in_words) {
  120. CAM_DBG(CAM_HFI, "failed");
  121. rc = -EINVAL;
  122. goto err;
  123. }
  124. read_idx = q->qhdr_read_idx;
  125. empty_space = (q->qhdr_write_idx >= read_idx) ?
  126. (q->qhdr_q_size - (q->qhdr_write_idx - read_idx)) :
  127. (read_idx - q->qhdr_write_idx);
  128. if (empty_space <= size_in_words) {
  129. CAM_ERR(CAM_HFI, "failed: empty space %u, size_in_words %u",
  130. empty_space, size_in_words);
  131. rc = -EIO;
  132. goto err;
  133. }
  134. new_write_idx = q->qhdr_write_idx + size_in_words;
  135. write_ptr = (uint32_t *)(write_q + q->qhdr_write_idx);
  136. if (new_write_idx < q->qhdr_q_size) {
  137. memcpy(write_ptr, (uint8_t *)cmd_ptr,
  138. size_in_words << BYTE_WORD_SHIFT);
  139. } else {
  140. new_write_idx -= q->qhdr_q_size;
  141. temp = (size_in_words - new_write_idx) << BYTE_WORD_SHIFT;
  142. memcpy(write_ptr, (uint8_t *)cmd_ptr, temp);
  143. memcpy(write_q, (uint8_t *)cmd_ptr + temp,
  144. new_write_idx << BYTE_WORD_SHIFT);
  145. }
  146. /*
  147. * To make sure command data in a command queue before
  148. * updating write index
  149. */
  150. wmb();
  151. q->qhdr_write_idx = new_write_idx;
  152. /*
  153. * Before raising interrupt make sure command data is ready for
  154. * firmware to process
  155. */
  156. wmb();
  157. hfi_irq_raise(g_hfi);
  158. err:
  159. mutex_unlock(&hfi_cmd_q_mutex);
  160. return rc;
  161. }
  162. int hfi_read_message(uint32_t *pmsg, uint8_t q_id,
  163. uint32_t *words_read)
  164. {
  165. struct hfi_qtbl *q_tbl_ptr;
  166. struct hfi_q_hdr *q;
  167. uint32_t new_read_idx, size_in_words, word_diff, temp;
  168. uint32_t *read_q, *read_ptr, *write_ptr;
  169. uint32_t size_upper_bound = 0;
  170. int rc = 0;
  171. if (!pmsg) {
  172. CAM_ERR(CAM_HFI, "Invalid msg");
  173. return -EINVAL;
  174. }
  175. if (q_id > Q_DBG) {
  176. CAM_ERR(CAM_HFI, "Invalid q :%u", q_id);
  177. return -EINVAL;
  178. }
  179. mutex_lock(&hfi_msg_q_mutex);
  180. if (!g_hfi) {
  181. CAM_ERR(CAM_HFI, "hfi not set up yet");
  182. rc = -ENODEV;
  183. goto err;
  184. }
  185. if ((g_hfi->hfi_state != HFI_READY) ||
  186. !g_hfi->msg_q_state) {
  187. CAM_ERR(CAM_HFI, "hfi state: %u, msg q state: %u",
  188. g_hfi->hfi_state, g_hfi->msg_q_state);
  189. rc = -ENODEV;
  190. goto err;
  191. }
  192. q_tbl_ptr = (struct hfi_qtbl *)g_hfi->map.qtbl.kva;
  193. q = &q_tbl_ptr->q_hdr[q_id];
  194. if (q->qhdr_read_idx == q->qhdr_write_idx) {
  195. CAM_DBG(CAM_HFI, "Q not ready, state:%u, r idx:%u, w idx:%u",
  196. g_hfi->hfi_state, q->qhdr_read_idx, q->qhdr_write_idx);
  197. rc = -EIO;
  198. goto err;
  199. }
  200. if (q_id == Q_MSG) {
  201. read_q = (uint32_t *)g_hfi->map.msg_q.kva;
  202. size_upper_bound = ICP_HFI_MAX_PKT_SIZE_MSGQ_IN_WORDS;
  203. } else {
  204. read_q = (uint32_t *)g_hfi->map.dbg_q.kva;
  205. size_upper_bound = ICP_HFI_MAX_PKT_SIZE_IN_WORDS;
  206. }
  207. read_ptr = (uint32_t *)(read_q + q->qhdr_read_idx);
  208. write_ptr = (uint32_t *)(read_q + q->qhdr_write_idx);
  209. if (write_ptr > read_ptr)
  210. size_in_words = write_ptr - read_ptr;
  211. else {
  212. word_diff = read_ptr - write_ptr;
  213. if (q_id == Q_MSG)
  214. size_in_words = (ICP_MSG_Q_SIZE_IN_BYTES >>
  215. BYTE_WORD_SHIFT) - word_diff;
  216. else
  217. size_in_words = (ICP_DBG_Q_SIZE_IN_BYTES >>
  218. BYTE_WORD_SHIFT) - word_diff;
  219. }
  220. if ((size_in_words == 0) ||
  221. (size_in_words > size_upper_bound)) {
  222. CAM_ERR(CAM_HFI, "invalid HFI message packet size - 0x%08x",
  223. size_in_words << BYTE_WORD_SHIFT);
  224. q->qhdr_read_idx = q->qhdr_write_idx;
  225. rc = -EIO;
  226. goto err;
  227. }
  228. new_read_idx = q->qhdr_read_idx + size_in_words;
  229. if (new_read_idx < q->qhdr_q_size) {
  230. memcpy(pmsg, read_ptr, size_in_words << BYTE_WORD_SHIFT);
  231. } else {
  232. new_read_idx -= q->qhdr_q_size;
  233. temp = (size_in_words - new_read_idx) << BYTE_WORD_SHIFT;
  234. memcpy(pmsg, read_ptr, temp);
  235. memcpy((uint8_t *)pmsg + temp, read_q,
  236. new_read_idx << BYTE_WORD_SHIFT);
  237. }
  238. q->qhdr_read_idx = new_read_idx;
  239. *words_read = size_in_words;
  240. /* Memory Barrier to make sure message
  241. * queue parameters are updated after read
  242. */
  243. wmb();
  244. err:
  245. mutex_unlock(&hfi_msg_q_mutex);
  246. return rc;
  247. }
  248. int hfi_cmd_ubwc_config(uint32_t *ubwc_cfg)
  249. {
  250. uint8_t *prop;
  251. struct hfi_cmd_prop *dbg_prop;
  252. uint32_t size = 0;
  253. size = sizeof(struct hfi_cmd_prop) +
  254. sizeof(struct hfi_cmd_ubwc_cfg);
  255. CAM_DBG(CAM_HFI,
  256. "size of ubwc %u, ubwc_cfg [rd-0x%x,wr-0x%x]",
  257. size, ubwc_cfg[0], ubwc_cfg[1]);
  258. prop = kzalloc(size, GFP_KERNEL);
  259. if (!prop)
  260. return -ENOMEM;
  261. dbg_prop = (struct hfi_cmd_prop *)prop;
  262. dbg_prop->size = size;
  263. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  264. dbg_prop->num_prop = 1;
  265. dbg_prop->prop_data[0] = HFI_PROP_SYS_UBWC_CFG;
  266. dbg_prop->prop_data[1] = ubwc_cfg[0];
  267. dbg_prop->prop_data[2] = ubwc_cfg[1];
  268. hfi_write_cmd(prop);
  269. kfree(prop);
  270. return 0;
  271. }
  272. int hfi_cmd_ubwc_config_ext(uint32_t *ubwc_ipe_cfg,
  273. uint32_t *ubwc_bps_cfg)
  274. {
  275. uint8_t *prop;
  276. struct hfi_cmd_prop *dbg_prop;
  277. uint32_t size = 0;
  278. size = sizeof(struct hfi_cmd_prop) +
  279. sizeof(struct hfi_cmd_ubwc_cfg_ext);
  280. CAM_DBG(CAM_HFI,
  281. "size of ubwc %u, ubwc_ipe_cfg[rd-0x%x,wr-0x%x] ubwc_bps_cfg[rd-0x%x,wr-0x%x]",
  282. size, ubwc_ipe_cfg[0], ubwc_ipe_cfg[1],
  283. ubwc_bps_cfg[0], ubwc_bps_cfg[1]);
  284. prop = kzalloc(size, GFP_KERNEL);
  285. if (!prop)
  286. return -ENOMEM;
  287. dbg_prop = (struct hfi_cmd_prop *)prop;
  288. dbg_prop->size = size;
  289. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  290. dbg_prop->num_prop = 1;
  291. dbg_prop->prop_data[0] = HFI_PROPERTY_SYS_UBWC_CONFIG_EX;
  292. dbg_prop->prop_data[1] = ubwc_bps_cfg[0];
  293. dbg_prop->prop_data[2] = ubwc_bps_cfg[1];
  294. dbg_prop->prop_data[3] = ubwc_ipe_cfg[0];
  295. dbg_prop->prop_data[4] = ubwc_ipe_cfg[1];
  296. hfi_write_cmd(prop);
  297. kfree(prop);
  298. return 0;
  299. }
  300. int hfi_enable_ipe_bps_pc(bool enable, uint32_t core_info)
  301. {
  302. uint8_t *prop;
  303. struct hfi_cmd_prop *dbg_prop;
  304. uint32_t size = 0;
  305. size = sizeof(struct hfi_cmd_prop) +
  306. sizeof(struct hfi_ipe_bps_pc);
  307. prop = kzalloc(size, GFP_KERNEL);
  308. if (!prop)
  309. return -ENOMEM;
  310. dbg_prop = (struct hfi_cmd_prop *)prop;
  311. dbg_prop->size = size;
  312. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  313. dbg_prop->num_prop = 1;
  314. dbg_prop->prop_data[0] = HFI_PROP_SYS_IPEBPS_PC;
  315. dbg_prop->prop_data[1] = enable;
  316. dbg_prop->prop_data[2] = core_info;
  317. hfi_write_cmd(prop);
  318. kfree(prop);
  319. return 0;
  320. }
  321. int hfi_set_debug_level(u64 icp_dbg_type, uint32_t lvl)
  322. {
  323. uint8_t *prop;
  324. struct hfi_cmd_prop *dbg_prop;
  325. uint32_t size = 0, val;
  326. val = HFI_DEBUG_MSG_LOW |
  327. HFI_DEBUG_MSG_MEDIUM |
  328. HFI_DEBUG_MSG_HIGH |
  329. HFI_DEBUG_MSG_ERROR |
  330. HFI_DEBUG_MSG_FATAL |
  331. HFI_DEBUG_MSG_PERF |
  332. HFI_DEBUG_CFG_WFI |
  333. HFI_DEBUG_CFG_ARM9WD;
  334. if (lvl > val)
  335. return -EINVAL;
  336. size = sizeof(struct hfi_cmd_prop) +
  337. sizeof(struct hfi_debug);
  338. prop = kzalloc(size, GFP_KERNEL);
  339. if (!prop)
  340. return -ENOMEM;
  341. dbg_prop = (struct hfi_cmd_prop *)prop;
  342. dbg_prop->size = size;
  343. dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  344. dbg_prop->num_prop = 1;
  345. dbg_prop->prop_data[0] = HFI_PROP_SYS_DEBUG_CFG;
  346. dbg_prop->prop_data[1] = lvl;
  347. dbg_prop->prop_data[2] = icp_dbg_type;
  348. hfi_write_cmd(prop);
  349. kfree(prop);
  350. return 0;
  351. }
  352. int hfi_set_fw_dump_level(uint32_t lvl)
  353. {
  354. uint8_t *prop = NULL;
  355. struct hfi_cmd_prop *fw_dump_level_switch_prop = NULL;
  356. uint32_t size = 0;
  357. CAM_DBG(CAM_HFI, "fw dump ENTER");
  358. size = sizeof(struct hfi_cmd_prop) + sizeof(lvl);
  359. prop = kzalloc(size, GFP_KERNEL);
  360. if (!prop)
  361. return -ENOMEM;
  362. fw_dump_level_switch_prop = (struct hfi_cmd_prop *)prop;
  363. fw_dump_level_switch_prop->size = size;
  364. fw_dump_level_switch_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
  365. fw_dump_level_switch_prop->num_prop = 1;
  366. fw_dump_level_switch_prop->prop_data[0] = HFI_PROP_SYS_FW_DUMP_CFG;
  367. fw_dump_level_switch_prop->prop_data[1] = lvl;
  368. CAM_DBG(CAM_HFI, "prop->size = %d\n"
  369. "prop->pkt_type = %d\n"
  370. "prop->num_prop = %d\n"
  371. "prop->prop_data[0] = %d\n"
  372. "prop->prop_data[1] = %d\n",
  373. fw_dump_level_switch_prop->size,
  374. fw_dump_level_switch_prop->pkt_type,
  375. fw_dump_level_switch_prop->num_prop,
  376. fw_dump_level_switch_prop->prop_data[0],
  377. fw_dump_level_switch_prop->prop_data[1]);
  378. hfi_write_cmd(prop);
  379. kfree(prop);
  380. return 0;
  381. }
  382. void hfi_send_system_cmd(uint32_t type, uint64_t data, uint32_t size)
  383. {
  384. switch (type) {
  385. case HFI_CMD_SYS_INIT: {
  386. struct hfi_cmd_sys_init init;
  387. memset(&init, 0, sizeof(init));
  388. init.size = sizeof(struct hfi_cmd_sys_init);
  389. init.pkt_type = type;
  390. hfi_write_cmd(&init);
  391. }
  392. break;
  393. case HFI_CMD_SYS_PC_PREP: {
  394. struct hfi_cmd_pc_prep prep;
  395. prep.size = sizeof(struct hfi_cmd_pc_prep);
  396. prep.pkt_type = type;
  397. hfi_write_cmd(&prep);
  398. }
  399. break;
  400. case HFI_CMD_SYS_SET_PROPERTY: {
  401. struct hfi_cmd_prop prop;
  402. if ((uint32_t)data == (uint32_t)HFI_PROP_SYS_DEBUG_CFG) {
  403. prop.size = sizeof(struct hfi_cmd_prop);
  404. prop.pkt_type = type;
  405. prop.num_prop = 1;
  406. prop.prop_data[0] = HFI_PROP_SYS_DEBUG_CFG;
  407. hfi_write_cmd(&prop);
  408. }
  409. }
  410. break;
  411. case HFI_CMD_SYS_GET_PROPERTY:
  412. break;
  413. case HFI_CMD_SYS_PING: {
  414. struct hfi_cmd_ping_pkt ping;
  415. ping.size = sizeof(struct hfi_cmd_ping_pkt);
  416. ping.pkt_type = type;
  417. ping.user_data = (uint64_t)data;
  418. hfi_write_cmd(&ping);
  419. }
  420. break;
  421. case HFI_CMD_SYS_RESET: {
  422. struct hfi_cmd_sys_reset_pkt reset;
  423. reset.size = sizeof(struct hfi_cmd_sys_reset_pkt);
  424. reset.pkt_type = type;
  425. reset.user_data = (uint64_t)data;
  426. hfi_write_cmd(&reset);
  427. }
  428. break;
  429. case HFI_CMD_IPEBPS_CREATE_HANDLE: {
  430. struct hfi_cmd_create_handle handle;
  431. handle.size = sizeof(struct hfi_cmd_create_handle);
  432. handle.pkt_type = type;
  433. handle.handle_type = (uint32_t)data;
  434. handle.user_data1 = 0;
  435. hfi_write_cmd(&handle);
  436. }
  437. break;
  438. case HFI_CMD_IPEBPS_ASYNC_COMMAND_INDIRECT:
  439. break;
  440. default:
  441. CAM_ERR(CAM_HFI, "command not supported :%d", type);
  442. break;
  443. }
  444. }
  445. int hfi_get_hw_caps(void *query_buf)
  446. {
  447. int i = 0;
  448. struct cam_icp_query_cap_cmd *query_cmd = NULL;
  449. if (!query_buf) {
  450. CAM_ERR(CAM_HFI, "query buf is NULL");
  451. return -EINVAL;
  452. }
  453. query_cmd = (struct cam_icp_query_cap_cmd *)query_buf;
  454. query_cmd->fw_version.major = 0x12;
  455. query_cmd->fw_version.minor = 0x12;
  456. query_cmd->fw_version.revision = 0x12;
  457. query_cmd->api_version.major = 0x13;
  458. query_cmd->api_version.minor = 0x13;
  459. query_cmd->api_version.revision = 0x13;
  460. query_cmd->num_ipe = 2;
  461. query_cmd->num_bps = 1;
  462. for (i = 0; i < CAM_ICP_DEV_TYPE_MAX; i++) {
  463. query_cmd->dev_ver[i].dev_type = i;
  464. query_cmd->dev_ver[i].hw_ver.major = 0x34 + i;
  465. query_cmd->dev_ver[i].hw_ver.minor = 0x34 + i;
  466. query_cmd->dev_ver[i].hw_ver.incr = 0x34 + i;
  467. }
  468. return 0;
  469. }
  470. int cam_hfi_resume(struct hfi_mem_info *hfi_mem)
  471. {
  472. int rc = 0;
  473. uint32_t fw_version, status = 0;
  474. void __iomem *icp_base = hfi_iface_addr(g_hfi);
  475. if (!icp_base) {
  476. CAM_ERR(CAM_HFI, "invalid HFI interface address");
  477. return -EINVAL;
  478. }
  479. if (readl_poll_timeout(icp_base + HFI_REG_ICP_HOST_INIT_RESPONSE,
  480. status, status == ICP_INIT_RESP_SUCCESS,
  481. HFI_POLL_DELAY_US, HFI_POLL_TIMEOUT_US)) {
  482. CAM_ERR(CAM_HFI, "response poll timed out: status=0x%08x",
  483. status);
  484. return -ETIMEDOUT;
  485. }
  486. hfi_irq_enable(g_hfi);
  487. fw_version = cam_io_r(icp_base + HFI_REG_FW_VERSION);
  488. CAM_DBG(CAM_HFI, "fw version : [%x]", fw_version);
  489. cam_io_w_mb((uint32_t)hfi_mem->qtbl.iova, icp_base + HFI_REG_QTBL_PTR);
  490. cam_io_w_mb((uint32_t)hfi_mem->sfr_buf.iova,
  491. icp_base + HFI_REG_SFR_PTR);
  492. cam_io_w_mb((uint32_t)hfi_mem->shmem.iova,
  493. icp_base + HFI_REG_SHARED_MEM_PTR);
  494. cam_io_w_mb((uint32_t)hfi_mem->shmem.len,
  495. icp_base + HFI_REG_SHARED_MEM_SIZE);
  496. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.iova,
  497. icp_base + HFI_REG_UNCACHED_HEAP_PTR);
  498. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.len,
  499. icp_base + HFI_REG_UNCACHED_HEAP_SIZE);
  500. cam_io_w_mb((uint32_t)hfi_mem->qdss.iova,
  501. icp_base + HFI_REG_QDSS_IOVA);
  502. cam_io_w_mb((uint32_t)hfi_mem->qdss.len,
  503. icp_base + HFI_REG_QDSS_IOVA_SIZE);
  504. cam_io_w_mb((uint32_t)hfi_mem->io_mem.iova,
  505. icp_base + HFI_REG_IO_REGION_IOVA);
  506. cam_io_w_mb((uint32_t)hfi_mem->io_mem.len,
  507. icp_base + HFI_REG_IO_REGION_SIZE);
  508. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.iova,
  509. icp_base + HFI_REG_IO2_REGION_IOVA);
  510. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.len,
  511. icp_base + HFI_REG_IO2_REGION_SIZE);
  512. CAM_INFO(CAM_HFI, "Resume IO1 : [0x%x 0x%x] IO2 [0x%x 0x%x]",
  513. hfi_mem->io_mem.iova, hfi_mem->io_mem.len,
  514. hfi_mem->io_mem2.iova, hfi_mem->io_mem2.len);
  515. return rc;
  516. }
  517. int cam_hfi_init(struct hfi_mem_info *hfi_mem, const struct hfi_ops *hfi_ops,
  518. void *priv, uint8_t event_driven_mode)
  519. {
  520. int rc = 0;
  521. uint32_t status = 0;
  522. struct hfi_qtbl *qtbl;
  523. struct hfi_qtbl_hdr *qtbl_hdr;
  524. struct hfi_q_hdr *cmd_q_hdr, *msg_q_hdr, *dbg_q_hdr;
  525. struct sfr_buf *sfr_buffer;
  526. void __iomem *icp_base;
  527. if (!hfi_mem || !hfi_ops || !priv) {
  528. CAM_ERR(CAM_HFI,
  529. "invalid arg: hfi_mem=%pK hfi_ops=%pK priv=%pK",
  530. hfi_mem, hfi_ops, priv);
  531. return -EINVAL;
  532. }
  533. mutex_lock(&hfi_cmd_q_mutex);
  534. mutex_lock(&hfi_msg_q_mutex);
  535. if (!g_hfi) {
  536. g_hfi = kzalloc(sizeof(struct hfi_info), GFP_KERNEL);
  537. if (!g_hfi) {
  538. rc = -ENOMEM;
  539. goto alloc_fail;
  540. }
  541. }
  542. if (g_hfi->hfi_state != HFI_DEINIT) {
  543. CAM_ERR(CAM_HFI, "hfi_init: invalid state");
  544. rc = -EINVAL;
  545. goto regions_fail;
  546. }
  547. memcpy(&g_hfi->map, hfi_mem, sizeof(g_hfi->map));
  548. g_hfi->hfi_state = HFI_DEINIT;
  549. qtbl = (struct hfi_qtbl *)hfi_mem->qtbl.kva;
  550. qtbl_hdr = &qtbl->q_tbl_hdr;
  551. qtbl_hdr->qtbl_version = 0xFFFFFFFF;
  552. qtbl_hdr->qtbl_size = sizeof(struct hfi_qtbl);
  553. qtbl_hdr->qtbl_qhdr0_offset = sizeof(struct hfi_qtbl_hdr);
  554. qtbl_hdr->qtbl_qhdr_size = sizeof(struct hfi_q_hdr);
  555. qtbl_hdr->qtbl_num_q = ICP_HFI_NUMBER_OF_QS;
  556. qtbl_hdr->qtbl_num_active_q = ICP_HFI_NUMBER_OF_QS;
  557. /* setup host-to-firmware command queue */
  558. cmd_q_hdr = &qtbl->q_hdr[Q_CMD];
  559. cmd_q_hdr->qhdr_status = QHDR_ACTIVE;
  560. cmd_q_hdr->qhdr_start_addr = hfi_mem->cmd_q.iova;
  561. cmd_q_hdr->qhdr_q_size = ICP_CMD_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  562. cmd_q_hdr->qhdr_pkt_size = ICP_HFI_VAR_SIZE_PKT;
  563. cmd_q_hdr->qhdr_pkt_drop_cnt = RESET;
  564. cmd_q_hdr->qhdr_read_idx = RESET;
  565. cmd_q_hdr->qhdr_write_idx = RESET;
  566. /* setup firmware-to-Host message queue */
  567. msg_q_hdr = &qtbl->q_hdr[Q_MSG];
  568. msg_q_hdr->qhdr_status = QHDR_ACTIVE;
  569. msg_q_hdr->qhdr_start_addr = hfi_mem->msg_q.iova;
  570. msg_q_hdr->qhdr_q_size = ICP_MSG_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  571. msg_q_hdr->qhdr_pkt_size = ICP_HFI_VAR_SIZE_PKT;
  572. msg_q_hdr->qhdr_pkt_drop_cnt = RESET;
  573. msg_q_hdr->qhdr_read_idx = RESET;
  574. msg_q_hdr->qhdr_write_idx = RESET;
  575. /* setup firmware-to-Host message queue */
  576. dbg_q_hdr = &qtbl->q_hdr[Q_DBG];
  577. dbg_q_hdr->qhdr_status = QHDR_ACTIVE;
  578. dbg_q_hdr->qhdr_start_addr = hfi_mem->dbg_q.iova;
  579. dbg_q_hdr->qhdr_q_size = ICP_DBG_Q_SIZE_IN_BYTES >> BYTE_WORD_SHIFT;
  580. dbg_q_hdr->qhdr_pkt_size = ICP_HFI_VAR_SIZE_PKT;
  581. dbg_q_hdr->qhdr_pkt_drop_cnt = RESET;
  582. dbg_q_hdr->qhdr_read_idx = RESET;
  583. dbg_q_hdr->qhdr_write_idx = RESET;
  584. sfr_buffer = (struct sfr_buf *)hfi_mem->sfr_buf.kva;
  585. sfr_buffer->size = ICP_MSG_SFR_SIZE_IN_BYTES;
  586. switch (event_driven_mode) {
  587. case INTR_MODE:
  588. cmd_q_hdr->qhdr_type = Q_CMD;
  589. cmd_q_hdr->qhdr_rx_wm = SET;
  590. cmd_q_hdr->qhdr_tx_wm = SET;
  591. cmd_q_hdr->qhdr_rx_req = SET;
  592. cmd_q_hdr->qhdr_tx_req = RESET;
  593. cmd_q_hdr->qhdr_rx_irq_status = RESET;
  594. cmd_q_hdr->qhdr_tx_irq_status = RESET;
  595. msg_q_hdr->qhdr_type = Q_MSG;
  596. msg_q_hdr->qhdr_rx_wm = SET;
  597. msg_q_hdr->qhdr_tx_wm = SET;
  598. msg_q_hdr->qhdr_rx_req = SET;
  599. msg_q_hdr->qhdr_tx_req = RESET;
  600. msg_q_hdr->qhdr_rx_irq_status = RESET;
  601. msg_q_hdr->qhdr_tx_irq_status = RESET;
  602. dbg_q_hdr->qhdr_type = Q_DBG;
  603. dbg_q_hdr->qhdr_rx_wm = SET;
  604. dbg_q_hdr->qhdr_tx_wm = SET_WM;
  605. dbg_q_hdr->qhdr_rx_req = RESET;
  606. dbg_q_hdr->qhdr_tx_req = RESET;
  607. dbg_q_hdr->qhdr_rx_irq_status = RESET;
  608. dbg_q_hdr->qhdr_tx_irq_status = RESET;
  609. break;
  610. case POLL_MODE:
  611. cmd_q_hdr->qhdr_type = Q_CMD | TX_EVENT_POLL_MODE_2 |
  612. RX_EVENT_POLL_MODE_2;
  613. msg_q_hdr->qhdr_type = Q_MSG | TX_EVENT_POLL_MODE_2 |
  614. RX_EVENT_POLL_MODE_2;
  615. dbg_q_hdr->qhdr_type = Q_DBG | TX_EVENT_POLL_MODE_2 |
  616. RX_EVENT_POLL_MODE_2;
  617. break;
  618. case WM_MODE:
  619. cmd_q_hdr->qhdr_type = Q_CMD | TX_EVENT_DRIVEN_MODE_2 |
  620. RX_EVENT_DRIVEN_MODE_2;
  621. cmd_q_hdr->qhdr_rx_wm = SET;
  622. cmd_q_hdr->qhdr_tx_wm = SET;
  623. cmd_q_hdr->qhdr_rx_req = RESET;
  624. cmd_q_hdr->qhdr_tx_req = SET;
  625. cmd_q_hdr->qhdr_rx_irq_status = RESET;
  626. cmd_q_hdr->qhdr_tx_irq_status = RESET;
  627. msg_q_hdr->qhdr_type = Q_MSG | TX_EVENT_DRIVEN_MODE_2 |
  628. RX_EVENT_DRIVEN_MODE_2;
  629. msg_q_hdr->qhdr_rx_wm = SET;
  630. msg_q_hdr->qhdr_tx_wm = SET;
  631. msg_q_hdr->qhdr_rx_req = SET;
  632. msg_q_hdr->qhdr_tx_req = RESET;
  633. msg_q_hdr->qhdr_rx_irq_status = RESET;
  634. msg_q_hdr->qhdr_tx_irq_status = RESET;
  635. dbg_q_hdr->qhdr_type = Q_DBG | TX_EVENT_DRIVEN_MODE_2 |
  636. RX_EVENT_DRIVEN_MODE_2;
  637. dbg_q_hdr->qhdr_rx_wm = SET;
  638. dbg_q_hdr->qhdr_tx_wm = SET_WM;
  639. dbg_q_hdr->qhdr_rx_req = RESET;
  640. dbg_q_hdr->qhdr_tx_req = RESET;
  641. dbg_q_hdr->qhdr_rx_irq_status = RESET;
  642. dbg_q_hdr->qhdr_tx_irq_status = RESET;
  643. break;
  644. default:
  645. CAM_ERR(CAM_HFI, "Invalid event driven mode :%u",
  646. event_driven_mode);
  647. break;
  648. }
  649. g_hfi->ops = *hfi_ops;
  650. g_hfi->priv = priv;
  651. icp_base = hfi_iface_addr(g_hfi);
  652. if (!icp_base) {
  653. CAM_ERR(CAM_HFI, "invalid HFI interface address");
  654. rc = -EINVAL;
  655. goto regions_fail;
  656. }
  657. cam_io_w_mb((uint32_t)hfi_mem->qtbl.iova,
  658. icp_base + HFI_REG_QTBL_PTR);
  659. cam_io_w_mb((uint32_t)hfi_mem->sfr_buf.iova,
  660. icp_base + HFI_REG_SFR_PTR);
  661. cam_io_w_mb((uint32_t)hfi_mem->shmem.iova,
  662. icp_base + HFI_REG_SHARED_MEM_PTR);
  663. cam_io_w_mb((uint32_t)hfi_mem->shmem.len,
  664. icp_base + HFI_REG_SHARED_MEM_SIZE);
  665. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.iova,
  666. icp_base + HFI_REG_UNCACHED_HEAP_PTR);
  667. cam_io_w_mb((uint32_t)hfi_mem->sec_heap.len,
  668. icp_base + HFI_REG_UNCACHED_HEAP_SIZE);
  669. cam_io_w_mb((uint32_t)ICP_INIT_REQUEST_SET,
  670. icp_base + HFI_REG_HOST_ICP_INIT_REQUEST);
  671. cam_io_w_mb((uint32_t)hfi_mem->qdss.iova,
  672. icp_base + HFI_REG_QDSS_IOVA);
  673. cam_io_w_mb((uint32_t)hfi_mem->qdss.len,
  674. icp_base + HFI_REG_QDSS_IOVA_SIZE);
  675. cam_io_w_mb((uint32_t)hfi_mem->io_mem.iova,
  676. icp_base + HFI_REG_IO_REGION_IOVA);
  677. cam_io_w_mb((uint32_t)hfi_mem->io_mem.len,
  678. icp_base + HFI_REG_IO_REGION_SIZE);
  679. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.iova,
  680. icp_base + HFI_REG_IO2_REGION_IOVA);
  681. cam_io_w_mb((uint32_t)hfi_mem->io_mem2.len,
  682. icp_base + HFI_REG_IO2_REGION_SIZE);
  683. CAM_INFO(CAM_HFI, "Init IO1 : [0x%x 0x%x] IO2 [0x%x 0x%x]",
  684. hfi_mem->io_mem.iova, hfi_mem->io_mem.len,
  685. hfi_mem->io_mem2.iova, hfi_mem->io_mem2.len);
  686. if (readl_poll_timeout(icp_base + HFI_REG_ICP_HOST_INIT_RESPONSE,
  687. status, status == ICP_INIT_RESP_SUCCESS,
  688. HFI_POLL_DELAY_US, HFI_POLL_TIMEOUT_US)) {
  689. CAM_ERR(CAM_HFI, "response poll timed out: status=0x%08x",
  690. status);
  691. rc = -ETIMEDOUT;
  692. goto regions_fail;
  693. }
  694. CAM_DBG(CAM_HFI, "ICP fw version: 0x%x",
  695. cam_io_r(icp_base + HFI_REG_FW_VERSION));
  696. g_hfi->hfi_state = HFI_READY;
  697. g_hfi->cmd_q_state = true;
  698. g_hfi->msg_q_state = true;
  699. hfi_irq_enable(g_hfi);
  700. mutex_unlock(&hfi_cmd_q_mutex);
  701. mutex_unlock(&hfi_msg_q_mutex);
  702. return rc;
  703. regions_fail:
  704. kfree(g_hfi);
  705. g_hfi = NULL;
  706. alloc_fail:
  707. mutex_unlock(&hfi_cmd_q_mutex);
  708. mutex_unlock(&hfi_msg_q_mutex);
  709. return rc;
  710. }
  711. void cam_hfi_deinit(void)
  712. {
  713. mutex_lock(&hfi_cmd_q_mutex);
  714. mutex_lock(&hfi_msg_q_mutex);
  715. if (!g_hfi) {
  716. CAM_ERR(CAM_HFI, "hfi path not established yet");
  717. goto err;
  718. }
  719. g_hfi->cmd_q_state = false;
  720. g_hfi->msg_q_state = false;
  721. kzfree(g_hfi);
  722. g_hfi = NULL;
  723. err:
  724. mutex_unlock(&hfi_cmd_q_mutex);
  725. mutex_unlock(&hfi_msg_q_mutex);
  726. }