qmi.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define CE_MSI_NAME "CE"
  39. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  40. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  41. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  43. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  44. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  45. #define DMS_QMI_MAX_MSG_LEN SZ_256
  46. #define MAX_SHADOW_REG_RESERVED 2
  47. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  48. MAX_SHADOW_REG_RESERVED)
  49. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  50. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  51. enum nm_modem_bit {
  52. SLEEP_CLOCK_SELECT_INTERNAL_BIT = BIT(1),
  53. HOST_CSTATE_BIT = BIT(2),
  54. };
  55. #ifdef CONFIG_CNSS2_DEBUG
  56. static bool ignore_qmi_failure;
  57. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  58. void cnss_ignore_qmi_failure(bool ignore)
  59. {
  60. ignore_qmi_failure = ignore;
  61. }
  62. #else
  63. #define CNSS_QMI_ASSERT() do { } while (0)
  64. void cnss_ignore_qmi_failure(bool ignore) { }
  65. #endif
  66. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  67. {
  68. switch (mode) {
  69. case CNSS_MISSION:
  70. return "MISSION";
  71. case CNSS_FTM:
  72. return "FTM";
  73. case CNSS_EPPING:
  74. return "EPPING";
  75. case CNSS_WALTEST:
  76. return "WALTEST";
  77. case CNSS_OFF:
  78. return "OFF";
  79. case CNSS_CCPM:
  80. return "CCPM";
  81. case CNSS_QVIT:
  82. return "QVIT";
  83. case CNSS_CALIBRATION:
  84. return "CALIBRATION";
  85. default:
  86. return "UNKNOWN";
  87. }
  88. }
  89. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  90. struct qmi_elem_info *req_ei,
  91. struct qmi_elem_info *rsp_ei,
  92. int req_id, size_t req_len,
  93. unsigned long timeout)
  94. {
  95. struct qmi_txn txn;
  96. int ret;
  97. char *err_msg;
  98. struct qmi_response_type_v01 *resp = rsp;
  99. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  100. if (ret < 0) {
  101. err_msg = "Qmi fail: fail to init txn,";
  102. goto out;
  103. }
  104. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  105. req_len, req_ei, req);
  106. if (ret < 0) {
  107. qmi_txn_cancel(&txn);
  108. err_msg = "Qmi fail: fail to send req,";
  109. goto out;
  110. }
  111. ret = qmi_txn_wait(&txn, timeout);
  112. if (ret < 0) {
  113. err_msg = "Qmi fail: wait timeout,";
  114. goto out;
  115. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  116. err_msg = "Qmi fail: request rejected,";
  117. cnss_pr_err("Qmi fail: respons with error:%d\n",
  118. resp->error);
  119. ret = -resp->result;
  120. goto out;
  121. }
  122. cnss_pr_dbg("req %x success\n", req_id);
  123. return 0;
  124. out:
  125. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  126. return ret;
  127. }
  128. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  129. {
  130. struct wlfw_ind_register_req_msg_v01 *req;
  131. struct wlfw_ind_register_resp_msg_v01 *resp;
  132. struct qmi_txn txn;
  133. int ret = 0;
  134. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  135. plat_priv->driver_state);
  136. req = kzalloc(sizeof(*req), GFP_KERNEL);
  137. if (!req)
  138. return -ENOMEM;
  139. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  140. if (!resp) {
  141. kfree(req);
  142. return -ENOMEM;
  143. }
  144. req->client_id_valid = 1;
  145. req->client_id = WLFW_CLIENT_ID;
  146. req->request_mem_enable_valid = 1;
  147. req->request_mem_enable = 1;
  148. req->fw_mem_ready_enable_valid = 1;
  149. req->fw_mem_ready_enable = 1;
  150. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  151. req->fw_init_done_enable_valid = 1;
  152. req->fw_init_done_enable = 1;
  153. req->pin_connect_result_enable_valid = 1;
  154. req->pin_connect_result_enable = 1;
  155. req->cal_done_enable_valid = 1;
  156. req->cal_done_enable = 1;
  157. req->qdss_trace_req_mem_enable_valid = 1;
  158. req->qdss_trace_req_mem_enable = 1;
  159. req->qdss_trace_save_enable_valid = 1;
  160. req->qdss_trace_save_enable = 1;
  161. req->qdss_trace_free_enable_valid = 1;
  162. req->qdss_trace_free_enable = 1;
  163. req->respond_get_info_enable_valid = 1;
  164. req->respond_get_info_enable = 1;
  165. req->wfc_call_twt_config_enable_valid = 1;
  166. req->wfc_call_twt_config_enable = 1;
  167. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  168. wlfw_ind_register_resp_msg_v01_ei, resp);
  169. if (ret < 0) {
  170. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  171. ret);
  172. goto out;
  173. }
  174. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  175. QMI_WLFW_IND_REGISTER_REQ_V01,
  176. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  177. wlfw_ind_register_req_msg_v01_ei, req);
  178. if (ret < 0) {
  179. qmi_txn_cancel(&txn);
  180. cnss_pr_err("Failed to send indication register request, err: %d\n",
  181. ret);
  182. goto out;
  183. }
  184. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  185. if (ret < 0) {
  186. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  187. ret);
  188. goto out;
  189. }
  190. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  191. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  192. resp->resp.result, resp->resp.error);
  193. ret = -resp->resp.result;
  194. goto out;
  195. }
  196. if (resp->fw_status_valid) {
  197. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  198. ret = -EALREADY;
  199. goto qmi_registered;
  200. }
  201. }
  202. kfree(req);
  203. kfree(resp);
  204. return 0;
  205. out:
  206. CNSS_QMI_ASSERT();
  207. qmi_registered:
  208. kfree(req);
  209. kfree(resp);
  210. return ret;
  211. }
  212. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  213. struct wlfw_host_cap_req_msg_v01 *req)
  214. {
  215. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  216. plat_priv->device_id == MANGO_DEVICE_ID ||
  217. plat_priv->device_id == PEACH_DEVICE_ID) {
  218. req->mlo_capable_valid = 1;
  219. req->mlo_capable = 1;
  220. req->mlo_chip_id_valid = 1;
  221. req->mlo_chip_id = 0;
  222. req->mlo_group_id_valid = 1;
  223. req->mlo_group_id = 0;
  224. req->max_mlo_peer_valid = 1;
  225. /* Max peer number generally won't change for the same device
  226. * but needs to be synced with host driver.
  227. */
  228. req->max_mlo_peer = 32;
  229. req->mlo_num_chips_valid = 1;
  230. req->mlo_num_chips = 1;
  231. req->mlo_chip_info_valid = 1;
  232. req->mlo_chip_info[0].chip_id = 0;
  233. req->mlo_chip_info[0].num_local_links = 2;
  234. req->mlo_chip_info[0].hw_link_id[0] = 0;
  235. req->mlo_chip_info[0].hw_link_id[1] = 1;
  236. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  237. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  238. }
  239. }
  240. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  241. {
  242. struct wlfw_host_cap_req_msg_v01 *req;
  243. struct wlfw_host_cap_resp_msg_v01 *resp;
  244. struct qmi_txn txn;
  245. int ret = 0;
  246. u64 iova_start = 0, iova_size = 0,
  247. iova_ipa_start = 0, iova_ipa_size = 0;
  248. u64 feature_list = 0;
  249. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  250. plat_priv->driver_state);
  251. req = kzalloc(sizeof(*req), GFP_KERNEL);
  252. if (!req)
  253. return -ENOMEM;
  254. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  255. if (!resp) {
  256. kfree(req);
  257. return -ENOMEM;
  258. }
  259. req->num_clients_valid = 1;
  260. req->num_clients = 1;
  261. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  262. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  263. if (req->wake_msi) {
  264. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  265. req->wake_msi_valid = 1;
  266. }
  267. req->bdf_support_valid = 1;
  268. req->bdf_support = 1;
  269. req->m3_support_valid = 1;
  270. req->m3_support = 1;
  271. req->m3_cache_support_valid = 1;
  272. req->m3_cache_support = 1;
  273. req->cal_done_valid = 1;
  274. req->cal_done = plat_priv->cal_done;
  275. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  276. if (plat_priv->sleep_clk) {
  277. req->nm_modem_valid = 1;
  278. /* Notify firmware about the sleep clock selection,
  279. * nm_modem_bit[1] is used for this purpose.
  280. */
  281. req->nm_modem |= SLEEP_CLOCK_SELECT_INTERNAL_BIT;
  282. }
  283. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  284. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  285. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  286. &iova_ipa_size)) {
  287. req->ddr_range_valid = 1;
  288. req->ddr_range[0].start = iova_start;
  289. req->ddr_range[0].size = iova_size + iova_ipa_size;
  290. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  291. req->ddr_range[0].start, req->ddr_range[0].size);
  292. }
  293. req->host_build_type_valid = 1;
  294. req->host_build_type = cnss_get_host_build_type();
  295. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  296. ret = cnss_get_feature_list(plat_priv, &feature_list);
  297. if (!ret) {
  298. req->feature_list_valid = 1;
  299. req->feature_list = feature_list;
  300. cnss_pr_dbg("Sending feature list 0x%llx\n",
  301. req->feature_list);
  302. }
  303. if (cnss_get_platform_name(plat_priv, req->platform_name,
  304. QMI_WLFW_MAX_PLATFORM_NAME_LEN_V01))
  305. req->platform_name_valid = 1;
  306. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  307. wlfw_host_cap_resp_msg_v01_ei, resp);
  308. if (ret < 0) {
  309. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  310. ret);
  311. goto out;
  312. }
  313. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  314. QMI_WLFW_HOST_CAP_REQ_V01,
  315. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  316. wlfw_host_cap_req_msg_v01_ei, req);
  317. if (ret < 0) {
  318. qmi_txn_cancel(&txn);
  319. cnss_pr_err("Failed to send host capability request, err: %d\n",
  320. ret);
  321. goto out;
  322. }
  323. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  324. if (ret < 0) {
  325. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  326. ret);
  327. goto out;
  328. }
  329. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  330. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  331. resp->resp.result, resp->resp.error);
  332. ret = -resp->resp.result;
  333. goto out;
  334. }
  335. kfree(req);
  336. kfree(resp);
  337. return 0;
  338. out:
  339. CNSS_QMI_ASSERT();
  340. kfree(req);
  341. kfree(resp);
  342. return ret;
  343. }
  344. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  345. {
  346. struct wlfw_respond_mem_req_msg_v01 *req;
  347. struct wlfw_respond_mem_resp_msg_v01 *resp;
  348. struct qmi_txn txn;
  349. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  350. int ret = 0, i;
  351. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  352. plat_priv->driver_state);
  353. req = kzalloc(sizeof(*req), GFP_KERNEL);
  354. if (!req)
  355. return -ENOMEM;
  356. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  357. if (!resp) {
  358. kfree(req);
  359. return -ENOMEM;
  360. }
  361. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  362. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  363. ret = -EINVAL;
  364. goto out;
  365. }
  366. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  367. for (i = 0; i < req->mem_seg_len; i++) {
  368. if (!fw_mem[i].pa || !fw_mem[i].size) {
  369. if (fw_mem[i].type == 0) {
  370. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  371. i);
  372. ret = -EINVAL;
  373. goto out;
  374. }
  375. cnss_pr_err("Memory for FW is not available for type: %u\n",
  376. fw_mem[i].type);
  377. ret = -ENOMEM;
  378. goto out;
  379. }
  380. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  381. fw_mem[i].va, &fw_mem[i].pa,
  382. fw_mem[i].size, fw_mem[i].type);
  383. req->mem_seg[i].addr = fw_mem[i].pa;
  384. req->mem_seg[i].size = fw_mem[i].size;
  385. req->mem_seg[i].type = fw_mem[i].type;
  386. }
  387. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  388. wlfw_respond_mem_resp_msg_v01_ei, resp);
  389. if (ret < 0) {
  390. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  391. ret);
  392. goto out;
  393. }
  394. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  395. QMI_WLFW_RESPOND_MEM_REQ_V01,
  396. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  397. wlfw_respond_mem_req_msg_v01_ei, req);
  398. if (ret < 0) {
  399. qmi_txn_cancel(&txn);
  400. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  401. ret);
  402. goto out;
  403. }
  404. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  405. if (ret < 0) {
  406. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  407. ret);
  408. goto out;
  409. }
  410. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  411. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  412. resp->resp.result, resp->resp.error);
  413. ret = -resp->resp.result;
  414. goto out;
  415. }
  416. kfree(req);
  417. kfree(resp);
  418. return 0;
  419. out:
  420. CNSS_QMI_ASSERT();
  421. kfree(req);
  422. kfree(resp);
  423. return ret;
  424. }
  425. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  426. {
  427. struct wlfw_cap_req_msg_v01 *req;
  428. struct wlfw_cap_resp_msg_v01 *resp;
  429. struct qmi_txn txn;
  430. char *fw_build_timestamp;
  431. int ret = 0, i;
  432. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  433. plat_priv->driver_state);
  434. req = kzalloc(sizeof(*req), GFP_KERNEL);
  435. if (!req)
  436. return -ENOMEM;
  437. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  438. if (!resp) {
  439. kfree(req);
  440. return -ENOMEM;
  441. }
  442. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  443. wlfw_cap_resp_msg_v01_ei, resp);
  444. if (ret < 0) {
  445. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  446. ret);
  447. goto out;
  448. }
  449. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  450. QMI_WLFW_CAP_REQ_V01,
  451. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  452. wlfw_cap_req_msg_v01_ei, req);
  453. if (ret < 0) {
  454. qmi_txn_cancel(&txn);
  455. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  456. ret);
  457. goto out;
  458. }
  459. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  460. if (ret < 0) {
  461. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  462. ret);
  463. goto out;
  464. }
  465. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  466. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  467. resp->resp.result, resp->resp.error);
  468. ret = -resp->resp.result;
  469. goto out;
  470. }
  471. if (resp->chip_info_valid) {
  472. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  473. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  474. }
  475. if (resp->board_info_valid)
  476. plat_priv->board_info.board_id = resp->board_info.board_id;
  477. else
  478. plat_priv->board_info.board_id = 0xFF;
  479. if (resp->soc_info_valid)
  480. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  481. if (resp->fw_version_info_valid) {
  482. plat_priv->fw_version_info.fw_version =
  483. resp->fw_version_info.fw_version;
  484. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  485. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  486. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  487. resp->fw_version_info.fw_build_timestamp,
  488. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  489. }
  490. if (resp->fw_build_id_valid) {
  491. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  492. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  493. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  494. }
  495. /* FW will send aop retention volatage for qca6490 */
  496. if (resp->voltage_mv_valid) {
  497. plat_priv->cpr_info.voltage = resp->voltage_mv;
  498. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  499. plat_priv->cpr_info.voltage);
  500. cnss_update_cpr_info(plat_priv);
  501. }
  502. if (resp->time_freq_hz_valid) {
  503. plat_priv->device_freq_hz = resp->time_freq_hz;
  504. cnss_pr_dbg("Device frequency is %d HZ\n",
  505. plat_priv->device_freq_hz);
  506. }
  507. if (resp->otp_version_valid)
  508. plat_priv->otp_version = resp->otp_version;
  509. if (resp->dev_mem_info_valid) {
  510. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  511. plat_priv->dev_mem_info[i].start =
  512. resp->dev_mem_info[i].start;
  513. plat_priv->dev_mem_info[i].size =
  514. resp->dev_mem_info[i].size;
  515. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  516. i, plat_priv->dev_mem_info[i].start,
  517. plat_priv->dev_mem_info[i].size);
  518. }
  519. }
  520. if (resp->fw_caps_valid) {
  521. plat_priv->fw_pcie_gen_switch =
  522. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  523. plat_priv->fw_aux_uc_support =
  524. !!(resp->fw_caps & QMI_WLFW_AUX_UC_SUPPORT_V01);
  525. cnss_pr_dbg("FW aux uc support capability: %d\n",
  526. plat_priv->fw_aux_uc_support);
  527. plat_priv->fw_caps = resp->fw_caps;
  528. }
  529. if (resp->hang_data_length_valid &&
  530. resp->hang_data_length &&
  531. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  532. plat_priv->hang_event_data_len = resp->hang_data_length;
  533. else
  534. plat_priv->hang_event_data_len = 0;
  535. if (resp->hang_data_addr_offset_valid)
  536. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  537. else
  538. plat_priv->hang_data_addr_offset = 0;
  539. if (resp->hwid_bitmap_valid)
  540. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  541. if (resp->ol_cpr_cfg_valid)
  542. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  543. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  544. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  545. **/
  546. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  547. if (plat_priv->board_info.board_id ==
  548. plat_priv->on_chip_pmic_board_ids[i]) {
  549. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  550. plat_priv->board_info.board_id);
  551. ret = cnss_aop_send_msg(plat_priv,
  552. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  553. if (ret < 0)
  554. cnss_pr_dbg("Failed to Send AOP Msg");
  555. break;
  556. }
  557. }
  558. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  559. plat_priv->chip_info.chip_id,
  560. plat_priv->chip_info.chip_family,
  561. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  562. plat_priv->otp_version);
  563. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  564. plat_priv->fw_version_info.fw_version,
  565. plat_priv->fw_version_info.fw_build_timestamp,
  566. plat_priv->fw_build_id,
  567. plat_priv->hwid_bitmap);
  568. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  569. plat_priv->hang_event_data_len,
  570. plat_priv->hang_data_addr_offset);
  571. kfree(req);
  572. kfree(resp);
  573. return 0;
  574. out:
  575. CNSS_QMI_ASSERT();
  576. kfree(req);
  577. kfree(resp);
  578. return ret;
  579. }
  580. static char *cnss_bdf_type_to_str(enum cnss_bdf_type bdf_type)
  581. {
  582. switch (bdf_type) {
  583. case CNSS_BDF_BIN:
  584. case CNSS_BDF_ELF:
  585. return "BDF";
  586. case CNSS_BDF_REGDB:
  587. return "REGDB";
  588. case CNSS_BDF_HDS:
  589. return "HDS";
  590. default:
  591. return "UNKNOWN";
  592. }
  593. }
  594. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  595. u32 bdf_type, char *filename,
  596. u32 filename_len)
  597. {
  598. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  599. int ret = 0;
  600. switch (bdf_type) {
  601. case CNSS_BDF_ELF:
  602. /* Board ID will be equal or less than 0xFF in GF mask case */
  603. if (plat_priv->board_info.board_id == 0xFF) {
  604. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  605. snprintf(filename_tmp, filename_len,
  606. ELF_BDF_FILE_NAME_GF);
  607. else
  608. snprintf(filename_tmp, filename_len,
  609. ELF_BDF_FILE_NAME);
  610. } else if (plat_priv->board_info.board_id < 0xFF) {
  611. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  612. snprintf(filename_tmp, filename_len,
  613. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  614. plat_priv->board_info.board_id);
  615. else
  616. snprintf(filename_tmp, filename_len,
  617. ELF_BDF_FILE_NAME_PREFIX "%02x",
  618. plat_priv->board_info.board_id);
  619. } else {
  620. snprintf(filename_tmp, filename_len,
  621. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  622. plat_priv->board_info.board_id >> 8 & 0xFF,
  623. plat_priv->board_info.board_id & 0xFF);
  624. }
  625. break;
  626. case CNSS_BDF_BIN:
  627. if (plat_priv->board_info.board_id == 0xFF) {
  628. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  629. snprintf(filename_tmp, filename_len,
  630. BIN_BDF_FILE_NAME_GF);
  631. else
  632. snprintf(filename_tmp, filename_len,
  633. BIN_BDF_FILE_NAME);
  634. } else if (plat_priv->board_info.board_id < 0xFF) {
  635. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  636. snprintf(filename_tmp, filename_len,
  637. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  638. plat_priv->board_info.board_id);
  639. else
  640. snprintf(filename_tmp, filename_len,
  641. BIN_BDF_FILE_NAME_PREFIX "%02x",
  642. plat_priv->board_info.board_id);
  643. } else {
  644. snprintf(filename_tmp, filename_len,
  645. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  646. plat_priv->board_info.board_id >> 8 & 0xFF,
  647. plat_priv->board_info.board_id & 0xFF);
  648. }
  649. break;
  650. case CNSS_BDF_REGDB:
  651. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  652. break;
  653. case CNSS_BDF_HDS:
  654. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  655. break;
  656. default:
  657. cnss_pr_err("Invalid BDF type: %d\n",
  658. plat_priv->ctrl_params.bdf_type);
  659. ret = -EINVAL;
  660. break;
  661. }
  662. if (!ret)
  663. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  664. return ret;
  665. }
  666. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  667. enum wlfw_ini_file_type_v01 file_type)
  668. {
  669. struct wlfw_ini_file_download_req_msg_v01 *req;
  670. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  671. struct qmi_txn txn;
  672. int ret = 0;
  673. const struct firmware *fw;
  674. char filename[INI_FILE_NAME_LEN] = {0};
  675. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  676. const u8 *temp;
  677. unsigned int remaining;
  678. bool backup_supported = false;
  679. req = kzalloc(sizeof(*req), GFP_KERNEL);
  680. if (!req)
  681. return -ENOMEM;
  682. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  683. if (!resp) {
  684. kfree(req);
  685. return -ENOMEM;
  686. }
  687. switch (file_type) {
  688. case WLFW_CONN_ROAM_INI_V01:
  689. snprintf(tmp_filename, sizeof(tmp_filename),
  690. CONN_ROAM_FILE_NAME);
  691. backup_supported = true;
  692. break;
  693. default:
  694. cnss_pr_err("Invalid file type: %u\n", file_type);
  695. ret = -EINVAL;
  696. goto err_req_fw;
  697. }
  698. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  699. /* Fetch the file */
  700. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  701. if (ret) {
  702. if (!backup_supported)
  703. goto err_req_fw;
  704. snprintf(filename, sizeof(filename),
  705. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  706. ret = firmware_request_nowarn(&fw, filename,
  707. &plat_priv->plat_dev->dev);
  708. if (ret)
  709. goto err_req_fw;
  710. }
  711. temp = fw->data;
  712. remaining = fw->size;
  713. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  714. remaining);
  715. while (remaining) {
  716. req->file_type_valid = 1;
  717. req->file_type = file_type;
  718. req->total_size_valid = 1;
  719. req->total_size = remaining;
  720. req->seg_id_valid = 1;
  721. req->data_valid = 1;
  722. req->end_valid = 1;
  723. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  724. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  725. } else {
  726. req->data_len = remaining;
  727. req->end = 1;
  728. }
  729. memcpy(req->data, temp, req->data_len);
  730. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  731. wlfw_ini_file_download_resp_msg_v01_ei,
  732. resp);
  733. if (ret < 0) {
  734. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  735. ret);
  736. goto err;
  737. }
  738. ret = qmi_send_request
  739. (&plat_priv->qmi_wlfw, NULL, &txn,
  740. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  741. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  742. wlfw_ini_file_download_req_msg_v01_ei, req);
  743. if (ret < 0) {
  744. qmi_txn_cancel(&txn);
  745. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  746. ret);
  747. goto err;
  748. }
  749. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  750. if (ret < 0) {
  751. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  752. ret);
  753. goto err;
  754. }
  755. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  756. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  757. resp->resp.result, resp->resp.error);
  758. ret = -resp->resp.result;
  759. goto err;
  760. }
  761. remaining -= req->data_len;
  762. temp += req->data_len;
  763. req->seg_id++;
  764. }
  765. release_firmware(fw);
  766. kfree(req);
  767. kfree(resp);
  768. return 0;
  769. err:
  770. release_firmware(fw);
  771. err_req_fw:
  772. kfree(req);
  773. kfree(resp);
  774. return ret;
  775. }
  776. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  777. u32 bdf_type)
  778. {
  779. struct wlfw_bdf_download_req_msg_v01 *req;
  780. struct wlfw_bdf_download_resp_msg_v01 *resp;
  781. struct qmi_txn txn;
  782. char filename[MAX_FIRMWARE_NAME_LEN];
  783. const struct firmware *fw_entry = NULL;
  784. const u8 *temp;
  785. unsigned int remaining;
  786. int ret = 0;
  787. cnss_pr_dbg("Sending QMI_WLFW_BDF_DOWNLOAD_REQ_V01 message for bdf_type: %d (%s), state: 0x%lx\n",
  788. bdf_type, cnss_bdf_type_to_str(bdf_type), plat_priv->driver_state);
  789. req = kzalloc(sizeof(*req), GFP_KERNEL);
  790. if (!req)
  791. return -ENOMEM;
  792. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  793. if (!resp) {
  794. kfree(req);
  795. return -ENOMEM;
  796. }
  797. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  798. filename, sizeof(filename));
  799. if (ret)
  800. goto err_req_fw;
  801. if (bdf_type == CNSS_BDF_REGDB)
  802. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  803. filename);
  804. else
  805. ret = firmware_request_nowarn(&fw_entry, filename,
  806. &plat_priv->plat_dev->dev);
  807. if (ret) {
  808. cnss_pr_err("Failed to load %s: %s, ret: %d\n",
  809. cnss_bdf_type_to_str(bdf_type), filename, ret);
  810. goto err_req_fw;
  811. }
  812. temp = fw_entry->data;
  813. remaining = fw_entry->size;
  814. cnss_pr_dbg("Downloading %s: %s, size: %u\n",
  815. cnss_bdf_type_to_str(bdf_type), filename, remaining);
  816. while (remaining) {
  817. req->valid = 1;
  818. req->file_id_valid = 1;
  819. req->file_id = plat_priv->board_info.board_id;
  820. req->total_size_valid = 1;
  821. req->total_size = remaining;
  822. req->seg_id_valid = 1;
  823. req->data_valid = 1;
  824. req->end_valid = 1;
  825. req->bdf_type_valid = 1;
  826. req->bdf_type = bdf_type;
  827. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  828. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  829. } else {
  830. req->data_len = remaining;
  831. req->end = 1;
  832. }
  833. memcpy(req->data, temp, req->data_len);
  834. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  835. wlfw_bdf_download_resp_msg_v01_ei, resp);
  836. if (ret < 0) {
  837. cnss_pr_err("Failed to initialize txn for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  838. cnss_bdf_type_to_str(bdf_type), ret);
  839. goto err_send;
  840. }
  841. ret = qmi_send_request
  842. (&plat_priv->qmi_wlfw, NULL, &txn,
  843. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  844. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  845. wlfw_bdf_download_req_msg_v01_ei, req);
  846. if (ret < 0) {
  847. qmi_txn_cancel(&txn);
  848. cnss_pr_err("Failed to send QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  849. cnss_bdf_type_to_str(bdf_type), ret);
  850. goto err_send;
  851. }
  852. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  853. if (ret < 0) {
  854. cnss_pr_err("Timeout while waiting for FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, err: %d\n",
  855. cnss_bdf_type_to_str(bdf_type), ret);
  856. goto err_send;
  857. }
  858. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  859. cnss_pr_err("FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s failed, result: %d, err: %d\n",
  860. cnss_bdf_type_to_str(bdf_type), resp->resp.result,
  861. resp->resp.error);
  862. ret = -resp->resp.result;
  863. goto err_send;
  864. }
  865. remaining -= req->data_len;
  866. temp += req->data_len;
  867. req->seg_id++;
  868. }
  869. release_firmware(fw_entry);
  870. if (resp->host_bdf_data_valid) {
  871. /* QCA6490 enable S3E regulator for IPA configuration only */
  872. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  873. cnss_enable_int_pow_amp_vreg(plat_priv);
  874. plat_priv->cbc_file_download =
  875. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  876. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  877. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  878. plat_priv->cbc_file_download);
  879. }
  880. kfree(req);
  881. kfree(resp);
  882. return 0;
  883. err_send:
  884. release_firmware(fw_entry);
  885. err_req_fw:
  886. if (!(bdf_type == CNSS_BDF_REGDB ||
  887. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  888. ret == -EAGAIN))
  889. CNSS_QMI_ASSERT();
  890. kfree(req);
  891. kfree(resp);
  892. return ret;
  893. }
  894. int cnss_wlfw_tme_patch_dnld_send_sync(struct cnss_plat_data *plat_priv,
  895. enum wlfw_tme_lite_file_type_v01 file)
  896. {
  897. struct wlfw_tme_lite_info_req_msg_v01 *req;
  898. struct wlfw_tme_lite_info_resp_msg_v01 *resp;
  899. struct qmi_txn txn;
  900. struct cnss_fw_mem *tme_lite_mem = &plat_priv->tme_lite_mem;
  901. int ret = 0;
  902. cnss_pr_dbg("Sending TME patch information message, state: 0x%lx\n",
  903. plat_priv->driver_state);
  904. if (plat_priv->device_id != PEACH_DEVICE_ID)
  905. return 0;
  906. req = kzalloc(sizeof(*req), GFP_KERNEL);
  907. if (!req)
  908. return -ENOMEM;
  909. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  910. if (!resp) {
  911. kfree(req);
  912. return -ENOMEM;
  913. }
  914. if (!tme_lite_mem->pa || !tme_lite_mem->size) {
  915. cnss_pr_err("Memory for TME patch is not available\n");
  916. ret = -ENOMEM;
  917. goto out;
  918. }
  919. cnss_pr_dbg("TME-L patch memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  920. tme_lite_mem->va, &tme_lite_mem->pa, tme_lite_mem->size);
  921. req->tme_file = file;
  922. req->addr = plat_priv->tme_lite_mem.pa;
  923. req->size = plat_priv->tme_lite_mem.size;
  924. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  925. wlfw_tme_lite_info_resp_msg_v01_ei, resp);
  926. if (ret < 0) {
  927. cnss_pr_err("Failed to initialize txn for TME patch information request, err: %d\n",
  928. ret);
  929. goto out;
  930. }
  931. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  932. QMI_WLFW_TME_LITE_INFO_REQ_V01,
  933. WLFW_TME_LITE_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  934. wlfw_tme_lite_info_req_msg_v01_ei, req);
  935. if (ret < 0) {
  936. qmi_txn_cancel(&txn);
  937. cnss_pr_err("Failed to send TME patch information request, err: %d\n",
  938. ret);
  939. goto out;
  940. }
  941. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  942. if (ret < 0) {
  943. cnss_pr_err("Failed to wait for response of TME patch information request, err: %d\n",
  944. ret);
  945. goto out;
  946. }
  947. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  948. cnss_pr_err("TME patch information request failed, result: %d, err: %d\n",
  949. resp->resp.result, resp->resp.error);
  950. ret = -resp->resp.result;
  951. goto out;
  952. }
  953. kfree(req);
  954. kfree(resp);
  955. return 0;
  956. out:
  957. kfree(req);
  958. kfree(resp);
  959. return ret;
  960. }
  961. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  962. {
  963. struct wlfw_m3_info_req_msg_v01 *req;
  964. struct wlfw_m3_info_resp_msg_v01 *resp;
  965. struct qmi_txn txn;
  966. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  967. int ret = 0;
  968. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  969. plat_priv->driver_state);
  970. req = kzalloc(sizeof(*req), GFP_KERNEL);
  971. if (!req)
  972. return -ENOMEM;
  973. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  974. if (!resp) {
  975. kfree(req);
  976. return -ENOMEM;
  977. }
  978. if (!m3_mem->pa || !m3_mem->size) {
  979. cnss_pr_err("Memory for M3 is not available\n");
  980. ret = -ENOMEM;
  981. goto out;
  982. }
  983. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  984. m3_mem->va, &m3_mem->pa, m3_mem->size);
  985. req->addr = plat_priv->m3_mem.pa;
  986. req->size = plat_priv->m3_mem.size;
  987. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  988. wlfw_m3_info_resp_msg_v01_ei, resp);
  989. if (ret < 0) {
  990. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  991. ret);
  992. goto out;
  993. }
  994. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  995. QMI_WLFW_M3_INFO_REQ_V01,
  996. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  997. wlfw_m3_info_req_msg_v01_ei, req);
  998. if (ret < 0) {
  999. qmi_txn_cancel(&txn);
  1000. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  1001. ret);
  1002. goto out;
  1003. }
  1004. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1005. if (ret < 0) {
  1006. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  1007. ret);
  1008. goto out;
  1009. }
  1010. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1011. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  1012. resp->resp.result, resp->resp.error);
  1013. ret = -resp->resp.result;
  1014. goto out;
  1015. }
  1016. kfree(req);
  1017. kfree(resp);
  1018. return 0;
  1019. out:
  1020. CNSS_QMI_ASSERT();
  1021. kfree(req);
  1022. kfree(resp);
  1023. return ret;
  1024. }
  1025. int cnss_wlfw_aux_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1026. {
  1027. struct wlfw_aux_uc_info_req_msg_v01 *req;
  1028. struct wlfw_aux_uc_info_resp_msg_v01 *resp;
  1029. struct qmi_txn txn;
  1030. struct cnss_fw_mem *aux_mem = &plat_priv->aux_mem;
  1031. int ret = 0;
  1032. cnss_pr_dbg("Sending QMI_WLFW_AUX_UC_INFO_REQ_V01 message, state: 0x%lx\n",
  1033. plat_priv->driver_state);
  1034. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1035. if (!req)
  1036. return -ENOMEM;
  1037. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1038. if (!resp) {
  1039. kfree(req);
  1040. return -ENOMEM;
  1041. }
  1042. if (!aux_mem->pa || !aux_mem->size) {
  1043. cnss_pr_err("Memory for AUX is not available\n");
  1044. ret = -ENOMEM;
  1045. goto out;
  1046. }
  1047. cnss_pr_dbg("AUX memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  1048. aux_mem->va, &aux_mem->pa, aux_mem->size);
  1049. req->addr = plat_priv->aux_mem.pa;
  1050. req->size = plat_priv->aux_mem.size;
  1051. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1052. wlfw_aux_uc_info_resp_msg_v01_ei, resp);
  1053. if (ret < 0) {
  1054. cnss_pr_err("Failed to initialize txn for QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1055. ret);
  1056. goto out;
  1057. }
  1058. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1059. QMI_WLFW_AUX_UC_INFO_REQ_V01,
  1060. WLFW_AUX_UC_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1061. wlfw_aux_uc_info_req_msg_v01_ei, req);
  1062. if (ret < 0) {
  1063. qmi_txn_cancel(&txn);
  1064. cnss_pr_err("Failed to send QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1065. ret);
  1066. goto out;
  1067. }
  1068. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1069. if (ret < 0) {
  1070. cnss_pr_err("Failed to wait for response of QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1071. ret);
  1072. goto out;
  1073. }
  1074. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1075. cnss_pr_err("QMI_WLFW_AUX_UC_INFO_REQ_V01 request failed, result: %d, err: %d\n",
  1076. resp->resp.result, resp->resp.error);
  1077. ret = -resp->resp.result;
  1078. goto out;
  1079. }
  1080. kfree(req);
  1081. kfree(resp);
  1082. return 0;
  1083. out:
  1084. CNSS_QMI_ASSERT();
  1085. kfree(req);
  1086. kfree(resp);
  1087. return ret;
  1088. }
  1089. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  1090. u8 *mac, u32 mac_len)
  1091. {
  1092. struct wlfw_mac_addr_req_msg_v01 req;
  1093. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  1094. struct qmi_txn txn;
  1095. int ret;
  1096. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  1097. return -EINVAL;
  1098. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1099. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  1100. if (ret < 0) {
  1101. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  1102. ret);
  1103. ret = -EIO;
  1104. goto out;
  1105. }
  1106. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  1107. mac, plat_priv->driver_state);
  1108. memcpy(req.mac_addr, mac, mac_len);
  1109. req.mac_addr_valid = 1;
  1110. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1111. QMI_WLFW_MAC_ADDR_REQ_V01,
  1112. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  1113. wlfw_mac_addr_req_msg_v01_ei, &req);
  1114. if (ret < 0) {
  1115. qmi_txn_cancel(&txn);
  1116. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  1117. ret = -EIO;
  1118. goto out;
  1119. }
  1120. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1121. if (ret < 0) {
  1122. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  1123. ret);
  1124. ret = -EIO;
  1125. goto out;
  1126. }
  1127. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1128. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  1129. resp.resp.result);
  1130. ret = -resp.resp.result;
  1131. }
  1132. out:
  1133. return ret;
  1134. }
  1135. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  1136. u32 total_size)
  1137. {
  1138. int ret = 0;
  1139. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  1140. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  1141. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  1142. unsigned int remaining;
  1143. struct qmi_txn txn;
  1144. cnss_pr_dbg("%s\n", __func__);
  1145. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1146. if (!req)
  1147. return -ENOMEM;
  1148. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1149. if (!resp) {
  1150. kfree(req);
  1151. return -ENOMEM;
  1152. }
  1153. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  1154. if (!p_qdss_trace_data) {
  1155. ret = ENOMEM;
  1156. goto end;
  1157. }
  1158. remaining = total_size;
  1159. p_qdss_trace_data_temp = p_qdss_trace_data;
  1160. while (remaining && resp->end == 0) {
  1161. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1162. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  1163. if (ret < 0) {
  1164. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  1165. ret);
  1166. goto fail;
  1167. }
  1168. ret = qmi_send_request
  1169. (&plat_priv->qmi_wlfw, NULL, &txn,
  1170. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1171. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1172. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1173. if (ret < 0) {
  1174. qmi_txn_cancel(&txn);
  1175. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1176. ret);
  1177. goto fail;
  1178. }
  1179. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1180. if (ret < 0) {
  1181. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1182. ret);
  1183. goto fail;
  1184. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1185. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1186. resp->resp.result, resp->resp.error);
  1187. ret = -resp->resp.result;
  1188. goto fail;
  1189. } else {
  1190. ret = 0;
  1191. }
  1192. cnss_pr_dbg("%s: response total size %d data len %d",
  1193. __func__, resp->total_size, resp->data_len);
  1194. if ((resp->total_size_valid == 1 &&
  1195. resp->total_size == total_size) &&
  1196. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1197. (resp->data_valid == 1 &&
  1198. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1199. resp->data_len <= remaining) {
  1200. memcpy(p_qdss_trace_data_temp,
  1201. resp->data, resp->data_len);
  1202. } else {
  1203. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1204. __func__,
  1205. total_size, req->seg_id,
  1206. resp->total_size_valid,
  1207. resp->total_size,
  1208. resp->seg_id_valid,
  1209. resp->seg_id,
  1210. resp->data_valid,
  1211. resp->data_len);
  1212. ret = -1;
  1213. goto fail;
  1214. }
  1215. remaining -= resp->data_len;
  1216. p_qdss_trace_data_temp += resp->data_len;
  1217. req->seg_id++;
  1218. }
  1219. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1220. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1221. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1222. total_size);
  1223. if (ret < 0) {
  1224. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1225. ret);
  1226. ret = -1;
  1227. goto fail;
  1228. }
  1229. } else {
  1230. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1231. __func__,
  1232. remaining, resp->end_valid, resp->end);
  1233. ret = -1;
  1234. goto fail;
  1235. }
  1236. fail:
  1237. kfree(p_qdss_trace_data);
  1238. end:
  1239. kfree(req);
  1240. kfree(resp);
  1241. return ret;
  1242. }
  1243. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1244. char *filename, u32 filename_len)
  1245. {
  1246. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1247. char *debug_str = QDSS_DEBUG_FILE_STR;
  1248. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1249. plat_priv->device_id == MANGO_DEVICE_ID ||
  1250. plat_priv->device_id == PEACH_DEVICE_ID)
  1251. debug_str = "";
  1252. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1253. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1254. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1255. else
  1256. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1257. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1258. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1259. }
  1260. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1261. {
  1262. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1263. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1264. struct qmi_txn txn;
  1265. const struct firmware *fw_entry = NULL;
  1266. const u8 *temp;
  1267. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1268. unsigned int remaining;
  1269. int ret = 0;
  1270. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1271. plat_priv->driver_state);
  1272. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1273. if (!req)
  1274. return -ENOMEM;
  1275. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1276. if (!resp) {
  1277. kfree(req);
  1278. return -ENOMEM;
  1279. }
  1280. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1281. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1282. qdss_cfg_filename);
  1283. if (ret) {
  1284. cnss_pr_dbg("Unable to load %s\n",
  1285. qdss_cfg_filename);
  1286. goto err_req_fw;
  1287. }
  1288. temp = fw_entry->data;
  1289. remaining = fw_entry->size;
  1290. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1291. qdss_cfg_filename, remaining);
  1292. while (remaining) {
  1293. req->total_size_valid = 1;
  1294. req->total_size = remaining;
  1295. req->seg_id_valid = 1;
  1296. req->data_valid = 1;
  1297. req->end_valid = 1;
  1298. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1299. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1300. } else {
  1301. req->data_len = remaining;
  1302. req->end = 1;
  1303. }
  1304. memcpy(req->data, temp, req->data_len);
  1305. ret = qmi_txn_init
  1306. (&plat_priv->qmi_wlfw, &txn,
  1307. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1308. resp);
  1309. if (ret < 0) {
  1310. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1311. ret);
  1312. goto err_send;
  1313. }
  1314. ret = qmi_send_request
  1315. (&plat_priv->qmi_wlfw, NULL, &txn,
  1316. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1317. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1318. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1319. if (ret < 0) {
  1320. qmi_txn_cancel(&txn);
  1321. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1322. ret);
  1323. goto err_send;
  1324. }
  1325. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1326. if (ret < 0) {
  1327. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1328. ret);
  1329. goto err_send;
  1330. }
  1331. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1332. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1333. resp->resp.result, resp->resp.error);
  1334. ret = -resp->resp.result;
  1335. goto err_send;
  1336. }
  1337. remaining -= req->data_len;
  1338. temp += req->data_len;
  1339. req->seg_id++;
  1340. }
  1341. release_firmware(fw_entry);
  1342. kfree(req);
  1343. kfree(resp);
  1344. return 0;
  1345. err_send:
  1346. release_firmware(fw_entry);
  1347. err_req_fw:
  1348. kfree(req);
  1349. kfree(resp);
  1350. return ret;
  1351. }
  1352. static int wlfw_send_qdss_trace_mode_req
  1353. (struct cnss_plat_data *plat_priv,
  1354. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1355. unsigned long long option)
  1356. {
  1357. int rc = 0;
  1358. int tmp = 0;
  1359. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1360. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1361. struct qmi_txn txn;
  1362. if (!plat_priv)
  1363. return -ENODEV;
  1364. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1365. if (!req)
  1366. return -ENOMEM;
  1367. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1368. if (!resp) {
  1369. kfree(req);
  1370. return -ENOMEM;
  1371. }
  1372. req->mode_valid = 1;
  1373. req->mode = mode;
  1374. req->option_valid = 1;
  1375. req->option = option;
  1376. tmp = plat_priv->hw_trc_override;
  1377. req->hw_trc_disable_override_valid = 1;
  1378. req->hw_trc_disable_override =
  1379. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1380. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1381. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1382. __func__, mode, option, req->hw_trc_disable_override);
  1383. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1384. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1385. if (rc < 0) {
  1386. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1387. rc);
  1388. goto out;
  1389. }
  1390. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1391. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1392. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1393. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1394. if (rc < 0) {
  1395. qmi_txn_cancel(&txn);
  1396. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1397. goto out;
  1398. }
  1399. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1400. if (rc < 0) {
  1401. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1402. rc);
  1403. goto out;
  1404. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1405. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1406. resp->resp.result, resp->resp.error);
  1407. rc = -resp->resp.result;
  1408. goto out;
  1409. }
  1410. kfree(resp);
  1411. kfree(req);
  1412. return rc;
  1413. out:
  1414. kfree(resp);
  1415. kfree(req);
  1416. CNSS_QMI_ASSERT();
  1417. return rc;
  1418. }
  1419. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1420. {
  1421. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1422. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1423. }
  1424. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1425. {
  1426. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1427. option);
  1428. }
  1429. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1430. enum cnss_driver_mode mode)
  1431. {
  1432. struct wlfw_wlan_mode_req_msg_v01 *req;
  1433. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1434. struct qmi_txn txn;
  1435. int ret = 0;
  1436. if (!plat_priv)
  1437. return -ENODEV;
  1438. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1439. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1440. if (mode == CNSS_OFF &&
  1441. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1442. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1443. return 0;
  1444. }
  1445. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1446. if (!req)
  1447. return -ENOMEM;
  1448. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1449. if (!resp) {
  1450. kfree(req);
  1451. return -ENOMEM;
  1452. }
  1453. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1454. req->hw_debug_valid = 1;
  1455. req->hw_debug = 0;
  1456. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1457. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1458. if (ret < 0) {
  1459. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1460. cnss_qmi_mode_to_str(mode), mode, ret);
  1461. goto out;
  1462. }
  1463. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1464. QMI_WLFW_WLAN_MODE_REQ_V01,
  1465. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1466. wlfw_wlan_mode_req_msg_v01_ei, req);
  1467. if (ret < 0) {
  1468. qmi_txn_cancel(&txn);
  1469. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1470. cnss_qmi_mode_to_str(mode), mode, ret);
  1471. goto out;
  1472. }
  1473. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1474. if (ret < 0) {
  1475. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1476. cnss_qmi_mode_to_str(mode), mode, ret);
  1477. goto out;
  1478. }
  1479. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1480. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1481. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1482. resp->resp.error);
  1483. ret = -resp->resp.result;
  1484. goto out;
  1485. }
  1486. kfree(req);
  1487. kfree(resp);
  1488. return 0;
  1489. out:
  1490. if (mode == CNSS_OFF) {
  1491. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1492. ret = 0;
  1493. } else {
  1494. CNSS_QMI_ASSERT();
  1495. }
  1496. kfree(req);
  1497. kfree(resp);
  1498. return ret;
  1499. }
  1500. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1501. struct cnss_wlan_enable_cfg *config,
  1502. const char *host_version)
  1503. {
  1504. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1505. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1506. struct qmi_txn txn;
  1507. u32 i, ce_id, num_vectors, user_base_data, base_vector;
  1508. int ret = 0;
  1509. if (!plat_priv)
  1510. return -ENODEV;
  1511. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1512. plat_priv->driver_state);
  1513. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1514. if (!req)
  1515. return -ENOMEM;
  1516. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1517. if (!resp) {
  1518. kfree(req);
  1519. return -ENOMEM;
  1520. }
  1521. req->host_version_valid = 1;
  1522. strlcpy(req->host_version, host_version,
  1523. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1524. req->tgt_cfg_valid = 1;
  1525. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1526. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1527. else
  1528. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1529. for (i = 0; i < req->tgt_cfg_len; i++) {
  1530. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1531. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1532. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1533. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1534. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1535. }
  1536. req->svc_cfg_valid = 1;
  1537. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1538. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1539. else
  1540. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1541. for (i = 0; i < req->svc_cfg_len; i++) {
  1542. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1543. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1544. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1545. }
  1546. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1547. plat_priv->device_id != MANGO_DEVICE_ID &&
  1548. plat_priv->device_id != PEACH_DEVICE_ID) {
  1549. if (plat_priv->device_id == QCN7605_DEVICE_ID &&
  1550. config->num_shadow_reg_cfg) {
  1551. req->shadow_reg_valid = 1;
  1552. if (config->num_shadow_reg_cfg >
  1553. QMI_WLFW_MAX_NUM_SHADOW_REG_V01)
  1554. req->shadow_reg_len =
  1555. QMI_WLFW_MAX_NUM_SHADOW_REG_V01;
  1556. else
  1557. req->shadow_reg_len =
  1558. config->num_shadow_reg_cfg;
  1559. memcpy(req->shadow_reg, config->shadow_reg_cfg,
  1560. sizeof(struct wlfw_shadow_reg_cfg_s_v01) *
  1561. req->shadow_reg_len);
  1562. } else {
  1563. req->shadow_reg_v2_valid = 1;
  1564. if (config->num_shadow_reg_v2_cfg >
  1565. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1566. req->shadow_reg_v2_len =
  1567. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1568. else
  1569. req->shadow_reg_v2_len =
  1570. config->num_shadow_reg_v2_cfg;
  1571. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1572. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01) *
  1573. req->shadow_reg_v2_len);
  1574. }
  1575. } else {
  1576. req->shadow_reg_v3_valid = 1;
  1577. if (config->num_shadow_reg_v3_cfg >
  1578. MAX_NUM_SHADOW_REG_V3)
  1579. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1580. else
  1581. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1582. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1583. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1584. plat_priv->num_shadow_regs_v3);
  1585. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1586. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01) *
  1587. req->shadow_reg_v3_len);
  1588. }
  1589. if (config->rri_over_ddr_cfg_valid) {
  1590. req->rri_over_ddr_cfg_valid = 1;
  1591. req->rri_over_ddr_cfg.base_addr_low =
  1592. config->rri_over_ddr_cfg.base_addr_low;
  1593. req->rri_over_ddr_cfg.base_addr_high =
  1594. config->rri_over_ddr_cfg.base_addr_high;
  1595. }
  1596. if (config->send_msi_ce) {
  1597. ret = cnss_bus_get_msi_assignment(plat_priv,
  1598. CE_MSI_NAME,
  1599. &num_vectors,
  1600. &user_base_data,
  1601. &base_vector);
  1602. if (!ret) {
  1603. req->msi_cfg_valid = 1;
  1604. req->msi_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1605. for (ce_id = 0; ce_id < QMI_WLFW_MAX_NUM_CE_V01;
  1606. ce_id++) {
  1607. req->msi_cfg[ce_id].ce_id = ce_id;
  1608. req->msi_cfg[ce_id].msi_vector =
  1609. (ce_id % num_vectors) + base_vector;
  1610. }
  1611. }
  1612. }
  1613. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1614. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1615. if (ret < 0) {
  1616. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1617. ret);
  1618. goto out;
  1619. }
  1620. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1621. QMI_WLFW_WLAN_CFG_REQ_V01,
  1622. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1623. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1624. if (ret < 0) {
  1625. qmi_txn_cancel(&txn);
  1626. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1627. ret);
  1628. goto out;
  1629. }
  1630. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1631. if (ret < 0) {
  1632. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1633. ret);
  1634. goto out;
  1635. }
  1636. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1637. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1638. resp->resp.result, resp->resp.error);
  1639. ret = -resp->resp.result;
  1640. goto out;
  1641. }
  1642. kfree(req);
  1643. kfree(resp);
  1644. return 0;
  1645. out:
  1646. CNSS_QMI_ASSERT();
  1647. kfree(req);
  1648. kfree(resp);
  1649. return ret;
  1650. }
  1651. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1652. u32 offset, u32 mem_type,
  1653. u32 data_len, u8 *data)
  1654. {
  1655. struct wlfw_athdiag_read_req_msg_v01 *req;
  1656. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1657. struct qmi_txn txn;
  1658. int ret = 0;
  1659. if (!plat_priv)
  1660. return -ENODEV;
  1661. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1662. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1663. data, data_len);
  1664. return -EINVAL;
  1665. }
  1666. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1667. plat_priv->driver_state, offset, mem_type, data_len);
  1668. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1669. if (!req)
  1670. return -ENOMEM;
  1671. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1672. if (!resp) {
  1673. kfree(req);
  1674. return -ENOMEM;
  1675. }
  1676. req->offset = offset;
  1677. req->mem_type = mem_type;
  1678. req->data_len = data_len;
  1679. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1680. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1681. if (ret < 0) {
  1682. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1683. ret);
  1684. goto out;
  1685. }
  1686. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1687. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1688. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1689. wlfw_athdiag_read_req_msg_v01_ei, req);
  1690. if (ret < 0) {
  1691. qmi_txn_cancel(&txn);
  1692. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1693. ret);
  1694. goto out;
  1695. }
  1696. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1697. if (ret < 0) {
  1698. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1699. ret);
  1700. goto out;
  1701. }
  1702. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1703. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1704. resp->resp.result, resp->resp.error);
  1705. ret = -resp->resp.result;
  1706. goto out;
  1707. }
  1708. if (!resp->data_valid || resp->data_len != data_len) {
  1709. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1710. resp->data_valid, resp->data_len);
  1711. ret = -EINVAL;
  1712. goto out;
  1713. }
  1714. memcpy(data, resp->data, resp->data_len);
  1715. kfree(req);
  1716. kfree(resp);
  1717. return 0;
  1718. out:
  1719. kfree(req);
  1720. kfree(resp);
  1721. return ret;
  1722. }
  1723. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1724. u32 offset, u32 mem_type,
  1725. u32 data_len, u8 *data)
  1726. {
  1727. struct wlfw_athdiag_write_req_msg_v01 *req;
  1728. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1729. struct qmi_txn txn;
  1730. int ret = 0;
  1731. if (!plat_priv)
  1732. return -ENODEV;
  1733. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1734. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1735. data, data_len);
  1736. return -EINVAL;
  1737. }
  1738. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1739. plat_priv->driver_state, offset, mem_type, data_len, data);
  1740. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1741. if (!req)
  1742. return -ENOMEM;
  1743. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1744. if (!resp) {
  1745. kfree(req);
  1746. return -ENOMEM;
  1747. }
  1748. req->offset = offset;
  1749. req->mem_type = mem_type;
  1750. req->data_len = data_len;
  1751. memcpy(req->data, data, data_len);
  1752. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1753. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1754. if (ret < 0) {
  1755. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1756. ret);
  1757. goto out;
  1758. }
  1759. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1760. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1761. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1762. wlfw_athdiag_write_req_msg_v01_ei, req);
  1763. if (ret < 0) {
  1764. qmi_txn_cancel(&txn);
  1765. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1766. ret);
  1767. goto out;
  1768. }
  1769. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1770. if (ret < 0) {
  1771. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1772. ret);
  1773. goto out;
  1774. }
  1775. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1776. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1777. resp->resp.result, resp->resp.error);
  1778. ret = -resp->resp.result;
  1779. goto out;
  1780. }
  1781. kfree(req);
  1782. kfree(resp);
  1783. return 0;
  1784. out:
  1785. kfree(req);
  1786. kfree(resp);
  1787. return ret;
  1788. }
  1789. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1790. u8 fw_log_mode)
  1791. {
  1792. struct wlfw_ini_req_msg_v01 *req;
  1793. struct wlfw_ini_resp_msg_v01 *resp;
  1794. struct qmi_txn txn;
  1795. int ret = 0;
  1796. if (!plat_priv)
  1797. return -ENODEV;
  1798. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1799. plat_priv->driver_state, fw_log_mode);
  1800. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1801. if (!req)
  1802. return -ENOMEM;
  1803. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1804. if (!resp) {
  1805. kfree(req);
  1806. return -ENOMEM;
  1807. }
  1808. req->enablefwlog_valid = 1;
  1809. req->enablefwlog = fw_log_mode;
  1810. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1811. wlfw_ini_resp_msg_v01_ei, resp);
  1812. if (ret < 0) {
  1813. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1814. fw_log_mode, ret);
  1815. goto out;
  1816. }
  1817. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1818. QMI_WLFW_INI_REQ_V01,
  1819. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1820. wlfw_ini_req_msg_v01_ei, req);
  1821. if (ret < 0) {
  1822. qmi_txn_cancel(&txn);
  1823. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1824. fw_log_mode, ret);
  1825. goto out;
  1826. }
  1827. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1828. if (ret < 0) {
  1829. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1830. fw_log_mode, ret);
  1831. goto out;
  1832. }
  1833. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1834. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1835. fw_log_mode, resp->resp.result, resp->resp.error);
  1836. ret = -resp->resp.result;
  1837. goto out;
  1838. }
  1839. kfree(req);
  1840. kfree(resp);
  1841. return 0;
  1842. out:
  1843. kfree(req);
  1844. kfree(resp);
  1845. return ret;
  1846. }
  1847. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1848. {
  1849. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1850. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1851. struct qmi_txn txn;
  1852. int ret = 0;
  1853. if (!plat_priv)
  1854. return -ENODEV;
  1855. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1856. !plat_priv->fw_pcie_gen_switch) {
  1857. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1858. return 0;
  1859. }
  1860. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1861. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1862. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1863. plat_priv->pcie_gen_speed;
  1864. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1865. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1866. if (ret < 0) {
  1867. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1868. ret);
  1869. goto out;
  1870. }
  1871. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1872. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1873. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1874. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1875. if (ret < 0) {
  1876. qmi_txn_cancel(&txn);
  1877. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1878. goto out;
  1879. }
  1880. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1881. if (ret < 0) {
  1882. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1883. ret);
  1884. goto out;
  1885. }
  1886. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1887. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1888. plat_priv->pcie_gen_speed, resp.resp.result,
  1889. resp.resp.error);
  1890. ret = -resp.resp.result;
  1891. }
  1892. out:
  1893. /* Reset PCIE Gen speed after one time use */
  1894. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1895. return ret;
  1896. }
  1897. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1898. {
  1899. struct wlfw_antenna_switch_req_msg_v01 *req;
  1900. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1901. struct qmi_txn txn;
  1902. int ret = 0;
  1903. if (!plat_priv)
  1904. return -ENODEV;
  1905. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1906. plat_priv->driver_state);
  1907. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1908. if (!req)
  1909. return -ENOMEM;
  1910. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1911. if (!resp) {
  1912. kfree(req);
  1913. return -ENOMEM;
  1914. }
  1915. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1916. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1917. if (ret < 0) {
  1918. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1919. ret);
  1920. goto out;
  1921. }
  1922. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1923. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1924. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1925. wlfw_antenna_switch_req_msg_v01_ei, req);
  1926. if (ret < 0) {
  1927. qmi_txn_cancel(&txn);
  1928. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1929. ret);
  1930. goto out;
  1931. }
  1932. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1933. if (ret < 0) {
  1934. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1935. ret);
  1936. goto out;
  1937. }
  1938. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1939. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1940. resp->resp.result, resp->resp.error);
  1941. ret = -resp->resp.result;
  1942. goto out;
  1943. }
  1944. if (resp->antenna_valid)
  1945. plat_priv->antenna = resp->antenna;
  1946. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1947. resp->antenna_valid, resp->antenna);
  1948. kfree(req);
  1949. kfree(resp);
  1950. return 0;
  1951. out:
  1952. kfree(req);
  1953. kfree(resp);
  1954. return ret;
  1955. }
  1956. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1957. {
  1958. struct wlfw_antenna_grant_req_msg_v01 *req;
  1959. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1960. struct qmi_txn txn;
  1961. int ret = 0;
  1962. if (!plat_priv)
  1963. return -ENODEV;
  1964. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1965. plat_priv->driver_state, plat_priv->grant);
  1966. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1967. if (!req)
  1968. return -ENOMEM;
  1969. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1970. if (!resp) {
  1971. kfree(req);
  1972. return -ENOMEM;
  1973. }
  1974. req->grant_valid = 1;
  1975. req->grant = plat_priv->grant;
  1976. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1977. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1978. if (ret < 0) {
  1979. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1980. ret);
  1981. goto out;
  1982. }
  1983. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1984. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1985. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1986. wlfw_antenna_grant_req_msg_v01_ei, req);
  1987. if (ret < 0) {
  1988. qmi_txn_cancel(&txn);
  1989. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1990. ret);
  1991. goto out;
  1992. }
  1993. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1994. if (ret < 0) {
  1995. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1996. ret);
  1997. goto out;
  1998. }
  1999. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2000. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  2001. resp->resp.result, resp->resp.error);
  2002. ret = -resp->resp.result;
  2003. goto out;
  2004. }
  2005. kfree(req);
  2006. kfree(resp);
  2007. return 0;
  2008. out:
  2009. kfree(req);
  2010. kfree(resp);
  2011. return ret;
  2012. }
  2013. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  2014. {
  2015. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  2016. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  2017. struct qmi_txn txn;
  2018. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  2019. int ret = 0;
  2020. int i;
  2021. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  2022. plat_priv->driver_state);
  2023. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2024. if (!req)
  2025. return -ENOMEM;
  2026. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2027. if (!resp) {
  2028. kfree(req);
  2029. return -ENOMEM;
  2030. }
  2031. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2032. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  2033. ret = -EINVAL;
  2034. goto out;
  2035. }
  2036. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  2037. for (i = 0; i < req->mem_seg_len; i++) {
  2038. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  2039. qdss_mem[i].va, &qdss_mem[i].pa,
  2040. qdss_mem[i].size, qdss_mem[i].type);
  2041. req->mem_seg[i].addr = qdss_mem[i].pa;
  2042. req->mem_seg[i].size = qdss_mem[i].size;
  2043. req->mem_seg[i].type = qdss_mem[i].type;
  2044. }
  2045. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2046. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  2047. if (ret < 0) {
  2048. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  2049. ret);
  2050. goto out;
  2051. }
  2052. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2053. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  2054. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2055. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  2056. if (ret < 0) {
  2057. qmi_txn_cancel(&txn);
  2058. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  2059. ret);
  2060. goto out;
  2061. }
  2062. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2063. if (ret < 0) {
  2064. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  2065. ret);
  2066. goto out;
  2067. }
  2068. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2069. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  2070. resp->resp.result, resp->resp.error);
  2071. ret = -resp->resp.result;
  2072. goto out;
  2073. }
  2074. kfree(req);
  2075. kfree(resp);
  2076. return 0;
  2077. out:
  2078. kfree(req);
  2079. kfree(resp);
  2080. return ret;
  2081. }
  2082. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  2083. struct cnss_wfc_cfg cfg)
  2084. {
  2085. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2086. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2087. struct qmi_txn txn;
  2088. int ret = 0;
  2089. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2090. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  2091. return -EINVAL;
  2092. }
  2093. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2094. if (!req)
  2095. return -ENOMEM;
  2096. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2097. if (!resp) {
  2098. kfree(req);
  2099. return -ENOMEM;
  2100. }
  2101. req->wfc_call_active_valid = 1;
  2102. req->wfc_call_active = cfg.mode;
  2103. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2104. plat_priv->driver_state);
  2105. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2106. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2107. if (ret < 0) {
  2108. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2109. ret);
  2110. goto out;
  2111. }
  2112. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  2113. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2114. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2115. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2116. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2117. if (ret < 0) {
  2118. qmi_txn_cancel(&txn);
  2119. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2120. ret);
  2121. goto out;
  2122. }
  2123. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2124. if (ret < 0) {
  2125. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2126. ret);
  2127. goto out;
  2128. }
  2129. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2130. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2131. resp->resp.result, resp->resp.error);
  2132. ret = -EINVAL;
  2133. goto out;
  2134. }
  2135. ret = 0;
  2136. out:
  2137. kfree(req);
  2138. kfree(resp);
  2139. return ret;
  2140. }
  2141. static int cnss_wlfw_wfc_call_status_send_sync
  2142. (struct cnss_plat_data *plat_priv,
  2143. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  2144. {
  2145. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2146. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2147. struct qmi_txn txn;
  2148. int ret = 0;
  2149. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2150. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  2151. return -EINVAL;
  2152. }
  2153. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2154. if (!req)
  2155. return -ENOMEM;
  2156. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2157. if (!resp) {
  2158. kfree(req);
  2159. return -ENOMEM;
  2160. }
  2161. /**
  2162. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  2163. * But in r2 update QMI structure is expanded and as an effect qmi
  2164. * decoded structures have padding. Thus we cannot use buffer design.
  2165. * For backward compatibility for r1 design copy only wfc_call_active
  2166. * value in hex buffer.
  2167. */
  2168. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  2169. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  2170. /* wfc_call_active is mandatory in IMS indication */
  2171. req->wfc_call_active_valid = 1;
  2172. req->wfc_call_active = ind_msg->wfc_call_active;
  2173. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  2174. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  2175. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  2176. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  2177. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  2178. req->twt_ims_start = ind_msg->twt_ims_start;
  2179. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  2180. req->twt_ims_int = ind_msg->twt_ims_int;
  2181. req->media_quality_valid = ind_msg->media_quality_valid;
  2182. req->media_quality =
  2183. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  2184. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2185. plat_priv->driver_state);
  2186. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2187. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2188. if (ret < 0) {
  2189. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2190. ret);
  2191. goto out;
  2192. }
  2193. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2194. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2195. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2196. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2197. if (ret < 0) {
  2198. qmi_txn_cancel(&txn);
  2199. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2200. ret);
  2201. goto out;
  2202. }
  2203. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2204. if (ret < 0) {
  2205. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2206. ret);
  2207. goto out;
  2208. }
  2209. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2210. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2211. resp->resp.result, resp->resp.error);
  2212. ret = -resp->resp.result;
  2213. goto out;
  2214. }
  2215. ret = 0;
  2216. out:
  2217. kfree(req);
  2218. kfree(resp);
  2219. return ret;
  2220. }
  2221. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2222. {
  2223. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2224. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2225. struct qmi_txn txn;
  2226. int ret = 0;
  2227. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2228. plat_priv->dynamic_feature,
  2229. plat_priv->driver_state);
  2230. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2231. if (!req)
  2232. return -ENOMEM;
  2233. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2234. if (!resp) {
  2235. kfree(req);
  2236. return -ENOMEM;
  2237. }
  2238. req->mask_valid = 1;
  2239. req->mask = plat_priv->dynamic_feature;
  2240. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2241. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2242. if (ret < 0) {
  2243. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2244. ret);
  2245. goto out;
  2246. }
  2247. ret = qmi_send_request
  2248. (&plat_priv->qmi_wlfw, NULL, &txn,
  2249. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2250. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2251. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2252. if (ret < 0) {
  2253. qmi_txn_cancel(&txn);
  2254. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2255. ret);
  2256. goto out;
  2257. }
  2258. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2259. if (ret < 0) {
  2260. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2261. ret);
  2262. goto out;
  2263. }
  2264. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2265. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2266. resp->resp.result, resp->resp.error);
  2267. ret = -resp->resp.result;
  2268. goto out;
  2269. }
  2270. out:
  2271. kfree(req);
  2272. kfree(resp);
  2273. return ret;
  2274. }
  2275. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2276. void *cmd, int cmd_len)
  2277. {
  2278. struct wlfw_get_info_req_msg_v01 *req;
  2279. struct wlfw_get_info_resp_msg_v01 *resp;
  2280. struct qmi_txn txn;
  2281. int ret = 0;
  2282. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2283. type, cmd_len, plat_priv->driver_state);
  2284. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2285. return -EINVAL;
  2286. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2287. if (!req)
  2288. return -ENOMEM;
  2289. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2290. if (!resp) {
  2291. kfree(req);
  2292. return -ENOMEM;
  2293. }
  2294. req->type = type;
  2295. req->data_len = cmd_len;
  2296. memcpy(req->data, cmd, req->data_len);
  2297. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2298. wlfw_get_info_resp_msg_v01_ei, resp);
  2299. if (ret < 0) {
  2300. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2301. ret);
  2302. goto out;
  2303. }
  2304. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2305. QMI_WLFW_GET_INFO_REQ_V01,
  2306. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2307. wlfw_get_info_req_msg_v01_ei, req);
  2308. if (ret < 0) {
  2309. qmi_txn_cancel(&txn);
  2310. cnss_pr_err("Failed to send get info request, err: %d\n",
  2311. ret);
  2312. goto out;
  2313. }
  2314. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2315. if (ret < 0) {
  2316. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2317. ret);
  2318. goto out;
  2319. }
  2320. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2321. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2322. resp->resp.result, resp->resp.error);
  2323. ret = -resp->resp.result;
  2324. goto out;
  2325. }
  2326. kfree(req);
  2327. kfree(resp);
  2328. return 0;
  2329. out:
  2330. kfree(req);
  2331. kfree(resp);
  2332. return ret;
  2333. }
  2334. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2335. {
  2336. return QMI_WLFW_TIMEOUT_MS;
  2337. }
  2338. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2339. struct sockaddr_qrtr *sq,
  2340. struct qmi_txn *txn, const void *data)
  2341. {
  2342. struct cnss_plat_data *plat_priv =
  2343. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2344. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2345. int i;
  2346. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2347. if (!txn) {
  2348. cnss_pr_err("Spurious indication\n");
  2349. return;
  2350. }
  2351. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2352. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2353. return;
  2354. }
  2355. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2356. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2357. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2358. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2359. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2360. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2361. if (!plat_priv->fw_mem[i].va &&
  2362. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2363. plat_priv->fw_mem[i].attrs |=
  2364. DMA_ATTR_FORCE_CONTIGUOUS;
  2365. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2366. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2367. }
  2368. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2369. 0, NULL);
  2370. }
  2371. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2372. struct sockaddr_qrtr *sq,
  2373. struct qmi_txn *txn, const void *data)
  2374. {
  2375. struct cnss_plat_data *plat_priv =
  2376. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2377. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2378. if (!txn) {
  2379. cnss_pr_err("Spurious indication\n");
  2380. return;
  2381. }
  2382. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2383. 0, NULL);
  2384. }
  2385. /**
  2386. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2387. *
  2388. * This event is not required for HST/ HSP as FW calibration done is
  2389. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2390. */
  2391. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2392. struct sockaddr_qrtr *sq,
  2393. struct qmi_txn *txn, const void *data)
  2394. {
  2395. struct cnss_plat_data *plat_priv =
  2396. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2397. struct cnss_cal_info *cal_info;
  2398. if (!txn) {
  2399. cnss_pr_err("Spurious indication\n");
  2400. return;
  2401. }
  2402. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2403. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2404. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2405. return;
  2406. }
  2407. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2408. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2409. if (!cal_info)
  2410. return;
  2411. cal_info->cal_status = CNSS_CAL_DONE;
  2412. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2413. 0, cal_info);
  2414. }
  2415. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2416. struct sockaddr_qrtr *sq,
  2417. struct qmi_txn *txn, const void *data)
  2418. {
  2419. struct cnss_plat_data *plat_priv =
  2420. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2421. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2422. if (!txn) {
  2423. cnss_pr_err("Spurious indication\n");
  2424. return;
  2425. }
  2426. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2427. }
  2428. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2429. struct sockaddr_qrtr *sq,
  2430. struct qmi_txn *txn, const void *data)
  2431. {
  2432. struct cnss_plat_data *plat_priv =
  2433. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2434. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2435. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2436. if (!txn) {
  2437. cnss_pr_err("Spurious indication\n");
  2438. return;
  2439. }
  2440. if (ind_msg->pwr_pin_result_valid)
  2441. plat_priv->pin_result.fw_pwr_pin_result =
  2442. ind_msg->pwr_pin_result;
  2443. if (ind_msg->phy_io_pin_result_valid)
  2444. plat_priv->pin_result.fw_phy_io_pin_result =
  2445. ind_msg->phy_io_pin_result;
  2446. if (ind_msg->rf_pin_result_valid)
  2447. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2448. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2449. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2450. ind_msg->rf_pin_result);
  2451. }
  2452. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2453. u32 cal_file_download_size)
  2454. {
  2455. struct wlfw_cal_report_req_msg_v01 req = {0};
  2456. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2457. struct qmi_txn txn;
  2458. int ret = 0;
  2459. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2460. cal_file_download_size, plat_priv->driver_state);
  2461. req.cal_file_download_size_valid = 1;
  2462. req.cal_file_download_size = cal_file_download_size;
  2463. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2464. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2465. if (ret < 0) {
  2466. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2467. ret);
  2468. goto out;
  2469. }
  2470. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2471. QMI_WLFW_CAL_REPORT_REQ_V01,
  2472. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2473. wlfw_cal_report_req_msg_v01_ei, &req);
  2474. if (ret < 0) {
  2475. qmi_txn_cancel(&txn);
  2476. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2477. ret);
  2478. goto out;
  2479. }
  2480. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2481. if (ret < 0) {
  2482. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2483. ret);
  2484. goto out;
  2485. }
  2486. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2487. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2488. resp.resp.result, resp.resp.error);
  2489. ret = -resp.resp.result;
  2490. goto out;
  2491. }
  2492. out:
  2493. return ret;
  2494. }
  2495. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2496. struct sockaddr_qrtr *sq,
  2497. struct qmi_txn *txn, const void *data)
  2498. {
  2499. struct cnss_plat_data *plat_priv =
  2500. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2501. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2502. struct cnss_cal_info *cal_info;
  2503. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2504. ind->cal_file_upload_size);
  2505. cnss_pr_info("Calibration took %d ms\n",
  2506. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2507. if (!txn) {
  2508. cnss_pr_err("Spurious indication\n");
  2509. return;
  2510. }
  2511. if (ind->cal_file_upload_size_valid)
  2512. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2513. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2514. if (!cal_info)
  2515. return;
  2516. cal_info->cal_status = CNSS_CAL_DONE;
  2517. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2518. 0, cal_info);
  2519. }
  2520. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2521. struct sockaddr_qrtr *sq,
  2522. struct qmi_txn *txn,
  2523. const void *data)
  2524. {
  2525. struct cnss_plat_data *plat_priv =
  2526. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2527. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2528. int i;
  2529. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2530. if (!txn) {
  2531. cnss_pr_err("Spurious indication\n");
  2532. return;
  2533. }
  2534. if (plat_priv->qdss_mem_seg_len) {
  2535. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2536. plat_priv->qdss_mem_seg_len);
  2537. return;
  2538. }
  2539. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2540. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2541. return;
  2542. }
  2543. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2544. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2545. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2546. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2547. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2548. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2549. }
  2550. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2551. 0, NULL);
  2552. }
  2553. /**
  2554. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2555. *
  2556. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2557. * fw memory segment for dumping to file system. Only one type of mem can be
  2558. * saved per indication and is provided in mem seg index 0.
  2559. *
  2560. * Return: None
  2561. */
  2562. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2563. struct sockaddr_qrtr *sq,
  2564. struct qmi_txn *txn,
  2565. const void *data)
  2566. {
  2567. struct cnss_plat_data *plat_priv =
  2568. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2569. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2570. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2571. int i = 0;
  2572. if (!txn || !data) {
  2573. cnss_pr_err("Spurious indication\n");
  2574. return;
  2575. }
  2576. cnss_pr_dbg_buf("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2577. ind_msg->source, ind_msg->mem_seg_valid,
  2578. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2579. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2580. if (!event_data)
  2581. return;
  2582. event_data->mem_type = ind_msg->mem_seg[0].type;
  2583. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2584. event_data->total_size = ind_msg->total_size;
  2585. if (ind_msg->mem_seg_valid) {
  2586. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2587. cnss_pr_err("Invalid seg len indication\n");
  2588. goto free_event_data;
  2589. }
  2590. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2591. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2592. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2593. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2594. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2595. goto free_event_data;
  2596. }
  2597. cnss_pr_dbg_buf("seg-%d: addr 0x%llx size 0x%x\n",
  2598. i, ind_msg->mem_seg[i].addr,
  2599. ind_msg->mem_seg[i].size);
  2600. }
  2601. }
  2602. if (ind_msg->file_name_valid)
  2603. strlcpy(event_data->file_name, ind_msg->file_name,
  2604. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2605. if (ind_msg->source == 1) {
  2606. if (!ind_msg->file_name_valid)
  2607. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2608. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2609. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2610. 0, event_data);
  2611. } else {
  2612. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2613. if (!ind_msg->file_name_valid)
  2614. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2615. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2616. } else {
  2617. if (!ind_msg->file_name_valid)
  2618. strlcpy(event_data->file_name, "fw_mem_dump",
  2619. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2620. }
  2621. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2622. 0, event_data);
  2623. }
  2624. return;
  2625. free_event_data:
  2626. kfree(event_data);
  2627. }
  2628. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2629. struct sockaddr_qrtr *sq,
  2630. struct qmi_txn *txn,
  2631. const void *data)
  2632. {
  2633. struct cnss_plat_data *plat_priv =
  2634. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2635. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2636. 0, NULL);
  2637. }
  2638. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2639. struct sockaddr_qrtr *sq,
  2640. struct qmi_txn *txn,
  2641. const void *data)
  2642. {
  2643. struct cnss_plat_data *plat_priv =
  2644. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2645. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2646. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2647. if (!txn) {
  2648. cnss_pr_err("Spurious indication\n");
  2649. return;
  2650. }
  2651. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2652. ind_msg->data_len, ind_msg->type,
  2653. ind_msg->is_last, ind_msg->seq_no);
  2654. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2655. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2656. (void *)ind_msg->data,
  2657. ind_msg->data_len);
  2658. }
  2659. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2660. (struct cnss_plat_data *plat_priv,
  2661. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2662. {
  2663. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2664. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2665. struct qmi_txn txn;
  2666. int ret = 0;
  2667. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2668. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2669. return -EINVAL;
  2670. }
  2671. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2672. if (!req)
  2673. return -ENOMEM;
  2674. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2675. if (!resp) {
  2676. kfree(req);
  2677. return -ENOMEM;
  2678. }
  2679. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2680. req->twt_sta_start = ind_msg->twt_sta_start;
  2681. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2682. req->twt_sta_int = ind_msg->twt_sta_int;
  2683. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2684. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2685. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2686. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2687. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2688. req->twt_sta_dl = req->twt_sta_dl;
  2689. req->twt_sta_config_changed_valid =
  2690. ind_msg->twt_sta_config_changed_valid;
  2691. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2692. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2693. plat_priv->driver_state);
  2694. ret =
  2695. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2696. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2697. resp);
  2698. if (ret < 0) {
  2699. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2700. ret);
  2701. goto out;
  2702. }
  2703. ret =
  2704. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2705. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2706. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2707. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2708. if (ret < 0) {
  2709. qmi_txn_cancel(&txn);
  2710. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2711. goto out;
  2712. }
  2713. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2714. if (ret < 0) {
  2715. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2716. goto out;
  2717. }
  2718. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2719. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2720. resp->resp.result, resp->resp.error);
  2721. ret = -resp->resp.result;
  2722. goto out;
  2723. }
  2724. ret = 0;
  2725. out:
  2726. kfree(req);
  2727. kfree(resp);
  2728. return ret;
  2729. }
  2730. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2731. void *data)
  2732. {
  2733. int ret;
  2734. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2735. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2736. kfree(data);
  2737. return ret;
  2738. }
  2739. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2740. struct sockaddr_qrtr *sq,
  2741. struct qmi_txn *txn,
  2742. const void *data)
  2743. {
  2744. struct cnss_plat_data *plat_priv =
  2745. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2746. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2747. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2748. if (!txn) {
  2749. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2750. return;
  2751. }
  2752. if (!ind_msg) {
  2753. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2754. return;
  2755. }
  2756. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2757. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2758. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2759. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2760. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2761. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2762. ind_msg->twt_sta_config_changed_valid,
  2763. ind_msg->twt_sta_config_changed);
  2764. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2765. if (!event_data)
  2766. return;
  2767. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2768. event_data);
  2769. }
  2770. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2771. {
  2772. .type = QMI_INDICATION,
  2773. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2774. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2775. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2776. .fn = cnss_wlfw_request_mem_ind_cb
  2777. },
  2778. {
  2779. .type = QMI_INDICATION,
  2780. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2781. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2782. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2783. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2784. },
  2785. {
  2786. .type = QMI_INDICATION,
  2787. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2788. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2789. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2790. .fn = cnss_wlfw_fw_ready_ind_cb
  2791. },
  2792. {
  2793. .type = QMI_INDICATION,
  2794. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2795. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2796. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2797. .fn = cnss_wlfw_fw_init_done_ind_cb
  2798. },
  2799. {
  2800. .type = QMI_INDICATION,
  2801. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2802. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2803. .decoded_size =
  2804. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2805. .fn = cnss_wlfw_pin_result_ind_cb
  2806. },
  2807. {
  2808. .type = QMI_INDICATION,
  2809. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2810. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2811. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2812. .fn = cnss_wlfw_cal_done_ind_cb
  2813. },
  2814. {
  2815. .type = QMI_INDICATION,
  2816. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2817. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2818. .decoded_size =
  2819. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2820. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2821. },
  2822. {
  2823. .type = QMI_INDICATION,
  2824. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2825. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2826. .decoded_size =
  2827. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2828. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2829. },
  2830. {
  2831. .type = QMI_INDICATION,
  2832. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2833. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2834. .decoded_size =
  2835. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2836. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2837. },
  2838. {
  2839. .type = QMI_INDICATION,
  2840. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2841. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2842. .decoded_size =
  2843. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2844. .fn = cnss_wlfw_respond_get_info_ind_cb
  2845. },
  2846. {
  2847. .type = QMI_INDICATION,
  2848. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2849. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2850. .decoded_size =
  2851. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2852. .fn = cnss_wlfw_process_twt_cfg_ind
  2853. },
  2854. {}
  2855. };
  2856. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2857. void *data)
  2858. {
  2859. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2860. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2861. struct sockaddr_qrtr sq = { 0 };
  2862. int ret = 0;
  2863. if (!event_data)
  2864. return -EINVAL;
  2865. sq.sq_family = AF_QIPCRTR;
  2866. sq.sq_node = event_data->node;
  2867. sq.sq_port = event_data->port;
  2868. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2869. sizeof(sq), 0);
  2870. if (ret < 0) {
  2871. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2872. goto out;
  2873. }
  2874. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2875. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2876. plat_priv->driver_state);
  2877. kfree(data);
  2878. return 0;
  2879. out:
  2880. CNSS_QMI_ASSERT();
  2881. kfree(data);
  2882. return ret;
  2883. }
  2884. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2885. {
  2886. int ret = 0;
  2887. if (!plat_priv)
  2888. return -ENODEV;
  2889. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2890. cnss_pr_err("Unexpected WLFW server arrive\n");
  2891. CNSS_ASSERT(0);
  2892. return -EINVAL;
  2893. }
  2894. cnss_ignore_qmi_failure(false);
  2895. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2896. if (ret < 0)
  2897. goto out;
  2898. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2899. if (ret < 0) {
  2900. if (ret == -EALREADY)
  2901. ret = 0;
  2902. goto out;
  2903. }
  2904. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2905. if (ret < 0)
  2906. goto out;
  2907. return 0;
  2908. out:
  2909. return ret;
  2910. }
  2911. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2912. {
  2913. int ret;
  2914. if (!plat_priv)
  2915. return -ENODEV;
  2916. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2917. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2918. plat_priv->driver_state);
  2919. cnss_qmi_deinit(plat_priv);
  2920. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2921. ret = cnss_qmi_init(plat_priv);
  2922. if (ret < 0) {
  2923. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2924. CNSS_ASSERT(0);
  2925. }
  2926. return 0;
  2927. }
  2928. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2929. struct qmi_service *service)
  2930. {
  2931. struct cnss_plat_data *plat_priv =
  2932. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2933. struct cnss_qmi_event_server_arrive_data *event_data;
  2934. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2935. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2936. plat_priv->driver_state);
  2937. return 0;
  2938. }
  2939. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2940. service->node, service->port);
  2941. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2942. if (!event_data)
  2943. return -ENOMEM;
  2944. event_data->node = service->node;
  2945. event_data->port = service->port;
  2946. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2947. 0, event_data);
  2948. return 0;
  2949. }
  2950. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2951. struct qmi_service *service)
  2952. {
  2953. struct cnss_plat_data *plat_priv =
  2954. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2955. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2956. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2957. plat_priv->driver_state);
  2958. return;
  2959. }
  2960. cnss_pr_dbg("WLFW server exiting\n");
  2961. if (plat_priv) {
  2962. cnss_ignore_qmi_failure(true);
  2963. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2964. }
  2965. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2966. 0, NULL);
  2967. }
  2968. static struct qmi_ops qmi_wlfw_ops = {
  2969. .new_server = wlfw_new_server,
  2970. .del_server = wlfw_del_server,
  2971. };
  2972. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2973. {
  2974. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2975. /* In order to support dual wlan card attach case,
  2976. * need separate qmi service instance id for each dev
  2977. */
  2978. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2979. plat_priv->wlfw_service_instance_id != 0)
  2980. id = plat_priv->wlfw_service_instance_id;
  2981. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2982. WLFW_SERVICE_VERS_V01, id);
  2983. }
  2984. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2985. {
  2986. int ret = 0;
  2987. cnss_get_qrtr_info(plat_priv);
  2988. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2989. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2990. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2991. if (ret < 0) {
  2992. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2993. ret);
  2994. goto out;
  2995. }
  2996. ret = cnss_qmi_add_lookup(plat_priv);
  2997. if (ret < 0)
  2998. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2999. out:
  3000. return ret;
  3001. }
  3002. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  3003. {
  3004. qmi_handle_release(&plat_priv->qmi_wlfw);
  3005. }
  3006. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  3007. {
  3008. struct dms_get_mac_address_req_msg_v01 req;
  3009. struct dms_get_mac_address_resp_msg_v01 resp;
  3010. struct qmi_txn txn;
  3011. int ret = 0;
  3012. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  3013. cnss_pr_err("DMS QMI connection not established\n");
  3014. return -EINVAL;
  3015. }
  3016. cnss_pr_dbg("Requesting DMS MAC address");
  3017. memset(&resp, 0, sizeof(resp));
  3018. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  3019. dms_get_mac_address_resp_msg_v01_ei, &resp);
  3020. if (ret < 0) {
  3021. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  3022. ret);
  3023. goto out;
  3024. }
  3025. req.device = DMS_DEVICE_MAC_WLAN_V01;
  3026. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  3027. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  3028. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  3029. dms_get_mac_address_req_msg_v01_ei, &req);
  3030. if (ret < 0) {
  3031. qmi_txn_cancel(&txn);
  3032. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  3033. ret);
  3034. goto out;
  3035. }
  3036. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  3037. if (ret < 0) {
  3038. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  3039. ret);
  3040. goto out;
  3041. }
  3042. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  3043. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  3044. resp.resp.result, resp.resp.error);
  3045. ret = -resp.resp.result;
  3046. goto out;
  3047. }
  3048. if (!resp.mac_address_valid ||
  3049. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  3050. cnss_pr_err("Invalid MAC address received from DMS\n");
  3051. plat_priv->dms.mac_valid = false;
  3052. goto out;
  3053. }
  3054. plat_priv->dms.mac_valid = true;
  3055. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  3056. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  3057. out:
  3058. return ret;
  3059. }
  3060. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  3061. unsigned int node, unsigned int port)
  3062. {
  3063. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  3064. struct sockaddr_qrtr sq = {0};
  3065. int ret = 0;
  3066. sq.sq_family = AF_QIPCRTR;
  3067. sq.sq_node = node;
  3068. sq.sq_port = port;
  3069. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  3070. sizeof(sq), 0);
  3071. if (ret < 0) {
  3072. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  3073. node, port);
  3074. goto out;
  3075. }
  3076. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  3077. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  3078. plat_priv->driver_state);
  3079. out:
  3080. return ret;
  3081. }
  3082. static int dms_new_server(struct qmi_handle *qmi_dms,
  3083. struct qmi_service *service)
  3084. {
  3085. struct cnss_plat_data *plat_priv =
  3086. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  3087. if (!service)
  3088. return -EINVAL;
  3089. return cnss_dms_connect_to_server(plat_priv, service->node,
  3090. service->port);
  3091. }
  3092. static void cnss_dms_server_exit_work(struct work_struct *work)
  3093. {
  3094. int ret;
  3095. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3096. cnss_dms_deinit(plat_priv);
  3097. cnss_pr_info("QMI DMS Server Exit");
  3098. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3099. ret = cnss_dms_init(plat_priv);
  3100. if (ret < 0)
  3101. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  3102. }
  3103. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  3104. static void dms_del_server(struct qmi_handle *qmi_dms,
  3105. struct qmi_service *service)
  3106. {
  3107. struct cnss_plat_data *plat_priv =
  3108. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  3109. if (!plat_priv)
  3110. return;
  3111. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  3112. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  3113. plat_priv->driver_state);
  3114. return;
  3115. }
  3116. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3117. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  3118. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  3119. plat_priv->driver_state);
  3120. schedule_work(&cnss_dms_del_work);
  3121. }
  3122. void cnss_cancel_dms_work(void)
  3123. {
  3124. cancel_work_sync(&cnss_dms_del_work);
  3125. }
  3126. static struct qmi_ops qmi_dms_ops = {
  3127. .new_server = dms_new_server,
  3128. .del_server = dms_del_server,
  3129. };
  3130. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  3131. {
  3132. int ret = 0;
  3133. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  3134. &qmi_dms_ops, NULL);
  3135. if (ret < 0) {
  3136. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  3137. goto out;
  3138. }
  3139. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  3140. DMS_SERVICE_VERS_V01, 0);
  3141. if (ret < 0)
  3142. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  3143. out:
  3144. return ret;
  3145. }
  3146. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  3147. {
  3148. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3149. qmi_handle_release(&plat_priv->qmi_dms);
  3150. }
  3151. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  3152. {
  3153. int ret;
  3154. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  3155. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  3156. struct qmi_txn txn;
  3157. if (!plat_priv)
  3158. return -ENODEV;
  3159. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  3160. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3161. if (!req)
  3162. return -ENOMEM;
  3163. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3164. if (!resp) {
  3165. kfree(req);
  3166. return -ENOMEM;
  3167. }
  3168. req->antenna = plat_priv->antenna;
  3169. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3170. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  3171. if (ret < 0) {
  3172. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  3173. ret);
  3174. goto out;
  3175. }
  3176. ret = qmi_send_request
  3177. (&plat_priv->coex_qmi, NULL, &txn,
  3178. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  3179. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  3180. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  3181. if (ret < 0) {
  3182. qmi_txn_cancel(&txn);
  3183. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  3184. ret);
  3185. goto out;
  3186. }
  3187. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3188. if (ret < 0) {
  3189. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  3190. ret);
  3191. goto out;
  3192. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3193. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  3194. resp->resp.result, resp->resp.error);
  3195. ret = -resp->resp.result;
  3196. goto out;
  3197. }
  3198. if (resp->grant_valid)
  3199. plat_priv->grant = resp->grant;
  3200. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  3201. kfree(resp);
  3202. kfree(req);
  3203. return 0;
  3204. out:
  3205. kfree(resp);
  3206. kfree(req);
  3207. return ret;
  3208. }
  3209. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3210. {
  3211. int ret;
  3212. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3213. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3214. struct qmi_txn txn;
  3215. if (!plat_priv)
  3216. return -ENODEV;
  3217. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3218. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3219. if (!req)
  3220. return -ENOMEM;
  3221. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3222. if (!resp) {
  3223. kfree(req);
  3224. return -ENOMEM;
  3225. }
  3226. req->antenna = plat_priv->antenna;
  3227. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3228. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3229. if (ret < 0) {
  3230. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3231. ret);
  3232. goto out;
  3233. }
  3234. ret = qmi_send_request
  3235. (&plat_priv->coex_qmi, NULL, &txn,
  3236. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3237. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3238. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3239. if (ret < 0) {
  3240. qmi_txn_cancel(&txn);
  3241. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3242. ret);
  3243. goto out;
  3244. }
  3245. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3246. if (ret < 0) {
  3247. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3248. ret);
  3249. goto out;
  3250. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3251. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3252. resp->resp.result, resp->resp.error);
  3253. ret = -resp->resp.result;
  3254. goto out;
  3255. }
  3256. kfree(resp);
  3257. kfree(req);
  3258. return 0;
  3259. out:
  3260. kfree(resp);
  3261. kfree(req);
  3262. return ret;
  3263. }
  3264. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3265. {
  3266. int ret;
  3267. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3268. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3269. u8 pcss_enabled;
  3270. if (!plat_priv)
  3271. return -ENODEV;
  3272. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3273. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3274. return 0;
  3275. }
  3276. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3277. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3278. req.restart_level_type_valid = 1;
  3279. req.restart_level_type = pcss_enabled;
  3280. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3281. wlfw_subsys_restart_level_req_msg_v01_ei,
  3282. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3283. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3284. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3285. QMI_WLFW_TIMEOUT_JF);
  3286. if (ret < 0)
  3287. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3288. return ret;
  3289. }
  3290. static int coex_new_server(struct qmi_handle *qmi,
  3291. struct qmi_service *service)
  3292. {
  3293. struct cnss_plat_data *plat_priv =
  3294. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3295. struct sockaddr_qrtr sq = { 0 };
  3296. int ret = 0;
  3297. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3298. service->node, service->port);
  3299. sq.sq_family = AF_QIPCRTR;
  3300. sq.sq_node = service->node;
  3301. sq.sq_port = service->port;
  3302. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3303. if (ret < 0) {
  3304. cnss_pr_err("Fail to connect to remote service port\n");
  3305. return ret;
  3306. }
  3307. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3308. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3309. plat_priv->driver_state);
  3310. return 0;
  3311. }
  3312. static void coex_del_server(struct qmi_handle *qmi,
  3313. struct qmi_service *service)
  3314. {
  3315. struct cnss_plat_data *plat_priv =
  3316. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3317. cnss_pr_dbg("COEX server exit\n");
  3318. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3319. }
  3320. static struct qmi_ops coex_qmi_ops = {
  3321. .new_server = coex_new_server,
  3322. .del_server = coex_del_server,
  3323. };
  3324. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3325. { int ret;
  3326. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3327. COEX_SERVICE_MAX_MSG_LEN,
  3328. &coex_qmi_ops, NULL);
  3329. if (ret < 0)
  3330. return ret;
  3331. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3332. COEX_SERVICE_VERS_V01, 0);
  3333. return ret;
  3334. }
  3335. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3336. {
  3337. qmi_handle_release(&plat_priv->coex_qmi);
  3338. }
  3339. /* IMS Service */
  3340. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3341. {
  3342. int ret;
  3343. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3344. struct qmi_txn *txn;
  3345. if (!plat_priv)
  3346. return -ENODEV;
  3347. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3348. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3349. if (!req)
  3350. return -ENOMEM;
  3351. req->wfc_call_status_valid = 1;
  3352. req->wfc_call_status = 1;
  3353. txn = &plat_priv->txn;
  3354. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3355. if (ret < 0) {
  3356. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3357. ret);
  3358. goto out;
  3359. }
  3360. ret = qmi_send_request
  3361. (&plat_priv->ims_qmi, NULL, txn,
  3362. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3363. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3364. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3365. if (ret < 0) {
  3366. qmi_txn_cancel(txn);
  3367. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3368. ret);
  3369. goto out;
  3370. }
  3371. kfree(req);
  3372. return 0;
  3373. out:
  3374. kfree(req);
  3375. return ret;
  3376. }
  3377. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3378. struct sockaddr_qrtr *sq,
  3379. struct qmi_txn *txn,
  3380. const void *data)
  3381. {
  3382. const
  3383. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3384. data;
  3385. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3386. if (!txn) {
  3387. cnss_pr_err("spurious response\n");
  3388. return;
  3389. }
  3390. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3391. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3392. resp->resp.result, resp->resp.error);
  3393. txn->result = -resp->resp.result;
  3394. }
  3395. }
  3396. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3397. void *data)
  3398. {
  3399. int ret;
  3400. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3401. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3402. kfree(data);
  3403. return ret;
  3404. }
  3405. static void
  3406. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3407. struct sockaddr_qrtr *sq,
  3408. struct qmi_txn *txn, const void *data)
  3409. {
  3410. struct cnss_plat_data *plat_priv =
  3411. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3412. const
  3413. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3414. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3415. if (!txn) {
  3416. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3417. return;
  3418. }
  3419. if (!ind_msg) {
  3420. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3421. return;
  3422. }
  3423. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3424. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3425. ind_msg->all_wfc_calls_held,
  3426. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3427. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3428. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3429. ind_msg->media_quality_valid, ind_msg->media_quality);
  3430. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3431. if (!event_data)
  3432. return;
  3433. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3434. 0, event_data);
  3435. }
  3436. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3437. {
  3438. .type = QMI_RESPONSE,
  3439. .msg_id =
  3440. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3441. .ei =
  3442. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3443. .decoded_size = sizeof(struct
  3444. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3445. .fn = ims_subscribe_for_indication_resp_cb
  3446. },
  3447. {
  3448. .type = QMI_INDICATION,
  3449. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3450. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3451. .decoded_size =
  3452. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3453. .fn = cnss_ims_process_wfc_call_ind_cb
  3454. },
  3455. {}
  3456. };
  3457. static int ims_new_server(struct qmi_handle *qmi,
  3458. struct qmi_service *service)
  3459. {
  3460. struct cnss_plat_data *plat_priv =
  3461. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3462. struct sockaddr_qrtr sq = { 0 };
  3463. int ret = 0;
  3464. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3465. service->node, service->port);
  3466. sq.sq_family = AF_QIPCRTR;
  3467. sq.sq_node = service->node;
  3468. sq.sq_port = service->port;
  3469. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3470. if (ret < 0) {
  3471. cnss_pr_err("Fail to connect to remote service port\n");
  3472. return ret;
  3473. }
  3474. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3475. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3476. plat_priv->driver_state);
  3477. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3478. return ret;
  3479. }
  3480. static void ims_del_server(struct qmi_handle *qmi,
  3481. struct qmi_service *service)
  3482. {
  3483. struct cnss_plat_data *plat_priv =
  3484. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3485. cnss_pr_dbg("IMS server exit\n");
  3486. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3487. }
  3488. static struct qmi_ops ims_qmi_ops = {
  3489. .new_server = ims_new_server,
  3490. .del_server = ims_del_server,
  3491. };
  3492. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3493. { int ret;
  3494. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3495. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3496. &ims_qmi_ops, qmi_ims_msg_handlers);
  3497. if (ret < 0)
  3498. return ret;
  3499. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3500. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3501. return ret;
  3502. }
  3503. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3504. {
  3505. qmi_handle_release(&plat_priv->ims_qmi);
  3506. }