dp_main.c 297 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744874587468747874887498750875187528753875487558756875787588759876087618762876387648765876687678768876987708771877287738774877587768777877887798780878187828783878487858786878787888789879087918792879387948795879687978798879988008801880288038804880588068807880888098810881188128813881488158816881788188819882088218822882388248825882688278828882988308831883288338834883588368837883888398840884188428843884488458846884788488849885088518852885388548855885688578858885988608861886288638864886588668867886888698870887188728873887488758876887788788879888088818882888388848885888688878888888988908891889288938894889588968897889888998900890189028903890489058906890789088909891089118912891389148915891689178918891989208921892289238924892589268927892889298930893189328933893489358936893789388939894089418942894389448945894689478948894989508951895289538954895589568957895889598960896189628963896489658966896789688969897089718972897389748975897689778978897989808981898289838984898589868987898889898990899189928993899489958996899789988999900090019002900390049005900690079008900990109011901290139014901590169017901890199020902190229023902490259026902790289029903090319032903390349035903690379038903990409041904290439044904590469047904890499050905190529053905490559056905790589059906090619062906390649065906690679068906990709071907290739074907590769077907890799080908190829083908490859086908790889089909090919092909390949095909690979098909991009101910291039104910591069107910891099110911191129113911491159116911791189119912091219122912391249125912691279128912991309131913291339134913591369137913891399140914191429143914491459146914791489149915091519152915391549155915691579158915991609161916291639164916591669167916891699170917191729173917491759176917791789179918091819182918391849185918691879188918991909191919291939194919591969197919891999200920192029203920492059206920792089209921092119212921392149215921692179218921992209221922292239224922592269227922892299230923192329233923492359236923792389239924092419242924392449245924692479248924992509251925292539254925592569257925892599260926192629263926492659266926792689269927092719272927392749275927692779278927992809281928292839284928592869287928892899290929192929293929492959296929792989299930093019302930393049305930693079308930993109311931293139314931593169317931893199320932193229323932493259326932793289329933093319332933393349335933693379338933993409341934293439344934593469347934893499350935193529353935493559356935793589359936093619362936393649365936693679368936993709371937293739374937593769377937893799380938193829383938493859386938793889389939093919392939393949395939693979398939994009401940294039404940594069407940894099410941194129413941494159416941794189419942094219422942394249425942694279428942994309431943294339434943594369437943894399440944194429443944494459446944794489449945094519452945394549455945694579458945994609461946294639464946594669467946894699470947194729473947494759476947794789479948094819482948394849485948694879488948994909491949294939494949594969497949894999500950195029503950495059506950795089509951095119512951395149515951695179518951995209521952295239524952595269527952895299530953195329533953495359536953795389539954095419542954395449545954695479548954995509551955295539554955595569557955895599560956195629563956495659566956795689569957095719572957395749575957695779578957995809581958295839584958595869587958895899590959195929593959495959596959795989599960096019602960396049605960696079608960996109611961296139614961596169617961896199620962196229623962496259626962796289629963096319632963396349635963696379638963996409641964296439644964596469647964896499650965196529653965496559656965796589659966096619662966396649665966696679668966996709671967296739674967596769677967896799680968196829683968496859686968796889689969096919692969396949695969696979698969997009701970297039704970597069707970897099710971197129713971497159716971797189719972097219722972397249725972697279728972997309731973297339734973597369737973897399740974197429743974497459746974797489749975097519752975397549755975697579758975997609761976297639764976597669767976897699770977197729773977497759776977797789779978097819782978397849785978697879788978997909791979297939794979597969797979897999800980198029803980498059806980798089809981098119812981398149815981698179818981998209821982298239824982598269827982898299830983198329833983498359836983798389839984098419842984398449845984698479848984998509851985298539854985598569857985898599860986198629863986498659866986798689869987098719872987398749875987698779878987998809881988298839884988598869887988898899890989198929893989498959896989798989899990099019902990399049905990699079908990999109911991299139914991599169917991899199920992199229923992499259926992799289929993099319932993399349935993699379938993999409941994299439944994599469947994899499950995199529953995499559956995799589959996099619962996399649965996699679968996999709971997299739974997599769977997899799980998199829983998499859986998799889989999099919992999399949995999699979998999910000100011000210003100041000510006100071000810009100101001110012100131001410015100161001710018100191002010021100221002310024100251002610027100281002910030100311003210033100341003510036100371003810039100401004110042100431004410045100461004710048100491005010051100521005310054100551005610057100581005910060100611006210063100641006510066100671006810069100701007110072100731007410075100761007710078100791008010081100821008310084100851008610087100881008910090100911009210093100941009510096100971009810099101001010110102101031010410105101061010710108101091011010111101121011310114101151011610117101181011910120101211012210123101241012510126101271012810129101301013110132101331013410135101361013710138101391014010141101421014310144101451014610147101481014910150101511015210153101541015510156101571015810159101601016110162101631016410165101661016710168101691017010171101721017310174101751017610177101781017910180101811018210183101841018510186101871018810189101901019110192101931019410195101961019710198101991020010201102021020310204102051020610207102081020910210102111021210213102141021510216102171021810219102201022110222102231022410225102261022710228102291023010231102321023310234102351023610237102381023910240102411024210243102441024510246102471024810249102501025110252102531025410255102561025710258102591026010261102621026310264102651026610267102681026910270102711027210273102741027510276102771027810279102801028110282102831028410285102861028710288102891029010291102921029310294102951029610297102981029910300103011030210303103041030510306103071030810309103101031110312103131031410315103161031710318103191032010321103221032310324103251032610327103281032910330103311033210333103341033510336103371033810339103401034110342103431034410345103461034710348103491035010351103521035310354103551035610357103581035910360103611036210363103641036510366103671036810369103701037110372103731037410375103761037710378103791038010381103821038310384103851038610387103881038910390103911039210393103941039510396103971039810399104001040110402104031040410405104061040710408104091041010411104121041310414104151041610417104181041910420104211042210423104241042510426104271042810429104301043110432104331043410435104361043710438104391044010441104421044310444104451044610447104481044910450104511045210453104541045510456104571045810459104601046110462104631046410465104661046710468104691047010471104721047310474104751047610477104781047910480104811048210483104841048510486104871048810489104901049110492104931049410495104961049710498104991050010501105021050310504105051050610507105081050910510105111051210513105141051510516105171051810519105201052110522105231052410525105261052710528105291053010531105321053310534105351053610537105381053910540105411054210543105441054510546105471054810549105501055110552105531055410555105561055710558105591056010561105621056310564105651056610567105681056910570105711057210573105741057510576105771057810579105801058110582105831058410585105861058710588105891059010591105921059310594105951059610597105981059910600106011060210603106041060510606106071060810609106101061110612106131061410615106161061710618106191062010621106221062310624106251062610627106281062910630106311063210633106341063510636106371063810639106401064110642106431064410645106461064710648106491065010651106521065310654106551065610657106581065910660106611066210663106641066510666106671066810669106701067110672106731067410675106761067710678106791068010681106821068310684106851068610687106881068910690106911069210693106941069510696106971069810699107001070110702107031070410705107061070710708107091071010711107121071310714107151071610717107181071910720107211072210723107241072510726107271072810729107301073110732107331073410735107361073710738107391074010741107421074310744107451074610747107481074910750107511075210753107541075510756107571075810759107601076110762107631076410765107661076710768107691077010771107721077310774107751077610777107781077910780107811078210783107841078510786107871078810789107901079110792107931079410795107961079710798107991080010801108021080310804108051080610807108081080910810108111081210813108141081510816108171081810819108201082110822108231082410825108261082710828108291083010831108321083310834108351083610837108381083910840108411084210843108441084510846108471084810849108501085110852108531085410855108561085710858108591086010861108621086310864108651086610867108681086910870108711087210873108741087510876108771087810879108801088110882108831088410885108861088710888108891089010891108921089310894108951089610897108981089910900109011090210903109041090510906109071090810909109101091110912109131091410915109161091710918109191092010921
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include "dp_rx_mon.h"
  36. #ifdef DP_RATETABLE_SUPPORT
  37. #include "dp_ratetable.h"
  38. #endif
  39. #include <cdp_txrx_handle.h>
  40. #include <wlan_cfg.h>
  41. #include "cdp_txrx_cmn_struct.h"
  42. #include "cdp_txrx_stats_struct.h"
  43. #include "cdp_txrx_cmn_reg.h"
  44. #include <qdf_util.h>
  45. #include "dp_peer.h"
  46. #include "dp_rx_mon.h"
  47. #include "htt_stats.h"
  48. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  49. #include "cfg_ucfg_api.h"
  50. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  51. #include "cdp_txrx_flow_ctrl_v2.h"
  52. #else
  53. static inline void
  54. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  55. {
  56. return;
  57. }
  58. #endif
  59. #include "dp_ipa.h"
  60. #include "dp_cal_client_api.h"
  61. #ifdef CONFIG_MCL
  62. extern int con_mode_monitor;
  63. #ifndef REMOVE_PKT_LOG
  64. #include <pktlog_ac_api.h>
  65. #include <pktlog_ac.h>
  66. #endif
  67. #endif
  68. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  69. #include "dp_rx_mon_feature.h"
  70. #else
  71. /*
  72. * dp_config_enh_rx_capture()- API to enable/disable enhanced rx capture
  73. * @pdev_handle: DP_PDEV handle
  74. * @val: user provided value
  75. *
  76. * Return: QDF_STATUS
  77. */
  78. static QDF_STATUS
  79. dp_config_enh_rx_capture(struct cdp_pdev *pdev_handle, int val)
  80. {
  81. return QDF_STATUS_E_INVAL;
  82. }
  83. #endif
  84. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle);
  85. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force);
  86. static struct dp_soc *
  87. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  88. struct ol_if_ops *ol_ops, uint16_t device_id);
  89. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  90. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  91. uint8_t *peer_mac_addr,
  92. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  93. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  94. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  95. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  96. #ifdef ENABLE_VERBOSE_DEBUG
  97. bool is_dp_verbose_debug_enabled;
  98. #endif
  99. #define DP_INTR_POLL_TIMER_MS 10
  100. /* Generic AST entry aging timer value */
  101. #define DP_AST_AGING_TIMER_DEFAULT_MS 1000
  102. /* WDS AST entry aging timer value */
  103. #define DP_WDS_AST_AGING_TIMER_DEFAULT_MS 120000
  104. #define DP_WDS_AST_AGING_TIMER_CNT \
  105. ((DP_WDS_AST_AGING_TIMER_DEFAULT_MS / DP_AST_AGING_TIMER_DEFAULT_MS) - 1)
  106. #define DP_MCS_LENGTH (6*MAX_MCS)
  107. #define DP_NSS_LENGTH (6*SS_COUNT)
  108. #define DP_MU_GROUP_SHOW 16
  109. #define DP_MU_GROUP_LENGTH (6 * DP_MU_GROUP_SHOW)
  110. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  111. #define DP_MAX_INT_CONTEXTS_STRING_LENGTH (6 * WLAN_CFG_INT_NUM_CONTEXTS)
  112. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  113. #define DP_MAX_MCS_STRING_LEN 30
  114. #define DP_CURR_FW_STATS_AVAIL 19
  115. #define DP_HTT_DBG_EXT_STATS_MAX 256
  116. #define DP_MAX_SLEEP_TIME 100
  117. #ifndef QCA_WIFI_3_0_EMU
  118. #define SUSPEND_DRAIN_WAIT 500
  119. #else
  120. #define SUSPEND_DRAIN_WAIT 3000
  121. #endif
  122. #ifdef IPA_OFFLOAD
  123. /* Exclude IPA rings from the interrupt context */
  124. #define TX_RING_MASK_VAL 0xb
  125. #define RX_RING_MASK_VAL 0x7
  126. #else
  127. #define TX_RING_MASK_VAL 0xF
  128. #define RX_RING_MASK_VAL 0xF
  129. #endif
  130. #define STR_MAXLEN 64
  131. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  132. /* PPDU stats mask sent to FW to enable enhanced stats */
  133. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  134. /* PPDU stats mask sent to FW to support debug sniffer feature */
  135. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  136. /* PPDU stats mask sent to FW to support BPR feature*/
  137. #define DP_PPDU_STATS_CFG_BPR 0x2000
  138. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  139. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  140. DP_PPDU_STATS_CFG_ENH_STATS)
  141. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  142. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  143. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  144. #define RNG_ERR "SRNG setup failed for"
  145. /**
  146. * default_dscp_tid_map - Default DSCP-TID mapping
  147. *
  148. * DSCP TID
  149. * 000000 0
  150. * 001000 1
  151. * 010000 2
  152. * 011000 3
  153. * 100000 4
  154. * 101000 5
  155. * 110000 6
  156. * 111000 7
  157. */
  158. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  159. 0, 0, 0, 0, 0, 0, 0, 0,
  160. 1, 1, 1, 1, 1, 1, 1, 1,
  161. 2, 2, 2, 2, 2, 2, 2, 2,
  162. 3, 3, 3, 3, 3, 3, 3, 3,
  163. 4, 4, 4, 4, 4, 4, 4, 4,
  164. 5, 5, 5, 5, 5, 5, 5, 5,
  165. 6, 6, 6, 6, 6, 6, 6, 6,
  166. 7, 7, 7, 7, 7, 7, 7, 7,
  167. };
  168. /**
  169. * default_pcp_tid_map - Default PCP-TID mapping
  170. *
  171. * PCP TID
  172. * 000 0
  173. * 001 1
  174. * 010 2
  175. * 011 3
  176. * 100 4
  177. * 101 5
  178. * 110 6
  179. * 111 7
  180. */
  181. static uint8_t default_pcp_tid_map[PCP_TID_MAP_MAX] = {
  182. 0, 1, 2, 3, 4, 5, 6, 7,
  183. };
  184. /*
  185. * struct dp_rate_debug
  186. *
  187. * @mcs_type: print string for a given mcs
  188. * @valid: valid mcs rate?
  189. */
  190. struct dp_rate_debug {
  191. char mcs_type[DP_MAX_MCS_STRING_LEN];
  192. uint8_t valid;
  193. };
  194. #define MCS_VALID 1
  195. #define MCS_INVALID 0
  196. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  197. {
  198. {"OFDM 48 Mbps", MCS_VALID},
  199. {"OFDM 24 Mbps", MCS_VALID},
  200. {"OFDM 12 Mbps", MCS_VALID},
  201. {"OFDM 6 Mbps ", MCS_VALID},
  202. {"OFDM 54 Mbps", MCS_VALID},
  203. {"OFDM 36 Mbps", MCS_VALID},
  204. {"OFDM 18 Mbps", MCS_VALID},
  205. {"OFDM 9 Mbps ", MCS_VALID},
  206. {"INVALID ", MCS_INVALID},
  207. {"INVALID ", MCS_INVALID},
  208. {"INVALID ", MCS_INVALID},
  209. {"INVALID ", MCS_INVALID},
  210. {"INVALID ", MCS_VALID},
  211. },
  212. {
  213. {"CCK 11 Mbps Long ", MCS_VALID},
  214. {"CCK 5.5 Mbps Long ", MCS_VALID},
  215. {"CCK 2 Mbps Long ", MCS_VALID},
  216. {"CCK 1 Mbps Long ", MCS_VALID},
  217. {"CCK 11 Mbps Short ", MCS_VALID},
  218. {"CCK 5.5 Mbps Short", MCS_VALID},
  219. {"CCK 2 Mbps Short ", MCS_VALID},
  220. {"INVALID ", MCS_INVALID},
  221. {"INVALID ", MCS_INVALID},
  222. {"INVALID ", MCS_INVALID},
  223. {"INVALID ", MCS_INVALID},
  224. {"INVALID ", MCS_INVALID},
  225. {"INVALID ", MCS_VALID},
  226. },
  227. {
  228. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  229. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  230. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  231. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  232. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  233. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  234. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  235. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  236. {"INVALID ", MCS_INVALID},
  237. {"INVALID ", MCS_INVALID},
  238. {"INVALID ", MCS_INVALID},
  239. {"INVALID ", MCS_INVALID},
  240. {"INVALID ", MCS_VALID},
  241. },
  242. {
  243. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  244. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  245. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  246. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  247. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  248. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  249. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  250. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  251. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  252. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  253. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  254. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  255. {"INVALID ", MCS_VALID},
  256. },
  257. {
  258. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  259. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  260. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  261. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  262. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  263. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  264. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  265. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  266. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  267. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  268. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  269. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  270. {"INVALID ", MCS_VALID},
  271. }
  272. };
  273. /**
  274. * dp_cpu_ring_map_type - dp tx cpu ring map
  275. * @DP_NSS_DEFAULT_MAP: Default mode with no NSS offloaded
  276. * @DP_NSS_FIRST_RADIO_OFFLOADED_MAP: Only First Radio is offloaded
  277. * @DP_NSS_SECOND_RADIO_OFFLOADED_MAP: Only second radio is offloaded
  278. * @DP_NSS_DBDC_OFFLOADED_MAP: Both radios are offloaded
  279. * @DP_NSS_DBTC_OFFLOADED_MAP: All three radios are offloaded
  280. * @DP_NSS_CPU_RING_MAP_MAX: Max cpu ring map val
  281. */
  282. enum dp_cpu_ring_map_types {
  283. DP_NSS_DEFAULT_MAP,
  284. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  285. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  286. DP_NSS_DBDC_OFFLOADED_MAP,
  287. DP_NSS_DBTC_OFFLOADED_MAP,
  288. DP_NSS_CPU_RING_MAP_MAX
  289. };
  290. /**
  291. * @brief Cpu to tx ring map
  292. */
  293. #ifdef CONFIG_WIN
  294. static uint8_t
  295. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  296. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  297. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  298. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  299. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  300. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  301. };
  302. #else
  303. static uint8_t
  304. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  305. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  306. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  307. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  308. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  309. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  310. };
  311. #endif
  312. /**
  313. * @brief Select the type of statistics
  314. */
  315. enum dp_stats_type {
  316. STATS_FW = 0,
  317. STATS_HOST = 1,
  318. STATS_TYPE_MAX = 2,
  319. };
  320. /**
  321. * @brief General Firmware statistics options
  322. *
  323. */
  324. enum dp_fw_stats {
  325. TXRX_FW_STATS_INVALID = -1,
  326. };
  327. /**
  328. * dp_stats_mapping_table - Firmware and Host statistics
  329. * currently supported
  330. */
  331. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  332. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  333. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  334. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  335. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  336. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  337. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  338. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  339. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  340. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  341. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  342. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  343. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  344. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  345. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  346. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  347. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  348. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  349. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  350. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  351. /* Last ENUM for HTT FW STATS */
  352. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  353. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  354. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  355. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  356. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  357. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  358. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  359. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  360. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  361. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  362. {TXRX_FW_STATS_INVALID, TXRX_SOC_CFG_PARAMS},
  363. {TXRX_FW_STATS_INVALID, TXRX_PDEV_CFG_PARAMS},
  364. };
  365. /* MCL specific functions */
  366. #ifdef CONFIG_MCL
  367. /**
  368. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  369. * @soc: pointer to dp_soc handle
  370. * @intr_ctx_num: interrupt context number for which mon mask is needed
  371. *
  372. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  373. * This function is returning 0, since in interrupt mode(softirq based RX),
  374. * we donot want to process monitor mode rings in a softirq.
  375. *
  376. * So, in case packet log is enabled for SAP/STA/P2P modes,
  377. * regular interrupt processing will not process monitor mode rings. It would be
  378. * done in a separate timer context.
  379. *
  380. * Return: 0
  381. */
  382. static inline
  383. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  384. {
  385. return 0;
  386. }
  387. /*
  388. * dp_service_mon_rings()- timer to reap monitor rings
  389. * reqd as we are not getting ppdu end interrupts
  390. * @arg: SoC Handle
  391. *
  392. * Return:
  393. *
  394. */
  395. static void dp_service_mon_rings(void *arg)
  396. {
  397. struct dp_soc *soc = (struct dp_soc *)arg;
  398. int ring = 0, work_done, mac_id;
  399. struct dp_pdev *pdev = NULL;
  400. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  401. pdev = soc->pdev_list[ring];
  402. if (!pdev)
  403. continue;
  404. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  405. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  406. pdev->pdev_id);
  407. work_done = dp_mon_process(soc, mac_for_pdev,
  408. QCA_NAPI_BUDGET);
  409. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  410. FL("Reaped %d descs from Monitor rings"),
  411. work_done);
  412. }
  413. }
  414. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  415. }
  416. #ifndef REMOVE_PKT_LOG
  417. /**
  418. * dp_pkt_log_init() - API to initialize packet log
  419. * @ppdev: physical device handle
  420. * @scn: HIF context
  421. *
  422. * Return: none
  423. */
  424. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  425. {
  426. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  427. if (handle->pkt_log_init) {
  428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  429. "%s: Packet log not initialized", __func__);
  430. return;
  431. }
  432. pktlog_sethandle(&handle->pl_dev, scn);
  433. pktlog_set_callback_regtype(PKTLOG_DEFAULT_CALLBACK_REGISTRATION);
  434. if (pktlogmod_init(scn)) {
  435. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  436. "%s: pktlogmod_init failed", __func__);
  437. handle->pkt_log_init = false;
  438. } else {
  439. handle->pkt_log_init = true;
  440. }
  441. }
  442. /**
  443. * dp_pkt_log_con_service() - connect packet log service
  444. * @ppdev: physical device handle
  445. * @scn: device context
  446. *
  447. * Return: none
  448. */
  449. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  450. {
  451. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  452. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  453. pktlog_htc_attach();
  454. }
  455. /**
  456. * dp_get_num_rx_contexts() - get number of RX contexts
  457. * @soc_hdl: cdp opaque soc handle
  458. *
  459. * Return: number of RX contexts
  460. */
  461. static int dp_get_num_rx_contexts(struct cdp_soc_t *soc_hdl)
  462. {
  463. int i;
  464. int num_rx_contexts = 0;
  465. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  466. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  467. if (wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i))
  468. num_rx_contexts++;
  469. return num_rx_contexts;
  470. }
  471. /**
  472. * dp_pktlogmod_exit() - API to cleanup pktlog info
  473. * @handle: Pdev handle
  474. *
  475. * Return: none
  476. */
  477. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  478. {
  479. void *scn = (void *)handle->soc->hif_handle;
  480. if (!scn) {
  481. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  482. "%s: Invalid hif(scn) handle", __func__);
  483. return;
  484. }
  485. pktlogmod_exit(scn);
  486. handle->pkt_log_init = false;
  487. }
  488. #endif
  489. #else
  490. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  491. /**
  492. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  493. * @soc: pointer to dp_soc handle
  494. * @intr_ctx_num: interrupt context number for which mon mask is needed
  495. *
  496. * Return: mon mask value
  497. */
  498. static inline
  499. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  500. {
  501. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  502. }
  503. #endif
  504. /**
  505. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  506. * @cdp_opaque_vdev: pointer to cdp_vdev
  507. *
  508. * Return: pointer to dp_vdev
  509. */
  510. static
  511. struct dp_vdev *dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  512. {
  513. return (struct dp_vdev *)cdp_opaque_vdev;
  514. }
  515. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  516. struct cdp_peer *peer_hdl,
  517. uint8_t *mac_addr,
  518. enum cdp_txrx_ast_entry_type type,
  519. uint32_t flags)
  520. {
  521. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  522. (struct dp_peer *)peer_hdl,
  523. mac_addr,
  524. type,
  525. flags);
  526. }
  527. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  528. struct cdp_peer *peer_hdl,
  529. uint8_t *wds_macaddr,
  530. uint32_t flags)
  531. {
  532. int status = -1;
  533. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  534. struct dp_ast_entry *ast_entry = NULL;
  535. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  536. qdf_spin_lock_bh(&soc->ast_lock);
  537. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  538. peer->vdev->pdev->pdev_id);
  539. if (ast_entry) {
  540. status = dp_peer_update_ast(soc,
  541. peer,
  542. ast_entry, flags);
  543. }
  544. qdf_spin_unlock_bh(&soc->ast_lock);
  545. return status;
  546. }
  547. /*
  548. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  549. * @soc_handle: Datapath SOC handle
  550. * @wds_macaddr: WDS entry MAC Address
  551. * Return: None
  552. */
  553. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  554. uint8_t *wds_macaddr,
  555. uint8_t *peer_mac_addr,
  556. void *vdev_handle)
  557. {
  558. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  559. struct dp_ast_entry *ast_entry = NULL;
  560. struct dp_ast_entry *tmp_ast_entry;
  561. struct dp_peer *peer;
  562. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  563. struct dp_pdev *pdev;
  564. if (!vdev)
  565. return;
  566. pdev = vdev->pdev;
  567. if (peer_mac_addr) {
  568. peer = dp_peer_find_hash_find(soc, peer_mac_addr,
  569. 0, vdev->vdev_id);
  570. if (!peer)
  571. return;
  572. qdf_spin_lock_bh(&soc->ast_lock);
  573. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, tmp_ast_entry) {
  574. if ((ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  575. (ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  576. dp_peer_del_ast(soc, ast_entry);
  577. }
  578. qdf_spin_unlock_bh(&soc->ast_lock);
  579. dp_peer_unref_delete(peer);
  580. } else if (wds_macaddr) {
  581. qdf_spin_lock_bh(&soc->ast_lock);
  582. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  583. pdev->pdev_id);
  584. if (ast_entry) {
  585. if ((ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  586. (ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  587. dp_peer_del_ast(soc, ast_entry);
  588. }
  589. qdf_spin_unlock_bh(&soc->ast_lock);
  590. }
  591. }
  592. /*
  593. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  594. * @soc: Datapath SOC handle
  595. *
  596. * Return: None
  597. */
  598. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  599. void *vdev_hdl)
  600. {
  601. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  602. struct dp_pdev *pdev;
  603. struct dp_vdev *vdev;
  604. struct dp_peer *peer;
  605. struct dp_ast_entry *ase, *temp_ase;
  606. int i;
  607. qdf_spin_lock_bh(&soc->ast_lock);
  608. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  609. pdev = soc->pdev_list[i];
  610. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  611. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  612. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  613. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  614. if ((ase->type ==
  615. CDP_TXRX_AST_TYPE_WDS_HM) ||
  616. (ase->type ==
  617. CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  618. dp_peer_del_ast(soc, ase);
  619. }
  620. }
  621. }
  622. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  623. }
  624. qdf_spin_unlock_bh(&soc->ast_lock);
  625. }
  626. /*
  627. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  628. * @soc: Datapath SOC handle
  629. *
  630. * Return: None
  631. */
  632. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  633. {
  634. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  635. struct dp_pdev *pdev;
  636. struct dp_vdev *vdev;
  637. struct dp_peer *peer;
  638. struct dp_ast_entry *ase, *temp_ase;
  639. int i;
  640. qdf_spin_lock_bh(&soc->ast_lock);
  641. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  642. pdev = soc->pdev_list[i];
  643. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  644. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  645. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  646. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  647. if ((ase->type ==
  648. CDP_TXRX_AST_TYPE_STATIC) ||
  649. (ase->type ==
  650. CDP_TXRX_AST_TYPE_SELF) ||
  651. (ase->type ==
  652. CDP_TXRX_AST_TYPE_STA_BSS))
  653. continue;
  654. dp_peer_del_ast(soc, ase);
  655. }
  656. }
  657. }
  658. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  659. }
  660. qdf_spin_unlock_bh(&soc->ast_lock);
  661. }
  662. /**
  663. * dp_peer_get_ast_info_by_soc_wifi3() - search the soc AST hash table
  664. * and return ast entry information
  665. * of first ast entry found in the
  666. * table with given mac address
  667. *
  668. * @soc : data path soc handle
  669. * @ast_mac_addr : AST entry mac address
  670. * @ast_entry_info : ast entry information
  671. *
  672. * return : true if ast entry found with ast_mac_addr
  673. * false if ast entry not found
  674. */
  675. static bool dp_peer_get_ast_info_by_soc_wifi3
  676. (struct cdp_soc_t *soc_hdl,
  677. uint8_t *ast_mac_addr,
  678. struct cdp_ast_entry_info *ast_entry_info)
  679. {
  680. struct dp_ast_entry *ast_entry;
  681. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  682. qdf_spin_lock_bh(&soc->ast_lock);
  683. ast_entry = dp_peer_ast_hash_find_soc(soc, ast_mac_addr);
  684. if (!ast_entry || !ast_entry->peer) {
  685. qdf_spin_unlock_bh(&soc->ast_lock);
  686. return false;
  687. }
  688. if (ast_entry->delete_in_progress && !ast_entry->callback) {
  689. qdf_spin_unlock_bh(&soc->ast_lock);
  690. return false;
  691. }
  692. ast_entry_info->type = ast_entry->type;
  693. ast_entry_info->pdev_id = ast_entry->pdev_id;
  694. ast_entry_info->vdev_id = ast_entry->vdev_id;
  695. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  696. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  697. &ast_entry->peer->mac_addr.raw[0],
  698. QDF_MAC_ADDR_SIZE);
  699. qdf_spin_unlock_bh(&soc->ast_lock);
  700. return true;
  701. }
  702. /**
  703. * dp_peer_get_ast_info_by_pdevid_wifi3() - search the soc AST hash table
  704. * and return ast entry information
  705. * if mac address and pdev_id matches
  706. *
  707. * @soc : data path soc handle
  708. * @ast_mac_addr : AST entry mac address
  709. * @pdev_id : pdev_id
  710. * @ast_entry_info : ast entry information
  711. *
  712. * return : true if ast entry found with ast_mac_addr
  713. * false if ast entry not found
  714. */
  715. static bool dp_peer_get_ast_info_by_pdevid_wifi3
  716. (struct cdp_soc_t *soc_hdl,
  717. uint8_t *ast_mac_addr,
  718. uint8_t pdev_id,
  719. struct cdp_ast_entry_info *ast_entry_info)
  720. {
  721. struct dp_ast_entry *ast_entry;
  722. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  723. qdf_spin_lock_bh(&soc->ast_lock);
  724. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, ast_mac_addr, pdev_id);
  725. if (!ast_entry || !ast_entry->peer) {
  726. qdf_spin_unlock_bh(&soc->ast_lock);
  727. return false;
  728. }
  729. if (ast_entry->delete_in_progress && !ast_entry->callback) {
  730. qdf_spin_unlock_bh(&soc->ast_lock);
  731. return false;
  732. }
  733. ast_entry_info->type = ast_entry->type;
  734. ast_entry_info->pdev_id = ast_entry->pdev_id;
  735. ast_entry_info->vdev_id = ast_entry->vdev_id;
  736. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  737. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  738. &ast_entry->peer->mac_addr.raw[0],
  739. QDF_MAC_ADDR_SIZE);
  740. qdf_spin_unlock_bh(&soc->ast_lock);
  741. return true;
  742. }
  743. /**
  744. * dp_peer_ast_entry_del_by_soc() - delete the ast entry from soc AST hash table
  745. * with given mac address
  746. *
  747. * @soc : data path soc handle
  748. * @ast_mac_addr : AST entry mac address
  749. * @callback : callback function to called on ast delete response from FW
  750. * @cookie : argument to be passed to callback
  751. *
  752. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  753. * is sent
  754. * QDF_STATUS_E_INVAL false if ast entry not found
  755. */
  756. static QDF_STATUS dp_peer_ast_entry_del_by_soc(struct cdp_soc_t *soc_handle,
  757. uint8_t *mac_addr,
  758. txrx_ast_free_cb callback,
  759. void *cookie)
  760. {
  761. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  762. struct dp_ast_entry *ast_entry;
  763. txrx_ast_free_cb cb = NULL;
  764. void *arg = NULL;
  765. qdf_spin_lock_bh(&soc->ast_lock);
  766. ast_entry = dp_peer_ast_hash_find_soc(soc, mac_addr);
  767. if (!ast_entry) {
  768. qdf_spin_unlock_bh(&soc->ast_lock);
  769. return -QDF_STATUS_E_INVAL;
  770. }
  771. if (ast_entry->callback) {
  772. cb = ast_entry->callback;
  773. arg = ast_entry->cookie;
  774. }
  775. ast_entry->callback = callback;
  776. ast_entry->cookie = cookie;
  777. /*
  778. * if delete_in_progress is set AST delete is sent to target
  779. * and host is waiting for response should not send delete
  780. * again
  781. */
  782. if (!ast_entry->delete_in_progress)
  783. dp_peer_del_ast(soc, ast_entry);
  784. qdf_spin_unlock_bh(&soc->ast_lock);
  785. if (cb) {
  786. cb(soc->ctrl_psoc,
  787. soc,
  788. arg,
  789. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  790. }
  791. return QDF_STATUS_SUCCESS;
  792. }
  793. /**
  794. * dp_peer_ast_entry_del_by_pdev() - delete the ast entry from soc AST hash
  795. * table if mac address and pdev_id matches
  796. *
  797. * @soc : data path soc handle
  798. * @ast_mac_addr : AST entry mac address
  799. * @pdev_id : pdev id
  800. * @callback : callback function to called on ast delete response from FW
  801. * @cookie : argument to be passed to callback
  802. *
  803. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  804. * is sent
  805. * QDF_STATUS_E_INVAL false if ast entry not found
  806. */
  807. static QDF_STATUS dp_peer_ast_entry_del_by_pdev(struct cdp_soc_t *soc_handle,
  808. uint8_t *mac_addr,
  809. uint8_t pdev_id,
  810. txrx_ast_free_cb callback,
  811. void *cookie)
  812. {
  813. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  814. struct dp_ast_entry *ast_entry;
  815. txrx_ast_free_cb cb = NULL;
  816. void *arg = NULL;
  817. qdf_spin_lock_bh(&soc->ast_lock);
  818. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, mac_addr, pdev_id);
  819. if (!ast_entry) {
  820. qdf_spin_unlock_bh(&soc->ast_lock);
  821. return -QDF_STATUS_E_INVAL;
  822. }
  823. if (ast_entry->callback) {
  824. cb = ast_entry->callback;
  825. arg = ast_entry->cookie;
  826. }
  827. ast_entry->callback = callback;
  828. ast_entry->cookie = cookie;
  829. /*
  830. * if delete_in_progress is set AST delete is sent to target
  831. * and host is waiting for response should not sent delete
  832. * again
  833. */
  834. if (!ast_entry->delete_in_progress)
  835. dp_peer_del_ast(soc, ast_entry);
  836. qdf_spin_unlock_bh(&soc->ast_lock);
  837. if (cb) {
  838. cb(soc->ctrl_psoc,
  839. soc,
  840. arg,
  841. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  842. }
  843. return QDF_STATUS_SUCCESS;
  844. }
  845. /**
  846. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  847. * @ring_num: ring num of the ring being queried
  848. * @grp_mask: the grp_mask array for the ring type in question.
  849. *
  850. * The grp_mask array is indexed by group number and the bit fields correspond
  851. * to ring numbers. We are finding which interrupt group a ring belongs to.
  852. *
  853. * Return: the index in the grp_mask array with the ring number.
  854. * -QDF_STATUS_E_NOENT if no entry is found
  855. */
  856. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  857. {
  858. int ext_group_num;
  859. int mask = 1 << ring_num;
  860. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  861. ext_group_num++) {
  862. if (mask & grp_mask[ext_group_num])
  863. return ext_group_num;
  864. }
  865. return -QDF_STATUS_E_NOENT;
  866. }
  867. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  868. enum hal_ring_type ring_type,
  869. int ring_num)
  870. {
  871. int *grp_mask;
  872. switch (ring_type) {
  873. case WBM2SW_RELEASE:
  874. /* dp_tx_comp_handler - soc->tx_comp_ring */
  875. if (ring_num < 3)
  876. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  877. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  878. else if (ring_num == 3) {
  879. /* sw treats this as a separate ring type */
  880. grp_mask = &soc->wlan_cfg_ctx->
  881. int_rx_wbm_rel_ring_mask[0];
  882. ring_num = 0;
  883. } else {
  884. qdf_assert(0);
  885. return -QDF_STATUS_E_NOENT;
  886. }
  887. break;
  888. case REO_EXCEPTION:
  889. /* dp_rx_err_process - &soc->reo_exception_ring */
  890. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  891. break;
  892. case REO_DST:
  893. /* dp_rx_process - soc->reo_dest_ring */
  894. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  895. break;
  896. case REO_STATUS:
  897. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  898. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  899. break;
  900. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  901. case RXDMA_MONITOR_STATUS:
  902. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  903. case RXDMA_MONITOR_DST:
  904. /* dp_mon_process */
  905. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  906. break;
  907. case RXDMA_DST:
  908. /* dp_rxdma_err_process */
  909. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  910. break;
  911. case RXDMA_BUF:
  912. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  913. break;
  914. case RXDMA_MONITOR_BUF:
  915. /* TODO: support low_thresh interrupt */
  916. return -QDF_STATUS_E_NOENT;
  917. break;
  918. case TCL_DATA:
  919. case TCL_CMD:
  920. case REO_CMD:
  921. case SW2WBM_RELEASE:
  922. case WBM_IDLE_LINK:
  923. /* normally empty SW_TO_HW rings */
  924. return -QDF_STATUS_E_NOENT;
  925. break;
  926. case TCL_STATUS:
  927. case REO_REINJECT:
  928. /* misc unused rings */
  929. return -QDF_STATUS_E_NOENT;
  930. break;
  931. case CE_SRC:
  932. case CE_DST:
  933. case CE_DST_STATUS:
  934. /* CE_rings - currently handled by hif */
  935. default:
  936. return -QDF_STATUS_E_NOENT;
  937. break;
  938. }
  939. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  940. }
  941. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  942. *ring_params, int ring_type, int ring_num)
  943. {
  944. int msi_group_number;
  945. int msi_data_count;
  946. int ret;
  947. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  948. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  949. &msi_data_count, &msi_data_start,
  950. &msi_irq_start);
  951. if (ret)
  952. return;
  953. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  954. ring_num);
  955. if (msi_group_number < 0) {
  956. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  957. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  958. ring_type, ring_num);
  959. ring_params->msi_addr = 0;
  960. ring_params->msi_data = 0;
  961. return;
  962. }
  963. if (msi_group_number > msi_data_count) {
  964. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  965. FL("2 msi_groups will share an msi; msi_group_num %d"),
  966. msi_group_number);
  967. QDF_ASSERT(0);
  968. }
  969. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  970. ring_params->msi_addr = addr_low;
  971. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  972. ring_params->msi_data = (msi_group_number % msi_data_count)
  973. + msi_data_start;
  974. ring_params->flags |= HAL_SRNG_MSI_INTR;
  975. }
  976. /**
  977. * dp_print_ast_stats() - Dump AST table contents
  978. * @soc: Datapath soc handle
  979. *
  980. * return void
  981. */
  982. #ifdef FEATURE_AST
  983. void dp_print_ast_stats(struct dp_soc *soc)
  984. {
  985. uint8_t i;
  986. uint8_t num_entries = 0;
  987. struct dp_vdev *vdev;
  988. struct dp_pdev *pdev;
  989. struct dp_peer *peer;
  990. struct dp_ast_entry *ase, *tmp_ase;
  991. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  992. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS", "BSS",
  993. "DA", "HMWDS_SEC"};
  994. DP_PRINT_STATS("AST Stats:");
  995. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  996. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  997. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  998. DP_PRINT_STATS("AST Table:");
  999. qdf_spin_lock_bh(&soc->ast_lock);
  1000. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1001. pdev = soc->pdev_list[i];
  1002. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1003. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1004. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1005. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  1006. DP_PRINT_STATS("%6d mac_addr = %pM"
  1007. " peer_mac_addr = %pM"
  1008. " peer_id = %u"
  1009. " type = %s"
  1010. " next_hop = %d"
  1011. " is_active = %d"
  1012. " is_bss = %d"
  1013. " ast_idx = %d"
  1014. " ast_hash = %d"
  1015. " delete_in_progress = %d"
  1016. " pdev_id = %d"
  1017. " vdev_id = %d",
  1018. ++num_entries,
  1019. ase->mac_addr.raw,
  1020. ase->peer->mac_addr.raw,
  1021. ase->peer->peer_ids[0],
  1022. type[ase->type],
  1023. ase->next_hop,
  1024. ase->is_active,
  1025. ase->is_bss,
  1026. ase->ast_idx,
  1027. ase->ast_hash_value,
  1028. ase->delete_in_progress,
  1029. ase->pdev_id,
  1030. ase->vdev_id);
  1031. }
  1032. }
  1033. }
  1034. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1035. }
  1036. qdf_spin_unlock_bh(&soc->ast_lock);
  1037. }
  1038. #else
  1039. void dp_print_ast_stats(struct dp_soc *soc)
  1040. {
  1041. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  1042. return;
  1043. }
  1044. #endif
  1045. /**
  1046. * dp_print_peer_table() - Dump all Peer stats
  1047. * @vdev: Datapath Vdev handle
  1048. *
  1049. * return void
  1050. */
  1051. static void dp_print_peer_table(struct dp_vdev *vdev)
  1052. {
  1053. struct dp_peer *peer = NULL;
  1054. DP_PRINT_STATS("Dumping Peer Table Stats:");
  1055. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1056. if (!peer) {
  1057. DP_PRINT_STATS("Invalid Peer");
  1058. return;
  1059. }
  1060. DP_PRINT_STATS(" peer_mac_addr = %pM"
  1061. " nawds_enabled = %d"
  1062. " bss_peer = %d"
  1063. " wapi = %d"
  1064. " wds_enabled = %d"
  1065. " delete in progress = %d"
  1066. " peer id = %d",
  1067. peer->mac_addr.raw,
  1068. peer->nawds_enabled,
  1069. peer->bss_peer,
  1070. peer->wapi,
  1071. peer->wds_enabled,
  1072. peer->delete_in_progress,
  1073. peer->peer_ids[0]);
  1074. }
  1075. }
  1076. /*
  1077. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  1078. */
  1079. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  1080. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  1081. {
  1082. void *hal_soc = soc->hal_soc;
  1083. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  1084. /* TODO: See if we should get align size from hal */
  1085. uint32_t ring_base_align = 8;
  1086. struct hal_srng_params ring_params;
  1087. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  1088. /* TODO: Currently hal layer takes care of endianness related settings.
  1089. * See if these settings need to passed from DP layer
  1090. */
  1091. ring_params.flags = 0;
  1092. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  1093. srng->hal_srng = NULL;
  1094. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  1095. srng->num_entries = num_entries;
  1096. if (!dp_is_soc_reinit(soc)) {
  1097. srng->base_vaddr_unaligned =
  1098. qdf_mem_alloc_consistent(soc->osdev,
  1099. soc->osdev->dev,
  1100. srng->alloc_size,
  1101. &srng->base_paddr_unaligned);
  1102. }
  1103. if (!srng->base_vaddr_unaligned) {
  1104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1105. FL("alloc failed - ring_type: %d, ring_num %d"),
  1106. ring_type, ring_num);
  1107. return QDF_STATUS_E_NOMEM;
  1108. }
  1109. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  1110. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  1111. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  1112. ((unsigned long)(ring_params.ring_base_vaddr) -
  1113. (unsigned long)srng->base_vaddr_unaligned);
  1114. ring_params.num_entries = num_entries;
  1115. dp_verbose_debug("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  1116. ring_type, ring_num,
  1117. (void *)ring_params.ring_base_vaddr,
  1118. (void *)ring_params.ring_base_paddr,
  1119. ring_params.num_entries);
  1120. if (soc->intr_mode == DP_INTR_MSI) {
  1121. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  1122. dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d",
  1123. ring_type, ring_num);
  1124. } else {
  1125. ring_params.msi_data = 0;
  1126. ring_params.msi_addr = 0;
  1127. dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d",
  1128. ring_type, ring_num);
  1129. }
  1130. /*
  1131. * Setup interrupt timer and batch counter thresholds for
  1132. * interrupt mitigation based on ring type
  1133. */
  1134. if (ring_type == REO_DST) {
  1135. ring_params.intr_timer_thres_us =
  1136. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1137. ring_params.intr_batch_cntr_thres_entries =
  1138. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  1139. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  1140. ring_params.intr_timer_thres_us =
  1141. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  1142. ring_params.intr_batch_cntr_thres_entries =
  1143. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  1144. } else {
  1145. ring_params.intr_timer_thres_us =
  1146. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  1147. ring_params.intr_batch_cntr_thres_entries =
  1148. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  1149. }
  1150. /* Enable low threshold interrupts for rx buffer rings (regular and
  1151. * monitor buffer rings.
  1152. * TODO: See if this is required for any other ring
  1153. */
  1154. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  1155. (ring_type == RXDMA_MONITOR_STATUS)) {
  1156. /* TODO: Setting low threshold to 1/8th of ring size
  1157. * see if this needs to be configurable
  1158. */
  1159. ring_params.low_threshold = num_entries >> 3;
  1160. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  1161. ring_params.intr_timer_thres_us =
  1162. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1163. ring_params.intr_batch_cntr_thres_entries = 0;
  1164. }
  1165. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  1166. mac_id, &ring_params);
  1167. if (!srng->hal_srng) {
  1168. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1169. srng->alloc_size,
  1170. srng->base_vaddr_unaligned,
  1171. srng->base_paddr_unaligned, 0);
  1172. }
  1173. return 0;
  1174. }
  1175. /*
  1176. * dp_srng_deinit() - Internal function to deinit SRNG rings used by data path
  1177. * @soc: DP SOC handle
  1178. * @srng: source ring structure
  1179. * @ring_type: type of ring
  1180. * @ring_num: ring number
  1181. *
  1182. * Return: None
  1183. */
  1184. static void dp_srng_deinit(struct dp_soc *soc, struct dp_srng *srng,
  1185. int ring_type, int ring_num)
  1186. {
  1187. if (!srng->hal_srng) {
  1188. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1189. FL("Ring type: %d, num:%d not setup"),
  1190. ring_type, ring_num);
  1191. return;
  1192. }
  1193. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1194. srng->hal_srng = NULL;
  1195. }
  1196. /**
  1197. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  1198. * Any buffers allocated and attached to ring entries are expected to be freed
  1199. * before calling this function.
  1200. */
  1201. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  1202. int ring_type, int ring_num)
  1203. {
  1204. if (!dp_is_soc_reinit(soc)) {
  1205. if (!srng->hal_srng && (srng->alloc_size == 0)) {
  1206. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1207. FL("Ring type: %d, num:%d not setup"),
  1208. ring_type, ring_num);
  1209. return;
  1210. }
  1211. if (srng->hal_srng) {
  1212. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1213. srng->hal_srng = NULL;
  1214. }
  1215. }
  1216. if (srng->alloc_size) {
  1217. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1218. srng->alloc_size,
  1219. srng->base_vaddr_unaligned,
  1220. srng->base_paddr_unaligned, 0);
  1221. srng->alloc_size = 0;
  1222. }
  1223. }
  1224. /* TODO: Need this interface from HIF */
  1225. void *hif_get_hal_handle(void *hif_handle);
  1226. /*
  1227. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  1228. * @dp_ctx: DP SOC handle
  1229. * @budget: Number of frames/descriptors that can be processed in one shot
  1230. *
  1231. * Return: remaining budget/quota for the soc device
  1232. */
  1233. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  1234. {
  1235. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1236. struct dp_soc *soc = int_ctx->soc;
  1237. int ring = 0;
  1238. uint32_t work_done = 0;
  1239. int budget = dp_budget;
  1240. uint8_t tx_mask = int_ctx->tx_ring_mask;
  1241. uint8_t rx_mask = int_ctx->rx_ring_mask;
  1242. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  1243. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  1244. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  1245. uint32_t remaining_quota = dp_budget;
  1246. struct dp_pdev *pdev = NULL;
  1247. int mac_id;
  1248. /* Process Tx completion interrupts first to return back buffers */
  1249. while (tx_mask) {
  1250. if (tx_mask & 0x1) {
  1251. work_done = dp_tx_comp_handler(soc,
  1252. soc->tx_comp_ring[ring].hal_srng,
  1253. remaining_quota);
  1254. dp_verbose_debug("tx mask 0x%x ring %d, budget %d, work_done %d",
  1255. tx_mask, ring, budget, work_done);
  1256. budget -= work_done;
  1257. if (budget <= 0)
  1258. goto budget_done;
  1259. remaining_quota = budget;
  1260. }
  1261. tx_mask = tx_mask >> 1;
  1262. ring++;
  1263. }
  1264. /* Process REO Exception ring interrupt */
  1265. if (rx_err_mask) {
  1266. work_done = dp_rx_err_process(soc,
  1267. soc->reo_exception_ring.hal_srng,
  1268. remaining_quota);
  1269. dp_verbose_debug("REO Exception Ring: work_done %d budget %d",
  1270. work_done, budget);
  1271. budget -= work_done;
  1272. if (budget <= 0) {
  1273. goto budget_done;
  1274. }
  1275. remaining_quota = budget;
  1276. }
  1277. /* Process Rx WBM release ring interrupt */
  1278. if (rx_wbm_rel_mask) {
  1279. work_done = dp_rx_wbm_err_process(soc,
  1280. soc->rx_rel_ring.hal_srng, remaining_quota);
  1281. dp_verbose_debug("WBM Release Ring: work_done %d budget %d",
  1282. work_done, budget);
  1283. budget -= work_done;
  1284. if (budget <= 0) {
  1285. goto budget_done;
  1286. }
  1287. remaining_quota = budget;
  1288. }
  1289. /* Process Rx interrupts */
  1290. if (rx_mask) {
  1291. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1292. if (rx_mask & (1 << ring)) {
  1293. work_done = dp_rx_process(int_ctx,
  1294. soc->reo_dest_ring[ring].hal_srng,
  1295. ring,
  1296. remaining_quota);
  1297. dp_verbose_debug("rx mask 0x%x ring %d, work_done %d budget %d",
  1298. rx_mask, ring,
  1299. work_done, budget);
  1300. budget -= work_done;
  1301. if (budget <= 0)
  1302. goto budget_done;
  1303. remaining_quota = budget;
  1304. }
  1305. }
  1306. }
  1307. if (reo_status_mask)
  1308. dp_reo_status_ring_handler(soc);
  1309. /* Process LMAC interrupts */
  1310. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1311. pdev = soc->pdev_list[ring];
  1312. if (!pdev)
  1313. continue;
  1314. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1315. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1316. pdev->pdev_id);
  1317. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1318. work_done = dp_mon_process(soc, mac_for_pdev,
  1319. remaining_quota);
  1320. budget -= work_done;
  1321. if (budget <= 0)
  1322. goto budget_done;
  1323. remaining_quota = budget;
  1324. }
  1325. if (int_ctx->rxdma2host_ring_mask &
  1326. (1 << mac_for_pdev)) {
  1327. work_done = dp_rxdma_err_process(soc,
  1328. mac_for_pdev,
  1329. remaining_quota);
  1330. budget -= work_done;
  1331. if (budget <= 0)
  1332. goto budget_done;
  1333. remaining_quota = budget;
  1334. }
  1335. if (int_ctx->host2rxdma_ring_mask &
  1336. (1 << mac_for_pdev)) {
  1337. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1338. union dp_rx_desc_list_elem_t *tail = NULL;
  1339. struct dp_srng *rx_refill_buf_ring =
  1340. &pdev->rx_refill_buf_ring;
  1341. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1342. 1);
  1343. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1344. rx_refill_buf_ring,
  1345. &soc->rx_desc_buf[mac_for_pdev], 0,
  1346. &desc_list, &tail);
  1347. }
  1348. }
  1349. }
  1350. qdf_lro_flush(int_ctx->lro_ctx);
  1351. budget_done:
  1352. return dp_budget - budget;
  1353. }
  1354. /* dp_interrupt_timer()- timer poll for interrupts
  1355. *
  1356. * @arg: SoC Handle
  1357. *
  1358. * Return:
  1359. *
  1360. */
  1361. static void dp_interrupt_timer(void *arg)
  1362. {
  1363. struct dp_soc *soc = (struct dp_soc *) arg;
  1364. int i;
  1365. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1366. for (i = 0;
  1367. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1368. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1369. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1370. }
  1371. }
  1372. /*
  1373. * dp_soc_attach_poll() - Register handlers for DP interrupts
  1374. * @txrx_soc: DP SOC handle
  1375. *
  1376. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1377. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1378. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1379. *
  1380. * Return: 0 for success, nonzero for failure.
  1381. */
  1382. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1383. {
  1384. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1385. int i;
  1386. soc->intr_mode = DP_INTR_POLL;
  1387. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1388. soc->intr_ctx[i].dp_intr_id = i;
  1389. soc->intr_ctx[i].tx_ring_mask =
  1390. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1391. soc->intr_ctx[i].rx_ring_mask =
  1392. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1393. soc->intr_ctx[i].rx_mon_ring_mask =
  1394. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1395. soc->intr_ctx[i].rx_err_ring_mask =
  1396. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1397. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1398. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1399. soc->intr_ctx[i].reo_status_ring_mask =
  1400. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1401. soc->intr_ctx[i].rxdma2host_ring_mask =
  1402. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1403. soc->intr_ctx[i].soc = soc;
  1404. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1405. }
  1406. qdf_timer_init(soc->osdev, &soc->int_timer,
  1407. dp_interrupt_timer, (void *)soc,
  1408. QDF_TIMER_TYPE_WAKE_APPS);
  1409. return QDF_STATUS_SUCCESS;
  1410. }
  1411. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1412. #if defined(CONFIG_MCL)
  1413. /*
  1414. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1415. * @txrx_soc: DP SOC handle
  1416. *
  1417. * Call the appropriate attach function based on the mode of operation.
  1418. * This is a WAR for enabling monitor mode.
  1419. *
  1420. * Return: 0 for success. nonzero for failure.
  1421. */
  1422. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1423. {
  1424. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1425. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1426. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1427. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1428. "%s: Poll mode", __func__);
  1429. return dp_soc_attach_poll(txrx_soc);
  1430. } else {
  1431. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1432. "%s: Interrupt mode", __func__);
  1433. return dp_soc_interrupt_attach(txrx_soc);
  1434. }
  1435. }
  1436. #else
  1437. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1438. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1439. {
  1440. return dp_soc_attach_poll(txrx_soc);
  1441. }
  1442. #else
  1443. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1444. {
  1445. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1446. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1447. return dp_soc_attach_poll(txrx_soc);
  1448. else
  1449. return dp_soc_interrupt_attach(txrx_soc);
  1450. }
  1451. #endif
  1452. #endif
  1453. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1454. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1455. {
  1456. int j;
  1457. int num_irq = 0;
  1458. int tx_mask =
  1459. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1460. int rx_mask =
  1461. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1462. int rx_mon_mask =
  1463. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1464. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1465. soc->wlan_cfg_ctx, intr_ctx_num);
  1466. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1467. soc->wlan_cfg_ctx, intr_ctx_num);
  1468. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1469. soc->wlan_cfg_ctx, intr_ctx_num);
  1470. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1471. soc->wlan_cfg_ctx, intr_ctx_num);
  1472. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1473. soc->wlan_cfg_ctx, intr_ctx_num);
  1474. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1475. soc->wlan_cfg_ctx, intr_ctx_num);
  1476. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1477. if (tx_mask & (1 << j)) {
  1478. irq_id_map[num_irq++] =
  1479. (wbm2host_tx_completions_ring1 - j);
  1480. }
  1481. if (rx_mask & (1 << j)) {
  1482. irq_id_map[num_irq++] =
  1483. (reo2host_destination_ring1 - j);
  1484. }
  1485. if (rxdma2host_ring_mask & (1 << j)) {
  1486. irq_id_map[num_irq++] =
  1487. rxdma2host_destination_ring_mac1 -
  1488. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1489. }
  1490. if (host2rxdma_ring_mask & (1 << j)) {
  1491. irq_id_map[num_irq++] =
  1492. host2rxdma_host_buf_ring_mac1 -
  1493. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1494. }
  1495. if (host2rxdma_mon_ring_mask & (1 << j)) {
  1496. irq_id_map[num_irq++] =
  1497. host2rxdma_monitor_ring1 -
  1498. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1499. }
  1500. if (rx_mon_mask & (1 << j)) {
  1501. irq_id_map[num_irq++] =
  1502. ppdu_end_interrupts_mac1 -
  1503. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1504. irq_id_map[num_irq++] =
  1505. rxdma2host_monitor_status_ring_mac1 -
  1506. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1507. }
  1508. if (rx_wbm_rel_ring_mask & (1 << j))
  1509. irq_id_map[num_irq++] = wbm2host_rx_release;
  1510. if (rx_err_ring_mask & (1 << j))
  1511. irq_id_map[num_irq++] = reo2host_exception;
  1512. if (reo_status_ring_mask & (1 << j))
  1513. irq_id_map[num_irq++] = reo2host_status;
  1514. }
  1515. *num_irq_r = num_irq;
  1516. }
  1517. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1518. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1519. int msi_vector_count, int msi_vector_start)
  1520. {
  1521. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1522. soc->wlan_cfg_ctx, intr_ctx_num);
  1523. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1524. soc->wlan_cfg_ctx, intr_ctx_num);
  1525. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1526. soc->wlan_cfg_ctx, intr_ctx_num);
  1527. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1528. soc->wlan_cfg_ctx, intr_ctx_num);
  1529. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1530. soc->wlan_cfg_ctx, intr_ctx_num);
  1531. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1532. soc->wlan_cfg_ctx, intr_ctx_num);
  1533. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1534. soc->wlan_cfg_ctx, intr_ctx_num);
  1535. unsigned int vector =
  1536. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1537. int num_irq = 0;
  1538. soc->intr_mode = DP_INTR_MSI;
  1539. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1540. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1541. irq_id_map[num_irq++] =
  1542. pld_get_msi_irq(soc->osdev->dev, vector);
  1543. *num_irq_r = num_irq;
  1544. }
  1545. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1546. int *irq_id_map, int *num_irq)
  1547. {
  1548. int msi_vector_count, ret;
  1549. uint32_t msi_base_data, msi_vector_start;
  1550. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1551. &msi_vector_count,
  1552. &msi_base_data,
  1553. &msi_vector_start);
  1554. if (ret)
  1555. return dp_soc_interrupt_map_calculate_integrated(soc,
  1556. intr_ctx_num, irq_id_map, num_irq);
  1557. else
  1558. dp_soc_interrupt_map_calculate_msi(soc,
  1559. intr_ctx_num, irq_id_map, num_irq,
  1560. msi_vector_count, msi_vector_start);
  1561. }
  1562. /*
  1563. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1564. * @txrx_soc: DP SOC handle
  1565. *
  1566. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1567. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1568. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1569. *
  1570. * Return: 0 for success. nonzero for failure.
  1571. */
  1572. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1573. {
  1574. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1575. int i = 0;
  1576. int num_irq = 0;
  1577. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1578. int ret = 0;
  1579. /* Map of IRQ ids registered with one interrupt context */
  1580. int irq_id_map[HIF_MAX_GRP_IRQ];
  1581. int tx_mask =
  1582. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1583. int rx_mask =
  1584. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1585. int rx_mon_mask =
  1586. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1587. int rx_err_ring_mask =
  1588. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1589. int rx_wbm_rel_ring_mask =
  1590. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1591. int reo_status_ring_mask =
  1592. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1593. int rxdma2host_ring_mask =
  1594. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1595. int host2rxdma_ring_mask =
  1596. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1597. int host2rxdma_mon_ring_mask =
  1598. wlan_cfg_get_host2rxdma_mon_ring_mask(
  1599. soc->wlan_cfg_ctx, i);
  1600. soc->intr_ctx[i].dp_intr_id = i;
  1601. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1602. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1603. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1604. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1605. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1606. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1607. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1608. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1609. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  1610. host2rxdma_mon_ring_mask;
  1611. soc->intr_ctx[i].soc = soc;
  1612. num_irq = 0;
  1613. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1614. &num_irq);
  1615. ret = hif_register_ext_group(soc->hif_handle,
  1616. num_irq, irq_id_map, dp_service_srngs,
  1617. &soc->intr_ctx[i], "dp_intr",
  1618. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1619. if (ret) {
  1620. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1621. FL("failed, ret = %d"), ret);
  1622. return QDF_STATUS_E_FAILURE;
  1623. }
  1624. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1625. }
  1626. hif_configure_ext_group_interrupts(soc->hif_handle);
  1627. return QDF_STATUS_SUCCESS;
  1628. }
  1629. /*
  1630. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1631. * @txrx_soc: DP SOC handle
  1632. *
  1633. * Return: void
  1634. */
  1635. static void dp_soc_interrupt_detach(void *txrx_soc)
  1636. {
  1637. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1638. int i;
  1639. if (soc->intr_mode == DP_INTR_POLL) {
  1640. qdf_timer_stop(&soc->int_timer);
  1641. qdf_timer_free(&soc->int_timer);
  1642. } else {
  1643. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1644. }
  1645. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1646. soc->intr_ctx[i].tx_ring_mask = 0;
  1647. soc->intr_ctx[i].rx_ring_mask = 0;
  1648. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1649. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1650. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1651. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1652. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1653. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1654. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  1655. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1656. }
  1657. }
  1658. #define AVG_MAX_MPDUS_PER_TID 128
  1659. #define AVG_TIDS_PER_CLIENT 2
  1660. #define AVG_FLOWS_PER_TID 2
  1661. #define AVG_MSDUS_PER_FLOW 128
  1662. #define AVG_MSDUS_PER_MPDU 4
  1663. /*
  1664. * Allocate and setup link descriptor pool that will be used by HW for
  1665. * various link and queue descriptors and managed by WBM
  1666. */
  1667. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1668. {
  1669. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1670. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1671. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1672. uint32_t num_mpdus_per_link_desc =
  1673. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1674. uint32_t num_msdus_per_link_desc =
  1675. hal_num_msdus_per_link_desc(soc->hal_soc);
  1676. uint32_t num_mpdu_links_per_queue_desc =
  1677. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1678. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1679. uint32_t total_link_descs, total_mem_size;
  1680. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1681. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1682. uint32_t num_link_desc_banks;
  1683. uint32_t last_bank_size = 0;
  1684. uint32_t entry_size, num_entries;
  1685. int i;
  1686. uint32_t desc_id = 0;
  1687. qdf_dma_addr_t *baseaddr = NULL;
  1688. /* Only Tx queue descriptors are allocated from common link descriptor
  1689. * pool Rx queue descriptors are not included in this because (REO queue
  1690. * extension descriptors) they are expected to be allocated contiguously
  1691. * with REO queue descriptors
  1692. */
  1693. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1694. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1695. num_mpdu_queue_descs = num_mpdu_link_descs /
  1696. num_mpdu_links_per_queue_desc;
  1697. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1698. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1699. num_msdus_per_link_desc;
  1700. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1701. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1702. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1703. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1704. /* Round up to power of 2 */
  1705. total_link_descs = 1;
  1706. while (total_link_descs < num_entries)
  1707. total_link_descs <<= 1;
  1708. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1709. FL("total_link_descs: %u, link_desc_size: %d"),
  1710. total_link_descs, link_desc_size);
  1711. total_mem_size = total_link_descs * link_desc_size;
  1712. total_mem_size += link_desc_align;
  1713. if (total_mem_size <= max_alloc_size) {
  1714. num_link_desc_banks = 0;
  1715. last_bank_size = total_mem_size;
  1716. } else {
  1717. num_link_desc_banks = (total_mem_size) /
  1718. (max_alloc_size - link_desc_align);
  1719. last_bank_size = total_mem_size %
  1720. (max_alloc_size - link_desc_align);
  1721. }
  1722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1723. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1724. total_mem_size, num_link_desc_banks);
  1725. for (i = 0; i < num_link_desc_banks; i++) {
  1726. if (!dp_is_soc_reinit(soc)) {
  1727. baseaddr = &soc->link_desc_banks[i].
  1728. base_paddr_unaligned;
  1729. soc->link_desc_banks[i].base_vaddr_unaligned =
  1730. qdf_mem_alloc_consistent(soc->osdev,
  1731. soc->osdev->dev,
  1732. max_alloc_size,
  1733. baseaddr);
  1734. }
  1735. soc->link_desc_banks[i].size = max_alloc_size;
  1736. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1737. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1738. ((unsigned long)(
  1739. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1740. link_desc_align));
  1741. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1742. soc->link_desc_banks[i].base_paddr_unaligned) +
  1743. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1744. (unsigned long)(
  1745. soc->link_desc_banks[i].base_vaddr_unaligned));
  1746. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1747. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1748. FL("Link descriptor memory alloc failed"));
  1749. goto fail;
  1750. }
  1751. }
  1752. if (last_bank_size) {
  1753. /* Allocate last bank in case total memory required is not exact
  1754. * multiple of max_alloc_size
  1755. */
  1756. if (!dp_is_soc_reinit(soc)) {
  1757. baseaddr = &soc->link_desc_banks[i].
  1758. base_paddr_unaligned;
  1759. soc->link_desc_banks[i].base_vaddr_unaligned =
  1760. qdf_mem_alloc_consistent(soc->osdev,
  1761. soc->osdev->dev,
  1762. last_bank_size,
  1763. baseaddr);
  1764. }
  1765. soc->link_desc_banks[i].size = last_bank_size;
  1766. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1767. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1768. ((unsigned long)(
  1769. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1770. link_desc_align));
  1771. soc->link_desc_banks[i].base_paddr =
  1772. (unsigned long)(
  1773. soc->link_desc_banks[i].base_paddr_unaligned) +
  1774. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1775. (unsigned long)(
  1776. soc->link_desc_banks[i].base_vaddr_unaligned));
  1777. }
  1778. /* Allocate and setup link descriptor idle list for HW internal use */
  1779. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1780. total_mem_size = entry_size * total_link_descs;
  1781. if (total_mem_size <= max_alloc_size) {
  1782. void *desc;
  1783. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1784. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1785. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1786. FL("Link desc idle ring setup failed"));
  1787. goto fail;
  1788. }
  1789. hal_srng_access_start_unlocked(soc->hal_soc,
  1790. soc->wbm_idle_link_ring.hal_srng);
  1791. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1792. soc->link_desc_banks[i].base_paddr; i++) {
  1793. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1794. ((unsigned long)(
  1795. soc->link_desc_banks[i].base_vaddr) -
  1796. (unsigned long)(
  1797. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1798. / link_desc_size;
  1799. unsigned long paddr = (unsigned long)(
  1800. soc->link_desc_banks[i].base_paddr);
  1801. while (num_entries && (desc = hal_srng_src_get_next(
  1802. soc->hal_soc,
  1803. soc->wbm_idle_link_ring.hal_srng))) {
  1804. hal_set_link_desc_addr(desc,
  1805. LINK_DESC_COOKIE(desc_id, i), paddr);
  1806. num_entries--;
  1807. desc_id++;
  1808. paddr += link_desc_size;
  1809. }
  1810. }
  1811. hal_srng_access_end_unlocked(soc->hal_soc,
  1812. soc->wbm_idle_link_ring.hal_srng);
  1813. } else {
  1814. uint32_t num_scatter_bufs;
  1815. uint32_t num_entries_per_buf;
  1816. uint32_t rem_entries;
  1817. uint8_t *scatter_buf_ptr;
  1818. uint16_t scatter_buf_num;
  1819. uint32_t buf_size = 0;
  1820. soc->wbm_idle_scatter_buf_size =
  1821. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1822. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1823. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1824. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1825. soc->hal_soc, total_mem_size,
  1826. soc->wbm_idle_scatter_buf_size);
  1827. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1828. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1829. FL("scatter bufs size out of bounds"));
  1830. goto fail;
  1831. }
  1832. for (i = 0; i < num_scatter_bufs; i++) {
  1833. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1834. if (!dp_is_soc_reinit(soc)) {
  1835. buf_size = soc->wbm_idle_scatter_buf_size;
  1836. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1837. qdf_mem_alloc_consistent(soc->osdev,
  1838. soc->osdev->
  1839. dev,
  1840. buf_size,
  1841. baseaddr);
  1842. }
  1843. if (!soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1844. QDF_TRACE(QDF_MODULE_ID_DP,
  1845. QDF_TRACE_LEVEL_ERROR,
  1846. FL("Scatter lst memory alloc fail"));
  1847. goto fail;
  1848. }
  1849. }
  1850. /* Populate idle list scatter buffers with link descriptor
  1851. * pointers
  1852. */
  1853. scatter_buf_num = 0;
  1854. scatter_buf_ptr = (uint8_t *)(
  1855. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1856. rem_entries = num_entries_per_buf;
  1857. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1858. soc->link_desc_banks[i].base_paddr; i++) {
  1859. uint32_t num_link_descs =
  1860. (soc->link_desc_banks[i].size -
  1861. ((unsigned long)(
  1862. soc->link_desc_banks[i].base_vaddr) -
  1863. (unsigned long)(
  1864. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1865. / link_desc_size;
  1866. unsigned long paddr = (unsigned long)(
  1867. soc->link_desc_banks[i].base_paddr);
  1868. while (num_link_descs) {
  1869. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1870. LINK_DESC_COOKIE(desc_id, i), paddr);
  1871. num_link_descs--;
  1872. desc_id++;
  1873. paddr += link_desc_size;
  1874. rem_entries--;
  1875. if (rem_entries) {
  1876. scatter_buf_ptr += entry_size;
  1877. } else {
  1878. rem_entries = num_entries_per_buf;
  1879. scatter_buf_num++;
  1880. if (scatter_buf_num >= num_scatter_bufs)
  1881. break;
  1882. scatter_buf_ptr = (uint8_t *)(
  1883. soc->wbm_idle_scatter_buf_base_vaddr[
  1884. scatter_buf_num]);
  1885. }
  1886. }
  1887. }
  1888. /* Setup link descriptor idle list in HW */
  1889. hal_setup_link_idle_list(soc->hal_soc,
  1890. soc->wbm_idle_scatter_buf_base_paddr,
  1891. soc->wbm_idle_scatter_buf_base_vaddr,
  1892. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1893. (uint32_t)(scatter_buf_ptr -
  1894. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1895. scatter_buf_num-1])), total_link_descs);
  1896. }
  1897. return 0;
  1898. fail:
  1899. if (soc->wbm_idle_link_ring.hal_srng) {
  1900. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1901. WBM_IDLE_LINK, 0);
  1902. }
  1903. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1904. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1905. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1906. soc->wbm_idle_scatter_buf_size,
  1907. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1908. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1909. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1910. }
  1911. }
  1912. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1913. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1914. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1915. soc->link_desc_banks[i].size,
  1916. soc->link_desc_banks[i].base_vaddr_unaligned,
  1917. soc->link_desc_banks[i].base_paddr_unaligned,
  1918. 0);
  1919. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1920. }
  1921. }
  1922. return QDF_STATUS_E_FAILURE;
  1923. }
  1924. /*
  1925. * Free link descriptor pool that was setup HW
  1926. */
  1927. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1928. {
  1929. int i;
  1930. if (soc->wbm_idle_link_ring.hal_srng) {
  1931. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1932. WBM_IDLE_LINK, 0);
  1933. }
  1934. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1935. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1936. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1937. soc->wbm_idle_scatter_buf_size,
  1938. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1939. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1940. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1941. }
  1942. }
  1943. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1944. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1945. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1946. soc->link_desc_banks[i].size,
  1947. soc->link_desc_banks[i].base_vaddr_unaligned,
  1948. soc->link_desc_banks[i].base_paddr_unaligned,
  1949. 0);
  1950. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1951. }
  1952. }
  1953. }
  1954. #ifdef IPA_OFFLOAD
  1955. #define REO_DST_RING_SIZE_QCA6290 1023
  1956. #ifndef QCA_WIFI_QCA8074_VP
  1957. #define REO_DST_RING_SIZE_QCA8074 1023
  1958. #else
  1959. #define REO_DST_RING_SIZE_QCA8074 8
  1960. #endif /* QCA_WIFI_QCA8074_VP */
  1961. #else
  1962. #define REO_DST_RING_SIZE_QCA6290 1024
  1963. #ifndef QCA_WIFI_QCA8074_VP
  1964. #define REO_DST_RING_SIZE_QCA8074 2048
  1965. #else
  1966. #define REO_DST_RING_SIZE_QCA8074 8
  1967. #endif /* QCA_WIFI_QCA8074_VP */
  1968. #endif /* IPA_OFFLOAD */
  1969. /*
  1970. * dp_ast_aging_timer_fn() - Timer callback function for WDS aging
  1971. * @soc: Datapath SOC handle
  1972. *
  1973. * This is a timer function used to age out stale AST nodes from
  1974. * AST table
  1975. */
  1976. #ifdef FEATURE_WDS
  1977. static void dp_ast_aging_timer_fn(void *soc_hdl)
  1978. {
  1979. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1980. struct dp_pdev *pdev;
  1981. struct dp_vdev *vdev;
  1982. struct dp_peer *peer;
  1983. struct dp_ast_entry *ase, *temp_ase;
  1984. int i;
  1985. bool check_wds_ase = false;
  1986. if (soc->wds_ast_aging_timer_cnt++ >= DP_WDS_AST_AGING_TIMER_CNT) {
  1987. soc->wds_ast_aging_timer_cnt = 0;
  1988. check_wds_ase = true;
  1989. }
  1990. /* Peer list access lock */
  1991. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1992. /* AST list access lock */
  1993. qdf_spin_lock_bh(&soc->ast_lock);
  1994. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1995. pdev = soc->pdev_list[i];
  1996. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1997. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1998. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1999. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  2000. /*
  2001. * Do not expire static ast entries
  2002. * and HM WDS entries
  2003. */
  2004. if (ase->type !=
  2005. CDP_TXRX_AST_TYPE_WDS &&
  2006. ase->type !=
  2007. CDP_TXRX_AST_TYPE_MEC &&
  2008. ase->type !=
  2009. CDP_TXRX_AST_TYPE_DA)
  2010. continue;
  2011. /* Expire MEC entry every n sec.
  2012. * This needs to be expired in
  2013. * case if STA backbone is made as
  2014. * AP backbone, In this case it needs
  2015. * to be re-added as a WDS entry.
  2016. */
  2017. if (ase->is_active && ase->type ==
  2018. CDP_TXRX_AST_TYPE_MEC) {
  2019. ase->is_active = FALSE;
  2020. continue;
  2021. } else if (ase->is_active &&
  2022. check_wds_ase) {
  2023. ase->is_active = FALSE;
  2024. continue;
  2025. }
  2026. if (ase->type ==
  2027. CDP_TXRX_AST_TYPE_MEC) {
  2028. DP_STATS_INC(soc,
  2029. ast.aged_out, 1);
  2030. dp_peer_del_ast(soc, ase);
  2031. } else if (check_wds_ase) {
  2032. DP_STATS_INC(soc,
  2033. ast.aged_out, 1);
  2034. dp_peer_del_ast(soc, ase);
  2035. }
  2036. }
  2037. }
  2038. }
  2039. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2040. }
  2041. qdf_spin_unlock_bh(&soc->ast_lock);
  2042. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2043. if (qdf_atomic_read(&soc->cmn_init_done))
  2044. qdf_timer_mod(&soc->ast_aging_timer,
  2045. DP_AST_AGING_TIMER_DEFAULT_MS);
  2046. }
  2047. /*
  2048. * dp_soc_wds_attach() - Setup WDS timer and AST table
  2049. * @soc: Datapath SOC handle
  2050. *
  2051. * Return: None
  2052. */
  2053. static void dp_soc_wds_attach(struct dp_soc *soc)
  2054. {
  2055. soc->wds_ast_aging_timer_cnt = 0;
  2056. qdf_timer_init(soc->osdev, &soc->ast_aging_timer,
  2057. dp_ast_aging_timer_fn, (void *)soc,
  2058. QDF_TIMER_TYPE_WAKE_APPS);
  2059. qdf_timer_mod(&soc->ast_aging_timer, DP_AST_AGING_TIMER_DEFAULT_MS);
  2060. }
  2061. /*
  2062. * dp_soc_wds_detach() - Detach WDS data structures and timers
  2063. * @txrx_soc: DP SOC handle
  2064. *
  2065. * Return: None
  2066. */
  2067. static void dp_soc_wds_detach(struct dp_soc *soc)
  2068. {
  2069. qdf_timer_stop(&soc->ast_aging_timer);
  2070. qdf_timer_free(&soc->ast_aging_timer);
  2071. }
  2072. #else
  2073. static void dp_soc_wds_attach(struct dp_soc *soc)
  2074. {
  2075. }
  2076. static void dp_soc_wds_detach(struct dp_soc *soc)
  2077. {
  2078. }
  2079. #endif
  2080. /*
  2081. * dp_soc_reset_ring_map() - Reset cpu ring map
  2082. * @soc: Datapath soc handler
  2083. *
  2084. * This api resets the default cpu ring map
  2085. */
  2086. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  2087. {
  2088. uint8_t i;
  2089. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2090. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2091. switch (nss_config) {
  2092. case dp_nss_cfg_first_radio:
  2093. /*
  2094. * Setting Tx ring map for one nss offloaded radio
  2095. */
  2096. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  2097. break;
  2098. case dp_nss_cfg_second_radio:
  2099. /*
  2100. * Setting Tx ring for two nss offloaded radios
  2101. */
  2102. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  2103. break;
  2104. case dp_nss_cfg_dbdc:
  2105. /*
  2106. * Setting Tx ring map for 2 nss offloaded radios
  2107. */
  2108. soc->tx_ring_map[i] =
  2109. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  2110. break;
  2111. case dp_nss_cfg_dbtc:
  2112. /*
  2113. * Setting Tx ring map for 3 nss offloaded radios
  2114. */
  2115. soc->tx_ring_map[i] =
  2116. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  2117. break;
  2118. default:
  2119. dp_err("tx_ring_map failed due to invalid nss cfg");
  2120. break;
  2121. }
  2122. }
  2123. }
  2124. /*
  2125. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  2126. * @dp_soc - DP soc handle
  2127. * @ring_type - ring type
  2128. * @ring_num - ring_num
  2129. *
  2130. * return 0 or 1
  2131. */
  2132. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  2133. {
  2134. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2135. uint8_t status = 0;
  2136. switch (ring_type) {
  2137. case WBM2SW_RELEASE:
  2138. case REO_DST:
  2139. case RXDMA_BUF:
  2140. status = ((nss_config) & (1 << ring_num));
  2141. break;
  2142. default:
  2143. break;
  2144. }
  2145. return status;
  2146. }
  2147. /*
  2148. * dp_soc_reset_intr_mask() - reset interrupt mask
  2149. * @dp_soc - DP Soc handle
  2150. *
  2151. * Return: Return void
  2152. */
  2153. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  2154. {
  2155. uint8_t j;
  2156. int *grp_mask = NULL;
  2157. int group_number, mask, num_ring;
  2158. /* number of tx ring */
  2159. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  2160. /*
  2161. * group mask for tx completion ring.
  2162. */
  2163. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  2164. /* loop and reset the mask for only offloaded ring */
  2165. for (j = 0; j < num_ring; j++) {
  2166. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  2167. continue;
  2168. }
  2169. /*
  2170. * Group number corresponding to tx offloaded ring.
  2171. */
  2172. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2173. if (group_number < 0) {
  2174. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2175. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2176. WBM2SW_RELEASE, j);
  2177. return;
  2178. }
  2179. /* reset the tx mask for offloaded ring */
  2180. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2181. mask &= (~(1 << j));
  2182. /*
  2183. * reset the interrupt mask for offloaded ring.
  2184. */
  2185. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2186. }
  2187. /* number of rx rings */
  2188. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2189. /*
  2190. * group mask for reo destination ring.
  2191. */
  2192. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2193. /* loop and reset the mask for only offloaded ring */
  2194. for (j = 0; j < num_ring; j++) {
  2195. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  2196. continue;
  2197. }
  2198. /*
  2199. * Group number corresponding to rx offloaded ring.
  2200. */
  2201. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2202. if (group_number < 0) {
  2203. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2204. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2205. REO_DST, j);
  2206. return;
  2207. }
  2208. /* set the interrupt mask for offloaded ring */
  2209. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2210. mask &= (~(1 << j));
  2211. /*
  2212. * set the interrupt mask to zero for rx offloaded radio.
  2213. */
  2214. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2215. }
  2216. /*
  2217. * group mask for Rx buffer refill ring
  2218. */
  2219. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2220. /* loop and reset the mask for only offloaded ring */
  2221. for (j = 0; j < MAX_PDEV_CNT; j++) {
  2222. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  2223. continue;
  2224. }
  2225. /*
  2226. * Group number corresponding to rx offloaded ring.
  2227. */
  2228. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2229. if (group_number < 0) {
  2230. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2231. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2232. REO_DST, j);
  2233. return;
  2234. }
  2235. /* set the interrupt mask for offloaded ring */
  2236. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2237. group_number);
  2238. mask &= (~(1 << j));
  2239. /*
  2240. * set the interrupt mask to zero for rx offloaded radio.
  2241. */
  2242. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2243. group_number, mask);
  2244. }
  2245. }
  2246. #ifdef IPA_OFFLOAD
  2247. /**
  2248. * dp_reo_remap_config() - configure reo remap register value based
  2249. * nss configuration.
  2250. * based on offload_radio value below remap configuration
  2251. * get applied.
  2252. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  2253. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  2254. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  2255. * 3 - both Radios handled by NSS (remap not required)
  2256. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  2257. *
  2258. * @remap1: output parameter indicates reo remap 1 register value
  2259. * @remap2: output parameter indicates reo remap 2 register value
  2260. * Return: bool type, true if remap is configured else false.
  2261. */
  2262. static bool dp_reo_remap_config(struct dp_soc *soc,
  2263. uint32_t *remap1,
  2264. uint32_t *remap2)
  2265. {
  2266. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  2267. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  2268. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  2269. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  2270. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  2271. return true;
  2272. }
  2273. #else
  2274. static bool dp_reo_remap_config(struct dp_soc *soc,
  2275. uint32_t *remap1,
  2276. uint32_t *remap2)
  2277. {
  2278. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2279. switch (offload_radio) {
  2280. case dp_nss_cfg_default:
  2281. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2282. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2283. (0x3 << 18) | (0x4 << 21)) << 8;
  2284. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2285. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2286. (0x3 << 18) | (0x4 << 21)) << 8;
  2287. break;
  2288. case dp_nss_cfg_first_radio:
  2289. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  2290. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  2291. (0x2 << 18) | (0x3 << 21)) << 8;
  2292. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  2293. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  2294. (0x4 << 18) | (0x2 << 21)) << 8;
  2295. break;
  2296. case dp_nss_cfg_second_radio:
  2297. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  2298. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  2299. (0x1 << 18) | (0x3 << 21)) << 8;
  2300. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  2301. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  2302. (0x4 << 18) | (0x1 << 21)) << 8;
  2303. break;
  2304. case dp_nss_cfg_dbdc:
  2305. case dp_nss_cfg_dbtc:
  2306. /* return false if both or all are offloaded to NSS */
  2307. return false;
  2308. }
  2309. dp_debug("remap1 %x remap2 %x offload_radio %u",
  2310. *remap1, *remap2, offload_radio);
  2311. return true;
  2312. }
  2313. #endif
  2314. /*
  2315. * dp_reo_frag_dst_set() - configure reo register to set the
  2316. * fragment destination ring
  2317. * @soc : Datapath soc
  2318. * @frag_dst_ring : output parameter to set fragment destination ring
  2319. *
  2320. * Based on offload_radio below fragment destination rings is selected
  2321. * 0 - TCL
  2322. * 1 - SW1
  2323. * 2 - SW2
  2324. * 3 - SW3
  2325. * 4 - SW4
  2326. * 5 - Release
  2327. * 6 - FW
  2328. * 7 - alternate select
  2329. *
  2330. * return: void
  2331. */
  2332. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  2333. {
  2334. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2335. switch (offload_radio) {
  2336. case dp_nss_cfg_default:
  2337. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  2338. break;
  2339. case dp_nss_cfg_dbdc:
  2340. case dp_nss_cfg_dbtc:
  2341. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  2342. break;
  2343. default:
  2344. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2345. FL("dp_reo_frag_dst_set invalid offload radio config"));
  2346. break;
  2347. }
  2348. }
  2349. #ifdef ENABLE_VERBOSE_DEBUG
  2350. static void dp_enable_verbose_debug(struct dp_soc *soc)
  2351. {
  2352. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2353. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2354. if (soc_cfg_ctx->per_pkt_trace & dp_verbose_debug_mask)
  2355. is_dp_verbose_debug_enabled = true;
  2356. if (soc_cfg_ctx->per_pkt_trace & hal_verbose_debug_mask)
  2357. hal_set_verbose_debug(true);
  2358. else
  2359. hal_set_verbose_debug(false);
  2360. }
  2361. #else
  2362. static void dp_enable_verbose_debug(struct dp_soc *soc)
  2363. {
  2364. }
  2365. #endif
  2366. /*
  2367. * dp_soc_cmn_setup() - Common SoC level initializion
  2368. * @soc: Datapath SOC handle
  2369. *
  2370. * This is an internal function used to setup common SOC data structures,
  2371. * to be called from PDEV attach after receiving HW mode capabilities from FW
  2372. */
  2373. static int dp_soc_cmn_setup(struct dp_soc *soc)
  2374. {
  2375. int i;
  2376. struct hal_reo_params reo_params;
  2377. int tx_ring_size;
  2378. int tx_comp_ring_size;
  2379. int reo_dst_ring_size;
  2380. uint32_t entries;
  2381. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2382. if (qdf_atomic_read(&soc->cmn_init_done))
  2383. return 0;
  2384. if (dp_hw_link_desc_pool_setup(soc))
  2385. goto fail1;
  2386. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2387. dp_enable_verbose_debug(soc);
  2388. /* Setup SRNG rings */
  2389. /* Common rings */
  2390. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  2391. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  2392. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2393. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  2394. goto fail1;
  2395. }
  2396. soc->num_tcl_data_rings = 0;
  2397. /* Tx data rings */
  2398. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  2399. soc->num_tcl_data_rings =
  2400. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  2401. tx_comp_ring_size =
  2402. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2403. tx_ring_size =
  2404. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2405. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2406. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  2407. TCL_DATA, i, 0, tx_ring_size)) {
  2408. QDF_TRACE(QDF_MODULE_ID_DP,
  2409. QDF_TRACE_LEVEL_ERROR,
  2410. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2411. goto fail1;
  2412. }
  2413. /*
  2414. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2415. * count
  2416. */
  2417. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2418. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2419. QDF_TRACE(QDF_MODULE_ID_DP,
  2420. QDF_TRACE_LEVEL_ERROR,
  2421. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2422. goto fail1;
  2423. }
  2424. }
  2425. } else {
  2426. /* This will be incremented during per pdev ring setup */
  2427. soc->num_tcl_data_rings = 0;
  2428. }
  2429. if (dp_tx_soc_attach(soc)) {
  2430. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2431. FL("dp_tx_soc_attach failed"));
  2432. goto fail1;
  2433. }
  2434. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2435. /* TCL command and status rings */
  2436. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2437. entries)) {
  2438. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2439. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2440. goto fail1;
  2441. }
  2442. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2443. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2444. entries)) {
  2445. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2446. FL("dp_srng_setup failed for tcl_status_ring"));
  2447. goto fail1;
  2448. }
  2449. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2450. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2451. * descriptors
  2452. */
  2453. /* Rx data rings */
  2454. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2455. soc->num_reo_dest_rings =
  2456. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2457. QDF_TRACE(QDF_MODULE_ID_DP,
  2458. QDF_TRACE_LEVEL_INFO,
  2459. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2460. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2461. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2462. i, 0, reo_dst_ring_size)) {
  2463. QDF_TRACE(QDF_MODULE_ID_DP,
  2464. QDF_TRACE_LEVEL_ERROR,
  2465. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2466. goto fail1;
  2467. }
  2468. }
  2469. } else {
  2470. /* This will be incremented during per pdev ring setup */
  2471. soc->num_reo_dest_rings = 0;
  2472. }
  2473. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2474. /* LMAC RxDMA to SW Rings configuration */
  2475. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2476. /* Only valid for MCL */
  2477. struct dp_pdev *pdev = soc->pdev_list[0];
  2478. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2479. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2480. RXDMA_DST, 0, i,
  2481. entries)) {
  2482. QDF_TRACE(QDF_MODULE_ID_DP,
  2483. QDF_TRACE_LEVEL_ERROR,
  2484. FL(RNG_ERR "rxdma_err_dst_ring"));
  2485. goto fail1;
  2486. }
  2487. }
  2488. }
  2489. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2490. /* REO reinjection ring */
  2491. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2492. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2493. entries)) {
  2494. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2495. FL("dp_srng_setup failed for reo_reinject_ring"));
  2496. goto fail1;
  2497. }
  2498. /* Rx release ring */
  2499. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2500. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2501. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2502. FL("dp_srng_setup failed for rx_rel_ring"));
  2503. goto fail1;
  2504. }
  2505. /* Rx exception ring */
  2506. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2507. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2508. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2509. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2510. FL("dp_srng_setup failed for reo_exception_ring"));
  2511. goto fail1;
  2512. }
  2513. /* REO command and status rings */
  2514. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2515. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2516. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2517. FL("dp_srng_setup failed for reo_cmd_ring"));
  2518. goto fail1;
  2519. }
  2520. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2521. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2522. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2523. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2524. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2525. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2526. FL("dp_srng_setup failed for reo_status_ring"));
  2527. goto fail1;
  2528. }
  2529. /* Reset the cpu ring map if radio is NSS offloaded */
  2530. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2531. dp_soc_reset_cpu_ring_map(soc);
  2532. dp_soc_reset_intr_mask(soc);
  2533. }
  2534. /* Setup HW REO */
  2535. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2536. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2537. /*
  2538. * Reo ring remap is not required if both radios
  2539. * are offloaded to NSS
  2540. */
  2541. if (!dp_reo_remap_config(soc,
  2542. &reo_params.remap1,
  2543. &reo_params.remap2))
  2544. goto out;
  2545. reo_params.rx_hash_enabled = true;
  2546. }
  2547. /* setup the global rx defrag waitlist */
  2548. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2549. soc->rx.defrag.timeout_ms =
  2550. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2551. soc->rx.defrag.next_flush_ms = 0;
  2552. soc->rx.flags.defrag_timeout_check =
  2553. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2554. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2555. out:
  2556. /*
  2557. * set the fragment destination ring
  2558. */
  2559. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2560. hal_reo_setup(soc->hal_soc, &reo_params);
  2561. qdf_atomic_set(&soc->cmn_init_done, 1);
  2562. dp_soc_wds_attach(soc);
  2563. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2564. return 0;
  2565. fail1:
  2566. /*
  2567. * Cleanup will be done as part of soc_detach, which will
  2568. * be called on pdev attach failure
  2569. */
  2570. return QDF_STATUS_E_FAILURE;
  2571. }
  2572. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2573. static QDF_STATUS dp_lro_hash_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2574. {
  2575. struct cdp_lro_hash_config lro_hash;
  2576. QDF_STATUS status;
  2577. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2578. !wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx) &&
  2579. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2580. dp_err("LRO, GRO and RX hash disabled");
  2581. return QDF_STATUS_E_FAILURE;
  2582. }
  2583. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2584. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) ||
  2585. wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx)) {
  2586. lro_hash.lro_enable = 1;
  2587. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2588. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2589. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2590. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2591. }
  2592. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2593. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2594. LRO_IPV4_SEED_ARR_SZ));
  2595. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2596. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2597. LRO_IPV6_SEED_ARR_SZ));
  2598. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2599. if (!soc->cdp_soc.ol_ops->lro_hash_config) {
  2600. QDF_BUG(0);
  2601. dp_err("lro_hash_config not configured");
  2602. return QDF_STATUS_E_FAILURE;
  2603. }
  2604. status = soc->cdp_soc.ol_ops->lro_hash_config(pdev->ctrl_pdev,
  2605. &lro_hash);
  2606. if (!QDF_IS_STATUS_SUCCESS(status)) {
  2607. dp_err("failed to send lro_hash_config to FW %u", status);
  2608. return status;
  2609. }
  2610. dp_info("LRO CMD config: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2611. lro_hash.lro_enable, lro_hash.tcp_flag,
  2612. lro_hash.tcp_flag_mask);
  2613. dp_info("toeplitz_hash_ipv4:");
  2614. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2615. (void *)lro_hash.toeplitz_hash_ipv4,
  2616. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2617. LRO_IPV4_SEED_ARR_SZ));
  2618. dp_info("toeplitz_hash_ipv6:");
  2619. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2620. (void *)lro_hash.toeplitz_hash_ipv6,
  2621. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2622. LRO_IPV6_SEED_ARR_SZ));
  2623. return status;
  2624. }
  2625. /*
  2626. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2627. * @soc: data path SoC handle
  2628. * @pdev: Physical device handle
  2629. *
  2630. * Return: 0 - success, > 0 - failure
  2631. */
  2632. #ifdef QCA_HOST2FW_RXBUF_RING
  2633. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2634. struct dp_pdev *pdev)
  2635. {
  2636. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2637. int max_mac_rings;
  2638. int i;
  2639. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2640. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2641. for (i = 0; i < max_mac_rings; i++) {
  2642. dp_verbose_debug("pdev_id %d mac_id %d", pdev->pdev_id, i);
  2643. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2644. RXDMA_BUF, 1, i,
  2645. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2646. QDF_TRACE(QDF_MODULE_ID_DP,
  2647. QDF_TRACE_LEVEL_ERROR,
  2648. FL("failed rx mac ring setup"));
  2649. return QDF_STATUS_E_FAILURE;
  2650. }
  2651. }
  2652. return QDF_STATUS_SUCCESS;
  2653. }
  2654. #else
  2655. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2656. struct dp_pdev *pdev)
  2657. {
  2658. return QDF_STATUS_SUCCESS;
  2659. }
  2660. #endif
  2661. /**
  2662. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2663. * @pdev - DP_PDEV handle
  2664. *
  2665. * Return: void
  2666. */
  2667. static inline void
  2668. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2669. {
  2670. uint8_t map_id;
  2671. struct dp_soc *soc = pdev->soc;
  2672. if (!soc)
  2673. return;
  2674. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2675. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2676. default_dscp_tid_map,
  2677. sizeof(default_dscp_tid_map));
  2678. }
  2679. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2680. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2681. default_dscp_tid_map,
  2682. map_id);
  2683. }
  2684. }
  2685. /**
  2686. * dp_pcp_tid_map_setup(): Initialize the pcp-tid maps
  2687. * @pdev - DP_PDEV handle
  2688. *
  2689. * Return: void
  2690. */
  2691. static inline void
  2692. dp_pcp_tid_map_setup(struct dp_pdev *pdev)
  2693. {
  2694. struct dp_soc *soc = pdev->soc;
  2695. if (!soc)
  2696. return;
  2697. qdf_mem_copy(soc->pcp_tid_map, default_pcp_tid_map,
  2698. sizeof(default_pcp_tid_map));
  2699. hal_tx_set_pcp_tid_map_default(soc->hal_soc, default_pcp_tid_map);
  2700. }
  2701. #ifdef IPA_OFFLOAD
  2702. /**
  2703. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2704. * @soc: data path instance
  2705. * @pdev: core txrx pdev context
  2706. *
  2707. * Return: QDF_STATUS_SUCCESS: success
  2708. * QDF_STATUS_E_RESOURCES: Error return
  2709. */
  2710. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2711. struct dp_pdev *pdev)
  2712. {
  2713. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2714. int entries;
  2715. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2716. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2717. /* Setup second Rx refill buffer ring */
  2718. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2719. IPA_RX_REFILL_BUF_RING_IDX,
  2720. pdev->pdev_id,
  2721. entries)) {
  2722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2723. FL("dp_srng_setup failed second rx refill ring"));
  2724. return QDF_STATUS_E_FAILURE;
  2725. }
  2726. return QDF_STATUS_SUCCESS;
  2727. }
  2728. /**
  2729. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2730. * @soc: data path instance
  2731. * @pdev: core txrx pdev context
  2732. *
  2733. * Return: void
  2734. */
  2735. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2736. struct dp_pdev *pdev)
  2737. {
  2738. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2739. IPA_RX_REFILL_BUF_RING_IDX);
  2740. }
  2741. #else
  2742. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2743. struct dp_pdev *pdev)
  2744. {
  2745. return QDF_STATUS_SUCCESS;
  2746. }
  2747. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2748. struct dp_pdev *pdev)
  2749. {
  2750. }
  2751. #endif
  2752. #if !defined(DISABLE_MON_CONFIG)
  2753. /**
  2754. * dp_mon_rings_setup() - Initialize Monitor rings based on target
  2755. * @soc: soc handle
  2756. * @pdev: physical device handle
  2757. *
  2758. * Return: nonzero on failure and zero on success
  2759. */
  2760. static
  2761. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2762. {
  2763. int mac_id = 0;
  2764. int pdev_id = pdev->pdev_id;
  2765. int entries;
  2766. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2767. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2768. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2769. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2770. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  2771. entries =
  2772. wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2773. if (dp_srng_setup(soc,
  2774. &pdev->rxdma_mon_buf_ring[mac_id],
  2775. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2776. entries)) {
  2777. QDF_TRACE(QDF_MODULE_ID_DP,
  2778. QDF_TRACE_LEVEL_ERROR,
  2779. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2780. return QDF_STATUS_E_NOMEM;
  2781. }
  2782. entries =
  2783. wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2784. if (dp_srng_setup(soc,
  2785. &pdev->rxdma_mon_dst_ring[mac_id],
  2786. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2787. entries)) {
  2788. QDF_TRACE(QDF_MODULE_ID_DP,
  2789. QDF_TRACE_LEVEL_ERROR,
  2790. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2791. return QDF_STATUS_E_NOMEM;
  2792. }
  2793. entries =
  2794. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2795. if (dp_srng_setup(soc,
  2796. &pdev->rxdma_mon_status_ring[mac_id],
  2797. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2798. entries)) {
  2799. QDF_TRACE(QDF_MODULE_ID_DP,
  2800. QDF_TRACE_LEVEL_ERROR,
  2801. FL(RNG_ERR "rxdma_mon_status_ring"));
  2802. return QDF_STATUS_E_NOMEM;
  2803. }
  2804. entries =
  2805. wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2806. if (dp_srng_setup(soc,
  2807. &pdev->rxdma_mon_desc_ring[mac_id],
  2808. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2809. entries)) {
  2810. QDF_TRACE(QDF_MODULE_ID_DP,
  2811. QDF_TRACE_LEVEL_ERROR,
  2812. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2813. return QDF_STATUS_E_NOMEM;
  2814. }
  2815. } else {
  2816. entries =
  2817. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2818. if (dp_srng_setup(soc,
  2819. &pdev->rxdma_mon_status_ring[mac_id],
  2820. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2821. entries)) {
  2822. QDF_TRACE(QDF_MODULE_ID_DP,
  2823. QDF_TRACE_LEVEL_ERROR,
  2824. FL(RNG_ERR "rxdma_mon_status_ring"));
  2825. return QDF_STATUS_E_NOMEM;
  2826. }
  2827. }
  2828. }
  2829. return QDF_STATUS_SUCCESS;
  2830. }
  2831. #else
  2832. static
  2833. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2834. {
  2835. return QDF_STATUS_SUCCESS;
  2836. }
  2837. #endif
  2838. /*dp_iterate_update_peer_list - update peer stats on cal client timer
  2839. * @pdev_hdl: pdev handle
  2840. */
  2841. #ifdef ATH_SUPPORT_EXT_STAT
  2842. void dp_iterate_update_peer_list(void *pdev_hdl)
  2843. {
  2844. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  2845. struct dp_soc *soc = pdev->soc;
  2846. struct dp_vdev *vdev = NULL;
  2847. struct dp_peer *peer = NULL;
  2848. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2849. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2850. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  2851. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  2852. dp_cal_client_update_peer_stats(&peer->stats);
  2853. }
  2854. }
  2855. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2856. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2857. }
  2858. #else
  2859. void dp_iterate_update_peer_list(void *pdev_hdl)
  2860. {
  2861. }
  2862. #endif
  2863. /*
  2864. * dp_pdev_attach_wifi3() - attach txrx pdev
  2865. * @ctrl_pdev: Opaque PDEV object
  2866. * @txrx_soc: Datapath SOC handle
  2867. * @htc_handle: HTC handle for host-target interface
  2868. * @qdf_osdev: QDF OS device
  2869. * @pdev_id: PDEV ID
  2870. *
  2871. * Return: DP PDEV handle on success, NULL on failure
  2872. */
  2873. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2874. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2875. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2876. {
  2877. int tx_ring_size;
  2878. int tx_comp_ring_size;
  2879. int reo_dst_ring_size;
  2880. int entries;
  2881. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2882. int nss_cfg;
  2883. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2884. struct dp_pdev *pdev = NULL;
  2885. if (dp_is_soc_reinit(soc))
  2886. pdev = soc->pdev_list[pdev_id];
  2887. else
  2888. pdev = qdf_mem_malloc(sizeof(*pdev));
  2889. if (!pdev) {
  2890. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2891. FL("DP PDEV memory allocation failed"));
  2892. goto fail0;
  2893. }
  2894. /*
  2895. * Variable to prevent double pdev deinitialization during
  2896. * radio detach execution .i.e. in the absence of any vdev.
  2897. */
  2898. pdev->pdev_deinit = 0;
  2899. pdev->invalid_peer = qdf_mem_malloc(sizeof(struct dp_peer));
  2900. if (!pdev->invalid_peer) {
  2901. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2902. FL("Invalid peer memory allocation failed"));
  2903. qdf_mem_free(pdev);
  2904. goto fail0;
  2905. }
  2906. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2907. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2908. if (!pdev->wlan_cfg_ctx) {
  2909. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2910. FL("pdev cfg_attach failed"));
  2911. qdf_mem_free(pdev->invalid_peer);
  2912. qdf_mem_free(pdev);
  2913. goto fail0;
  2914. }
  2915. /*
  2916. * set nss pdev config based on soc config
  2917. */
  2918. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2919. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2920. (nss_cfg & (1 << pdev_id)));
  2921. pdev->soc = soc;
  2922. pdev->ctrl_pdev = ctrl_pdev;
  2923. pdev->pdev_id = pdev_id;
  2924. soc->pdev_list[pdev_id] = pdev;
  2925. pdev->lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, pdev_id);
  2926. soc->pdev_count++;
  2927. TAILQ_INIT(&pdev->vdev_list);
  2928. qdf_spinlock_create(&pdev->vdev_list_lock);
  2929. pdev->vdev_count = 0;
  2930. qdf_spinlock_create(&pdev->tx_mutex);
  2931. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2932. TAILQ_INIT(&pdev->neighbour_peers_list);
  2933. pdev->neighbour_peers_added = false;
  2934. pdev->monitor_configured = false;
  2935. if (dp_soc_cmn_setup(soc)) {
  2936. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2937. FL("dp_soc_cmn_setup failed"));
  2938. goto fail1;
  2939. }
  2940. /* Setup per PDEV TCL rings if configured */
  2941. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2942. tx_ring_size =
  2943. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2944. tx_comp_ring_size =
  2945. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2946. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2947. pdev_id, pdev_id, tx_ring_size)) {
  2948. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2949. FL("dp_srng_setup failed for tcl_data_ring"));
  2950. goto fail1;
  2951. }
  2952. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2953. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2955. FL("dp_srng_setup failed for tx_comp_ring"));
  2956. goto fail1;
  2957. }
  2958. soc->num_tcl_data_rings++;
  2959. }
  2960. /* Tx specific init */
  2961. if (dp_tx_pdev_attach(pdev)) {
  2962. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2963. FL("dp_tx_pdev_attach failed"));
  2964. goto fail1;
  2965. }
  2966. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2967. /* Setup per PDEV REO rings if configured */
  2968. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2969. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2970. pdev_id, pdev_id, reo_dst_ring_size)) {
  2971. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2972. FL("dp_srng_setup failed for reo_dest_ringn"));
  2973. goto fail1;
  2974. }
  2975. soc->num_reo_dest_rings++;
  2976. }
  2977. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2978. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2980. FL("dp_srng_setup failed rx refill ring"));
  2981. goto fail1;
  2982. }
  2983. if (dp_rxdma_ring_setup(soc, pdev)) {
  2984. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2985. FL("RXDMA ring config failed"));
  2986. goto fail1;
  2987. }
  2988. if (dp_mon_rings_setup(soc, pdev)) {
  2989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2990. FL("MONITOR rings setup failed"));
  2991. goto fail1;
  2992. }
  2993. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2994. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2995. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2996. 0, pdev_id,
  2997. entries)) {
  2998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2999. FL(RNG_ERR "rxdma_err_dst_ring"));
  3000. goto fail1;
  3001. }
  3002. }
  3003. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  3004. goto fail1;
  3005. if (dp_ipa_ring_resource_setup(soc, pdev))
  3006. goto fail1;
  3007. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  3008. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3009. FL("dp_ipa_uc_attach failed"));
  3010. goto fail1;
  3011. }
  3012. /* Rx specific init */
  3013. if (dp_rx_pdev_attach(pdev)) {
  3014. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3015. FL("dp_rx_pdev_attach failed"));
  3016. goto fail1;
  3017. }
  3018. DP_STATS_INIT(pdev);
  3019. /* Monitor filter init */
  3020. pdev->mon_filter_mode = MON_FILTER_ALL;
  3021. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  3022. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  3023. pdev->fp_data_filter = FILTER_DATA_ALL;
  3024. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  3025. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  3026. pdev->mo_data_filter = FILTER_DATA_ALL;
  3027. dp_local_peer_id_pool_init(pdev);
  3028. dp_dscp_tid_map_setup(pdev);
  3029. dp_pcp_tid_map_setup(pdev);
  3030. /* Rx monitor mode specific init */
  3031. if (dp_rx_pdev_mon_attach(pdev)) {
  3032. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3033. "dp_rx_pdev_mon_attach failed");
  3034. goto fail1;
  3035. }
  3036. if (dp_wdi_event_attach(pdev)) {
  3037. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3038. "dp_wdi_evet_attach failed");
  3039. goto fail1;
  3040. }
  3041. /* set the reo destination during initialization */
  3042. pdev->reo_dest = pdev->pdev_id + 1;
  3043. /*
  3044. * initialize ppdu tlv list
  3045. */
  3046. TAILQ_INIT(&pdev->ppdu_info_list);
  3047. pdev->tlv_count = 0;
  3048. pdev->list_depth = 0;
  3049. qdf_mem_zero(&pdev->sojourn_stats, sizeof(struct cdp_tx_sojourn_stats));
  3050. pdev->sojourn_buf = qdf_nbuf_alloc(pdev->soc->osdev,
  3051. sizeof(struct cdp_tx_sojourn_stats), 0, 4,
  3052. TRUE);
  3053. /* initlialize cal client timer */
  3054. dp_cal_client_attach(&pdev->cal_client_ctx, pdev, pdev->soc->osdev,
  3055. &dp_iterate_update_peer_list);
  3056. qdf_event_create(&pdev->fw_peer_stats_event);
  3057. pdev->num_tx_allowed = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3058. return (struct cdp_pdev *)pdev;
  3059. fail1:
  3060. dp_pdev_detach((struct cdp_pdev *)pdev, 0);
  3061. fail0:
  3062. return NULL;
  3063. }
  3064. /*
  3065. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  3066. * @soc: data path SoC handle
  3067. * @pdev: Physical device handle
  3068. *
  3069. * Return: void
  3070. */
  3071. #ifdef QCA_HOST2FW_RXBUF_RING
  3072. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  3073. struct dp_pdev *pdev)
  3074. {
  3075. int max_mac_rings =
  3076. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  3077. int i;
  3078. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  3079. max_mac_rings : MAX_RX_MAC_RINGS;
  3080. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  3081. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  3082. RXDMA_BUF, 1);
  3083. qdf_timer_free(&soc->mon_reap_timer);
  3084. }
  3085. #else
  3086. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  3087. struct dp_pdev *pdev)
  3088. {
  3089. }
  3090. #endif
  3091. /*
  3092. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  3093. * @pdev: device object
  3094. *
  3095. * Return: void
  3096. */
  3097. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  3098. {
  3099. struct dp_neighbour_peer *peer = NULL;
  3100. struct dp_neighbour_peer *temp_peer = NULL;
  3101. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  3102. neighbour_peer_list_elem, temp_peer) {
  3103. /* delete this peer from the list */
  3104. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3105. peer, neighbour_peer_list_elem);
  3106. qdf_mem_free(peer);
  3107. }
  3108. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  3109. }
  3110. /**
  3111. * dp_htt_ppdu_stats_detach() - detach stats resources
  3112. * @pdev: Datapath PDEV handle
  3113. *
  3114. * Return: void
  3115. */
  3116. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  3117. {
  3118. struct ppdu_info *ppdu_info, *ppdu_info_next;
  3119. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  3120. ppdu_info_list_elem, ppdu_info_next) {
  3121. if (!ppdu_info)
  3122. break;
  3123. qdf_assert_always(ppdu_info->nbuf);
  3124. qdf_nbuf_free(ppdu_info->nbuf);
  3125. qdf_mem_free(ppdu_info);
  3126. }
  3127. }
  3128. #if !defined(DISABLE_MON_CONFIG)
  3129. static
  3130. void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3131. int mac_id)
  3132. {
  3133. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3134. dp_srng_cleanup(soc,
  3135. &pdev->rxdma_mon_buf_ring[mac_id],
  3136. RXDMA_MONITOR_BUF, 0);
  3137. dp_srng_cleanup(soc,
  3138. &pdev->rxdma_mon_dst_ring[mac_id],
  3139. RXDMA_MONITOR_DST, 0);
  3140. dp_srng_cleanup(soc,
  3141. &pdev->rxdma_mon_status_ring[mac_id],
  3142. RXDMA_MONITOR_STATUS, 0);
  3143. dp_srng_cleanup(soc,
  3144. &pdev->rxdma_mon_desc_ring[mac_id],
  3145. RXDMA_MONITOR_DESC, 0);
  3146. dp_srng_cleanup(soc,
  3147. &pdev->rxdma_err_dst_ring[mac_id],
  3148. RXDMA_DST, 0);
  3149. } else {
  3150. dp_srng_cleanup(soc,
  3151. &pdev->rxdma_mon_status_ring[mac_id],
  3152. RXDMA_MONITOR_STATUS, 0);
  3153. dp_srng_cleanup(soc,
  3154. &pdev->rxdma_err_dst_ring[mac_id],
  3155. RXDMA_DST, 0);
  3156. }
  3157. }
  3158. #else
  3159. static void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3160. int mac_id)
  3161. {
  3162. }
  3163. #endif
  3164. /**
  3165. * dp_mon_ring_deinit() - Placeholder to deinitialize Monitor rings
  3166. *
  3167. * @soc: soc handle
  3168. * @pdev: datapath physical dev handle
  3169. * @mac_id: mac number
  3170. *
  3171. * Return: None
  3172. */
  3173. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  3174. int mac_id)
  3175. {
  3176. }
  3177. /**
  3178. * dp_pdev_mem_reset() - Reset txrx pdev memory
  3179. * @pdev: dp pdev handle
  3180. *
  3181. * Return: None
  3182. */
  3183. static void dp_pdev_mem_reset(struct dp_pdev *pdev)
  3184. {
  3185. uint16_t len = 0;
  3186. uint8_t *dp_pdev_offset = (uint8_t *)pdev;
  3187. len = sizeof(struct dp_pdev) -
  3188. offsetof(struct dp_pdev, pdev_deinit) -
  3189. sizeof(pdev->pdev_deinit);
  3190. dp_pdev_offset = dp_pdev_offset +
  3191. offsetof(struct dp_pdev, pdev_deinit) +
  3192. sizeof(pdev->pdev_deinit);
  3193. qdf_mem_zero(dp_pdev_offset, len);
  3194. }
  3195. /**
  3196. * dp_pdev_deinit() - Deinit txrx pdev
  3197. * @txrx_pdev: Datapath PDEV handle
  3198. * @force: Force deinit
  3199. *
  3200. * Return: None
  3201. */
  3202. static void dp_pdev_deinit(struct cdp_pdev *txrx_pdev, int force)
  3203. {
  3204. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3205. struct dp_soc *soc = pdev->soc;
  3206. qdf_nbuf_t curr_nbuf, next_nbuf;
  3207. int mac_id;
  3208. /*
  3209. * Prevent double pdev deinitialization during radio detach
  3210. * execution .i.e. in the absence of any vdev
  3211. */
  3212. if (pdev->pdev_deinit)
  3213. return;
  3214. pdev->pdev_deinit = 1;
  3215. dp_wdi_event_detach(pdev);
  3216. dp_tx_pdev_detach(pdev);
  3217. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3218. dp_srng_deinit(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3219. TCL_DATA, pdev->pdev_id);
  3220. dp_srng_deinit(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3221. WBM2SW_RELEASE, pdev->pdev_id);
  3222. }
  3223. dp_pktlogmod_exit(pdev);
  3224. dp_rx_pdev_detach(pdev);
  3225. dp_rx_pdev_mon_detach(pdev);
  3226. dp_neighbour_peers_detach(pdev);
  3227. qdf_spinlock_destroy(&pdev->tx_mutex);
  3228. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  3229. dp_ipa_uc_detach(soc, pdev);
  3230. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  3231. /* Cleanup per PDEV REO rings if configured */
  3232. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3233. dp_srng_deinit(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3234. REO_DST, pdev->pdev_id);
  3235. }
  3236. dp_srng_deinit(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3237. dp_rxdma_ring_cleanup(soc, pdev);
  3238. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3239. dp_mon_ring_deinit(soc, pdev, mac_id);
  3240. dp_srng_deinit(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3241. RXDMA_DST, 0);
  3242. }
  3243. curr_nbuf = pdev->invalid_peer_head_msdu;
  3244. while (curr_nbuf) {
  3245. next_nbuf = qdf_nbuf_next(curr_nbuf);
  3246. qdf_nbuf_free(curr_nbuf);
  3247. curr_nbuf = next_nbuf;
  3248. }
  3249. pdev->invalid_peer_head_msdu = NULL;
  3250. pdev->invalid_peer_tail_msdu = NULL;
  3251. dp_htt_ppdu_stats_detach(pdev);
  3252. qdf_nbuf_free(pdev->sojourn_buf);
  3253. dp_cal_client_detach(&pdev->cal_client_ctx);
  3254. soc->pdev_count--;
  3255. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  3256. qdf_mem_free(pdev->invalid_peer);
  3257. qdf_mem_free(pdev->dp_txrx_handle);
  3258. dp_pdev_mem_reset(pdev);
  3259. }
  3260. /**
  3261. * dp_pdev_deinit_wifi3() - Deinit txrx pdev
  3262. * @txrx_pdev: Datapath PDEV handle
  3263. * @force: Force deinit
  3264. *
  3265. * Return: None
  3266. */
  3267. static void dp_pdev_deinit_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3268. {
  3269. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3270. struct dp_soc *soc = pdev->soc;
  3271. soc->dp_soc_reinit = TRUE;
  3272. dp_pdev_deinit(txrx_pdev, force);
  3273. }
  3274. /*
  3275. * dp_pdev_detach() - Complete rest of pdev detach
  3276. * @txrx_pdev: Datapath PDEV handle
  3277. * @force: Force deinit
  3278. *
  3279. * Return: None
  3280. */
  3281. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force)
  3282. {
  3283. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3284. struct dp_soc *soc = pdev->soc;
  3285. struct rx_desc_pool *rx_desc_pool;
  3286. int mac_id, mac_for_pdev;
  3287. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3288. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3289. TCL_DATA, pdev->pdev_id);
  3290. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3291. WBM2SW_RELEASE, pdev->pdev_id);
  3292. }
  3293. dp_mon_link_free(pdev);
  3294. /* Cleanup per PDEV REO rings if configured */
  3295. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3296. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3297. REO_DST, pdev->pdev_id);
  3298. }
  3299. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3300. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3301. dp_mon_ring_cleanup(soc, pdev, mac_id);
  3302. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3303. RXDMA_DST, 0);
  3304. if (dp_is_soc_reinit(soc)) {
  3305. mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3306. pdev->pdev_id);
  3307. rx_desc_pool = &soc->rx_desc_status[mac_for_pdev];
  3308. dp_rx_desc_free_array(soc, rx_desc_pool);
  3309. rx_desc_pool = &soc->rx_desc_mon[mac_for_pdev];
  3310. dp_rx_desc_free_array(soc, rx_desc_pool);
  3311. }
  3312. }
  3313. if (dp_is_soc_reinit(soc)) {
  3314. rx_desc_pool = &soc->rx_desc_buf[pdev->pdev_id];
  3315. dp_rx_desc_free_array(soc, rx_desc_pool);
  3316. }
  3317. soc->pdev_list[pdev->pdev_id] = NULL;
  3318. qdf_mem_free(pdev);
  3319. }
  3320. /*
  3321. * dp_pdev_detach_wifi3() - detach txrx pdev
  3322. * @txrx_pdev: Datapath PDEV handle
  3323. * @force: Force detach
  3324. *
  3325. * Return: None
  3326. */
  3327. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3328. {
  3329. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3330. struct dp_soc *soc = pdev->soc;
  3331. if (dp_is_soc_reinit(soc)) {
  3332. dp_pdev_detach(txrx_pdev, force);
  3333. } else {
  3334. dp_pdev_deinit(txrx_pdev, force);
  3335. dp_pdev_detach(txrx_pdev, force);
  3336. }
  3337. }
  3338. /*
  3339. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  3340. * @soc: DP SOC handle
  3341. */
  3342. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  3343. {
  3344. struct reo_desc_list_node *desc;
  3345. struct dp_rx_tid *rx_tid;
  3346. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  3347. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  3348. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  3349. rx_tid = &desc->rx_tid;
  3350. qdf_mem_unmap_nbytes_single(soc->osdev,
  3351. rx_tid->hw_qdesc_paddr,
  3352. QDF_DMA_BIDIRECTIONAL,
  3353. rx_tid->hw_qdesc_alloc_size);
  3354. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  3355. qdf_mem_free(desc);
  3356. }
  3357. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  3358. qdf_list_destroy(&soc->reo_desc_freelist);
  3359. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  3360. }
  3361. /**
  3362. * dp_soc_mem_reset() - Reset Dp Soc memory
  3363. * @soc: DP handle
  3364. *
  3365. * Return: None
  3366. */
  3367. static void dp_soc_mem_reset(struct dp_soc *soc)
  3368. {
  3369. uint16_t len = 0;
  3370. uint8_t *dp_soc_offset = (uint8_t *)soc;
  3371. len = sizeof(struct dp_soc) -
  3372. offsetof(struct dp_soc, dp_soc_reinit) -
  3373. sizeof(soc->dp_soc_reinit);
  3374. dp_soc_offset = dp_soc_offset +
  3375. offsetof(struct dp_soc, dp_soc_reinit) +
  3376. sizeof(soc->dp_soc_reinit);
  3377. qdf_mem_zero(dp_soc_offset, len);
  3378. }
  3379. /**
  3380. * dp_soc_deinit() - Deinitialize txrx SOC
  3381. * @txrx_soc: Opaque DP SOC handle
  3382. *
  3383. * Return: None
  3384. */
  3385. static void dp_soc_deinit(void *txrx_soc)
  3386. {
  3387. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3388. int i;
  3389. qdf_atomic_set(&soc->cmn_init_done, 0);
  3390. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3391. if (soc->pdev_list[i])
  3392. dp_pdev_deinit((struct cdp_pdev *)
  3393. soc->pdev_list[i], 1);
  3394. }
  3395. qdf_flush_work(&soc->htt_stats.work);
  3396. qdf_disable_work(&soc->htt_stats.work);
  3397. /* Free pending htt stats messages */
  3398. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  3399. dp_reo_cmdlist_destroy(soc);
  3400. dp_peer_find_detach(soc);
  3401. /* Free the ring memories */
  3402. /* Common rings */
  3403. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3404. /* Tx data rings */
  3405. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3406. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3407. dp_srng_deinit(soc, &soc->tcl_data_ring[i],
  3408. TCL_DATA, i);
  3409. dp_srng_deinit(soc, &soc->tx_comp_ring[i],
  3410. WBM2SW_RELEASE, i);
  3411. }
  3412. }
  3413. /* TCL command and status rings */
  3414. dp_srng_deinit(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3415. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3416. /* Rx data rings */
  3417. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3418. soc->num_reo_dest_rings =
  3419. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3420. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3421. /* TODO: Get number of rings and ring sizes
  3422. * from wlan_cfg
  3423. */
  3424. dp_srng_deinit(soc, &soc->reo_dest_ring[i],
  3425. REO_DST, i);
  3426. }
  3427. }
  3428. /* REO reinjection ring */
  3429. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3430. /* Rx release ring */
  3431. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3432. /* Rx exception ring */
  3433. /* TODO: Better to store ring_type and ring_num in
  3434. * dp_srng during setup
  3435. */
  3436. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3437. /* REO command and status rings */
  3438. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3439. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3440. dp_soc_wds_detach(soc);
  3441. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  3442. qdf_spinlock_destroy(&soc->htt_stats.lock);
  3443. htt_soc_htc_dealloc(soc->htt_handle);
  3444. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  3445. dp_reo_cmdlist_destroy(soc);
  3446. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  3447. dp_reo_desc_freelist_destroy(soc);
  3448. qdf_spinlock_destroy(&soc->ast_lock);
  3449. dp_soc_mem_reset(soc);
  3450. }
  3451. /**
  3452. * dp_soc_deinit_wifi3() - Deinitialize txrx SOC
  3453. * @txrx_soc: Opaque DP SOC handle
  3454. *
  3455. * Return: None
  3456. */
  3457. static void dp_soc_deinit_wifi3(void *txrx_soc)
  3458. {
  3459. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3460. soc->dp_soc_reinit = 1;
  3461. dp_soc_deinit(txrx_soc);
  3462. }
  3463. /*
  3464. * dp_soc_detach() - Detach rest of txrx SOC
  3465. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3466. *
  3467. * Return: None
  3468. */
  3469. static void dp_soc_detach(void *txrx_soc)
  3470. {
  3471. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3472. int i;
  3473. qdf_atomic_set(&soc->cmn_init_done, 0);
  3474. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  3475. * SW descriptors
  3476. */
  3477. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3478. if (soc->pdev_list[i])
  3479. dp_pdev_detach((struct cdp_pdev *)
  3480. soc->pdev_list[i], 1);
  3481. }
  3482. /* Free the ring memories */
  3483. /* Common rings */
  3484. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3485. dp_tx_soc_detach(soc);
  3486. /* Tx data rings */
  3487. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3488. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3489. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  3490. TCL_DATA, i);
  3491. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  3492. WBM2SW_RELEASE, i);
  3493. }
  3494. }
  3495. /* TCL command and status rings */
  3496. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3497. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3498. /* Rx data rings */
  3499. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3500. soc->num_reo_dest_rings =
  3501. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3502. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3503. /* TODO: Get number of rings and ring sizes
  3504. * from wlan_cfg
  3505. */
  3506. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  3507. REO_DST, i);
  3508. }
  3509. }
  3510. /* REO reinjection ring */
  3511. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3512. /* Rx release ring */
  3513. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3514. /* Rx exception ring */
  3515. /* TODO: Better to store ring_type and ring_num in
  3516. * dp_srng during setup
  3517. */
  3518. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3519. /* REO command and status rings */
  3520. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3521. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3522. dp_hw_link_desc_pool_cleanup(soc);
  3523. htt_soc_detach(soc->htt_handle);
  3524. soc->dp_soc_reinit = 0;
  3525. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  3526. qdf_mem_free(soc);
  3527. }
  3528. /*
  3529. * dp_soc_detach_wifi3() - Detach txrx SOC
  3530. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3531. *
  3532. * Return: None
  3533. */
  3534. static void dp_soc_detach_wifi3(void *txrx_soc)
  3535. {
  3536. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3537. if (dp_is_soc_reinit(soc)) {
  3538. dp_soc_detach(txrx_soc);
  3539. } else {
  3540. dp_soc_deinit(txrx_soc);
  3541. dp_soc_detach(txrx_soc);
  3542. }
  3543. }
  3544. #if !defined(DISABLE_MON_CONFIG)
  3545. /**
  3546. * dp_mon_htt_srng_setup() - Prepare HTT messages for Monitor rings
  3547. * @soc: soc handle
  3548. * @pdev: physical device handle
  3549. * @mac_id: ring number
  3550. * @mac_for_pdev: mac_id
  3551. *
  3552. * Return: non-zero for failure, zero for success
  3553. */
  3554. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3555. struct dp_pdev *pdev,
  3556. int mac_id,
  3557. int mac_for_pdev)
  3558. {
  3559. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3560. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3561. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3562. pdev->rxdma_mon_buf_ring[mac_id]
  3563. .hal_srng,
  3564. RXDMA_MONITOR_BUF);
  3565. if (status != QDF_STATUS_SUCCESS) {
  3566. dp_err("Failed to send htt srng setup message for Rxdma mon buf ring");
  3567. return status;
  3568. }
  3569. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3570. pdev->rxdma_mon_dst_ring[mac_id]
  3571. .hal_srng,
  3572. RXDMA_MONITOR_DST);
  3573. if (status != QDF_STATUS_SUCCESS) {
  3574. dp_err("Failed to send htt srng setup message for Rxdma mon dst ring");
  3575. return status;
  3576. }
  3577. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3578. pdev->rxdma_mon_status_ring[mac_id]
  3579. .hal_srng,
  3580. RXDMA_MONITOR_STATUS);
  3581. if (status != QDF_STATUS_SUCCESS) {
  3582. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3583. return status;
  3584. }
  3585. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3586. pdev->rxdma_mon_desc_ring[mac_id]
  3587. .hal_srng,
  3588. RXDMA_MONITOR_DESC);
  3589. if (status != QDF_STATUS_SUCCESS) {
  3590. dp_err("Failed to send htt srng message for Rxdma mon desc ring");
  3591. return status;
  3592. }
  3593. } else {
  3594. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3595. pdev->rxdma_mon_status_ring[mac_id]
  3596. .hal_srng,
  3597. RXDMA_MONITOR_STATUS);
  3598. if (status != QDF_STATUS_SUCCESS) {
  3599. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3600. return status;
  3601. }
  3602. }
  3603. return status;
  3604. }
  3605. #else
  3606. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3607. struct dp_pdev *pdev,
  3608. int mac_id,
  3609. int mac_for_pdev)
  3610. {
  3611. return QDF_STATUS_SUCCESS;
  3612. }
  3613. #endif
  3614. /*
  3615. * dp_rxdma_ring_config() - configure the RX DMA rings
  3616. *
  3617. * This function is used to configure the MAC rings.
  3618. * On MCL host provides buffers in Host2FW ring
  3619. * FW refills (copies) buffers to the ring and updates
  3620. * ring_idx in register
  3621. *
  3622. * @soc: data path SoC handle
  3623. *
  3624. * Return: zero on success, non-zero on failure
  3625. */
  3626. #ifdef QCA_HOST2FW_RXBUF_RING
  3627. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3628. {
  3629. int i;
  3630. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3631. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3632. struct dp_pdev *pdev = soc->pdev_list[i];
  3633. if (pdev) {
  3634. int mac_id;
  3635. bool dbs_enable = 0;
  3636. int max_mac_rings =
  3637. wlan_cfg_get_num_mac_rings
  3638. (pdev->wlan_cfg_ctx);
  3639. htt_srng_setup(soc->htt_handle, 0,
  3640. pdev->rx_refill_buf_ring.hal_srng,
  3641. RXDMA_BUF);
  3642. if (pdev->rx_refill_buf_ring2.hal_srng)
  3643. htt_srng_setup(soc->htt_handle, 0,
  3644. pdev->rx_refill_buf_ring2.hal_srng,
  3645. RXDMA_BUF);
  3646. if (soc->cdp_soc.ol_ops->
  3647. is_hw_dbs_2x2_capable) {
  3648. dbs_enable = soc->cdp_soc.ol_ops->
  3649. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  3650. }
  3651. if (dbs_enable) {
  3652. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3653. QDF_TRACE_LEVEL_ERROR,
  3654. FL("DBS enabled max_mac_rings %d"),
  3655. max_mac_rings);
  3656. } else {
  3657. max_mac_rings = 1;
  3658. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3659. QDF_TRACE_LEVEL_ERROR,
  3660. FL("DBS disabled, max_mac_rings %d"),
  3661. max_mac_rings);
  3662. }
  3663. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3664. FL("pdev_id %d max_mac_rings %d"),
  3665. pdev->pdev_id, max_mac_rings);
  3666. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  3667. int mac_for_pdev = dp_get_mac_id_for_pdev(
  3668. mac_id, pdev->pdev_id);
  3669. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3670. QDF_TRACE_LEVEL_ERROR,
  3671. FL("mac_id %d"), mac_for_pdev);
  3672. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3673. pdev->rx_mac_buf_ring[mac_id]
  3674. .hal_srng,
  3675. RXDMA_BUF);
  3676. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3677. pdev->rxdma_err_dst_ring[mac_id]
  3678. .hal_srng,
  3679. RXDMA_DST);
  3680. /* Configure monitor mode rings */
  3681. status = dp_mon_htt_srng_setup(soc, pdev,
  3682. mac_id,
  3683. mac_for_pdev);
  3684. if (status != QDF_STATUS_SUCCESS) {
  3685. dp_err("Failed to send htt monitor messages to target");
  3686. return status;
  3687. }
  3688. }
  3689. }
  3690. }
  3691. /*
  3692. * Timer to reap rxdma status rings.
  3693. * Needed until we enable ppdu end interrupts
  3694. */
  3695. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  3696. dp_service_mon_rings, (void *)soc,
  3697. QDF_TIMER_TYPE_WAKE_APPS);
  3698. soc->reap_timer_init = 1;
  3699. return status;
  3700. }
  3701. #else
  3702. /* This is only for WIN */
  3703. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3704. {
  3705. int i;
  3706. int mac_id;
  3707. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3708. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3709. struct dp_pdev *pdev = soc->pdev_list[i];
  3710. if (!pdev)
  3711. continue;
  3712. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3713. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  3714. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3715. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3716. #ifndef DISABLE_MON_CONFIG
  3717. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3718. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3719. RXDMA_MONITOR_BUF);
  3720. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3721. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3722. RXDMA_MONITOR_DST);
  3723. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3724. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3725. RXDMA_MONITOR_STATUS);
  3726. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3727. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3728. RXDMA_MONITOR_DESC);
  3729. #endif
  3730. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3731. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3732. RXDMA_DST);
  3733. }
  3734. }
  3735. return status;
  3736. }
  3737. #endif
  3738. #ifdef NO_RX_PKT_HDR_TLV
  3739. static QDF_STATUS
  3740. dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
  3741. {
  3742. int i;
  3743. int mac_id;
  3744. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  3745. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3746. htt_tlv_filter.mpdu_start = 1;
  3747. htt_tlv_filter.msdu_start = 1;
  3748. htt_tlv_filter.mpdu_end = 1;
  3749. htt_tlv_filter.msdu_end = 1;
  3750. htt_tlv_filter.attention = 1;
  3751. htt_tlv_filter.packet = 1;
  3752. htt_tlv_filter.packet_header = 0;
  3753. htt_tlv_filter.ppdu_start = 0;
  3754. htt_tlv_filter.ppdu_end = 0;
  3755. htt_tlv_filter.ppdu_end_user_stats = 0;
  3756. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3757. htt_tlv_filter.ppdu_end_status_done = 0;
  3758. htt_tlv_filter.enable_fp = 1;
  3759. htt_tlv_filter.enable_md = 0;
  3760. htt_tlv_filter.enable_md = 0;
  3761. htt_tlv_filter.enable_mo = 0;
  3762. htt_tlv_filter.fp_mgmt_filter = 0;
  3763. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  3764. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  3765. FILTER_DATA_MCAST |
  3766. FILTER_DATA_DATA);
  3767. htt_tlv_filter.mo_mgmt_filter = 0;
  3768. htt_tlv_filter.mo_ctrl_filter = 0;
  3769. htt_tlv_filter.mo_data_filter = 0;
  3770. htt_tlv_filter.md_data_filter = 0;
  3771. htt_tlv_filter.offset_valid = true;
  3772. htt_tlv_filter.rx_packet_offset = RX_PKT_TLVS_LEN;
  3773. /*Not subscribing rx_pkt_header*/
  3774. htt_tlv_filter.rx_header_offset = 0;
  3775. htt_tlv_filter.rx_mpdu_start_offset =
  3776. HAL_RX_PKT_TLV_MPDU_START_OFFSET(soc->hal_soc);
  3777. htt_tlv_filter.rx_mpdu_end_offset =
  3778. HAL_RX_PKT_TLV_MPDU_END_OFFSET(soc->hal_soc);
  3779. htt_tlv_filter.rx_msdu_start_offset =
  3780. HAL_RX_PKT_TLV_MSDU_START_OFFSET(soc->hal_soc);
  3781. htt_tlv_filter.rx_msdu_end_offset =
  3782. HAL_RX_PKT_TLV_MSDU_END_OFFSET(soc->hal_soc);
  3783. htt_tlv_filter.rx_attn_offset =
  3784. HAL_RX_PKT_TLV_ATTN_OFFSET(soc->hal_soc);
  3785. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3786. struct dp_pdev *pdev = soc->pdev_list[i];
  3787. if (!pdev)
  3788. continue;
  3789. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3790. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3791. pdev->pdev_id);
  3792. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3793. pdev->rx_refill_buf_ring.hal_srng,
  3794. RXDMA_BUF, RX_BUFFER_SIZE,
  3795. &htt_tlv_filter);
  3796. }
  3797. }
  3798. return status;
  3799. }
  3800. #else
  3801. static QDF_STATUS
  3802. dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
  3803. {
  3804. return QDF_STATUS_SUCCESS;
  3805. }
  3806. #endif
  3807. /*
  3808. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3809. * @cdp_soc: Opaque Datapath SOC handle
  3810. *
  3811. * Return: zero on success, non-zero on failure
  3812. */
  3813. static QDF_STATUS
  3814. dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3815. {
  3816. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3817. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3818. htt_soc_attach_target(soc->htt_handle);
  3819. status = dp_rxdma_ring_config(soc);
  3820. if (status != QDF_STATUS_SUCCESS) {
  3821. dp_err("Failed to send htt srng setup messages to target");
  3822. return status;
  3823. }
  3824. status = dp_rxdma_ring_sel_cfg(soc);
  3825. if (status != QDF_STATUS_SUCCESS) {
  3826. dp_err("Failed to send htt ring config message to target");
  3827. return status;
  3828. }
  3829. DP_STATS_INIT(soc);
  3830. /* initialize work queue for stats processing */
  3831. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3832. return QDF_STATUS_SUCCESS;
  3833. }
  3834. /*
  3835. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3836. * @txrx_soc: Datapath SOC handle
  3837. */
  3838. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3839. {
  3840. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3841. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3842. }
  3843. /*
  3844. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3845. * @txrx_soc: Datapath SOC handle
  3846. * @nss_cfg: nss config
  3847. */
  3848. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3849. {
  3850. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3851. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3852. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3853. /*
  3854. * TODO: masked out based on the per offloaded radio
  3855. */
  3856. switch (config) {
  3857. case dp_nss_cfg_default:
  3858. break;
  3859. case dp_nss_cfg_dbdc:
  3860. case dp_nss_cfg_dbtc:
  3861. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3862. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3863. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3864. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3865. break;
  3866. default:
  3867. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3868. "Invalid offload config %d", config);
  3869. }
  3870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3871. FL("nss-wifi<0> nss config is enabled"));
  3872. }
  3873. /*
  3874. * dp_vdev_attach_wifi3() - attach txrx vdev
  3875. * @txrx_pdev: Datapath PDEV handle
  3876. * @vdev_mac_addr: MAC address of the virtual interface
  3877. * @vdev_id: VDEV Id
  3878. * @wlan_op_mode: VDEV operating mode
  3879. *
  3880. * Return: DP VDEV handle on success, NULL on failure
  3881. */
  3882. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3883. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3884. {
  3885. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3886. struct dp_soc *soc = pdev->soc;
  3887. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3888. if (!vdev) {
  3889. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3890. FL("DP VDEV memory allocation failed"));
  3891. goto fail0;
  3892. }
  3893. vdev->pdev = pdev;
  3894. vdev->vdev_id = vdev_id;
  3895. vdev->opmode = op_mode;
  3896. vdev->osdev = soc->osdev;
  3897. vdev->osif_rx = NULL;
  3898. vdev->osif_rsim_rx_decap = NULL;
  3899. vdev->osif_get_key = NULL;
  3900. vdev->osif_rx_mon = NULL;
  3901. vdev->osif_tx_free_ext = NULL;
  3902. vdev->osif_vdev = NULL;
  3903. vdev->delete.pending = 0;
  3904. vdev->safemode = 0;
  3905. vdev->drop_unenc = 1;
  3906. vdev->sec_type = cdp_sec_type_none;
  3907. #ifdef notyet
  3908. vdev->filters_num = 0;
  3909. #endif
  3910. qdf_mem_copy(
  3911. &vdev->mac_addr.raw[0], vdev_mac_addr, QDF_MAC_ADDR_SIZE);
  3912. /* TODO: Initialize default HTT meta data that will be used in
  3913. * TCL descriptors for packets transmitted from this VDEV
  3914. */
  3915. TAILQ_INIT(&vdev->peer_list);
  3916. if ((soc->intr_mode == DP_INTR_POLL) &&
  3917. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3918. if ((pdev->vdev_count == 0) ||
  3919. (wlan_op_mode_monitor == vdev->opmode))
  3920. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3921. }
  3922. if (wlan_op_mode_monitor == vdev->opmode) {
  3923. pdev->monitor_vdev = vdev;
  3924. return (struct cdp_vdev *)vdev;
  3925. }
  3926. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3927. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3928. vdev->dscp_tid_map_id = 0;
  3929. vdev->mcast_enhancement_en = 0;
  3930. vdev->raw_mode_war = wlan_cfg_get_raw_mode_war(soc->wlan_cfg_ctx);
  3931. vdev->prev_tx_enq_tstamp = 0;
  3932. vdev->prev_rx_deliver_tstamp = 0;
  3933. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3934. /* add this vdev into the pdev's list */
  3935. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3936. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3937. pdev->vdev_count++;
  3938. dp_tx_vdev_attach(vdev);
  3939. if (pdev->vdev_count == 1)
  3940. dp_lro_hash_setup(soc, pdev);
  3941. dp_info("Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3942. DP_STATS_INIT(vdev);
  3943. if (wlan_op_mode_sta == vdev->opmode)
  3944. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3945. vdev->mac_addr.raw,
  3946. NULL);
  3947. return (struct cdp_vdev *)vdev;
  3948. fail0:
  3949. return NULL;
  3950. }
  3951. /**
  3952. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3953. * @vdev: Datapath VDEV handle
  3954. * @osif_vdev: OSIF vdev handle
  3955. * @ctrl_vdev: UMAC vdev handle
  3956. * @txrx_ops: Tx and Rx operations
  3957. *
  3958. * Return: DP VDEV handle on success, NULL on failure
  3959. */
  3960. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3961. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3962. struct ol_txrx_ops *txrx_ops)
  3963. {
  3964. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3965. vdev->osif_vdev = osif_vdev;
  3966. vdev->ctrl_vdev = ctrl_vdev;
  3967. vdev->osif_rx = txrx_ops->rx.rx;
  3968. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3969. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3970. vdev->osif_get_key = txrx_ops->get_key;
  3971. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3972. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3973. vdev->tx_comp = txrx_ops->tx.tx_comp;
  3974. #ifdef notyet
  3975. #if ATH_SUPPORT_WAPI
  3976. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3977. #endif
  3978. #endif
  3979. #ifdef UMAC_SUPPORT_PROXY_ARP
  3980. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3981. #endif
  3982. vdev->me_convert = txrx_ops->me_convert;
  3983. /* TODO: Enable the following once Tx code is integrated */
  3984. if (vdev->mesh_vdev)
  3985. txrx_ops->tx.tx = dp_tx_send_mesh;
  3986. else
  3987. txrx_ops->tx.tx = dp_tx_send;
  3988. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3990. "DP Vdev Register success");
  3991. }
  3992. /**
  3993. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3994. * @vdev: Datapath VDEV handle
  3995. * @unmap_only: Flag to indicate "only unmap"
  3996. *
  3997. * Return: void
  3998. */
  3999. static void dp_vdev_flush_peers(struct cdp_vdev *vdev_handle, bool unmap_only)
  4000. {
  4001. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4002. struct dp_pdev *pdev = vdev->pdev;
  4003. struct dp_soc *soc = pdev->soc;
  4004. struct dp_peer *peer;
  4005. uint16_t *peer_ids;
  4006. struct dp_ast_entry *ase, *tmp_ase;
  4007. uint8_t i = 0, j = 0;
  4008. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  4009. if (!peer_ids) {
  4010. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4011. "DP alloc failure - unable to flush peers");
  4012. return;
  4013. }
  4014. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4015. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4016. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  4017. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  4018. if (j < soc->max_peers)
  4019. peer_ids[j++] = peer->peer_ids[i];
  4020. }
  4021. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4022. for (i = 0; i < j ; i++) {
  4023. if (unmap_only) {
  4024. peer = __dp_peer_find_by_id(soc, peer_ids[i]);
  4025. if (peer) {
  4026. if (soc->is_peer_map_unmap_v2) {
  4027. /* free AST entries of peer before
  4028. * release peer reference
  4029. */
  4030. DP_PEER_ITERATE_ASE_LIST(peer, ase,
  4031. tmp_ase) {
  4032. dp_rx_peer_unmap_handler
  4033. (soc, peer_ids[i],
  4034. vdev->vdev_id,
  4035. ase->mac_addr.raw,
  4036. 1);
  4037. }
  4038. }
  4039. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  4040. vdev->vdev_id,
  4041. peer->mac_addr.raw,
  4042. 0);
  4043. }
  4044. } else {
  4045. peer = dp_peer_find_by_id(soc, peer_ids[i]);
  4046. if (peer) {
  4047. dp_info("peer: %pM is getting flush",
  4048. peer->mac_addr.raw);
  4049. if (soc->is_peer_map_unmap_v2) {
  4050. /* free AST entries of peer before
  4051. * release peer reference
  4052. */
  4053. DP_PEER_ITERATE_ASE_LIST(peer, ase,
  4054. tmp_ase) {
  4055. dp_rx_peer_unmap_handler
  4056. (soc, peer_ids[i],
  4057. vdev->vdev_id,
  4058. ase->mac_addr.raw,
  4059. 1);
  4060. }
  4061. }
  4062. dp_peer_delete_wifi3(peer, 0);
  4063. /*
  4064. * we need to call dp_peer_unref_del_find_by_id
  4065. * to remove additional ref count incremented
  4066. * by dp_peer_find_by_id() call.
  4067. *
  4068. * Hold the ref count while executing
  4069. * dp_peer_delete_wifi3() call.
  4070. *
  4071. */
  4072. dp_peer_unref_del_find_by_id(peer);
  4073. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  4074. vdev->vdev_id,
  4075. peer->mac_addr.raw, 0);
  4076. }
  4077. }
  4078. }
  4079. qdf_mem_free(peer_ids);
  4080. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4081. FL("Flushed peers for vdev object %pK "), vdev);
  4082. }
  4083. /*
  4084. * dp_vdev_detach_wifi3() - Detach txrx vdev
  4085. * @txrx_vdev: Datapath VDEV handle
  4086. * @callback: Callback OL_IF on completion of detach
  4087. * @cb_context: Callback context
  4088. *
  4089. */
  4090. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  4091. ol_txrx_vdev_delete_cb callback, void *cb_context)
  4092. {
  4093. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4094. struct dp_pdev *pdev;
  4095. struct dp_soc *soc;
  4096. struct dp_neighbour_peer *peer = NULL;
  4097. struct dp_neighbour_peer *temp_peer = NULL;
  4098. /* preconditions */
  4099. qdf_assert_always(vdev);
  4100. pdev = vdev->pdev;
  4101. soc = pdev->soc;
  4102. if (wlan_op_mode_monitor == vdev->opmode)
  4103. goto free_vdev;
  4104. if (wlan_op_mode_sta == vdev->opmode)
  4105. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  4106. /*
  4107. * If Target is hung, flush all peers before detaching vdev
  4108. * this will free all references held due to missing
  4109. * unmap commands from Target
  4110. */
  4111. if (!hif_is_target_ready(HIF_GET_SOFTC(soc->hif_handle)))
  4112. dp_vdev_flush_peers((struct cdp_vdev *)vdev, false);
  4113. /*
  4114. * Use peer_ref_mutex while accessing peer_list, in case
  4115. * a peer is in the process of being removed from the list.
  4116. */
  4117. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4118. /* check that the vdev has no peers allocated */
  4119. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  4120. /* debug print - will be removed later */
  4121. dp_warn("not deleting vdev object %pK (%pM) until deletion finishes for all its peers",
  4122. vdev, vdev->mac_addr.raw);
  4123. /* indicate that the vdev needs to be deleted */
  4124. vdev->delete.pending = 1;
  4125. vdev->delete.callback = callback;
  4126. vdev->delete.context = cb_context;
  4127. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4128. return;
  4129. }
  4130. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4131. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4132. if (!soc->hw_nac_monitor_support) {
  4133. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4134. neighbour_peer_list_elem) {
  4135. QDF_ASSERT(peer->vdev != vdev);
  4136. }
  4137. } else {
  4138. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  4139. neighbour_peer_list_elem, temp_peer) {
  4140. if (peer->vdev == vdev) {
  4141. TAILQ_REMOVE(&pdev->neighbour_peers_list, peer,
  4142. neighbour_peer_list_elem);
  4143. qdf_mem_free(peer);
  4144. }
  4145. }
  4146. }
  4147. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4148. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4149. dp_tx_vdev_detach(vdev);
  4150. /* remove the vdev from its parent pdev's list */
  4151. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4152. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4153. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  4154. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4155. free_vdev:
  4156. qdf_mem_free(vdev);
  4157. if (callback)
  4158. callback(cb_context);
  4159. }
  4160. /*
  4161. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  4162. * @soc - datapath soc handle
  4163. * @peer - datapath peer handle
  4164. *
  4165. * Delete the AST entries belonging to a peer
  4166. */
  4167. #ifdef FEATURE_AST
  4168. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  4169. struct dp_peer *peer)
  4170. {
  4171. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  4172. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  4173. dp_peer_del_ast(soc, ast_entry);
  4174. peer->self_ast_entry = NULL;
  4175. }
  4176. #else
  4177. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  4178. struct dp_peer *peer)
  4179. {
  4180. }
  4181. #endif
  4182. #if ATH_SUPPORT_WRAP
  4183. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  4184. uint8_t *peer_mac_addr)
  4185. {
  4186. struct dp_peer *peer;
  4187. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  4188. 0, vdev->vdev_id);
  4189. if (!peer)
  4190. return NULL;
  4191. if (peer->bss_peer)
  4192. return peer;
  4193. dp_peer_unref_delete(peer);
  4194. return NULL;
  4195. }
  4196. #else
  4197. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  4198. uint8_t *peer_mac_addr)
  4199. {
  4200. struct dp_peer *peer;
  4201. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  4202. 0, vdev->vdev_id);
  4203. if (!peer)
  4204. return NULL;
  4205. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  4206. return peer;
  4207. dp_peer_unref_delete(peer);
  4208. return NULL;
  4209. }
  4210. #endif
  4211. #ifdef FEATURE_AST
  4212. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  4213. struct dp_pdev *pdev,
  4214. uint8_t *peer_mac_addr)
  4215. {
  4216. struct dp_ast_entry *ast_entry;
  4217. qdf_spin_lock_bh(&soc->ast_lock);
  4218. if (soc->ast_override_support)
  4219. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, peer_mac_addr,
  4220. pdev->pdev_id);
  4221. else
  4222. ast_entry = dp_peer_ast_hash_find_soc(soc, peer_mac_addr);
  4223. if (ast_entry && ast_entry->next_hop &&
  4224. !ast_entry->delete_in_progress)
  4225. dp_peer_del_ast(soc, ast_entry);
  4226. qdf_spin_unlock_bh(&soc->ast_lock);
  4227. }
  4228. #endif
  4229. /*
  4230. * dp_peer_create_wifi3() - attach txrx peer
  4231. * @txrx_vdev: Datapath VDEV handle
  4232. * @peer_mac_addr: Peer MAC address
  4233. *
  4234. * Return: DP peeer handle on success, NULL on failure
  4235. */
  4236. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  4237. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  4238. {
  4239. struct dp_peer *peer;
  4240. int i;
  4241. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4242. struct dp_pdev *pdev;
  4243. struct dp_soc *soc;
  4244. struct cdp_peer_cookie peer_cookie;
  4245. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  4246. /* preconditions */
  4247. qdf_assert(vdev);
  4248. qdf_assert(peer_mac_addr);
  4249. pdev = vdev->pdev;
  4250. soc = pdev->soc;
  4251. /*
  4252. * If a peer entry with given MAC address already exists,
  4253. * reuse the peer and reset the state of peer.
  4254. */
  4255. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  4256. if (peer) {
  4257. qdf_atomic_init(&peer->is_default_route_set);
  4258. dp_peer_cleanup(vdev, peer);
  4259. qdf_spin_lock_bh(&soc->ast_lock);
  4260. dp_peer_delete_ast_entries(soc, peer);
  4261. peer->delete_in_progress = false;
  4262. qdf_spin_unlock_bh(&soc->ast_lock);
  4263. if ((vdev->opmode == wlan_op_mode_sta) &&
  4264. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4265. QDF_MAC_ADDR_SIZE)) {
  4266. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4267. }
  4268. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4269. /*
  4270. * Control path maintains a node count which is incremented
  4271. * for every new peer create command. Since new peer is not being
  4272. * created and earlier reference is reused here,
  4273. * peer_unref_delete event is sent to control path to
  4274. * increment the count back.
  4275. */
  4276. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  4277. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4278. peer->mac_addr.raw, vdev->mac_addr.raw,
  4279. vdev->opmode, peer->ctrl_peer, ctrl_peer);
  4280. }
  4281. peer->ctrl_peer = ctrl_peer;
  4282. dp_local_peer_id_alloc(pdev, peer);
  4283. DP_STATS_INIT(peer);
  4284. return (void *)peer;
  4285. } else {
  4286. /*
  4287. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  4288. * need to remove the AST entry which was earlier added as a WDS
  4289. * entry.
  4290. * If an AST entry exists, but no peer entry exists with a given
  4291. * MAC addresses, we could deduce it as a WDS entry
  4292. */
  4293. dp_peer_ast_handle_roam_del(soc, pdev, peer_mac_addr);
  4294. }
  4295. #ifdef notyet
  4296. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  4297. soc->mempool_ol_ath_peer);
  4298. #else
  4299. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  4300. #endif
  4301. if (!peer)
  4302. return NULL; /* failure */
  4303. qdf_mem_zero(peer, sizeof(struct dp_peer));
  4304. TAILQ_INIT(&peer->ast_entry_list);
  4305. /* store provided params */
  4306. peer->vdev = vdev;
  4307. peer->ctrl_peer = ctrl_peer;
  4308. if ((vdev->opmode == wlan_op_mode_sta) &&
  4309. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4310. QDF_MAC_ADDR_SIZE)) {
  4311. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4312. }
  4313. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4314. qdf_spinlock_create(&peer->peer_info_lock);
  4315. qdf_mem_copy(
  4316. &peer->mac_addr.raw[0], peer_mac_addr, QDF_MAC_ADDR_SIZE);
  4317. /* TODO: See of rx_opt_proc is really required */
  4318. peer->rx_opt_proc = soc->rx_opt_proc;
  4319. /* initialize the peer_id */
  4320. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  4321. peer->peer_ids[i] = HTT_INVALID_PEER;
  4322. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4323. qdf_atomic_init(&peer->ref_cnt);
  4324. /* keep one reference for attach */
  4325. qdf_atomic_inc(&peer->ref_cnt);
  4326. /* add this peer into the vdev's list */
  4327. if (wlan_op_mode_sta == vdev->opmode)
  4328. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  4329. else
  4330. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  4331. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4332. /* TODO: See if hash based search is required */
  4333. dp_peer_find_hash_add(soc, peer);
  4334. /* Initialize the peer state */
  4335. peer->state = OL_TXRX_PEER_STATE_DISC;
  4336. dp_info("vdev %pK created peer %pK (%pM) ref_cnt: %d",
  4337. vdev, peer, peer->mac_addr.raw,
  4338. qdf_atomic_read(&peer->ref_cnt));
  4339. /*
  4340. * For every peer MAp message search and set if bss_peer
  4341. */
  4342. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  4343. dp_info("vdev bss_peer!!");
  4344. peer->bss_peer = 1;
  4345. vdev->vap_bss_peer = peer;
  4346. }
  4347. for (i = 0; i < DP_MAX_TIDS; i++)
  4348. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  4349. dp_local_peer_id_alloc(pdev, peer);
  4350. DP_STATS_INIT(peer);
  4351. qdf_mem_copy(peer_cookie.mac_addr, peer->mac_addr.raw,
  4352. QDF_MAC_ADDR_SIZE);
  4353. peer_cookie.ctx = NULL;
  4354. peer_cookie.cookie = pdev->next_peer_cookie++;
  4355. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  4356. dp_wdi_event_handler(WDI_EVENT_PEER_CREATE, pdev->soc,
  4357. (void *)&peer_cookie,
  4358. peer->peer_ids[0], WDI_NO_VAL, pdev->pdev_id);
  4359. #endif
  4360. if (soc->wlanstats_enabled) {
  4361. if (!peer_cookie.ctx) {
  4362. pdev->next_peer_cookie--;
  4363. qdf_err("Failed to initialize peer rate stats");
  4364. } else {
  4365. peer->wlanstats_ctx = (void *)peer_cookie.ctx;
  4366. }
  4367. }
  4368. return (void *)peer;
  4369. }
  4370. /*
  4371. * dp_vdev_get_default_reo_hash() - get reo dest ring and hash values for a vdev
  4372. * @vdev: Datapath VDEV handle
  4373. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4374. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4375. *
  4376. * Return: None
  4377. */
  4378. static
  4379. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  4380. enum cdp_host_reo_dest_ring *reo_dest,
  4381. bool *hash_based)
  4382. {
  4383. struct dp_soc *soc;
  4384. struct dp_pdev *pdev;
  4385. pdev = vdev->pdev;
  4386. soc = pdev->soc;
  4387. /*
  4388. * hash based steering is disabled for Radios which are offloaded
  4389. * to NSS
  4390. */
  4391. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  4392. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  4393. /*
  4394. * Below line of code will ensure the proper reo_dest ring is chosen
  4395. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  4396. */
  4397. *reo_dest = pdev->reo_dest;
  4398. }
  4399. #ifdef IPA_OFFLOAD
  4400. /*
  4401. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4402. * @vdev: Datapath VDEV handle
  4403. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4404. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4405. *
  4406. * If IPA is enabled in ini, for SAP mode, disable hash based
  4407. * steering, use default reo_dst ring for RX. Use config values for other modes.
  4408. * Return: None
  4409. */
  4410. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4411. enum cdp_host_reo_dest_ring *reo_dest,
  4412. bool *hash_based)
  4413. {
  4414. struct dp_soc *soc;
  4415. struct dp_pdev *pdev;
  4416. pdev = vdev->pdev;
  4417. soc = pdev->soc;
  4418. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4419. /*
  4420. * If IPA is enabled, disable hash-based flow steering and set
  4421. * reo_dest_ring_4 as the REO ring to receive packets on.
  4422. * IPA is configured to reap reo_dest_ring_4.
  4423. *
  4424. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  4425. * value enum value is from 1 - 4.
  4426. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  4427. */
  4428. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4429. if (vdev->opmode == wlan_op_mode_ap) {
  4430. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  4431. *hash_based = 0;
  4432. }
  4433. }
  4434. }
  4435. #else
  4436. /*
  4437. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4438. * @vdev: Datapath VDEV handle
  4439. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4440. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4441. *
  4442. * Use system config values for hash based steering.
  4443. * Return: None
  4444. */
  4445. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4446. enum cdp_host_reo_dest_ring *reo_dest,
  4447. bool *hash_based)
  4448. {
  4449. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4450. }
  4451. #endif /* IPA_OFFLOAD */
  4452. /*
  4453. * dp_peer_setup_wifi3() - initialize the peer
  4454. * @vdev_hdl: virtual device object
  4455. * @peer: Peer object
  4456. *
  4457. * Return: void
  4458. */
  4459. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  4460. {
  4461. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  4462. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4463. struct dp_pdev *pdev;
  4464. struct dp_soc *soc;
  4465. bool hash_based = 0;
  4466. enum cdp_host_reo_dest_ring reo_dest;
  4467. /* preconditions */
  4468. qdf_assert(vdev);
  4469. qdf_assert(peer);
  4470. pdev = vdev->pdev;
  4471. soc = pdev->soc;
  4472. peer->last_assoc_rcvd = 0;
  4473. peer->last_disassoc_rcvd = 0;
  4474. peer->last_deauth_rcvd = 0;
  4475. dp_peer_setup_get_reo_hash(vdev, &reo_dest, &hash_based);
  4476. dp_info("pdev: %d vdev :%d opmode:%u hash-based-steering:%d default-reo_dest:%u",
  4477. pdev->pdev_id, vdev->vdev_id,
  4478. vdev->opmode, hash_based, reo_dest);
  4479. /*
  4480. * There are corner cases where the AD1 = AD2 = "VAPs address"
  4481. * i.e both the devices have same MAC address. In these
  4482. * cases we want such pkts to be processed in NULL Q handler
  4483. * which is REO2TCL ring. for this reason we should
  4484. * not setup reo_queues and default route for bss_peer.
  4485. */
  4486. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap)
  4487. return;
  4488. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  4489. /* TODO: Check the destination ring number to be passed to FW */
  4490. soc->cdp_soc.ol_ops->peer_set_default_routing(
  4491. pdev->ctrl_pdev, peer->mac_addr.raw,
  4492. peer->vdev->vdev_id, hash_based, reo_dest);
  4493. }
  4494. qdf_atomic_set(&peer->is_default_route_set, 1);
  4495. dp_peer_rx_init(pdev, peer);
  4496. return;
  4497. }
  4498. /*
  4499. * dp_cp_peer_del_resp_handler - Handle the peer delete response
  4500. * @soc_hdl: Datapath SOC handle
  4501. * @vdev_hdl: virtual device object
  4502. * @mac_addr: Mac address of the peer
  4503. *
  4504. * Return: void
  4505. */
  4506. static void dp_cp_peer_del_resp_handler(struct cdp_soc_t *soc_hdl,
  4507. struct cdp_vdev *vdev_hdl,
  4508. uint8_t *mac_addr)
  4509. {
  4510. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  4511. struct dp_ast_entry *ast_entry = NULL;
  4512. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4513. txrx_ast_free_cb cb = NULL;
  4514. void *cookie;
  4515. qdf_spin_lock_bh(&soc->ast_lock);
  4516. if (soc->ast_override_support)
  4517. ast_entry =
  4518. dp_peer_ast_hash_find_by_pdevid(soc, mac_addr,
  4519. vdev->pdev->pdev_id);
  4520. else
  4521. ast_entry = dp_peer_ast_hash_find_soc(soc, mac_addr);
  4522. /* in case of qwrap we have multiple BSS peers
  4523. * with same mac address
  4524. *
  4525. * AST entry for this mac address will be created
  4526. * only for one peer hence it will be NULL here
  4527. */
  4528. if (!ast_entry || ast_entry->peer || !ast_entry->delete_in_progress) {
  4529. qdf_spin_unlock_bh(&soc->ast_lock);
  4530. return;
  4531. }
  4532. if (ast_entry->is_mapped)
  4533. soc->ast_table[ast_entry->ast_idx] = NULL;
  4534. DP_STATS_INC(soc, ast.deleted, 1);
  4535. dp_peer_ast_hash_remove(soc, ast_entry);
  4536. cb = ast_entry->callback;
  4537. cookie = ast_entry->cookie;
  4538. ast_entry->callback = NULL;
  4539. ast_entry->cookie = NULL;
  4540. soc->num_ast_entries--;
  4541. qdf_spin_unlock_bh(&soc->ast_lock);
  4542. if (cb) {
  4543. cb(soc->ctrl_psoc,
  4544. soc,
  4545. cookie,
  4546. CDP_TXRX_AST_DELETED);
  4547. }
  4548. qdf_mem_free(ast_entry);
  4549. }
  4550. /*
  4551. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  4552. * @vdev_handle: virtual device object
  4553. * @htt_pkt_type: type of pkt
  4554. *
  4555. * Return: void
  4556. */
  4557. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  4558. enum htt_cmn_pkt_type val)
  4559. {
  4560. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4561. vdev->tx_encap_type = val;
  4562. }
  4563. /*
  4564. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  4565. * @vdev_handle: virtual device object
  4566. * @htt_pkt_type: type of pkt
  4567. *
  4568. * Return: void
  4569. */
  4570. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  4571. enum htt_cmn_pkt_type val)
  4572. {
  4573. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4574. vdev->rx_decap_type = val;
  4575. }
  4576. /*
  4577. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  4578. * @txrx_soc: cdp soc handle
  4579. * @ac: Access category
  4580. * @value: timeout value in millisec
  4581. *
  4582. * Return: void
  4583. */
  4584. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4585. uint8_t ac, uint32_t value)
  4586. {
  4587. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4588. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  4589. }
  4590. /*
  4591. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  4592. * @txrx_soc: cdp soc handle
  4593. * @ac: access category
  4594. * @value: timeout value in millisec
  4595. *
  4596. * Return: void
  4597. */
  4598. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4599. uint8_t ac, uint32_t *value)
  4600. {
  4601. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4602. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  4603. }
  4604. /*
  4605. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  4606. * @pdev_handle: physical device object
  4607. * @val: reo destination ring index (1 - 4)
  4608. *
  4609. * Return: void
  4610. */
  4611. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  4612. enum cdp_host_reo_dest_ring val)
  4613. {
  4614. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4615. if (pdev)
  4616. pdev->reo_dest = val;
  4617. }
  4618. /*
  4619. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  4620. * @pdev_handle: physical device object
  4621. *
  4622. * Return: reo destination ring index
  4623. */
  4624. static enum cdp_host_reo_dest_ring
  4625. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  4626. {
  4627. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4628. if (pdev)
  4629. return pdev->reo_dest;
  4630. else
  4631. return cdp_host_reo_dest_ring_unknown;
  4632. }
  4633. /*
  4634. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  4635. * @pdev_handle: device object
  4636. * @val: value to be set
  4637. *
  4638. * Return: void
  4639. */
  4640. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  4641. uint32_t val)
  4642. {
  4643. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4644. /* Enable/Disable smart mesh filtering. This flag will be checked
  4645. * during rx processing to check if packets are from NAC clients.
  4646. */
  4647. pdev->filter_neighbour_peers = val;
  4648. return 0;
  4649. }
  4650. /*
  4651. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  4652. * address for smart mesh filtering
  4653. * @vdev_handle: virtual device object
  4654. * @cmd: Add/Del command
  4655. * @macaddr: nac client mac address
  4656. *
  4657. * Return: void
  4658. */
  4659. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  4660. uint32_t cmd, uint8_t *macaddr)
  4661. {
  4662. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4663. struct dp_pdev *pdev = vdev->pdev;
  4664. struct dp_neighbour_peer *peer = NULL;
  4665. if (!macaddr)
  4666. goto fail0;
  4667. /* Store address of NAC (neighbour peer) which will be checked
  4668. * against TA of received packets.
  4669. */
  4670. if (cmd == DP_NAC_PARAM_ADD) {
  4671. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  4672. sizeof(*peer));
  4673. if (!peer) {
  4674. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4675. FL("DP neighbour peer node memory allocation failed"));
  4676. goto fail0;
  4677. }
  4678. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  4679. macaddr, QDF_MAC_ADDR_SIZE);
  4680. peer->vdev = vdev;
  4681. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4682. /* add this neighbour peer into the list */
  4683. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  4684. neighbour_peer_list_elem);
  4685. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4686. /* first neighbour */
  4687. if (!pdev->neighbour_peers_added) {
  4688. pdev->neighbour_peers_added = true;
  4689. dp_ppdu_ring_cfg(pdev);
  4690. }
  4691. return 1;
  4692. } else if (cmd == DP_NAC_PARAM_DEL) {
  4693. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4694. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4695. neighbour_peer_list_elem) {
  4696. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  4697. macaddr, QDF_MAC_ADDR_SIZE)) {
  4698. /* delete this peer from the list */
  4699. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  4700. peer, neighbour_peer_list_elem);
  4701. qdf_mem_free(peer);
  4702. break;
  4703. }
  4704. }
  4705. /* last neighbour deleted */
  4706. if (TAILQ_EMPTY(&pdev->neighbour_peers_list)) {
  4707. pdev->neighbour_peers_added = false;
  4708. dp_ppdu_ring_cfg(pdev);
  4709. }
  4710. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4711. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  4712. !pdev->enhanced_stats_en)
  4713. dp_ppdu_ring_reset(pdev);
  4714. return 1;
  4715. }
  4716. fail0:
  4717. return 0;
  4718. }
  4719. /*
  4720. * dp_get_sec_type() - Get the security type
  4721. * @peer: Datapath peer handle
  4722. * @sec_idx: Security id (mcast, ucast)
  4723. *
  4724. * return sec_type: Security type
  4725. */
  4726. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  4727. {
  4728. struct dp_peer *dpeer = (struct dp_peer *)peer;
  4729. return dpeer->security[sec_idx].sec_type;
  4730. }
  4731. /*
  4732. * dp_peer_authorize() - authorize txrx peer
  4733. * @peer_handle: Datapath peer handle
  4734. * @authorize
  4735. *
  4736. */
  4737. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  4738. {
  4739. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4740. struct dp_soc *soc;
  4741. if (peer) {
  4742. soc = peer->vdev->pdev->soc;
  4743. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4744. peer->authorize = authorize ? 1 : 0;
  4745. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4746. }
  4747. }
  4748. static void dp_reset_and_release_peer_mem(struct dp_soc *soc,
  4749. struct dp_pdev *pdev,
  4750. struct dp_peer *peer,
  4751. uint32_t vdev_id)
  4752. {
  4753. struct dp_vdev *vdev = NULL;
  4754. struct dp_peer *bss_peer = NULL;
  4755. uint8_t *m_addr = NULL;
  4756. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4757. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4758. if (vdev->vdev_id == vdev_id)
  4759. break;
  4760. }
  4761. if (!vdev) {
  4762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4763. "vdev is NULL");
  4764. } else {
  4765. if (vdev->vap_bss_peer == peer)
  4766. vdev->vap_bss_peer = NULL;
  4767. m_addr = peer->mac_addr.raw;
  4768. if (soc->cdp_soc.ol_ops->peer_unref_delete)
  4769. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4770. m_addr, vdev->mac_addr.raw, vdev->opmode,
  4771. peer->ctrl_peer, NULL);
  4772. if (vdev && vdev->vap_bss_peer) {
  4773. bss_peer = vdev->vap_bss_peer;
  4774. DP_UPDATE_STATS(vdev, peer);
  4775. }
  4776. }
  4777. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4778. /*
  4779. * Peer AST list hast to be empty here
  4780. */
  4781. DP_AST_ASSERT(TAILQ_EMPTY(&peer->ast_entry_list));
  4782. qdf_mem_free(peer);
  4783. }
  4784. /**
  4785. * dp_delete_pending_vdev() - check and process vdev delete
  4786. * @pdev: DP specific pdev pointer
  4787. * @vdev: DP specific vdev pointer
  4788. * @vdev_id: vdev id corresponding to vdev
  4789. *
  4790. * This API does following:
  4791. * 1) It releases tx flow pools buffers as vdev is
  4792. * going down and no peers are associated.
  4793. * 2) It also detaches vdev before cleaning vdev (struct dp_vdev) memory
  4794. */
  4795. static void dp_delete_pending_vdev(struct dp_pdev *pdev, struct dp_vdev *vdev,
  4796. uint8_t vdev_id)
  4797. {
  4798. ol_txrx_vdev_delete_cb vdev_delete_cb = NULL;
  4799. void *vdev_delete_context = NULL;
  4800. vdev_delete_cb = vdev->delete.callback;
  4801. vdev_delete_context = vdev->delete.context;
  4802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4803. FL("deleting vdev object %pK (%pM)- its last peer is done"),
  4804. vdev, vdev->mac_addr.raw);
  4805. /* all peers are gone, go ahead and delete it */
  4806. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  4807. FLOW_TYPE_VDEV, vdev_id);
  4808. dp_tx_vdev_detach(vdev);
  4809. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4810. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4811. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4812. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4813. FL("deleting vdev object %pK (%pM)"),
  4814. vdev, vdev->mac_addr.raw);
  4815. qdf_mem_free(vdev);
  4816. vdev = NULL;
  4817. if (vdev_delete_cb)
  4818. vdev_delete_cb(vdev_delete_context);
  4819. }
  4820. /*
  4821. * dp_peer_unref_delete() - unref and delete peer
  4822. * @peer_handle: Datapath peer handle
  4823. *
  4824. */
  4825. void dp_peer_unref_delete(void *peer_handle)
  4826. {
  4827. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4828. struct dp_vdev *vdev = peer->vdev;
  4829. struct dp_pdev *pdev = vdev->pdev;
  4830. struct dp_soc *soc = pdev->soc;
  4831. struct dp_peer *tmppeer;
  4832. int found = 0;
  4833. uint16_t peer_id;
  4834. uint16_t vdev_id;
  4835. bool delete_vdev;
  4836. struct cdp_peer_cookie peer_cookie;
  4837. /*
  4838. * Hold the lock all the way from checking if the peer ref count
  4839. * is zero until the peer references are removed from the hash
  4840. * table and vdev list (if the peer ref count is zero).
  4841. * This protects against a new HL tx operation starting to use the
  4842. * peer object just after this function concludes it's done being used.
  4843. * Furthermore, the lock needs to be held while checking whether the
  4844. * vdev's list of peers is empty, to make sure that list is not modified
  4845. * concurrently with the empty check.
  4846. */
  4847. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4848. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  4849. peer_id = peer->peer_ids[0];
  4850. vdev_id = vdev->vdev_id;
  4851. /*
  4852. * Make sure that the reference to the peer in
  4853. * peer object map is removed
  4854. */
  4855. if (peer_id != HTT_INVALID_PEER)
  4856. soc->peer_id_to_obj_map[peer_id] = NULL;
  4857. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  4858. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  4859. /* remove the reference to the peer from the hash table */
  4860. dp_peer_find_hash_remove(soc, peer);
  4861. qdf_spin_lock_bh(&soc->ast_lock);
  4862. if (peer->self_ast_entry) {
  4863. dp_peer_del_ast(soc, peer->self_ast_entry);
  4864. peer->self_ast_entry = NULL;
  4865. }
  4866. qdf_spin_unlock_bh(&soc->ast_lock);
  4867. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  4868. if (tmppeer == peer) {
  4869. found = 1;
  4870. break;
  4871. }
  4872. }
  4873. if (found) {
  4874. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  4875. peer_list_elem);
  4876. } else {
  4877. /*Ignoring the remove operation as peer not found*/
  4878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  4879. "peer:%pK not found in vdev:%pK peerlist:%pK",
  4880. peer, vdev, &peer->vdev->peer_list);
  4881. }
  4882. /* send peer destroy event to upper layer */
  4883. qdf_mem_copy(peer_cookie.mac_addr, peer->mac_addr.raw,
  4884. QDF_MAC_ADDR_SIZE);
  4885. peer_cookie.ctx = NULL;
  4886. peer_cookie.ctx = (void *)peer->wlanstats_ctx;
  4887. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  4888. dp_wdi_event_handler(WDI_EVENT_PEER_DESTROY,
  4889. pdev->soc,
  4890. (void *)&peer_cookie,
  4891. peer->peer_ids[0],
  4892. WDI_NO_VAL,
  4893. pdev->pdev_id);
  4894. #endif
  4895. peer->wlanstats_ctx = NULL;
  4896. /* cleanup the peer data */
  4897. dp_peer_cleanup(vdev, peer);
  4898. /* check whether the parent vdev has no peers left */
  4899. if (TAILQ_EMPTY(&vdev->peer_list)) {
  4900. /*
  4901. * capture vdev delete pending flag's status
  4902. * while holding peer_ref_mutex lock
  4903. */
  4904. delete_vdev = vdev->delete.pending;
  4905. /*
  4906. * Now that there are no references to the peer, we can
  4907. * release the peer reference lock.
  4908. */
  4909. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4910. /*
  4911. * Check if the parent vdev was waiting for its peers
  4912. * to be deleted, in order for it to be deleted too.
  4913. */
  4914. if (delete_vdev)
  4915. dp_delete_pending_vdev(pdev, vdev, vdev_id);
  4916. } else {
  4917. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4918. }
  4919. dp_reset_and_release_peer_mem(soc, pdev, peer, vdev_id);
  4920. } else {
  4921. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4922. }
  4923. }
  4924. /*
  4925. * dp_peer_detach_wifi3() – Detach txrx peer
  4926. * @peer_handle: Datapath peer handle
  4927. * @bitmap: bitmap indicating special handling of request.
  4928. *
  4929. */
  4930. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4931. {
  4932. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4933. /* redirect the peer's rx delivery function to point to a
  4934. * discard func
  4935. */
  4936. peer->rx_opt_proc = dp_rx_discard;
  4937. /* Do not make ctrl_peer to NULL for connected sta peers.
  4938. * We need ctrl_peer to release the reference during dp
  4939. * peer free. This reference was held for
  4940. * obj_mgr peer during the creation of dp peer.
  4941. */
  4942. if (!(peer->vdev && (peer->vdev->opmode != wlan_op_mode_sta) &&
  4943. !peer->bss_peer))
  4944. peer->ctrl_peer = NULL;
  4945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4946. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4947. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4948. qdf_spinlock_destroy(&peer->peer_info_lock);
  4949. /*
  4950. * Remove the reference added during peer_attach.
  4951. * The peer will still be left allocated until the
  4952. * PEER_UNMAP message arrives to remove the other
  4953. * reference, added by the PEER_MAP message.
  4954. */
  4955. dp_peer_unref_delete(peer_handle);
  4956. }
  4957. /*
  4958. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4959. * @peer_handle: Datapath peer handle
  4960. *
  4961. */
  4962. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4963. {
  4964. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4965. return vdev->mac_addr.raw;
  4966. }
  4967. /*
  4968. * dp_vdev_set_wds() - Enable per packet stats
  4969. * @vdev_handle: DP VDEV handle
  4970. * @val: value
  4971. *
  4972. * Return: none
  4973. */
  4974. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  4975. {
  4976. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4977. vdev->wds_enabled = val;
  4978. return 0;
  4979. }
  4980. /*
  4981. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  4982. * @peer_handle: Datapath peer handle
  4983. *
  4984. */
  4985. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  4986. uint8_t vdev_id)
  4987. {
  4988. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4989. struct dp_vdev *vdev = NULL;
  4990. if (qdf_unlikely(!pdev))
  4991. return NULL;
  4992. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4993. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4994. if (vdev->delete.pending)
  4995. continue;
  4996. if (vdev->vdev_id == vdev_id)
  4997. break;
  4998. }
  4999. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5000. return (struct cdp_vdev *)vdev;
  5001. }
  5002. /*
  5003. * dp_get_mon_vdev_from_pdev_wifi3() - Get vdev handle of monitor mode
  5004. * @dev: PDEV handle
  5005. *
  5006. * Return: VDEV handle of monitor mode
  5007. */
  5008. static struct cdp_vdev *dp_get_mon_vdev_from_pdev_wifi3(struct cdp_pdev *dev)
  5009. {
  5010. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  5011. if (qdf_unlikely(!pdev))
  5012. return NULL;
  5013. return (struct cdp_vdev *)pdev->monitor_vdev;
  5014. }
  5015. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  5016. {
  5017. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5018. return vdev->opmode;
  5019. }
  5020. static
  5021. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  5022. ol_txrx_rx_fp *stack_fn_p,
  5023. ol_osif_vdev_handle *osif_vdev_p)
  5024. {
  5025. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  5026. qdf_assert(vdev);
  5027. *stack_fn_p = vdev->osif_rx_stack;
  5028. *osif_vdev_p = vdev->osif_vdev;
  5029. }
  5030. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  5031. {
  5032. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  5033. struct dp_pdev *pdev = vdev->pdev;
  5034. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  5035. }
  5036. /**
  5037. * dp_monitor_mode_ring_config() - Send the tlv config to fw for monitor buffer
  5038. * ring based on target
  5039. * @soc: soc handle
  5040. * @mac_for_pdev: pdev_id
  5041. * @pdev: physical device handle
  5042. * @ring_num: mac id
  5043. * @htt_tlv_filter: tlv filter
  5044. *
  5045. * Return: zero on success, non-zero on failure
  5046. */
  5047. static inline
  5048. QDF_STATUS dp_monitor_mode_ring_config(struct dp_soc *soc, uint8_t mac_for_pdev,
  5049. struct dp_pdev *pdev, uint8_t ring_num,
  5050. struct htt_rx_ring_tlv_filter htt_tlv_filter)
  5051. {
  5052. QDF_STATUS status;
  5053. if (soc->wlan_cfg_ctx->rxdma1_enable)
  5054. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5055. pdev->rxdma_mon_buf_ring[ring_num]
  5056. .hal_srng,
  5057. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE,
  5058. &htt_tlv_filter);
  5059. else
  5060. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5061. pdev->rx_mac_buf_ring[ring_num]
  5062. .hal_srng,
  5063. RXDMA_BUF, RX_BUFFER_SIZE,
  5064. &htt_tlv_filter);
  5065. return status;
  5066. }
  5067. /**
  5068. * dp_reset_monitor_mode() - Disable monitor mode
  5069. * @pdev_handle: Datapath PDEV handle
  5070. *
  5071. * Return: QDF_STATUS
  5072. */
  5073. QDF_STATUS dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  5074. {
  5075. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5076. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5077. struct dp_soc *soc = pdev->soc;
  5078. uint8_t pdev_id;
  5079. int mac_id;
  5080. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5081. pdev_id = pdev->pdev_id;
  5082. soc = pdev->soc;
  5083. qdf_spin_lock_bh(&pdev->mon_lock);
  5084. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5085. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5086. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5087. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5088. pdev, mac_id,
  5089. htt_tlv_filter);
  5090. if (status != QDF_STATUS_SUCCESS) {
  5091. dp_err("Failed to send tlv filter for monitor mode rings");
  5092. return status;
  5093. }
  5094. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5095. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5096. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  5097. &htt_tlv_filter);
  5098. }
  5099. pdev->monitor_vdev = NULL;
  5100. pdev->mcopy_mode = 0;
  5101. pdev->monitor_configured = false;
  5102. qdf_spin_unlock_bh(&pdev->mon_lock);
  5103. return QDF_STATUS_SUCCESS;
  5104. }
  5105. /**
  5106. * dp_set_nac() - set peer_nac
  5107. * @peer_handle: Datapath PEER handle
  5108. *
  5109. * Return: void
  5110. */
  5111. static void dp_set_nac(struct cdp_peer *peer_handle)
  5112. {
  5113. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5114. peer->nac = 1;
  5115. }
  5116. /**
  5117. * dp_get_tx_pending() - read pending tx
  5118. * @pdev_handle: Datapath PDEV handle
  5119. *
  5120. * Return: outstanding tx
  5121. */
  5122. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  5123. {
  5124. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5125. return qdf_atomic_read(&pdev->num_tx_outstanding);
  5126. }
  5127. /**
  5128. * dp_get_peer_mac_from_peer_id() - get peer mac
  5129. * @pdev_handle: Datapath PDEV handle
  5130. * @peer_id: Peer ID
  5131. * @peer_mac: MAC addr of PEER
  5132. *
  5133. * Return: void
  5134. */
  5135. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  5136. uint32_t peer_id, uint8_t *peer_mac)
  5137. {
  5138. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5139. struct dp_peer *peer;
  5140. if (pdev && peer_mac) {
  5141. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  5142. if (peer) {
  5143. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  5144. QDF_MAC_ADDR_SIZE);
  5145. dp_peer_unref_del_find_by_id(peer);
  5146. }
  5147. }
  5148. }
  5149. /**
  5150. * dp_pdev_configure_monitor_rings() - configure monitor rings
  5151. * @vdev_handle: Datapath VDEV handle
  5152. *
  5153. * Return: QDF_STATUS
  5154. */
  5155. QDF_STATUS dp_pdev_configure_monitor_rings(struct dp_pdev *pdev)
  5156. {
  5157. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5158. struct dp_soc *soc;
  5159. uint8_t pdev_id;
  5160. int mac_id;
  5161. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5162. pdev_id = pdev->pdev_id;
  5163. soc = pdev->soc;
  5164. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  5165. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  5166. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  5167. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  5168. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  5169. pdev->mo_data_filter);
  5170. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5171. htt_tlv_filter.mpdu_start = 1;
  5172. htt_tlv_filter.msdu_start = 1;
  5173. htt_tlv_filter.packet = 1;
  5174. htt_tlv_filter.msdu_end = 1;
  5175. htt_tlv_filter.mpdu_end = 1;
  5176. htt_tlv_filter.packet_header = 1;
  5177. htt_tlv_filter.attention = 1;
  5178. htt_tlv_filter.ppdu_start = 0;
  5179. htt_tlv_filter.ppdu_end = 0;
  5180. htt_tlv_filter.ppdu_end_user_stats = 0;
  5181. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5182. htt_tlv_filter.ppdu_end_status_done = 0;
  5183. htt_tlv_filter.header_per_msdu = 1;
  5184. htt_tlv_filter.enable_fp =
  5185. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5186. htt_tlv_filter.enable_md = 0;
  5187. htt_tlv_filter.enable_mo =
  5188. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5189. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5190. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5191. if (pdev->mcopy_mode) {
  5192. htt_tlv_filter.fp_data_filter = 0;
  5193. htt_tlv_filter.mo_data_filter = 0;
  5194. } else {
  5195. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5196. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5197. }
  5198. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5199. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5200. htt_tlv_filter.offset_valid = false;
  5201. if ((pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU) ||
  5202. (pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU_MSDU)) {
  5203. htt_tlv_filter.fp_mgmt_filter = 0;
  5204. htt_tlv_filter.fp_ctrl_filter = 0;
  5205. htt_tlv_filter.fp_data_filter = 0;
  5206. htt_tlv_filter.mo_mgmt_filter = 0;
  5207. htt_tlv_filter.mo_ctrl_filter = 0;
  5208. htt_tlv_filter.mo_data_filter = 0;
  5209. }
  5210. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5211. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5212. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5213. pdev, mac_id,
  5214. htt_tlv_filter);
  5215. if (status != QDF_STATUS_SUCCESS) {
  5216. dp_err("Failed to send tlv filter for monitor mode rings");
  5217. return status;
  5218. }
  5219. }
  5220. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5221. htt_tlv_filter.mpdu_start = 1;
  5222. htt_tlv_filter.msdu_start = 0;
  5223. htt_tlv_filter.packet = 0;
  5224. htt_tlv_filter.msdu_end = 0;
  5225. htt_tlv_filter.mpdu_end = 0;
  5226. if ((pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU) ||
  5227. (pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU_MSDU)) {
  5228. htt_tlv_filter.mpdu_end = 1;
  5229. }
  5230. htt_tlv_filter.attention = 0;
  5231. htt_tlv_filter.ppdu_start = 1;
  5232. htt_tlv_filter.ppdu_end = 1;
  5233. htt_tlv_filter.ppdu_end_user_stats = 1;
  5234. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5235. htt_tlv_filter.ppdu_end_status_done = 1;
  5236. htt_tlv_filter.enable_fp = 1;
  5237. htt_tlv_filter.enable_md = 0;
  5238. htt_tlv_filter.enable_mo = 1;
  5239. if (pdev->mcopy_mode ||
  5240. (pdev->rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  5241. htt_tlv_filter.packet_header = 1;
  5242. if (pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU) {
  5243. htt_tlv_filter.header_per_msdu = 0;
  5244. htt_tlv_filter.enable_mo = 0;
  5245. } else if (pdev->rx_enh_capture_mode ==
  5246. CDP_RX_ENH_CAPTURE_MPDU_MSDU) {
  5247. htt_tlv_filter.header_per_msdu = 1;
  5248. htt_tlv_filter.enable_mo = 0;
  5249. }
  5250. }
  5251. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5252. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5253. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5254. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5255. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5256. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5257. htt_tlv_filter.offset_valid = false;
  5258. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5259. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5260. pdev->pdev_id);
  5261. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5262. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5263. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5264. }
  5265. return status;
  5266. }
  5267. /**
  5268. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  5269. * @vdev_handle: Datapath VDEV handle
  5270. * @smart_monitor: Flag to denote if its smart monitor mode
  5271. *
  5272. * Return: 0 on success, not 0 on failure
  5273. */
  5274. static QDF_STATUS dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  5275. uint8_t special_monitor)
  5276. {
  5277. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5278. struct dp_pdev *pdev;
  5279. qdf_assert(vdev);
  5280. pdev = vdev->pdev;
  5281. pdev->monitor_vdev = vdev;
  5282. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  5283. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  5284. pdev, pdev->pdev_id, pdev->soc, vdev);
  5285. /*
  5286. * do not configure monitor buf ring and filter for smart and
  5287. * lite monitor
  5288. * for smart monitor filters are added along with first NAC
  5289. * for lite monitor required configuration done through
  5290. * dp_set_pdev_param
  5291. */
  5292. if (special_monitor)
  5293. return QDF_STATUS_SUCCESS;
  5294. /*Check if current pdev's monitor_vdev exists */
  5295. if (pdev->monitor_configured) {
  5296. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5297. "monitor vap already created vdev=%pK\n", vdev);
  5298. qdf_assert(vdev);
  5299. return QDF_STATUS_E_RESOURCES;
  5300. }
  5301. pdev->monitor_configured = true;
  5302. return dp_pdev_configure_monitor_rings(pdev);
  5303. }
  5304. /**
  5305. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  5306. * @pdev_handle: Datapath PDEV handle
  5307. * @filter_val: Flag to select Filter for monitor mode
  5308. * Return: 0 on success, not 0 on failure
  5309. */
  5310. static QDF_STATUS
  5311. dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  5312. struct cdp_monitor_filter *filter_val)
  5313. {
  5314. /* Many monitor VAPs can exists in a system but only one can be up at
  5315. * anytime
  5316. */
  5317. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5318. struct dp_vdev *vdev = pdev->monitor_vdev;
  5319. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5320. struct dp_soc *soc;
  5321. uint8_t pdev_id;
  5322. int mac_id;
  5323. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5324. pdev_id = pdev->pdev_id;
  5325. soc = pdev->soc;
  5326. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  5327. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  5328. pdev, pdev_id, soc, vdev);
  5329. /*Check if current pdev's monitor_vdev exists */
  5330. if (!pdev->monitor_vdev) {
  5331. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5332. "vdev=%pK", vdev);
  5333. qdf_assert(vdev);
  5334. }
  5335. /* update filter mode, type in pdev structure */
  5336. pdev->mon_filter_mode = filter_val->mode;
  5337. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  5338. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  5339. pdev->fp_data_filter = filter_val->fp_data;
  5340. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  5341. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  5342. pdev->mo_data_filter = filter_val->mo_data;
  5343. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  5344. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  5345. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  5346. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  5347. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  5348. pdev->mo_data_filter);
  5349. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5350. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5351. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5352. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5353. pdev, mac_id,
  5354. htt_tlv_filter);
  5355. if (status != QDF_STATUS_SUCCESS) {
  5356. dp_err("Failed to send tlv filter for monitor mode rings");
  5357. return status;
  5358. }
  5359. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5360. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5361. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5362. }
  5363. htt_tlv_filter.mpdu_start = 1;
  5364. htt_tlv_filter.msdu_start = 1;
  5365. htt_tlv_filter.packet = 1;
  5366. htt_tlv_filter.msdu_end = 1;
  5367. htt_tlv_filter.mpdu_end = 1;
  5368. htt_tlv_filter.packet_header = 1;
  5369. htt_tlv_filter.attention = 1;
  5370. htt_tlv_filter.ppdu_start = 0;
  5371. htt_tlv_filter.ppdu_end = 0;
  5372. htt_tlv_filter.ppdu_end_user_stats = 0;
  5373. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5374. htt_tlv_filter.ppdu_end_status_done = 0;
  5375. htt_tlv_filter.header_per_msdu = 1;
  5376. htt_tlv_filter.enable_fp =
  5377. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5378. htt_tlv_filter.enable_md = 0;
  5379. htt_tlv_filter.enable_mo =
  5380. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5381. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5382. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5383. if (pdev->mcopy_mode)
  5384. htt_tlv_filter.fp_data_filter = 0;
  5385. else
  5386. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5387. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5388. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5389. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5390. htt_tlv_filter.offset_valid = false;
  5391. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5392. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5393. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5394. pdev, mac_id,
  5395. htt_tlv_filter);
  5396. if (status != QDF_STATUS_SUCCESS) {
  5397. dp_err("Failed to send tlv filter for monitor mode rings");
  5398. return status;
  5399. }
  5400. }
  5401. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5402. htt_tlv_filter.mpdu_start = 1;
  5403. htt_tlv_filter.msdu_start = 0;
  5404. htt_tlv_filter.packet = 0;
  5405. htt_tlv_filter.msdu_end = 0;
  5406. htt_tlv_filter.mpdu_end = 0;
  5407. htt_tlv_filter.attention = 0;
  5408. htt_tlv_filter.ppdu_start = 1;
  5409. htt_tlv_filter.ppdu_end = 1;
  5410. htt_tlv_filter.ppdu_end_user_stats = 1;
  5411. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5412. htt_tlv_filter.ppdu_end_status_done = 1;
  5413. htt_tlv_filter.enable_fp = 1;
  5414. htt_tlv_filter.enable_md = 0;
  5415. htt_tlv_filter.enable_mo = 1;
  5416. if (pdev->mcopy_mode) {
  5417. htt_tlv_filter.packet_header = 1;
  5418. }
  5419. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5420. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5421. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5422. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5423. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5424. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5425. htt_tlv_filter.offset_valid = false;
  5426. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5427. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5428. pdev->pdev_id);
  5429. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5430. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5431. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5432. }
  5433. return QDF_STATUS_SUCCESS;
  5434. }
  5435. /**
  5436. * dp_get_pdev_id_frm_pdev() - get pdev_id
  5437. * @pdev_handle: Datapath PDEV handle
  5438. *
  5439. * Return: pdev_id
  5440. */
  5441. static
  5442. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  5443. {
  5444. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5445. return pdev->pdev_id;
  5446. }
  5447. /**
  5448. * dp_get_delay_stats_flag() - get delay stats flag
  5449. * @pdev_handle: Datapath PDEV handle
  5450. *
  5451. * Return: 0 if flag is disabled else 1
  5452. */
  5453. static
  5454. bool dp_get_delay_stats_flag(struct cdp_pdev *pdev_handle)
  5455. {
  5456. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5457. return pdev->delay_stats_flag;
  5458. }
  5459. /**
  5460. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  5461. * @pdev_handle: Datapath PDEV handle
  5462. * @chan_noise_floor: Channel Noise Floor
  5463. *
  5464. * Return: void
  5465. */
  5466. static
  5467. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  5468. int16_t chan_noise_floor)
  5469. {
  5470. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5471. pdev->chan_noise_floor = chan_noise_floor;
  5472. }
  5473. /**
  5474. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  5475. * @vdev_handle: Datapath VDEV handle
  5476. * Return: true on ucast filter flag set
  5477. */
  5478. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  5479. {
  5480. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5481. struct dp_pdev *pdev;
  5482. pdev = vdev->pdev;
  5483. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  5484. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  5485. return true;
  5486. return false;
  5487. }
  5488. /**
  5489. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  5490. * @vdev_handle: Datapath VDEV handle
  5491. * Return: true on mcast filter flag set
  5492. */
  5493. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  5494. {
  5495. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5496. struct dp_pdev *pdev;
  5497. pdev = vdev->pdev;
  5498. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  5499. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  5500. return true;
  5501. return false;
  5502. }
  5503. /**
  5504. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  5505. * @vdev_handle: Datapath VDEV handle
  5506. * Return: true on non data filter flag set
  5507. */
  5508. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  5509. {
  5510. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5511. struct dp_pdev *pdev;
  5512. pdev = vdev->pdev;
  5513. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  5514. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  5515. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  5516. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  5517. return true;
  5518. }
  5519. }
  5520. return false;
  5521. }
  5522. #ifdef MESH_MODE_SUPPORT
  5523. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  5524. {
  5525. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5526. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5527. FL("val %d"), val);
  5528. vdev->mesh_vdev = val;
  5529. }
  5530. /*
  5531. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  5532. * @vdev_hdl: virtual device object
  5533. * @val: value to be set
  5534. *
  5535. * Return: void
  5536. */
  5537. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  5538. {
  5539. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5541. FL("val %d"), val);
  5542. vdev->mesh_rx_filter = val;
  5543. }
  5544. #endif
  5545. /*
  5546. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  5547. * Current scope is bar received count
  5548. *
  5549. * @pdev_handle: DP_PDEV handle
  5550. *
  5551. * Return: void
  5552. */
  5553. #define STATS_PROC_TIMEOUT (HZ/1000)
  5554. static void
  5555. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  5556. {
  5557. struct dp_vdev *vdev;
  5558. struct dp_peer *peer;
  5559. uint32_t waitcnt;
  5560. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5561. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5562. if (!peer) {
  5563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5564. FL("DP Invalid Peer refernce"));
  5565. return;
  5566. }
  5567. if (peer->delete_in_progress) {
  5568. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5569. FL("DP Peer deletion in progress"));
  5570. continue;
  5571. }
  5572. qdf_atomic_inc(&peer->ref_cnt);
  5573. waitcnt = 0;
  5574. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  5575. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  5576. && waitcnt < 10) {
  5577. schedule_timeout_interruptible(
  5578. STATS_PROC_TIMEOUT);
  5579. waitcnt++;
  5580. }
  5581. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  5582. dp_peer_unref_delete(peer);
  5583. }
  5584. }
  5585. }
  5586. /**
  5587. * dp_rx_bar_stats_cb(): BAR received stats callback
  5588. * @soc: SOC handle
  5589. * @cb_ctxt: Call back context
  5590. * @reo_status: Reo status
  5591. *
  5592. * return: void
  5593. */
  5594. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  5595. union hal_reo_status *reo_status)
  5596. {
  5597. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  5598. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  5599. if (!qdf_atomic_read(&soc->cmn_init_done))
  5600. return;
  5601. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  5602. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  5603. queue_status->header.status);
  5604. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5605. return;
  5606. }
  5607. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  5608. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5609. }
  5610. /**
  5611. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  5612. * @vdev: DP VDEV handle
  5613. *
  5614. * return: void
  5615. */
  5616. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  5617. struct cdp_vdev_stats *vdev_stats)
  5618. {
  5619. struct dp_peer *peer = NULL;
  5620. struct dp_soc *soc = NULL;
  5621. if (!vdev || !vdev->pdev)
  5622. return;
  5623. soc = vdev->pdev->soc;
  5624. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  5625. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  5626. dp_update_vdev_stats(vdev_stats, peer);
  5627. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5628. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5629. vdev_stats, vdev->vdev_id,
  5630. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5631. #endif
  5632. }
  5633. /**
  5634. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  5635. * @pdev: DP PDEV handle
  5636. *
  5637. * return: void
  5638. */
  5639. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  5640. {
  5641. struct dp_vdev *vdev = NULL;
  5642. struct dp_soc *soc;
  5643. struct cdp_vdev_stats *vdev_stats =
  5644. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5645. if (!vdev_stats) {
  5646. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5647. "DP alloc failure - unable to get alloc vdev stats");
  5648. return;
  5649. }
  5650. qdf_mem_zero(&pdev->stats.tx, sizeof(pdev->stats.tx));
  5651. qdf_mem_zero(&pdev->stats.rx, sizeof(pdev->stats.rx));
  5652. qdf_mem_zero(&pdev->stats.tx_i, sizeof(pdev->stats.tx_i));
  5653. if (pdev->mcopy_mode)
  5654. DP_UPDATE_STATS(pdev, pdev->invalid_peer);
  5655. soc = pdev->soc;
  5656. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5657. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  5658. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5659. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5660. dp_update_pdev_stats(pdev, vdev_stats);
  5661. dp_update_pdev_ingress_stats(pdev, vdev);
  5662. }
  5663. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5664. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5665. qdf_mem_free(vdev_stats);
  5666. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5667. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc, &pdev->stats,
  5668. pdev->pdev_id, UPDATE_PDEV_STATS, pdev->pdev_id);
  5669. #endif
  5670. }
  5671. /**
  5672. * dp_vdev_getstats() - get vdev packet level stats
  5673. * @vdev_handle: Datapath VDEV handle
  5674. * @stats: cdp network device stats structure
  5675. *
  5676. * Return: void
  5677. */
  5678. static void dp_vdev_getstats(void *vdev_handle,
  5679. struct cdp_dev_stats *stats)
  5680. {
  5681. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5682. struct dp_pdev *pdev;
  5683. struct dp_soc *soc;
  5684. struct cdp_vdev_stats *vdev_stats;
  5685. if (!vdev)
  5686. return;
  5687. pdev = vdev->pdev;
  5688. if (!pdev)
  5689. return;
  5690. soc = pdev->soc;
  5691. vdev_stats = qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5692. if (!vdev_stats) {
  5693. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5694. "DP alloc failure - unable to get alloc vdev stats");
  5695. return;
  5696. }
  5697. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5698. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5699. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5700. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  5701. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  5702. stats->tx_errors = vdev_stats->tx.tx_failed +
  5703. vdev_stats->tx_i.dropped.dropped_pkt.num;
  5704. stats->tx_dropped = stats->tx_errors;
  5705. stats->rx_packets = vdev_stats->rx.unicast.num +
  5706. vdev_stats->rx.multicast.num +
  5707. vdev_stats->rx.bcast.num;
  5708. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  5709. vdev_stats->rx.multicast.bytes +
  5710. vdev_stats->rx.bcast.bytes;
  5711. }
  5712. /**
  5713. * dp_pdev_getstats() - get pdev packet level stats
  5714. * @pdev_handle: Datapath PDEV handle
  5715. * @stats: cdp network device stats structure
  5716. *
  5717. * Return: void
  5718. */
  5719. static void dp_pdev_getstats(void *pdev_handle,
  5720. struct cdp_dev_stats *stats)
  5721. {
  5722. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5723. dp_aggregate_pdev_stats(pdev);
  5724. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  5725. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  5726. stats->tx_errors = pdev->stats.tx.tx_failed +
  5727. pdev->stats.tx_i.dropped.dropped_pkt.num;
  5728. stats->tx_dropped = stats->tx_errors;
  5729. stats->rx_packets = pdev->stats.rx.unicast.num +
  5730. pdev->stats.rx.multicast.num +
  5731. pdev->stats.rx.bcast.num;
  5732. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  5733. pdev->stats.rx.multicast.bytes +
  5734. pdev->stats.rx.bcast.bytes;
  5735. }
  5736. /**
  5737. * dp_get_device_stats() - get interface level packet stats
  5738. * @handle: device handle
  5739. * @stats: cdp network device stats structure
  5740. * @type: device type pdev/vdev
  5741. *
  5742. * Return: void
  5743. */
  5744. static void dp_get_device_stats(void *handle,
  5745. struct cdp_dev_stats *stats, uint8_t type)
  5746. {
  5747. switch (type) {
  5748. case UPDATE_VDEV_STATS:
  5749. dp_vdev_getstats(handle, stats);
  5750. break;
  5751. case UPDATE_PDEV_STATS:
  5752. dp_pdev_getstats(handle, stats);
  5753. break;
  5754. default:
  5755. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5756. "apstats cannot be updated for this input "
  5757. "type %d", type);
  5758. break;
  5759. }
  5760. }
  5761. /**
  5762. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  5763. * @pdev: DP_PDEV Handle
  5764. *
  5765. * Return:void
  5766. */
  5767. static inline void
  5768. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  5769. {
  5770. uint8_t i = 0, index = 0;
  5771. DP_PRINT_STATS("PDEV Tx Stats:\n");
  5772. DP_PRINT_STATS("Received From Stack:");
  5773. DP_PRINT_STATS(" Packets = %d",
  5774. pdev->stats.tx_i.rcvd.num);
  5775. DP_PRINT_STATS(" Bytes = %llu",
  5776. pdev->stats.tx_i.rcvd.bytes);
  5777. DP_PRINT_STATS("Processed:");
  5778. DP_PRINT_STATS(" Packets = %d",
  5779. pdev->stats.tx_i.processed.num);
  5780. DP_PRINT_STATS(" Bytes = %llu",
  5781. pdev->stats.tx_i.processed.bytes);
  5782. DP_PRINT_STATS("Total Completions:");
  5783. DP_PRINT_STATS(" Packets = %u",
  5784. pdev->stats.tx.comp_pkt.num);
  5785. DP_PRINT_STATS(" Bytes = %llu",
  5786. pdev->stats.tx.comp_pkt.bytes);
  5787. DP_PRINT_STATS("Successful Completions:");
  5788. DP_PRINT_STATS(" Packets = %u",
  5789. pdev->stats.tx.tx_success.num);
  5790. DP_PRINT_STATS(" Bytes = %llu",
  5791. pdev->stats.tx.tx_success.bytes);
  5792. DP_PRINT_STATS("Dropped:");
  5793. DP_PRINT_STATS(" Total = %d",
  5794. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5795. DP_PRINT_STATS(" Dma_map_error = %d",
  5796. pdev->stats.tx_i.dropped.dma_error);
  5797. DP_PRINT_STATS(" Ring Full = %d",
  5798. pdev->stats.tx_i.dropped.ring_full);
  5799. DP_PRINT_STATS(" Descriptor Not available = %d",
  5800. pdev->stats.tx_i.dropped.desc_na.num);
  5801. DP_PRINT_STATS(" HW enqueue failed= %d",
  5802. pdev->stats.tx_i.dropped.enqueue_fail);
  5803. DP_PRINT_STATS(" Resources Full = %d",
  5804. pdev->stats.tx_i.dropped.res_full);
  5805. DP_PRINT_STATS(" FW removed Pkts = %u",
  5806. pdev->stats.tx.dropped.fw_rem.num);
  5807. DP_PRINT_STATS(" FW removed bytes= %llu",
  5808. pdev->stats.tx.dropped.fw_rem.bytes);
  5809. DP_PRINT_STATS(" FW removed transmitted = %d",
  5810. pdev->stats.tx.dropped.fw_rem_tx);
  5811. DP_PRINT_STATS(" FW removed untransmitted = %d",
  5812. pdev->stats.tx.dropped.fw_rem_notx);
  5813. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  5814. pdev->stats.tx.dropped.fw_reason1);
  5815. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  5816. pdev->stats.tx.dropped.fw_reason2);
  5817. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  5818. pdev->stats.tx.dropped.fw_reason3);
  5819. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  5820. pdev->stats.tx.dropped.age_out);
  5821. DP_PRINT_STATS(" headroom insufficient = %d",
  5822. pdev->stats.tx_i.dropped.headroom_insufficient);
  5823. DP_PRINT_STATS(" Multicast:");
  5824. DP_PRINT_STATS(" Packets: %u",
  5825. pdev->stats.tx.mcast.num);
  5826. DP_PRINT_STATS(" Bytes: %llu",
  5827. pdev->stats.tx.mcast.bytes);
  5828. DP_PRINT_STATS("Scatter Gather:");
  5829. DP_PRINT_STATS(" Packets = %d",
  5830. pdev->stats.tx_i.sg.sg_pkt.num);
  5831. DP_PRINT_STATS(" Bytes = %llu",
  5832. pdev->stats.tx_i.sg.sg_pkt.bytes);
  5833. DP_PRINT_STATS(" Dropped By Host = %d",
  5834. pdev->stats.tx_i.sg.dropped_host.num);
  5835. DP_PRINT_STATS(" Dropped By Target = %d",
  5836. pdev->stats.tx_i.sg.dropped_target);
  5837. DP_PRINT_STATS("TSO:");
  5838. DP_PRINT_STATS(" Number of Segments = %d",
  5839. pdev->stats.tx_i.tso.num_seg);
  5840. DP_PRINT_STATS(" Packets = %d",
  5841. pdev->stats.tx_i.tso.tso_pkt.num);
  5842. DP_PRINT_STATS(" Bytes = %llu",
  5843. pdev->stats.tx_i.tso.tso_pkt.bytes);
  5844. DP_PRINT_STATS(" Dropped By Host = %d",
  5845. pdev->stats.tx_i.tso.dropped_host.num);
  5846. DP_PRINT_STATS("Mcast Enhancement:");
  5847. DP_PRINT_STATS(" Packets = %d",
  5848. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  5849. DP_PRINT_STATS(" Bytes = %llu",
  5850. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  5851. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  5852. pdev->stats.tx_i.mcast_en.dropped_map_error);
  5853. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  5854. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  5855. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  5856. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  5857. DP_PRINT_STATS(" Unicast sent = %d",
  5858. pdev->stats.tx_i.mcast_en.ucast);
  5859. DP_PRINT_STATS("Raw:");
  5860. DP_PRINT_STATS(" Packets = %d",
  5861. pdev->stats.tx_i.raw.raw_pkt.num);
  5862. DP_PRINT_STATS(" Bytes = %llu",
  5863. pdev->stats.tx_i.raw.raw_pkt.bytes);
  5864. DP_PRINT_STATS(" DMA map error = %d",
  5865. pdev->stats.tx_i.raw.dma_map_error);
  5866. DP_PRINT_STATS("Reinjected:");
  5867. DP_PRINT_STATS(" Packets = %d",
  5868. pdev->stats.tx_i.reinject_pkts.num);
  5869. DP_PRINT_STATS(" Bytes = %llu\n",
  5870. pdev->stats.tx_i.reinject_pkts.bytes);
  5871. DP_PRINT_STATS("Inspected:");
  5872. DP_PRINT_STATS(" Packets = %d",
  5873. pdev->stats.tx_i.inspect_pkts.num);
  5874. DP_PRINT_STATS(" Bytes = %llu",
  5875. pdev->stats.tx_i.inspect_pkts.bytes);
  5876. DP_PRINT_STATS("Nawds Multicast:");
  5877. DP_PRINT_STATS(" Packets = %d",
  5878. pdev->stats.tx_i.nawds_mcast.num);
  5879. DP_PRINT_STATS(" Bytes = %llu",
  5880. pdev->stats.tx_i.nawds_mcast.bytes);
  5881. DP_PRINT_STATS("CCE Classified:");
  5882. DP_PRINT_STATS(" CCE Classified Packets: %u",
  5883. pdev->stats.tx_i.cce_classified);
  5884. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  5885. pdev->stats.tx_i.cce_classified_raw);
  5886. DP_PRINT_STATS("Mesh stats:");
  5887. DP_PRINT_STATS(" frames to firmware: %u",
  5888. pdev->stats.tx_i.mesh.exception_fw);
  5889. DP_PRINT_STATS(" completions from fw: %u",
  5890. pdev->stats.tx_i.mesh.completion_fw);
  5891. DP_PRINT_STATS("PPDU stats counter");
  5892. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  5893. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  5894. pdev->stats.ppdu_stats_counter[index]);
  5895. }
  5896. for (i = 0; i < CDP_WDI_NUM_EVENTS; i++) {
  5897. if (!pdev->stats.wdi_event[i])
  5898. DP_PRINT_STATS("Wdi msgs received from fw[%d]:%d",
  5899. i, pdev->stats.wdi_event[i]);
  5900. }
  5901. }
  5902. /**
  5903. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  5904. * @pdev: DP_PDEV Handle
  5905. *
  5906. * Return: void
  5907. */
  5908. static inline void
  5909. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  5910. {
  5911. DP_PRINT_STATS("PDEV Rx Stats:\n");
  5912. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  5913. DP_PRINT_STATS(" Packets = %d %d %d %d",
  5914. pdev->stats.rx.rcvd_reo[0].num,
  5915. pdev->stats.rx.rcvd_reo[1].num,
  5916. pdev->stats.rx.rcvd_reo[2].num,
  5917. pdev->stats.rx.rcvd_reo[3].num);
  5918. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  5919. pdev->stats.rx.rcvd_reo[0].bytes,
  5920. pdev->stats.rx.rcvd_reo[1].bytes,
  5921. pdev->stats.rx.rcvd_reo[2].bytes,
  5922. pdev->stats.rx.rcvd_reo[3].bytes);
  5923. DP_PRINT_STATS("Replenished:");
  5924. DP_PRINT_STATS(" Packets = %d",
  5925. pdev->stats.replenish.pkts.num);
  5926. DP_PRINT_STATS(" Bytes = %llu",
  5927. pdev->stats.replenish.pkts.bytes);
  5928. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  5929. pdev->stats.buf_freelist);
  5930. DP_PRINT_STATS(" Low threshold intr = %d",
  5931. pdev->stats.replenish.low_thresh_intrs);
  5932. DP_PRINT_STATS("Dropped:");
  5933. DP_PRINT_STATS(" msdu_not_done = %d",
  5934. pdev->stats.dropped.msdu_not_done);
  5935. DP_PRINT_STATS(" wifi parse = %d",
  5936. pdev->stats.dropped.wifi_parse);
  5937. DP_PRINT_STATS(" mon_rx_drop = %d",
  5938. pdev->stats.dropped.mon_rx_drop);
  5939. DP_PRINT_STATS(" mec_drop = %d",
  5940. pdev->stats.rx.mec_drop.num);
  5941. DP_PRINT_STATS(" Bytes = %llu",
  5942. pdev->stats.rx.mec_drop.bytes);
  5943. DP_PRINT_STATS("Sent To Stack:");
  5944. DP_PRINT_STATS(" Packets = %d",
  5945. pdev->stats.rx.to_stack.num);
  5946. DP_PRINT_STATS(" Bytes = %llu",
  5947. pdev->stats.rx.to_stack.bytes);
  5948. DP_PRINT_STATS(" vlan_tag_stp_cnt = %d",
  5949. pdev->stats.vlan_tag_stp_cnt);
  5950. DP_PRINT_STATS("Multicast/Broadcast:");
  5951. DP_PRINT_STATS(" Packets = %d",
  5952. pdev->stats.rx.multicast.num);
  5953. DP_PRINT_STATS(" Bytes = %llu",
  5954. pdev->stats.rx.multicast.bytes);
  5955. DP_PRINT_STATS("Errors:");
  5956. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  5957. pdev->stats.replenish.rxdma_err);
  5958. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  5959. pdev->stats.err.desc_alloc_fail);
  5960. DP_PRINT_STATS(" IP checksum error = %d",
  5961. pdev->stats.err.ip_csum_err);
  5962. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  5963. pdev->stats.err.tcp_udp_csum_err);
  5964. /* Get bar_recv_cnt */
  5965. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  5966. DP_PRINT_STATS("BAR Received Count: = %d",
  5967. pdev->stats.rx.bar_recv_cnt);
  5968. }
  5969. /**
  5970. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  5971. * @pdev: DP_PDEV Handle
  5972. *
  5973. * Return: void
  5974. */
  5975. static inline void
  5976. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  5977. {
  5978. struct cdp_pdev_mon_stats *rx_mon_stats;
  5979. rx_mon_stats = &pdev->rx_mon_stats;
  5980. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  5981. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  5982. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  5983. rx_mon_stats->status_ppdu_done);
  5984. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  5985. rx_mon_stats->dest_ppdu_done);
  5986. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  5987. rx_mon_stats->dest_mpdu_done);
  5988. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  5989. rx_mon_stats->dest_mpdu_drop);
  5990. DP_PRINT_STATS("dup_mon_linkdesc_cnt = %d",
  5991. rx_mon_stats->dup_mon_linkdesc_cnt);
  5992. DP_PRINT_STATS("dup_mon_buf_cnt = %d",
  5993. rx_mon_stats->dup_mon_buf_cnt);
  5994. }
  5995. /**
  5996. * dp_print_soc_tx_stats(): Print SOC level stats
  5997. * @soc DP_SOC Handle
  5998. *
  5999. * Return: void
  6000. */
  6001. static inline void
  6002. dp_print_soc_tx_stats(struct dp_soc *soc)
  6003. {
  6004. uint8_t desc_pool_id;
  6005. soc->stats.tx.desc_in_use = 0;
  6006. DP_PRINT_STATS("SOC Tx Stats:\n");
  6007. for (desc_pool_id = 0;
  6008. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  6009. desc_pool_id++)
  6010. soc->stats.tx.desc_in_use +=
  6011. soc->tx_desc[desc_pool_id].num_allocated;
  6012. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  6013. soc->stats.tx.desc_in_use);
  6014. DP_PRINT_STATS("Tx Invalid peer:");
  6015. DP_PRINT_STATS(" Packets = %d",
  6016. soc->stats.tx.tx_invalid_peer.num);
  6017. DP_PRINT_STATS(" Bytes = %llu",
  6018. soc->stats.tx.tx_invalid_peer.bytes);
  6019. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  6020. soc->stats.tx.tcl_ring_full[0],
  6021. soc->stats.tx.tcl_ring_full[1],
  6022. soc->stats.tx.tcl_ring_full[2]);
  6023. }
  6024. /**
  6025. * dp_print_soc_rx_stats: Print SOC level Rx stats
  6026. * @soc: DP_SOC Handle
  6027. *
  6028. * Return:void
  6029. */
  6030. static inline void
  6031. dp_print_soc_rx_stats(struct dp_soc *soc)
  6032. {
  6033. uint32_t i;
  6034. char reo_error[DP_REO_ERR_LENGTH];
  6035. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  6036. uint8_t index = 0;
  6037. DP_PRINT_STATS("No of AST Entries = %d", soc->num_ast_entries);
  6038. DP_PRINT_STATS("SOC Rx Stats:\n");
  6039. DP_PRINT_STATS("Fragmented packets: %u",
  6040. soc->stats.rx.rx_frags);
  6041. DP_PRINT_STATS("Reo reinjected packets: %u",
  6042. soc->stats.rx.reo_reinject);
  6043. DP_PRINT_STATS("Errors:\n");
  6044. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  6045. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  6046. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  6047. DP_PRINT_STATS("Invalid RBM = %d",
  6048. soc->stats.rx.err.invalid_rbm);
  6049. DP_PRINT_STATS("Invalid Vdev = %d",
  6050. soc->stats.rx.err.invalid_vdev);
  6051. DP_PRINT_STATS("Invalid sa_idx or da_idx = %d",
  6052. soc->stats.rx.err.invalid_sa_da_idx);
  6053. DP_PRINT_STATS("Invalid Pdev = %d",
  6054. soc->stats.rx.err.invalid_pdev);
  6055. DP_PRINT_STATS("Invalid Peer = %d",
  6056. soc->stats.rx.err.rx_invalid_peer.num);
  6057. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  6058. soc->stats.rx.err.hal_ring_access_fail);
  6059. DP_PRINT_STATS("MSDU Done failures = %d",
  6060. soc->stats.rx.err.msdu_done_fail);
  6061. DP_PRINT_STATS("RX frags: %d", soc->stats.rx.rx_frags);
  6062. DP_PRINT_STATS("RX frag wait: %d", soc->stats.rx.rx_frag_wait);
  6063. DP_PRINT_STATS("RX frag err: %d", soc->stats.rx.rx_frag_err);
  6064. DP_PRINT_STATS("RX HP out_of_sync: %d", soc->stats.rx.hp_oos);
  6065. DP_PRINT_STATS("RX DESC invalid magic: %u",
  6066. soc->stats.rx.err.rx_desc_invalid_magic);
  6067. DP_PRINT_STATS("RX DUP DESC: %d",
  6068. soc->stats.rx.err.hal_reo_dest_dup);
  6069. DP_PRINT_STATS("RX REL DUP DESC: %d",
  6070. soc->stats.rx.err.hal_wbm_rel_dup);
  6071. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  6072. index += qdf_snprint(&rxdma_error[index],
  6073. DP_RXDMA_ERR_LENGTH - index,
  6074. " %d", soc->stats.rx.err.rxdma_error[i]);
  6075. }
  6076. DP_PRINT_STATS("RXDMA Error (0-31):%s", rxdma_error);
  6077. index = 0;
  6078. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  6079. index += qdf_snprint(&reo_error[index],
  6080. DP_REO_ERR_LENGTH - index,
  6081. " %d", soc->stats.rx.err.reo_error[i]);
  6082. }
  6083. DP_PRINT_STATS("REO Error(0-14):%s", reo_error);
  6084. }
  6085. /**
  6086. * dp_srng_get_str_from_ring_type() - Return string name for a ring
  6087. * @ring_type: Ring
  6088. *
  6089. * Return: char const pointer
  6090. */
  6091. static inline const
  6092. char *dp_srng_get_str_from_hal_ring_type(enum hal_ring_type ring_type)
  6093. {
  6094. switch (ring_type) {
  6095. case REO_DST:
  6096. return "Reo_dst";
  6097. case REO_EXCEPTION:
  6098. return "Reo_exception";
  6099. case REO_CMD:
  6100. return "Reo_cmd";
  6101. case REO_REINJECT:
  6102. return "Reo_reinject";
  6103. case REO_STATUS:
  6104. return "Reo_status";
  6105. case WBM2SW_RELEASE:
  6106. return "wbm2sw_release";
  6107. case TCL_DATA:
  6108. return "tcl_data";
  6109. case TCL_CMD:
  6110. return "tcl_cmd";
  6111. case TCL_STATUS:
  6112. return "tcl_status";
  6113. case SW2WBM_RELEASE:
  6114. return "sw2wbm_release";
  6115. case RXDMA_BUF:
  6116. return "Rxdma_buf";
  6117. case RXDMA_DST:
  6118. return "Rxdma_dst";
  6119. case RXDMA_MONITOR_BUF:
  6120. return "Rxdma_monitor_buf";
  6121. case RXDMA_MONITOR_DESC:
  6122. return "Rxdma_monitor_desc";
  6123. case RXDMA_MONITOR_STATUS:
  6124. return "Rxdma_monitor_status";
  6125. default:
  6126. dp_err("Invalid ring type");
  6127. break;
  6128. }
  6129. return "Invalid";
  6130. }
  6131. /**
  6132. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  6133. * @soc: DP_SOC handle
  6134. * @srng: DP_SRNG handle
  6135. * @ring_name: SRNG name
  6136. * @ring_type: srng src/dst ring
  6137. *
  6138. * Return: void
  6139. */
  6140. static void
  6141. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  6142. enum hal_ring_type ring_type)
  6143. {
  6144. uint32_t tailp;
  6145. uint32_t headp;
  6146. int32_t hw_headp = -1;
  6147. int32_t hw_tailp = -1;
  6148. const char *ring_name;
  6149. struct hal_soc *hal_soc;
  6150. if (soc && srng && srng->hal_srng) {
  6151. hal_soc = (struct hal_soc *)soc->hal_soc;
  6152. ring_name = dp_srng_get_str_from_hal_ring_type(ring_type);
  6153. hal_get_sw_hptp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  6154. DP_PRINT_STATS("%s:SW:Head pointer = %d Tail Pointer = %d\n",
  6155. ring_name, headp, tailp);
  6156. hal_get_hw_hptp(soc->hal_soc, srng->hal_srng, &hw_headp,
  6157. &hw_tailp, ring_type);
  6158. DP_PRINT_STATS("%s:HW:Head pointer = %d Tail Pointer = %d\n",
  6159. ring_name, hw_headp, hw_tailp);
  6160. }
  6161. }
  6162. /*
  6163. * dp_print_napi_stats(): NAPI stats
  6164. * @soc - soc handle
  6165. */
  6166. static void dp_print_napi_stats(struct dp_soc *soc)
  6167. {
  6168. hif_print_napi_stats(soc->hif_handle);
  6169. }
  6170. /**
  6171. * dp_print_mon_ring_stats_from_hal() - Print stat for monitor rings based
  6172. * on target
  6173. * @pdev: physical device handle
  6174. * @mac_id: mac id
  6175. *
  6176. * Return: void
  6177. */
  6178. static inline
  6179. void dp_print_mon_ring_stat_from_hal(struct dp_pdev *pdev, uint8_t mac_id)
  6180. {
  6181. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable) {
  6182. dp_print_ring_stat_from_hal(pdev->soc,
  6183. &pdev->rxdma_mon_buf_ring[mac_id],
  6184. RXDMA_MONITOR_BUF);
  6185. dp_print_ring_stat_from_hal(pdev->soc,
  6186. &pdev->rxdma_mon_dst_ring[mac_id],
  6187. RXDMA_MONITOR_DST);
  6188. dp_print_ring_stat_from_hal(pdev->soc,
  6189. &pdev->rxdma_mon_desc_ring[mac_id],
  6190. RXDMA_MONITOR_DESC);
  6191. }
  6192. dp_print_ring_stat_from_hal(pdev->soc,
  6193. &pdev->rxdma_mon_status_ring[mac_id],
  6194. RXDMA_MONITOR_STATUS);
  6195. }
  6196. /**
  6197. * dp_print_ring_stats(): Print tail and head pointer
  6198. * @pdev: DP_PDEV handle
  6199. *
  6200. * Return:void
  6201. */
  6202. static inline void
  6203. dp_print_ring_stats(struct dp_pdev *pdev)
  6204. {
  6205. uint32_t i;
  6206. int mac_id;
  6207. dp_print_ring_stat_from_hal(pdev->soc,
  6208. &pdev->soc->reo_exception_ring,
  6209. REO_EXCEPTION);
  6210. dp_print_ring_stat_from_hal(pdev->soc,
  6211. &pdev->soc->reo_reinject_ring,
  6212. REO_REINJECT);
  6213. dp_print_ring_stat_from_hal(pdev->soc,
  6214. &pdev->soc->reo_cmd_ring,
  6215. REO_CMD);
  6216. dp_print_ring_stat_from_hal(pdev->soc,
  6217. &pdev->soc->reo_status_ring,
  6218. REO_STATUS);
  6219. dp_print_ring_stat_from_hal(pdev->soc,
  6220. &pdev->soc->rx_rel_ring,
  6221. WBM2SW_RELEASE);
  6222. dp_print_ring_stat_from_hal(pdev->soc,
  6223. &pdev->soc->tcl_cmd_ring,
  6224. TCL_CMD);
  6225. dp_print_ring_stat_from_hal(pdev->soc,
  6226. &pdev->soc->tcl_status_ring,
  6227. TCL_STATUS);
  6228. dp_print_ring_stat_from_hal(pdev->soc,
  6229. &pdev->soc->wbm_desc_rel_ring,
  6230. SW2WBM_RELEASE);
  6231. for (i = 0; i < MAX_REO_DEST_RINGS; i++)
  6232. dp_print_ring_stat_from_hal(pdev->soc,
  6233. &pdev->soc->reo_dest_ring[i],
  6234. REO_DST);
  6235. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++)
  6236. dp_print_ring_stat_from_hal(pdev->soc,
  6237. &pdev->soc->tcl_data_ring[i],
  6238. TCL_DATA);
  6239. for (i = 0; i < MAX_TCL_DATA_RINGS; i++)
  6240. dp_print_ring_stat_from_hal(pdev->soc,
  6241. &pdev->soc->tx_comp_ring[i],
  6242. WBM2SW_RELEASE);
  6243. dp_print_ring_stat_from_hal(pdev->soc,
  6244. &pdev->rx_refill_buf_ring,
  6245. RXDMA_BUF);
  6246. dp_print_ring_stat_from_hal(pdev->soc,
  6247. &pdev->rx_refill_buf_ring2,
  6248. RXDMA_BUF);
  6249. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  6250. dp_print_ring_stat_from_hal(pdev->soc,
  6251. &pdev->rx_mac_buf_ring[i],
  6252. RXDMA_BUF);
  6253. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++)
  6254. dp_print_mon_ring_stat_from_hal(pdev, mac_id);
  6255. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++)
  6256. dp_print_ring_stat_from_hal(pdev->soc,
  6257. &pdev->rxdma_err_dst_ring[i],
  6258. RXDMA_DST);
  6259. }
  6260. /**
  6261. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  6262. * @vdev: DP_VDEV handle
  6263. *
  6264. * Return:void
  6265. */
  6266. static inline void
  6267. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  6268. {
  6269. struct dp_peer *peer = NULL;
  6270. if (!vdev || !vdev->pdev)
  6271. return;
  6272. DP_STATS_CLR(vdev->pdev);
  6273. DP_STATS_CLR(vdev->pdev->soc);
  6274. DP_STATS_CLR(vdev);
  6275. hif_clear_napi_stats(vdev->pdev->soc->hif_handle);
  6276. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6277. if (!peer)
  6278. return;
  6279. DP_STATS_CLR(peer);
  6280. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  6281. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  6282. &peer->stats, peer->peer_ids[0],
  6283. UPDATE_PEER_STATS, vdev->pdev->pdev_id);
  6284. #endif
  6285. }
  6286. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  6287. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  6288. &vdev->stats, vdev->vdev_id,
  6289. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  6290. #endif
  6291. }
  6292. /**
  6293. * dp_print_common_rates_info(): Print common rate for tx or rx
  6294. * @pkt_type_array: rate type array contains rate info
  6295. *
  6296. * Return:void
  6297. */
  6298. static inline void
  6299. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  6300. {
  6301. uint8_t mcs, pkt_type;
  6302. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  6303. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  6304. if (!dp_rate_string[pkt_type][mcs].valid)
  6305. continue;
  6306. DP_PRINT_STATS(" %s = %d",
  6307. dp_rate_string[pkt_type][mcs].mcs_type,
  6308. pkt_type_array[pkt_type].mcs_count[mcs]);
  6309. }
  6310. DP_PRINT_STATS("\n");
  6311. }
  6312. }
  6313. /**
  6314. * dp_print_rx_rates(): Print Rx rate stats
  6315. * @vdev: DP_VDEV handle
  6316. *
  6317. * Return:void
  6318. */
  6319. static inline void
  6320. dp_print_rx_rates(struct dp_vdev *vdev)
  6321. {
  6322. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6323. uint8_t i;
  6324. uint8_t index = 0;
  6325. char nss[DP_NSS_LENGTH];
  6326. DP_PRINT_STATS("Rx Rate Info:\n");
  6327. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  6328. index = 0;
  6329. for (i = 0; i < SS_COUNT; i++) {
  6330. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6331. " %d", pdev->stats.rx.nss[i]);
  6332. }
  6333. DP_PRINT_STATS("NSS(1-8) = %s",
  6334. nss);
  6335. DP_PRINT_STATS("SGI ="
  6336. " 0.8us %d,"
  6337. " 0.4us %d,"
  6338. " 1.6us %d,"
  6339. " 3.2us %d,",
  6340. pdev->stats.rx.sgi_count[0],
  6341. pdev->stats.rx.sgi_count[1],
  6342. pdev->stats.rx.sgi_count[2],
  6343. pdev->stats.rx.sgi_count[3]);
  6344. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6345. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  6346. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  6347. DP_PRINT_STATS("Reception Type ="
  6348. " SU: %d,"
  6349. " MU_MIMO:%d,"
  6350. " MU_OFDMA:%d,"
  6351. " MU_OFDMA_MIMO:%d\n",
  6352. pdev->stats.rx.reception_type[0],
  6353. pdev->stats.rx.reception_type[1],
  6354. pdev->stats.rx.reception_type[2],
  6355. pdev->stats.rx.reception_type[3]);
  6356. DP_PRINT_STATS("Aggregation:\n");
  6357. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  6358. pdev->stats.rx.ampdu_cnt);
  6359. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  6360. pdev->stats.rx.non_ampdu_cnt);
  6361. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  6362. pdev->stats.rx.amsdu_cnt);
  6363. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  6364. pdev->stats.rx.non_amsdu_cnt);
  6365. }
  6366. /**
  6367. * dp_print_tx_rates(): Print tx rates
  6368. * @vdev: DP_VDEV handle
  6369. *
  6370. * Return:void
  6371. */
  6372. static inline void
  6373. dp_print_tx_rates(struct dp_vdev *vdev)
  6374. {
  6375. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6376. DP_PRINT_STATS("Tx Rate Info:\n");
  6377. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  6378. DP_PRINT_STATS("SGI ="
  6379. " 0.8us %d"
  6380. " 0.4us %d"
  6381. " 1.6us %d"
  6382. " 3.2us %d",
  6383. pdev->stats.tx.sgi_count[0],
  6384. pdev->stats.tx.sgi_count[1],
  6385. pdev->stats.tx.sgi_count[2],
  6386. pdev->stats.tx.sgi_count[3]);
  6387. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6388. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  6389. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  6390. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  6391. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  6392. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  6393. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  6394. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  6395. DP_PRINT_STATS("Aggregation:\n");
  6396. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  6397. pdev->stats.tx.ampdu_cnt);
  6398. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  6399. pdev->stats.tx.non_ampdu_cnt);
  6400. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  6401. pdev->stats.tx.amsdu_cnt);
  6402. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  6403. pdev->stats.tx.non_amsdu_cnt);
  6404. }
  6405. /**
  6406. * dp_print_peer_stats():print peer stats
  6407. * @peer: DP_PEER handle
  6408. *
  6409. * return void
  6410. */
  6411. static inline void dp_print_peer_stats(struct dp_peer *peer)
  6412. {
  6413. uint8_t i;
  6414. uint32_t index;
  6415. uint32_t j;
  6416. char nss[DP_NSS_LENGTH];
  6417. char mu_group_id[DP_MU_GROUP_LENGTH];
  6418. DP_PRINT_STATS("Node Tx Stats:\n");
  6419. DP_PRINT_STATS("Total Packet Completions = %d",
  6420. peer->stats.tx.comp_pkt.num);
  6421. DP_PRINT_STATS("Total Bytes Completions = %llu",
  6422. peer->stats.tx.comp_pkt.bytes);
  6423. DP_PRINT_STATS("Success Packets = %d",
  6424. peer->stats.tx.tx_success.num);
  6425. DP_PRINT_STATS("Success Bytes = %llu",
  6426. peer->stats.tx.tx_success.bytes);
  6427. DP_PRINT_STATS("Unicast Success Packets = %d",
  6428. peer->stats.tx.ucast.num);
  6429. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  6430. peer->stats.tx.ucast.bytes);
  6431. DP_PRINT_STATS("Multicast Success Packets = %d",
  6432. peer->stats.tx.mcast.num);
  6433. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  6434. peer->stats.tx.mcast.bytes);
  6435. DP_PRINT_STATS("Broadcast Success Packets = %d",
  6436. peer->stats.tx.bcast.num);
  6437. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  6438. peer->stats.tx.bcast.bytes);
  6439. DP_PRINT_STATS("Packets Failed = %d",
  6440. peer->stats.tx.tx_failed);
  6441. DP_PRINT_STATS("Packets In OFDMA = %d",
  6442. peer->stats.tx.ofdma);
  6443. DP_PRINT_STATS("Packets In STBC = %d",
  6444. peer->stats.tx.stbc);
  6445. DP_PRINT_STATS("Packets In LDPC = %d",
  6446. peer->stats.tx.ldpc);
  6447. DP_PRINT_STATS("Packet Retries = %d",
  6448. peer->stats.tx.retries);
  6449. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  6450. peer->stats.tx.amsdu_cnt);
  6451. DP_PRINT_STATS("Msdu's As Part of Ampdu = %d",
  6452. peer->stats.tx.non_ampdu_cnt);
  6453. DP_PRINT_STATS("Msdu's As Ampdu = %d",
  6454. peer->stats.tx.ampdu_cnt);
  6455. DP_PRINT_STATS("Last Packet RSSI = %d",
  6456. peer->stats.tx.last_ack_rssi);
  6457. DP_PRINT_STATS("Dropped At FW: Removed Pkts = %u",
  6458. peer->stats.tx.dropped.fw_rem.num);
  6459. DP_PRINT_STATS("Dropped At FW: Removed bytes = %llu",
  6460. peer->stats.tx.dropped.fw_rem.bytes);
  6461. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  6462. peer->stats.tx.dropped.fw_rem_tx);
  6463. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  6464. peer->stats.tx.dropped.fw_rem_notx);
  6465. DP_PRINT_STATS("Dropped : Age Out = %d",
  6466. peer->stats.tx.dropped.age_out);
  6467. DP_PRINT_STATS("NAWDS : ");
  6468. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  6469. peer->stats.tx.nawds_mcast_drop);
  6470. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  6471. peer->stats.tx.nawds_mcast.num);
  6472. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  6473. peer->stats.tx.nawds_mcast.bytes);
  6474. DP_PRINT_STATS("Rate Info:");
  6475. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  6476. DP_PRINT_STATS("SGI = "
  6477. " 0.8us %d"
  6478. " 0.4us %d"
  6479. " 1.6us %d"
  6480. " 3.2us %d",
  6481. peer->stats.tx.sgi_count[0],
  6482. peer->stats.tx.sgi_count[1],
  6483. peer->stats.tx.sgi_count[2],
  6484. peer->stats.tx.sgi_count[3]);
  6485. DP_PRINT_STATS("Excess Retries per AC ");
  6486. DP_PRINT_STATS(" Best effort = %d",
  6487. peer->stats.tx.excess_retries_per_ac[0]);
  6488. DP_PRINT_STATS(" Background= %d",
  6489. peer->stats.tx.excess_retries_per_ac[1]);
  6490. DP_PRINT_STATS(" Video = %d",
  6491. peer->stats.tx.excess_retries_per_ac[2]);
  6492. DP_PRINT_STATS(" Voice = %d",
  6493. peer->stats.tx.excess_retries_per_ac[3]);
  6494. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  6495. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  6496. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  6497. index = 0;
  6498. for (i = 0; i < SS_COUNT; i++) {
  6499. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6500. " %d", peer->stats.tx.nss[i]);
  6501. }
  6502. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  6503. DP_PRINT_STATS("Transmit Type :");
  6504. DP_PRINT_STATS("SU %d, MU_MIMO %d, MU_OFDMA %d, MU_MIMO_OFDMA %d",
  6505. peer->stats.tx.transmit_type[0],
  6506. peer->stats.tx.transmit_type[1],
  6507. peer->stats.tx.transmit_type[2],
  6508. peer->stats.tx.transmit_type[3]);
  6509. for (i = 0; i < MAX_MU_GROUP_ID;) {
  6510. index = 0;
  6511. for (j = 0; j < DP_MU_GROUP_SHOW && i < MAX_MU_GROUP_ID;
  6512. j++) {
  6513. index += qdf_snprint(&mu_group_id[index],
  6514. DP_MU_GROUP_LENGTH - index,
  6515. " %d",
  6516. peer->stats.tx.mu_group_id[i]);
  6517. i++;
  6518. }
  6519. DP_PRINT_STATS("User position list for GID %02d->%d: [%s]",
  6520. i - DP_MU_GROUP_SHOW, i - 1, mu_group_id);
  6521. }
  6522. DP_PRINT_STATS("Last Packet RU index [%d], Size [%d]",
  6523. peer->stats.tx.ru_start, peer->stats.tx.ru_tones);
  6524. DP_PRINT_STATS("RU Locations RU[26 52 106 242 484 996]:");
  6525. DP_PRINT_STATS("RU_26: %d", peer->stats.tx.ru_loc[0]);
  6526. DP_PRINT_STATS("RU 52: %d", peer->stats.tx.ru_loc[1]);
  6527. DP_PRINT_STATS("RU 106: %d", peer->stats.tx.ru_loc[2]);
  6528. DP_PRINT_STATS("RU 242: %d", peer->stats.tx.ru_loc[3]);
  6529. DP_PRINT_STATS("RU 484: %d", peer->stats.tx.ru_loc[4]);
  6530. DP_PRINT_STATS("RU 996: %d", peer->stats.tx.ru_loc[5]);
  6531. DP_PRINT_STATS("Aggregation:");
  6532. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  6533. peer->stats.tx.amsdu_cnt);
  6534. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  6535. peer->stats.tx.non_amsdu_cnt);
  6536. DP_PRINT_STATS("Bytes and Packets transmitted in last one sec:");
  6537. DP_PRINT_STATS(" Bytes transmitted in last sec: %d",
  6538. peer->stats.tx.tx_byte_rate);
  6539. DP_PRINT_STATS(" Data transmitted in last sec: %d",
  6540. peer->stats.tx.tx_data_rate);
  6541. DP_PRINT_STATS("Node Rx Stats:");
  6542. DP_PRINT_STATS("Packets Sent To Stack = %d",
  6543. peer->stats.rx.to_stack.num);
  6544. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  6545. peer->stats.rx.to_stack.bytes);
  6546. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  6547. DP_PRINT_STATS("Ring Id = %d", i);
  6548. DP_PRINT_STATS(" Packets Received = %d",
  6549. peer->stats.rx.rcvd_reo[i].num);
  6550. DP_PRINT_STATS(" Bytes Received = %llu",
  6551. peer->stats.rx.rcvd_reo[i].bytes);
  6552. }
  6553. DP_PRINT_STATS("Multicast Packets Received = %d",
  6554. peer->stats.rx.multicast.num);
  6555. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  6556. peer->stats.rx.multicast.bytes);
  6557. DP_PRINT_STATS("Broadcast Packets Received = %d",
  6558. peer->stats.rx.bcast.num);
  6559. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  6560. peer->stats.rx.bcast.bytes);
  6561. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  6562. peer->stats.rx.intra_bss.pkts.num);
  6563. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  6564. peer->stats.rx.intra_bss.pkts.bytes);
  6565. DP_PRINT_STATS("Raw Packets Received = %d",
  6566. peer->stats.rx.raw.num);
  6567. DP_PRINT_STATS("Raw Bytes Received = %llu",
  6568. peer->stats.rx.raw.bytes);
  6569. DP_PRINT_STATS("Errors: MIC Errors = %d",
  6570. peer->stats.rx.err.mic_err);
  6571. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  6572. peer->stats.rx.err.decrypt_err);
  6573. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  6574. peer->stats.rx.non_ampdu_cnt);
  6575. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  6576. peer->stats.rx.ampdu_cnt);
  6577. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  6578. peer->stats.rx.non_amsdu_cnt);
  6579. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  6580. peer->stats.rx.amsdu_cnt);
  6581. DP_PRINT_STATS("NAWDS : ");
  6582. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  6583. peer->stats.rx.nawds_mcast_drop);
  6584. DP_PRINT_STATS("SGI ="
  6585. " 0.8us %d"
  6586. " 0.4us %d"
  6587. " 1.6us %d"
  6588. " 3.2us %d",
  6589. peer->stats.rx.sgi_count[0],
  6590. peer->stats.rx.sgi_count[1],
  6591. peer->stats.rx.sgi_count[2],
  6592. peer->stats.rx.sgi_count[3]);
  6593. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  6594. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  6595. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  6596. DP_PRINT_STATS("Reception Type ="
  6597. " SU %d,"
  6598. " MU_MIMO %d,"
  6599. " MU_OFDMA %d,"
  6600. " MU_OFDMA_MIMO %d",
  6601. peer->stats.rx.reception_type[0],
  6602. peer->stats.rx.reception_type[1],
  6603. peer->stats.rx.reception_type[2],
  6604. peer->stats.rx.reception_type[3]);
  6605. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  6606. index = 0;
  6607. for (i = 0; i < SS_COUNT; i++) {
  6608. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6609. " %d", peer->stats.rx.nss[i]);
  6610. }
  6611. DP_PRINT_STATS("NSS(1-8) = %s",
  6612. nss);
  6613. DP_PRINT_STATS("Aggregation:");
  6614. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  6615. peer->stats.rx.ampdu_cnt);
  6616. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  6617. peer->stats.rx.non_ampdu_cnt);
  6618. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  6619. peer->stats.rx.amsdu_cnt);
  6620. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  6621. peer->stats.rx.non_amsdu_cnt);
  6622. DP_PRINT_STATS("Bytes and Packets received in last one sec:");
  6623. DP_PRINT_STATS(" Bytes received in last sec: %d",
  6624. peer->stats.rx.rx_byte_rate);
  6625. DP_PRINT_STATS(" Data received in last sec: %d",
  6626. peer->stats.rx.rx_data_rate);
  6627. }
  6628. /*
  6629. * dp_get_host_peer_stats()- function to print peer stats
  6630. * @pdev_handle: DP_PDEV handle
  6631. * @mac_addr: mac address of the peer
  6632. *
  6633. * Return: void
  6634. */
  6635. static void
  6636. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  6637. {
  6638. struct dp_peer *peer;
  6639. uint8_t local_id;
  6640. if (!mac_addr) {
  6641. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6642. "Invalid MAC address\n");
  6643. return;
  6644. }
  6645. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  6646. &local_id);
  6647. if (!peer) {
  6648. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6649. "%s: Invalid peer\n", __func__);
  6650. return;
  6651. }
  6652. /* Making sure the peer is for the specific pdev */
  6653. if ((struct dp_pdev *)pdev_handle != peer->vdev->pdev) {
  6654. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6655. "%s: Peer is not for this pdev\n", __func__);
  6656. return;
  6657. }
  6658. dp_print_peer_stats(peer);
  6659. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  6660. }
  6661. /**
  6662. * dp_print_soc_cfg_params()- Dump soc wlan config parameters
  6663. * @soc_handle: Soc handle
  6664. *
  6665. * Return: void
  6666. */
  6667. static void
  6668. dp_print_soc_cfg_params(struct dp_soc *soc)
  6669. {
  6670. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  6671. uint8_t index = 0, i = 0;
  6672. char ring_mask[DP_MAX_INT_CONTEXTS_STRING_LENGTH];
  6673. int num_of_int_contexts;
  6674. if (!soc) {
  6675. dp_err("Context is null");
  6676. return;
  6677. }
  6678. soc_cfg_ctx = soc->wlan_cfg_ctx;
  6679. if (!soc_cfg_ctx) {
  6680. dp_err("Context is null");
  6681. return;
  6682. }
  6683. num_of_int_contexts =
  6684. wlan_cfg_get_num_contexts(soc_cfg_ctx);
  6685. DP_TRACE_STATS(DEBUG, "No. of interrupt contexts: %u",
  6686. soc_cfg_ctx->num_int_ctxts);
  6687. DP_TRACE_STATS(DEBUG, "Max clients: %u",
  6688. soc_cfg_ctx->max_clients);
  6689. DP_TRACE_STATS(DEBUG, "Max alloc size: %u ",
  6690. soc_cfg_ctx->max_alloc_size);
  6691. DP_TRACE_STATS(DEBUG, "Per pdev tx ring: %u ",
  6692. soc_cfg_ctx->per_pdev_tx_ring);
  6693. DP_TRACE_STATS(DEBUG, "Num tcl data rings: %u ",
  6694. soc_cfg_ctx->num_tcl_data_rings);
  6695. DP_TRACE_STATS(DEBUG, "Per pdev rx ring: %u ",
  6696. soc_cfg_ctx->per_pdev_rx_ring);
  6697. DP_TRACE_STATS(DEBUG, "Per pdev lmac ring: %u ",
  6698. soc_cfg_ctx->per_pdev_lmac_ring);
  6699. DP_TRACE_STATS(DEBUG, "Num of reo dest rings: %u ",
  6700. soc_cfg_ctx->num_reo_dest_rings);
  6701. DP_TRACE_STATS(DEBUG, "Num tx desc pool: %u ",
  6702. soc_cfg_ctx->num_tx_desc_pool);
  6703. DP_TRACE_STATS(DEBUG, "Num tx ext desc pool: %u ",
  6704. soc_cfg_ctx->num_tx_ext_desc_pool);
  6705. DP_TRACE_STATS(DEBUG, "Num tx desc: %u ",
  6706. soc_cfg_ctx->num_tx_desc);
  6707. DP_TRACE_STATS(DEBUG, "Num tx ext desc: %u ",
  6708. soc_cfg_ctx->num_tx_ext_desc);
  6709. DP_TRACE_STATS(DEBUG, "Htt packet type: %u ",
  6710. soc_cfg_ctx->htt_packet_type);
  6711. DP_TRACE_STATS(DEBUG, "Max peer_ids: %u ",
  6712. soc_cfg_ctx->max_peer_id);
  6713. DP_TRACE_STATS(DEBUG, "Tx ring size: %u ",
  6714. soc_cfg_ctx->tx_ring_size);
  6715. DP_TRACE_STATS(DEBUG, "Tx comp ring size: %u ",
  6716. soc_cfg_ctx->tx_comp_ring_size);
  6717. DP_TRACE_STATS(DEBUG, "Tx comp ring size nss: %u ",
  6718. soc_cfg_ctx->tx_comp_ring_size_nss);
  6719. DP_TRACE_STATS(DEBUG, "Int batch threshold tx: %u ",
  6720. soc_cfg_ctx->int_batch_threshold_tx);
  6721. DP_TRACE_STATS(DEBUG, "Int timer threshold tx: %u ",
  6722. soc_cfg_ctx->int_timer_threshold_tx);
  6723. DP_TRACE_STATS(DEBUG, "Int batch threshold rx: %u ",
  6724. soc_cfg_ctx->int_batch_threshold_rx);
  6725. DP_TRACE_STATS(DEBUG, "Int timer threshold rx: %u ",
  6726. soc_cfg_ctx->int_timer_threshold_rx);
  6727. DP_TRACE_STATS(DEBUG, "Int batch threshold other: %u ",
  6728. soc_cfg_ctx->int_batch_threshold_other);
  6729. DP_TRACE_STATS(DEBUG, "Int timer threshold other: %u ",
  6730. soc_cfg_ctx->int_timer_threshold_other);
  6731. for (i = 0; i < num_of_int_contexts; i++) {
  6732. index += qdf_snprint(&ring_mask[index],
  6733. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6734. " %d",
  6735. soc_cfg_ctx->int_tx_ring_mask[i]);
  6736. }
  6737. DP_TRACE_STATS(DEBUG, "Tx ring mask (0-%d):%s",
  6738. num_of_int_contexts, ring_mask);
  6739. index = 0;
  6740. for (i = 0; i < num_of_int_contexts; i++) {
  6741. index += qdf_snprint(&ring_mask[index],
  6742. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6743. " %d",
  6744. soc_cfg_ctx->int_rx_ring_mask[i]);
  6745. }
  6746. DP_TRACE_STATS(DEBUG, "Rx ring mask (0-%d):%s",
  6747. num_of_int_contexts, ring_mask);
  6748. index = 0;
  6749. for (i = 0; i < num_of_int_contexts; i++) {
  6750. index += qdf_snprint(&ring_mask[index],
  6751. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6752. " %d",
  6753. soc_cfg_ctx->int_rx_mon_ring_mask[i]);
  6754. }
  6755. DP_TRACE_STATS(DEBUG, "Rx mon ring mask (0-%d):%s",
  6756. num_of_int_contexts, ring_mask);
  6757. index = 0;
  6758. for (i = 0; i < num_of_int_contexts; i++) {
  6759. index += qdf_snprint(&ring_mask[index],
  6760. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6761. " %d",
  6762. soc_cfg_ctx->int_rx_err_ring_mask[i]);
  6763. }
  6764. DP_TRACE_STATS(DEBUG, "Rx err ring mask (0-%d):%s",
  6765. num_of_int_contexts, ring_mask);
  6766. index = 0;
  6767. for (i = 0; i < num_of_int_contexts; i++) {
  6768. index += qdf_snprint(&ring_mask[index],
  6769. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6770. " %d",
  6771. soc_cfg_ctx->int_rx_wbm_rel_ring_mask[i]);
  6772. }
  6773. DP_TRACE_STATS(DEBUG, "Rx wbm rel ring mask (0-%d):%s",
  6774. num_of_int_contexts, ring_mask);
  6775. index = 0;
  6776. for (i = 0; i < num_of_int_contexts; i++) {
  6777. index += qdf_snprint(&ring_mask[index],
  6778. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6779. " %d",
  6780. soc_cfg_ctx->int_reo_status_ring_mask[i]);
  6781. }
  6782. DP_TRACE_STATS(DEBUG, "Reo ring mask (0-%d):%s",
  6783. num_of_int_contexts, ring_mask);
  6784. index = 0;
  6785. for (i = 0; i < num_of_int_contexts; i++) {
  6786. index += qdf_snprint(&ring_mask[index],
  6787. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6788. " %d",
  6789. soc_cfg_ctx->int_rxdma2host_ring_mask[i]);
  6790. }
  6791. DP_TRACE_STATS(DEBUG, "Rxdma2host ring mask (0-%d):%s",
  6792. num_of_int_contexts, ring_mask);
  6793. index = 0;
  6794. for (i = 0; i < num_of_int_contexts; i++) {
  6795. index += qdf_snprint(&ring_mask[index],
  6796. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6797. " %d",
  6798. soc_cfg_ctx->int_host2rxdma_ring_mask[i]);
  6799. }
  6800. DP_TRACE_STATS(DEBUG, "Host2rxdma ring mask (0-%d):%s",
  6801. num_of_int_contexts, ring_mask);
  6802. DP_TRACE_STATS(DEBUG, "Rx hash: %u ",
  6803. soc_cfg_ctx->rx_hash);
  6804. DP_TRACE_STATS(DEBUG, "Tso enabled: %u ",
  6805. soc_cfg_ctx->tso_enabled);
  6806. DP_TRACE_STATS(DEBUG, "Lro enabled: %u ",
  6807. soc_cfg_ctx->lro_enabled);
  6808. DP_TRACE_STATS(DEBUG, "Sg enabled: %u ",
  6809. soc_cfg_ctx->sg_enabled);
  6810. DP_TRACE_STATS(DEBUG, "Gro enabled: %u ",
  6811. soc_cfg_ctx->gro_enabled);
  6812. DP_TRACE_STATS(DEBUG, "rawmode enabled: %u ",
  6813. soc_cfg_ctx->rawmode_enabled);
  6814. DP_TRACE_STATS(DEBUG, "peer flow ctrl enabled: %u ",
  6815. soc_cfg_ctx->peer_flow_ctrl_enabled);
  6816. DP_TRACE_STATS(DEBUG, "napi enabled: %u ",
  6817. soc_cfg_ctx->napi_enabled);
  6818. DP_TRACE_STATS(DEBUG, "Tcp Udp checksum offload: %u ",
  6819. soc_cfg_ctx->tcp_udp_checksumoffload);
  6820. DP_TRACE_STATS(DEBUG, "Defrag timeout check: %u ",
  6821. soc_cfg_ctx->defrag_timeout_check);
  6822. DP_TRACE_STATS(DEBUG, "Rx defrag min timeout: %u ",
  6823. soc_cfg_ctx->rx_defrag_min_timeout);
  6824. DP_TRACE_STATS(DEBUG, "WBM release ring: %u ",
  6825. soc_cfg_ctx->wbm_release_ring);
  6826. DP_TRACE_STATS(DEBUG, "TCL CMD ring: %u ",
  6827. soc_cfg_ctx->tcl_cmd_ring);
  6828. DP_TRACE_STATS(DEBUG, "TCL Status ring: %u ",
  6829. soc_cfg_ctx->tcl_status_ring);
  6830. DP_TRACE_STATS(DEBUG, "REO Reinject ring: %u ",
  6831. soc_cfg_ctx->reo_reinject_ring);
  6832. DP_TRACE_STATS(DEBUG, "RX release ring: %u ",
  6833. soc_cfg_ctx->rx_release_ring);
  6834. DP_TRACE_STATS(DEBUG, "REO Exception ring: %u ",
  6835. soc_cfg_ctx->reo_exception_ring);
  6836. DP_TRACE_STATS(DEBUG, "REO CMD ring: %u ",
  6837. soc_cfg_ctx->reo_cmd_ring);
  6838. DP_TRACE_STATS(DEBUG, "REO STATUS ring: %u ",
  6839. soc_cfg_ctx->reo_status_ring);
  6840. DP_TRACE_STATS(DEBUG, "RXDMA refill ring: %u ",
  6841. soc_cfg_ctx->rxdma_refill_ring);
  6842. DP_TRACE_STATS(DEBUG, "RXDMA err dst ring: %u ",
  6843. soc_cfg_ctx->rxdma_err_dst_ring);
  6844. }
  6845. /**
  6846. * dp_print_vdev_cfg_params() - Print the pdev cfg parameters
  6847. * @pdev_handle: DP pdev handle
  6848. *
  6849. * Return - void
  6850. */
  6851. static void
  6852. dp_print_pdev_cfg_params(struct dp_pdev *pdev)
  6853. {
  6854. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  6855. if (!pdev) {
  6856. dp_err("Context is null");
  6857. return;
  6858. }
  6859. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  6860. if (!pdev_cfg_ctx) {
  6861. dp_err("Context is null");
  6862. return;
  6863. }
  6864. DP_TRACE_STATS(DEBUG, "Rx dma buf ring size: %d ",
  6865. pdev_cfg_ctx->rx_dma_buf_ring_size);
  6866. DP_TRACE_STATS(DEBUG, "DMA Mon buf ring size: %d ",
  6867. pdev_cfg_ctx->dma_mon_buf_ring_size);
  6868. DP_TRACE_STATS(DEBUG, "DMA Mon dest ring size: %d ",
  6869. pdev_cfg_ctx->dma_mon_dest_ring_size);
  6870. DP_TRACE_STATS(DEBUG, "DMA Mon status ring size: %d ",
  6871. pdev_cfg_ctx->dma_mon_status_ring_size);
  6872. DP_TRACE_STATS(DEBUG, "Rxdma monitor desc ring: %d",
  6873. pdev_cfg_ctx->rxdma_monitor_desc_ring);
  6874. DP_TRACE_STATS(DEBUG, "Num mac rings: %d ",
  6875. pdev_cfg_ctx->num_mac_rings);
  6876. }
  6877. /**
  6878. * dp_txrx_stats_help() - Helper function for Txrx_Stats
  6879. *
  6880. * Return: None
  6881. */
  6882. static void dp_txrx_stats_help(void)
  6883. {
  6884. dp_info("Command: iwpriv wlan0 txrx_stats <stats_option> <mac_id>");
  6885. dp_info("stats_option:");
  6886. dp_info(" 1 -- HTT Tx Statistics");
  6887. dp_info(" 2 -- HTT Rx Statistics");
  6888. dp_info(" 3 -- HTT Tx HW Queue Statistics");
  6889. dp_info(" 4 -- HTT Tx HW Sched Statistics");
  6890. dp_info(" 5 -- HTT Error Statistics");
  6891. dp_info(" 6 -- HTT TQM Statistics");
  6892. dp_info(" 7 -- HTT TQM CMDQ Statistics");
  6893. dp_info(" 8 -- HTT TX_DE_CMN Statistics");
  6894. dp_info(" 9 -- HTT Tx Rate Statistics");
  6895. dp_info(" 10 -- HTT Rx Rate Statistics");
  6896. dp_info(" 11 -- HTT Peer Statistics");
  6897. dp_info(" 12 -- HTT Tx SelfGen Statistics");
  6898. dp_info(" 13 -- HTT Tx MU HWQ Statistics");
  6899. dp_info(" 14 -- HTT RING_IF_INFO Statistics");
  6900. dp_info(" 15 -- HTT SRNG Statistics");
  6901. dp_info(" 16 -- HTT SFM Info Statistics");
  6902. dp_info(" 17 -- HTT PDEV_TX_MU_MIMO_SCHED INFO Statistics");
  6903. dp_info(" 18 -- HTT Peer List Details");
  6904. dp_info(" 20 -- Clear Host Statistics");
  6905. dp_info(" 21 -- Host Rx Rate Statistics");
  6906. dp_info(" 22 -- Host Tx Rate Statistics");
  6907. dp_info(" 23 -- Host Tx Statistics");
  6908. dp_info(" 24 -- Host Rx Statistics");
  6909. dp_info(" 25 -- Host AST Statistics");
  6910. dp_info(" 26 -- Host SRNG PTR Statistics");
  6911. dp_info(" 27 -- Host Mon Statistics");
  6912. dp_info(" 28 -- Host REO Queue Statistics");
  6913. dp_info(" 29 -- Host Soc cfg param Statistics");
  6914. dp_info(" 30 -- Host pdev cfg param Statistics");
  6915. }
  6916. /**
  6917. * dp_print_host_stats()- Function to print the stats aggregated at host
  6918. * @vdev_handle: DP_VDEV handle
  6919. * @type: host stats type
  6920. *
  6921. * Return: 0 on success, print error message in case of failure
  6922. */
  6923. static int
  6924. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  6925. struct cdp_txrx_stats_req *req)
  6926. {
  6927. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6928. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6929. enum cdp_host_txrx_stats type =
  6930. dp_stats_mapping_table[req->stats][STATS_HOST];
  6931. dp_aggregate_pdev_stats(pdev);
  6932. switch (type) {
  6933. case TXRX_CLEAR_STATS:
  6934. dp_txrx_host_stats_clr(vdev);
  6935. break;
  6936. case TXRX_RX_RATE_STATS:
  6937. dp_print_rx_rates(vdev);
  6938. break;
  6939. case TXRX_TX_RATE_STATS:
  6940. dp_print_tx_rates(vdev);
  6941. break;
  6942. case TXRX_TX_HOST_STATS:
  6943. dp_print_pdev_tx_stats(pdev);
  6944. dp_print_soc_tx_stats(pdev->soc);
  6945. break;
  6946. case TXRX_RX_HOST_STATS:
  6947. dp_print_pdev_rx_stats(pdev);
  6948. dp_print_soc_rx_stats(pdev->soc);
  6949. break;
  6950. case TXRX_AST_STATS:
  6951. dp_print_ast_stats(pdev->soc);
  6952. dp_print_peer_table(vdev);
  6953. break;
  6954. case TXRX_SRNG_PTR_STATS:
  6955. dp_print_ring_stats(pdev);
  6956. break;
  6957. case TXRX_RX_MON_STATS:
  6958. dp_print_pdev_rx_mon_stats(pdev);
  6959. break;
  6960. case TXRX_REO_QUEUE_STATS:
  6961. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  6962. break;
  6963. case TXRX_SOC_CFG_PARAMS:
  6964. dp_print_soc_cfg_params(pdev->soc);
  6965. break;
  6966. case TXRX_PDEV_CFG_PARAMS:
  6967. dp_print_pdev_cfg_params(pdev);
  6968. break;
  6969. case TXRX_NAPI_STATS:
  6970. dp_print_napi_stats(pdev->soc);
  6971. break;
  6972. default:
  6973. dp_info("Wrong Input For TxRx Host Stats");
  6974. dp_txrx_stats_help();
  6975. break;
  6976. }
  6977. return 0;
  6978. }
  6979. /*
  6980. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  6981. * @pdev: DP_PDEV handle
  6982. *
  6983. * Return: void
  6984. */
  6985. static void
  6986. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  6987. {
  6988. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  6989. int mac_id;
  6990. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  6991. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6992. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6993. pdev->pdev_id);
  6994. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6995. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6996. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6997. }
  6998. }
  6999. /*
  7000. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  7001. * @pdev: DP_PDEV handle
  7002. *
  7003. * Return: void
  7004. */
  7005. static void
  7006. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  7007. {
  7008. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  7009. int mac_id;
  7010. htt_tlv_filter.mpdu_start = 1;
  7011. htt_tlv_filter.msdu_start = 0;
  7012. htt_tlv_filter.packet = 0;
  7013. htt_tlv_filter.msdu_end = 0;
  7014. htt_tlv_filter.mpdu_end = 0;
  7015. htt_tlv_filter.attention = 0;
  7016. htt_tlv_filter.ppdu_start = 1;
  7017. htt_tlv_filter.ppdu_end = 1;
  7018. htt_tlv_filter.ppdu_end_user_stats = 1;
  7019. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  7020. htt_tlv_filter.ppdu_end_status_done = 1;
  7021. htt_tlv_filter.enable_fp = 1;
  7022. htt_tlv_filter.enable_md = 0;
  7023. if (pdev->neighbour_peers_added &&
  7024. pdev->soc->hw_nac_monitor_support) {
  7025. htt_tlv_filter.enable_md = 1;
  7026. htt_tlv_filter.packet_header = 1;
  7027. }
  7028. if (pdev->mcopy_mode) {
  7029. htt_tlv_filter.packet_header = 1;
  7030. htt_tlv_filter.enable_mo = 1;
  7031. }
  7032. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  7033. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  7034. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  7035. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  7036. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  7037. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  7038. if (pdev->neighbour_peers_added &&
  7039. pdev->soc->hw_nac_monitor_support)
  7040. htt_tlv_filter.md_data_filter = FILTER_DATA_ALL;
  7041. htt_tlv_filter.offset_valid = false;
  7042. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  7043. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  7044. pdev->pdev_id);
  7045. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  7046. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  7047. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  7048. }
  7049. }
  7050. /*
  7051. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  7052. * modes are enabled or not.
  7053. * @dp_pdev: dp pdev handle.
  7054. *
  7055. * Return: bool
  7056. */
  7057. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  7058. {
  7059. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  7060. !pdev->mcopy_mode)
  7061. return true;
  7062. else
  7063. return false;
  7064. }
  7065. /*
  7066. *dp_set_bpr_enable() - API to enable/disable bpr feature
  7067. *@pdev_handle: DP_PDEV handle.
  7068. *@val: Provided value.
  7069. *
  7070. *Return: 0 for success. nonzero for failure.
  7071. */
  7072. static QDF_STATUS
  7073. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  7074. {
  7075. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7076. switch (val) {
  7077. case CDP_BPR_DISABLE:
  7078. pdev->bpr_enable = CDP_BPR_DISABLE;
  7079. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  7080. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  7081. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  7082. } else if (pdev->enhanced_stats_en &&
  7083. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  7084. !pdev->pktlog_ppdu_stats) {
  7085. dp_h2t_cfg_stats_msg_send(pdev,
  7086. DP_PPDU_STATS_CFG_ENH_STATS,
  7087. pdev->pdev_id);
  7088. }
  7089. break;
  7090. case CDP_BPR_ENABLE:
  7091. pdev->bpr_enable = CDP_BPR_ENABLE;
  7092. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  7093. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  7094. dp_h2t_cfg_stats_msg_send(pdev,
  7095. DP_PPDU_STATS_CFG_BPR,
  7096. pdev->pdev_id);
  7097. } else if (pdev->enhanced_stats_en &&
  7098. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  7099. !pdev->pktlog_ppdu_stats) {
  7100. dp_h2t_cfg_stats_msg_send(pdev,
  7101. DP_PPDU_STATS_CFG_BPR_ENH,
  7102. pdev->pdev_id);
  7103. } else if (pdev->pktlog_ppdu_stats) {
  7104. dp_h2t_cfg_stats_msg_send(pdev,
  7105. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  7106. pdev->pdev_id);
  7107. }
  7108. break;
  7109. default:
  7110. break;
  7111. }
  7112. return QDF_STATUS_SUCCESS;
  7113. }
  7114. /*
  7115. * dp_pdev_tid_stats_ingress_inc
  7116. * @pdev: pdev handle
  7117. * @val: increase in value
  7118. *
  7119. * Return: void
  7120. */
  7121. static void
  7122. dp_pdev_tid_stats_ingress_inc(struct cdp_pdev *pdev, uint32_t val)
  7123. {
  7124. struct dp_pdev *dp_pdev = (struct dp_pdev *)pdev;
  7125. dp_pdev->stats.tid_stats.ingress_stack += val;
  7126. }
  7127. /*
  7128. * dp_pdev_tid_stats_osif_drop
  7129. * @pdev: pdev handle
  7130. * @val: increase in value
  7131. *
  7132. * Return: void
  7133. */
  7134. static void
  7135. dp_pdev_tid_stats_osif_drop(struct cdp_pdev *pdev, uint32_t val)
  7136. {
  7137. struct dp_pdev *dp_pdev = (struct dp_pdev *)pdev;
  7138. dp_pdev->stats.tid_stats.osif_drop += val;
  7139. }
  7140. /*
  7141. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  7142. * @pdev_handle: DP_PDEV handle
  7143. * @val: user provided value
  7144. *
  7145. * Return: 0 for success. nonzero for failure.
  7146. */
  7147. static QDF_STATUS
  7148. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  7149. {
  7150. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7151. QDF_STATUS status = QDF_STATUS_SUCCESS;
  7152. if (pdev->mcopy_mode)
  7153. dp_reset_monitor_mode(pdev_handle);
  7154. switch (val) {
  7155. case 0:
  7156. pdev->tx_sniffer_enable = 0;
  7157. pdev->mcopy_mode = 0;
  7158. pdev->monitor_configured = false;
  7159. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  7160. !pdev->bpr_enable) {
  7161. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  7162. dp_ppdu_ring_reset(pdev);
  7163. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  7164. dp_h2t_cfg_stats_msg_send(pdev,
  7165. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  7166. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  7167. dp_h2t_cfg_stats_msg_send(pdev,
  7168. DP_PPDU_STATS_CFG_BPR_ENH,
  7169. pdev->pdev_id);
  7170. } else {
  7171. dp_h2t_cfg_stats_msg_send(pdev,
  7172. DP_PPDU_STATS_CFG_BPR,
  7173. pdev->pdev_id);
  7174. }
  7175. break;
  7176. case 1:
  7177. pdev->tx_sniffer_enable = 1;
  7178. pdev->mcopy_mode = 0;
  7179. pdev->monitor_configured = false;
  7180. if (!pdev->pktlog_ppdu_stats)
  7181. dp_h2t_cfg_stats_msg_send(pdev,
  7182. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  7183. break;
  7184. case 2:
  7185. if (pdev->monitor_vdev) {
  7186. status = QDF_STATUS_E_RESOURCES;
  7187. break;
  7188. }
  7189. pdev->mcopy_mode = 1;
  7190. dp_pdev_configure_monitor_rings(pdev);
  7191. pdev->monitor_configured = true;
  7192. pdev->tx_sniffer_enable = 0;
  7193. if (!pdev->pktlog_ppdu_stats)
  7194. dp_h2t_cfg_stats_msg_send(pdev,
  7195. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  7196. break;
  7197. default:
  7198. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7199. "Invalid value");
  7200. break;
  7201. }
  7202. return status;
  7203. }
  7204. /*
  7205. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  7206. * @pdev_handle: DP_PDEV handle
  7207. *
  7208. * Return: void
  7209. */
  7210. static void
  7211. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  7212. {
  7213. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7214. if (pdev->enhanced_stats_en == 0)
  7215. dp_cal_client_timer_start(pdev->cal_client_ctx);
  7216. pdev->enhanced_stats_en = 1;
  7217. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  7218. !pdev->monitor_vdev)
  7219. dp_ppdu_ring_cfg(pdev);
  7220. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  7221. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  7222. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  7223. dp_h2t_cfg_stats_msg_send(pdev,
  7224. DP_PPDU_STATS_CFG_BPR_ENH,
  7225. pdev->pdev_id);
  7226. }
  7227. }
  7228. /*
  7229. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  7230. * @pdev_handle: DP_PDEV handle
  7231. *
  7232. * Return: void
  7233. */
  7234. static void
  7235. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  7236. {
  7237. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7238. if (pdev->enhanced_stats_en == 1)
  7239. dp_cal_client_timer_stop(pdev->cal_client_ctx);
  7240. pdev->enhanced_stats_en = 0;
  7241. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  7242. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  7243. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  7244. dp_h2t_cfg_stats_msg_send(pdev,
  7245. DP_PPDU_STATS_CFG_BPR,
  7246. pdev->pdev_id);
  7247. }
  7248. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  7249. !pdev->monitor_vdev)
  7250. dp_ppdu_ring_reset(pdev);
  7251. }
  7252. /*
  7253. * dp_get_fw_peer_stats()- function to print peer stats
  7254. * @pdev_handle: DP_PDEV handle
  7255. * @mac_addr: mac address of the peer
  7256. * @cap: Type of htt stats requested
  7257. * @is_wait: if set, wait on completion from firmware response
  7258. *
  7259. * Currently Supporting only MAC ID based requests Only
  7260. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  7261. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  7262. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  7263. *
  7264. * Return: void
  7265. */
  7266. static void
  7267. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  7268. uint32_t cap, uint32_t is_wait)
  7269. {
  7270. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7271. int i;
  7272. uint32_t config_param0 = 0;
  7273. uint32_t config_param1 = 0;
  7274. uint32_t config_param2 = 0;
  7275. uint32_t config_param3 = 0;
  7276. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  7277. config_param0 |= (1 << (cap + 1));
  7278. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  7279. config_param1 |= (1 << i);
  7280. }
  7281. config_param2 |= (mac_addr[0] & 0x000000ff);
  7282. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  7283. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  7284. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  7285. config_param3 |= (mac_addr[4] & 0x000000ff);
  7286. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  7287. if (is_wait) {
  7288. qdf_event_reset(&pdev->fw_peer_stats_event);
  7289. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  7290. config_param0, config_param1,
  7291. config_param2, config_param3,
  7292. 0, 1, 0);
  7293. qdf_wait_single_event(&pdev->fw_peer_stats_event,
  7294. DP_FW_PEER_STATS_CMP_TIMEOUT_MSEC);
  7295. } else {
  7296. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  7297. config_param0, config_param1,
  7298. config_param2, config_param3,
  7299. 0, 0, 0);
  7300. }
  7301. }
  7302. /* This struct definition will be removed from here
  7303. * once it get added in FW headers*/
  7304. struct httstats_cmd_req {
  7305. uint32_t config_param0;
  7306. uint32_t config_param1;
  7307. uint32_t config_param2;
  7308. uint32_t config_param3;
  7309. int cookie;
  7310. u_int8_t stats_id;
  7311. };
  7312. /*
  7313. * dp_get_htt_stats: function to process the httstas request
  7314. * @pdev_handle: DP pdev handle
  7315. * @data: pointer to request data
  7316. * @data_len: length for request data
  7317. *
  7318. * return: void
  7319. */
  7320. static void
  7321. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  7322. {
  7323. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7324. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  7325. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  7326. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  7327. req->config_param0, req->config_param1,
  7328. req->config_param2, req->config_param3,
  7329. req->cookie, 0, 0);
  7330. }
  7331. /*
  7332. * dp_set_pdev_param: function to set parameters in pdev
  7333. * @pdev_handle: DP pdev handle
  7334. * @param: parameter type to be set
  7335. * @val: value of parameter to be set
  7336. *
  7337. * Return: 0 for success. nonzero for failure.
  7338. */
  7339. static QDF_STATUS dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  7340. enum cdp_pdev_param_type param,
  7341. uint8_t val)
  7342. {
  7343. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7344. switch (param) {
  7345. case CDP_CONFIG_DEBUG_SNIFFER:
  7346. return dp_config_debug_sniffer(pdev_handle, val);
  7347. case CDP_CONFIG_BPR_ENABLE:
  7348. return dp_set_bpr_enable(pdev_handle, val);
  7349. case CDP_CONFIG_PRIMARY_RADIO:
  7350. pdev->is_primary = val;
  7351. break;
  7352. case CDP_CONFIG_CAPTURE_LATENCY:
  7353. if (val == 1)
  7354. pdev->latency_capture_enable = true;
  7355. else
  7356. pdev->latency_capture_enable = false;
  7357. break;
  7358. case CDP_INGRESS_STATS:
  7359. dp_pdev_tid_stats_ingress_inc(pdev_handle, val);
  7360. break;
  7361. case CDP_OSIF_DROP:
  7362. dp_pdev_tid_stats_osif_drop(pdev_handle, val);
  7363. break;
  7364. case CDP_CONFIG_ENH_RX_CAPTURE:
  7365. return dp_config_enh_rx_capture(pdev_handle, val);
  7366. default:
  7367. return QDF_STATUS_E_INVAL;
  7368. }
  7369. return QDF_STATUS_SUCCESS;
  7370. }
  7371. /*
  7372. * dp_calculate_delay_stats: function to get rx delay stats
  7373. * @vdev_handle: DP vdev handle
  7374. * @nbuf: skb
  7375. *
  7376. * Return: void
  7377. */
  7378. static void dp_calculate_delay_stats(struct cdp_vdev *vdev_handle,
  7379. qdf_nbuf_t nbuf)
  7380. {
  7381. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7382. dp_rx_compute_delay(vdev, nbuf);
  7383. }
  7384. /*
  7385. * dp_get_vdev_param: function to get parameters from vdev
  7386. * @param: parameter type to get value
  7387. *
  7388. * return: void
  7389. */
  7390. static uint32_t dp_get_vdev_param(struct cdp_vdev *vdev_handle,
  7391. enum cdp_vdev_param_type param)
  7392. {
  7393. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7394. uint32_t val;
  7395. switch (param) {
  7396. case CDP_ENABLE_WDS:
  7397. val = vdev->wds_enabled;
  7398. break;
  7399. case CDP_ENABLE_MEC:
  7400. val = vdev->mec_enabled;
  7401. break;
  7402. case CDP_ENABLE_DA_WAR:
  7403. val = vdev->pdev->soc->da_war_enabled;
  7404. break;
  7405. default:
  7406. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7407. "param value %d is wrong\n",
  7408. param);
  7409. val = -1;
  7410. break;
  7411. }
  7412. return val;
  7413. }
  7414. /*
  7415. * dp_set_vdev_param: function to set parameters in vdev
  7416. * @param: parameter type to be set
  7417. * @val: value of parameter to be set
  7418. *
  7419. * return: void
  7420. */
  7421. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  7422. enum cdp_vdev_param_type param, uint32_t val)
  7423. {
  7424. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7425. switch (param) {
  7426. case CDP_ENABLE_WDS:
  7427. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7428. "wds_enable %d for vdev(%p) id(%d)\n",
  7429. val, vdev, vdev->vdev_id);
  7430. vdev->wds_enabled = val;
  7431. break;
  7432. case CDP_ENABLE_MEC:
  7433. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7434. "mec_enable %d for vdev(%p) id(%d)\n",
  7435. val, vdev, vdev->vdev_id);
  7436. vdev->mec_enabled = val;
  7437. break;
  7438. case CDP_ENABLE_DA_WAR:
  7439. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7440. "da_war_enable %d for vdev(%p) id(%d)\n",
  7441. val, vdev, vdev->vdev_id);
  7442. vdev->pdev->soc->da_war_enabled = val;
  7443. dp_wds_flush_ast_table_wifi3(((struct cdp_soc_t *)
  7444. vdev->pdev->soc));
  7445. break;
  7446. case CDP_ENABLE_NAWDS:
  7447. vdev->nawds_enabled = val;
  7448. break;
  7449. case CDP_ENABLE_MCAST_EN:
  7450. vdev->mcast_enhancement_en = val;
  7451. break;
  7452. case CDP_ENABLE_PROXYSTA:
  7453. vdev->proxysta_vdev = val;
  7454. break;
  7455. case CDP_UPDATE_TDLS_FLAGS:
  7456. vdev->tdls_link_connected = val;
  7457. break;
  7458. case CDP_CFG_WDS_AGING_TIMER:
  7459. if (val == 0)
  7460. qdf_timer_stop(&vdev->pdev->soc->ast_aging_timer);
  7461. else if (val != vdev->wds_aging_timer_val)
  7462. qdf_timer_mod(&vdev->pdev->soc->ast_aging_timer, val);
  7463. vdev->wds_aging_timer_val = val;
  7464. break;
  7465. case CDP_ENABLE_AP_BRIDGE:
  7466. if (wlan_op_mode_sta != vdev->opmode)
  7467. vdev->ap_bridge_enabled = val;
  7468. else
  7469. vdev->ap_bridge_enabled = false;
  7470. break;
  7471. case CDP_ENABLE_CIPHER:
  7472. vdev->sec_type = val;
  7473. break;
  7474. case CDP_ENABLE_QWRAP_ISOLATION:
  7475. vdev->isolation_vdev = val;
  7476. break;
  7477. default:
  7478. break;
  7479. }
  7480. dp_tx_vdev_update_search_flags(vdev);
  7481. }
  7482. /**
  7483. * dp_peer_set_nawds: set nawds bit in peer
  7484. * @peer_handle: pointer to peer
  7485. * @value: enable/disable nawds
  7486. *
  7487. * return: void
  7488. */
  7489. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  7490. {
  7491. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7492. peer->nawds_enabled = value;
  7493. }
  7494. /*
  7495. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  7496. * @vdev_handle: DP_VDEV handle
  7497. * @map_id:ID of map that needs to be updated
  7498. *
  7499. * Return: void
  7500. */
  7501. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  7502. uint8_t map_id)
  7503. {
  7504. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7505. vdev->dscp_tid_map_id = map_id;
  7506. return;
  7507. }
  7508. #ifdef DP_RATETABLE_SUPPORT
  7509. static int dp_txrx_get_ratekbps(int preamb, int mcs,
  7510. int htflag, int gintval)
  7511. {
  7512. uint32_t rix;
  7513. return dp_getrateindex((uint32_t)gintval, (uint16_t)mcs, 1,
  7514. (uint8_t)preamb, 1, &rix);
  7515. }
  7516. #else
  7517. static int dp_txrx_get_ratekbps(int preamb, int mcs,
  7518. int htflag, int gintval)
  7519. {
  7520. return 0;
  7521. }
  7522. #endif
  7523. /* dp_txrx_get_pdev_stats - Returns cdp_pdev_stats
  7524. * @peer_handle: DP pdev handle
  7525. *
  7526. * return : cdp_pdev_stats pointer
  7527. */
  7528. static struct cdp_pdev_stats*
  7529. dp_txrx_get_pdev_stats(struct cdp_pdev *pdev_handle)
  7530. {
  7531. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7532. dp_aggregate_pdev_stats(pdev);
  7533. return &pdev->stats;
  7534. }
  7535. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  7536. * @peer_handle: DP_PEER handle
  7537. *
  7538. * return : cdp_peer_stats pointer
  7539. */
  7540. static struct cdp_peer_stats*
  7541. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  7542. {
  7543. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7544. qdf_assert(peer);
  7545. return &peer->stats;
  7546. }
  7547. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  7548. * @peer_handle: DP_PEER handle
  7549. *
  7550. * return : void
  7551. */
  7552. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  7553. {
  7554. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7555. qdf_assert(peer);
  7556. qdf_mem_zero(&peer->stats, sizeof(peer->stats));
  7557. }
  7558. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  7559. * @vdev_handle: DP_VDEV handle
  7560. * @buf: buffer for vdev stats
  7561. *
  7562. * return : int
  7563. */
  7564. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  7565. bool is_aggregate)
  7566. {
  7567. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7568. struct cdp_vdev_stats *vdev_stats;
  7569. struct dp_pdev *pdev;
  7570. struct dp_soc *soc;
  7571. if (!vdev)
  7572. return 1;
  7573. pdev = vdev->pdev;
  7574. if (!pdev)
  7575. return 1;
  7576. soc = pdev->soc;
  7577. vdev_stats = (struct cdp_vdev_stats *)buf;
  7578. if (is_aggregate) {
  7579. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  7580. dp_aggregate_vdev_stats(vdev, buf);
  7581. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  7582. } else {
  7583. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  7584. }
  7585. return 0;
  7586. }
  7587. /*
  7588. * dp_get_total_per(): get total per
  7589. * @pdev_handle: DP_PDEV handle
  7590. *
  7591. * Return: % error rate using retries per packet and success packets
  7592. */
  7593. static int dp_get_total_per(struct cdp_pdev *pdev_handle)
  7594. {
  7595. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7596. dp_aggregate_pdev_stats(pdev);
  7597. if ((pdev->stats.tx.tx_success.num + pdev->stats.tx.retries) == 0)
  7598. return 0;
  7599. return ((pdev->stats.tx.retries * 100) /
  7600. ((pdev->stats.tx.tx_success.num) + (pdev->stats.tx.retries)));
  7601. }
  7602. /*
  7603. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  7604. * @pdev_handle: DP_PDEV handle
  7605. * @buf: to hold pdev_stats
  7606. *
  7607. * Return: int
  7608. */
  7609. static int
  7610. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  7611. {
  7612. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7613. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  7614. struct cdp_txrx_stats_req req = {0,};
  7615. dp_aggregate_pdev_stats(pdev);
  7616. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_TX;
  7617. req.cookie_val = 1;
  7618. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7619. req.param1, req.param2, req.param3, 0,
  7620. req.cookie_val, 0);
  7621. msleep(DP_MAX_SLEEP_TIME);
  7622. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_RX;
  7623. req.cookie_val = 1;
  7624. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7625. req.param1, req.param2, req.param3, 0,
  7626. req.cookie_val, 0);
  7627. msleep(DP_MAX_SLEEP_TIME);
  7628. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  7629. return TXRX_STATS_LEVEL;
  7630. }
  7631. /**
  7632. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  7633. * @pdev: DP_PDEV handle
  7634. * @map_id: ID of map that needs to be updated
  7635. * @tos: index value in map
  7636. * @tid: tid value passed by the user
  7637. *
  7638. * Return: void
  7639. */
  7640. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  7641. uint8_t map_id, uint8_t tos, uint8_t tid)
  7642. {
  7643. uint8_t dscp;
  7644. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  7645. struct dp_soc *soc = pdev->soc;
  7646. if (!soc)
  7647. return;
  7648. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  7649. pdev->dscp_tid_map[map_id][dscp] = tid;
  7650. if (map_id < soc->num_hw_dscp_tid_map)
  7651. hal_tx_update_dscp_tid(soc->hal_soc, tid,
  7652. map_id, dscp);
  7653. return;
  7654. }
  7655. /**
  7656. * dp_hmmc_tid_override_en_wifi3(): Function to enable hmmc tid override.
  7657. * @pdev_handle: pdev handle
  7658. * @val: hmmc-dscp flag value
  7659. *
  7660. * Return: void
  7661. */
  7662. static void dp_hmmc_tid_override_en_wifi3(struct cdp_pdev *pdev_handle,
  7663. bool val)
  7664. {
  7665. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7666. pdev->hmmc_tid_override_en = val;
  7667. }
  7668. /**
  7669. * dp_set_hmmc_tid_val_wifi3(): Function to set hmmc tid value.
  7670. * @pdev_handle: pdev handle
  7671. * @tid: tid value
  7672. *
  7673. * Return: void
  7674. */
  7675. static void dp_set_hmmc_tid_val_wifi3(struct cdp_pdev *pdev_handle,
  7676. uint8_t tid)
  7677. {
  7678. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7679. pdev->hmmc_tid = tid;
  7680. }
  7681. /**
  7682. * dp_fw_stats_process(): Process TxRX FW stats request
  7683. * @vdev_handle: DP VDEV handle
  7684. * @req: stats request
  7685. *
  7686. * return: int
  7687. */
  7688. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  7689. struct cdp_txrx_stats_req *req)
  7690. {
  7691. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7692. struct dp_pdev *pdev = NULL;
  7693. uint32_t stats = req->stats;
  7694. uint8_t mac_id = req->mac_id;
  7695. if (!vdev) {
  7696. DP_TRACE(NONE, "VDEV not found");
  7697. return 1;
  7698. }
  7699. pdev = vdev->pdev;
  7700. /*
  7701. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  7702. * from param0 to param3 according to below rule:
  7703. *
  7704. * PARAM:
  7705. * - config_param0 : start_offset (stats type)
  7706. * - config_param1 : stats bmask from start offset
  7707. * - config_param2 : stats bmask from start offset + 32
  7708. * - config_param3 : stats bmask from start offset + 64
  7709. */
  7710. if (req->stats == CDP_TXRX_STATS_0) {
  7711. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  7712. req->param1 = 0xFFFFFFFF;
  7713. req->param2 = 0xFFFFFFFF;
  7714. req->param3 = 0xFFFFFFFF;
  7715. } else if (req->stats == (uint8_t)HTT_DBG_EXT_STATS_PDEV_TX_MU) {
  7716. req->param0 = HTT_DBG_EXT_STATS_SET_VDEV_MASK(vdev->vdev_id);
  7717. }
  7718. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  7719. req->param1, req->param2, req->param3,
  7720. 0, 0, mac_id);
  7721. }
  7722. /**
  7723. * dp_txrx_stats_request - function to map to firmware and host stats
  7724. * @vdev: virtual handle
  7725. * @req: stats request
  7726. *
  7727. * Return: QDF_STATUS
  7728. */
  7729. static
  7730. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  7731. struct cdp_txrx_stats_req *req)
  7732. {
  7733. int host_stats;
  7734. int fw_stats;
  7735. enum cdp_stats stats;
  7736. int num_stats;
  7737. if (!vdev || !req) {
  7738. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7739. "Invalid vdev/req instance");
  7740. return QDF_STATUS_E_INVAL;
  7741. }
  7742. stats = req->stats;
  7743. if (stats >= CDP_TXRX_MAX_STATS)
  7744. return QDF_STATUS_E_INVAL;
  7745. /*
  7746. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  7747. * has to be updated if new FW HTT stats added
  7748. */
  7749. if (stats > CDP_TXRX_STATS_HTT_MAX)
  7750. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  7751. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  7752. if (stats >= num_stats) {
  7753. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7754. "%s: Invalid stats option: %d", __func__, stats);
  7755. return QDF_STATUS_E_INVAL;
  7756. }
  7757. req->stats = stats;
  7758. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  7759. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  7760. dp_info("stats: %u fw_stats_type: %d host_stats: %d",
  7761. stats, fw_stats, host_stats);
  7762. if (fw_stats != TXRX_FW_STATS_INVALID) {
  7763. /* update request with FW stats type */
  7764. req->stats = fw_stats;
  7765. return dp_fw_stats_process(vdev, req);
  7766. }
  7767. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  7768. (host_stats <= TXRX_HOST_STATS_MAX))
  7769. return dp_print_host_stats(vdev, req);
  7770. else
  7771. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7772. "Wrong Input for TxRx Stats");
  7773. return QDF_STATUS_SUCCESS;
  7774. }
  7775. /*
  7776. * dp_print_per_ring_stats(): Packet count per ring
  7777. * @soc - soc handle
  7778. */
  7779. static void dp_print_per_ring_stats(struct dp_soc *soc)
  7780. {
  7781. uint8_t ring;
  7782. uint16_t core;
  7783. uint64_t total_packets;
  7784. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  7785. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  7786. total_packets = 0;
  7787. DP_TRACE_STATS(INFO_HIGH,
  7788. "Packets on ring %u:", ring);
  7789. for (core = 0; core < NR_CPUS; core++) {
  7790. DP_TRACE_STATS(INFO_HIGH,
  7791. "Packets arriving on core %u: %llu",
  7792. core,
  7793. soc->stats.rx.ring_packets[core][ring]);
  7794. total_packets += soc->stats.rx.ring_packets[core][ring];
  7795. }
  7796. DP_TRACE_STATS(INFO_HIGH,
  7797. "Total packets on ring %u: %llu",
  7798. ring, total_packets);
  7799. }
  7800. }
  7801. /*
  7802. * dp_txrx_path_stats() - Function to display dump stats
  7803. * @soc - soc handle
  7804. *
  7805. * return: none
  7806. */
  7807. static void dp_txrx_path_stats(struct dp_soc *soc)
  7808. {
  7809. uint8_t error_code;
  7810. uint8_t loop_pdev;
  7811. struct dp_pdev *pdev;
  7812. uint8_t i;
  7813. if (!soc) {
  7814. DP_TRACE(ERROR, "%s: Invalid access",
  7815. __func__);
  7816. return;
  7817. }
  7818. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  7819. pdev = soc->pdev_list[loop_pdev];
  7820. dp_aggregate_pdev_stats(pdev);
  7821. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  7822. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  7823. pdev->stats.tx_i.rcvd.num,
  7824. pdev->stats.tx_i.rcvd.bytes);
  7825. DP_TRACE_STATS(INFO_HIGH,
  7826. "processed from host: %u msdus (%llu bytes)",
  7827. pdev->stats.tx_i.processed.num,
  7828. pdev->stats.tx_i.processed.bytes);
  7829. DP_TRACE_STATS(INFO_HIGH,
  7830. "successfully transmitted: %u msdus (%llu bytes)",
  7831. pdev->stats.tx.tx_success.num,
  7832. pdev->stats.tx.tx_success.bytes);
  7833. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  7834. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  7835. pdev->stats.tx_i.dropped.dropped_pkt.num);
  7836. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  7837. pdev->stats.tx_i.dropped.desc_na.num);
  7838. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  7839. pdev->stats.tx_i.dropped.ring_full);
  7840. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  7841. pdev->stats.tx_i.dropped.enqueue_fail);
  7842. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  7843. pdev->stats.tx_i.dropped.dma_error);
  7844. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  7845. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  7846. pdev->stats.tx.tx_failed);
  7847. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  7848. pdev->stats.tx.dropped.age_out);
  7849. DP_TRACE_STATS(INFO_HIGH, "firmware removed packets: %u",
  7850. pdev->stats.tx.dropped.fw_rem.num);
  7851. DP_TRACE_STATS(INFO_HIGH, "firmware removed bytes: %llu",
  7852. pdev->stats.tx.dropped.fw_rem.bytes);
  7853. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  7854. pdev->stats.tx.dropped.fw_rem_tx);
  7855. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  7856. pdev->stats.tx.dropped.fw_rem_notx);
  7857. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on tx path: %u",
  7858. pdev->soc->stats.tx.tx_invalid_peer.num);
  7859. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  7860. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7861. pdev->stats.tx_comp_histogram.pkts_1);
  7862. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7863. pdev->stats.tx_comp_histogram.pkts_2_20);
  7864. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7865. pdev->stats.tx_comp_histogram.pkts_21_40);
  7866. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7867. pdev->stats.tx_comp_histogram.pkts_41_60);
  7868. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7869. pdev->stats.tx_comp_histogram.pkts_61_80);
  7870. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7871. pdev->stats.tx_comp_histogram.pkts_81_100);
  7872. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7873. pdev->stats.tx_comp_histogram.pkts_101_200);
  7874. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7875. pdev->stats.tx_comp_histogram.pkts_201_plus);
  7876. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  7877. DP_TRACE_STATS(INFO_HIGH,
  7878. "delivered %u msdus ( %llu bytes),",
  7879. pdev->stats.rx.to_stack.num,
  7880. pdev->stats.rx.to_stack.bytes);
  7881. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  7882. DP_TRACE_STATS(INFO_HIGH,
  7883. "received on reo[%d] %u msdus( %llu bytes),",
  7884. i, pdev->stats.rx.rcvd_reo[i].num,
  7885. pdev->stats.rx.rcvd_reo[i].bytes);
  7886. DP_TRACE_STATS(INFO_HIGH,
  7887. "intra-bss packets %u msdus ( %llu bytes),",
  7888. pdev->stats.rx.intra_bss.pkts.num,
  7889. pdev->stats.rx.intra_bss.pkts.bytes);
  7890. DP_TRACE_STATS(INFO_HIGH,
  7891. "intra-bss fails %u msdus ( %llu bytes),",
  7892. pdev->stats.rx.intra_bss.fail.num,
  7893. pdev->stats.rx.intra_bss.fail.bytes);
  7894. DP_TRACE_STATS(INFO_HIGH,
  7895. "raw packets %u msdus ( %llu bytes),",
  7896. pdev->stats.rx.raw.num,
  7897. pdev->stats.rx.raw.bytes);
  7898. DP_TRACE_STATS(INFO_HIGH, "mic errors %u",
  7899. pdev->stats.rx.err.mic_err);
  7900. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on rx path: %u",
  7901. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  7902. DP_TRACE_STATS(INFO_HIGH, "sw_peer_id invalid %u",
  7903. pdev->soc->stats.rx.err.rx_invalid_peer_id.num);
  7904. DP_TRACE_STATS(INFO_HIGH, "packet_len invalid %u",
  7905. pdev->soc->stats.rx.err.rx_invalid_pkt_len.num);
  7906. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  7907. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  7908. pdev->soc->stats.rx.err.invalid_rbm);
  7909. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  7910. pdev->soc->stats.rx.err.hal_ring_access_fail);
  7911. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  7912. error_code++) {
  7913. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  7914. continue;
  7915. DP_TRACE_STATS(INFO_HIGH,
  7916. "Reo error number (%u): %u msdus",
  7917. error_code,
  7918. pdev->soc->stats.rx.err
  7919. .reo_error[error_code]);
  7920. }
  7921. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  7922. error_code++) {
  7923. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  7924. continue;
  7925. DP_TRACE_STATS(INFO_HIGH,
  7926. "Rxdma error number (%u): %u msdus",
  7927. error_code,
  7928. pdev->soc->stats.rx.err
  7929. .rxdma_error[error_code]);
  7930. }
  7931. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  7932. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7933. pdev->stats.rx_ind_histogram.pkts_1);
  7934. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7935. pdev->stats.rx_ind_histogram.pkts_2_20);
  7936. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7937. pdev->stats.rx_ind_histogram.pkts_21_40);
  7938. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7939. pdev->stats.rx_ind_histogram.pkts_41_60);
  7940. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7941. pdev->stats.rx_ind_histogram.pkts_61_80);
  7942. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7943. pdev->stats.rx_ind_histogram.pkts_81_100);
  7944. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7945. pdev->stats.rx_ind_histogram.pkts_101_200);
  7946. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7947. pdev->stats.rx_ind_histogram.pkts_201_plus);
  7948. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  7949. __func__,
  7950. pdev->soc->wlan_cfg_ctx
  7951. ->tso_enabled,
  7952. pdev->soc->wlan_cfg_ctx
  7953. ->lro_enabled,
  7954. pdev->soc->wlan_cfg_ctx
  7955. ->rx_hash,
  7956. pdev->soc->wlan_cfg_ctx
  7957. ->napi_enabled);
  7958. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7959. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  7960. __func__,
  7961. pdev->soc->wlan_cfg_ctx
  7962. ->tx_flow_stop_queue_threshold,
  7963. pdev->soc->wlan_cfg_ctx
  7964. ->tx_flow_start_queue_offset);
  7965. #endif
  7966. }
  7967. }
  7968. /*
  7969. * dp_txrx_dump_stats() - Dump statistics
  7970. * @value - Statistics option
  7971. */
  7972. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  7973. enum qdf_stats_verbosity_level level)
  7974. {
  7975. struct dp_soc *soc =
  7976. (struct dp_soc *)psoc;
  7977. QDF_STATUS status = QDF_STATUS_SUCCESS;
  7978. if (!soc) {
  7979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7980. "%s: soc is NULL", __func__);
  7981. return QDF_STATUS_E_INVAL;
  7982. }
  7983. switch (value) {
  7984. case CDP_TXRX_PATH_STATS:
  7985. dp_txrx_path_stats(soc);
  7986. break;
  7987. case CDP_RX_RING_STATS:
  7988. dp_print_per_ring_stats(soc);
  7989. break;
  7990. case CDP_TXRX_TSO_STATS:
  7991. /* TODO: NOT IMPLEMENTED */
  7992. break;
  7993. case CDP_DUMP_TX_FLOW_POOL_INFO:
  7994. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  7995. break;
  7996. case CDP_DP_NAPI_STATS:
  7997. dp_print_napi_stats(soc);
  7998. break;
  7999. case CDP_TXRX_DESC_STATS:
  8000. /* TODO: NOT IMPLEMENTED */
  8001. break;
  8002. default:
  8003. status = QDF_STATUS_E_INVAL;
  8004. break;
  8005. }
  8006. return status;
  8007. }
  8008. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  8009. /**
  8010. * dp_update_flow_control_parameters() - API to store datapath
  8011. * config parameters
  8012. * @soc: soc handle
  8013. * @cfg: ini parameter handle
  8014. *
  8015. * Return: void
  8016. */
  8017. static inline
  8018. void dp_update_flow_control_parameters(struct dp_soc *soc,
  8019. struct cdp_config_params *params)
  8020. {
  8021. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  8022. params->tx_flow_stop_queue_threshold;
  8023. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  8024. params->tx_flow_start_queue_offset;
  8025. }
  8026. #else
  8027. static inline
  8028. void dp_update_flow_control_parameters(struct dp_soc *soc,
  8029. struct cdp_config_params *params)
  8030. {
  8031. }
  8032. #endif
  8033. /**
  8034. * dp_update_config_parameters() - API to store datapath
  8035. * config parameters
  8036. * @soc: soc handle
  8037. * @cfg: ini parameter handle
  8038. *
  8039. * Return: status
  8040. */
  8041. static
  8042. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  8043. struct cdp_config_params *params)
  8044. {
  8045. struct dp_soc *soc = (struct dp_soc *)psoc;
  8046. if (!(soc)) {
  8047. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  8048. "%s: Invalid handle", __func__);
  8049. return QDF_STATUS_E_INVAL;
  8050. }
  8051. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  8052. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  8053. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  8054. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  8055. params->tcp_udp_checksumoffload;
  8056. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  8057. soc->wlan_cfg_ctx->ipa_enabled = params->ipa_enable;
  8058. soc->wlan_cfg_ctx->gro_enabled = params->gro_enable;
  8059. dp_update_flow_control_parameters(soc, params);
  8060. return QDF_STATUS_SUCCESS;
  8061. }
  8062. /**
  8063. * dp_txrx_set_wds_rx_policy() - API to store datapath
  8064. * config parameters
  8065. * @vdev_handle - datapath vdev handle
  8066. * @cfg: ini parameter handle
  8067. *
  8068. * Return: status
  8069. */
  8070. #ifdef WDS_VENDOR_EXTENSION
  8071. void
  8072. dp_txrx_set_wds_rx_policy(
  8073. struct cdp_vdev *vdev_handle,
  8074. u_int32_t val)
  8075. {
  8076. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8077. struct dp_peer *peer;
  8078. if (vdev->opmode == wlan_op_mode_ap) {
  8079. /* for ap, set it on bss_peer */
  8080. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  8081. if (peer->bss_peer) {
  8082. peer->wds_ecm.wds_rx_filter = 1;
  8083. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  8084. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  8085. break;
  8086. }
  8087. }
  8088. } else if (vdev->opmode == wlan_op_mode_sta) {
  8089. peer = TAILQ_FIRST(&vdev->peer_list);
  8090. peer->wds_ecm.wds_rx_filter = 1;
  8091. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  8092. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  8093. }
  8094. }
  8095. /**
  8096. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  8097. *
  8098. * @peer_handle - datapath peer handle
  8099. * @wds_tx_ucast: policy for unicast transmission
  8100. * @wds_tx_mcast: policy for multicast transmission
  8101. *
  8102. * Return: void
  8103. */
  8104. void
  8105. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  8106. int wds_tx_ucast, int wds_tx_mcast)
  8107. {
  8108. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  8109. if (wds_tx_ucast || wds_tx_mcast) {
  8110. peer->wds_enabled = 1;
  8111. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  8112. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  8113. } else {
  8114. peer->wds_enabled = 0;
  8115. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  8116. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  8117. }
  8118. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8119. FL("Policy Update set to :\
  8120. peer->wds_enabled %d\
  8121. peer->wds_ecm.wds_tx_ucast_4addr %d\
  8122. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  8123. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  8124. peer->wds_ecm.wds_tx_mcast_4addr);
  8125. return;
  8126. }
  8127. #endif
  8128. static struct cdp_wds_ops dp_ops_wds = {
  8129. .vdev_set_wds = dp_vdev_set_wds,
  8130. #ifdef WDS_VENDOR_EXTENSION
  8131. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  8132. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  8133. #endif
  8134. };
  8135. /*
  8136. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  8137. * @vdev_handle - datapath vdev handle
  8138. * @callback - callback function
  8139. * @ctxt: callback context
  8140. *
  8141. */
  8142. static void
  8143. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  8144. ol_txrx_data_tx_cb callback, void *ctxt)
  8145. {
  8146. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8147. vdev->tx_non_std_data_callback.func = callback;
  8148. vdev->tx_non_std_data_callback.ctxt = ctxt;
  8149. }
  8150. /**
  8151. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  8152. * @pdev_hdl: datapath pdev handle
  8153. *
  8154. * Return: opaque pointer to dp txrx handle
  8155. */
  8156. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  8157. {
  8158. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  8159. return pdev->dp_txrx_handle;
  8160. }
  8161. /**
  8162. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  8163. * @pdev_hdl: datapath pdev handle
  8164. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  8165. *
  8166. * Return: void
  8167. */
  8168. static void
  8169. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  8170. {
  8171. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  8172. pdev->dp_txrx_handle = dp_txrx_hdl;
  8173. }
  8174. /**
  8175. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  8176. * @soc_handle: datapath soc handle
  8177. *
  8178. * Return: opaque pointer to external dp (non-core DP)
  8179. */
  8180. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  8181. {
  8182. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8183. return soc->external_txrx_handle;
  8184. }
  8185. /**
  8186. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  8187. * @soc_handle: datapath soc handle
  8188. * @txrx_handle: opaque pointer to external dp (non-core DP)
  8189. *
  8190. * Return: void
  8191. */
  8192. static void
  8193. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  8194. {
  8195. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8196. soc->external_txrx_handle = txrx_handle;
  8197. }
  8198. /**
  8199. * dp_get_cfg_capabilities() - get dp capabilities
  8200. * @soc_handle: datapath soc handle
  8201. * @dp_caps: enum for dp capabilities
  8202. *
  8203. * Return: bool to determine if dp caps is enabled
  8204. */
  8205. static bool
  8206. dp_get_cfg_capabilities(struct cdp_soc_t *soc_handle,
  8207. enum cdp_capabilities dp_caps)
  8208. {
  8209. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8210. return wlan_cfg_get_dp_caps(soc->wlan_cfg_ctx, dp_caps);
  8211. }
  8212. #ifdef FEATURE_AST
  8213. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  8214. {
  8215. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  8216. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  8217. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  8218. /*
  8219. * For BSS peer, new peer is not created on alloc_node if the
  8220. * peer with same address already exists , instead refcnt is
  8221. * increased for existing peer. Correspondingly in delete path,
  8222. * only refcnt is decreased; and peer is only deleted , when all
  8223. * references are deleted. So delete_in_progress should not be set
  8224. * for bss_peer, unless only 2 reference remains (peer map reference
  8225. * and peer hash table reference).
  8226. */
  8227. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  8228. return;
  8229. }
  8230. qdf_spin_lock_bh(&soc->ast_lock);
  8231. peer->delete_in_progress = true;
  8232. dp_peer_delete_ast_entries(soc, peer);
  8233. qdf_spin_unlock_bh(&soc->ast_lock);
  8234. }
  8235. #endif
  8236. #ifdef ATH_SUPPORT_NAC_RSSI
  8237. /**
  8238. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  8239. * @vdev_hdl: DP vdev handle
  8240. * @rssi: rssi value
  8241. *
  8242. * Return: 0 for success. nonzero for failure.
  8243. */
  8244. static QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  8245. char *mac_addr,
  8246. uint8_t *rssi)
  8247. {
  8248. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  8249. struct dp_pdev *pdev = vdev->pdev;
  8250. struct dp_neighbour_peer *peer = NULL;
  8251. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  8252. *rssi = 0;
  8253. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  8254. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  8255. neighbour_peer_list_elem) {
  8256. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  8257. mac_addr, QDF_MAC_ADDR_SIZE) == 0) {
  8258. *rssi = peer->rssi;
  8259. status = QDF_STATUS_SUCCESS;
  8260. break;
  8261. }
  8262. }
  8263. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  8264. return status;
  8265. }
  8266. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  8267. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  8268. uint8_t chan_num)
  8269. {
  8270. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8271. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  8272. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  8273. pdev->nac_rssi_filtering = 1;
  8274. /* Store address of NAC (neighbour peer) which will be checked
  8275. * against TA of received packets.
  8276. */
  8277. if (cmd == CDP_NAC_PARAM_ADD) {
  8278. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  8279. client_macaddr);
  8280. } else if (cmd == CDP_NAC_PARAM_DEL) {
  8281. dp_update_filter_neighbour_peers(vdev_handle,
  8282. DP_NAC_PARAM_DEL,
  8283. client_macaddr);
  8284. }
  8285. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  8286. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  8287. ((void *)vdev->pdev->ctrl_pdev,
  8288. vdev->vdev_id, cmd, bssid);
  8289. return QDF_STATUS_SUCCESS;
  8290. }
  8291. #endif
  8292. /**
  8293. * dp_enable_peer_based_pktlog() - Set Flag for peer based filtering
  8294. * for pktlog
  8295. * @txrx_pdev_handle: cdp_pdev handle
  8296. * @enb_dsb: Enable or disable peer based filtering
  8297. *
  8298. * Return: QDF_STATUS
  8299. */
  8300. static int
  8301. dp_enable_peer_based_pktlog(
  8302. struct cdp_pdev *txrx_pdev_handle,
  8303. char *mac_addr, uint8_t enb_dsb)
  8304. {
  8305. struct dp_peer *peer;
  8306. uint8_t local_id;
  8307. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev_handle;
  8308. peer = (struct dp_peer *)dp_find_peer_by_addr(txrx_pdev_handle,
  8309. mac_addr, &local_id);
  8310. if (!peer) {
  8311. dp_err("Invalid Peer");
  8312. return QDF_STATUS_E_FAILURE;
  8313. }
  8314. peer->peer_based_pktlog_filter = enb_dsb;
  8315. pdev->dp_peer_based_pktlog = enb_dsb;
  8316. return QDF_STATUS_SUCCESS;
  8317. }
  8318. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  8319. uint32_t max_peers,
  8320. uint32_t max_ast_index,
  8321. bool peer_map_unmap_v2)
  8322. {
  8323. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  8324. soc->max_peers = max_peers;
  8325. qdf_print ("%s max_peers %u, max_ast_index: %u\n",
  8326. __func__, max_peers, max_ast_index);
  8327. wlan_cfg_set_max_ast_idx(soc->wlan_cfg_ctx, max_ast_index);
  8328. if (dp_peer_find_attach(soc))
  8329. return QDF_STATUS_E_FAILURE;
  8330. soc->is_peer_map_unmap_v2 = peer_map_unmap_v2;
  8331. return QDF_STATUS_SUCCESS;
  8332. }
  8333. /**
  8334. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  8335. * @dp_pdev: dp pdev handle
  8336. * @ctrl_pdev: UMAC ctrl pdev handle
  8337. *
  8338. * Return: void
  8339. */
  8340. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  8341. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  8342. {
  8343. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  8344. pdev->ctrl_pdev = ctrl_pdev;
  8345. }
  8346. static void dp_set_rate_stats_cap(struct cdp_soc_t *soc_hdl,
  8347. uint8_t val)
  8348. {
  8349. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  8350. soc->wlanstats_enabled = val;
  8351. }
  8352. static void dp_soc_set_rate_stats_ctx(struct cdp_soc_t *soc_handle,
  8353. void *stats_ctx)
  8354. {
  8355. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8356. soc->rate_stats_ctx = stats_ctx;
  8357. }
  8358. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  8359. static void dp_flush_rate_stats_req(struct cdp_soc_t *soc_hdl,
  8360. struct cdp_pdev *pdev_hdl)
  8361. {
  8362. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  8363. struct dp_soc *soc = (struct dp_soc *)pdev->soc;
  8364. struct dp_vdev *vdev = NULL;
  8365. struct dp_peer *peer = NULL;
  8366. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  8367. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  8368. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  8369. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  8370. if (peer)
  8371. dp_wdi_event_handler(
  8372. WDI_EVENT_FLUSH_RATE_STATS_REQ,
  8373. pdev->soc, peer->wlanstats_ctx,
  8374. peer->peer_ids[0],
  8375. WDI_NO_VAL, pdev->pdev_id);
  8376. }
  8377. }
  8378. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  8379. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  8380. }
  8381. #else
  8382. static inline void
  8383. dp_flush_rate_stats_req(struct cdp_soc_t *soc_hdl,
  8384. struct cdp_pdev *pdev_hdl)
  8385. {
  8386. }
  8387. #endif
  8388. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  8389. static void dp_peer_flush_rate_stats(struct cdp_soc_t *soc,
  8390. struct cdp_pdev *pdev_handle,
  8391. void *buf)
  8392. {
  8393. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8394. dp_wdi_event_handler(WDI_EVENT_PEER_FLUSH_RATE_STATS,
  8395. pdev->soc, buf, HTT_INVALID_PEER,
  8396. WDI_NO_VAL, pdev->pdev_id);
  8397. }
  8398. #else
  8399. static inline void
  8400. dp_peer_flush_rate_stats(struct cdp_soc_t *soc,
  8401. struct cdp_pdev *pdev_handle,
  8402. void *buf)
  8403. {
  8404. }
  8405. #endif
  8406. static void *dp_soc_get_rate_stats_ctx(struct cdp_soc_t *soc_handle)
  8407. {
  8408. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8409. return soc->rate_stats_ctx;
  8410. }
  8411. /*
  8412. * dp_get_cfg() - get dp cfg
  8413. * @soc: cdp soc handle
  8414. * @cfg: cfg enum
  8415. *
  8416. * Return: cfg value
  8417. */
  8418. static uint32_t dp_get_cfg(void *soc, enum cdp_dp_cfg cfg)
  8419. {
  8420. struct dp_soc *dpsoc = (struct dp_soc *)soc;
  8421. uint32_t value = 0;
  8422. switch (cfg) {
  8423. case cfg_dp_enable_data_stall:
  8424. value = dpsoc->wlan_cfg_ctx->enable_data_stall_detection;
  8425. break;
  8426. case cfg_dp_enable_ip_tcp_udp_checksum_offload:
  8427. value = dpsoc->wlan_cfg_ctx->tcp_udp_checksumoffload;
  8428. break;
  8429. case cfg_dp_tso_enable:
  8430. value = dpsoc->wlan_cfg_ctx->tso_enabled;
  8431. break;
  8432. case cfg_dp_lro_enable:
  8433. value = dpsoc->wlan_cfg_ctx->lro_enabled;
  8434. break;
  8435. case cfg_dp_gro_enable:
  8436. value = dpsoc->wlan_cfg_ctx->gro_enabled;
  8437. break;
  8438. case cfg_dp_tx_flow_start_queue_offset:
  8439. value = dpsoc->wlan_cfg_ctx->tx_flow_start_queue_offset;
  8440. break;
  8441. case cfg_dp_tx_flow_stop_queue_threshold:
  8442. value = dpsoc->wlan_cfg_ctx->tx_flow_stop_queue_threshold;
  8443. break;
  8444. case cfg_dp_disable_intra_bss_fwd:
  8445. value = dpsoc->wlan_cfg_ctx->disable_intra_bss_fwd;
  8446. break;
  8447. default:
  8448. value = 0;
  8449. }
  8450. return value;
  8451. }
  8452. #ifdef CONFIG_WIN
  8453. /**
  8454. * dp_tx_flow_ctrl_configure_pdev() - Configure flow control params
  8455. * @pdev_hdl: datapath pdev handle
  8456. * @param: ol ath params
  8457. * @value: value of the flag
  8458. * @buff: Buffer to be passed
  8459. *
  8460. * Implemented this function same as legacy function. In legacy code, single
  8461. * function is used to display stats and update pdev params.
  8462. *
  8463. * Return: 0 for success. nonzero for failure.
  8464. */
  8465. static uint32_t dp_tx_flow_ctrl_configure_pdev(void *pdev_handle,
  8466. enum _ol_ath_param_t param,
  8467. uint32_t value, void *buff)
  8468. {
  8469. struct dp_soc *soc = NULL;
  8470. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8471. if (qdf_unlikely(!pdev))
  8472. return 1;
  8473. soc = pdev->soc;
  8474. if (!soc)
  8475. return 1;
  8476. switch (param) {
  8477. case OL_ATH_PARAM_VIDEO_DELAY_STATS_FC:
  8478. if (value)
  8479. pdev->delay_stats_flag = true;
  8480. else
  8481. pdev->delay_stats_flag = false;
  8482. break;
  8483. case OL_ATH_PARAM_VIDEO_STATS_FC:
  8484. qdf_print("------- TID Stats ------\n");
  8485. dp_pdev_print_tid_stats(pdev);
  8486. qdf_print("------ Delay Stats ------\n");
  8487. dp_pdev_print_delay_stats(pdev);
  8488. break;
  8489. case OL_ATH_PARAM_TOTAL_Q_SIZE:
  8490. {
  8491. uint32_t tx_min, tx_max;
  8492. tx_min = wlan_cfg_get_min_tx_desc(soc->wlan_cfg_ctx);
  8493. tx_max = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  8494. if (!buff) {
  8495. if ((value >= tx_min) && (value <= tx_max)) {
  8496. pdev->num_tx_allowed = value;
  8497. } else {
  8498. QDF_TRACE(QDF_MODULE_ID_DP,
  8499. QDF_TRACE_LEVEL_INFO,
  8500. "Failed to update num_tx_allowed, Q_min = %d Q_max = %d",
  8501. tx_min, tx_max);
  8502. break;
  8503. }
  8504. } else {
  8505. *(int *)buff = pdev->num_tx_allowed;
  8506. }
  8507. }
  8508. break;
  8509. default:
  8510. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8511. "%s: not handled param %d ", __func__, param);
  8512. break;
  8513. }
  8514. return 0;
  8515. }
  8516. #endif
  8517. /**
  8518. * dp_set_pdev_pcp_tid_map_wifi3(): update pcp tid map in pdev
  8519. * @vdev: DP_PDEV handle
  8520. * @pcp: pcp value
  8521. * @tid: tid value passed by the user
  8522. *
  8523. * Return: QDF_STATUS_SUCCESS on success
  8524. */
  8525. static QDF_STATUS dp_set_pdev_pcp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  8526. uint8_t pcp, uint8_t tid)
  8527. {
  8528. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8529. struct dp_soc *soc = pdev->soc;
  8530. soc->pcp_tid_map[pcp] = tid;
  8531. hal_tx_update_pcp_tid_map(soc->hal_soc, pcp, tid);
  8532. return QDF_STATUS_SUCCESS;
  8533. }
  8534. /**
  8535. * dp_set_pdev_tidmap_prty_wifi3(): update tidmap priority in pdev
  8536. * @vdev: DP_PDEV handle
  8537. * @prio: tidmap priority value passed by the user
  8538. *
  8539. * Return: QDF_STATUS_SUCCESS on success
  8540. */
  8541. static QDF_STATUS dp_set_pdev_tidmap_prty_wifi3(struct cdp_pdev *pdev_handle,
  8542. uint8_t prio)
  8543. {
  8544. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8545. struct dp_soc *soc = pdev->soc;
  8546. soc->tidmap_prty = prio;
  8547. hal_tx_set_tidmap_prty(soc->hal_soc, prio);
  8548. return QDF_STATUS_SUCCESS;
  8549. }
  8550. /**
  8551. * dp_set_vdev_pcp_tid_map_wifi3(): update pcp tid map in vdev
  8552. * @vdev: DP_VDEV handle
  8553. * @pcp: pcp value
  8554. * @tid: tid value passed by the user
  8555. *
  8556. * Return: QDF_STATUS_SUCCESS on success
  8557. */
  8558. static QDF_STATUS dp_set_vdev_pcp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  8559. uint8_t pcp, uint8_t tid)
  8560. {
  8561. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8562. vdev->pcp_tid_map[pcp] = tid;
  8563. return QDF_STATUS_SUCCESS;
  8564. }
  8565. /**
  8566. * dp_set_vdev_tidmap_tbl_id_wifi3(): update tidmapi tbl id in vdev
  8567. * @vdev: DP_VDEV handle
  8568. * @mapid: map_id value passed by the user
  8569. *
  8570. * Return: QDF_STATUS_SUCCESS on success
  8571. */
  8572. static QDF_STATUS dp_set_vdev_tidmap_tbl_id_wifi3(struct cdp_vdev *vdev_handle,
  8573. uint8_t mapid)
  8574. {
  8575. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8576. vdev->tidmap_tbl_id = mapid;
  8577. return QDF_STATUS_SUCCESS;
  8578. }
  8579. /**
  8580. * dp_set_vdev_tidmap_prty_wifi3(): update tidmap priority in vdev
  8581. * @vdev: DP_VDEV handle
  8582. * @prio: tidmap priority value passed by the user
  8583. *
  8584. * Return: QDF_STATUS_SUCCESS on success
  8585. */
  8586. static QDF_STATUS dp_set_vdev_tidmap_prty_wifi3(struct cdp_vdev *vdev_handle,
  8587. uint8_t prio)
  8588. {
  8589. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8590. vdev->tidmap_prty = prio;
  8591. return QDF_STATUS_SUCCESS;
  8592. }
  8593. static struct cdp_cmn_ops dp_ops_cmn = {
  8594. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  8595. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  8596. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  8597. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  8598. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  8599. .txrx_pdev_deinit = dp_pdev_deinit_wifi3,
  8600. .txrx_peer_create = dp_peer_create_wifi3,
  8601. .txrx_peer_setup = dp_peer_setup_wifi3,
  8602. #ifdef FEATURE_AST
  8603. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  8604. #else
  8605. .txrx_peer_teardown = NULL,
  8606. #endif
  8607. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  8608. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  8609. .txrx_peer_get_ast_info_by_soc = dp_peer_get_ast_info_by_soc_wifi3,
  8610. .txrx_peer_get_ast_info_by_pdev =
  8611. dp_peer_get_ast_info_by_pdevid_wifi3,
  8612. .txrx_peer_ast_delete_by_soc =
  8613. dp_peer_ast_entry_del_by_soc,
  8614. .txrx_peer_ast_delete_by_pdev =
  8615. dp_peer_ast_entry_del_by_pdev,
  8616. .txrx_peer_delete = dp_peer_delete_wifi3,
  8617. .txrx_vdev_register = dp_vdev_register_wifi3,
  8618. .txrx_vdev_flush_peers = dp_vdev_flush_peers,
  8619. .txrx_soc_detach = dp_soc_detach_wifi3,
  8620. .txrx_soc_deinit = dp_soc_deinit_wifi3,
  8621. .txrx_soc_init = dp_soc_init_wifi3,
  8622. .txrx_tso_soc_attach = dp_tso_soc_attach,
  8623. .txrx_tso_soc_detach = dp_tso_soc_detach,
  8624. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  8625. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  8626. .txrx_get_mon_vdev_from_pdev = dp_get_mon_vdev_from_pdev_wifi3,
  8627. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  8628. .txrx_ath_getstats = dp_get_device_stats,
  8629. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  8630. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  8631. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  8632. .delba_process = dp_delba_process_wifi3,
  8633. .set_addba_response = dp_set_addba_response,
  8634. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  8635. .flush_cache_rx_queue = NULL,
  8636. /* TODO: get API's for dscp-tid need to be added*/
  8637. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  8638. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  8639. .hmmc_tid_override_en = dp_hmmc_tid_override_en_wifi3,
  8640. .set_hmmc_tid_val = dp_set_hmmc_tid_val_wifi3,
  8641. .txrx_get_total_per = dp_get_total_per,
  8642. .txrx_stats_request = dp_txrx_stats_request,
  8643. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  8644. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  8645. .txrx_get_vow_config_frm_pdev = dp_get_delay_stats_flag,
  8646. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  8647. .txrx_set_nac = dp_set_nac,
  8648. .txrx_get_tx_pending = dp_get_tx_pending,
  8649. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  8650. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  8651. .display_stats = dp_txrx_dump_stats,
  8652. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  8653. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  8654. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  8655. .txrx_intr_detach = dp_soc_interrupt_detach,
  8656. .set_pn_check = dp_set_pn_check_wifi3,
  8657. .update_config_parameters = dp_update_config_parameters,
  8658. /* TODO: Add other functions */
  8659. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  8660. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  8661. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  8662. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  8663. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  8664. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  8665. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  8666. .tx_send = dp_tx_send,
  8667. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  8668. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  8669. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  8670. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  8671. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  8672. .txrx_get_os_rx_handles_from_vdev =
  8673. dp_get_os_rx_handles_from_vdev_wifi3,
  8674. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  8675. .get_dp_capabilities = dp_get_cfg_capabilities,
  8676. .txrx_get_cfg = dp_get_cfg,
  8677. .set_rate_stats_ctx = dp_soc_set_rate_stats_ctx,
  8678. .get_rate_stats_ctx = dp_soc_get_rate_stats_ctx,
  8679. .txrx_peer_flush_rate_stats = dp_peer_flush_rate_stats,
  8680. .txrx_flush_rate_stats_request = dp_flush_rate_stats_req,
  8681. .set_pdev_pcp_tid_map = dp_set_pdev_pcp_tid_map_wifi3,
  8682. .set_pdev_tidmap_prty = dp_set_pdev_tidmap_prty_wifi3,
  8683. .set_vdev_pcp_tid_map = dp_set_vdev_pcp_tid_map_wifi3,
  8684. .set_vdev_tidmap_prty = dp_set_vdev_tidmap_prty_wifi3,
  8685. .set_vdev_tidmap_tbl_id = dp_set_vdev_tidmap_tbl_id_wifi3,
  8686. .txrx_cp_peer_del_response = dp_cp_peer_del_resp_handler,
  8687. };
  8688. static struct cdp_ctrl_ops dp_ops_ctrl = {
  8689. .txrx_peer_authorize = dp_peer_authorize,
  8690. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  8691. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  8692. #ifdef MESH_MODE_SUPPORT
  8693. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  8694. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  8695. #endif
  8696. .txrx_set_vdev_param = dp_set_vdev_param,
  8697. .txrx_peer_set_nawds = dp_peer_set_nawds,
  8698. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  8699. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  8700. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  8701. .txrx_update_filter_neighbour_peers =
  8702. dp_update_filter_neighbour_peers,
  8703. .txrx_get_sec_type = dp_get_sec_type,
  8704. /* TODO: Add other functions */
  8705. .txrx_wdi_event_sub = dp_wdi_event_sub,
  8706. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  8707. #ifdef WDI_EVENT_ENABLE
  8708. .txrx_get_pldev = dp_get_pldev,
  8709. #endif
  8710. .txrx_set_pdev_param = dp_set_pdev_param,
  8711. #ifdef ATH_SUPPORT_NAC_RSSI
  8712. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  8713. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  8714. #endif
  8715. .set_key = dp_set_michael_key,
  8716. .txrx_get_vdev_param = dp_get_vdev_param,
  8717. .enable_peer_based_pktlog = dp_enable_peer_based_pktlog,
  8718. .calculate_delay_stats = dp_calculate_delay_stats,
  8719. };
  8720. static struct cdp_me_ops dp_ops_me = {
  8721. #ifdef ATH_SUPPORT_IQUE
  8722. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  8723. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  8724. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  8725. #endif
  8726. };
  8727. static struct cdp_mon_ops dp_ops_mon = {
  8728. .txrx_monitor_set_filter_ucast_data = NULL,
  8729. .txrx_monitor_set_filter_mcast_data = NULL,
  8730. .txrx_monitor_set_filter_non_data = NULL,
  8731. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  8732. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  8733. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  8734. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  8735. /* Added support for HK advance filter */
  8736. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  8737. };
  8738. static struct cdp_host_stats_ops dp_ops_host_stats = {
  8739. .txrx_per_peer_stats = dp_get_host_peer_stats,
  8740. .get_fw_peer_stats = dp_get_fw_peer_stats,
  8741. .get_htt_stats = dp_get_htt_stats,
  8742. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  8743. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  8744. .txrx_stats_publish = dp_txrx_stats_publish,
  8745. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  8746. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  8747. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  8748. .txrx_get_pdev_stats = dp_txrx_get_pdev_stats,
  8749. .txrx_get_ratekbps = dp_txrx_get_ratekbps,
  8750. .configure_rate_stats = dp_set_rate_stats_cap,
  8751. /* TODO */
  8752. };
  8753. static struct cdp_raw_ops dp_ops_raw = {
  8754. /* TODO */
  8755. };
  8756. #ifdef CONFIG_WIN
  8757. static struct cdp_pflow_ops dp_ops_pflow = {
  8758. dp_tx_flow_ctrl_configure_pdev,
  8759. };
  8760. #endif /* CONFIG_WIN */
  8761. #ifdef FEATURE_RUNTIME_PM
  8762. /**
  8763. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  8764. * @opaque_pdev: DP pdev context
  8765. *
  8766. * DP is ready to runtime suspend if there are no pending TX packets.
  8767. *
  8768. * Return: QDF_STATUS
  8769. */
  8770. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  8771. {
  8772. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8773. struct dp_soc *soc = pdev->soc;
  8774. /* Abort if there are any pending TX packets */
  8775. if (dp_get_tx_pending(opaque_pdev) > 0) {
  8776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8777. FL("Abort suspend due to pending TX packets"));
  8778. return QDF_STATUS_E_AGAIN;
  8779. }
  8780. if (soc->intr_mode == DP_INTR_POLL)
  8781. qdf_timer_stop(&soc->int_timer);
  8782. return QDF_STATUS_SUCCESS;
  8783. }
  8784. /**
  8785. * dp_runtime_resume() - ensure DP is ready to runtime resume
  8786. * @opaque_pdev: DP pdev context
  8787. *
  8788. * Resume DP for runtime PM.
  8789. *
  8790. * Return: QDF_STATUS
  8791. */
  8792. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  8793. {
  8794. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8795. struct dp_soc *soc = pdev->soc;
  8796. void *hal_srng;
  8797. int i;
  8798. if (soc->intr_mode == DP_INTR_POLL)
  8799. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8800. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  8801. hal_srng = soc->tcl_data_ring[i].hal_srng;
  8802. if (hal_srng) {
  8803. /* We actually only need to acquire the lock */
  8804. hal_srng_access_start(soc->hal_soc, hal_srng);
  8805. /* Update SRC ring head pointer for HW to send
  8806. all pending packets */
  8807. hal_srng_access_end(soc->hal_soc, hal_srng);
  8808. }
  8809. }
  8810. return QDF_STATUS_SUCCESS;
  8811. }
  8812. #endif /* FEATURE_RUNTIME_PM */
  8813. #ifndef CONFIG_WIN
  8814. static struct cdp_misc_ops dp_ops_misc = {
  8815. #ifdef FEATURE_WLAN_TDLS
  8816. .tx_non_std = dp_tx_non_std,
  8817. #endif /* FEATURE_WLAN_TDLS */
  8818. .get_opmode = dp_get_opmode,
  8819. #ifdef FEATURE_RUNTIME_PM
  8820. .runtime_suspend = dp_runtime_suspend,
  8821. .runtime_resume = dp_runtime_resume,
  8822. #endif /* FEATURE_RUNTIME_PM */
  8823. .pkt_log_init = dp_pkt_log_init,
  8824. .pkt_log_con_service = dp_pkt_log_con_service,
  8825. .get_num_rx_contexts = dp_get_num_rx_contexts,
  8826. };
  8827. static struct cdp_flowctl_ops dp_ops_flowctl = {
  8828. /* WIFI 3.0 DP implement as required. */
  8829. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  8830. .flow_pool_map_handler = dp_tx_flow_pool_map,
  8831. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  8832. .register_pause_cb = dp_txrx_register_pause_cb,
  8833. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  8834. .tx_desc_thresh_reached = dp_tx_desc_thresh_reached,
  8835. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  8836. };
  8837. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  8838. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8839. };
  8840. #ifdef IPA_OFFLOAD
  8841. static struct cdp_ipa_ops dp_ops_ipa = {
  8842. .ipa_get_resource = dp_ipa_get_resource,
  8843. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  8844. .ipa_op_response = dp_ipa_op_response,
  8845. .ipa_register_op_cb = dp_ipa_register_op_cb,
  8846. .ipa_get_stat = dp_ipa_get_stat,
  8847. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  8848. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  8849. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  8850. .ipa_setup = dp_ipa_setup,
  8851. .ipa_cleanup = dp_ipa_cleanup,
  8852. .ipa_setup_iface = dp_ipa_setup_iface,
  8853. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  8854. .ipa_enable_pipes = dp_ipa_enable_pipes,
  8855. .ipa_disable_pipes = dp_ipa_disable_pipes,
  8856. .ipa_set_perf_level = dp_ipa_set_perf_level
  8857. };
  8858. #endif
  8859. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  8860. {
  8861. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8862. struct dp_soc *soc = pdev->soc;
  8863. int timeout = SUSPEND_DRAIN_WAIT;
  8864. int drain_wait_delay = 50; /* 50 ms */
  8865. /* Abort if there are any pending TX packets */
  8866. while (dp_get_tx_pending(opaque_pdev) > 0) {
  8867. qdf_sleep(drain_wait_delay);
  8868. if (timeout <= 0) {
  8869. dp_err("TX frames are pending, abort suspend");
  8870. return QDF_STATUS_E_TIMEOUT;
  8871. }
  8872. timeout = timeout - drain_wait_delay;
  8873. }
  8874. if (soc->intr_mode == DP_INTR_POLL)
  8875. qdf_timer_stop(&soc->int_timer);
  8876. return QDF_STATUS_SUCCESS;
  8877. }
  8878. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  8879. {
  8880. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8881. struct dp_soc *soc = pdev->soc;
  8882. if (soc->intr_mode == DP_INTR_POLL)
  8883. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8884. return QDF_STATUS_SUCCESS;
  8885. }
  8886. static struct cdp_bus_ops dp_ops_bus = {
  8887. .bus_suspend = dp_bus_suspend,
  8888. .bus_resume = dp_bus_resume
  8889. };
  8890. static struct cdp_ocb_ops dp_ops_ocb = {
  8891. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8892. };
  8893. static struct cdp_throttle_ops dp_ops_throttle = {
  8894. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8895. };
  8896. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  8897. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8898. };
  8899. static struct cdp_cfg_ops dp_ops_cfg = {
  8900. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8901. };
  8902. /*
  8903. * dp_peer_get_ref_find_by_addr - get peer with addr by ref count inc
  8904. * @dev: physical device instance
  8905. * @peer_mac_addr: peer mac address
  8906. * @local_id: local id for the peer
  8907. * @debug_id: to track enum peer access
  8908. *
  8909. * Return: peer instance pointer
  8910. */
  8911. static inline void *
  8912. dp_peer_get_ref_find_by_addr(struct cdp_pdev *dev, uint8_t *peer_mac_addr,
  8913. uint8_t *local_id,
  8914. enum peer_debug_id_type debug_id)
  8915. {
  8916. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  8917. struct dp_peer *peer;
  8918. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr, 0, DP_VDEV_ALL);
  8919. if (!peer)
  8920. return NULL;
  8921. *local_id = peer->local_id;
  8922. DP_TRACE(INFO, "%s: peer %pK id %d", __func__, peer, *local_id);
  8923. return peer;
  8924. }
  8925. /*
  8926. * dp_peer_release_ref - release peer ref count
  8927. * @peer: peer handle
  8928. * @debug_id: to track enum peer access
  8929. *
  8930. * Return: None
  8931. */
  8932. static inline
  8933. void dp_peer_release_ref(void *peer, enum peer_debug_id_type debug_id)
  8934. {
  8935. dp_peer_unref_delete(peer);
  8936. }
  8937. static struct cdp_peer_ops dp_ops_peer = {
  8938. .register_peer = dp_register_peer,
  8939. .clear_peer = dp_clear_peer,
  8940. .find_peer_by_addr = dp_find_peer_by_addr,
  8941. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  8942. .peer_get_ref_by_addr = dp_peer_get_ref_find_by_addr,
  8943. .peer_release_ref = dp_peer_release_ref,
  8944. .local_peer_id = dp_local_peer_id,
  8945. .peer_find_by_local_id = dp_peer_find_by_local_id,
  8946. .peer_state_update = dp_peer_state_update,
  8947. .get_vdevid = dp_get_vdevid,
  8948. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  8949. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  8950. .get_vdev_for_peer = dp_get_vdev_for_peer,
  8951. .get_peer_state = dp_get_peer_state,
  8952. };
  8953. #endif
  8954. static struct cdp_ops dp_txrx_ops = {
  8955. .cmn_drv_ops = &dp_ops_cmn,
  8956. .ctrl_ops = &dp_ops_ctrl,
  8957. .me_ops = &dp_ops_me,
  8958. .mon_ops = &dp_ops_mon,
  8959. .host_stats_ops = &dp_ops_host_stats,
  8960. .wds_ops = &dp_ops_wds,
  8961. .raw_ops = &dp_ops_raw,
  8962. #ifdef CONFIG_WIN
  8963. .pflow_ops = &dp_ops_pflow,
  8964. #endif /* CONFIG_WIN */
  8965. #ifndef CONFIG_WIN
  8966. .misc_ops = &dp_ops_misc,
  8967. .cfg_ops = &dp_ops_cfg,
  8968. .flowctl_ops = &dp_ops_flowctl,
  8969. .l_flowctl_ops = &dp_ops_l_flowctl,
  8970. #ifdef IPA_OFFLOAD
  8971. .ipa_ops = &dp_ops_ipa,
  8972. #endif
  8973. .bus_ops = &dp_ops_bus,
  8974. .ocb_ops = &dp_ops_ocb,
  8975. .peer_ops = &dp_ops_peer,
  8976. .throttle_ops = &dp_ops_throttle,
  8977. .mob_stats_ops = &dp_ops_mob_stats,
  8978. #endif
  8979. };
  8980. /*
  8981. * dp_soc_set_txrx_ring_map()
  8982. * @dp_soc: DP handler for soc
  8983. *
  8984. * Return: Void
  8985. */
  8986. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  8987. {
  8988. uint32_t i;
  8989. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  8990. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  8991. }
  8992. }
  8993. #ifdef QCA_WIFI_QCA8074
  8994. #ifndef QCA_MEM_ATTACH_ON_WIFI3
  8995. /**
  8996. * dp_soc_attach_wifi3() - Attach txrx SOC
  8997. * @ctrl_psoc: Opaque SOC handle from control plane
  8998. * @htc_handle: Opaque HTC handle
  8999. * @hif_handle: Opaque HIF handle
  9000. * @qdf_osdev: QDF device
  9001. * @ol_ops: Offload Operations
  9002. * @device_id: Device ID
  9003. *
  9004. * Return: DP SOC handle on success, NULL on failure
  9005. */
  9006. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  9007. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  9008. struct ol_if_ops *ol_ops, uint16_t device_id)
  9009. {
  9010. struct dp_soc *dp_soc = NULL;
  9011. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  9012. ol_ops, device_id);
  9013. if (!dp_soc)
  9014. return NULL;
  9015. if (!dp_soc_init(dp_soc, htc_handle, hif_handle))
  9016. return NULL;
  9017. return (void *)dp_soc;
  9018. }
  9019. #else
  9020. /**
  9021. * dp_soc_attach_wifi3() - Attach txrx SOC
  9022. * @ctrl_psoc: Opaque SOC handle from control plane
  9023. * @htc_handle: Opaque HTC handle
  9024. * @hif_handle: Opaque HIF handle
  9025. * @qdf_osdev: QDF device
  9026. * @ol_ops: Offload Operations
  9027. * @device_id: Device ID
  9028. *
  9029. * Return: DP SOC handle on success, NULL on failure
  9030. */
  9031. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  9032. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  9033. struct ol_if_ops *ol_ops, uint16_t device_id)
  9034. {
  9035. struct dp_soc *dp_soc = NULL;
  9036. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  9037. ol_ops, device_id);
  9038. return (void *)dp_soc;
  9039. }
  9040. #endif
  9041. /**
  9042. * dp_soc_attach() - Attach txrx SOC
  9043. * @ctrl_psoc: Opaque SOC handle from control plane
  9044. * @htc_handle: Opaque HTC handle
  9045. * @qdf_osdev: QDF device
  9046. * @ol_ops: Offload Operations
  9047. * @device_id: Device ID
  9048. *
  9049. * Return: DP SOC handle on success, NULL on failure
  9050. */
  9051. static struct dp_soc *
  9052. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  9053. struct ol_if_ops *ol_ops, uint16_t device_id)
  9054. {
  9055. int int_ctx;
  9056. struct dp_soc *soc = NULL;
  9057. struct htt_soc *htt_soc = NULL;
  9058. soc = qdf_mem_malloc(sizeof(*soc));
  9059. if (!soc) {
  9060. dp_err("DP SOC memory allocation failed");
  9061. goto fail0;
  9062. }
  9063. int_ctx = 0;
  9064. soc->device_id = device_id;
  9065. soc->cdp_soc.ops = &dp_txrx_ops;
  9066. soc->cdp_soc.ol_ops = ol_ops;
  9067. soc->ctrl_psoc = ctrl_psoc;
  9068. soc->osdev = qdf_osdev;
  9069. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS;
  9070. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  9071. if (!soc->wlan_cfg_ctx) {
  9072. dp_err("wlan_cfg_ctx failed\n");
  9073. goto fail1;
  9074. }
  9075. htt_soc = qdf_mem_malloc(sizeof(*htt_soc));
  9076. if (!htt_soc) {
  9077. dp_err("HTT attach failed");
  9078. goto fail1;
  9079. }
  9080. soc->htt_handle = htt_soc;
  9081. htt_soc->dp_soc = soc;
  9082. htt_soc->htc_soc = htc_handle;
  9083. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  9084. goto fail2;
  9085. return (void *)soc;
  9086. fail2:
  9087. qdf_mem_free(htt_soc);
  9088. fail1:
  9089. qdf_mem_free(soc);
  9090. fail0:
  9091. return NULL;
  9092. }
  9093. /**
  9094. * dp_soc_init() - Initialize txrx SOC
  9095. * @dp_soc: Opaque DP SOC handle
  9096. * @htc_handle: Opaque HTC handle
  9097. * @hif_handle: Opaque HIF handle
  9098. *
  9099. * Return: DP SOC handle on success, NULL on failure
  9100. */
  9101. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle)
  9102. {
  9103. int target_type;
  9104. struct dp_soc *soc = (struct dp_soc *)dpsoc;
  9105. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  9106. htt_soc->htc_soc = htc_handle;
  9107. soc->hif_handle = hif_handle;
  9108. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  9109. if (!soc->hal_soc)
  9110. return NULL;
  9111. htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc, htt_soc->htc_soc,
  9112. soc->hal_soc, soc->osdev);
  9113. target_type = hal_get_target_type(soc->hal_soc);
  9114. switch (target_type) {
  9115. case TARGET_TYPE_QCA6290:
  9116. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9117. REO_DST_RING_SIZE_QCA6290);
  9118. soc->ast_override_support = 1;
  9119. soc->da_war_enabled = false;
  9120. break;
  9121. #ifdef QCA_WIFI_QCA6390
  9122. case TARGET_TYPE_QCA6390:
  9123. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9124. REO_DST_RING_SIZE_QCA6290);
  9125. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  9126. soc->ast_override_support = 1;
  9127. if (con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  9128. int int_ctx;
  9129. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  9130. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  9131. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  9132. }
  9133. }
  9134. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  9135. break;
  9136. #endif
  9137. case TARGET_TYPE_QCA8074:
  9138. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9139. REO_DST_RING_SIZE_QCA8074);
  9140. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  9141. soc->hw_nac_monitor_support = 1;
  9142. soc->da_war_enabled = true;
  9143. break;
  9144. case TARGET_TYPE_QCA8074V2:
  9145. case TARGET_TYPE_QCA6018:
  9146. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9147. REO_DST_RING_SIZE_QCA8074);
  9148. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  9149. soc->hw_nac_monitor_support = 1;
  9150. soc->ast_override_support = 1;
  9151. soc->per_tid_basize_max_tid = 8;
  9152. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  9153. soc->da_war_enabled = false;
  9154. break;
  9155. default:
  9156. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  9157. qdf_assert_always(0);
  9158. break;
  9159. }
  9160. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  9161. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  9162. soc->cce_disable = false;
  9163. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  9164. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  9165. CDP_CFG_MAX_PEER_ID);
  9166. if (ret != -EINVAL) {
  9167. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  9168. }
  9169. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  9170. CDP_CFG_CCE_DISABLE);
  9171. if (ret == 1)
  9172. soc->cce_disable = true;
  9173. }
  9174. qdf_spinlock_create(&soc->peer_ref_mutex);
  9175. qdf_spinlock_create(&soc->ast_lock);
  9176. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  9177. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  9178. /* fill the tx/rx cpu ring map*/
  9179. dp_soc_set_txrx_ring_map(soc);
  9180. qdf_spinlock_create(&soc->htt_stats.lock);
  9181. /* initialize work queue for stats processing */
  9182. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  9183. return soc;
  9184. }
  9185. /**
  9186. * dp_soc_init_wifi3() - Initialize txrx SOC
  9187. * @dp_soc: Opaque DP SOC handle
  9188. * @ctrl_psoc: Opaque SOC handle from control plane(Unused)
  9189. * @hif_handle: Opaque HIF handle
  9190. * @htc_handle: Opaque HTC handle
  9191. * @qdf_osdev: QDF device (Unused)
  9192. * @ol_ops: Offload Operations (Unused)
  9193. * @device_id: Device ID (Unused)
  9194. *
  9195. * Return: DP SOC handle on success, NULL on failure
  9196. */
  9197. void *dp_soc_init_wifi3(void *dpsoc, void *ctrl_psoc, void *hif_handle,
  9198. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  9199. struct ol_if_ops *ol_ops, uint16_t device_id)
  9200. {
  9201. return dp_soc_init(dpsoc, htc_handle, hif_handle);
  9202. }
  9203. #endif
  9204. /*
  9205. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  9206. *
  9207. * @soc: handle to DP soc
  9208. * @mac_id: MAC id
  9209. *
  9210. * Return: Return pdev corresponding to MAC
  9211. */
  9212. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  9213. {
  9214. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  9215. return soc->pdev_list[mac_id];
  9216. /* Typically for MCL as there only 1 PDEV*/
  9217. return soc->pdev_list[0];
  9218. }
  9219. /*
  9220. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  9221. * @soc: DP SoC context
  9222. * @max_mac_rings: No of MAC rings
  9223. *
  9224. * Return: None
  9225. */
  9226. static
  9227. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  9228. int *max_mac_rings)
  9229. {
  9230. bool dbs_enable = false;
  9231. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  9232. dbs_enable = soc->cdp_soc.ol_ops->
  9233. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  9234. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  9235. }
  9236. /*
  9237. * dp_is_soc_reinit() - Check if soc reinit is true
  9238. * @soc: DP SoC context
  9239. *
  9240. * Return: true or false
  9241. */
  9242. bool dp_is_soc_reinit(struct dp_soc *soc)
  9243. {
  9244. return soc->dp_soc_reinit;
  9245. }
  9246. /*
  9247. * dp_set_pktlog_wifi3() - attach txrx vdev
  9248. * @pdev: Datapath PDEV handle
  9249. * @event: which event's notifications are being subscribed to
  9250. * @enable: WDI event subscribe or not. (True or False)
  9251. *
  9252. * Return: Success, NULL on failure
  9253. */
  9254. #ifdef WDI_EVENT_ENABLE
  9255. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  9256. bool enable)
  9257. {
  9258. struct dp_soc *soc = NULL;
  9259. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  9260. int max_mac_rings = wlan_cfg_get_num_mac_rings
  9261. (pdev->wlan_cfg_ctx);
  9262. uint8_t mac_id = 0;
  9263. soc = pdev->soc;
  9264. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  9265. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  9266. FL("Max_mac_rings %d "),
  9267. max_mac_rings);
  9268. if (enable) {
  9269. switch (event) {
  9270. case WDI_EVENT_RX_DESC:
  9271. if (pdev->monitor_vdev) {
  9272. /* Nothing needs to be done if monitor mode is
  9273. * enabled
  9274. */
  9275. return 0;
  9276. }
  9277. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  9278. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  9279. htt_tlv_filter.mpdu_start = 1;
  9280. htt_tlv_filter.msdu_start = 1;
  9281. htt_tlv_filter.msdu_end = 1;
  9282. htt_tlv_filter.mpdu_end = 1;
  9283. htt_tlv_filter.packet_header = 1;
  9284. htt_tlv_filter.attention = 1;
  9285. htt_tlv_filter.ppdu_start = 1;
  9286. htt_tlv_filter.ppdu_end = 1;
  9287. htt_tlv_filter.ppdu_end_user_stats = 1;
  9288. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  9289. htt_tlv_filter.ppdu_end_status_done = 1;
  9290. htt_tlv_filter.enable_fp = 1;
  9291. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  9292. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  9293. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  9294. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  9295. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  9296. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  9297. htt_tlv_filter.offset_valid = false;
  9298. for (mac_id = 0; mac_id < max_mac_rings;
  9299. mac_id++) {
  9300. int mac_for_pdev =
  9301. dp_get_mac_id_for_pdev(mac_id,
  9302. pdev->pdev_id);
  9303. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9304. mac_for_pdev,
  9305. pdev->rxdma_mon_status_ring[mac_id]
  9306. .hal_srng,
  9307. RXDMA_MONITOR_STATUS,
  9308. RX_BUFFER_SIZE,
  9309. &htt_tlv_filter);
  9310. }
  9311. if (soc->reap_timer_init)
  9312. qdf_timer_mod(&soc->mon_reap_timer,
  9313. DP_INTR_POLL_TIMER_MS);
  9314. }
  9315. break;
  9316. case WDI_EVENT_LITE_RX:
  9317. if (pdev->monitor_vdev) {
  9318. /* Nothing needs to be done if monitor mode is
  9319. * enabled
  9320. */
  9321. return 0;
  9322. }
  9323. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  9324. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  9325. htt_tlv_filter.ppdu_start = 1;
  9326. htt_tlv_filter.ppdu_end = 1;
  9327. htt_tlv_filter.ppdu_end_user_stats = 1;
  9328. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  9329. htt_tlv_filter.ppdu_end_status_done = 1;
  9330. htt_tlv_filter.mpdu_start = 1;
  9331. htt_tlv_filter.enable_fp = 1;
  9332. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  9333. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  9334. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  9335. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  9336. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  9337. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  9338. htt_tlv_filter.offset_valid = false;
  9339. for (mac_id = 0; mac_id < max_mac_rings;
  9340. mac_id++) {
  9341. int mac_for_pdev =
  9342. dp_get_mac_id_for_pdev(mac_id,
  9343. pdev->pdev_id);
  9344. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9345. mac_for_pdev,
  9346. pdev->rxdma_mon_status_ring[mac_id]
  9347. .hal_srng,
  9348. RXDMA_MONITOR_STATUS,
  9349. RX_BUFFER_SIZE_PKTLOG_LITE,
  9350. &htt_tlv_filter);
  9351. }
  9352. if (soc->reap_timer_init)
  9353. qdf_timer_mod(&soc->mon_reap_timer,
  9354. DP_INTR_POLL_TIMER_MS);
  9355. }
  9356. break;
  9357. case WDI_EVENT_LITE_T2H:
  9358. if (pdev->monitor_vdev) {
  9359. /* Nothing needs to be done if monitor mode is
  9360. * enabled
  9361. */
  9362. return 0;
  9363. }
  9364. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  9365. int mac_for_pdev = dp_get_mac_id_for_pdev(
  9366. mac_id, pdev->pdev_id);
  9367. pdev->pktlog_ppdu_stats = true;
  9368. dp_h2t_cfg_stats_msg_send(pdev,
  9369. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  9370. mac_for_pdev);
  9371. }
  9372. break;
  9373. default:
  9374. /* Nothing needs to be done for other pktlog types */
  9375. break;
  9376. }
  9377. } else {
  9378. switch (event) {
  9379. case WDI_EVENT_RX_DESC:
  9380. case WDI_EVENT_LITE_RX:
  9381. if (pdev->monitor_vdev) {
  9382. /* Nothing needs to be done if monitor mode is
  9383. * enabled
  9384. */
  9385. return 0;
  9386. }
  9387. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  9388. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  9389. for (mac_id = 0; mac_id < max_mac_rings;
  9390. mac_id++) {
  9391. int mac_for_pdev =
  9392. dp_get_mac_id_for_pdev(mac_id,
  9393. pdev->pdev_id);
  9394. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9395. mac_for_pdev,
  9396. pdev->rxdma_mon_status_ring[mac_id]
  9397. .hal_srng,
  9398. RXDMA_MONITOR_STATUS,
  9399. RX_BUFFER_SIZE,
  9400. &htt_tlv_filter);
  9401. }
  9402. if (soc->reap_timer_init)
  9403. qdf_timer_stop(&soc->mon_reap_timer);
  9404. }
  9405. break;
  9406. case WDI_EVENT_LITE_T2H:
  9407. if (pdev->monitor_vdev) {
  9408. /* Nothing needs to be done if monitor mode is
  9409. * enabled
  9410. */
  9411. return 0;
  9412. }
  9413. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  9414. * passing value 0. Once these macros will define in htt
  9415. * header file will use proper macros
  9416. */
  9417. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  9418. int mac_for_pdev =
  9419. dp_get_mac_id_for_pdev(mac_id,
  9420. pdev->pdev_id);
  9421. pdev->pktlog_ppdu_stats = false;
  9422. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  9423. dp_h2t_cfg_stats_msg_send(pdev, 0,
  9424. mac_for_pdev);
  9425. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  9426. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  9427. mac_for_pdev);
  9428. } else if (pdev->enhanced_stats_en) {
  9429. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  9430. mac_for_pdev);
  9431. }
  9432. }
  9433. break;
  9434. default:
  9435. /* Nothing needs to be done for other pktlog types */
  9436. break;
  9437. }
  9438. }
  9439. return 0;
  9440. }
  9441. #endif
  9442. /**
  9443. * dp_bucket_index() - Return index from array
  9444. *
  9445. * @delay: delay measured
  9446. * @array: array used to index corresponding delay
  9447. *
  9448. * Return: index
  9449. */
  9450. static uint8_t dp_bucket_index(uint32_t delay, uint16_t *array)
  9451. {
  9452. uint8_t i = CDP_DELAY_BUCKET_0;
  9453. for (; i < CDP_DELAY_BUCKET_MAX; i++) {
  9454. if (delay >= array[i] && delay <= array[i + 1])
  9455. return i;
  9456. }
  9457. return (CDP_DELAY_BUCKET_MAX - 1);
  9458. }
  9459. /**
  9460. * dp_fill_delay_buckets() - Fill delay statistics bucket for each
  9461. * type of delay
  9462. *
  9463. * @pdev: pdev handle
  9464. * @delay: delay in ms
  9465. * @t: tid value
  9466. * @mode: type of tx delay mode
  9467. * Return: pointer to cdp_delay_stats structure
  9468. */
  9469. static struct cdp_delay_stats *
  9470. dp_fill_delay_buckets(struct dp_pdev *pdev, uint32_t delay,
  9471. uint8_t tid, uint8_t mode)
  9472. {
  9473. uint8_t delay_index = 0;
  9474. struct cdp_tid_tx_stats *tstats =
  9475. &pdev->stats.tid_stats.tid_tx_stats[tid];
  9476. struct cdp_tid_rx_stats *rstats =
  9477. &pdev->stats.tid_stats.tid_rx_stats[tid];
  9478. /*
  9479. * cdp_fw_to_hw_delay_range
  9480. * Fw to hw delay ranges in milliseconds
  9481. */
  9482. uint16_t cdp_fw_to_hw_delay[CDP_DELAY_BUCKET_MAX] = {
  9483. 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 250, 500};
  9484. /*
  9485. * cdp_sw_enq_delay_range
  9486. * Software enqueue delay ranges in milliseconds
  9487. */
  9488. uint16_t cdp_sw_enq_delay[CDP_DELAY_BUCKET_MAX] = {
  9489. 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
  9490. /*
  9491. * cdp_intfrm_delay_range
  9492. * Interframe delay ranges in milliseconds
  9493. */
  9494. uint16_t cdp_intfrm_delay[CDP_DELAY_BUCKET_MAX] = {
  9495. 0, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60};
  9496. /*
  9497. * Update delay stats in proper bucket
  9498. */
  9499. switch (mode) {
  9500. /* Software Enqueue delay ranges */
  9501. case CDP_DELAY_STATS_SW_ENQ:
  9502. delay_index = dp_bucket_index(delay, cdp_sw_enq_delay);
  9503. tstats->swq_delay.delay_bucket[delay_index]++;
  9504. return &tstats->swq_delay;
  9505. /* Tx Completion delay ranges */
  9506. case CDP_DELAY_STATS_FW_HW_TRANSMIT:
  9507. delay_index = dp_bucket_index(delay, cdp_fw_to_hw_delay);
  9508. tstats->hwtx_delay.delay_bucket[delay_index]++;
  9509. return &tstats->hwtx_delay;
  9510. /* Interframe tx delay ranges */
  9511. case CDP_DELAY_STATS_TX_INTERFRAME:
  9512. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9513. tstats->intfrm_delay.delay_bucket[delay_index]++;
  9514. return &tstats->intfrm_delay;
  9515. /* Interframe rx delay ranges */
  9516. case CDP_DELAY_STATS_RX_INTERFRAME:
  9517. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9518. rstats->intfrm_delay.delay_bucket[delay_index]++;
  9519. return &rstats->intfrm_delay;
  9520. /* Ring reap to indication to network stack */
  9521. case CDP_DELAY_STATS_REAP_STACK:
  9522. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9523. rstats->to_stack_delay.delay_bucket[delay_index]++;
  9524. return &rstats->to_stack_delay;
  9525. default:
  9526. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  9527. "%s Incorrect delay mode: %d", __func__, mode);
  9528. }
  9529. return NULL;
  9530. }
  9531. /**
  9532. * dp_update_delay_stats() - Update delay statistics in structure
  9533. * and fill min, max and avg delay
  9534. *
  9535. * @pdev: pdev handle
  9536. * @delay: delay in ms
  9537. * @tid: tid value
  9538. * @mode: type of tx delay mode
  9539. * Return: none
  9540. */
  9541. void dp_update_delay_stats(struct dp_pdev *pdev, uint32_t delay,
  9542. uint8_t tid, uint8_t mode)
  9543. {
  9544. struct cdp_delay_stats *dstats = NULL;
  9545. /*
  9546. * Delay ranges are different for different delay modes
  9547. * Get the correct index to update delay bucket
  9548. */
  9549. dstats = dp_fill_delay_buckets(pdev, delay, tid, mode);
  9550. if (qdf_unlikely(!dstats))
  9551. return;
  9552. if (delay != 0) {
  9553. /*
  9554. * Compute minimum,average and maximum
  9555. * delay
  9556. */
  9557. if (delay < dstats->min_delay)
  9558. dstats->min_delay = delay;
  9559. if (delay > dstats->max_delay)
  9560. dstats->max_delay = delay;
  9561. /*
  9562. * Average over delay measured till now
  9563. */
  9564. if (!dstats->avg_delay)
  9565. dstats->avg_delay = delay;
  9566. else
  9567. dstats->avg_delay = ((delay + dstats->avg_delay) / 2);
  9568. }
  9569. }