dp_tx.h 26 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  25. #include "if_meta_hdr.h"
  26. #endif
  27. #include "dp_internal.h"
  28. #include "hal_tx.h"
  29. #include <qdf_tracepoint.h>
  30. #define DP_INVALID_VDEV_ID 0xFF
  31. #define DP_TX_MAX_NUM_FRAGS 6
  32. /*
  33. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  34. * please do not change this flag's definition
  35. */
  36. #define DP_TX_DESC_FLAG_FRAG 0x1
  37. #define DP_TX_DESC_FLAG_TO_FW 0x2
  38. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  39. #define DP_TX_DESC_FLAG_RAW 0x8
  40. #define DP_TX_DESC_FLAG_MESH 0x10
  41. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  42. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  43. #define DP_TX_DESC_FLAG_ME 0x80
  44. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  45. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  46. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  47. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  48. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  49. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  50. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  51. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  52. do { \
  53. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  54. qdf_nbuf_free(buf); \
  55. } while (0)
  56. #define OCB_HEADER_VERSION 1
  57. #ifdef TX_PER_PDEV_DESC_POOL
  58. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  59. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  60. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  61. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  62. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  63. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  64. #else
  65. #ifdef TX_PER_VDEV_DESC_POOL
  66. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  67. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  68. #endif /* TX_PER_VDEV_DESC_POOL */
  69. #endif /* TX_PER_PDEV_DESC_POOL */
  70. #define DP_TX_QUEUE_MASK 0x3
  71. #define MAX_CDP_SEC_TYPE 12
  72. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  73. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  74. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  75. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  76. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  77. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  78. #define dp_tx_info(params...) \
  79. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  80. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  81. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  82. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  83. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  84. #define dp_tx_comp_info(params...) \
  85. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  86. #define dp_tx_comp_info_rl(params...) \
  87. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  88. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  89. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  90. /**
  91. * struct dp_tx_frag_info_s
  92. * @vaddr: hlos vritual address for buffer
  93. * @paddr_lo: physical address lower 32bits
  94. * @paddr_hi: physical address higher bits
  95. * @len: length of the buffer
  96. */
  97. struct dp_tx_frag_info_s {
  98. uint8_t *vaddr;
  99. uint32_t paddr_lo;
  100. uint16_t paddr_hi;
  101. uint16_t len;
  102. };
  103. /**
  104. * struct dp_tx_seg_info_s - Segmentation Descriptor
  105. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  106. * @frag_cnt: Fragment count in this segment
  107. * @total_len: Total length of segment
  108. * @frags: per-Fragment information
  109. * @next: pointer to next MSDU segment
  110. */
  111. struct dp_tx_seg_info_s {
  112. qdf_nbuf_t nbuf;
  113. uint16_t frag_cnt;
  114. uint16_t total_len;
  115. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  116. struct dp_tx_seg_info_s *next;
  117. };
  118. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  119. /**
  120. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  121. * @num_segs: Number of segments (TSO/ME) in the frame
  122. * @total_len: Total length of the frame
  123. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  124. * descriptors for SG frames/multicast-unicast converted packets.
  125. *
  126. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  127. * carry fragmentation information
  128. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  129. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  130. * converted into set of skb sg (nr_frags) structures.
  131. */
  132. struct dp_tx_sg_info_s {
  133. uint32_t num_segs;
  134. uint32_t total_len;
  135. struct dp_tx_seg_info_s *curr_seg;
  136. };
  137. /**
  138. * struct dp_tx_queue - Tx queue
  139. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  140. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  141. *
  142. * Tx queue contains information of the software (Descriptor pool)
  143. * and hardware resources (TCL ring id) to be used for a particular
  144. * transmit queue (obtained from skb_queue_mapping in case of linux)
  145. */
  146. struct dp_tx_queue {
  147. uint8_t desc_pool_id;
  148. uint8_t ring_id;
  149. };
  150. /**
  151. * struct dp_tx_msdu_info_s - MSDU Descriptor
  152. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  153. * @tx_queue: Tx queue on which this MSDU should be transmitted
  154. * @num_seg: Number of segments (TSO)
  155. * @tid: TID (override) that is sent from HLOS
  156. * @u.tso_info: TSO information for TSO frame types
  157. * (chain of the TSO segments, number of segments)
  158. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  159. * @meta_data: Mesh meta header information
  160. * @exception_fw: Duplicate frame to be sent to firmware
  161. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  162. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  163. * @gsn: global sequence for reinjected mcast packets
  164. * @vdev_id : vdev_id for reinjected mcast packets
  165. *
  166. * This structure holds the complete MSDU information needed to program the
  167. * Hardware TCL and MSDU extension descriptors for different frame types
  168. *
  169. */
  170. struct dp_tx_msdu_info_s {
  171. enum dp_tx_frm_type frm_type;
  172. struct dp_tx_queue tx_queue;
  173. uint32_t num_seg;
  174. uint8_t tid;
  175. uint8_t exception_fw;
  176. uint8_t is_tx_sniffer;
  177. union {
  178. struct qdf_tso_info_t tso_info;
  179. struct dp_tx_sg_info_s sg_info;
  180. } u;
  181. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  182. uint16_t ppdu_cookie;
  183. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  184. #ifdef WLAN_MCAST_MLO
  185. uint16_t gsn;
  186. uint8_t vdev_id;
  187. #endif
  188. #endif
  189. };
  190. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  191. /**
  192. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  193. * @soc: core txrx context
  194. * @index: index of ring to deinit
  195. *
  196. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  197. * index of the respective TCL/WBM2SW release in soc structure.
  198. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  199. * and &soc->tx_comp_ring[2] will be deinitialized.
  200. *
  201. * Return: none
  202. */
  203. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  204. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  205. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  206. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  207. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  208. uint8_t num_pool,
  209. uint16_t num_desc);
  210. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  211. uint8_t num_pool,
  212. uint16_t num_desc);
  213. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  214. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  215. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  216. uint8_t num_pool,
  217. uint16_t num_desc);
  218. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  219. uint8_t num_pool,
  220. uint16_t num_desc);
  221. void dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc);
  222. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  223. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  224. uint8_t tid, uint8_t ring_id);
  225. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  226. struct dp_tx_desc_s *tx_desc,
  227. struct hal_tx_completion_status *ts,
  228. struct dp_peer *peer, uint8_t ring_id);
  229. void dp_tx_comp_process_desc(struct dp_soc *soc,
  230. struct dp_tx_desc_s *desc,
  231. struct hal_tx_completion_status *ts,
  232. struct dp_peer *peer);
  233. void dp_tx_reinject_handler(struct dp_soc *soc,
  234. struct dp_vdev *vdev,
  235. struct dp_tx_desc_s *tx_desc,
  236. uint8_t *status,
  237. uint8_t reinject_reason);
  238. void dp_tx_inspect_handler(struct dp_soc *soc,
  239. struct dp_vdev *vdev,
  240. struct dp_tx_desc_s *tx_desc,
  241. uint8_t *status);
  242. void dp_tx_update_peer_basic_stats(struct dp_peer *peer, uint32_t length,
  243. uint8_t tx_status, bool update);
  244. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  245. /**
  246. * dp_tso_attach() - TSO Attach handler
  247. * @txrx_soc: Opaque Dp handle
  248. *
  249. * Reserve TSO descriptor buffers
  250. *
  251. * Return: QDF_STATUS_E_FAILURE on failure or
  252. * QDF_STATUS_SUCCESS on success
  253. */
  254. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  255. /**
  256. * dp_tso_detach() - TSO Detach handler
  257. * @txrx_soc: Opaque Dp handle
  258. *
  259. * Deallocate TSO descriptor buffers
  260. *
  261. * Return: QDF_STATUS_E_FAILURE on failure or
  262. * QDF_STATUS_SUCCESS on success
  263. */
  264. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  265. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  266. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc, uint8_t vdev_id,
  267. qdf_nbuf_t nbuf);
  268. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  269. qdf_nbuf_t nbuf,
  270. struct cdp_tx_exception_metadata *tx_exc);
  271. qdf_nbuf_t dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc,
  272. uint8_t vdev_id,
  273. qdf_nbuf_t nbuf,
  274. struct cdp_tx_exception_metadata *tx_exc);
  275. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  276. qdf_nbuf_t nbuf);
  277. qdf_nbuf_t
  278. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  279. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  280. struct cdp_tx_exception_metadata *tx_exc_metadata);
  281. #if QDF_LOCK_STATS
  282. noinline qdf_nbuf_t
  283. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  284. struct dp_tx_msdu_info_s *msdu_info);
  285. #else
  286. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  287. struct dp_tx_msdu_info_s *msdu_info);
  288. #endif
  289. #ifdef FEATURE_WLAN_TDLS
  290. /**
  291. * dp_tx_non_std() - Allow the control-path SW to send data frames
  292. * @soc_hdl: Datapath soc handle
  293. * @vdev_id: id of vdev
  294. * @tx_spec: what non-standard handling to apply to the tx data frames
  295. * @msdu_list: NULL-terminated list of tx MSDUs
  296. *
  297. * Return: NULL on success,
  298. * nbuf when it fails to send
  299. */
  300. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  301. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  302. #endif
  303. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  304. /**
  305. * dp_tx_comp_handler() - Tx completion handler
  306. * @int_ctx: pointer to DP interrupt context
  307. * @soc: core txrx main context
  308. * @hal_srng: Opaque HAL SRNG pointer
  309. * @ring_id: completion ring id
  310. * @quota: No. of packets/descriptors that can be serviced in one loop
  311. *
  312. * This function will collect hardware release ring element contents and
  313. * handle descriptor contents. Based on contents, free packet or handle error
  314. * conditions
  315. *
  316. * Return: Number of TX completions processed
  317. */
  318. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  319. hal_ring_handle_t hal_srng, uint8_t ring_id,
  320. uint32_t quota);
  321. QDF_STATUS
  322. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  323. QDF_STATUS
  324. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  325. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  326. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  327. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  328. {
  329. return;
  330. }
  331. #endif
  332. /**
  333. * dp_tx_pdev_init() - dp tx pdev init
  334. * @pdev: physical device instance
  335. *
  336. * Return: QDF_STATUS_SUCCESS: success
  337. * QDF_STATUS_E_RESOURCES: Error return
  338. */
  339. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  340. {
  341. struct dp_soc *soc = pdev->soc;
  342. /* Initialize Flow control counters */
  343. qdf_atomic_init(&pdev->num_tx_outstanding);
  344. pdev->tx_descs_max = 0;
  345. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  346. /* Initialize descriptors in TCL Ring */
  347. hal_tx_init_data_ring(soc->hal_soc,
  348. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  349. }
  350. return QDF_STATUS_SUCCESS;
  351. }
  352. #ifndef FEATURE_WDS
  353. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  354. {
  355. return;
  356. }
  357. #endif
  358. #ifndef QCA_MULTIPASS_SUPPORT
  359. static inline
  360. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  361. qdf_nbuf_t nbuf,
  362. struct dp_tx_msdu_info_s *msdu_info)
  363. {
  364. return true;
  365. }
  366. static inline
  367. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  368. {
  369. }
  370. #else
  371. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  372. qdf_nbuf_t nbuf,
  373. struct dp_tx_msdu_info_s *msdu_info);
  374. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  375. #endif
  376. /**
  377. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  378. * @status: hw status
  379. *
  380. * Return: qdf tx rx status
  381. */
  382. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  383. {
  384. switch (status) {
  385. case HAL_TX_TQM_RR_FRAME_ACKED:
  386. return QDF_TX_RX_STATUS_OK;
  387. case HAL_TX_TQM_RR_REM_CMD_TX:
  388. return QDF_TX_RX_STATUS_NO_ACK;
  389. case HAL_TX_TQM_RR_REM_CMD_REM:
  390. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  391. case HAL_TX_TQM_RR_REM_CMD_AGED:
  392. return QDF_TX_RX_STATUS_FW_DISCARD;
  393. default:
  394. return QDF_TX_RX_STATUS_DEFAULT;
  395. }
  396. }
  397. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  398. /**
  399. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  400. * @vdev: DP Virtual device handle
  401. * @nbuf: Buffer pointer
  402. * @queue: queue ids container for nbuf
  403. *
  404. * TX packet queue has 2 instances, software descriptors id and dma ring id
  405. * Based on tx feature and hardware configuration queue id combination could be
  406. * different.
  407. * For example -
  408. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  409. * With no XPS,lock based resource protection, Descriptor pool ids are different
  410. * for each vdev, dma ring id will be same as single pdev id
  411. *
  412. * Return: None
  413. */
  414. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  415. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  416. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  417. {
  418. uint16_t queue_offset = qdf_nbuf_get_queue_mapping(nbuf) &
  419. DP_TX_QUEUE_MASK;
  420. queue->desc_pool_id = queue_offset;
  421. queue->ring_id = qdf_get_cpu();
  422. dp_tx_debug("pool_id:%d ring_id: %d",
  423. queue->desc_pool_id, queue->ring_id);
  424. }
  425. /*
  426. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  427. * @dp_soc - DP soc structure pointer
  428. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  429. *
  430. * Return - HAL ring handle
  431. */
  432. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  433. uint8_t ring_id)
  434. {
  435. if (ring_id == soc->num_tcl_data_rings)
  436. return soc->tcl_cmd_credit_ring.hal_srng;
  437. return soc->tcl_data_ring[ring_id].hal_srng;
  438. }
  439. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  440. #ifdef TX_MULTI_TCL
  441. #ifdef IPA_OFFLOAD
  442. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  443. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  444. {
  445. /* get flow id */
  446. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  447. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  448. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  449. else
  450. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  451. vdev->pdev->soc->num_tcl_data_rings);
  452. }
  453. #else
  454. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  455. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  456. {
  457. /* get flow id */
  458. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  459. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  460. vdev->pdev->soc->num_tcl_data_rings);
  461. }
  462. #endif
  463. #else
  464. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  465. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  466. {
  467. /* get flow id */
  468. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  469. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  470. }
  471. #endif
  472. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  473. uint8_t ring_id)
  474. {
  475. return soc->tcl_data_ring[ring_id].hal_srng;
  476. }
  477. #endif
  478. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  479. /*
  480. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  481. * @dp_soc - DP soc structure pointer
  482. * @hal_ring_hdl - HAL ring handle
  483. *
  484. * Return - None
  485. */
  486. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  487. hal_ring_handle_t hal_ring_hdl)
  488. {
  489. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  490. }
  491. /*
  492. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  493. * @dp_soc - DP soc structure pointer
  494. * @hal_ring_hdl - HAL ring handle
  495. *
  496. * Return - None
  497. */
  498. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  499. hal_ring_handle_t hal_ring_hdl)
  500. {
  501. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  502. }
  503. /*
  504. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  505. * @dp_soc - DP soc structure pointer
  506. * @hal_ring_hdl - HAL ring handle
  507. *
  508. * Return - None
  509. */
  510. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  511. hal_ring_handle_t
  512. hal_ring_hdl)
  513. {
  514. }
  515. #else
  516. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  517. hal_ring_handle_t hal_ring_hdl)
  518. {
  519. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  520. }
  521. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  522. hal_ring_handle_t hal_ring_hdl)
  523. {
  524. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  525. }
  526. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  527. hal_ring_handle_t
  528. hal_ring_hdl)
  529. {
  530. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  531. }
  532. #endif
  533. #ifdef ATH_TX_PRI_OVERRIDE
  534. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  535. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  536. #else
  537. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  538. #endif
  539. /* TODO TX_FEATURE_NOT_YET */
  540. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  541. {
  542. return;
  543. }
  544. /* TODO TX_FEATURE_NOT_YET */
  545. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  546. bool force_free);
  547. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  548. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  549. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  550. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  551. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  552. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  553. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  554. void
  555. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  556. uint32_t buf_type);
  557. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  558. static inline
  559. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  560. {
  561. return QDF_STATUS_SUCCESS;
  562. }
  563. static inline
  564. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  565. {
  566. return QDF_STATUS_SUCCESS;
  567. }
  568. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  569. {
  570. }
  571. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  572. {
  573. }
  574. static inline
  575. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  576. bool force_free)
  577. {
  578. }
  579. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  580. {
  581. return QDF_STATUS_SUCCESS;
  582. }
  583. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  584. {
  585. return QDF_STATUS_SUCCESS;
  586. }
  587. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  588. {
  589. }
  590. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  591. #ifdef FEATURE_PERPKT_INFO
  592. QDF_STATUS
  593. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  594. struct dp_pdev *pdev,
  595. struct dp_peer *peer,
  596. struct hal_tx_completion_status *ts,
  597. qdf_nbuf_t netbuf,
  598. uint64_t time_latency);
  599. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  600. uint16_t peer_id, uint32_t ppdu_id,
  601. qdf_nbuf_t netbuf);
  602. #else
  603. static inline
  604. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  605. struct dp_pdev *pdev,
  606. struct dp_peer *peer,
  607. struct hal_tx_completion_status *ts,
  608. qdf_nbuf_t netbuf,
  609. uint64_t time_latency)
  610. {
  611. return QDF_STATUS_E_NOSUPPORT;
  612. }
  613. static inline
  614. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  615. uint16_t peer_id, uint32_t ppdu_id,
  616. qdf_nbuf_t netbuf)
  617. {
  618. }
  619. #endif
  620. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  621. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  622. struct dp_tx_desc_s *desc,
  623. struct hal_tx_completion_status *ts);
  624. #else
  625. static inline void
  626. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  627. struct dp_tx_desc_s *desc,
  628. struct hal_tx_completion_status *ts)
  629. {
  630. }
  631. #endif
  632. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  633. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  634. /**
  635. * dp_tx_update_stats() - Update soc level tx stats
  636. * @soc: DP soc handle
  637. * @nbuf: packet being transmitted
  638. *
  639. * Returns: none
  640. */
  641. void dp_tx_update_stats(struct dp_soc *soc,
  642. qdf_nbuf_t nbuf);
  643. /**
  644. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  645. * @soc: Datapath soc handle
  646. * @tx_desc: tx packet descriptor
  647. * @tid: TID for pkt transmission
  648. *
  649. * Returns: 1, if coalescing is to be done
  650. * 0, if coalescing is not to be done
  651. */
  652. int
  653. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  654. struct dp_tx_desc_s *tx_desc,
  655. uint8_t tid);
  656. /**
  657. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  658. * @soc: Datapath soc handle
  659. * @hal_ring_hdl: HAL ring handle
  660. * @coalesce: Coalesce the current write or not
  661. *
  662. * Returns: none
  663. */
  664. void
  665. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  666. int coalesce);
  667. #else
  668. /**
  669. * dp_tx_update_stats() - Update soc level tx stats
  670. * @soc: DP soc handle
  671. * @nbuf: packet being transmitted
  672. *
  673. * Returns: none
  674. */
  675. static inline void dp_tx_update_stats(struct dp_soc *soc,
  676. qdf_nbuf_t nbuf) { }
  677. static inline void
  678. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  679. int coalesce)
  680. {
  681. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  682. }
  683. static inline int
  684. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  685. struct dp_tx_desc_s *tx_desc,
  686. uint8_t tid)
  687. {
  688. return 0;
  689. }
  690. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  691. #ifdef FEATURE_RUNTIME_PM
  692. /**
  693. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  694. * @soc_hdl: DP soc handle
  695. * @is_high_tput: flag to indicate whether throughput is high
  696. *
  697. * Returns: none
  698. */
  699. static inline
  700. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  701. bool is_high_tput)
  702. {
  703. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  704. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  705. }
  706. void
  707. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  708. hal_ring_handle_t hal_ring_hdl,
  709. int coalesce);
  710. #else
  711. #ifdef DP_POWER_SAVE
  712. void
  713. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  714. hal_ring_handle_t hal_ring_hdl,
  715. int coalesce);
  716. #else
  717. static inline void
  718. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  719. hal_ring_handle_t hal_ring_hdl,
  720. int coalesce)
  721. {
  722. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  723. }
  724. #endif
  725. static inline void
  726. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  727. bool is_high_tput)
  728. { }
  729. #endif
  730. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  731. #ifdef DP_TX_HW_DESC_HISTORY
  732. static inline void
  733. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  734. hal_ring_handle_t hal_ring_hdl,
  735. struct dp_soc *soc)
  736. {
  737. struct dp_tx_hw_desc_evt *evt;
  738. uint64_t idx = 0;
  739. if (!soc->tx_hw_desc_history)
  740. return;
  741. idx = ++soc->tx_hw_desc_history->index;
  742. if (idx == DP_TX_HW_DESC_HIST_MAX)
  743. soc->tx_hw_desc_history->index = 0;
  744. idx = qdf_do_div_rem(idx, DP_TX_HW_DESC_HIST_MAX);
  745. evt = &soc->tx_hw_desc_history->entry[idx];
  746. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  747. evt->posted = qdf_get_log_timestamp();
  748. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  749. }
  750. #else
  751. static inline void
  752. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  753. hal_ring_handle_t hal_ring_hdl,
  754. struct dp_soc *soc)
  755. {
  756. }
  757. #endif
  758. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  759. /**
  760. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  761. * @soc_hdl: cdp soc pointer
  762. * @vdev_id: vdev id
  763. * @delta_tsf: difference between TSF clock and qtimer
  764. *
  765. * Return: None
  766. */
  767. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  768. uint32_t delta_tsf);
  769. /**
  770. * dp_set_tsf_report_ul_delay() - Enable or disable reporting uplink delay
  771. * @soc_hdl: cdp soc pointer
  772. * @vdev_id: vdev id
  773. * @enable: true to enable and false to disable
  774. *
  775. * Return: QDF_STATUS
  776. */
  777. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  778. uint8_t vdev_id, bool enable);
  779. /**
  780. * dp_get_uplink_delay() - Get uplink delay value
  781. * @soc_hdl: cdp soc pointer
  782. * @vdev_id: vdev id
  783. * @val: pointer to save uplink delay value
  784. *
  785. * Return: QDF_STATUS
  786. */
  787. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  788. uint32_t *val);
  789. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  790. /**
  791. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  792. *
  793. * Return: True if any tx pkt tracepoint is enabled else false
  794. */
  795. static inline
  796. bool dp_tx_pkt_tracepoints_enabled(void)
  797. {
  798. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  799. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  800. qdf_trace_dp_tx_comp_pkt_enabled());
  801. }
  802. #endif