dp_rx.h 44 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557
  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifndef RX_DATA_BUFFER_ALIGNMENT
  26. #define RX_DATA_BUFFER_ALIGNMENT 128
  27. #endif
  28. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  29. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  30. #endif
  31. #else /* RXDMA_OPTIMIZATION */
  32. #define RX_DATA_BUFFER_ALIGNMENT 4
  33. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  34. #endif /* RXDMA_OPTIMIZATION */
  35. #ifdef QCA_HOST2FW_RXBUF_RING
  36. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  37. /* RBM value used for re-injecting defragmented packets into REO */
  38. #define DP_DEFRAG_RBM HAL_RX_BUF_RBM_SW3_BM
  39. #else
  40. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  41. #define DP_DEFRAG_RBM DP_WBM2SW_RBM
  42. #endif /* QCA_HOST2FW_RXBUF_RING */
  43. #define RX_BUFFER_RESERVATION 0
  44. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  45. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  46. #define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
  47. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  48. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  49. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  50. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  51. #define DP_PEER_METADATA_VDEV_ID_GET(_peer_metadata) \
  52. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  53. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  54. #define DP_RX_DESC_MAGIC 0xdec0de
  55. /**
  56. * enum dp_rx_desc_state
  57. *
  58. * @RX_DESC_REPLENISH: rx desc replenished
  59. * @RX_DESC_FREELIST: rx desc in freelist
  60. */
  61. enum dp_rx_desc_state {
  62. RX_DESC_REPLENISHED,
  63. RX_DESC_IN_FREELIST,
  64. };
  65. /**
  66. * struct dp_rx_desc_dbg_info
  67. *
  68. * @freelist_caller: name of the function that put the
  69. * the rx desc in freelist
  70. * @freelist_ts: timestamp when the rx desc is put in
  71. * a freelist
  72. * @replenish_caller: name of the function that last
  73. * replenished the rx desc
  74. * @replenish_ts: last replenish timestamp
  75. */
  76. struct dp_rx_desc_dbg_info {
  77. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  78. uint64_t freelist_ts;
  79. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  80. uint64_t replenish_ts;
  81. };
  82. /**
  83. * struct dp_rx_desc
  84. *
  85. * @nbuf : VA of the "skb" posted
  86. * @rx_buf_start : VA of the original Rx buffer, before
  87. * movement of any skb->data pointer
  88. * @paddr_buf_start : PA of the original Rx buffer, before
  89. * movement of any frag pointer
  90. * @cookie : index into the sw array which holds
  91. * the sw Rx descriptors
  92. * Cookie space is 21 bits:
  93. * lower 18 bits -- index
  94. * upper 3 bits -- pool_id
  95. * @pool_id : pool Id for which this allocated.
  96. * Can only be used if there is no flow
  97. * steering
  98. * @in_use rx_desc is in use
  99. * @unmapped used to mark rx_desc an unmapped if the corresponding
  100. * nbuf is already unmapped
  101. * @in_err_state : Nbuf sanity failed for this descriptor.
  102. */
  103. struct dp_rx_desc {
  104. qdf_nbuf_t nbuf;
  105. uint8_t *rx_buf_start;
  106. qdf_dma_addr_t paddr_buf_start;
  107. uint32_t cookie;
  108. uint8_t pool_id;
  109. #ifdef RX_DESC_DEBUG_CHECK
  110. uint32_t magic;
  111. struct dp_rx_desc_dbg_info *dbg_info;
  112. #endif
  113. uint8_t in_use:1,
  114. unmapped:1,
  115. in_err_state:1;
  116. };
  117. /* RX Descriptor Multi Page memory alloc related */
  118. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  119. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  120. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  121. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  122. #define DP_RX_DESC_POOL_ID_SHIFT \
  123. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  124. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  125. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  126. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  127. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  128. DP_RX_DESC_PAGE_ID_SHIFT)
  129. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  130. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  131. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  132. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  133. DP_RX_DESC_POOL_ID_SHIFT)
  134. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  135. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  136. DP_RX_DESC_PAGE_ID_SHIFT)
  137. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  138. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  139. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  140. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  141. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  142. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  143. #define DP_RX_DESC_COOKIE_MAX \
  144. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  145. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  146. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  147. RX_DESC_COOKIE_POOL_ID_SHIFT)
  148. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  149. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  150. RX_DESC_COOKIE_INDEX_SHIFT)
  151. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  152. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  153. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  154. num_buffers, desc_list, tail) \
  155. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  156. num_buffers, desc_list, tail, __func__)
  157. #ifdef DP_RX_SPECIAL_FRAME_NEED
  158. /**
  159. * dp_rx_is_special_frame() - check is RX frame special needed
  160. *
  161. * @nbuf: RX skb pointer
  162. * @frame_mask: the mask for speical frame needed
  163. *
  164. * Check is RX frame wanted matched with mask
  165. *
  166. * Return: true - special frame needed, false - no
  167. */
  168. static inline
  169. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  170. {
  171. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  172. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  173. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  174. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  175. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  176. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  177. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  178. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  179. return true;
  180. return false;
  181. }
  182. /**
  183. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  184. * if matches mask
  185. *
  186. * @soc: Datapath soc handler
  187. * @peer: pointer to DP peer
  188. * @nbuf: pointer to the skb of RX frame
  189. * @frame_mask: the mask for speical frame needed
  190. * @rx_tlv_hdr: start of rx tlv header
  191. *
  192. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  193. * single nbuf is expected.
  194. *
  195. * return: true - nbuf has been delivered to stack, false - not.
  196. */
  197. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  198. qdf_nbuf_t nbuf, uint32_t frame_mask,
  199. uint8_t *rx_tlv_hdr);
  200. #else
  201. static inline
  202. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  203. {
  204. return false;
  205. }
  206. static inline
  207. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  208. qdf_nbuf_t nbuf, uint32_t frame_mask,
  209. uint8_t *rx_tlv_hdr)
  210. {
  211. return false;
  212. }
  213. #endif
  214. /* DOC: Offset to obtain LLC hdr
  215. *
  216. * In the case of Wifi parse error
  217. * to reach LLC header from beginning
  218. * of VLAN tag we need to skip 8 bytes.
  219. * Vlan_tag(4)+length(2)+length added
  220. * by HW(2) = 8 bytes.
  221. */
  222. #define DP_SKIP_VLAN 8
  223. /**
  224. * struct dp_rx_cached_buf - rx cached buffer
  225. * @list: linked list node
  226. * @buf: skb buffer
  227. */
  228. struct dp_rx_cached_buf {
  229. qdf_list_node_t node;
  230. qdf_nbuf_t buf;
  231. };
  232. /*
  233. *dp_rx_xor_block() - xor block of data
  234. *@b: destination data block
  235. *@a: source data block
  236. *@len: length of the data to process
  237. *
  238. *Returns: None
  239. */
  240. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  241. {
  242. qdf_size_t i;
  243. for (i = 0; i < len; i++)
  244. b[i] ^= a[i];
  245. }
  246. /*
  247. *dp_rx_rotl() - rotate the bits left
  248. *@val: unsigned integer input value
  249. *@bits: number of bits
  250. *
  251. *Returns: Integer with left rotated by number of 'bits'
  252. */
  253. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  254. {
  255. return (val << bits) | (val >> (32 - bits));
  256. }
  257. /*
  258. *dp_rx_rotr() - rotate the bits right
  259. *@val: unsigned integer input value
  260. *@bits: number of bits
  261. *
  262. *Returns: Integer with right rotated by number of 'bits'
  263. */
  264. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  265. {
  266. return (val >> bits) | (val << (32 - bits));
  267. }
  268. /*
  269. * dp_set_rx_queue() - set queue_mapping in skb
  270. * @nbuf: skb
  271. * @queue_id: rx queue_id
  272. *
  273. * Return: void
  274. */
  275. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  276. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  277. {
  278. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  279. return;
  280. }
  281. #else
  282. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  283. {
  284. }
  285. #endif
  286. /*
  287. *dp_rx_xswap() - swap the bits left
  288. *@val: unsigned integer input value
  289. *
  290. *Returns: Integer with bits swapped
  291. */
  292. static inline uint32_t dp_rx_xswap(uint32_t val)
  293. {
  294. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  295. }
  296. /*
  297. *dp_rx_get_le32_split() - get little endian 32 bits split
  298. *@b0: byte 0
  299. *@b1: byte 1
  300. *@b2: byte 2
  301. *@b3: byte 3
  302. *
  303. *Returns: Integer with split little endian 32 bits
  304. */
  305. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  306. uint8_t b3)
  307. {
  308. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  309. }
  310. /*
  311. *dp_rx_get_le32() - get little endian 32 bits
  312. *@b0: byte 0
  313. *@b1: byte 1
  314. *@b2: byte 2
  315. *@b3: byte 3
  316. *
  317. *Returns: Integer with little endian 32 bits
  318. */
  319. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  320. {
  321. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  322. }
  323. /*
  324. * dp_rx_put_le32() - put little endian 32 bits
  325. * @p: destination char array
  326. * @v: source 32-bit integer
  327. *
  328. * Returns: None
  329. */
  330. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  331. {
  332. p[0] = (v) & 0xff;
  333. p[1] = (v >> 8) & 0xff;
  334. p[2] = (v >> 16) & 0xff;
  335. p[3] = (v >> 24) & 0xff;
  336. }
  337. /* Extract michal mic block of data */
  338. #define dp_rx_michael_block(l, r) \
  339. do { \
  340. r ^= dp_rx_rotl(l, 17); \
  341. l += r; \
  342. r ^= dp_rx_xswap(l); \
  343. l += r; \
  344. r ^= dp_rx_rotl(l, 3); \
  345. l += r; \
  346. r ^= dp_rx_rotr(l, 2); \
  347. l += r; \
  348. } while (0)
  349. /**
  350. * struct dp_rx_desc_list_elem_t
  351. *
  352. * @next : Next pointer to form free list
  353. * @rx_desc : DP Rx descriptor
  354. */
  355. union dp_rx_desc_list_elem_t {
  356. union dp_rx_desc_list_elem_t *next;
  357. struct dp_rx_desc rx_desc;
  358. };
  359. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  360. /**
  361. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  362. * @page_id: Page ID
  363. * @offset: Offset of the descriptor element
  364. *
  365. * Return: RX descriptor element
  366. */
  367. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  368. struct rx_desc_pool *rx_pool);
  369. static inline
  370. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  371. struct rx_desc_pool *pool,
  372. uint32_t cookie)
  373. {
  374. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  375. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  376. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  377. struct rx_desc_pool *rx_desc_pool;
  378. union dp_rx_desc_list_elem_t *rx_desc_elem;
  379. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  380. return NULL;
  381. rx_desc_pool = &pool[pool_id];
  382. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  383. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  384. rx_desc_pool->elem_size * offset);
  385. return &rx_desc_elem->rx_desc;
  386. }
  387. /**
  388. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  389. * the Rx descriptor on Rx DMA source ring buffer
  390. * @soc: core txrx main context
  391. * @cookie: cookie used to lookup virtual address
  392. *
  393. * Return: Pointer to the Rx descriptor
  394. */
  395. static inline
  396. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  397. uint32_t cookie)
  398. {
  399. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  400. }
  401. /**
  402. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  403. * the Rx descriptor on monitor ring buffer
  404. * @soc: core txrx main context
  405. * @cookie: cookie used to lookup virtual address
  406. *
  407. * Return: Pointer to the Rx descriptor
  408. */
  409. static inline
  410. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  411. uint32_t cookie)
  412. {
  413. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  414. }
  415. /**
  416. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  417. * the Rx descriptor on monitor status ring buffer
  418. * @soc: core txrx main context
  419. * @cookie: cookie used to lookup virtual address
  420. *
  421. * Return: Pointer to the Rx descriptor
  422. */
  423. static inline
  424. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  425. uint32_t cookie)
  426. {
  427. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  428. }
  429. #else
  430. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  431. uint32_t pool_size,
  432. struct rx_desc_pool *rx_desc_pool);
  433. /**
  434. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  435. * the Rx descriptor on Rx DMA source ring buffer
  436. * @soc: core txrx main context
  437. * @cookie: cookie used to lookup virtual address
  438. *
  439. * Return: void *: Virtual Address of the Rx descriptor
  440. */
  441. static inline
  442. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  443. {
  444. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  445. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  446. struct rx_desc_pool *rx_desc_pool;
  447. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  448. return NULL;
  449. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  450. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  451. return NULL;
  452. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  453. }
  454. /**
  455. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  456. * the Rx descriptor on monitor ring buffer
  457. * @soc: core txrx main context
  458. * @cookie: cookie used to lookup virtual address
  459. *
  460. * Return: void *: Virtual Address of the Rx descriptor
  461. */
  462. static inline
  463. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  464. {
  465. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  466. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  467. /* TODO */
  468. /* Add sanity for pool_id & index */
  469. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  470. }
  471. /**
  472. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  473. * the Rx descriptor on monitor status ring buffer
  474. * @soc: core txrx main context
  475. * @cookie: cookie used to lookup virtual address
  476. *
  477. * Return: void *: Virtual Address of the Rx descriptor
  478. */
  479. static inline
  480. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  481. {
  482. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  483. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  484. /* TODO */
  485. /* Add sanity for pool_id & index */
  486. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  487. }
  488. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  489. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  490. static inline QDF_STATUS
  491. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  492. {
  493. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  494. return QDF_STATUS_E_FAILURE;
  495. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  496. return QDF_STATUS_SUCCESS;
  497. }
  498. #else
  499. static inline QDF_STATUS
  500. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  501. {
  502. return QDF_STATUS_SUCCESS;
  503. }
  504. #endif
  505. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  506. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  507. uint32_t pool_size,
  508. struct rx_desc_pool *rx_desc_pool);
  509. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  510. uint32_t pool_size,
  511. struct rx_desc_pool *rx_desc_pool);
  512. void dp_rx_pdev_mon_buf_buffers_free(struct dp_pdev *pdev, uint32_t mac_id);
  513. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  514. union dp_rx_desc_list_elem_t **local_desc_list,
  515. union dp_rx_desc_list_elem_t **tail,
  516. uint16_t pool_id,
  517. struct rx_desc_pool *rx_desc_pool);
  518. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  519. struct rx_desc_pool *rx_desc_pool,
  520. uint16_t num_descs,
  521. union dp_rx_desc_list_elem_t **desc_list,
  522. union dp_rx_desc_list_elem_t **tail);
  523. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  524. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  525. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  526. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  527. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  528. struct rx_desc_pool *rx_desc_pool);
  529. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  530. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  531. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  532. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  533. void dp_print_napi_stats(struct dp_soc *soc);
  534. /**
  535. * dp_rx_vdev_detach() - detach vdev from dp rx
  536. * @vdev: virtual device instance
  537. *
  538. * Return: QDF_STATUS_SUCCESS: success
  539. * QDF_STATUS_E_RESOURCES: Error return
  540. */
  541. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  542. uint32_t
  543. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  544. uint8_t reo_ring_num,
  545. uint32_t quota);
  546. /**
  547. * dp_rx_err_process() - Processes error frames routed to REO error ring
  548. * @int_ctx: pointer to DP interrupt context
  549. * @soc: core txrx main context
  550. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  551. * @quota: No. of units (packets) that can be serviced in one shot.
  552. *
  553. * This function implements error processing and top level demultiplexer
  554. * for all the frames routed to REO error ring.
  555. *
  556. * Return: uint32_t: No. of elements processed
  557. */
  558. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  559. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  560. /**
  561. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  562. * @int_ctx: pointer to DP interrupt context
  563. * @soc: core txrx main context
  564. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  565. * @quota: No. of units (packets) that can be serviced in one shot.
  566. *
  567. * This function implements error processing and top level demultiplexer
  568. * for all the frames routed to WBM2HOST sw release ring.
  569. *
  570. * Return: uint32_t: No. of elements processed
  571. */
  572. uint32_t
  573. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  574. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  575. /**
  576. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  577. * multiple nbufs.
  578. * @nbuf: pointer to the first msdu of an amsdu.
  579. *
  580. * This function implements the creation of RX frag_list for cases
  581. * where an MSDU is spread across multiple nbufs.
  582. *
  583. * Return: returns the head nbuf which contains complete frag_list.
  584. */
  585. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf);
  586. /*
  587. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  588. * de-initialization of wifi module.
  589. *
  590. * @soc: core txrx main context
  591. * @pool_id: pool_id which is one of 3 mac_ids
  592. * @rx_desc_pool: rx descriptor pool pointer
  593. *
  594. * Return: None
  595. */
  596. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  597. struct rx_desc_pool *rx_desc_pool);
  598. /*
  599. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  600. * de-initialization of wifi module.
  601. *
  602. * @soc: core txrx main context
  603. * @pool_id: pool_id which is one of 3 mac_ids
  604. * @rx_desc_pool: rx descriptor pool pointer
  605. *
  606. * Return: None
  607. */
  608. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  609. struct rx_desc_pool *rx_desc_pool);
  610. #ifdef DP_RX_MON_MEM_FRAG
  611. /*
  612. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  613. * de-initialization of wifi module.
  614. *
  615. * @soc: core txrx main context
  616. * @rx_desc_pool: rx descriptor pool pointer
  617. *
  618. * Return: None
  619. */
  620. void dp_rx_desc_frag_free(struct dp_soc *soc,
  621. struct rx_desc_pool *rx_desc_pool);
  622. #else
  623. static inline
  624. void dp_rx_desc_frag_free(struct dp_soc *soc,
  625. struct rx_desc_pool *rx_desc_pool)
  626. {
  627. }
  628. #endif
  629. /*
  630. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  631. * de-initialization of wifi module.
  632. *
  633. * @soc: core txrx main context
  634. * @rx_desc_pool: rx descriptor pool pointer
  635. *
  636. * Return: None
  637. */
  638. void dp_rx_desc_pool_free(struct dp_soc *soc,
  639. struct rx_desc_pool *rx_desc_pool);
  640. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  641. struct dp_peer *peer);
  642. #ifdef RX_DESC_DEBUG_CHECK
  643. /**
  644. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  645. * @rx_desc: rx descriptor
  646. * @ring_paddr: paddr obatined from the ring
  647. *
  648. * Returns: QDF_STATUS
  649. */
  650. static inline
  651. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  652. uint64_t ring_paddr)
  653. {
  654. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  655. }
  656. /*
  657. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  658. * structure
  659. * @rx_desc: rx descriptor pointer
  660. *
  661. * Return: None
  662. */
  663. static inline
  664. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  665. {
  666. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  667. }
  668. /*
  669. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  670. * structure memory
  671. * @rx_desc: rx descriptor pointer
  672. *
  673. * Return: None
  674. */
  675. static inline
  676. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  677. {
  678. qdf_mem_free(rx_desc->dbg_info);
  679. }
  680. /*
  681. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  682. * structure memory
  683. * @rx_desc: rx descriptor pointer
  684. *
  685. * Return: None
  686. */
  687. static
  688. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  689. const char *func_name, uint8_t flag)
  690. {
  691. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  692. if (!info)
  693. return;
  694. if (flag == RX_DESC_REPLENISHED) {
  695. qdf_str_lcopy(info->replenish_caller, func_name,
  696. QDF_MEM_FUNC_NAME_SIZE);
  697. info->replenish_ts = qdf_get_log_timestamp();
  698. } else {
  699. qdf_str_lcopy(info->freelist_caller, func_name,
  700. QDF_MEM_FUNC_NAME_SIZE);
  701. info->freelist_ts = qdf_get_log_timestamp();
  702. }
  703. }
  704. #else
  705. static inline
  706. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  707. uint64_t ring_paddr)
  708. {
  709. return true;
  710. }
  711. static inline
  712. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  713. {
  714. }
  715. static inline
  716. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  717. {
  718. }
  719. static inline
  720. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  721. const char *func_name, uint8_t flag)
  722. {
  723. }
  724. #endif /* RX_DESC_DEBUG_CHECK */
  725. /**
  726. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  727. *
  728. * @head: pointer to the head of local free list
  729. * @tail: pointer to the tail of local free list
  730. * @new: new descriptor that is added to the free list
  731. * @func_name: caller func name
  732. *
  733. * Return: void:
  734. */
  735. static inline
  736. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  737. union dp_rx_desc_list_elem_t **tail,
  738. struct dp_rx_desc *new, const char *func_name)
  739. {
  740. qdf_assert(head && new);
  741. new->nbuf = NULL;
  742. new->in_use = 0;
  743. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  744. *head = (union dp_rx_desc_list_elem_t *)new;
  745. /* reset tail if head->next is NULL */
  746. if (!*tail || !(*head)->next)
  747. *tail = *head;
  748. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  749. }
  750. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  751. uint8_t mac_id);
  752. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  753. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  754. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  755. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  756. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  757. uint16_t peer_id, uint8_t tid);
  758. #define DP_RX_HEAD_APPEND(head, elem) \
  759. do { \
  760. qdf_nbuf_set_next((elem), (head)); \
  761. (head) = (elem); \
  762. } while (0)
  763. #define DP_RX_LIST_APPEND(head, tail, elem) \
  764. do { \
  765. if (!(head)) { \
  766. (head) = (elem); \
  767. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  768. } else { \
  769. qdf_nbuf_set_next((tail), (elem)); \
  770. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  771. } \
  772. (tail) = (elem); \
  773. qdf_nbuf_set_next((tail), NULL); \
  774. } while (0)
  775. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  776. do { \
  777. if (!(phead)) { \
  778. (phead) = (chead); \
  779. } else { \
  780. qdf_nbuf_set_next((ptail), (chead)); \
  781. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  782. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  783. } \
  784. (ptail) = (ctail); \
  785. qdf_nbuf_set_next((ptail), NULL); \
  786. } while (0)
  787. /*for qcn9000 emulation the pcie is complete phy and no address restrictions*/
  788. #if !defined(BUILD_X86) || defined(QCA_WIFI_QCN9000)
  789. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  790. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  791. {
  792. return QDF_STATUS_SUCCESS;
  793. }
  794. #else
  795. #define MAX_RETRY 100
  796. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  797. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  798. {
  799. uint32_t nbuf_retry = 0;
  800. int32_t ret;
  801. const uint32_t x86_phy_addr = 0x50000000;
  802. /*
  803. * in M2M emulation platforms (x86) the memory below 0x50000000
  804. * is reserved for target use, so any memory allocated in this
  805. * region should not be used by host
  806. */
  807. do {
  808. if (qdf_likely(*paddr > x86_phy_addr))
  809. return QDF_STATUS_SUCCESS;
  810. else {
  811. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  812. "phy addr %pK exceeded 0x50000000 trying again",
  813. paddr);
  814. nbuf_retry++;
  815. if ((*rx_netbuf)) {
  816. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  817. QDF_DMA_FROM_DEVICE);
  818. /* Not freeing buffer intentionally.
  819. * Observed that same buffer is getting
  820. * re-allocated resulting in longer load time
  821. * WMI init timeout.
  822. * This buffer is anyway not useful so skip it.
  823. **/
  824. }
  825. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  826. rx_desc_pool->buf_size,
  827. RX_BUFFER_RESERVATION,
  828. rx_desc_pool->buf_alignment,
  829. FALSE);
  830. if (qdf_unlikely(!(*rx_netbuf)))
  831. return QDF_STATUS_E_FAILURE;
  832. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  833. QDF_DMA_FROM_DEVICE);
  834. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  835. qdf_nbuf_free(*rx_netbuf);
  836. *rx_netbuf = NULL;
  837. continue;
  838. }
  839. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  840. }
  841. } while (nbuf_retry < MAX_RETRY);
  842. if ((*rx_netbuf)) {
  843. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  844. QDF_DMA_FROM_DEVICE);
  845. qdf_nbuf_free(*rx_netbuf);
  846. }
  847. return QDF_STATUS_E_FAILURE;
  848. }
  849. #endif
  850. /**
  851. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  852. * the MSDU Link Descriptor
  853. * @soc: core txrx main context
  854. * @buf_info: buf_info includes cookie that is used to lookup
  855. * virtual address of link descriptor after deriving the page id
  856. * and the offset or index of the desc on the associatde page.
  857. *
  858. * This is the VA of the link descriptor, that HAL layer later uses to
  859. * retrieve the list of MSDU's for a given MPDU.
  860. *
  861. * Return: void *: Virtual Address of the Rx descriptor
  862. */
  863. static inline
  864. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  865. struct hal_buf_info *buf_info)
  866. {
  867. void *link_desc_va;
  868. struct qdf_mem_multi_page_t *pages;
  869. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  870. pages = &soc->link_desc_pages;
  871. if (!pages)
  872. return NULL;
  873. if (qdf_unlikely(page_id >= pages->num_pages))
  874. return NULL;
  875. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  876. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  877. return link_desc_va;
  878. }
  879. /**
  880. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  881. * the MSDU Link Descriptor
  882. * @pdev: core txrx pdev context
  883. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  884. * link descriptor. Normally this is just an index into a per pdev array.
  885. *
  886. * This is the VA of the link descriptor in monitor mode destination ring,
  887. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  888. *
  889. * Return: void *: Virtual Address of the Rx descriptor
  890. */
  891. static inline
  892. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  893. struct hal_buf_info *buf_info,
  894. int mac_id)
  895. {
  896. void *link_desc_va;
  897. struct qdf_mem_multi_page_t *pages;
  898. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  899. pages = &pdev->soc->mon_link_desc_pages[mac_id];
  900. if (!pages)
  901. return NULL;
  902. if (qdf_unlikely(page_id >= pages->num_pages))
  903. return NULL;
  904. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  905. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  906. return link_desc_va;
  907. }
  908. /**
  909. * dp_rx_defrag_concat() - Concatenate the fragments
  910. *
  911. * @dst: destination pointer to the buffer
  912. * @src: source pointer from where the fragment payload is to be copied
  913. *
  914. * Return: QDF_STATUS
  915. */
  916. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  917. {
  918. /*
  919. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  920. * to provide space for src, the headroom portion is copied from
  921. * the original dst buffer to the larger new dst buffer.
  922. * (This is needed, because the headroom of the dst buffer
  923. * contains the rx desc.)
  924. */
  925. if (!qdf_nbuf_cat(dst, src)) {
  926. /*
  927. * qdf_nbuf_cat does not free the src memory.
  928. * Free src nbuf before returning
  929. * For failure case the caller takes of freeing the nbuf
  930. */
  931. qdf_nbuf_free(src);
  932. return QDF_STATUS_SUCCESS;
  933. }
  934. return QDF_STATUS_E_DEFRAG_ERROR;
  935. }
  936. #ifndef FEATURE_WDS
  937. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  938. {
  939. return QDF_STATUS_SUCCESS;
  940. }
  941. static inline void
  942. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  943. uint8_t *rx_tlv_hdr,
  944. struct dp_peer *ta_peer,
  945. qdf_nbuf_t nbuf,
  946. struct hal_rx_msdu_metadata msdu_metadata)
  947. {
  948. }
  949. #endif
  950. /*
  951. * dp_rx_desc_dump() - dump the sw rx descriptor
  952. *
  953. * @rx_desc: sw rx descriptor
  954. */
  955. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  956. {
  957. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  958. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  959. rx_desc->in_use, rx_desc->unmapped);
  960. }
  961. /*
  962. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  963. * In qwrap mode, packets originated from
  964. * any vdev should not loopback and
  965. * should be dropped.
  966. * @vdev: vdev on which rx packet is received
  967. * @nbuf: rx pkt
  968. *
  969. */
  970. #if ATH_SUPPORT_WRAP
  971. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  972. qdf_nbuf_t nbuf)
  973. {
  974. struct dp_vdev *psta_vdev;
  975. struct dp_pdev *pdev = vdev->pdev;
  976. uint8_t *data = qdf_nbuf_data(nbuf);
  977. if (qdf_unlikely(vdev->proxysta_vdev)) {
  978. /* In qwrap isolation mode, allow loopback packets as all
  979. * packets go to RootAP and Loopback on the mpsta.
  980. */
  981. if (vdev->isolation_vdev)
  982. return false;
  983. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  984. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  985. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  986. &data[QDF_MAC_ADDR_SIZE],
  987. QDF_MAC_ADDR_SIZE))) {
  988. /* Drop packet if source address is equal to
  989. * any of the vdev addresses.
  990. */
  991. return true;
  992. }
  993. }
  994. }
  995. return false;
  996. }
  997. #else
  998. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  999. qdf_nbuf_t nbuf)
  1000. {
  1001. return false;
  1002. }
  1003. #endif
  1004. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1005. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1006. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1007. #include "dp_rx_tag.h"
  1008. #endif
  1009. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1010. /**
  1011. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1012. * and set the corresponding tag in QDF packet
  1013. * @soc: core txrx main context
  1014. * @vdev: vdev on which the packet is received
  1015. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1016. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1017. * @ring_index: REO ring number, not used for error & monitor ring
  1018. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1019. * @is_update_stats: flag to indicate whether to update stats or not
  1020. * Return: void
  1021. */
  1022. static inline void
  1023. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1024. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1025. uint16_t ring_index,
  1026. bool is_reo_exception, bool is_update_stats)
  1027. {
  1028. }
  1029. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1030. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1031. /**
  1032. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1033. * and set the corresponding tag in QDF packet
  1034. * @soc: core txrx main context
  1035. * @vdev: vdev on which the packet is received
  1036. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1037. * @rx_tlv_hdr: base address where the RX TLVs starts
  1038. * @is_update_stats: flag to indicate whether to update stats or not
  1039. *
  1040. * Return: void
  1041. */
  1042. static inline void
  1043. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1044. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1045. {
  1046. }
  1047. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1048. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1049. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1050. /**
  1051. * dp_rx_mon_update_protocol_flow_tag() - Performs necessary checks for monitor
  1052. * mode and then tags appropriate packets
  1053. * @soc: core txrx main context
  1054. * @vdev: pdev on which packet is received
  1055. * @msdu: QDF packet buffer on which the protocol tag should be set
  1056. * @rx_desc: base address where the RX TLVs start
  1057. * Return: void
  1058. */
  1059. static inline
  1060. void dp_rx_mon_update_protocol_flow_tag(struct dp_soc *soc,
  1061. struct dp_pdev *dp_pdev,
  1062. qdf_nbuf_t msdu, void *rx_desc)
  1063. {
  1064. }
  1065. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG || WLAN_SUPPORT_RX_FLOW_TAG */
  1066. /*
  1067. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1068. * called during dp rx initialization
  1069. * and at the end of dp_rx_process.
  1070. *
  1071. * @soc: core txrx main context
  1072. * @mac_id: mac_id which is one of 3 mac_ids
  1073. * @dp_rxdma_srng: dp rxdma circular ring
  1074. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1075. * @num_req_buffers: number of buffer to be replenished
  1076. * @desc_list: list of descs if called from dp_rx_process
  1077. * or NULL during dp rx initialization or out of buffer
  1078. * interrupt.
  1079. * @tail: tail of descs list
  1080. * @func_name: name of the caller function
  1081. * Return: return success or failure
  1082. */
  1083. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1084. struct dp_srng *dp_rxdma_srng,
  1085. struct rx_desc_pool *rx_desc_pool,
  1086. uint32_t num_req_buffers,
  1087. union dp_rx_desc_list_elem_t **desc_list,
  1088. union dp_rx_desc_list_elem_t **tail,
  1089. const char *func_name);
  1090. /*
  1091. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1092. * called during dp rx initialization
  1093. *
  1094. * @soc: core txrx main context
  1095. * @mac_id: mac_id which is one of 3 mac_ids
  1096. * @dp_rxdma_srng: dp rxdma circular ring
  1097. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1098. * @num_req_buffers: number of buffer to be replenished
  1099. *
  1100. * Return: return success or failure
  1101. */
  1102. QDF_STATUS
  1103. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1104. struct dp_srng *dp_rxdma_srng,
  1105. struct rx_desc_pool *rx_desc_pool,
  1106. uint32_t num_req_buffers);
  1107. /**
  1108. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1109. * (WBM), following error handling
  1110. *
  1111. * @soc: core DP main context
  1112. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1113. * @buf_addr_info: void pointer to the buffer_addr_info
  1114. * @bm_action: put to idle_list or release to msdu_list
  1115. *
  1116. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1117. */
  1118. QDF_STATUS
  1119. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1120. uint8_t bm_action);
  1121. /**
  1122. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1123. * (WBM) by address
  1124. *
  1125. * @soc: core DP main context
  1126. * @link_desc_addr: link descriptor addr
  1127. *
  1128. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1129. */
  1130. QDF_STATUS
  1131. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1132. hal_buff_addrinfo_t link_desc_addr,
  1133. uint8_t bm_action);
  1134. /**
  1135. * dp_rxdma_err_process() - RxDMA error processing functionality
  1136. * @soc: core txrx main contex
  1137. * @mac_id: mac id which is one of 3 mac_ids
  1138. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1139. * @quota: No. of units (packets) that can be serviced in one shot.
  1140. *
  1141. * Return: num of buffers processed
  1142. */
  1143. uint32_t
  1144. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1145. uint32_t mac_id, uint32_t quota);
  1146. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1147. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1148. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1149. uint8_t *rx_tlv_hdr);
  1150. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1151. struct dp_peer *peer);
  1152. /*
  1153. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1154. *
  1155. * @soc: core txrx main context
  1156. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1157. * @ring_desc: opaque pointer to the RX ring descriptor
  1158. * @rx_desc: host rx descriptor
  1159. *
  1160. * Return: void
  1161. */
  1162. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1163. hal_ring_handle_t hal_ring_hdl,
  1164. hal_ring_desc_t ring_desc,
  1165. struct dp_rx_desc *rx_desc);
  1166. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1167. #ifdef QCA_PEER_EXT_STATS
  1168. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1169. qdf_nbuf_t nbuf);
  1170. #endif /* QCA_PEER_EXT_STATS */
  1171. #ifdef RX_DESC_DEBUG_CHECK
  1172. /**
  1173. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1174. * @rx_desc: rx descriptor pointer
  1175. *
  1176. * Return: true, if magic is correct, else false.
  1177. */
  1178. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1179. {
  1180. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1181. return false;
  1182. rx_desc->magic = 0;
  1183. return true;
  1184. }
  1185. /**
  1186. * dp_rx_desc_prep() - prepare rx desc
  1187. * @rx_desc: rx descriptor pointer to be prepared
  1188. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1189. *
  1190. * Note: assumption is that we are associating a nbuf which is mapped
  1191. *
  1192. * Return: none
  1193. */
  1194. static inline
  1195. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1196. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1197. {
  1198. rx_desc->magic = DP_RX_DESC_MAGIC;
  1199. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1200. rx_desc->unmapped = 0;
  1201. }
  1202. /**
  1203. * dp_rx_desc_frag_prep() - prepare rx desc
  1204. * @rx_desc: rx descriptor pointer to be prepared
  1205. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1206. *
  1207. * Note: assumption is that we frag address is mapped
  1208. *
  1209. * Return: none
  1210. */
  1211. #ifdef DP_RX_MON_MEM_FRAG
  1212. static inline
  1213. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1214. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1215. {
  1216. rx_desc->magic = DP_RX_DESC_MAGIC;
  1217. rx_desc->rx_buf_start =
  1218. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1219. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1220. rx_desc->unmapped = 0;
  1221. }
  1222. #else
  1223. static inline
  1224. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1225. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1226. {
  1227. }
  1228. #endif /* DP_RX_MON_MEM_FRAG */
  1229. #else
  1230. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1231. {
  1232. return true;
  1233. }
  1234. static inline
  1235. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1236. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1237. {
  1238. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1239. rx_desc->unmapped = 0;
  1240. }
  1241. #ifdef DP_RX_MON_MEM_FRAG
  1242. static inline
  1243. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1244. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1245. {
  1246. rx_desc->rx_buf_start =
  1247. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1248. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1249. rx_desc->unmapped = 0;
  1250. }
  1251. #else
  1252. static inline
  1253. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1254. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1255. {
  1256. }
  1257. #endif /* DP_RX_MON_MEM_FRAG */
  1258. #endif /* RX_DESC_DEBUG_CHECK */
  1259. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1260. bool is_mon_dest_desc);
  1261. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1262. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1263. uint8_t err_code, uint8_t mac_id);
  1264. #ifndef QCA_MULTIPASS_SUPPORT
  1265. static inline
  1266. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1267. {
  1268. return false;
  1269. }
  1270. #else
  1271. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1272. uint8_t tid);
  1273. #endif
  1274. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1275. static inline
  1276. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1277. struct dp_peer *peer_handle,
  1278. bool value, uint8_t *mac_addr)
  1279. {
  1280. return QDF_STATUS_SUCCESS;
  1281. }
  1282. #endif
  1283. /**
  1284. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1285. * Caller to hold peer refcount and check for valid peer
  1286. * @soc: soc
  1287. * @vdev: vdev
  1288. * @peer: peer
  1289. * @nbuf_head: skb list head
  1290. * @nbuf_tail: skb list tail
  1291. *
  1292. * Return: None
  1293. */
  1294. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1295. struct dp_vdev *vdev,
  1296. struct dp_peer *peer,
  1297. qdf_nbuf_t nbuf_head,
  1298. qdf_nbuf_t nbuf_tail);
  1299. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1300. /*
  1301. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1302. * @int_ctx: pointer to DP interrupt context
  1303. * @dp_soc - DP soc structure pointer
  1304. * @hal_ring_hdl - HAL ring handle
  1305. *
  1306. * Return: 0 on success; error on failure
  1307. */
  1308. static inline int
  1309. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1310. hal_ring_handle_t hal_ring_hdl)
  1311. {
  1312. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1313. }
  1314. /*
  1315. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1316. * @int_ctx: pointer to DP interrupt context
  1317. * @dp_soc - DP soc structure pointer
  1318. * @hal_ring_hdl - HAL ring handle
  1319. *
  1320. * Return - None
  1321. */
  1322. static inline void
  1323. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1324. hal_ring_handle_t hal_ring_hdl)
  1325. {
  1326. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1327. }
  1328. #else
  1329. static inline int
  1330. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1331. hal_ring_handle_t hal_ring_hdl)
  1332. {
  1333. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1334. }
  1335. static inline void
  1336. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1337. hal_ring_handle_t hal_ring_hdl)
  1338. {
  1339. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1340. }
  1341. #endif
  1342. /*
  1343. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1344. *
  1345. * This api should be called at soc init and afterevery sg processing.
  1346. *@soc: DP SOC handle
  1347. */
  1348. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1349. {
  1350. if (soc) {
  1351. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1352. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1353. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1354. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1355. }
  1356. }
  1357. /*
  1358. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1359. *
  1360. * This api should be called in down path, to avoid any leak.
  1361. *@soc: DP SOC handle
  1362. */
  1363. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1364. {
  1365. if (soc) {
  1366. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1367. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1368. dp_rx_wbm_sg_list_reset(soc);
  1369. }
  1370. }
  1371. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1372. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1373. do { \
  1374. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1375. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1376. break; \
  1377. } \
  1378. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1379. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1380. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1381. rx_desc->pool_id)) \
  1382. DP_RX_MERGE_TWO_LIST(head, tail, \
  1383. ebuf_head, ebuf_tail);\
  1384. ebuf_head = NULL; \
  1385. ebuf_tail = NULL; \
  1386. } \
  1387. } while (0)
  1388. #else
  1389. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1390. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1391. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1392. /*
  1393. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1394. to refill
  1395. * @soc: DP SOC handle
  1396. * @buf_info: the last link desc buf info
  1397. * @ring_buf_info: current buf address pointor including link desc
  1398. *
  1399. * return: none.
  1400. */
  1401. void dp_rx_link_desc_refill_duplicate_check(
  1402. struct dp_soc *soc,
  1403. struct hal_buf_info *buf_info,
  1404. hal_buff_addrinfo_t ring_buf_info);
  1405. #endif /* _DP_RX_H */