msm_drv.c 57 KB

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  1. /*
  2. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (C) 2013 Red Hat
  5. * Author: Rob Clark <[email protected]>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. /*
  20. * Copyright (c) 2016 Intel Corporation
  21. *
  22. * Permission to use, copy, modify, distribute, and sell this software and its
  23. * documentation for any purpose is hereby granted without fee, provided that
  24. * the above copyright notice appear in all copies and that both that copyright
  25. * notice and this permission notice appear in supporting documentation, and
  26. * that the name of the copyright holders not be used in advertising or
  27. * publicity pertaining to distribution of the software without specific,
  28. * written prior permission. The copyright holders make no representations
  29. * about the suitability of this software for any purpose. It is provided "as
  30. * is" without express or implied warranty.
  31. *
  32. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  33. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  34. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  35. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  36. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  37. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  38. * OF THIS SOFTWARE.
  39. */
  40. #include <linux/of_address.h>
  41. #include <linux/kthread.h>
  42. #include <uapi/linux/sched/types.h>
  43. #include <drm/drm_of.h>
  44. #include <drm/drm_ioctl.h>
  45. #include <drm/drm_vblank.h>
  46. #include <drm/drm_drv.h>
  47. #include <drm/drm_auth.h>
  48. #include <drm/drm_probe_helper.h>
  49. #include <linux/version.h>
  50. #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0))
  51. #include <drm/drm_irq.h>
  52. #endif
  53. #include "msm_drv.h"
  54. #include "msm_gem.h"
  55. #include "msm_kms.h"
  56. #include "msm_mmu.h"
  57. #include "sde_wb.h"
  58. #include "sde_dbg.h"
  59. /*
  60. * MSM driver version:
  61. * - 1.0.0 - initial interface
  62. * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
  63. * - 1.2.0 - adds explicit fence support for submit ioctl
  64. * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
  65. * SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
  66. * MSM_GEM_INFO ioctl.
  67. * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
  68. * GEM object's debug name
  69. */
  70. #define MSM_VERSION_MAJOR 1
  71. #define MSM_VERSION_MINOR 4
  72. #define MSM_VERSION_PATCHLEVEL 0
  73. #define LASTCLOSE_TIMEOUT_MS 500
  74. #define msm_wait_event_timeout(waitq, cond, timeout_ms, ret) \
  75. do { \
  76. ktime_t cur_ktime; \
  77. ktime_t exp_ktime; \
  78. s64 wait_time_jiffies = msecs_to_jiffies(timeout_ms); \
  79. \
  80. exp_ktime = ktime_add_ms(ktime_get(), timeout_ms); \
  81. do { \
  82. ret = wait_event_timeout(waitq, cond, \
  83. wait_time_jiffies); \
  84. cur_ktime = ktime_get(); \
  85. } while ((!cond) && (ret == 0) && \
  86. (ktime_compare_safe(exp_ktime, cur_ktime) > 0));\
  87. } while (0)
  88. static DEFINE_MUTEX(msm_release_lock);
  89. static void msm_fb_output_poll_changed(struct drm_device *dev)
  90. {
  91. struct msm_drm_private *priv = NULL;
  92. if (!dev) {
  93. DRM_ERROR("output_poll_changed failed, invalid input\n");
  94. return;
  95. }
  96. priv = dev->dev_private;
  97. if (priv->fbdev)
  98. drm_fb_helper_hotplug_event(priv->fbdev);
  99. }
  100. static void msm_drm_display_thread_priority_worker(struct kthread_work *work)
  101. {
  102. int ret = 0;
  103. struct sched_param param = { 0 };
  104. struct task_struct *task = current->group_leader;
  105. /**
  106. * this priority was found during empiric testing to have appropriate
  107. * realtime scheduling to process display updates and interact with
  108. * other real time and normal priority task
  109. */
  110. param.sched_priority = 16;
  111. ret = sched_setscheduler(task, SCHED_FIFO, &param);
  112. if (ret)
  113. pr_warn("pid:%d name:%s priority update failed: %d\n",
  114. current->tgid, task->comm, ret);
  115. }
  116. /**
  117. * msm_atomic_helper_check - validate state object
  118. * @dev: DRM device
  119. * @state: the driver state object
  120. *
  121. * This is a wrapper for the drm_atomic_helper_check to check the modeset
  122. * and state checking for planes. Additionally it checks if any secure
  123. * transition(moving CRTC and planes between secure and non-secure states and
  124. * vice versa) is allowed or not. When going to secure state, planes
  125. * with fb_mode as dir translated only can be staged on the CRTC, and only one
  126. * CRTC should be active.
  127. * Also mixing of secure and non-secure is not allowed.
  128. *
  129. * RETURNS
  130. * Zero for success or -errorno.
  131. */
  132. int msm_atomic_check(struct drm_device *dev,
  133. struct drm_atomic_state *state)
  134. {
  135. struct msm_drm_private *priv;
  136. priv = dev->dev_private;
  137. if (priv && priv->kms && priv->kms->funcs &&
  138. priv->kms->funcs->atomic_check)
  139. return priv->kms->funcs->atomic_check(priv->kms, state);
  140. return drm_atomic_helper_check(dev, state);
  141. }
  142. static const struct drm_mode_config_funcs mode_config_funcs = {
  143. .fb_create = msm_framebuffer_create,
  144. .output_poll_changed = msm_fb_output_poll_changed,
  145. .atomic_check = msm_atomic_check,
  146. .atomic_commit = msm_atomic_commit,
  147. .atomic_state_alloc = msm_atomic_state_alloc,
  148. .atomic_state_clear = msm_atomic_state_clear,
  149. .atomic_state_free = msm_atomic_state_free,
  150. };
  151. static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
  152. .atomic_commit_tail = msm_atomic_commit_tail,
  153. };
  154. #if IS_ENABLED(CONFIG_DRM_MSM_REGISTER_LOGGING)
  155. static bool reglog = false;
  156. MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  157. module_param(reglog, bool, 0600);
  158. #else
  159. #define reglog 0
  160. #endif /* CONFIG_DRM_MSM_REGISTER_LOGGING */
  161. #if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION)
  162. static bool fbdev = true;
  163. MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  164. module_param(fbdev, bool, 0600);
  165. #endif /* CONFIG_DRM_FBDEV_EMULATION */
  166. static char *vram = "16m";
  167. MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  168. module_param(vram, charp, 0);
  169. bool dumpstate = false;
  170. MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
  171. module_param(dumpstate, bool, 0600);
  172. static bool modeset = true;
  173. MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
  174. module_param(modeset, bool, 0600);
  175. /*
  176. * Util/helpers:
  177. */
  178. int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk)
  179. {
  180. struct property *prop;
  181. const char *name;
  182. struct clk_bulk_data *local;
  183. int i = 0, ret, count;
  184. count = of_property_count_strings(dev->of_node, "clock-names");
  185. if (count < 1)
  186. return 0;
  187. local = devm_kcalloc(dev, sizeof(struct clk_bulk_data *),
  188. count, GFP_KERNEL);
  189. if (!local)
  190. return -ENOMEM;
  191. of_property_for_each_string(dev->of_node, "clock-names", prop, name) {
  192. local[i].id = devm_kstrdup(dev, name, GFP_KERNEL);
  193. if (!local[i].id) {
  194. devm_kfree(dev, local);
  195. return -ENOMEM;
  196. }
  197. i++;
  198. }
  199. ret = devm_clk_bulk_get(dev, count, local);
  200. if (ret) {
  201. for (i = 0; i < count; i++)
  202. devm_kfree(dev, (void *) local[i].id);
  203. devm_kfree(dev, local);
  204. return ret;
  205. }
  206. *bulk = local;
  207. return count;
  208. }
  209. struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
  210. const char *name)
  211. {
  212. int i;
  213. char n[32];
  214. snprintf(n, sizeof(n), "%s_clk", name);
  215. for (i = 0; bulk && i < count; i++) {
  216. if (!strcmp(bulk[i].id, name) || !strcmp(bulk[i].id, n))
  217. return bulk[i].clk;
  218. }
  219. return NULL;
  220. }
  221. struct clk *msm_clk_get(struct platform_device *pdev, const char *name)
  222. {
  223. struct clk *clk;
  224. char name2[32];
  225. clk = devm_clk_get(&pdev->dev, name);
  226. if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
  227. return clk;
  228. snprintf(name2, sizeof(name2), "%s_clk", name);
  229. clk = devm_clk_get(&pdev->dev, name2);
  230. if (!IS_ERR(clk))
  231. dev_warn(&pdev->dev, "Using legacy clk name binding. Use "
  232. "\"%s\" instead of \"%s\"\n", name, name2);
  233. return clk;
  234. }
  235. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  236. const char *dbgname)
  237. {
  238. struct resource *res;
  239. unsigned long size;
  240. void __iomem *ptr;
  241. if (name)
  242. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  243. else
  244. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  245. if (!res) {
  246. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  247. name);
  248. return ERR_PTR(-EINVAL);
  249. }
  250. size = resource_size(res);
  251. ptr = devm_ioremap(&pdev->dev, res->start, size);
  252. if (!ptr) {
  253. DISP_DEV_ERR(&pdev->dev, "failed to ioremap: %s\n", name);
  254. return ERR_PTR(-ENOMEM);
  255. }
  256. if (reglog)
  257. dev_dbg(&pdev->dev, "IO:region %s %pK %08lx\n",
  258. dbgname, ptr, size);
  259. return ptr;
  260. }
  261. unsigned long msm_iomap_size(struct platform_device *pdev, const char *name)
  262. {
  263. struct resource *res;
  264. if (name)
  265. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  266. else
  267. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  268. if (!res) {
  269. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  270. name);
  271. return 0;
  272. }
  273. return resource_size(res);
  274. }
  275. unsigned long msm_get_phys_addr(struct platform_device *pdev, const char *name)
  276. {
  277. struct resource *res;
  278. if (!name) {
  279. DISP_DEV_ERR(&pdev->dev, "invalid block name\n");
  280. return 0;
  281. }
  282. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  283. if (!res) {
  284. DISP_DEV_ERR(&pdev->dev, "failed to get memory resource: %s\n", name);
  285. return 0;
  286. }
  287. return res->start;
  288. }
  289. void msm_iounmap(struct platform_device *pdev, void __iomem *addr)
  290. {
  291. devm_iounmap(&pdev->dev, addr);
  292. }
  293. void msm_writel(u32 data, void __iomem *addr)
  294. {
  295. if (reglog)
  296. pr_debug("IO:W %pK %08x\n", addr, data);
  297. writel(data, addr);
  298. }
  299. u32 msm_readl(const void __iomem *addr)
  300. {
  301. u32 val = readl(addr);
  302. if (reglog)
  303. pr_err("IO:R %pK %08x\n", addr, val);
  304. return val;
  305. }
  306. static irqreturn_t msm_irq(int irq, void *arg)
  307. {
  308. struct drm_device *dev = arg;
  309. struct msm_drm_private *priv = dev->dev_private;
  310. struct msm_kms *kms = priv->kms;
  311. BUG_ON(!kms);
  312. return kms->funcs->irq(kms);
  313. }
  314. static void msm_irq_preinstall(struct drm_device *dev)
  315. {
  316. struct msm_drm_private *priv = dev->dev_private;
  317. struct msm_kms *kms = priv->kms;
  318. BUG_ON(!kms);
  319. kms->funcs->irq_preinstall(kms);
  320. }
  321. static int msm_irq_postinstall(struct drm_device *dev)
  322. {
  323. struct msm_drm_private *priv = dev->dev_private;
  324. struct msm_kms *kms = priv->kms;
  325. BUG_ON(!kms);
  326. if (kms->funcs->irq_postinstall)
  327. return kms->funcs->irq_postinstall(kms);
  328. return 0;
  329. }
  330. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  331. static int msm_irq_install(struct drm_device *dev, unsigned int irq)
  332. {
  333. int ret;
  334. if (irq == IRQ_NOTCONNECTED)
  335. return -ENOTCONN;
  336. msm_irq_preinstall(dev);
  337. ret = request_irq(irq, msm_irq, 0, dev->driver->name, dev);
  338. if (ret)
  339. return ret;
  340. ret = msm_irq_postinstall(dev);
  341. if (ret) {
  342. free_irq(irq, dev);
  343. return ret;
  344. }
  345. return 0;
  346. }
  347. static void msm_irq_uninstall(struct drm_device *dev)
  348. {
  349. struct msm_drm_private *priv = dev->dev_private;
  350. struct msm_kms *kms = priv->kms;
  351. kms->funcs->irq_uninstall(kms);
  352. free_irq(kms->irq, dev);
  353. }
  354. #else
  355. static void msm_irq_uninstall(struct drm_device *dev)
  356. {
  357. struct msm_drm_private *priv = dev->dev_private;
  358. struct msm_kms *kms = priv->kms;
  359. BUG_ON(!kms);
  360. kms->funcs->irq_uninstall(kms);
  361. }
  362. static const struct vm_operations_struct vm_ops = {
  363. .fault = msm_gem_fault,
  364. .open = drm_gem_vm_open,
  365. .close = drm_gem_vm_close,
  366. };
  367. #endif
  368. int msm_get_src_bpc(int chroma_format,
  369. int bpc)
  370. {
  371. int src_bpp;
  372. switch (chroma_format) {
  373. case MSM_CHROMA_444:
  374. src_bpp = bpc * 3;
  375. break;
  376. case MSM_CHROMA_422:
  377. src_bpp = bpc * 2;
  378. break;
  379. case MSM_CHROMA_420:
  380. src_bpp = mult_frac(bpc, 3, 2);
  381. break;
  382. default:
  383. src_bpp = bpc * 3;
  384. break;
  385. }
  386. return src_bpp;
  387. }
  388. static int msm_drm_uninit(struct device *dev)
  389. {
  390. struct platform_device *pdev = to_platform_device(dev);
  391. struct drm_device *ddev = platform_get_drvdata(pdev);
  392. struct msm_drm_private *priv = ddev->dev_private;
  393. struct msm_kms *kms = priv->kms;
  394. struct msm_vm_client_entry *client_entry, *tmp;
  395. int i;
  396. flush_workqueue(priv->wq);
  397. pm_runtime_get_sync(dev);
  398. /* clean up display commit/event worker threads */
  399. for (i = 0; i < priv->num_crtcs; i++) {
  400. if (priv->disp_thread[i].thread) {
  401. kthread_flush_worker(&priv->disp_thread[i].worker);
  402. kthread_stop(priv->disp_thread[i].thread);
  403. priv->disp_thread[i].thread = NULL;
  404. }
  405. if (priv->event_thread[i].thread) {
  406. kthread_flush_worker(&priv->event_thread[i].worker);
  407. kthread_stop(priv->event_thread[i].thread);
  408. priv->event_thread[i].thread = NULL;
  409. }
  410. }
  411. drm_kms_helper_poll_fini(ddev);
  412. if (kms && kms->funcs)
  413. kms->funcs->debugfs_destroy(kms);
  414. sde_dbg_destroy();
  415. debugfs_remove_recursive(priv->debug_root);
  416. drm_mode_config_cleanup(ddev);
  417. if (priv->registered) {
  418. drm_dev_unregister(ddev);
  419. priv->registered = false;
  420. }
  421. #if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION)
  422. if (fbdev && priv->fbdev)
  423. msm_fbdev_free(ddev);
  424. #endif /* CONFIG_DRM_FBDEV_EMULATION */
  425. drm_atomic_helper_shutdown(ddev);
  426. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  427. msm_irq_uninstall(ddev);
  428. #else
  429. drm_irq_uninstall(ddev);
  430. #endif
  431. if (kms && kms->funcs) {
  432. kms->funcs->destroy(kms);
  433. priv->kms = NULL;
  434. }
  435. if (priv->vram.paddr) {
  436. unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
  437. drm_mm_takedown(&priv->vram.mm);
  438. dma_free_attrs(dev, priv->vram.size, NULL,
  439. priv->vram.paddr, attrs);
  440. }
  441. component_unbind_all(dev, ddev);
  442. pm_runtime_put_sync(dev);
  443. sde_power_resource_deinit(pdev, &priv->phandle);
  444. mutex_lock(&priv->vm_client_lock);
  445. /* clean up any unregistered clients */
  446. list_for_each_entry_safe(client_entry, tmp, &priv->vm_client_list,
  447. list) {
  448. list_del(&client_entry->list);
  449. kfree(client_entry);
  450. }
  451. mutex_unlock(&priv->vm_client_lock);
  452. msm_mdss_destroy(ddev);
  453. ddev->dev_private = NULL;
  454. destroy_workqueue(priv->wq);
  455. kfree(priv);
  456. drm_dev_put(ddev);
  457. return 0;
  458. }
  459. #define KMS_MDP4 4
  460. #define KMS_MDP5 5
  461. #define KMS_SDE 3
  462. static int get_mdp_ver(struct platform_device *pdev)
  463. {
  464. #if IS_ENABLED(CONFIG_OF)
  465. static const struct of_device_id match_types[] = { {
  466. .compatible = "qcom,mdss_mdp",
  467. .data = (void *)KMS_MDP5,
  468. },
  469. {
  470. .compatible = "qcom,sde-kms",
  471. .data = (void *)KMS_SDE,
  472. },
  473. {},
  474. };
  475. struct device *dev = &pdev->dev;
  476. const struct of_device_id *match;
  477. match = of_match_node(match_types, dev->of_node);
  478. if (match)
  479. return (int)(unsigned long)match->data;
  480. #endif /* CONFIG_OF */
  481. return KMS_MDP4;
  482. }
  483. static int msm_init_vram(struct drm_device *dev)
  484. {
  485. struct msm_drm_private *priv = dev->dev_private;
  486. struct device_node *node;
  487. unsigned long size = 0;
  488. int ret = 0;
  489. /* In the device-tree world, we could have a 'memory-region'
  490. * phandle, which gives us a link to our "vram". Allocating
  491. * is all nicely abstracted behind the dma api, but we need
  492. * to know the entire size to allocate it all in one go. There
  493. * are two cases:
  494. * 1) device with no IOMMU, in which case we need exclusive
  495. * access to a VRAM carveout big enough for all gpu
  496. * buffers
  497. * 2) device with IOMMU, but where the bootloader puts up
  498. * a splash screen. In this case, the VRAM carveout
  499. * need only be large enough for fbdev fb. But we need
  500. * exclusive access to the buffer to avoid the kernel
  501. * using those pages for other purposes (which appears
  502. * as corruption on screen before we have a chance to
  503. * load and do initial modeset)
  504. */
  505. node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
  506. if (node) {
  507. struct resource r;
  508. ret = of_address_to_resource(node, 0, &r);
  509. of_node_put(node);
  510. if (ret)
  511. return ret;
  512. size = r.end - r.start;
  513. DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
  514. /* if we have no IOMMU, then we need to use carveout allocator.
  515. * Grab the entire CMA chunk carved out in early startup in
  516. * mach-msm:
  517. */
  518. } else if (!iommu_present(&platform_bus_type)) {
  519. u32 vram_size;
  520. ret = of_property_read_u32(dev->dev->of_node,
  521. "qcom,vram-size", &vram_size);
  522. size = (ret < 0) ? memparse(vram, NULL) : vram_size;
  523. DRM_INFO("using 0x%lx VRAM carveout\n", size);
  524. ret = 0;
  525. }
  526. if (size) {
  527. unsigned long attrs = 0;
  528. void *p;
  529. priv->vram.size = size;
  530. drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
  531. spin_lock_init(&priv->vram.lock);
  532. attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
  533. attrs |= DMA_ATTR_WRITE_COMBINE;
  534. /* note that for no-kernel-mapping, the vaddr returned
  535. * is bogus, but non-null if allocation succeeded:
  536. */
  537. p = dma_alloc_attrs(dev->dev, size,
  538. &priv->vram.paddr, GFP_KERNEL, attrs);
  539. if (!p) {
  540. DISP_DEV_ERR(dev->dev, "failed to allocate VRAM\n");
  541. priv->vram.paddr = 0;
  542. return -ENOMEM;
  543. }
  544. dev_info(dev->dev, "VRAM: %08x->%08x\n",
  545. (uint32_t)priv->vram.paddr,
  546. (uint32_t)(priv->vram.paddr + size));
  547. }
  548. return ret;
  549. }
  550. #if IS_ENABLED(CONFIG_OF)
  551. static int msm_component_bind_all(struct device *dev,
  552. struct drm_device *drm_dev)
  553. {
  554. int ret;
  555. ret = component_bind_all(dev, drm_dev);
  556. if (ret)
  557. DRM_ERROR("component_bind_all failed: %d\n", ret);
  558. return ret;
  559. }
  560. #else
  561. static int msm_component_bind_all(struct device *dev,
  562. struct drm_device *drm_dev)
  563. {
  564. return 0;
  565. }
  566. #endif /* CONFIG_OF */
  567. static int msm_drm_display_thread_create(struct msm_drm_private *priv, struct drm_device *ddev,
  568. struct device *dev)
  569. {
  570. int i, ret = 0;
  571. for (i = 0; i < priv->num_crtcs; i++) {
  572. /* initialize display thread */
  573. priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
  574. kthread_init_worker(&priv->disp_thread[i].worker);
  575. priv->disp_thread[i].dev = ddev;
  576. priv->disp_thread[i].thread =
  577. kthread_run(kthread_worker_fn,
  578. &priv->disp_thread[i].worker,
  579. "crtc_commit:%d", priv->disp_thread[i].crtc_id);
  580. kthread_init_work(&priv->thread_priority_work,
  581. msm_drm_display_thread_priority_worker);
  582. kthread_queue_work(&priv->disp_thread[i].worker, &priv->thread_priority_work);
  583. kthread_flush_work(&priv->thread_priority_work);
  584. if (IS_ERR(priv->disp_thread[i].thread)) {
  585. DISP_DEV_ERR(dev, "failed to create crtc_commit kthread\n");
  586. priv->disp_thread[i].thread = NULL;
  587. }
  588. /* initialize event thread */
  589. priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
  590. kthread_init_worker(&priv->event_thread[i].worker);
  591. priv->event_thread[i].dev = ddev;
  592. priv->event_thread[i].thread =
  593. kthread_run(kthread_worker_fn,
  594. &priv->event_thread[i].worker,
  595. "crtc_event:%d", priv->event_thread[i].crtc_id);
  596. /**
  597. * event thread should also run at same priority as disp_thread
  598. * because it is handling frame_done events. A lower priority
  599. * event thread and higher priority disp_thread can causes
  600. * frame_pending counters beyond 2. This can lead to commit
  601. * failure at crtc commit level.
  602. */
  603. kthread_init_work(&priv->thread_priority_work,
  604. msm_drm_display_thread_priority_worker);
  605. kthread_queue_work(&priv->event_thread[i].worker, &priv->thread_priority_work);
  606. kthread_flush_work(&priv->thread_priority_work);
  607. if (IS_ERR(priv->event_thread[i].thread)) {
  608. DISP_DEV_ERR(dev, "failed to create crtc_event kthread\n");
  609. priv->event_thread[i].thread = NULL;
  610. }
  611. if ((!priv->disp_thread[i].thread) ||
  612. !priv->event_thread[i].thread) {
  613. /* clean up previously created threads if any */
  614. for ( ; i >= 0; i--) {
  615. if (priv->disp_thread[i].thread) {
  616. kthread_stop(
  617. priv->disp_thread[i].thread);
  618. priv->disp_thread[i].thread = NULL;
  619. }
  620. if (priv->event_thread[i].thread) {
  621. kthread_stop(
  622. priv->event_thread[i].thread);
  623. priv->event_thread[i].thread = NULL;
  624. }
  625. }
  626. return -EINVAL;
  627. }
  628. }
  629. /**
  630. * Since pp interrupt is heavy weight, try to queue the work
  631. * into a dedicated worker thread, so that they dont interrupt
  632. * other important events.
  633. */
  634. kthread_init_worker(&priv->pp_event_worker);
  635. priv->pp_event_thread = kthread_run(kthread_worker_fn,
  636. &priv->pp_event_worker, "pp_event");
  637. kthread_init_work(&priv->thread_priority_work, msm_drm_display_thread_priority_worker);
  638. kthread_queue_work(&priv->pp_event_worker, &priv->thread_priority_work);
  639. kthread_flush_work(&priv->thread_priority_work);
  640. if (IS_ERR(priv->pp_event_thread)) {
  641. DISP_DEV_ERR(dev, "failed to create pp_event kthread\n");
  642. ret = PTR_ERR(priv->pp_event_thread);
  643. priv->pp_event_thread = NULL;
  644. return ret;
  645. }
  646. return 0;
  647. }
  648. static struct msm_kms *_msm_drm_component_init_helper(
  649. struct msm_drm_private *priv,
  650. struct drm_device *ddev, struct device *dev,
  651. struct platform_device *pdev)
  652. {
  653. int ret;
  654. struct msm_kms *kms;
  655. switch (get_mdp_ver(pdev)) {
  656. case KMS_MDP4:
  657. kms = mdp4_kms_init(ddev);
  658. break;
  659. case KMS_MDP5:
  660. kms = mdp5_kms_init(ddev);
  661. break;
  662. case KMS_SDE:
  663. kms = sde_kms_init(ddev);
  664. break;
  665. default:
  666. kms = ERR_PTR(-ENODEV);
  667. break;
  668. }
  669. if (IS_ERR_OR_NULL(kms)) {
  670. /*
  671. * NOTE: once we have GPU support, having no kms should not
  672. * be considered fatal.. ideally we would still support gpu
  673. * and (for example) use dmabuf/prime to share buffers with
  674. * imx drm driver on iMX5
  675. */
  676. DISP_DEV_ERR(dev, "failed to load kms\n");
  677. return kms;
  678. }
  679. priv->kms = kms;
  680. /**
  681. * Since kms->funcs->hw_init(kms) might call
  682. * drm_object_property_set_value to initialize some custom
  683. * properties we need to make sure mode_config.funcs are populated
  684. * beforehand to avoid dereferencing an unset value during the
  685. * drm_drv_uses_atomic_modeset check.
  686. */
  687. ddev->mode_config.funcs = &mode_config_funcs;
  688. ret = (kms)->funcs->hw_init(kms);
  689. if (ret) {
  690. DISP_DEV_ERR(dev, "kms hw init failed: %d\n", ret);
  691. return ERR_PTR(ret);
  692. }
  693. return kms;
  694. }
  695. static int msm_drm_device_init(struct platform_device *pdev,
  696. struct drm_driver *drv)
  697. {
  698. struct device *dev = &pdev->dev;
  699. struct drm_device *ddev;
  700. struct msm_drm_private *priv;
  701. int i, ret;
  702. ddev = drm_dev_alloc(drv, dev);
  703. if (IS_ERR(ddev)) {
  704. DISP_DEV_ERR(dev, "failed to allocate drm_device\n");
  705. return PTR_ERR(ddev);
  706. }
  707. drm_mode_config_init(ddev);
  708. platform_set_drvdata(pdev, ddev);
  709. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  710. if (!priv) {
  711. ret = -ENOMEM;
  712. goto priv_alloc_fail;
  713. }
  714. ddev->dev_private = priv;
  715. priv->dev = ddev;
  716. ret = sde_power_resource_init(pdev, &priv->phandle);
  717. if (ret) {
  718. pr_err("sde power resource init failed\n");
  719. goto power_init_fail;
  720. }
  721. ret = sde_dbg_init(&pdev->dev);
  722. if (ret) {
  723. DISP_DEV_ERR(dev, "failed to init sde dbg: %d\n", ret);
  724. goto dbg_init_fail;
  725. }
  726. pm_runtime_enable(dev);
  727. ret = pm_runtime_resume_and_get(dev);
  728. if (ret < 0) {
  729. DISP_DEV_ERR(dev, "failed to enable power resource %d\n", ret);
  730. goto pm_runtime_error;
  731. }
  732. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  733. sde_power_data_bus_set_quota(&priv->phandle, i,
  734. SDE_POWER_HANDLE_CONT_SPLASH_BUS_AB_QUOTA,
  735. SDE_POWER_HANDLE_CONT_SPLASH_BUS_IB_QUOTA);
  736. return ret;
  737. pm_runtime_error:
  738. sde_dbg_destroy();
  739. dbg_init_fail:
  740. sde_power_resource_deinit(pdev, &priv->phandle);
  741. power_init_fail:
  742. priv_alloc_fail:
  743. drm_dev_put(ddev);
  744. kfree(priv);
  745. return ret;
  746. }
  747. static int msm_drm_component_init(struct device *dev)
  748. {
  749. struct platform_device *pdev = to_platform_device(dev);
  750. struct drm_device *ddev = platform_get_drvdata(pdev);
  751. struct msm_drm_private *priv = ddev->dev_private;
  752. struct msm_kms *kms = NULL;
  753. int ret;
  754. struct drm_crtc *crtc;
  755. ret = msm_mdss_init(ddev);
  756. if (ret)
  757. goto mdss_init_fail;
  758. priv->wq = alloc_ordered_workqueue("msm_drm", 0);
  759. init_waitqueue_head(&priv->pending_crtcs_event);
  760. INIT_LIST_HEAD(&priv->client_event_list);
  761. INIT_LIST_HEAD(&priv->inactive_list);
  762. INIT_LIST_HEAD(&priv->vm_client_list);
  763. mutex_init(&priv->mm_lock);
  764. mutex_init(&priv->vm_client_lock);
  765. /* Bind all our sub-components: */
  766. ret = msm_component_bind_all(dev, ddev);
  767. if (ret == -EPROBE_DEFER) {
  768. destroy_workqueue(priv->wq);
  769. return ret;
  770. } else if (ret) {
  771. goto bind_fail;
  772. }
  773. ret = msm_init_vram(ddev);
  774. if (ret)
  775. goto fail;
  776. ddev->mode_config.funcs = &mode_config_funcs;
  777. ddev->mode_config.helper_private = &mode_config_helper_funcs;
  778. kms = _msm_drm_component_init_helper(priv, ddev, dev, pdev);
  779. if (IS_ERR_OR_NULL(kms)) {
  780. DISP_DEV_ERR(dev, "msm_drm_component_init_helper failed\n");
  781. goto fail;
  782. }
  783. /* Register rotator platform driver only after genpd init */
  784. sde_rotator_register();
  785. sde_rotator_smmu_driver_register();
  786. ret = msm_drm_display_thread_create(priv, ddev, dev);
  787. if (ret) {
  788. DISP_DEV_ERR(dev, "msm_drm_display_thread_create failed\n");
  789. goto fail;
  790. }
  791. ret = drm_vblank_init(ddev, priv->num_crtcs);
  792. if (ret < 0) {
  793. DISP_DEV_ERR(dev, "failed to initialize vblank\n");
  794. goto fail;
  795. }
  796. drm_for_each_crtc(crtc, ddev)
  797. drm_crtc_vblank_reset(crtc);
  798. if (kms) {
  799. ret = pm_runtime_resume_and_get(dev);
  800. if (ret < 0) {
  801. DISP_DEV_ERR(dev, "failed to enable power resource %d\n", ret);
  802. goto fail;
  803. }
  804. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0))
  805. ret = msm_irq_install(ddev, platform_get_irq(pdev, 0));
  806. #else
  807. ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
  808. #endif
  809. pm_runtime_put_sync(dev);
  810. if (ret < 0) {
  811. DISP_DEV_ERR(dev, "failed to install IRQ handler\n");
  812. goto fail;
  813. }
  814. }
  815. drm_mode_config_reset(ddev);
  816. ret = drm_dev_register(ddev, 0);
  817. if (ret)
  818. goto fail;
  819. priv->registered = true;
  820. if (kms && kms->funcs && kms->funcs->cont_splash_config) {
  821. ret = kms->funcs->cont_splash_config(kms, NULL);
  822. if (ret) {
  823. DISP_DEV_ERR(dev, "kms cont_splash config failed.\n");
  824. goto fail;
  825. }
  826. }
  827. #if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION)
  828. if (fbdev)
  829. priv->fbdev = msm_fbdev_init(ddev);
  830. #endif /* CONFIG_DRM_FBDEV_EMULATION */
  831. /* create drm client only when fbdev is not supported */
  832. if (!priv->fbdev) {
  833. ret = drm_client_init(ddev, &kms->client, "kms_client", NULL);
  834. if (ret) {
  835. DRM_ERROR("failed to init kms_client: %d\n", ret);
  836. kms->client.dev = NULL;
  837. goto fail;
  838. }
  839. drm_client_register(&kms->client);
  840. }
  841. ret = sde_dbg_debugfs_register(dev);
  842. if (ret) {
  843. DISP_DEV_ERR(dev, "failed to reg sde dbg debugfs: %d\n", ret);
  844. goto fail;
  845. }
  846. /* perform subdriver post initialization */
  847. if (kms && kms->funcs && kms->funcs->postinit) {
  848. ret = kms->funcs->postinit(kms);
  849. if (ret) {
  850. pr_err("kms post init failed: %d\n", ret);
  851. goto fail;
  852. }
  853. }
  854. drm_kms_helper_poll_init(ddev);
  855. return 0;
  856. fail:
  857. msm_drm_uninit(dev);
  858. return ret;
  859. bind_fail:
  860. msm_mdss_destroy(ddev);
  861. mdss_init_fail:
  862. sde_dbg_destroy();
  863. sde_power_resource_deinit(pdev, &priv->phandle);
  864. drm_dev_put(ddev);
  865. kfree(priv);
  866. return ret;
  867. }
  868. void msm_atomic_flush_display_threads(struct msm_drm_private *priv)
  869. {
  870. int i;
  871. if (!priv) {
  872. SDE_ERROR("invalid private data\n");
  873. return;
  874. }
  875. for (i = 0; i < priv->num_crtcs; i++) {
  876. if (priv->disp_thread[i].thread)
  877. kthread_flush_worker(&priv->disp_thread[i].worker);
  878. if (priv->event_thread[i].thread)
  879. kthread_flush_worker(&priv->event_thread[i].worker);
  880. }
  881. kthread_flush_worker(&priv->pp_event_worker);
  882. }
  883. /*
  884. * DRM operations:
  885. */
  886. static int context_init(struct drm_device *dev, struct drm_file *file)
  887. {
  888. struct msm_file_private *ctx;
  889. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  890. if (!ctx)
  891. return -ENOMEM;
  892. mutex_init(&ctx->power_lock);
  893. file->driver_priv = ctx;
  894. if (dev && dev->dev_private) {
  895. struct msm_drm_private *priv = dev->dev_private;
  896. struct msm_kms *kms;
  897. kms = priv->kms;
  898. if (kms && kms->funcs && kms->funcs->postopen)
  899. kms->funcs->postopen(kms, file);
  900. }
  901. return 0;
  902. }
  903. static int msm_open(struct drm_device *dev, struct drm_file *file)
  904. {
  905. return context_init(dev, file);
  906. }
  907. static void context_close(struct msm_file_private *ctx)
  908. {
  909. kfree(ctx);
  910. }
  911. static void msm_preclose(struct drm_device *dev, struct drm_file *file)
  912. {
  913. struct msm_drm_private *priv = dev->dev_private;
  914. struct msm_kms *kms = priv->kms;
  915. if (kms && kms->funcs && kms->funcs->preclose)
  916. kms->funcs->preclose(kms, file);
  917. }
  918. static void msm_postclose(struct drm_device *dev, struct drm_file *file)
  919. {
  920. struct msm_drm_private *priv = dev->dev_private;
  921. struct msm_file_private *ctx = file->driver_priv;
  922. struct msm_kms *kms = priv->kms;
  923. if (!kms)
  924. return;
  925. if (kms->funcs && kms->funcs->postclose)
  926. kms->funcs->postclose(kms, file);
  927. mutex_lock(&dev->struct_mutex);
  928. if (ctx == priv->lastctx)
  929. priv->lastctx = NULL;
  930. mutex_unlock(&dev->struct_mutex);
  931. mutex_lock(&ctx->power_lock);
  932. if (ctx->enable_refcnt) {
  933. SDE_EVT32(ctx->enable_refcnt);
  934. pm_runtime_put_sync(dev->dev);
  935. }
  936. mutex_unlock(&ctx->power_lock);
  937. context_close(ctx);
  938. }
  939. static void msm_lastclose(struct drm_device *dev)
  940. {
  941. struct msm_drm_private *priv = dev->dev_private;
  942. struct msm_kms *kms;
  943. int i, rc;
  944. if (!priv || !priv->kms)
  945. return;
  946. kms = priv->kms;
  947. /* check for splash status before triggering cleanup
  948. * if we end up here with splash status ON i.e before first
  949. * commit then ignore the last close call
  950. */
  951. if (kms->funcs && kms->funcs->check_for_splash
  952. && kms->funcs->check_for_splash(kms)) {
  953. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  954. LASTCLOSE_TIMEOUT_MS, rc);
  955. if (!rc)
  956. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  957. priv->pending_crtcs);
  958. rc = kms->funcs->trigger_null_flush(kms);
  959. if (rc)
  960. return;
  961. }
  962. /*
  963. * clean up vblank disable immediately as this is the last close.
  964. */
  965. for (i = 0; i < dev->num_crtcs; i++) {
  966. struct drm_vblank_crtc *vblank = &dev->vblank[i];
  967. struct timer_list *disable_timer = &vblank->disable_timer;
  968. if (del_timer_sync(disable_timer))
  969. disable_timer->function(disable_timer);
  970. }
  971. /* wait for pending vblank requests to be executed by worker thread */
  972. flush_workqueue(priv->wq);
  973. /* wait for any pending crtcs to finish before lastclose commit */
  974. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  975. LASTCLOSE_TIMEOUT_MS, rc);
  976. if (!rc)
  977. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  978. priv->pending_crtcs);
  979. msm_atomic_flush_display_threads(priv);
  980. if (priv->fbdev) {
  981. rc = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
  982. if (rc)
  983. DRM_ERROR("restore FBDEV mode failed: %d\n", rc);
  984. } else if (kms && kms->client.dev) {
  985. rc = drm_client_modeset_commit_locked(&kms->client);
  986. if (rc)
  987. DRM_ERROR("client modeset commit failed: %d\n", rc);
  988. }
  989. /* wait again, before kms driver does it's lastclose commit */
  990. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  991. LASTCLOSE_TIMEOUT_MS, rc);
  992. if (!rc)
  993. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  994. priv->pending_crtcs);
  995. if (kms->funcs && kms->funcs->lastclose)
  996. kms->funcs->lastclose(kms);
  997. }
  998. /*
  999. * DRM ioctls:
  1000. */
  1001. static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
  1002. struct drm_file *file)
  1003. {
  1004. struct drm_msm_gem_new *args = data;
  1005. if (args->flags & ~MSM_BO_FLAGS) {
  1006. DRM_ERROR("invalid flags: %08x\n", args->flags);
  1007. return -EINVAL;
  1008. }
  1009. return msm_gem_new_handle(dev, file, args->size,
  1010. args->flags, &args->handle, NULL);
  1011. }
  1012. static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
  1013. {
  1014. return ktime_set(timeout.tv_sec, timeout.tv_nsec);
  1015. }
  1016. static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  1017. struct drm_file *file)
  1018. {
  1019. struct drm_msm_gem_cpu_prep *args = data;
  1020. struct drm_gem_object *obj;
  1021. ktime_t timeout = to_ktime(args->timeout);
  1022. int ret;
  1023. if (args->op & ~MSM_PREP_FLAGS) {
  1024. DRM_ERROR("invalid op: %08x\n", args->op);
  1025. return -EINVAL;
  1026. }
  1027. obj = drm_gem_object_lookup(file, args->handle);
  1028. if (!obj)
  1029. return -ENOENT;
  1030. ret = msm_gem_cpu_prep(obj, args->op, &timeout);
  1031. drm_gem_object_put(obj);
  1032. return ret;
  1033. }
  1034. static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  1035. struct drm_file *file)
  1036. {
  1037. struct drm_msm_gem_cpu_fini *args = data;
  1038. struct drm_gem_object *obj;
  1039. int ret;
  1040. obj = drm_gem_object_lookup(file, args->handle);
  1041. if (!obj)
  1042. return -ENOENT;
  1043. ret = msm_gem_cpu_fini(obj);
  1044. drm_gem_object_put(obj);
  1045. return ret;
  1046. }
  1047. static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
  1048. struct drm_file *file)
  1049. {
  1050. struct drm_msm_gem_madvise *args = data;
  1051. struct drm_gem_object *obj;
  1052. int ret;
  1053. switch (args->madv) {
  1054. case MSM_MADV_DONTNEED:
  1055. case MSM_MADV_WILLNEED:
  1056. break;
  1057. default:
  1058. return -EINVAL;
  1059. }
  1060. ret = mutex_lock_interruptible(&dev->struct_mutex);
  1061. if (ret)
  1062. return ret;
  1063. obj = drm_gem_object_lookup(file, args->handle);
  1064. if (!obj) {
  1065. ret = -ENOENT;
  1066. goto unlock;
  1067. }
  1068. ret = msm_gem_madvise(obj, args->madv);
  1069. if (ret >= 0) {
  1070. args->retained = ret;
  1071. ret = 0;
  1072. }
  1073. drm_gem_object_put(obj);
  1074. unlock:
  1075. mutex_unlock(&dev->struct_mutex);
  1076. return ret;
  1077. }
  1078. static int msm_drm_object_supports_event(struct drm_device *dev,
  1079. struct drm_msm_event_req *req)
  1080. {
  1081. int ret = -EINVAL;
  1082. struct drm_mode_object *arg_obj;
  1083. arg_obj = drm_mode_object_find(dev, NULL, req->object_id,
  1084. req->object_type);
  1085. if (!arg_obj)
  1086. return -ENOENT;
  1087. switch (arg_obj->type) {
  1088. case DRM_MODE_OBJECT_CRTC:
  1089. case DRM_MODE_OBJECT_CONNECTOR:
  1090. ret = 0;
  1091. break;
  1092. default:
  1093. ret = -EOPNOTSUPP;
  1094. break;
  1095. }
  1096. drm_mode_object_put(arg_obj);
  1097. return ret;
  1098. }
  1099. static int msm_register_event(struct drm_device *dev,
  1100. struct drm_msm_event_req *req, struct drm_file *file, bool en)
  1101. {
  1102. int ret = -EINVAL;
  1103. struct msm_drm_private *priv = dev->dev_private;
  1104. struct msm_kms *kms = priv->kms;
  1105. struct drm_mode_object *arg_obj;
  1106. arg_obj = drm_mode_object_find(dev, file, req->object_id,
  1107. req->object_type);
  1108. if (!arg_obj)
  1109. return -ENOENT;
  1110. ret = kms->funcs->register_events(kms, arg_obj, req->event, en);
  1111. drm_mode_object_put(arg_obj);
  1112. return ret;
  1113. }
  1114. static int msm_event_client_count(struct drm_device *dev,
  1115. struct drm_msm_event_req *req_event, bool locked)
  1116. {
  1117. struct msm_drm_private *priv = dev->dev_private;
  1118. unsigned long flag = 0;
  1119. struct msm_drm_event *node;
  1120. int count = 0;
  1121. if (!locked)
  1122. spin_lock_irqsave(&dev->event_lock, flag);
  1123. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1124. if (node->event.base.type == req_event->event &&
  1125. node->event.info.object_id == req_event->object_id)
  1126. count++;
  1127. }
  1128. if (!locked)
  1129. spin_unlock_irqrestore(&dev->event_lock, flag);
  1130. return count;
  1131. }
  1132. static int msm_ioctl_register_event(struct drm_device *dev, void *data,
  1133. struct drm_file *file)
  1134. {
  1135. struct msm_drm_private *priv = dev->dev_private;
  1136. struct drm_msm_event_req *req_event = data;
  1137. struct msm_drm_event *client, *node;
  1138. unsigned long flag = 0;
  1139. bool dup_request = false;
  1140. int ret = 0, count = 0;
  1141. ret = msm_drm_object_supports_event(dev, req_event);
  1142. if (ret) {
  1143. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1144. req_event->event, req_event->object_type,
  1145. req_event->object_id);
  1146. return ret;
  1147. }
  1148. spin_lock_irqsave(&dev->event_lock, flag);
  1149. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1150. if (node->base.file_priv != file)
  1151. continue;
  1152. if (node->event.base.type == req_event->event &&
  1153. node->event.info.object_id == req_event->object_id) {
  1154. DRM_DEBUG("duplicate request for event %x obj id %d\n",
  1155. node->event.base.type,
  1156. node->event.info.object_id);
  1157. dup_request = true;
  1158. break;
  1159. }
  1160. }
  1161. spin_unlock_irqrestore(&dev->event_lock, flag);
  1162. if (dup_request)
  1163. return -EALREADY;
  1164. client = kzalloc(sizeof(*client), GFP_KERNEL);
  1165. if (!client)
  1166. return -ENOMEM;
  1167. client->base.file_priv = file;
  1168. client->base.event = &client->event.base;
  1169. client->event.base.type = req_event->event;
  1170. memcpy(&client->event.info, req_event, sizeof(client->event.info));
  1171. /* Get the count of clients that have registered for event.
  1172. * Event should be enabled for first client, for subsequent enable
  1173. * calls add to client list and return.
  1174. */
  1175. count = msm_event_client_count(dev, req_event, false);
  1176. if (count) {
  1177. /* Add current client to list */
  1178. spin_lock_irqsave(&dev->event_lock, flag);
  1179. list_add_tail(&client->base.link, &priv->client_event_list);
  1180. spin_unlock_irqrestore(&dev->event_lock, flag);
  1181. return 0;
  1182. }
  1183. ret = msm_register_event(dev, req_event, file, true);
  1184. if (ret) {
  1185. DRM_ERROR("failed to enable event %x object %x object id %d\n",
  1186. req_event->event, req_event->object_type,
  1187. req_event->object_id);
  1188. kfree(client);
  1189. } else {
  1190. /* Add current client to list */
  1191. spin_lock_irqsave(&dev->event_lock, flag);
  1192. list_add_tail(&client->base.link, &priv->client_event_list);
  1193. spin_unlock_irqrestore(&dev->event_lock, flag);
  1194. }
  1195. return ret;
  1196. }
  1197. static int msm_ioctl_deregister_event(struct drm_device *dev, void *data,
  1198. struct drm_file *file)
  1199. {
  1200. struct msm_drm_private *priv = dev->dev_private;
  1201. struct drm_msm_event_req *req_event = data;
  1202. struct msm_drm_event *client = NULL, *node, *temp;
  1203. unsigned long flag = 0;
  1204. int count = 0;
  1205. bool found = false;
  1206. int ret = 0;
  1207. ret = msm_drm_object_supports_event(dev, req_event);
  1208. if (ret) {
  1209. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1210. req_event->event, req_event->object_type,
  1211. req_event->object_id);
  1212. return ret;
  1213. }
  1214. spin_lock_irqsave(&dev->event_lock, flag);
  1215. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1216. base.link) {
  1217. if (node->event.base.type == req_event->event &&
  1218. node->event.info.object_id == req_event->object_id &&
  1219. node->base.file_priv == file) {
  1220. client = node;
  1221. list_del(&client->base.link);
  1222. found = true;
  1223. kfree(client);
  1224. break;
  1225. }
  1226. }
  1227. spin_unlock_irqrestore(&dev->event_lock, flag);
  1228. if (!found)
  1229. return -ENOENT;
  1230. count = msm_event_client_count(dev, req_event, false);
  1231. if (!count)
  1232. ret = msm_register_event(dev, req_event, file, false);
  1233. return ret;
  1234. }
  1235. void msm_mode_object_event_notify(struct drm_mode_object *obj,
  1236. struct drm_device *dev, struct drm_event *event, u8 *payload)
  1237. {
  1238. struct msm_drm_private *priv = NULL;
  1239. unsigned long flags;
  1240. struct msm_drm_event *notify, *node;
  1241. int len = 0, ret;
  1242. if (!obj || !event || !event->length || !payload) {
  1243. DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n",
  1244. obj, event, ((event) ? (event->length) : -1),
  1245. payload);
  1246. return;
  1247. }
  1248. priv = (dev) ? dev->dev_private : NULL;
  1249. if (!dev || !priv) {
  1250. DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv);
  1251. return;
  1252. }
  1253. spin_lock_irqsave(&dev->event_lock, flags);
  1254. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1255. if (node->event.base.type != event->type ||
  1256. obj->id != node->event.info.object_id)
  1257. continue;
  1258. len = event->length + sizeof(struct msm_drm_event);
  1259. if (node->base.file_priv->event_space < len) {
  1260. DRM_ERROR("Insufficient space %d for event %x len %d\n",
  1261. node->base.file_priv->event_space, event->type,
  1262. len);
  1263. continue;
  1264. }
  1265. notify = kzalloc(len, GFP_ATOMIC);
  1266. if (!notify)
  1267. continue;
  1268. notify->base.file_priv = node->base.file_priv;
  1269. notify->base.event = &notify->event.base;
  1270. notify->event.base.type = node->event.base.type;
  1271. notify->event.base.length = event->length +
  1272. sizeof(struct drm_msm_event_resp);
  1273. memcpy(&notify->event.info, &node->event.info,
  1274. sizeof(notify->event.info));
  1275. memcpy(notify->event.data, payload, event->length);
  1276. ret = drm_event_reserve_init_locked(dev, node->base.file_priv,
  1277. &notify->base, &notify->event.base);
  1278. if (ret) {
  1279. kfree(notify);
  1280. continue;
  1281. }
  1282. drm_send_event_locked(dev, &notify->base);
  1283. }
  1284. spin_unlock_irqrestore(&dev->event_lock, flags);
  1285. }
  1286. static int msm_release(struct inode *inode, struct file *filp)
  1287. {
  1288. struct drm_file *file_priv;
  1289. struct drm_minor *minor;
  1290. struct drm_device *dev;
  1291. struct msm_drm_private *priv;
  1292. struct msm_drm_event *node, *temp, *tmp_node;
  1293. u32 count;
  1294. unsigned long flags;
  1295. LIST_HEAD(tmp_head);
  1296. int ret = 0;
  1297. mutex_lock(&msm_release_lock);
  1298. file_priv = filp->private_data;
  1299. if (!file_priv) {
  1300. ret = -EINVAL;
  1301. goto end;
  1302. }
  1303. minor = file_priv->minor;
  1304. dev = minor->dev;
  1305. priv = dev->dev_private;
  1306. spin_lock_irqsave(&dev->event_lock, flags);
  1307. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1308. base.link) {
  1309. if (node->base.file_priv != file_priv)
  1310. continue;
  1311. list_del(&node->base.link);
  1312. list_add_tail(&node->base.link, &tmp_head);
  1313. }
  1314. spin_unlock_irqrestore(&dev->event_lock, flags);
  1315. list_for_each_entry_safe(node, temp, &tmp_head,
  1316. base.link) {
  1317. list_del(&node->base.link);
  1318. count = msm_event_client_count(dev, &node->event.info, false);
  1319. list_for_each_entry(tmp_node, &tmp_head, base.link) {
  1320. if (tmp_node->event.base.type ==
  1321. node->event.info.event &&
  1322. tmp_node->event.info.object_id ==
  1323. node->event.info.object_id)
  1324. count++;
  1325. }
  1326. if (!count)
  1327. msm_register_event(dev, &node->event.info, file_priv,
  1328. false);
  1329. kfree(node);
  1330. }
  1331. /**
  1332. * Handle preclose operation here for removing fb's whose
  1333. * refcount > 1. This operation is not triggered from upstream
  1334. * drm as msm_driver does not support DRIVER_LEGACY feature.
  1335. */
  1336. if (drm_is_current_master(file_priv)) {
  1337. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  1338. LASTCLOSE_TIMEOUT_MS, ret);
  1339. if (!ret)
  1340. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  1341. priv->pending_crtcs);
  1342. msm_preclose(dev, file_priv);
  1343. }
  1344. ret = drm_release(inode, filp);
  1345. filp->private_data = NULL;
  1346. end:
  1347. mutex_unlock(&msm_release_lock);
  1348. return ret;
  1349. }
  1350. /**
  1351. * msm_ioctl_rmfb2 - remove an FB from the configuration
  1352. * @dev: drm device for the ioctl
  1353. * @data: data pointer for the ioctl
  1354. * @file_priv: drm file for the ioctl call
  1355. *
  1356. * Remove the FB specified by the user.
  1357. *
  1358. * Called by the user via ioctl.
  1359. *
  1360. * Returns:
  1361. * Zero on success, negative errno on failure.
  1362. */
  1363. int msm_ioctl_rmfb2(struct drm_device *dev, void *data,
  1364. struct drm_file *file_priv)
  1365. {
  1366. struct drm_framebuffer *fb = NULL;
  1367. struct drm_framebuffer *fbl = NULL;
  1368. uint32_t *id = data;
  1369. int found = 0;
  1370. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  1371. return -EINVAL;
  1372. fb = drm_framebuffer_lookup(dev, file_priv, *id);
  1373. if (!fb)
  1374. return -ENOENT;
  1375. /* drop extra ref from traversing drm_framebuffer_lookup */
  1376. drm_framebuffer_put(fb);
  1377. mutex_lock(&file_priv->fbs_lock);
  1378. list_for_each_entry(fbl, &file_priv->fbs, filp_head)
  1379. if (fb == fbl)
  1380. found = 1;
  1381. if (!found) {
  1382. mutex_unlock(&file_priv->fbs_lock);
  1383. return -ENOENT;
  1384. }
  1385. list_del_init(&fb->filp_head);
  1386. mutex_unlock(&file_priv->fbs_lock);
  1387. drm_framebuffer_put(fb);
  1388. return 0;
  1389. }
  1390. EXPORT_SYMBOL(msm_ioctl_rmfb2);
  1391. /**
  1392. * msm_ioctl_power_ctrl - enable/disable power vote on MDSS Hw
  1393. * @dev: drm device for the ioctl
  1394. * @data: data pointer for the ioctl
  1395. * @file_priv: drm file for the ioctl call
  1396. *
  1397. */
  1398. int msm_ioctl_power_ctrl(struct drm_device *dev, void *data,
  1399. struct drm_file *file_priv)
  1400. {
  1401. struct msm_file_private *ctx = file_priv->driver_priv;
  1402. struct msm_drm_private *priv;
  1403. struct drm_msm_power_ctrl *power_ctrl = data;
  1404. bool vote_req = false;
  1405. int old_cnt;
  1406. int rc = 0;
  1407. if (unlikely(!power_ctrl)) {
  1408. DRM_ERROR("invalid ioctl data\n");
  1409. return -EINVAL;
  1410. }
  1411. priv = dev->dev_private;
  1412. mutex_lock(&ctx->power_lock);
  1413. old_cnt = ctx->enable_refcnt;
  1414. if (power_ctrl->enable) {
  1415. if (!ctx->enable_refcnt)
  1416. vote_req = true;
  1417. ctx->enable_refcnt++;
  1418. } else if (ctx->enable_refcnt) {
  1419. ctx->enable_refcnt--;
  1420. if (!ctx->enable_refcnt)
  1421. vote_req = true;
  1422. } else {
  1423. pr_err("ignoring, unbalanced disable\n");
  1424. }
  1425. if (vote_req) {
  1426. if (power_ctrl->enable)
  1427. rc = pm_runtime_resume_and_get(dev->dev);
  1428. else
  1429. pm_runtime_put_sync(dev->dev);
  1430. if (rc < 0)
  1431. ctx->enable_refcnt = old_cnt;
  1432. else
  1433. rc = 0;
  1434. }
  1435. pr_debug("pid %d enable %d, refcnt %d, vote_req %d\n",
  1436. current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1437. vote_req);
  1438. SDE_EVT32(current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1439. vote_req);
  1440. mutex_unlock(&ctx->power_lock);
  1441. return rc;
  1442. }
  1443. /**
  1444. * msm_ioctl_display_early_wakeup - early wakeup display.
  1445. * @dev: drm device for the ioctl
  1446. * @data: data pointer for the ioctl
  1447. * @file_priv: drm file for the ioctl call
  1448. *
  1449. */
  1450. int msm_ioctl_display_hint_ops(struct drm_device *dev, void *data,
  1451. struct drm_file *file_priv)
  1452. {
  1453. struct drm_msm_display_hint *display_hint = data;
  1454. struct drm_msm_early_wakeup early_wakeup;
  1455. void __user *early_wakeup_usr;
  1456. struct msm_drm_private *priv;
  1457. struct msm_kms *kms;
  1458. priv = dev->dev_private;
  1459. kms = priv->kms;
  1460. if (unlikely(!display_hint)) {
  1461. DRM_ERROR("invalid ioctl data\n");
  1462. return -EINVAL;
  1463. }
  1464. SDE_EVT32(display_hint->hint_flags);
  1465. /* Any new hint added will require a check for VM ownership before HW is accessed */
  1466. if (display_hint->hint_flags == DRM_MSM_DISPLAY_EARLY_WAKEUP_HINT) {
  1467. if (!display_hint->data) {
  1468. DRM_ERROR("early_wakeup: wrong parameter\n");
  1469. return -EINVAL;
  1470. }
  1471. early_wakeup_usr =
  1472. (void __user *)((uintptr_t)display_hint->data);
  1473. if (copy_from_user(&early_wakeup, early_wakeup_usr,
  1474. sizeof(early_wakeup))) {
  1475. DRM_ERROR("early_wakeup: copy from user failed\n");
  1476. return -EINVAL;
  1477. }
  1478. SDE_EVT32(early_wakeup.wakeup_hint);
  1479. if (kms && kms->funcs && kms->funcs->display_early_wakeup
  1480. && early_wakeup.wakeup_hint)
  1481. kms->funcs->display_early_wakeup(dev,
  1482. early_wakeup.connector_id);
  1483. }
  1484. return 0;
  1485. }
  1486. static const struct drm_ioctl_desc msm_ioctls[] = {
  1487. DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
  1488. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  1489. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  1490. DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW),
  1491. DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH),
  1492. DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event,
  1493. DRM_UNLOCKED),
  1494. DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event,
  1495. DRM_UNLOCKED),
  1496. DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, DRM_UNLOCKED),
  1497. DRM_IOCTL_DEF_DRV(MSM_POWER_CTRL, msm_ioctl_power_ctrl,
  1498. DRM_RENDER_ALLOW),
  1499. DRM_IOCTL_DEF_DRV(MSM_DISPLAY_HINT, msm_ioctl_display_hint_ops,
  1500. DRM_UNLOCKED),
  1501. };
  1502. static const struct file_operations fops = {
  1503. .owner = THIS_MODULE,
  1504. .open = drm_open,
  1505. .release = msm_release,
  1506. .unlocked_ioctl = drm_ioctl,
  1507. .compat_ioctl = drm_compat_ioctl,
  1508. .poll = drm_poll,
  1509. .read = drm_read,
  1510. .llseek = no_llseek,
  1511. .mmap = msm_gem_mmap,
  1512. };
  1513. static struct drm_driver msm_driver = {
  1514. .driver_features = DRIVER_GEM |
  1515. DRIVER_RENDER |
  1516. DRIVER_ATOMIC |
  1517. DRIVER_MODESET,
  1518. .open = msm_open,
  1519. .postclose = msm_postclose,
  1520. .lastclose = msm_lastclose,
  1521. #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0))
  1522. .irq_handler = msm_irq,
  1523. .irq_preinstall = msm_irq_preinstall,
  1524. .irq_postinstall = msm_irq_postinstall,
  1525. .irq_uninstall = msm_irq_uninstall,
  1526. .gem_free_object_unlocked = msm_gem_free_object,
  1527. .gem_vm_ops = &vm_ops,
  1528. .gem_prime_export = drm_gem_prime_export,
  1529. .gem_prime_pin = msm_gem_prime_pin,
  1530. .gem_prime_unpin = msm_gem_prime_unpin,
  1531. .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
  1532. .gem_prime_vmap = msm_gem_prime_vmap,
  1533. .gem_prime_vunmap = msm_gem_prime_vunmap,
  1534. #endif
  1535. .dumb_create = msm_gem_dumb_create,
  1536. .dumb_map_offset = msm_gem_dumb_map_offset,
  1537. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  1538. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  1539. .gem_prime_import = msm_gem_prime_import,
  1540. .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
  1541. .gem_prime_mmap = msm_gem_prime_mmap,
  1542. .ioctls = msm_ioctls,
  1543. .num_ioctls = ARRAY_SIZE(msm_ioctls),
  1544. .fops = &fops,
  1545. .name = "msm_drm",
  1546. .desc = "MSM Snapdragon DRM",
  1547. .date = "20130625",
  1548. .major = MSM_VERSION_MAJOR,
  1549. .minor = MSM_VERSION_MINOR,
  1550. .patchlevel = MSM_VERSION_PATCHLEVEL,
  1551. };
  1552. #if IS_ENABLED(CONFIG_PM_SLEEP)
  1553. static int msm_pm_suspend(struct device *dev)
  1554. {
  1555. struct drm_device *ddev;
  1556. struct msm_drm_private *priv;
  1557. struct msm_kms *kms;
  1558. if (!dev)
  1559. return -EINVAL;
  1560. ddev = dev_get_drvdata(dev);
  1561. if (!ddev || !ddev->dev_private)
  1562. return -EINVAL;
  1563. priv = ddev->dev_private;
  1564. kms = priv->kms;
  1565. if (kms && kms->funcs && kms->funcs->pm_suspend)
  1566. return kms->funcs->pm_suspend(dev);
  1567. /* disable hot-plug polling */
  1568. drm_kms_helper_poll_disable(ddev);
  1569. return 0;
  1570. }
  1571. static int msm_pm_resume(struct device *dev)
  1572. {
  1573. struct drm_device *ddev;
  1574. struct msm_drm_private *priv;
  1575. struct msm_kms *kms;
  1576. if (!dev)
  1577. return -EINVAL;
  1578. ddev = dev_get_drvdata(dev);
  1579. if (!ddev || !ddev->dev_private)
  1580. return -EINVAL;
  1581. priv = ddev->dev_private;
  1582. kms = priv->kms;
  1583. if (kms && kms->funcs && kms->funcs->pm_resume)
  1584. return kms->funcs->pm_resume(dev);
  1585. /* enable hot-plug polling */
  1586. drm_kms_helper_poll_enable(ddev);
  1587. return 0;
  1588. }
  1589. #endif /* CONFIG_PM_SLEEP */
  1590. #if IS_ENABLED(CONFIG_PM)
  1591. static int msm_runtime_suspend(struct device *dev)
  1592. {
  1593. struct drm_device *ddev = dev_get_drvdata(dev);
  1594. struct msm_drm_private *priv = ddev->dev_private;
  1595. DBG("");
  1596. if (priv->mdss)
  1597. msm_mdss_disable(priv->mdss);
  1598. else
  1599. sde_power_resource_enable(&priv->phandle, false);
  1600. return 0;
  1601. }
  1602. static int msm_runtime_resume(struct device *dev)
  1603. {
  1604. struct drm_device *ddev = dev_get_drvdata(dev);
  1605. struct msm_drm_private *priv = ddev->dev_private;
  1606. int ret;
  1607. DBG("");
  1608. if (priv->mdss)
  1609. ret = msm_mdss_enable(priv->mdss);
  1610. else
  1611. ret = sde_power_resource_enable(&priv->phandle, true);
  1612. return ret;
  1613. }
  1614. #endif /* CONFIG_PM */
  1615. static const struct dev_pm_ops msm_pm_ops = {
  1616. SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
  1617. SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
  1618. };
  1619. /*
  1620. * Componentized driver support:
  1621. */
  1622. /*
  1623. * NOTE: duplication of the same code as exynos or imx (or probably any other).
  1624. * so probably some room for some helpers
  1625. */
  1626. static int compare_of(struct device *dev, void *data)
  1627. {
  1628. return dev->of_node == data;
  1629. }
  1630. /*
  1631. * Identify what components need to be added by parsing what remote-endpoints
  1632. * our MDP output ports are connected to. In the case of LVDS on MDP4, there
  1633. * is no external component that we need to add since LVDS is within MDP4
  1634. * itself.
  1635. */
  1636. static int add_components_mdp(struct device *mdp_dev,
  1637. struct component_match **matchptr)
  1638. {
  1639. struct device_node *np = mdp_dev->of_node;
  1640. struct device_node *ep_node;
  1641. struct device *master_dev;
  1642. /*
  1643. * on MDP4 based platforms, the MDP platform device is the component
  1644. * master that adds other display interface components to itself.
  1645. *
  1646. * on MDP5 based platforms, the MDSS platform device is the component
  1647. * master that adds MDP5 and other display interface components to
  1648. * itself.
  1649. */
  1650. if (of_device_is_compatible(np, "qcom,mdp4"))
  1651. master_dev = mdp_dev;
  1652. else
  1653. master_dev = mdp_dev->parent;
  1654. for_each_endpoint_of_node(np, ep_node) {
  1655. struct device_node *intf;
  1656. struct of_endpoint ep;
  1657. int ret;
  1658. ret = of_graph_parse_endpoint(ep_node, &ep);
  1659. if (ret) {
  1660. DISP_DEV_ERR(mdp_dev, "unable to parse port endpoint\n");
  1661. of_node_put(ep_node);
  1662. return ret;
  1663. }
  1664. /*
  1665. * The LCDC/LVDS port on MDP4 is a speacial case where the
  1666. * remote-endpoint isn't a component that we need to add
  1667. */
  1668. if (of_device_is_compatible(np, "qcom,mdp4") &&
  1669. ep.port == 0)
  1670. continue;
  1671. /*
  1672. * It's okay if some of the ports don't have a remote endpoint
  1673. * specified. It just means that the port isn't connected to
  1674. * any external interface.
  1675. */
  1676. intf = of_graph_get_remote_port_parent(ep_node);
  1677. if (!intf)
  1678. continue;
  1679. if (of_device_is_available(intf))
  1680. drm_of_component_match_add(master_dev, matchptr,
  1681. compare_of, intf);
  1682. of_node_put(intf);
  1683. }
  1684. return 0;
  1685. }
  1686. static int compare_name_mdp(struct device *dev, void *data)
  1687. {
  1688. return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL);
  1689. }
  1690. static int add_display_components(struct device *dev,
  1691. struct component_match **matchptr)
  1692. {
  1693. struct device *mdp_dev = NULL;
  1694. struct device_node *node;
  1695. int ret;
  1696. if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) {
  1697. struct device_node *np = dev->of_node;
  1698. unsigned int i;
  1699. for (i = 0; ; i++) {
  1700. node = of_parse_phandle(np, "connectors", i);
  1701. if (!node)
  1702. break;
  1703. component_match_add(dev, matchptr, compare_of, node);
  1704. }
  1705. return 0;
  1706. }
  1707. /*
  1708. * MDP5 based devices don't have a flat hierarchy. There is a top level
  1709. * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the
  1710. * children devices, find the MDP5 node, and then add the interfaces
  1711. * to our components list.
  1712. */
  1713. if (of_device_is_compatible(dev->of_node, "qcom,mdss")) {
  1714. ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
  1715. if (ret) {
  1716. DISP_DEV_ERR(dev, "failed to populate children devices\n");
  1717. return ret;
  1718. }
  1719. mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
  1720. if (!mdp_dev) {
  1721. DISP_DEV_ERR(dev, "failed to find MDSS MDP node\n");
  1722. of_platform_depopulate(dev);
  1723. return -ENODEV;
  1724. }
  1725. put_device(mdp_dev);
  1726. /* add the MDP component itself */
  1727. component_match_add(dev, matchptr, compare_of,
  1728. mdp_dev->of_node);
  1729. } else {
  1730. /* MDP4 */
  1731. mdp_dev = dev;
  1732. }
  1733. ret = add_components_mdp(mdp_dev, matchptr);
  1734. if (ret)
  1735. of_platform_depopulate(dev);
  1736. return ret;
  1737. }
  1738. struct msm_gem_address_space *
  1739. msm_gem_smmu_address_space_get(struct drm_device *dev,
  1740. unsigned int domain)
  1741. {
  1742. struct msm_drm_private *priv = NULL;
  1743. struct msm_kms *kms;
  1744. const struct msm_kms_funcs *funcs;
  1745. struct msm_gem_address_space *aspace;
  1746. if (!iommu_present(&platform_bus_type))
  1747. return ERR_PTR(-ENODEV);
  1748. if ((!dev) || (!dev->dev_private))
  1749. return ERR_PTR(-EINVAL);
  1750. priv = dev->dev_private;
  1751. kms = priv->kms;
  1752. if (!kms)
  1753. return ERR_PTR(-EINVAL);
  1754. funcs = kms->funcs;
  1755. if ((!funcs) || (!funcs->get_address_space))
  1756. return ERR_PTR(-EINVAL);
  1757. aspace = funcs->get_address_space(priv->kms, domain);
  1758. return aspace ? aspace : ERR_PTR(-EINVAL);
  1759. }
  1760. int msm_get_mixer_count(struct msm_drm_private *priv,
  1761. const struct drm_display_mode *mode,
  1762. const struct msm_resource_caps_info *res, u32 *num_lm)
  1763. {
  1764. struct msm_kms *kms;
  1765. const struct msm_kms_funcs *funcs;
  1766. if (!priv) {
  1767. DRM_ERROR("invalid drm private struct\n");
  1768. return -EINVAL;
  1769. }
  1770. kms = priv->kms;
  1771. if (!kms) {
  1772. DRM_ERROR("invalid msm kms struct\n");
  1773. return -EINVAL;
  1774. }
  1775. funcs = kms->funcs;
  1776. if (!funcs || !funcs->get_mixer_count) {
  1777. DRM_ERROR("invalid function pointers\n");
  1778. return -EINVAL;
  1779. }
  1780. return funcs->get_mixer_count(priv->kms, mode, res, num_lm);
  1781. }
  1782. int msm_get_dsc_count(struct msm_drm_private *priv,
  1783. u32 hdisplay, u32 *num_dsc)
  1784. {
  1785. struct msm_kms *kms;
  1786. const struct msm_kms_funcs *funcs;
  1787. if (!priv) {
  1788. DRM_ERROR("invalid drm private struct\n");
  1789. return -EINVAL;
  1790. }
  1791. kms = priv->kms;
  1792. if (!kms) {
  1793. DRM_ERROR("invalid msm kms struct\n");
  1794. return -EINVAL;
  1795. }
  1796. funcs = kms->funcs;
  1797. if (!funcs || !funcs->get_dsc_count) {
  1798. DRM_ERROR("invalid function pointers\n");
  1799. return -EINVAL;
  1800. }
  1801. return funcs->get_dsc_count(priv->kms, hdisplay, num_dsc);
  1802. }
  1803. static int msm_drm_bind(struct device *dev)
  1804. {
  1805. return msm_drm_component_init(dev);
  1806. }
  1807. static void msm_drm_unbind(struct device *dev)
  1808. {
  1809. msm_drm_uninit(dev);
  1810. }
  1811. static const struct component_master_ops msm_drm_ops = {
  1812. .bind = msm_drm_bind,
  1813. .unbind = msm_drm_unbind,
  1814. };
  1815. static int msm_drm_component_dependency_check(struct device *dev)
  1816. {
  1817. struct device_node *node;
  1818. struct device_node *np = dev->of_node;
  1819. unsigned int i;
  1820. if (!of_device_is_compatible(dev->of_node, "qcom,sde-kms"))
  1821. return 0;
  1822. for (i = 0; ; i++) {
  1823. node = of_parse_phandle(np, "connectors", i);
  1824. if (!node)
  1825. break;
  1826. if (of_node_name_eq(node,"qcom,sde_rscc") &&
  1827. of_device_is_available(node) &&
  1828. of_node_check_flag(node, OF_POPULATED)) {
  1829. struct platform_device *pdev =
  1830. of_find_device_by_node(node);
  1831. if (!platform_get_drvdata(pdev)) {
  1832. DISP_DEV_ERR(dev,
  1833. "qcom,sde_rscc not probed yet\n");
  1834. return -EPROBE_DEFER;
  1835. } else {
  1836. return 0;
  1837. }
  1838. }
  1839. }
  1840. return 0;
  1841. }
  1842. /*
  1843. * Platform driver:
  1844. */
  1845. static int msm_pdev_probe(struct platform_device *pdev)
  1846. {
  1847. int ret;
  1848. struct component_match *match = NULL;
  1849. ret = msm_drm_component_dependency_check(&pdev->dev);
  1850. if (ret)
  1851. return ret;
  1852. ret = msm_drm_device_init(pdev, &msm_driver);
  1853. if (ret)
  1854. return ret;
  1855. ret = add_display_components(&pdev->dev, &match);
  1856. if (ret)
  1857. return ret;
  1858. if (!match)
  1859. return -ENODEV;
  1860. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  1861. return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
  1862. }
  1863. static int msm_pdev_remove(struct platform_device *pdev)
  1864. {
  1865. component_master_del(&pdev->dev, &msm_drm_ops);
  1866. of_platform_depopulate(&pdev->dev);
  1867. return 0;
  1868. }
  1869. static void msm_pdev_shutdown(struct platform_device *pdev)
  1870. {
  1871. struct drm_device *ddev = platform_get_drvdata(pdev);
  1872. struct msm_drm_private *priv = NULL;
  1873. if (!ddev) {
  1874. DRM_ERROR("invalid drm device node\n");
  1875. return;
  1876. }
  1877. priv = ddev->dev_private;
  1878. if (!priv) {
  1879. DRM_ERROR("invalid msm drm private node\n");
  1880. return;
  1881. }
  1882. msm_lastclose(ddev);
  1883. /* set this after lastclose to allow kickoff from lastclose */
  1884. priv->shutdown_in_progress = true;
  1885. }
  1886. static const struct of_device_id dt_match[] = {
  1887. { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
  1888. { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
  1889. { .compatible = "qcom,sde-kms", .data = (void *)KMS_SDE },
  1890. {},
  1891. };
  1892. MODULE_DEVICE_TABLE(of, dt_match);
  1893. static struct platform_driver msm_platform_driver = {
  1894. .probe = msm_pdev_probe,
  1895. .remove = msm_pdev_remove,
  1896. .shutdown = msm_pdev_shutdown,
  1897. .driver = {
  1898. .name = "msm_drm",
  1899. .of_match_table = dt_match,
  1900. .pm = &msm_pm_ops,
  1901. .suppress_bind_attrs = true,
  1902. },
  1903. };
  1904. static int __init msm_drm_register(void)
  1905. {
  1906. if (!modeset)
  1907. return -EINVAL;
  1908. DBG("init");
  1909. sde_rsc_rpmh_register();
  1910. sde_rsc_register();
  1911. msm_smmu_driver_init();
  1912. sde_wb_register();
  1913. platform_driver_register(&msm_platform_driver);
  1914. dsi_display_register();
  1915. msm_hdcp_register();
  1916. dp_display_register();
  1917. msm_dsi_register();
  1918. msm_edp_register();
  1919. msm_hdmi_register();
  1920. return 0;
  1921. }
  1922. static void __exit msm_drm_unregister(void)
  1923. {
  1924. DBG("fini");
  1925. sde_wb_unregister();
  1926. msm_hdmi_unregister();
  1927. msm_edp_unregister();
  1928. msm_dsi_unregister();
  1929. sde_rotator_smmu_driver_unregister();
  1930. sde_rotator_unregister();
  1931. msm_smmu_driver_cleanup();
  1932. msm_hdcp_unregister();
  1933. dp_display_unregister();
  1934. dsi_display_unregister();
  1935. sde_rsc_unregister();
  1936. platform_driver_unregister(&msm_platform_driver);
  1937. }
  1938. module_init(msm_drm_register);
  1939. module_exit(msm_drm_unregister);
  1940. MODULE_AUTHOR("Rob Clark <[email protected]");
  1941. MODULE_DESCRIPTION("MSM DRM Driver");
  1942. MODULE_LICENSE("GPL");