// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/regmap.h>
#include <linux/device.h>
#include "wcd9378-registers.h"
extern const u8 wcd9378_reg_access[WCD9378_NUM_REGISTERS];
static struct reg_default wcd9378_defaults[] = {
{SWRS_SCP_SDCA_INTSTAT_1, 0x00},
{SWRS_SCP_SDCA_INTSTAT_2, 0x00},
{SWRS_SCP_SDCA_INTSTAT_2, 0x00},
{SWRS_SCP_SDCA_INTMASK_1, 0x00},
{SWRS_SCP_SDCA_INTMASK_2, 0x00},
{SWRS_SCP_SDCA_INTMASK_3, 0x00},
{SWRS_SCP_SDCA_INTRTYPE_1, 0x00},
{SWRS_SCP_SDCA_INTRTYPE_2, 0x00},
{SWRS_SCP_SDCA_INTRTYPE_3, 0x00},
{WCD9378_FUNC_EXT_ID_0, 0x00},
{WCD9378_FUNC_EXT_ID_1, 0x00},
{WCD9378_FUNC_EXT_VER, 0x00},
{WCD9378_FUNC_STAT, 0x67},
{WCD9378_DEV_MANU_ID_0, 0x17},
{WCD9378_DEV_MANU_ID_1, 0x02},
{WCD9378_DEV_PART_ID_0, 0x10},
{WCD9378_DEV_PART_ID_1, 0x01},
{WCD9378_DEV_VER, 0x10},
{WCD9378_ANA_PAGE, 0x00},
{WCD9378_ANA_BIAS, 0x00},
{WCD9378_ANA_RX_SUPPLIES, 0x00},
{WCD9378_ANA_HPH, 0x0c},
{WCD9378_ANA_EAR, 0x00},
{WCD9378_ANA_EAR_COMPANDER_CTL, 0x02},
{WCD9378_ANA_TX_CH1, 0x20},
{WCD9378_ANA_TX_CH2, 0x00},
{WCD9378_ANA_TX_CH3, 0x20},
{WCD9378_ANA_TX_CH3_HPF, 0x00},
{WCD9378_ANA_MICB1_MICB2_DSP_EN_LOGIC, 0x00},
{WCD9378_ANA_MICB3_DSP_EN_LOGIC, 0x00},
{WCD9378_ANA_MBHC_MECH, 0x39},
{WCD9378_ANA_MBHC_ELECT, 0x08},
{WCD9378_ANA_MBHC_ZDET, 0x00},
{WCD9378_ANA_MBHC_RESULT_1, 0x00},
{WCD9378_ANA_MBHC_RESULT_2, 0x00},
{WCD9378_ANA_MBHC_RESULT_3, 0x00},
{WCD9378_ANA_MBHC_BTN0, 0x00},
{WCD9378_ANA_MBHC_BTN1, 0x10},
{WCD9378_ANA_MBHC_BTN2, 0x20},
{WCD9378_ANA_MBHC_BTN3, 0x30},
{WCD9378_ANA_MBHC_BTN4, 0x40},
{WCD9378_ANA_MBHC_BTN5, 0x50},
{WCD9378_ANA_MBHC_BTN6, 0x60},
{WCD9378_ANA_MBHC_BTN7, 0x70},
{WCD9378_ANA_MICB1, 0x10},
{WCD9378_ANA_MICB2, 0x10},
{WCD9378_ANA_MICB2_RAMP, 0x00},
{WCD9378_ANA_MICB3, 0x00},
{WCD9378_BIAS_CTL, 0x2a},
{WCD9378_BIAS_VBG_FINE_ADJ, 0x55},
{WCD9378_LDOL_VDDCX_ADJUST, 0x01},
{WCD9378_LDOL_DISABLE_LDOL, 0x00},
{WCD9378_MBHC_CTL_CLK, 0x00},
{WCD9378_MBHC_CTL_ANA, 0x00},
{WCD9378_MBHC_CTL_SPARE_1, 0x02},
{WCD9378_MBHC_CTL_SPARE_2, 0x00},
{WCD9378_MBHC_CTL_BCS, 0x00},
{WCD9378_MBHC_MOISTURE_DET_FSM_STATUS, 0x00},
{WCD9378_MBHC_TEST_CTL, 0x00},
{WCD9378_LDOH_MODE, 0x2b},
{WCD9378_LDOH_BIAS, 0x68},
{WCD9378_LDOH_STB_LOADS, 0x00},
{WCD9378_LDOH_SLOWRAMP, 0x50},
{WCD9378_MICB1_TEST_CTL_1, 0x1a},
{WCD9378_MICB1_TEST_CTL_2, 0x00},
{WCD9378_MICB1_TEST_CTL_3, 0xa4},
{WCD9378_MICB2_TEST_CTL_1, 0x1a},
{WCD9378_MICB2_TEST_CTL_2, 0x00},
{WCD9378_MICB2_TEST_CTL_3, 0x24},
{WCD9378_MICB3_TEST_CTL_1, 0x9a},
{WCD9378_MICB3_TEST_CTL_2, 0x80},
{WCD9378_MICB3_TEST_CTL_3, 0x24},
{WCD9378_TX_COM_ADC_VCM, 0x39},
{WCD9378_TX_COM_BIAS_ATEST, 0xe0},
{WCD9378_TX_COM_SPARE1, 0x00},
{WCD9378_TX_COM_SPARE2, 0x00},
{WCD9378_TX_COM_TXFE_DIV_CTL, 0x22},
{WCD9378_TX_COM_TXFE_DIV_START, 0x00},
{WCD9378_TX_COM_SPARE3, 0x00},
{WCD9378_TX_COM_SPARE4, 0x00},
{WCD9378_TX_1_2_TEST_EN, 0xcc},
{WCD9378_TX_1_2_ADC_IB, 0xe9},
{WCD9378_TX_1_2_ATEST_REFCTL, 0x0b},
{WCD9378_TX_1_2_TEST_CTL, 0x38},
{WCD9378_TX_1_2_TEST_BLK_EN1, 0xff},
{WCD9378_TX_1_2_TXFE1_CLKDIV, 0x00},
{WCD9378_TX_1_2_SAR2_ERR, 0x00},
{WCD9378_TX_1_2_SAR1_ERR, 0x00},
{WCD9378_TX_3_TEST_EN, 0xcc},
{WCD9378_TX_3_ADC_IB, 0xe9},
{WCD9378_TX_3_ATEST_REFCTL, 0x0b},
{WCD9378_TX_3_TEST_CTL, 0x38},
{WCD9378_TX_3_TEST_BLK_EN3, 0xff},
{WCD9378_TX_3_TXFE3_CLKDIV, 0x00},
{WCD9378_TX_3_SAR4_ERR, 0x00},
{WCD9378_TX_3_SAR3_ERR, 0x00},
{WCD9378_TX_3_TEST_BLK_EN2, 0xfb},
{WCD9378_TX_3_TXFE2_CLKDIV, 0x00},
{WCD9378_TX_3_SPARE1, 0x00},
{WCD9378_TX_3_TEST_BLK_EN4, 0xfb},
{WCD9378_TX_3_SPARE2, 0x00},
{WCD9378_TX_3_SPARE3, 0x00},
{WCD9378_RX_AUX_SW_CTL, 0x00},
{WCD9378_RX_PA_AUX_IN_CONN, 0x00},
{WCD9378_RX_TIMER_DIV, 0x32},
{WCD9378_RX_OCP_CTL, 0x1f},
{WCD9378_RX_OCP_COUNT, 0x77},
{WCD9378_RX_BIAS_EAR_DAC, 0xa0},
{WCD9378_RX_BIAS_EAR_AMP, 0xaa},
{WCD9378_RX_BIAS_HPH_LDO, 0xa9},
{WCD9378_RX_BIAS_HPH_PA, 0xaa},
{WCD9378_RX_BIAS_HPH_RDACBUFF_CNP2, 0x8a},
{WCD9378_RX_BIAS_HPH_RDAC_LDO, 0x88},
{WCD9378_RX_BIAS_HPH_CNP1, 0x82},
{WCD9378_RX_BIAS_HPH_LOWPOWER, 0x82},
{WCD9378_RX_BIAS_AUX_DAC, 0xa0},
{WCD9378_RX_BIAS_AUX_AMP, 0xaa},
{WCD9378_RX_SPARE_1, 0x50},
{WCD9378_RX_SPARE_2, 0x00},
{WCD9378_RX_SPARE_3, 0x08},
{WCD9378_RX_SPARE_4, 0x44},
{WCD9378_RX_SPARE_5, 0x40},
{WCD9378_RX_SPARE_6, 0xaa},
{WCD9378_RX_SPARE_7, 0x14},
{WCD9378_HPH_L_STATUS, 0x04},
{WCD9378_HPH_R_STATUS, 0x04},
{WCD9378_HPH_CNP_EN, 0x80},
{WCD9378_HPH_CNP_WG_CTL, 0x9a},
{WCD9378_HPH_CNP_WG_TIME, 0x14},
{WCD9378_HPH_OCP_CTL, 0x28},
{WCD9378_HPH_AUTO_CHOP, 0x16},
{WCD9378_HPH_CHOP_CTL, 0x83},
{WCD9378_HPH_PA_CTL1, 0x46},
{WCD9378_HPH_PA_CTL2, 0x50},
{WCD9378_HPH_L_EN, 0x80},
{WCD9378_HPH_L_TEST, 0xe0},
{WCD9378_HPH_L_ATEST, 0x50},
{WCD9378_HPH_R_EN, 0x80},
{WCD9378_HPH_R_TEST, 0xe0},
{WCD9378_HPH_R_ATEST, 0x54},
{WCD9378_HPH_RDAC_CLK_CTL1, 0x99},
{WCD9378_HPH_RDAC_CLK_CTL2, 0x9b},
{WCD9378_HPH_RDAC_LDO_CTL, 0x33},
{WCD9378_HPH_RDAC_CHOP_CLK_LP_CTL, 0x00},
{WCD9378_HPH_REFBUFF_UHQA_CTL, 0xa8},
{WCD9378_HPH_REFBUFF_LP_CTL, 0x0e},
{WCD9378_HPH_L_DAC_CTL, 0x20},
{WCD9378_HPH_R_DAC_CTL, 0x20},
{WCD9378_HPH_SURGE_HPHLR_SURGE_COMP_SEL, 0x55},
{WCD9378_HPH_SURGE_HPHLR_SURGE_EN, 0x19},
{WCD9378_HPH_SURGE_HPHLR_SURGE_MISC1, 0xa0},
{WCD9378_HPH_SURGE_HPHLR_SURGE_STATUS, 0x00},
{WCD9378_EAR_EAR_EN_REG, 0x22},
{WCD9378_EAR_EAR_PA_CON, 0x44},
{WCD9378_EAR_EAR_SP_CON, 0xdb},
{WCD9378_EAR_EAR_DAC_CON, 0x80},
{WCD9378_EAR_EAR_CNP_FSM_CON, 0xb2},
{WCD9378_EAR_TEST_CTL, 0x00},
{WCD9378_EAR_STATUS_REG_1, 0x00},
{WCD9378_EAR_STATUS_REG_2, 0x00},
{WCD9378_ANA_NEW_PAGE, 0x00},
{WCD9378_HPH_NEW_ANA_HPH2, 0x00},
{WCD9378_HPH_NEW_ANA_HPH3, 0x00},
{WCD9378_SLEEP_CTL, 0x16},
{WCD9378_SLEEP_WATCHDOG_CTL, 0x00},
{WCD9378_MBHC_NEW_ELECT_REM_CLAMP_CTL, 0x00},
{WCD9378_MBHC_NEW_CTL_1, 0x0e},
{WCD9378_MBHC_NEW_CTL_2, 0x05},
{WCD9378_MBHC_NEW_PLUG_DETECT_CTL, 0xe9},
{WCD9378_MBHC_NEW_ZDET_ANA_CTL, 0x0f},
{WCD9378_MBHC_NEW_ZDET_RAMP_CTL, 0x00},
{WCD9378_MBHC_NEW_FSM_STATUS, 0x00},
{WCD9378_MBHC_NEW_ADC_RESULT, 0x00},
{WCD9378_AUX_AUXPA, 0x00},
{WCD9378_DIE_CRACK_DIE_CRK_DET_EN, 0x00},
{WCD9378_DIE_CRACK_DIE_CRK_DET_OUT, 0x00},
{WCD9378_TX_NEW_TX_CH12_MUX, 0x11},
{WCD9378_TX_NEW_TX_CH34_MUX, 0x23},
{WCD9378_HPH_NEW_INT_RDAC_GAIN_CTL, 0x40},
{WCD9378_HPH_NEW_INT_RDAC_HD2_CTL_L, 0x81},
{WCD9378_HPH_NEW_INT_RDAC_VREF_CTL, 0x10},
{WCD9378_HPH_NEW_INT_RDAC_OVERRIDE_CTL, 0x00},
{WCD9378_HPH_NEW_INT_RDAC_HD2_CTL_R, 0x81},
{WCD9378_HPH_NEW_INT_PA_MISC1, 0x22},
{WCD9378_HPH_NEW_INT_PA_MISC2, 0x00},
{WCD9378_HPH_NEW_INT_PA_RDAC_MISC, 0x01},
{WCD9378_HPH_NEW_INT_HPH_TIMER1, 0xfe},
{WCD9378_HPH_NEW_INT_HPH_TIMER2, 0x02},
{WCD9378_HPH_NEW_INT_HPH_TIMER3, 0x4e},
{WCD9378_HPH_NEW_INT_HPH_TIMER4, 0x54},
{WCD9378_HPH_NEW_INT_PA_RDAC_MISC2, 0x00},
{WCD9378_HPH_NEW_INT_PA_RDAC_MISC3, 0x00},
{WCD9378_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI, 0x62},
{WCD9378_RX_NEW_INT_HPH_RDAC_BIAS_ULP, 0x01},
{WCD9378_RX_NEW_INT_HPH_RDAC_LDO_LP, 0x11},
{WCD9378_CP_CLASSG_CP_CTRL_0, 0x00},
{WCD9378_CP_CLASSG_CP_CTRL_1, 0x00},
{WCD9378_CP_CLASSG_CP_CTRL_2, 0x23},
{WCD9378_CP_CLASSG_CP_CTRL_3, 0x03},
{WCD9378_CP_CLASSG_CP_CTRL_4, 0x00},
{WCD9378_CP_CLASSG_CP_CTRL_5, 0x0a},
{WCD9378_CP_CLASSG_CP_CTRL_6, 0x00},
{WCD9378_CP_CLASSG_CP_CTRL_7, 0x00},
{WCD9378_CP_VNEGDAC_CTRL_0, 0x23},
{WCD9378_CP_VNEGDAC_CTRL_1, 0x00},
{WCD9378_CP_VNEGDAC_CTRL_2, 0x00},
{WCD9378_CP_VNEGDAC_CTRL_3, 0x00},
{WCD9378_CP_CP_DTOP_CTRL_0, 0x00},
{WCD9378_CP_CP_DTOP_CTRL_1, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_2, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_3, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_4, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_5, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_6, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_7, 0x03},
{WCD9378_CP_CP_DTOP_CTRL_8, 0x33},
{WCD9378_CP_CP_DTOP_CTRL_9, 0x63},
{WCD9378_CP_CP_DTOP_CTRL_10, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_11, 0x03},
{WCD9378_CP_CP_DTOP_CTRL_12, 0x1b},
{WCD9378_CP_CP_DTOP_CTRL_13, 0x00},
{WCD9378_CP_CP_DTOP_CTRL_14, 0x00},
{WCD9378_CP_CP_DTOP_CTRL_15, 0xff},
{WCD9378_CP_CP_DTOP_CTRL_16, 0x00},
{WCD9378_CP_CP_DTOP_CTRL_17, 0x06},
{WCD9378_CP_CP_DTOP_CTRL_18, 0x00},
{WCD9378_CP_CP_DTOP_CTRL_19, 0x00},
{WCD9378_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL, 0x57},
{WCD9378_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL, 0x01},
{WCD9378_MBHC_NEW_INT_MECH_DET_CURRENT, 0x00},
{WCD9378_MBHC_NEW_INT_SPARE_2, 0x00},
{WCD9378_EAR_INT_NEW_EAR_CHOPPER_CON, 0xa8},
{WCD9378_EAR_INT_NEW_CNP_VCM_CON1, 0x42},
{WCD9378_EAR_INT_NEW_CNP_VCM_CON2, 0x22},
{WCD9378_EAR_INT_NEW_EAR_DYNAMIC_BIAS, 0x00},
{WCD9378_AUX_INT_EN_REG, 0x00},
{WCD9378_AUX_INT_PA_CTRL, 0x06},
{WCD9378_AUX_INT_SP_CTRL, 0xd2},
{WCD9378_AUX_INT_DAC_CTRL, 0x80},
{WCD9378_AUX_INT_CLK_CTRL, 0x50},
{WCD9378_AUX_INT_TEST_CTRL, 0x00},
{WCD9378_AUX_INT_STATUS_REG, 0x00},
{WCD9378_AUX_INT_MISC, 0x00},
{WCD9378_SLEEP_INT_WATCHDOG_CTL_1, 0x0a},
{WCD9378_SLEEP_INT_WATCHDOG_CTL_2, 0x0a},
{WCD9378_DIE_CRACK_INT_DIE_CRK_DET_INT1, 0x02},
{WCD9378_DIE_CRACK_INT_DIE_CRK_DET_INT2, 0x60},
{WCD9378_TX_COM_NEW_INT_TXFE_DIVSTOP_L2, 0xff},
{WCD9378_TX_COM_NEW_INT_TXFE_DIVSTOP_L1, 0x7f},
{WCD9378_TX_COM_NEW_INT_TXFE_DIVSTOP_L0, 0x3f},
{WCD9378_TX_COM_NEW_INT_SPARE1, 0x1f},
{WCD9378_TX_COM_NEW_INT_SPARE2, 0x0f},
{WCD9378_TX_COM_NEW_INT_TXFE_NINIT_L2, 0xd7},
{WCD9378_TX_COM_NEW_INT_TXFE_NINIT_L1, 0xc8},
{WCD9378_TX_COM_NEW_INT_TXFE_NINIT_L0, 0xc6},
{WCD9378_TX_COM_NEW_INT_SPARE3, 0x95},
{WCD9378_TX_COM_NEW_INT_SPARE4, 0x6a},
{WCD9378_TX_COM_NEW_INT_SPARE5, 0x05},
{WCD9378_TX_COM_NEW_INT_SPARE6, 0xa5},
{WCD9378_TX_COM_NEW_INT_SPARE7, 0x13},
{WCD9378_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1, 0x88},
{WCD9378_TX_COM_NEW_INT_TXADC_SCBIAS_L0, 0x42},
{WCD9378_TX_COM_NEW_INT_TXADC_INT_L2, 0xff},
{WCD9378_TX_COM_NEW_INT_TXADC_INT_L1, 0x64},
{WCD9378_TX_COM_NEW_INT_TXADC_INT_L0, 0x64},
{WCD9378_TX_COM_NEW_INT_SPARE8, 0x77},
{WCD9378_TAMBORA_PAGE, 0x00},
{WCD9378_CHIP_ID0, 0x00},
{WCD9378_CHIP_ID1, 0x00},
{WCD9378_CHIP_ID2, 0x10},
{WCD9378_CHIP_ID3, 0x01},
{WCD9378_SWR_TX_CLK_RATE, 0x00},
{WCD9378_CDC_RST_CTL, 0x03},
{WCD9378_TOP_CLK_CFG, 0x00},
{WCD9378_CDC_ANA_CLK_CTL, 0x00},
{WCD9378_CDC_DIG_CLK_CTL, 0x70},
{WCD9378_SWR_RST_EN, 0x1f},
{WCD9378_CDC_PATH_MODE, 0x00},
{WCD9378_CDC_RX_RST, 0x00},
{WCD9378_CDC_RX0_CTL, 0xfc},
{WCD9378_CDC_RX1_CTL, 0xfc},
{WCD9378_CDC_RX2_CTL, 0xfc},
{WCD9378_CDC_TX_ANA_MODE_0_1, 0x00},
{WCD9378_CDC_TX_ANA_MODE_2_3, 0x00},
{WCD9378_CDC_COMP_CTL_0, 0x00},
{WCD9378_CDC_ANA_TX_CLK_CTL, 0x0e},
{WCD9378_CDC_HPH_DSM_A1_0, 0x00},
{WCD9378_CDC_HPH_DSM_A1_1, 0x01},
{WCD9378_CDC_HPH_DSM_A2_0, 0x63},
{WCD9378_CDC_HPH_DSM_A2_1, 0x04},
{WCD9378_CDC_HPH_DSM_A3_0, 0xac},
{WCD9378_CDC_HPH_DSM_A3_1, 0x04},
{WCD9378_CDC_HPH_DSM_A4_0, 0x1a},
{WCD9378_CDC_HPH_DSM_A4_1, 0x03},
{WCD9378_CDC_HPH_DSM_A5_0, 0xbc},
{WCD9378_CDC_HPH_DSM_A5_1, 0x02},
{WCD9378_CDC_HPH_DSM_A6_0, 0xc7},
{WCD9378_CDC_HPH_DSM_A7_0, 0xf8},
{WCD9378_CDC_HPH_DSM_C_0, 0x47},
{WCD9378_CDC_HPH_DSM_C_1, 0x43},
{WCD9378_CDC_HPH_DSM_C_2, 0xb1},
{WCD9378_CDC_HPH_DSM_C_3, 0x17},
{WCD9378_CDC_HPH_DSM_R1, 0x4d},
{WCD9378_CDC_HPH_DSM_R2, 0x29},
{WCD9378_CDC_HPH_DSM_R3, 0x34},
{WCD9378_CDC_HPH_DSM_R4, 0x59},
{WCD9378_CDC_HPH_DSM_R5, 0x66},
{WCD9378_CDC_HPH_DSM_R6, 0x87},
{WCD9378_CDC_HPH_DSM_R7, 0x64},
{WCD9378_CDC_AUX_DSM_A1_0, 0x00},
{WCD9378_CDC_AUX_DSM_A1_1, 0x01},
{WCD9378_CDC_AUX_DSM_A2_0, 0x96},
{WCD9378_CDC_AUX_DSM_A2_1, 0x09},
{WCD9378_CDC_AUX_DSM_A3_0, 0xab},
{WCD9378_CDC_AUX_DSM_A3_1, 0x05},
{WCD9378_CDC_AUX_DSM_A4_0, 0x1c},
{WCD9378_CDC_AUX_DSM_A4_1, 0x02},
{WCD9378_CDC_AUX_DSM_A5_0, 0x17},
{WCD9378_CDC_AUX_DSM_A5_1, 0x02},
{WCD9378_CDC_AUX_DSM_A6_0, 0xaa},
{WCD9378_CDC_AUX_DSM_A7_0, 0xe3},
{WCD9378_CDC_AUX_DSM_C_0, 0x69},
{WCD9378_CDC_AUX_DSM_C_1, 0x54},
{WCD9378_CDC_AUX_DSM_C_2, 0x02},
{WCD9378_CDC_AUX_DSM_C_3, 0x15},
{WCD9378_CDC_AUX_DSM_R1, 0xa4},
{WCD9378_CDC_AUX_DSM_R2, 0xb5},
{WCD9378_CDC_AUX_DSM_R3, 0x86},
{WCD9378_CDC_AUX_DSM_R4, 0x85},
{WCD9378_CDC_AUX_DSM_R5, 0xaa},
{WCD9378_CDC_AUX_DSM_R6, 0xe2},
{WCD9378_CDC_AUX_DSM_R7, 0x62},
{WCD9378_CDC_HPH_GAIN_RX_0, 0x55},
{WCD9378_CDC_HPH_GAIN_RX_1, 0xa9},
{WCD9378_CDC_HPH_GAIN_DSD_0, 0x3d},
{WCD9378_CDC_HPH_GAIN_DSD_1, 0x2e},
{WCD9378_CDC_HPH_GAIN_DSD_2, 0x01},
{WCD9378_CDC_AUX_GAIN_DSD_0, 0x00},
{WCD9378_CDC_AUX_GAIN_DSD_1, 0xfc},
{WCD9378_CDC_AUX_GAIN_DSD_2, 0x01},
{WCD9378_CDC_HPH_GAIN_CTL, 0x00},
{WCD9378_CDC_AUX_GAIN_CTL, 0x00},
{WCD9378_CDC_PATH_CTL, 0x00},
{WCD9378_CDC_SWR_CLG, 0x00},
{WCD9378_SWR_CLG_BYP, 0x00},
{WCD9378_CDC_TX0_CTL, 0x68},
{WCD9378_CDC_TX1_CTL, 0x68},
{WCD9378_CDC_TX2_CTL, 0x68},
{WCD9378_CDC_TX_RST, 0x00},
{WCD9378_CDC_REQ_CTL, 0x01},
{WCD9378_CDC_RST, 0x00},
{WCD9378_CDC_AMIC_CTL, 0x07},
{WCD9378_CDC_DMIC_CTL, 0x04},
{WCD9378_CDC_DMIC1_CTL, 0x01},
{WCD9378_CDC_DMIC2_CTL, 0x01},
{WCD9378_CDC_DMIC3_CTL, 0x01},
{WCD9378_EFUSE_PRG_CTL, 0x00},
{WCD9378_EFUSE_CTL, 0x2b},
{WCD9378_CDC_DMIC_RATE_1_2, 0x11},
{WCD9378_CDC_DMIC_RATE_3_4, 0x01},
{WCD9378_PDM_WD_EN_OVRD, 0x00},
{WCD9378_PDM_WD_CTL0, 0x0f},
{WCD9378_PDM_WD_CTL1, 0x0f},
{WCD9378_PDM_WD_CTL2, 0x01},
{WCD9378_RAMP_CTL, 0x07},
{WCD9378_ACT_DET_CTL, 0x00},
{WCD9378_ACT_DET_HOOKUP0, 0x00},
{WCD9378_ACT_DET_HOOKUP1, 0x07},
{WCD9378_ACT_DET_HOOKUP2, 0x00},
{WCD9378_ACT_DET_DLY_BUF_EN, 0x1f},
{WCD9378_INTR_MODE, 0x00},
{WCD9378_INTR_STATUS_0, 0x00},
{WCD9378_INTR_STATUS_1, 0x00},
{WCD9378_INTR_STATUS_2, 0x00},
{WCD9378_INTR_STATUS_3, 0x00},
{WCD9378_INTR_MASK_0, 0xff},
{WCD9378_INTR_MASK_1, 0xff},
{WCD9378_INTR_MASK_2, 0x3f},
{WCD9378_INTR_MASK_3, 0x00},
{WCD9378_INTR_SET_0, 0x00},
{WCD9378_INTR_SET_1, 0x00},
{WCD9378_INTR_SET_2, 0x00},
{WCD9378_INTR_SET_3, 0x00},
{WCD9378_INTR_TEST_0, 0x00},
{WCD9378_INTR_TEST_1, 0x00},
{WCD9378_INTR_TEST_2, 0x00},
{WCD9378_INTR_TEST_3, 0x3e},
{WCD9378_TX_MODE_DBG_EN, 0x00},
{WCD9378_TX_MODE_DBG_0_1, 0x00},
{WCD9378_TX_MODE_DBG_2_3, 0x00},
{WCD9378_LB_IN_SEL_CTL, 0x00},
{WCD9378_LOOP_BACK_MODE, 0x00},
{WCD9378_SWR_DAC_TEST, 0x00},
{WCD9378_SWR_HM_TEST_RX_0, 0x40},
{WCD9378_SWR_HM_TEST_TX_0, 0x40},
{WCD9378_SWR_HM_TEST_RX_1, 0x00},
{WCD9378_SWR_HM_TEST_TX_1, 0x00},
{WCD9378_SWR_HM_TEST_0, 0x00},
{WCD9378_PAD_CTL_SWR_0, 0x8f},
{WCD9378_PAD_CTL_SWR_1, 0x06},
{WCD9378_I2C_CTL, 0x00},
{WCD9378_LEGACY_SW_MODE, 0x00},
{WCD9378_EFUSE_TEST_CTL_0, 0x00},
{WCD9378_EFUSE_TEST_CTL_1, 0x00},
{WCD9378_EFUSE_T_DATA_0, 0x00},
{WCD9378_PAD_CTL_PDM_RX0, 0xf1},
{WCD9378_PAD_CTL_PDM_RX1, 0xf1},
{WCD9378_PAD_CTL_PDM_TX0, 0xf1},
{WCD9378_PAD_CTL_PDM_TX1, 0xf1},
{WCD9378_PAD_INP_DIS_0, 0x2a},
{WCD9378_DRIVE_STRENGTH_0, 0x00},
{WCD9378_DRIVE_STRENGTH_1, 0x00},
{WCD9378_RX_DATA_EDGE_CTL, 0x1c},
{WCD9378_TX_DATA_EDGE_CTL, 0x10},
{WCD9378_GPIO_MODE, 0x00},
{WCD9378_PIN_CTL_OE, 0x00},
{WCD9378_PIN_CTL_DATA_0, 0x00},
{WCD9378_PIN_STATUS_0, 0x00},
{WCD9378_DIG_DEBUG_CTL, 0x00},
{WCD9378_DIG_DEBUG_EN, 0x00},
{WCD9378_ANA_CSR_DBG_ADD, 0x00},
{WCD9378_ANA_CSR_DBG_CTL, 0x48},
{WCD9378_SSP_DBG, 0x00},
{WCD9378_MODE_STATUS_0, 0x00},
{WCD9378_MODE_STATUS_1, 0x00},
{WCD9378_SPARE_0, 0x00},
{WCD9378_SPARE_1, 0x00},
{WCD9378_SPARE_2, 0x00},
{WCD9378_EFUSE_REG_0, 0x00},
{WCD9378_EFUSE_REG_1, 0xff},
{WCD9378_EFUSE_REG_2, 0xff},
{WCD9378_EFUSE_REG_3, 0xff},
{WCD9378_EFUSE_REG_4, 0xff},
{WCD9378_EFUSE_REG_5, 0xff},
{WCD9378_EFUSE_REG_6, 0xff},
{WCD9378_EFUSE_REG_7, 0xff},
{WCD9378_EFUSE_REG_8, 0xff},
{WCD9378_EFUSE_REG_9, 0xff},
{WCD9378_EFUSE_REG_10, 0xff},
{WCD9378_EFUSE_REG_11, 0xff},
{WCD9378_EFUSE_REG_12, 0xff},
{WCD9378_EFUSE_REG_13, 0xff},
{WCD9378_EFUSE_REG_14, 0xff},
{WCD9378_EFUSE_REG_15, 0xff},
{WCD9378_EFUSE_REG_16, 0xff},
{WCD9378_EFUSE_REG_17, 0xff},
{WCD9378_EFUSE_REG_18, 0xff},
{WCD9378_EFUSE_REG_19, 0xff},
{WCD9378_EFUSE_REG_20, 0x0e},
{WCD9378_EFUSE_REG_21, 0x00},
{WCD9378_EFUSE_REG_22, 0x00},
{WCD9378_EFUSE_REG_23, 0xf6},
{WCD9378_EFUSE_REG_24, 0x17},
{WCD9378_EFUSE_REG_25, 0x00},
{WCD9378_EFUSE_REG_26, 0x00},
{WCD9378_EFUSE_REG_27, 0x00},
{WCD9378_EFUSE_REG_28, 0x00},
{WCD9378_EFUSE_REG_29, 0x00},
{WCD9378_EFUSE_REG_30, 0x09},
{WCD9378_EFUSE_REG_31, 0xf6},
{WCD9378_TX_REQ_FB_CTL_2, 0x11},
{WCD9378_TX_REQ_FB_CTL_3, 0x00},
{WCD9378_TX_REQ_FB_CTL_4, 0x00},
{WCD9378_DEM_BYPASS_DATA0, 0x55},
{WCD9378_DEM_BYPASS_DATA1, 0x55},
{WCD9378_DEM_BYPASS_DATA2, 0x55},
{WCD9378_DEM_BYPASS_DATA3, 0x01},
{WCD9378_RX0_PCM_RAMP_STEP, 0x05},
{WCD9378_RX0_DSD_RAMP_STEP, 0x0e},
{WCD9378_RX1_PCM_RAMP_STEP, 0x05},
{WCD9378_RX1_DSD_RAMP_STEP, 0x0e},
{WCD9378_RX2_RAMP_STEP, 0x0e},
{WCD9378_PLATFORM_CTL, 0x01},
{WCD9378_CLK_DIV_CFG, 0x03},
{WCD9378_DRE_DLY_VAL, 0x88},
{WCD9378_SYS_USAGE_CTRL, 0x00},
{WCD9378_SURGE_CTL, 0x00},
{WCD9378_SEQ_CTL, 0x00},
{WCD9378_HPH_UP_T0, 0x02},
{WCD9378_HPH_UP_T1, 0x02},
{WCD9378_HPH_UP_T2, 0x02},
{WCD9378_HPH_UP_T3, 0x02},
{WCD9378_HPH_UP_T4, 0x02},
{WCD9378_HPH_UP_T5, 0x03},
{WCD9378_HPH_UP_T6, 0x02},
{WCD9378_HPH_UP_T7, 0x06},
{WCD9378_HPH_UP_T8, 0x02},
{WCD9378_HPH_UP_T9, 0x02},
{WCD9378_HPH_UP_T10, 0x00},
{WCD9378_HPH_DN_T0, 0x05},
{WCD9378_HPH_DN_T1, 0x06},
{WCD9378_HPH_DN_T2, 0x02},
{WCD9378_HPH_DN_T3, 0x02},
{WCD9378_HPH_DN_T4, 0x02},
{WCD9378_HPH_DN_T5, 0x02},
{WCD9378_HPH_DN_T6, 0x02},
{WCD9378_HPH_DN_T7, 0x02},
{WCD9378_HPH_DN_T8, 0x02},
{WCD9378_HPH_DN_T9, 0x02},
{WCD9378_HPH_DN_T10, 0x02},
{WCD9378_HPH_UP_STAGE_LOC_0, 0x00},
{WCD9378_HPH_UP_STAGE_LOC_1, 0x01},
{WCD9378_HPH_UP_STAGE_LOC_2, 0x02},
{WCD9378_HPH_UP_STAGE_LOC_3, 0x03},
{WCD9378_HPH_UP_STAGE_LOC_4, 0x04},
{WCD9378_HPH_UP_STAGE_LOC_5, 0x05},
{WCD9378_HPH_UP_STAGE_LOC_6, 0x06},
{WCD9378_HPH_UP_STAGE_LOC_7, 0x07},
{WCD9378_HPH_UP_STAGE_LOC_8, 0x08},
{WCD9378_HPH_UP_STAGE_LOC_9, 0x09},
{WCD9378_HPH_UP_STAGE_LOC_10, 0x0a},
{WCD9378_HPH_DN_STAGE_LOC_0, 0x08},
{WCD9378_HPH_DN_STAGE_LOC_1, 0x09},
{WCD9378_HPH_DN_STAGE_LOC_2, 0x06},
{WCD9378_HPH_DN_STAGE_LOC_3, 0x05},
{WCD9378_HPH_DN_STAGE_LOC_4, 0x04},
{WCD9378_HPH_DN_STAGE_LOC_5, 0x03},
{WCD9378_HPH_DN_STAGE_LOC_6, 0x07},
{WCD9378_HPH_DN_STAGE_LOC_7, 0x01},
{WCD9378_HPH_DN_STAGE_LOC_8, 0x02},
{WCD9378_HPH_DN_STAGE_LOC_9, 0x0a},
{WCD9378_HPH_DN_STAGE_LOC_10, 0x00},
{WCD9378_SA_UP_T0, 0x02},
{WCD9378_SA_UP_T1, 0x02},
{WCD9378_SA_UP_T2, 0x02},
{WCD9378_SA_UP_T3, 0x02},
{WCD9378_SA_UP_T4, 0x02},
{WCD9378_SA_UP_T5, 0x06},
{WCD9378_SA_UP_T6, 0x02},
{WCD9378_SA_UP_T7, 0x00},
{WCD9378_SA_DN_T0, 0x05},
{WCD9378_SA_DN_T1, 0x06},
{WCD9378_SA_DN_T2, 0x02},
{WCD9378_SA_DN_T3, 0x02},
{WCD9378_SA_DN_T4, 0x02},
{WCD9378_SA_DN_T5, 0x03},
{WCD9378_SA_DN_T6, 0x02},
{WCD9378_SA_DN_T7, 0x06},
{WCD9378_SA_UP_STAGE_LOC_0, 0x00},
{WCD9378_SA_UP_STAGE_LOC_1, 0x01},
{WCD9378_SA_UP_STAGE_LOC_2, 0x02},
{WCD9378_SA_UP_STAGE_LOC_3, 0x03},
{WCD9378_SA_UP_STAGE_LOC_4, 0x04},
{WCD9378_SA_UP_STAGE_LOC_5, 0x05},
{WCD9378_SA_UP_STAGE_LOC_6, 0x06},
{WCD9378_SA_UP_STAGE_LOC_7, 0x07},
{WCD9378_SA_DN_STAGE_LOC_0, 0x05},
{WCD9378_SA_DN_STAGE_LOC_1, 0x06},
{WCD9378_SA_DN_STAGE_LOC_2, 0x04},
{WCD9378_SA_DN_STAGE_LOC_3, 0x03},
{WCD9378_SA_DN_STAGE_LOC_4, 0x02},
{WCD9378_SA_DN_STAGE_LOC_5, 0x01},
{WCD9378_SA_DN_STAGE_LOC_6, 0x07},
{WCD9378_SA_DN_STAGE_LOC_7, 0x00},
{WCD9378_TX0_UP_T0, 0x02},
{WCD9378_TX0_UP_T1, 0x02},
{WCD9378_TX0_UP_T2, 0x02},
{WCD9378_TX0_UP_T3, 0x00},
{WCD9378_TX0_DN_T0, 0x02},
{WCD9378_TX0_DN_T1, 0x02},
{WCD9378_TX0_DN_T2, 0x02},
{WCD9378_TX0_DN_T3, 0x00},
{WCD9378_TX0_UP_STAGE_LOC_0, 0x00},
{WCD9378_TX0_UP_STAGE_LOC_1, 0x01},
{WCD9378_TX0_UP_STAGE_LOC_2, 0x02},
{WCD9378_TX0_UP_STAGE_LOC_3, 0x03},
{WCD9378_TX0_DN_STAGE_LOC_0, 0x02},
{WCD9378_TX0_DN_STAGE_LOC_1, 0x00},
{WCD9378_TX0_DN_STAGE_LOC_2, 0x01},
{WCD9378_TX0_DN_STAGE_LOC_3, 0x03},
{WCD9378_TX1_UP_T0, 0x02},
{WCD9378_TX1_UP_T1, 0x02},
{WCD9378_TX1_UP_T2, 0x02},
{WCD9378_TX1_UP_T3, 0x00},
{WCD9378_TX1_DN_T0, 0x02},
{WCD9378_TX1_DN_T1, 0x02},
{WCD9378_TX1_DN_T2, 0x02},
{WCD9378_TX1_DN_T3, 0x00},
{WCD9378_TX1_UP_STAGE_LOC_0, 0x00},
{WCD9378_TX1_UP_STAGE_LOC_1, 0x01},
{WCD9378_TX1_UP_STAGE_LOC_2, 0x02},
{WCD9378_TX1_UP_STAGE_LOC_3, 0x03},
{WCD9378_TX1_DN_STAGE_LOC_0, 0x02},
{WCD9378_TX1_DN_STAGE_LOC_1, 0x00},
{WCD9378_TX1_DN_STAGE_LOC_2, 0x01},
{WCD9378_TX1_DN_STAGE_LOC_3, 0x03},
{WCD9378_TX2_UP_T0, 0x02},
{WCD9378_TX2_UP_T1, 0x02},
{WCD9378_TX2_UP_T2, 0x02},
{WCD9378_TX2_UP_T3, 0x00},
{WCD9378_TX2_DN_T0, 0x02},
{WCD9378_TX2_DN_T1, 0x02},
{WCD9378_TX2_DN_T2, 0x02},
{WCD9378_TX2_DN_T3, 0x00},
{WCD9378_TX2_UP_STAGE_LOC_0, 0x00},
{WCD9378_TX2_UP_STAGE_LOC_1, 0x01},
{WCD9378_TX2_UP_STAGE_LOC_2, 0x02},
{WCD9378_TX2_UP_STAGE_LOC_3, 0x03},
{WCD9378_TX2_DN_STAGE_LOC_0, 0x02},
{WCD9378_TX2_DN_STAGE_LOC_1, 0x00},
{WCD9378_TX2_DN_STAGE_LOC_2, 0x01},
{WCD9378_TX2_DN_STAGE_LOC_3, 0x03},
{WCD9378_SEQ_HPH_STAT, 0x00},
{WCD9378_SEQ_SA_STAT, 0x00},
{WCD9378_SEQ_TX0_STAT, 0x00},
{WCD9378_SEQ_TX1_STAT, 0x00},
{WCD9378_SEQ_TX2_STAT, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_0, 0x18},
{WCD9378_MICB_REMAP_TABLE_VAL_1, 0x22},
{WCD9378_MICB_REMAP_TABLE_VAL_2, 0x24},
{WCD9378_MICB_REMAP_TABLE_VAL_3, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_4, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_5, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_6, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_7, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_8, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_9, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_10, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_11, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_12, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_13, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_14, 0x00},
{WCD9378_MICB_REMAP_TABLE_VAL_15, 0x00},
{WCD9378_SM0_MB_SEL, 0x00},
{WCD9378_SM1_MB_SEL, 0x00},
{WCD9378_SM2_MB_SEL, 0x00},
{WCD9378_MB_PULLUP_EN, 0x00},
{WCD9378_BYP_EN_CTL0, 0x00},
{WCD9378_BYP_EN_CTL1, 0x00},
{WCD9378_BYP_EN_CTL2, 0x00},
{WCD9378_SEQ_OVRRIDE_CTL0, 0x00},
{WCD9378_SEQ_OVRRIDE_CTL1, 0x00},
{WCD9378_SEQ_OVRRIDE_CTL2, 0x00},
{WCD9378_HPH_SEQ_OVRRIDE_CTL0, 0x00},
{WCD9378_HPH_SEQ_OVRRIDE_CTL1, 0x00},
{WCD9378_SA_SEQ_OVRRIDE_CTL, 0x00},
{WCD9378_TX0_SEQ_OVRRIDE_CTL, 0x00},
{WCD9378_TX1_SEQ_OVRRIDE_CTL, 0x00},
{WCD9378_TX2_SEQ_OVRRIDE_CTL, 0x00},
{WCD9378_FORCE_CTL, 0x00},
{WCD9378_DEVICE_DET, 0x03},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_0, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_0, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_0, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_0, 0x01},
{WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_0, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_0, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_1, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_1, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_1, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_1, 0x01},
{WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_1, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_1, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_2, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_2, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_2, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_2, 0x01},
{WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_2, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_2, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_3, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_3, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_3, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_3, 0x01},
{WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_3, 0x00},
{WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_3, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_0, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_0, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_0, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_0, 0x01},
{WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_0, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_0, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_0, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_0, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_0, 0x00},
{WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_0, 0x00},
{WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_0, 0x00},
{WCD9378_TYPE1_WRAP_RTC_OOC_SEL_0, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_1, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_1, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_1, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_1, 0x01},
{WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_1, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_1, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_1, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_1, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_1, 0x00},
{WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_1, 0x00},
{WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_1, 0x00},
{WCD9378_TYPE1_WRAP_RTC_OOC_SEL_1, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_2, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_2, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_2, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_2, 0x01},
{WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_2, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_2, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_2, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_2, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_2, 0x00},
{WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_2, 0x00},
{WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_2, 0x00},
{WCD9378_TYPE1_WRAP_RTC_OOC_SEL_2, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_3, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_3, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_3, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_3, 0x01},
{WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_3, 0x00},
{WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_3, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_3, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_3, 0x00},
{WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_3, 0x00},
{WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_3, 0x00},
{WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_3, 0x00},
{WCD9378_TYPE1_WRAP_RTC_OOC_SEL_3, 0x00},
{WCD9378_SDCA_MESSAGE_GATE, 0x00},
{WCD9378_MBHC_DATA_IN_EDGE, 0x00},
{WCD9378_MBHC_RESET, 0x00},
{WCD9378_MBHC_DEBUG, 0x00},
{WCD9378_MBHC_DEBUG_UMP_0, 0x00},
{WCD9378_MBHC_DEBUG_UMP_1, 0x00},
{WCD9378_MBHC_DEBUG_UMP_2, 0x00},
{WCD9378_HID_FUNC_EXT_ID_0, 0x00},
{WCD9378_HID_FUNC_EXT_ID_1, 0x00},
{WCD9378_HID_FUNC_EXT_VER, 0x00},
{WCD9378_HID_FUNC_STAT, 0x67},
{WCD9378_HID_CUR_OWNER, 0x01},
{WCD9378_HID_MSG_OFFSET, 0x44000001},
{WCD9378_HID_MSG_LENGTH, 0x04},
{WCD9378_HID_DEV_MANU_ID_0, 0x17},
{WCD9378_HID_DEV_MANU_ID_1, 0x02},
{WCD9378_HID_DEV_PART_ID_0, 0x10},
{WCD9378_HID_DEV_PART_ID_1, 0x01},
{WCD9378_HID_DEV_VER, 0x10},
{WCD9378_SMP_AMP_FUNC_EXT_ID_0, 0x00},
{WCD9378_SMP_AMP_FUNC_EXT_ID_1, 0x00},
{WCD9378_SMP_AMP_FUNC_EXT_VER, 0x00},
{WCD9378_XU22_BYP, 0x01},
{WCD9378_PDE22_REQ_PS, 0x03},
{WCD9378_FU23_MUTE, 0x01},
{WCD9378_PDE23_REQ_PS, 0x03},
{WCD9378_SMP_AMP_FUNC_STAT, 0x67},
{WCD9378_FUNC_ACT, 0x00},
{WCD9378_PDE22_ACT_PS, 0x03},
{WCD9378_SAPU29_PROT_MODE, 0x00},
{WCD9378_SAPU29_PROT_STAT, 0x00},
{WCD9378_PDE23_ACT_PS, 0x03},
{WCD9378_SMP_AMP_DEV_MANU_ID_0, 0x17},
{WCD9378_SMP_AMP_DEV_MANU_ID_1, 0x02},
{WCD9378_SMP_AMP_DEV_PART_ID_0, 0x10},
{WCD9378_SMP_AMP_DEV_PART_ID_1, 0x01},
{WCD9378_SMP_AMP_DEV_VER, 0x10},
{WCD9378_CMT_GRP_MASK, 0x00},
{WCD9378_SMP_JACK_FUNC_EXT_ID_0, 0x00},
{WCD9378_SMP_JACK_FUNC_EXT_ID_1, 0x00},
{WCD9378_SMP_JACK_FUNC_EXT_VER, 0x00},
{WCD9378_IT41_USAGE, 0x03},
{WCD9378_XU42_BYP, 0x01},
{WCD9378_PDE42_REQ_PS, 0x03},
{WCD9378_FU42_MUTE_CH1, 0x01},
{WCD9378_FU42_MUTE_CH2, 0x01},
{WCD9378_FU42_MUTE_CH1_CN, 0x01},
{WCD9378_FU42_MUTE_CH2_CN, 0x01},
{WCD9378_FU42_CH_VOL_CH1, 0xe200},
{WCD9378_FU42_CH_VOL_CH1_MSB, 0xe2},
{WCD9378_FU42_CH_VOL_CH1_LSB, 0x00},
{WCD9378_FU42_CH_VOL_CH2, 0xe200},
{WCD9378_FU42_CH_VOL_CH2_MSB, 0xe2},
{WCD9378_FU42_CH_VOL_CH2_LSB, 0x00},
{WCD9378_SU43_SELECTOR, 0x01},
{WCD9378_SU45_SELECTOR, 0x01},
{WCD9378_PDE47_REQ_PS, 0x03},
{WCD9378_GE35_SEL_MODE, 0x00},
{WCD9378_GE35_DET_MODE, 0x00},
{WCD9378_IT31_MICB, 0x00},
{WCD9378_IT31_USAGE, 0x03},
{WCD9378_PDE34_REQ_PS, 0x03},
{WCD9378_SU45_TX_SELECTOR, 0x01},
{WCD9378_XU36_BYP, 0x01},
{WCD9378_PDE36_REQ_PS, 0x03},
{WCD9378_OT36_USAGE, 0x03},
{WCD9378_SMP_JACK_FUNC_STAT, 0x67},
{WCD9378_SMP_JACK_FUNC_ACT, 0x00},
{WCD9378_PDE42_ACT_PS, 0x03},
{WCD9378_PDE47_ACT_PS, 0x03},
{WCD9378_PDE34_ACT_PS, 0x03},
{WCD9378_PDE36_ACT_PS, 0x03},
{WCD9378_SMP_JACK_DEV_MANU_ID_0, 0x17},
{WCD9378_SMP_JACK_DEV_MANU_ID_1, 0x02},
{WCD9378_SMP_JACK_DEV_PART_ID_0, 0x10},
{WCD9378_SMP_JACK_DEV_PART_ID_1, 0x01},
{WCD9378_SMP_JACK_DEV_VER, 0x10},
{WCD9378_SMP_MIC_CTRL0_FUNC_EXT_ID_0, 0x00},
{WCD9378_SMP_MIC_CTRL0_FUNC_EXT_ID_1, 0x00},
{WCD9378_SMP_MIC_CTRL0_FUNC_EXT_VER, 0x00},
{WCD9378_IT11_MICB, 0x00},
{WCD9378_IT11_USAGE, 0x03},
{WCD9378_PDE11_REQ_PS, 0x03},
{WCD9378_OT10_USAGE, 0x03},
{WCD9378_SMP_MIC_CTRL0_FUNC_STAT, 0x67},
{WCD9378_SMP_MIC_CTRL0_FUNC_ACT, 0x00},
{WCD9378_PDE11_ACT_PS, 0x03},
{WCD9378_SMP_MIC_CTRL0_DEV_MANU_ID_0, 0x17},
{WCD9378_SMP_MIC_CTRL0_DEV_MANU_ID_1, 0x02},
{WCD9378_SMP_MIC_CTRL0_DEV_PART_ID_0, 0x10},
{WCD9378_SMP_MIC_CTRL0_DEV_PART_ID_1, 0x01},
{WCD9378_SMP_MIC_CTRL0_DEV_VER, 0x10},
{WCD9378_SMP_MIC_CTRL1_FUNC_EXT_ID_0, 0x00},
{WCD9378_SMP_MIC_CTRL1_FUNC_EXT_ID_1, 0x00},
{WCD9378_SMP_MIC_CTRL1_FUNC_EXT_VER, 0x00},
{WCD9378_SMP_MIC_CTRL1_IT11_MICB, 0x00},
{WCD9378_SMP_MIC_CTRL1_IT11_USAGE, 0x03},
{WCD9378_SMP_MIC_CTRL1_PDE11_REQ_PS, 0x03},
{WCD9378_SMP_MIC_CTRL1_OT10_USAGE, 0x03},
{WCD9378_SMP_MIC_CTRL1_FUNC_STAT, 0x67},
{WCD9378_SMP_MIC_CTRL1_FUNC_ACT, 0x00},
{WCD9378_SMP_MIC_CTRL1_PDE11_ACT_PS, 0x03},
{WCD9378_SMP_MIC_CTRL1_DEV_MANU_ID_0, 0x17},
{WCD9378_SMP_MIC_CTRL1_DEV_MANU_ID_1, 0x02},
{WCD9378_SMP_MIC_CTRL1_DEV_PART_ID_0, 0x10},
{WCD9378_SMP_MIC_CTRL1_DEV_PART_ID_1, 0x01},
{WCD9378_SMP_MIC_CTRL1_DEV_VER, 0x10},
{WCD9378_SMP_MIC_CTRL2_FUNC_EXT_ID_0, 0x00},
{WCD9378_SMP_MIC_CTRL2_FUNC_EXT_ID_1, 0x00},
{WCD9378_SMP_MIC_CTRL2_FUNC_EXT_VER, 0x00},
{WCD9378_SMP_MIC_CTRL2_IT11_MICB, 0x00},
{WCD9378_SMP_MIC_CTRL2_IT11_USAGE, 0x03},
{WCD9378_SMP_MIC_CTRL2_PDE11_REQ_PS, 0x03},
{WCD9378_SMP_MIC_CTRL2_OT10_USAGE, 0x03},
{WCD9378_SMP_MIC_CTRL2_FUNC_STAT, 0x67},
{WCD9378_SMP_MIC_CTRL2_FUNC_ACT, 0x00},
{WCD9378_SMP_MIC_CTRL2_PDE11_ACT_PS, 0x03},
{WCD9378_SMP_MIC_CTRL2_DEV_MANU_ID_0, 0x17},
{WCD9378_SMP_MIC_CTRL2_DEV_MANU_ID_1, 0x02},
{WCD9378_SMP_MIC_CTRL2_DEV_PART_ID_0, 0x10},
{WCD9378_SMP_MIC_CTRL2_DEV_PART_ID_1, 0x01},
{WCD9378_SMP_MIC_CTRL2_DEV_VER, 0x10},
{WCD9378_REPORT_ID, 0x01},
{WCD9378_MESSAGE0, 0x00},
{WCD9378_MESSAGE1, 0x00},
{WCD9378_MESSAGE2, 0x00},
};
static bool wcd9378_readable_register(struct device *dev, unsigned int reg)
{
if (reg <= WCD9378_BASE) {
switch (reg) {
case SWRS_SCP_SDCA_INTSTAT_1:
case SWRS_SCP_SDCA_INTSTAT_2:
case SWRS_SCP_SDCA_INTSTAT_3:
case SWRS_SCP_SDCA_INTMASK_1:
case SWRS_SCP_SDCA_INTMASK_2:
case SWRS_SCP_SDCA_INTMASK_3:
case SWRS_SCP_SDCA_INTRTYPE_1:
case SWRS_SCP_SDCA_INTRTYPE_2:
case SWRS_SCP_SDCA_INTRTYPE_3:
break;
default:
return false;
}
}
if (wcd9378_reg_access[WCD9378_REG(reg)] & RD_REG)
return true;
else
return false;
}
static bool wcd9378_writeable_register(struct device *dev, unsigned int reg)
{
if (reg <= WCD9378_BASE) {
switch (reg) {
case SWRS_SCP_SDCA_INTSTAT_1:
case SWRS_SCP_SDCA_INTSTAT_2:
case SWRS_SCP_SDCA_INTSTAT_3:
case SWRS_SCP_SDCA_INTMASK_1:
case SWRS_SCP_SDCA_INTMASK_2:
case SWRS_SCP_SDCA_INTMASK_3:
case SWRS_SCP_SDCA_INTRTYPE_1:
case SWRS_SCP_SDCA_INTRTYPE_2:
case SWRS_SCP_SDCA_INTRTYPE_3:
break;
default:
return false;
}
}
if (wcd9378_reg_access[WCD9378_REG(reg)] & WR_REG)
return true;
else
return false;
}
static bool wcd9378_volatile_register(struct device *dev, unsigned int reg)
{
if (reg <= WCD9378_BASE) {
switch (reg) {
case SWRS_SCP_SDCA_INTSTAT_1:
case SWRS_SCP_SDCA_INTSTAT_2:
case SWRS_SCP_SDCA_INTSTAT_3:
case SWRS_SCP_SDCA_INTMASK_1:
case SWRS_SCP_SDCA_INTMASK_2:
case SWRS_SCP_SDCA_INTMASK_3:
case SWRS_SCP_SDCA_INTRTYPE_1:
case SWRS_SCP_SDCA_INTRTYPE_2:
case SWRS_SCP_SDCA_INTRTYPE_3:
return true;
default:
return false;
}
}
if ((wcd9378_reg_access[WCD9378_REG(reg)] & RD_REG) &&
!(wcd9378_reg_access[WCD9378_REG(reg)] & WR_REG))
return true;
else
return false;
}
struct regmap_config wcd9378_regmap_config = {
.reg_bits = 32,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
.reg_defaults = wcd9378_defaults,
.num_reg_defaults = ARRAY_SIZE(wcd9378_defaults),
.max_register = WCD9378_MAX_REGISTER,
.volatile_reg = wcd9378_volatile_register,
.readable_reg = wcd9378_readable_register,
.writeable_reg = wcd9378_writeable_register,
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
.val_format_endian = REGMAP_ENDIAN_NATIVE,
.can_multi_write = true,
.use_single_read = true,
};