/* * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the * above copyright notice and this permission notice appear in all * copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ /* * This file contains the API definitions for the Unified Wireless Module * Interface (WMI). */ #ifndef _WMI_UNIFIED_PARAM_H_ #define _WMI_UNIFIED_PARAM_H_ #include #ifdef CONVERGED_TDLS_ENABLE #include #endif #define MAC_MAX_KEY_LENGTH 32 #define MAC_PN_LENGTH 8 #define MAX_MAC_HEADER_LEN 32 #define MIN_MAC_HEADER_LEN 24 #define QOS_CONTROL_LEN 2 #define IEEE80211_ADDR_LEN 6 /* size of 802.11 address */ #define WMI_MAC_MAX_SSID_LENGTH 32 #define WMI_SCAN_MAX_NUM_SSID 0x0A #ifndef CONFIG_HL_SUPPORT #define mgmt_tx_dl_frm_len 64 #else #define mgmt_tx_dl_frm_len 1532 #endif #define WMI_SMPS_MASK_LOWER_16BITS 0xFF #define WMI_SMPS_MASK_UPPER_3BITS 0x7 #define WMI_SMPS_PARAM_VALUE_S 29 #define WMI_UNIT_TEST_MAX_NUM_ARGS 100 /* The size of the utc time in bytes. */ #define WMI_SIZE_UTC_TIME (10) /* The size of the utc time error in bytes. */ #define WMI_SIZE_UTC_TIME_ERROR (5) #define WMI_MCC_MIN_CHANNEL_QUOTA 20 #define WMI_MCC_MAX_CHANNEL_QUOTA 80 #define WMI_MCC_MIN_NON_ZERO_CHANNEL_LATENCY 30 #define WMI_BEACON_TX_BUFFER_SIZE (512) #define WMI_WIFI_SCANNING_MAC_OUI_LENGTH 3 #define WMI_EXTSCAN_MAX_SIGNIFICANT_CHANGE_APS 64 #define WMI_RSSI_THOLD_DEFAULT -300 #define WMI_NLO_FREQ_THRESH 1000 #define WMI_SEC_TO_MSEC(sec) (sec * 1000) #define WMI_MSEC_TO_USEC(msec) (msec * 1000) #define WMI_ETH_LEN 64 #define WMI_QOS_NUM_TSPEC_MAX 2 #define WMI_IPV4_ADDR_LEN 4 #define WMI_KEEP_ALIVE_NULL_PKT 1 #define WMI_KEEP_ALIVE_UNSOLICIT_ARP_RSP 2 #define WMI_MAC_MAX_KEY_LENGTH 32 #define WMI_KRK_KEY_LEN 16 #ifdef WLAN_FEATURE_ROAM_OFFLOAD #define WMI_BTK_KEY_LEN 32 #define WMI_ROAM_R0KH_ID_MAX_LEN 48 #define WMI_ROAM_SCAN_PSK_SIZE 32 #endif #define WMI_NOISE_FLOOR_DBM_DEFAULT (-96) #define WMI_EXTSCAN_MAX_HOTLIST_SSIDS 8 #define WMI_ROAM_MAX_CHANNELS 80 #ifdef FEATURE_WLAN_EXTSCAN #define WMI_MAX_EXTSCAN_MSG_SIZE 1536 #define WMI_EXTSCAN_REST_TIME 100 #define WMI_EXTSCAN_MAX_SCAN_TIME 50000 #define WMI_EXTSCAN_BURST_DURATION 150 #endif #define WMI_SCAN_NPROBES_DEFAULT (2) #define WMI_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */ #define WMI_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */ #define WMI_NLO_FREQ_THRESH 1000 /* in MHz */ #define WMI_SVC_MSG_MAX_SIZE 1536 #define MAX_UTF_EVENT_LENGTH 2048 #define MAX_WMI_UTF_LEN 252 #define MAX_WMI_QVIT_LEN 252 #define THERMAL_LEVELS 4 #define WMI_HOST_BCN_FLT_MAX_SUPPORTED_IES 256 #define WMI_HOST_BCN_FLT_MAX_ELEMS_IE_LIST \ (WMI_HOST_BCN_FLT_MAX_SUPPORTED_IES/32) #define LTEU_MAX_BINS 10 #define ATF_ACTIVED_MAX_CLIENTS 50 #define ATF_ACTIVED_MAX_ATFGROUPS 16 #define CTL_5G_SIZE 1536 #define CTL_2G_SIZE 684 #define MAX_CTL_SIZE (CTL_5G_SIZE > CTL_2G_SIZE ? CTL_5G_SIZE : CTL_2G_SIZE) #define IEEE80211_MICBUF_SIZE (8+8) #define IEEE80211_TID_SIZE 17 #define WME_NUM_AC 4 #define SMART_ANT_MODE_SERIAL 0 #define SMART_ANT_MODE_PARALLEL 1 #define IEEE80211_WEP_NKID 4 /* number of key ids */ #define WPI_IV_LEN 16 #define WMI_SCAN_MAX_NUM_BSSID 10 #define MAX_CHANS 1023 #define TARGET_OEM_CONFIGURE_LCI 0x0A #define RTT_LCI_ALTITUDE_MASK 0x3FFFFFFF #define TARGET_OEM_CONFIGURE_LCR 0x09 #define RTT_TIMEOUT_MS 180 #define MAX_SUPPORTED_RATES 128 #define WMI_HOST_MAX_BUFFER_SIZE 1712 #define WMI_HAL_MAX_SANTENNA 4 #define WMI_HOST_PDEV_VI_PRIORITY_BIT (1<<2) #define WMI_HOST_PDEV_BEACON_PRIORITY_BIT (1<<4) #define WMI_HOST_PDEV_MGMT_PRIORITY_BIT (1<<5) #define WMI_MAX_CMDS 1024 #define FIPS_ALIGN 4 #define FIPS_ALIGNTO(__addr, __to) \ ((((unsigned long int)(__addr)) + (__to) - 1) & ~((__to) - 1)) #define FIPS_IS_ALIGNED(__addr, __to) \ (!(((unsigned long int)(__addr)) & ((__to)-1))) #define WMI_HOST_MAX_SERIAL_ANTENNA 2 #define WMI_SMART_ANT_MAX_RATE_SERIES 2 #define WMI_HOST_F_MS(_v, _f) \ (((_v) & (_f)) >> (_f##_S)) #define WMI_HOST_F_RMW(_var, _v, _f) \ do { \ (_var) &= ~(_f); \ (_var) |= (((_v) << (_f##_S)) & (_f)); \ } while (0) /* vdev capabilities bit mask */ #define WMI_HOST_VDEV_BEACON_SUPPORT 0x1 #define WMI_HOST_VDEV_WDS_LRN_ENABLED 0x2 #define WMI_HOST_VDEV_VOW_ENABLED 0x4 #define WMI_HOST_VDEV_IS_BEACON_SUPPORTED(param) \ ((param) & WMI_HOST_VDEV_BEACON_SUPPORT) #define WMI_HOST_VDEV_IS_WDS_LRN_ENABLED(param) \ ((param) & WMI_HOST_VDEV_WDS_LRN_ENABLED) #define WMI_HOST_VDEV_IS_VOW_ENABLED(param) \ ((param) & WMI_HOST_VDEV_VOW_ENABLED) /* TXBF capabilities masks */ #define WMI_HOST_TXBF_CONF_SU_TX_BFEE_S 0 #define WMI_HOST_TXBF_CONF_SU_TX_BFEE_M 0x1 #define WMI_HOST_TXBF_CONF_SU_TX_BFEE \ (WMI_HOST_TXBF_CONF_SU_TX_BFEE_M << WMI_HOST_TXBF_CONF_SU_TX_BFEE_S) #define WMI_HOST_TXBF_CONF_SU_TX_BFEE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_SU_TX_BFEE) #define WMI_HOST_TXBF_CONF_SU_TX_BFEE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_SU_TX_BFEE) #define WMI_HOST_TXBF_CONF_MU_TX_BFEE_S 1 #define WMI_HOST_TXBF_CONF_MU_TX_BFEE_M 0x1 #define WMI_HOST_TXBF_CONF_MU_TX_BFEE \ (WMI_HOST_TXBF_CONF_MU_TX_BFEE_M << WMI_HOST_TXBF_CONF_MU_TX_BFEE_S) #define WMI_HOST_TXBF_CONF_MU_TX_BFEE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_MU_TX_BFEE) #define WMI_HOST_TXBF_CONF_MU_TX_BFEE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_MU_TX_BFEE) #define WMI_HOST_TXBF_CONF_SU_TX_BFER_S 2 #define WMI_HOST_TXBF_CONF_SU_TX_BFER_M 0x1 #define WMI_HOST_TXBF_CONF_SU_TX_BFER \ (WMI_HOST_TXBF_CONF_SU_TX_BFER_M << WMI_HOST_TXBF_CONF_SU_TX_BFER_S) #define WMI_HOST_TXBF_CONF_SU_TX_BFER_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_SU_TX_BFER) #define WMI_HOST_TXBF_CONF_SU_TX_BFER_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_SU_TX_BFER) #define WMI_HOST_TXBF_CONF_MU_TX_BFER_S 3 #define WMI_HOST_TXBF_CONF_MU_TX_BFER_M 0x1 #define WMI_HOST_TXBF_CONF_MU_TX_BFER \ (WMI_HOST_TXBF_CONF_MU_TX_BFER_M << WMI_HOST_TXBF_CONF_MU_TX_BFER_S) #define WMI_HOST_TXBF_CONF_MU_TX_BFER_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_MU_TX_BFER) #define WMI_HOST_TXBF_CONF_MU_TX_BFER_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_MU_TX_BFER) #define WMI_HOST_TXBF_CONF_STS_CAP_S 4 #define WMI_HOST_TXBF_CONF_STS_CAP_M 0x7 #define WMI_HOST_TXBF_CONF_STS_CAP \ (WMI_HOST_TXBF_CONF_STS_CAP_M << WMI_HOST_TXBF_CONF_STS_CAP_S) #define WMI_HOST_TXBF_CONF_STS_CAP_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_STS_CAP); #define WMI_HOST_TXBF_CONF_STS_CAP_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_STS_CAP) #define WMI_HOST_TXBF_CONF_IMPLICIT_BF_S 7 #define WMI_HOST_TXBF_CONF_IMPLICIT_BF_M 0x1 #define WMI_HOST_TXBF_CONF_IMPLICIT_BF \ (WMI_HOST_TXBF_CONF_IMPLICIT_BF_M << WMI_HOST_TXBF_CONF_IMPLICIT_BF_S) #define WMI_HOST_TXBF_CONF_IMPLICIT_BF_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_IMPLICIT_BF) #define WMI_HOST_TXBF_CONF_IMPLICIT_BF_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_IMPLICIT_BF) #define WMI_HOST_TXBF_CONF_BF_SND_DIM_S 8 #define WMI_HOST_TXBF_CONF_BF_SND_DIM_M 0x7 #define WMI_HOST_TXBF_CONF_BF_SND_DIM \ (WMI_HOST_TXBF_CONF_BF_SND_DIM_M << WMI_HOST_TXBF_CONF_BF_SND_DIM_S) #define WMI_HOST_TXBF_CONF_BF_SND_DIM_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TXBF_CONF_BF_SND_DIM) #define WMI_HOST_TXBF_CONF_BF_SND_DIM_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_BF_SND_DIM) /* The following WMI_HOST_HEOPS_BSSCOLOR_XXX macros correspond to the * WMI_HEOPS_COLOR_XXX macros in the FW wmi_unified.h */ #define WMI_HOST_HEOPS_BSSCOLOR_S 0 #define WMI_HOST_HEOPS_BSSCOLOR_M 0x3f #define WMI_HOST_HEOPS_BSSCOLOR \ (WMI_HOST_HEOPS_BSSCOLOR_M << WMI_HOST_HEOPS_BSSCOLOR_S) #define WMI_HOST_HEOPS_BSSCOLOR_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HEOPS_BSSCOLOR) #define WMI_HOST_HEOPS_BSSCOLOR_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HEOPS_BSSCOLOR) /* The following WMI_HOST_HEOPS_BSSCOLOR_DISABLE_XXX macros correspond to the * WMI_HEOPS_BSSCOLORDISABLE_XXX macros in the FW wmi_unified.h */ #define WMI_HOST_HEOPS_BSSCOLOR_DISABLE_S 30 #define WMI_HOST_HEOPS_BSSCOLOR_DISABLE_M 0x1 #define WMI_HOST_HEOPS_BSSCOLOR_DISABLE \ (WMI_HOST_HEOPS_BSSCOLOR_DISABLE_M << WMI_HOST_HEOPS_BSSCOLOR_DISABLE_S) #define WMI_HOST_HEOPS_BSSCOLOR_DISABLE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HEOPS_BSSCOLOR_DISABLE) #define WMI_HOST_HEOPS_BSSCOLOR_DISABLE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HEOPS_BSSCOLOR_DISABLE) /* HE BF capabilities mask */ #define WMI_HOST_HE_BF_CONF_SU_BFEE_S 0 #define WMI_HOST_HE_BF_CONF_SU_BFEE_M 0x1 #define WMI_HOST_HE_BF_CONF_SU_BFEE \ (WMI_HOST_HE_BF_CONF_SU_BFEE_M << WMI_HOST_HE_BF_CONF_SU_BFEE_S) #define WMI_HOST_HE_BF_CONF_SU_BFEE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_SU_BFEE) #define WMI_HOST_HE_BF_CONF_SU_BFEE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_SU_BFEE) #define WMI_HOST_HE_BF_CONF_SU_BFER_S 1 #define WMI_HOST_HE_BF_CONF_SU_BFER_M 0x1 #define WMI_HOST_HE_BF_CONF_SU_BFER \ (WMI_HOST_HE_BF_CONF_SU_BFER_M << WMI_HOST_HE_BF_CONF_SU_BFER_S) #define WMI_HOST_HE_BF_CONF_SU_BFER_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_SU_BFER) #define WMI_HOST_HE_BF_CONF_SU_BFER_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_SU_BFER) #define WMI_HOST_HE_BF_CONF_MU_BFEE_S 2 #define WMI_HOST_HE_BF_CONF_MU_BFEE_M 0x1 #define WMI_HOST_HE_BF_CONF_MU_BFEE \ (WMI_HOST_HE_BF_CONF_MU_BFEE_M << WMI_HOST_HE_BF_CONF_MU_BFEE_S) #define WMI_HOST_HE_BF_CONF_MU_BFEE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_MU_BFEE) #define WMI_HOST_HE_BF_CONF_MU_BFEE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_MU_BFEE) #define WMI_HOST_HE_BF_CONF_MU_BFER_S 3 #define WMI_HOST_HE_BF_CONF_MU_BFER_M 0x1 #define WMI_HOST_HE_BF_CONF_MU_BFER \ (WMI_HOST_HE_BF_CONF_MU_BFER_M << WMI_HOST_HE_BF_CONF_MU_BFER_S) #define WMI_HOST_HE_BF_CONF_MU_BFER_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_MU_BFER) #define WMI_HOST_HE_BF_CONF_MU_BFER_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_MU_BFER) #define WMI_HOST_HE_BF_CONF_DL_OFDMA_S 4 #define WMI_HOST_HE_BF_CONF_DL_OFDMA_M 0x1 #define WMI_HOST_HE_BF_CONF_DL_OFDMA \ (WMI_HOST_HE_BF_CONF_DL_OFDMA_M << WMI_HOST_HE_BF_CONF_DL_OFDMA_S) #define WMI_HOST_HE_BF_CONF_DL_OFDMA_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_DL_OFDMA) #define WMI_HOST_HE_BF_CONF_DL_OFDMA_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_DL_OFDMA) #define WMI_HOST_HE_BF_CONF_UL_OFDMA_S 5 #define WMI_HOST_HE_BF_CONF_UL_OFDMA_M 0x1 #define WMI_HOST_HE_BF_CONF_UL_OFDMA \ (WMI_HOST_HE_BF_CONF_UL_OFDMA_M << WMI_HOST_HE_BF_CONF_UL_OFDMA_S) #define WMI_HOST_HE_BF_CONF_UL_OFDMA_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_UL_OFDMA) #define WMI_HOST_HE_BF_CONF_UL_OFDMA_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_UL_OFDMA) #define WMI_HOST_HE_BF_CONF_UL_MUMIMO_S 6 #define WMI_HOST_HE_BF_CONF_UL_MUMIMO_M 0x1 #define WMI_HOST_HE_BF_CONF_UL_MUMIMO \ (WMI_HOST_HE_BF_CONF_UL_MUMIMO_M << WMI_HOST_HE_BF_CONF_UL_MUMIMO_S) #define WMI_HOST_HE_BF_CONF_UL_MUMIMO_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_UL_MUMIMO) #define WMI_HOST_HE_BF_CONF_UL_MUMIMO_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_UL_MUMIMO) /* HE or VHT Sounding */ #define WMI_HOST_HE_VHT_SOUNDING_MODE_S 0 #define WMI_HOST_HE_VHT_SOUNDING_MODE_M 0x1 #define WMI_HOST_HE_VHT_SOUNDING_MODE \ (WMI_HOST_HE_VHT_SOUNDING_MODE_M << WMI_HOST_HE_VHT_SOUNDING_MODE_S) #define WMI_HOST_HE_VHT_SOUNDING_MODE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_HE_VHT_SOUNDING_MODE) #define WMI_HOST_HE_VHT_SOUNDING_MODE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_HE_VHT_SOUNDING_MODE) /* SU or MU Sounding */ #define WMI_HOST_SU_MU_SOUNDING_MODE_S 2 #define WMI_HOST_SU_MU_SOUNDING_MODE_M 0x1 #define WMI_HOST_SU_MU_SOUNDING_MODE \ (WMI_HOST_SU_MU_SOUNDING_MODE_M << \ WMI_HOST_SU_MU_SOUNDING_MODE_S) #define WMI_HOST_SU_MU_SOUNDING_MODE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_SU_MU_SOUNDING_MODE) #define WMI_HOST_SU_MU_SOUNDING_MODE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_SU_MU_SOUNDING_MODE) /* Trig or Non-Trig Sounding */ #define WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE_S 3 #define WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE_M 0x1 #define WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE \ (WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE_M << \ WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE_S) #define WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE_GET(x) \ WMI_HOST_F_MS(x, WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE) #define WMI_HOST_HE_VHT_SU_MU_SOUNDING_MODE_SET(x, z) \ WMI_HOST_F_RMW(x, z, WMI_HOST_TRIG_NONTRIG_SOUNDING_MODE) #define WMI_HOST_TPC_RATE_MAX 160 #define WMI_HOST_TPC_TX_NUM_CHAIN 4 #define WMI_HOST_RXG_CAL_CHAN_MAX 8 #define WMI_HOST_MAX_NUM_CHAINS 8 #define WMI_MAX_NUM_OF_RATE_THRESH 4 #define WMI_HOST_PDEV_MAX_VDEVS 17 /* for QC98XX only */ /*6 modes (A, HT20, HT40, VHT20, VHT40, VHT80) * 3 reg dommains */ #define WMI_HOST_NUM_CTLS_5G 18 /*6 modes (B, G, HT20, HT40, VHT20, VHT40) * 3 reg domains */ #define WMI_HOST_NUM_CTLS_2G 18 #define WMI_HOST_NUM_BAND_EDGES_5G 8 #define WMI_HOST_NUM_BAND_EDGES_2G 4 /*Beelinier 5G*/ #define WMI_HOST_NUM_CTLS_5G_11A 9 #define WMI_HOST_NUM_BAND_EDGES_5G_11A 25 #define WMI_HOST_NUM_CTLS_5G_HT20 24 #define WMI_HOST_NUM_BAND_EDGES_5G_HT20 25 #define WMI_HOST_NUM_CTLS_5G_HT40 18 #define WMI_HOST_NUM_BAND_EDGES_5G_HT40 12 #define WMI_HOST_NUM_CTLS_5G_HT80 18 #define WMI_HOST_NUM_BAND_EDGES_5G_HT80 6 #define WMI_HOST_NUM_CTLS_5G_HT160 9 #define WMI_HOST_NUM_BAND_EDGES_5G_HT160 2 /* Beeliner 2G */ #define WMI_HOST_NUM_CTLS_2G_11B 6 #define WMI_HOST_NUM_BAND_EDGES_2G_11B 9 #define WMI_HOST_NUM_CTLS_2G_20MHZ 30 #define WMI_HOST_NUM_BAND_EDGES_2G_20MHZ 11 #define WMI_HOST_NUM_CTLS_2G_40MHZ 18 #define WMI_HOST_NUM_BAND_EDGES_2G_40MHZ 6 /* for QC98XX only */ #define WMI_HOST_TX_NUM_CHAIN 0x3 #define WMI_HOST_TPC_REGINDEX_MAX 4 #define WMI_HOST_ARRAY_GAIN_NUM_STREAMS 2 #include "qdf_atomic.h" #ifdef BIG_ENDIAN_HOST /* This API is used in copying in elements to WMI message, since WMI message uses multilpes of 4 bytes, This API converts length into multiples of 4 bytes, and performs copy */ #define WMI_HOST_IF_MSG_COPY_CHAR_ARRAY(destp, srcp, len) do { \ int j; \ u_int32_t *src, *dest; \ src = (u_int32_t *)srcp; \ dest = (u_int32_t *)destp; \ for (j = 0; j < roundup(len, sizeof(u_int32_t))/4; j++) { \ *(dest+j) = qdf_le32_to_cpu(*(src+j)); \ } \ } while (0) #else #define WMI_HOST_IF_MSG_COPY_CHAR_ARRAY(destp, srcp, len) OS_MEMCPY(destp,\ srcp, len) #endif /** macro to convert MAC address from WMI word format to char array */ #define WMI_HOST_MAC_ADDR_TO_CHAR_ARRAY(pwmi_mac_addr, c_macaddr) do { \ (c_macaddr)[0] = ((pwmi_mac_addr)->mac_addr31to0) & 0xff; \ (c_macaddr)[1] = (((pwmi_mac_addr)->mac_addr31to0) >> 8) & 0xff; \ (c_macaddr)[2] = (((pwmi_mac_addr)->mac_addr31to0) >> 16) & 0xff; \ (c_macaddr)[3] = (((pwmi_mac_addr)->mac_addr31to0) >> 24) & 0xff; \ (c_macaddr)[4] = ((pwmi_mac_addr)->mac_addr47to32) & 0xff; \ (c_macaddr)[5] = (((pwmi_mac_addr)->mac_addr47to32) >> 8) & 0xff; \ } while (0) #define TARGET_INIT_STATUS_SUCCESS 0x0 #define TARGET_INIT_STATUS_GEN_FAILED 0x1 #define TARGET_GET_INIT_STATUS_REASON(status) ((status) & 0xffff) #define TARGET_GET_INIT_STATUS_MODULE_ID(status) (((status) >> 16) & 0xffff) #define MAX_ASSOC_IE_LENGTH 1024 typedef uint32_t TARGET_INIT_STATUS; /** * @brief Opaque handle of wmi structure */ struct wmi_unified; typedef struct wmi_unified *wmi_unified_t; typedef void *ol_scn_t; /** * @wmi_event_handler function prototype */ typedef int (*wmi_unified_event_handler)(ol_scn_t scn_handle, uint8_t *event_buf, uint32_t len); /** * @WMI_HOST_WLAN_PHY_MODE: Host based enum ID for corresponding in * WLAN_PHY_MODE. This should be consistent with WLAN_PHY_MODE always to avoid * breaking the WMI */ typedef enum { WMI_HOST_MODE_11A = 0, /* 11a Mode */ WMI_HOST_MODE_11G = 1, /* 11b/g Mode */ WMI_HOST_MODE_11B = 2, /* 11b Mode */ WMI_HOST_MODE_11GONLY = 3, /* 11g only Mode */ WMI_HOST_MODE_11NA_HT20 = 4, /* 11a HT20 mode */ WMI_HOST_MODE_11NG_HT20 = 5, /* 11g HT20 mode */ WMI_HOST_MODE_11NA_HT40 = 6, /* 11a HT40 mode */ WMI_HOST_MODE_11NG_HT40 = 7, /* 11g HT40 mode */ WMI_HOST_MODE_11AC_VHT20 = 8, WMI_HOST_MODE_11AC_VHT40 = 9, WMI_HOST_MODE_11AC_VHT80 = 10, WMI_HOST_MODE_11AC_VHT20_2G = 11, WMI_HOST_MODE_11AC_VHT40_2G = 12, WMI_HOST_MODE_11AC_VHT80_2G = 13, WMI_HOST_MODE_11AC_VHT80_80 = 14, WMI_HOST_MODE_11AC_VHT160 = 15, WMI_HOST_MODE_11AX_HE20 = 16, WMI_HOST_MODE_11AX_HE40 = 17, WMI_HOST_MODE_11AX_HE80 = 18, WMI_HOST_MODE_11AX_HE80_80 = 19, WMI_HOST_MODE_11AX_HE160 = 20, WMI_HOST_MODE_11AX_HE20_2G = 21, WMI_HOST_MODE_11AX_HE40_2G = 22, WMI_HOST_MODE_11AX_HE80_2G = 23, WMI_HOST_MODE_UNKNOWN = 24, WMI_HOST_MODE_MAX = 24 } WMI_HOST_WLAN_PHY_MODE; typedef enum { WMI_HOST_VDEV_START_OK = 0, WMI_HOST_VDEV_START_CHAN_INVALID, WMI_HOST_VDEV_START_CHAN_BLOCKED, WMI_HOST_VDEV_START_CHAN_DFS_VIOLATION, } WMI_HOST_VDEV_START_STATUS; /* * Needs to be removed and use channel_param based * on how it is processed */ typedef struct { /** primary 20 MHz channel frequency in mhz */ uint32_t mhz; /** Center frequency 1 in MHz*/ uint32_t band_center_freq1; /** Center frequency 2 in MHz - valid only for 11acvht 80plus80 mode*/ uint32_t band_center_freq2; /** channel info described below */ uint32_t info; /** contains min power, max power, reg power and reg class id. */ uint32_t reg_info_1; /** contains antennamax */ uint32_t reg_info_2; } wmi_host_channel; /** * enum WMI_HOST_REGDMN_MODE: * @WMI_HOST_REGDMN_MODE_11A: 11a channels * @WMI_HOST_REGDMN_MODE_TURBO: 11a turbo-only channels * @WMI_HOST_REGDMN_MODE_11B: 11b channels * @WMI_HOST_REGDMN_MODE_PUREG: 11g channels (OFDM only) * @WMI_HOST_REGDMN_MODE_11G: historical * @WMI_HOST_REGDMN_MODE_108G: 11g+Turbo channels * @WMI_HOST_REGDMN_MODE_108A: 11a+Turbo channels * @WMI_HOST_REGDMN_MODE_XR: XR channels * @WMI_HOST_REGDMN_MODE_11A_HALF_RATE: 11a half rate channels * @WMI_HOST_REGDMN_MODE_11A_QUARTER_RATE: 11a quarter rate channels * @WMI_HOST_REGDMN_MODE_11NG_HT20: 11ng HT20 channels * @WMI_HOST_REGDMN_MODE_11NA_HT20: 11na HT20 channels * @WMI_HOST_REGDMN_MODE_11NG_HT40PLUS: 11ng HT40+ channels * @WMI_HOST_REGDMN_MODE_11NG_HT40MINUS: 11ng HT40- channels * @WMI_HOST_REGDMN_MODE_11NA_HT40PLUS: 11na HT40+ channels * @WMI_HOST_REGDMN_MODE_11NA_HT40MINUS: 11na HT40- channels * @WMI_HOST_REGDMN_MODE_11AC_VHT20: 5GHz, VHT20 * @WMI_HOST_REGDMN_MODE_11AC_VHT40PLUS: 5GHz, VHT40+ channels * @WMI_HOST_REGDMN_MODE_11AC_VHT40MINUS: 5GHz, VHT40- channels * @WMI_HOST_REGDMN_MODE_11AC_VHT80: 5GHz, VHT80 channels * @WMI_HOST_REGDMN_MODE_11AC_VHT160: 5GHz, VHT160 channels * @WMI_HOST_REGDMN_MODE_11AC_VHT80_80: 5GHz, VHT80+80 channels * @WMI_HOST_REGDMN_MODE_11AXG_HE20: 11ax 2.4GHz, HE20 channels * @WMI_HOST_REGDMN_MODE_11AXA_HE20: 11ax 5GHz, HE20 channels * @WMI_HOST_REGDMN_MODE_11AXG_HE40PLUS: 11ax 2.4GHz, HE40+ channels * @WMI_HOST_REGDMN_MODE_11AXG_HE40MINUS: 11ax 2.4GHz, HE40- channels * @WMI_HOST_REGDMN_MODE_11AXA_HE40PLUS: 11ax 5GHz, HE40+ channels * @WMI_HOST_REGDMN_MODE_11AXA_HE40MINUS: 11ax 5GHz, HE40- channels * @WMI_HOST_REGDMN_MODE_11AXA_HE80: 11ax 5GHz, HE80 channels * @WMI_HOST_REGDMN_MODE_11AXA_HE160: 11ax 5GHz, HE160 channels * @WMI_HOST_REGDMN_MODE_11AXA_HE80_80: 11ax 5GHz, HE80+80 channels */ typedef enum { WMI_HOST_REGDMN_MODE_11A = 0x00000001, WMI_HOST_REGDMN_MODE_TURBO = 0x00000002, WMI_HOST_REGDMN_MODE_11B = 0x00000004, WMI_HOST_REGDMN_MODE_PUREG = 0x00000008, WMI_HOST_REGDMN_MODE_11G = 0x00000008, WMI_HOST_REGDMN_MODE_108G = 0x00000020, WMI_HOST_REGDMN_MODE_108A = 0x00000040, WMI_HOST_REGDMN_MODE_XR = 0x00000100, WMI_HOST_REGDMN_MODE_11A_HALF_RATE = 0x00000200, WMI_HOST_REGDMN_MODE_11A_QUARTER_RATE = 0x00000400, WMI_HOST_REGDMN_MODE_11NG_HT20 = 0x00000800, WMI_HOST_REGDMN_MODE_11NA_HT20 = 0x00001000, WMI_HOST_REGDMN_MODE_11NG_HT40PLUS = 0x00002000, WMI_HOST_REGDMN_MODE_11NG_HT40MINUS = 0x00004000, WMI_HOST_REGDMN_MODE_11NA_HT40PLUS = 0x00008000, WMI_HOST_REGDMN_MODE_11NA_HT40MINUS = 0x00010000, WMI_HOST_REGDMN_MODE_11AC_VHT20 = 0x00020000, WMI_HOST_REGDMN_MODE_11AC_VHT40PLUS = 0x00040000, WMI_HOST_REGDMN_MODE_11AC_VHT40MINUS = 0x00080000, WMI_HOST_REGDMN_MODE_11AC_VHT80 = 0x00100000, WMI_HOST_REGDMN_MODE_11AC_VHT160 = 0x00200000, WMI_HOST_REGDMN_MODE_11AC_VHT80_80 = 0x00400000, WMI_HOST_REGDMN_MODE_11AXG_HE20 = 0x00800000, WMI_HOST_REGDMN_MODE_11AXA_HE20 = 0x01000000, WMI_HOST_REGDMN_MODE_11AXG_HE40PLUS = 0x02000000, WMI_HOST_REGDMN_MODE_11AXG_HE40MINUS = 0x04000000, WMI_HOST_REGDMN_MODE_11AXA_HE40PLUS = 0x08000000, WMI_HOST_REGDMN_MODE_11AXA_HE40MINUS = 0x10000000, WMI_HOST_REGDMN_MODE_11AXA_HE80 = 0x20000000, WMI_HOST_REGDMN_MODE_11AXA_HE160 = 0x40000000, WMI_HOST_REGDMN_MODE_11AXA_HE80_80 = 0x80000000, WMI_HOST_REGDMN_MODE_ALL = 0xffffffff } WMI_HOST_REGDMN_MODE; /** * enum WMI_HOST_WLAN_BAND_CAPABILITY: Band capability (2.4 GHz, 5 GHz). Maps to * WLAN_BAND_CAPABILITY used in firmware header file(s). * @WMI_HOST_WLAN_2G_CAPABILITY: 2.4 GHz capable * @WMI_HOST_WLAN_5G_CAPABILITY: 5 GHz capable */ typedef enum { WMI_HOST_WLAN_2G_CAPABILITY = 0x1, WMI_HOST_WLAN_5G_CAPABILITY = 0x2, } WMI_HOST_WLAN_BAND_CAPABILITY; /** * enum wmi_host_channel_width: Channel operating width. Maps to * wmi_channel_width used in firmware header file(s). * @WMI_HOST_CHAN_WIDTH_20: 20 MHz channel operating width * @WMI_HOST_CHAN_WIDTH_40: 40 MHz channel operating width * @WMI_HOST_CHAN_WIDTH_80: 80 MHz channel operating width * @WMI_HOST_CHAN_WIDTH_160: 160 MHz channel operating width * @WMI_HOST_CHAN_WIDTH_80P80: 80+80 MHz channel operating width * @WMI_HOST_CHAN_WIDTH_5: 5 MHz channel operating width * @WMI_HOST_CHAN_WIDTH_10: 10 MHz channel operating width */ typedef enum { WMI_HOST_CHAN_WIDTH_20 = 0, WMI_HOST_CHAN_WIDTH_40 = 1, WMI_HOST_CHAN_WIDTH_80 = 2, WMI_HOST_CHAN_WIDTH_160 = 3, WMI_HOST_CHAN_WIDTH_80P80 = 4, WMI_HOST_CHAN_WIDTH_5 = 5, WMI_HOST_CHAN_WIDTH_10 = 6, } wmi_host_channel_width; #define ATH_EXPONENT_TO_VALUE(v) ((1<