Reorganize the way to store FW required register mappings.
It will make future error check and debugging easier.
Update MID value to name translation table.
Change-Id: I6e3dbd837f2f2c297af16152754f27242aeb2637
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
added support to map AON reg range for FW
updated clk_get return check
Change-Id: I93732f840a6354558853d6c6644b569c53fa93db
Signed-off-by: Yu SI <quic_ysi@quicinc.com>
propagated sync v2 support from 2.0
reference 4162025
Change-Id: I3427657e21e7eda92088d828203a330ba3c86335
Signed-off-by: Yu SI <quic_ysi@quicinc.com>
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
The change also allows runtime change of auto-pil setting. It will
help presilicon bring up.
Change-Id: I9fd97a09e6730a2e13ae4503c74f8a2962c614c5
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
merged tip source code from eva-kernel.lnx.1.0,
and verify the promotion flow.
Change-Id: I031508fd8a23995a166506f3d190e5e228eb13c2
Signed-off-by: Yu SI <ysi@codeaurora.org>
Avoid pending transaction after EVA is power off. The transactions
may be introduced by PDX FIFO CX side pointer not reset after EVA power
collapsed. PMU can turn on AXI clock on CX side. It may trigger spurious
DDR transactions that are abnormal, in our case, the write transaction
has header, but not data.
Change-Id: I1374aa5ddf64ecc56c6c806cf096bed2761fd9a7
Signed-off-by: George Shen <sqiao@codeaurora.org>
For better debugging, it's conveninet to stall device when
EVA SSR happens.
Change-Id: I1bfd97d99ad3b6c0276282be9de4e7bb2456227d
Signed-off-by: George Shen <sqiao@codeaurora.org>
Support configurable number of SSR tolerance before calling
BUG_ON in SMMU fault scenario.
Change-Id: I19dabbeaa1cf5be86f42a6ace62ef5da12743e79
Signed-off-by: George Shen <sqiao@codeaurora.org>
obtain clock id from deviceTree file
then parse in clock_info structure.
Change-Id: I2c15b1c1d20ac12c0334b82534b9ad5633569d11
Signed-off-by: Yu SI <ysi@codeaurora.org>
New CPU-DSP interface aims to replace reverse RPC in DSP EVA
applications.
Change-Id: I4225dfa0b1acf8015a763263520442712e571851
Signed-off-by: George Shen <sqiao@codeaurora.org>