Commit Graph

13 Commits

Author SHA1 Message Date
Yuan Zhao
f2fdcee320 disp: msm: dsi: Set the panel test gpio to input
This GPIO is a input signal, so need to set it
to input mode, or it will lead leakage in RBC.
This change is only to fix the power issue.

Change-Id: I87716f646c75dac2f1350a2ea55188829a4ccc9e
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-07-19 00:52:34 -07:00
Yuan Zhao
a7b5db0465 disp: msm: dsi: Add a new DT property panel test pin
This pin is a output pin from panel. Panel can
output signal of internal VSYNC and ERR_FLAG.

Change-Id: Ib8e661ca1fdb33bb7060935edb9bc1f1a858c4b3
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-07-18 23:01:02 -07:00
Satya Rama Aditya Pinapala
edef6ae040 disp: msm: dsi: snapshot of dsi from 4.14 to 4.19
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)

Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-11 12:29:10 -07:00
qctecmdr
21af73b82c Merge "drm/msm/dsi-staging: update frame transfer time calculations" 2019-07-06 04:53:51 -07:00
Vara Reddy
98ac941a1b drm/msm/dsi-staging: update frame transfer time calculations
Change updates frame transfer time calculations. Frame threshold
is provided as input to decide on the final transfer time.
Panel dsi clock node followed by mdp transfer time node
will take priority in selecting final transfer time than frame
threshold time.

Change-Id: I40c3abfc635cd9b338b705535612ac32e047ce6e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-07-02 12:48:34 -07:00
Harpreet Eli Sangha
4999d92e48 drm/msm/dsi-staging: register panel with global registry
allow other device drivers to find this drm panel in global registry

Change-Id: I945bdbe9d8ed85dbb20f876e72687d6363c27492
(cherry picked from commit 9fd9ee68951d477aa9be580b047adcb72eff55c3)
Signed-off-by: Harpreet "Eli" Sangha <eliptus@google.com>
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-07-01 14:03:52 -07:00
Yujun Zhang
39bc44163c disp: msm: dsi: unify dynamic clk support for command mode
Currently the dynamic bit clock switch trigger for command mode
is supported via sysfs node. This might lead to unnecessary
race conditions, when dsi driver is enabling the dsi bit clock
as part of commit and at the same time if bit rate change via
sysfs happens. So make the trigger happens via kernel mode set
call as done for video mode.

Change-Id: I17acb408d2b6dbd6fa41994e56262e31e43d088b
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:06:36 +08:00
Yujun Zhang
b0f2e2222e disp: msm: dsi: add support for dsi dynamic clock switch
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.

Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:06:27 +08:00
Vara Reddy
f28b596aac drm/msm/dsi-staging: update dsi clock calculations
Change updates dsi clock calculations for command mode
as per recommendation. Now dsi clocks are tied to
frame transer time. Propagate correct frame transfer
time to hal to update mdp clocks and bandwidth needed
accordingly.

Change-Id: I46f9038622ddd47cc53c5f3d54229f69a7008c8a
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-05-15 13:06:43 -07:00
qctecmdr
d54b69e258 Merge "disp: msm: Add support for seamless panel operating mode switch" 2019-05-07 21:32:43 -07:00
Lei Chen
21edecd3b1 disp: msm: Add support for seamless panel operating mode switch
DSI display may support video mode and command mode both and it may
support transition between these two modes.
This change adds seamless transition between these two modes for DSI
display by avoiding crtc enable/disable and panel power on/off
during modeset.

Change-Id: Id7ddaef7d1f0f7cc7d52283755bad53a246adec6
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2019-05-06 18:45:44 -07:00
Veera Sundaram Sankaran
476f37c2bb disp: msm: fix dsc parameters related to 10 bpc 10 bpp
Fix few DSC parameters related to 10 bits-per-component
10 bits-per-pixel configuration according to HW programming
guide.

Change-Id: I3ceb1eb9b1247440ef68800e9b62e9ffb7ec5b57
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-01 17:13:58 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00