커밋 그래프

27 커밋

작성자 SHA1 메시지 날짜
Vara Reddy
df28b30edf drm/msm/dsi: update recommended non-embedded mode sequence
Removing dsi soft reset logic while arbitrating transferring
embedded mode and non-embedded dsi commands. This change
follows the recommended sequence for kona.

Change-Id: I05eef0c6cfd671f48fbfdf7cb2cab788e42bb1e5
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Vara Reddy
294db87b1f drm/msm/dsi: set cmd dma done mask before triggering cmds
Make sure that cmd dma done mask is set before sending
dma commands. This will make sure that we don't timeout
if the refcnt's are not properly handled. Many oem's
have their own customizations around this which maynot
handle the refcnt's correctly.

Change-Id: If7f5ed1fae20b57f6e9147cae2caa3c5097466c9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Aravind Venkateswaran
e84524efd2 disp: msm: dsi: disable DSI cmd tx async wait for video mode
For video mode panels, async wait feature for DCS command
transmission may not always be reliable as additional programming
would be needed to ensure that the DCS commands are correctly scheduled.
Until this feature is properly implemented and validated, disable this
for video mode panels to avoid potential DSI command transfer
failures.

Change-Id: I18c853bc5607cc1cc523b36f6f346b213911c1a9
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:53 -07:00
Aravind Venkateswaran
bce44eed47 disp: msm: dsi: add additional validation checks for async cmd wait
Disable DSI command transfer async wait feature for DSI read commands
and the commands sent in non-embedded mode.

CRs-Fixed: 2579259
Change-Id: Ib3b08fbb091711aa4be87400b79d01f0dcc05e71
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:46 -07:00
Vara Reddy
81ad4ef407 drm/msm/dsi: fix dsi command dma async race condition
Change will be removing checking and clearing dsi cmd done
interrupt in commit thread and in workqueue context, which
can race with dsi isr, when it tries to clear the interrupt.

Change-Id: I96e7f8dffed1af3cec0c7668ab1729337d4b260e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:32 -07:00
Lipsa Rout
5644d01f7a disp: msm: dsi: Update dsi byte interface clock calculation
Update dsi byte interface clock as per hardware recommendation.
For Phy ver 2.0 and below: byte intf clk equals to byte clk.
For Phy ver 3.0 and above: byte intf clk equals to byte clk / 2.

Change-Id: Ic3af2e4348403aeacb2e1c73c4dc133db63a51a4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:09 -07:00
Abhinav Kumar
64ee2c4d72 disp: msm: dsi: add generic API for calculating horizontal timings
Add a generic API which calculates the horizontal timings based
on the compression type in case compression is enabled and even
for non-compression cases.

Replace the usage of the DSC macros with this generic API.

Change-Id: Ie9174c20adc51a0be7c9127529d41faa4b473b55
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:46:33 -08:00
Satya Rama Aditya Pinapala
649c6b973d disp: msm: dsi: update DSI command buffer for MSM
This change takes care of swapping the byte order in
the packet header to work with MSM hardware.

Change-Id: I38b92a277aa4677d53e263ce343721b8f2b48497
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-20 17:47:04 -08:00
Satya Rama Aditya Pinapala
5694bc2eee disp: msm: dsi: move dsi pll as subnode to dsi PHY
DSI PLL is tightly coupled with DSI PHY. This change removes
separate DSI pll driver and makes DSI pll as a subnode to DSI
PHY which is an accurate way of representation. In addition, this
change adds support for 5nm DSI ctrl and PHY revisions and adds
DSI pll support for 5nm. Remove support for older DSI pll revisions
such as 7nm, 10nm, 14nm, 20nm, 28nm.

Change-Id: Ic8b886a9fe24b906e4ec5130720600efa1e59b68
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-10 17:06:58 -08:00
Yuan Zhao
cc564849ae disp: msm: dsi: remove dsi bus scaling setting
DSI driver did not use msm bus scaling setting,
remove the code.

Change-Id: I71675c8f4e3e97f1ded72ecac3fa87bdc7fb3774
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:45 -08:00
qctecmdr
d34c5f2215 Merge "disp: msm: add check for buffer length before copy" 2019-11-01 12:09:12 -07:00
Satya Rama Aditya Pinapala
8bc240b71d disp: msm: dsi: handle wait for dma cmd completion
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.

Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-29 18:40:25 -07:00
Ravikanth Tuniki
1e60728ab8 disp: msm: sde: Fix 32-bit compilation issues
1.Typecast to avoid distinct pointer type comparison
2.Keep DMA mask aligned with api definition.
3.Add Suffix for literals
4.Remove multfrac func to avoid uncompatible division.
5.64-bit division( operator "/") on 32-bit platforms is not supported.
  Using platform independent API's here

Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2019-10-24 14:48:40 +05:30
Satya Rama Aditya Pinapala
be08b4e451 disp: msm: add check for buffer length before copy
Length of the buffer to be copied is checked
against both source and destination buffer lengths
before copying. This ensures that there is  no
buffer overflow while reading as well as writing.

Change-Id: I4bd1a5892b47771aef4c23a4d1594fc1c8361577
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-21 17:06:59 -07:00
Satya Rama Aditya Pinapala
c32df7879d disp: msm: dsi: add check to avoid null pointer access
Add a check for valid pointer in the DSI CTRL logging macros
to fix null pointer access issues.

Change-Id: I92576e1db6c2d8b52c2adddd8c964bc2455536e4
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-08-05 10:22:46 -07:00
qctecmdr
66b5946f37 Merge "disp: msm: dsi: batch max packet size command with read command" 2019-07-29 14:02:29 -07:00
Satya Rama Aditya Pinapala
804f6e0de2 disp: msm: dsi: add check before buffer copy
This change adds a check for the length of the buffer
before copying it to avoid a buffer overflow.

Change-Id: I146895660be4060d9896706636257a57c6aef94f
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-23 09:22:26 -07:00
Satya Rama Aditya Pinapala
6c483e3b23 disp: msm: dsi: adding prefix for logs
Adding debug, info and error prefix for log messages
in dsi files. To enable debug logs
run "echo 0x1 > /sys/module/drm/parameters/debug"

Change-Id: I438ac16954bd1d39450f8adeb7fb17f9ea6f8140
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-22 17:43:35 -07:00
Vara Reddy
6c456bad33 disp: msm: dsi: batch max packet size command with read command
Change batches max packet size and read command together, so that
for each esd read, there will not be two independent command transfers.
Without batching sometimes esd thread can hold the panel mutex for
longer time, which can cause framedrops as crtc thread can be blocked on
panel lock to send partial update command and kickoff next frame.

Change-Id: I101283a2559b616911f4312421acb00a8f154dba
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-07-17 15:41:30 -07:00
Satya Rama Aditya Pinapala
edef6ae040 disp: msm: dsi: snapshot of dsi from 4.14 to 4.19
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)

Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-11 12:29:10 -07:00
qctecmdr
21af73b82c Merge "drm/msm/dsi-staging: update frame transfer time calculations" 2019-07-06 04:53:51 -07:00
Vara Reddy
98ac941a1b drm/msm/dsi-staging: update frame transfer time calculations
Change updates frame transfer time calculations. Frame threshold
is provided as input to decide on the final transfer time.
Panel dsi clock node followed by mdp transfer time node
will take priority in selecting final transfer time than frame
threshold time.

Change-Id: I40c3abfc635cd9b338b705535612ac32e047ce6e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-07-02 12:48:34 -07:00
Yujun Zhang
b0f2e2222e disp: msm: dsi: add support for dsi dynamic clock switch
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.

Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:06:27 +08:00
qctecmdr
d37cbd374b Merge "drm/msm/dsi-staging: update dsi clock calculations" 2019-05-23 16:40:53 -07:00
Vara Reddy
f28b596aac drm/msm/dsi-staging: update dsi clock calculations
Change updates dsi clock calculations for command mode
as per recommendation. Now dsi clocks are tied to
frame transer time. Propagate correct frame transfer
time to hal to update mdp clocks and bandwidth needed
accordingly.

Change-Id: I46f9038622ddd47cc53c5f3d54229f69a7008c8a
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-05-15 13:06:43 -07:00
Veera Sundaram Sankaran
4d353d556e disp: msm: dsi: remove reg dump sub range
Remove the redundant register dump sub range
registration for DSI ctl/phy as it needs only
the base registration, since it is considered
as a single block.

Change-Id: I11546bfcde05d02849c53577c4546dcfa9203539
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-13 14:04:39 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00